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[SystemZ] improve test for showing store merge miscompile; NFC
See issue #58883 for details.
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llvm/test/CodeGen/SystemZ/merge-stores.ll

Lines changed: 25 additions & 40 deletions
Original file line numberDiff line numberDiff line change
@@ -9,47 +9,32 @@ target datalayout = "E-m:e-i1:8:16-i8:8:16-i64:64-f128:64-v128:64-a:8:16-n32:64"
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@f = dso_local local_unnamed_addr global ptr @e, align 8
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@d = dso_local local_unnamed_addr global i32 0, align 4
1111

12-
define void @h(i64 %x) #0 {
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; CHECK-LABEL: h:
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; FIXME: This shows a miscompile caused by merging truncated
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; stores if the store of 0 (sthrl) to 'e' happens before
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; a 64-bit store (stg) of r0.
15+
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define signext i32 @main() {
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; CHECK-LABEL: main:
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; CHECK: # %bb.0:
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; CHECK-NEXT: lgrl %r0, e
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; CHECK-NEXT: lgrl %r1, f
16-
; CHECK-NEXT: srlg %r0, %r2, 32
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; CHECK-NEXT: st %r0, 0(%r1)
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; CHECK-NEXT: lhi %r0, 0
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; CHECK-NEXT: stg %r2, 0(%r1)
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; CHECK-NEXT: sthrl %r0, e
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; CHECK-NEXT: strl %r2, d
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; CHECK-NEXT: srlg %r2, %r0, 32
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; CHECK-NEXT: st %r2, 0(%r1)
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; CHECK-NEXT: lhi %r2, 0
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; CHECK-NEXT: sthrl %r2, e
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; CHECK-NEXT: stg %r0, 0(%r1)
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; CHECK-NEXT: lghi %r2, 0
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; CHECK-NEXT: strl %r0, d
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; CHECK-NEXT: br %r14
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%xsh = lshr i64 %x, 32
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%xhi = trunc i64 %xsh to i32
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%xlo = trunc i64 %x to i32
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%t0 = load ptr, ptr @f, align 8, !tbaa !4
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store i32 %xhi, ptr %t0, align 4, !tbaa.struct !8
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%f4 = getelementptr inbounds i8, ptr %t0, i64 4
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store i32 %xlo, ptr %f4, align 4, !tbaa.struct !13
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store i16 0, ptr @e, align 8, !tbaa !14
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store i32 %xlo, ptr @d, align 4, !tbaa !11
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ret void
29+
%e = load i64, ptr @e, align 8
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%esh = lshr i64 %e, 32
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%ehi = trunc i64 %esh to i32
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%elo = trunc i64 %e to i32
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%t1 = load ptr, ptr @f, align 8
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store i32 %ehi, ptr %t1, align 4
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%f4 = getelementptr inbounds i8, ptr %t1, i64 4
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store i32 %elo, ptr %f4, align 4
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store i16 0, ptr @e, align 8
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store i32 %elo, ptr @d, align 4
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ret i32 0
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}
34-
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attributes #0 = { "frame-pointer"="none" "target-cpu"="arch13" }
36-
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!llvm.module.flags = !{!0, !1, !2}
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!llvm.ident = !{!3}
39-
40-
!0 = !{i32 1, !"wchar_size", i32 4}
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!1 = !{i32 8, !"PIC Level", i32 2}
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!2 = !{i32 7, !"PIE Level", i32 2}
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!3 = !{!"clang version 16.0.0 (https://github.com/llvm/llvm-project.git fd16ff3a7ef7c03932066ed992a672d7e8abd304)"}
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!4 = !{!5, !5, i64 0}
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!5 = !{!"any pointer", !6, i64 0}
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!6 = !{!"omnipotent char", !7, i64 0}
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!7 = !{!"Simple C/C++ TBAA"}
48-
!8 = !{i64 0, i64 2, !9, i64 4, i64 4, !11}
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!9 = !{!10, !10, i64 0}
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!10 = !{!"short", !6, i64 0}
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!11 = !{!12, !12, i64 0}
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!12 = !{!"int", !6, i64 0}
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!13 = !{i64 0, i64 4, !11}
54-
!14 = !{!15, !10, i64 0}
55-
!15 = !{!"a", !10, i64 0, !12, i64 4}

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