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CodeGen: More accurate mayAlias for instructions with multiple MMOs (#166211)
There can only be meaningful aliasing between the memory accesses of different instructions if at least one of the accesses modifies memory. This check is applied at the instruction-level earlier in the method. This change merely extends the check on a per-MMO basis. This affects a SystemZ test because PFD instructions are both mayLoad and mayStore but may carry a load-only MMO which is now no longer treated as aliasing loads. The PFD instructions are from llvm.prefetch generated by loop-data-prefetch.
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-4
lines changed

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+8
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llvm/lib/CodeGen/MachineInstr.cpp

Lines changed: 6 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1547,10 +1547,14 @@ bool MachineInstr::mayAlias(BatchAAResults *AA, const MachineInstr &Other,
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// Check each pair of memory operands from both instructions, which can't
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// alias only if all pairs won't alias.
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for (auto *MMOa : memoperands())
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for (auto *MMOb : Other.memoperands())
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for (auto *MMOa : memoperands()) {
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for (auto *MMOb : Other.memoperands()) {
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if (!MMOa->isStore() && !MMOb->isStore())
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continue;
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if (MemOperandsHaveAlias(MFI, AA, UseTBAA, MMOa, MMOb))
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return true;
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}
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}
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return false;
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}

llvm/test/CodeGen/SystemZ/vec-load-element.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -5,8 +5,8 @@
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; CHECK-LABEL: .LBB0_1:
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; CHECK-NOT: l %r
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; CHECK-NOT: vlvgf
8-
; CHECK: pfd
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; CHECK: vlef
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; CHECK-DAG: pfd
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; CHECK-DAG: vlef
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%type0 = type { i32, [400 x i8], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
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@Mem = external global [150 x %type0], align 4

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