Merge remote-tracking branch 'upstream/sycl' into urlog

Author: mateuszpn

.github/workflows/bandit.yml

@@ -11,6 +11,7 @@ permissions:
 
 jobs:
   bandit:
+    if: github.repository == 'intel/llvm'
     name: Bandit
     runs-on: ubuntu-latest
     permissions:

.github/workflows/sycl-issues-ping-assignee.yml

@@ -18,6 +18,7 @@ permissions: read-all
 
 jobs:
   run:
+    if: github.repository == 'intel/llvm'
     permissions:
       issues: write 
     runs-on: ubuntu-latest

.github/workflows/sycl-rel-nightly.yml

@@ -167,7 +167,7 @@ jobs:
 
   cuda-aws-stop:
     needs: [cuda-aws-start, cuda-run-tests]
-    if: always()
+    if: always() && ${{ needs.cuda-aws-start.result != 'skipped' }}
     uses: ./.github/workflows/sycl-aws.yml
     secrets: inherit
     with:

.github/workflows/sycl-stale-issues.yml

@@ -8,6 +8,7 @@ permissions: read-all
 
 jobs:
   close-issues:
+    if: github.repository == 'intel/llvm'
     permissions:
       issues: write  # for actions/stale to close stale issues
       pull-requests: write  # for actions/stale to close stale PRs

.github/workflows/sycl-ur-perf-benchmarking.yml

@@ -114,8 +114,8 @@ jobs:
     strategy:
       matrix:
         include:
-          - ref: ${{ inputs.commit_hash != '' && inputs.commit_hash || format('refs/pull/{0}/head', inputs.pr_no) }}
-            save_name: ${{ inputs.commit_hash != '' && format('Commit{0}', inputs.commit_hash) || format('PR{0}', inputs.pr_no) }}
+          - ref: ${{ inputs.commit_hash != '' && inputs.commit_hash || inputs.pr_no != '' && format('refs/pull/{0}/head', inputs.pr_no) || github.ref }}
+            save_name: ${{ inputs.commit_hash != '' && format('Commit{0}', inputs.commit_hash) || inputs.pr_no != '' && format('PR{0}', inputs.pr_no) || 'Baseline' }}
             # Set default values if not specified:
             runner: ${{ inputs.runner || '["PVC_PERF"]' }}
             backend: ${{ inputs.backend || 'level_zero:gpu' }}

.github/workflows/sycl-windows-precommit.yml

@@ -79,30 +79,12 @@ jobs:
         include:
           - name: Intel GEN12 Graphics with Level Zero
             runner: '["Windows","gen12"]'
-    uses: ./.github/workflows/sycl-windows-run-tests.yml
-    with:
-      name: ${{ matrix.name }}
-      runner: ${{ matrix.runner }}
-      sycl_toolchain_archive: ${{ needs.build.outputs.artifact_archive_name }}
-      e2e_testing_mode: run-only
-      e2e_binaries_artifact: sycl_windows_e2ebin
-
-  run_full_e2e_tests:
-    needs: build
-    # Continue if build was successful.
-    if: |
-      always()
-      && !cancelled()
-      && needs.build.outputs.build_conclusion == 'success'
-    strategy:
-      fail-fast: false
-      matrix:
-        include:
           - name: Intel Battlemage Graphics with Level Zero
             runner: '["Windows","bmg"]'
     uses: ./.github/workflows/sycl-windows-run-tests.yml
     with:
       name: ${{ matrix.name }}
       runner: ${{ matrix.runner }}
       sycl_toolchain_archive: ${{ needs.build.outputs.artifact_archive_name }}
-      e2e_testing_mode: full
+      e2e_testing_mode: run-only
+      e2e_binaries_artifact: sycl_windows_e2ebin

buildbot/configure.py

@@ -134,6 +134,9 @@ def do_configure(args, passthrough_args):
     if args.use_lld:
         llvm_enable_lld = "ON"
 
+    if args.use_zstd:
+        llvm_enable_zstd = "FORCE_ON"
+
     # CI Default conditionally appends to options, keep it at the bottom of
     # args handling
     if args.ci_defaults:
@@ -417,6 +420,9 @@ def main():
         "--native-cpu-libclc-targets",
         help="Target triples for libclc, used by the Native CPU backend",
     )
+    parser.add_argument(
+        "--use-zstd", action="store_true", help="Force zstd linkage while building."
+    )
     args, passthrough_args = parser.parse_known_intermixed_args()
 
     print("args:{}".format(args))

clang/include/clang/Driver/Types.def

@@ -125,12 +125,7 @@ TYPE("tempfiletable",            Tempfiletable,INVALID,         "table",  phases
 TYPE("tempAOCOfilelist",         TempAOCOfilelist, INVALID,     "txt",    phases::Compile, phases::Backend, phases::Assemble, phases::Link)
 TYPE("archive",                  Archive,      INVALID,         "a",      phases::Compile, phases::Backend, phases::Assemble, phases::Link)
 TYPE("wholearchive",             WholeArchive, INVALID,         "a",      phases::Compile, phases::Backend, phases::Assemble, phases::Link)
-TYPE("fpga_aocx",                FPGA_AOCX,    INVALID,         "aocx",   phases::Compile, phases::Backend, phases::Assemble, phases::Link)
-TYPE("fpga_aocr",                FPGA_AOCR,    INVALID,         "aocr",   phases::Compile, phases::Backend, phases::Assemble, phases::Link)
-TYPE("fpga_aocr_emu",            FPGA_AOCR_EMU, INVALID,        "aocr",   phases::Compile, phases::Backend, phases::Assemble, phases::Link)
-TYPE("fpga_aoco",                FPGA_AOCO,    INVALID,         "aoco",   phases::Compile, phases::Backend, phases::Assemble, phases::Link)
 TYPE("fpga_dep",                 FPGA_Dependencies, INVALID,    "d",      phases::Compile, phases::Backend, phases::Assemble, phases::Link)
-TYPE("fpga_dep_list",            FPGA_Dependencies_List, INVALID, "txt",  phases::Compile, phases::Backend, phases::Assemble, phases::Link)
 TYPE("host_dep_image",           Host_Dependencies_Image, INVALID, "out", phases::Compile, phases::Backend, phases::Assemble, phases::Link)
 TYPE("api-information",          API_INFO,     INVALID,         "json",   phases::Precompile)
 TYPE("dx-container",             DX_CONTAINER, INVALID,         "dxo",    phases::Compile, phases::Backend)

clang/include/clang/Driver/Types.h

@@ -89,9 +89,6 @@ namespace types {
   /// isHIP - Is this a HIP input.
   bool isHIP(ID Id);
 
-  /// isFPGA - Is this FPGA input.
-  bool isFPGA(ID Id);
-
   /// isArchive - Is this an archive input.
   bool isArchive(ID Id);
 

clang/lib/Driver/Compilation.cpp

@@ -225,8 +225,7 @@ bool Compilation::CleanupFileList(const TempFileList &Files,
     // Temporary file lists contain files that need to be cleaned. The
     // file containing the information is also removed
     if (File.second == types::TY_Tempfilelist ||
-        File.second == types::TY_Tempfiletable ||
-        File.second == types::TY_FPGA_Dependencies_List) {
+        File.second == types::TY_Tempfiletable) {
       // These are temporary files and need to be removed.
       bool IsTable = File.second == types::TY_Tempfiletable;