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[Test][InstCombine] Precommit tests for PR52078
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llvm/test/Transforms/InstCombine/lshr.ll

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@@ -617,3 +617,51 @@ define i12 @trunc_sandwich_big_sum_shift2_use1(i32 %x) {
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%r = lshr i12 %tr, 1
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ret i12 %r
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}
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define i16 @lshr_sext_i1_to_i16(i1 %a) {
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; CHECK-LABEL: @lshr_sext_i1_to_i16(
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; CHECK-NEXT: [[SEXT:%.*]] = sext i1 [[A:%.*]] to i16
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; CHECK-NEXT: [[LSHR:%.*]] = lshr i16 [[SEXT]], 4
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; CHECK-NEXT: ret i16 [[LSHR]]
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;
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%sext = sext i1 %a to i16
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%lshr = lshr i16 %sext, 4
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ret i16 %lshr
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}
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define i128 @lshr_sext_i1_to_i128(i1 %a) {
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; CHECK-LABEL: @lshr_sext_i1_to_i128(
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; CHECK-NEXT: [[SEXT:%.*]] = sext i1 [[A:%.*]] to i128
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; CHECK-NEXT: [[LSHR:%.*]] = lshr i128 [[SEXT]], 42
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; CHECK-NEXT: ret i128 [[LSHR]]
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;
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%sext = sext i1 %a to i128
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%lshr = lshr i128 %sext, 42
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ret i128 %lshr
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}
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define i32 @lshr_sext_i1_to_i32_use(i1 %a) {
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; CHECK-LABEL: @lshr_sext_i1_to_i32_use(
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; CHECK-NEXT: [[SEXT:%.*]] = sext i1 [[A:%.*]] to i32
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; CHECK-NEXT: call void @use(i32 [[SEXT]])
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; CHECK-NEXT: [[LSHR:%.*]] = lshr i32 [[SEXT]], 14
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; CHECK-NEXT: ret i32 [[LSHR]]
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;
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%sext = sext i1 %a to i32
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call void @use(i32 %sext)
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%lshr = lshr i32 %sext, 14
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ret i32 %lshr
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}
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define <3 x i14> @lshr_sext_i1_to_i14_splat_vec_use1(<3 x i1> %a) {
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; CHECK-LABEL: @lshr_sext_i1_to_i14_splat_vec_use1(
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; CHECK-NEXT: [[SEXT:%.*]] = sext <3 x i1> [[A:%.*]] to <3 x i14>
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; CHECK-NEXT: call void @usevec(<3 x i14> [[SEXT]])
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; CHECK-NEXT: [[LSHR:%.*]] = lshr <3 x i14> [[SEXT]], <i14 4, i14 4, i14 4>
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; CHECK-NEXT: ret <3 x i14> [[LSHR]]
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;
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%sext = sext <3 x i1> %a to <3 x i14>
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call void @usevec(<3 x i14> %sext)
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%lshr = lshr <3 x i14> %sext, <i14 4, i14 4, i14 4>
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ret <3 x i14> %lshr
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}
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -O2 -S < %s | FileCheck %s
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; RUN: opt -instcombine -S < %s | FileCheck %s --check-prefix=IC
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; RUN: opt -aggressive-instcombine -instcombine -S < %s | FileCheck %s --check-prefix=AIC_AND_IC
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target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
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target triple = "x86_64-unknown-linux-gnu"
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define i16 @foo(i1 %a) {
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; CHECK-LABEL: @foo(
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; CHECK-NEXT: [[TRUNC:%.*]] = select i1 [[A:%.*]], i16 32767, i16 0
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; CHECK-NEXT: ret i16 [[TRUNC]]
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;
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; IC-LABEL: @foo(
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; IC-NEXT: [[TRUNC:%.*]] = select i1 [[A:%.*]], i16 32767, i16 0
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; IC-NEXT: ret i16 [[TRUNC]]
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;
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; AIC_AND_IC-LABEL: @foo(
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; AIC_AND_IC-NEXT: [[SEXT:%.*]] = sext i1 [[A:%.*]] to i16
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; AIC_AND_IC-NEXT: [[LSHR:%.*]] = lshr i16 [[SEXT]], 1
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; AIC_AND_IC-NEXT: ret i16 [[LSHR]]
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;
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%sext = sext i1 %a to i16
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%zext = zext i16 %sext to i32
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%lshr = lshr i32 %zext, 1
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%trunc = trunc i32 %lshr to i16
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ret i16 %trunc
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}
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define i16 @foo2(i1 %a) {
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; CHECK-LABEL: @foo2(
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; CHECK-NEXT: [[S:%.*]] = sext i1 [[A:%.*]] to i16
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; CHECK-NEXT: [[LSHR:%.*]] = lshr i16 [[S]], 1
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; CHECK-NEXT: ret i16 [[LSHR]]
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;
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; IC-LABEL: @foo2(
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; IC-NEXT: [[S:%.*]] = sext i1 [[A:%.*]] to i16
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; IC-NEXT: [[LSHR:%.*]] = lshr i16 [[S]], 1
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; IC-NEXT: ret i16 [[LSHR]]
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;
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; AIC_AND_IC-LABEL: @foo2(
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; AIC_AND_IC-NEXT: [[S:%.*]] = sext i1 [[A:%.*]] to i16
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; AIC_AND_IC-NEXT: [[LSHR:%.*]] = lshr i16 [[S]], 1
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; AIC_AND_IC-NEXT: ret i16 [[LSHR]]
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;
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%s = sext i1 %a to i16
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%lshr = lshr i16 %s, 1
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ret i16 %lshr
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}

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