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NFC: Use -LABEL more
There were a number of tests needing updates for D91734, and I added a bunch of LABEL directives to help track down where those had to go. These directives are an improvement independent of the functional patch, so I'm committing them as their own separate patch.
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+82
-76
lines changed

7 files changed

+82
-76
lines changed

‎llvm/test/CodeGen/AArch64/arm64-fast-isel-call.ll

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -78,7 +78,7 @@ declare i32 @bar(i8 zeroext, i8 zeroext, i8 zeroext, i8 zeroext, i8 zeroext, i8
7878
; Test materialization of integers. Target-independent selector handles this.
7979
define i32 @t2() {
8080
entry:
81-
; CHECK-LABEL: t2
81+
; CHECK-LABEL: t2:
8282
; CHECK: mov x0, xzr
8383
; CHECK: mov w1, #-8
8484
; CHECK: mov [[REG2:w[0-9]+]], #1023
@@ -99,6 +99,7 @@ declare i32 @func2(i64 zeroext, i32 signext, i16 zeroext, i8 signext, i1 zeroext
9999
declare void @callee_b0f(i8 %bp10, i8 %bp11, i8 %bp12, i8 %bp13, i8 %bp14, i8 %bp15, i8 %bp17, i8 %bp18, i8 %bp19)
100100
define void @caller_b1f() {
101101
entry:
102+
; CHECK-LABEL: caller_b1f
102103
; CHECK-BE-LABEL: caller_b1f
103104
; CHECK-BE: strb w{{.*}}, [sp, #7]
104105
call void @callee_b0f(i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8, i8 42)

‎llvm/test/CodeGen/AArch64/arm64-fast-isel.ll

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -2,7 +2,7 @@
22

33
define void @t0(i32 %a) nounwind {
44
entry:
5-
; CHECK: t0
5+
; CHECK-LABEL: t0:
66
; CHECK: str {{w[0-9]+}}, [sp, #12]
77
; CHECK-NEXT: ldr [[REGISTER:w[0-9]+]], [sp, #12]
88
; CHECK-NEXT: str [[REGISTER]], [sp, #12]
@@ -15,7 +15,7 @@ entry:
1515
}
1616

1717
define void @t1(i64 %a) nounwind {
18-
; CHECK: t1
18+
; CHECK-LABEL: t1:
1919
; CHECK: str {{x[0-9]+}}, [sp, #8]
2020
; CHECK-NEXT: ldr [[REGISTER:x[0-9]+]], [sp, #8]
2121
; CHECK-NEXT: str [[REGISTER]], [sp, #8]
@@ -29,7 +29,7 @@ define void @t1(i64 %a) nounwind {
2929

3030
define zeroext i1 @i1(i1 %a) nounwind {
3131
entry:
32-
; CHECK: @i1
32+
; CHECK-LABEL: i1:
3333
; CHECK: and [[REG:w[0-9]+]], w0, #0x1
3434
; CHECK: strb [[REG]], [sp, #15]
3535
; CHECK: ldrb [[REG1:w[0-9]+]], [sp, #15]
@@ -84,7 +84,7 @@ entry:
8484
}
8585

8686
define void @t6() nounwind {
87-
; CHECK: t6
87+
; CHECK-LABEL: t6:
8888
; CHECK: brk #0x1
8989
tail call void @llvm.trap()
9090
ret void

‎llvm/test/CodeGen/AArch64/elf-globals-static.ll

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -15,6 +15,7 @@ define i8 @test_i8(i8 %new) {
1515
; CHECK: ldrb {{w[0-9]+}}, [x[[HIREG]], :lo12:var8]
1616
; CHECK: strb {{w[0-9]+}}, [x[[HIREG]], :lo12:var8]
1717

18+
; CHECK-FAST-LABEL: test_i8:
1819
; CHECK-FAST: adrp x[[HIREG:[0-9]+]], var8
1920
; CHECK-FAST: ldrb {{w[0-9]+}}, [x[[HIREG]], :lo12:var8]
2021
}
@@ -28,6 +29,7 @@ define i16 @test_i16(i16 %new) {
2829
; CHECK: ldrh {{w[0-9]+}}, [x[[HIREG]], :lo12:var16]
2930
; CHECK: strh {{w[0-9]+}}, [x[[HIREG]], :lo12:var16]
3031

32+
; CHECK-FAST-LABEL: test_i16:
3133
; CHECK-FAST: adrp x[[HIREG:[0-9]+]], var16
3234
; CHECK-FAST: ldrh {{w[0-9]+}}, [x[[HIREG]], :lo12:var16]
3335
}
@@ -41,6 +43,7 @@ define i32 @test_i32(i32 %new) {
4143
; CHECK: ldr {{w[0-9]+}}, [x[[HIREG]], :lo12:var32]
4244
; CHECK: str {{w[0-9]+}}, [x[[HIREG]], :lo12:var32]
4345

46+
; CHECK-FAST-LABEL: test_i32:
4447
; CHECK-FAST: adrp x[[HIREG:[0-9]+]], var32
4548
; CHECK-FAST: add {{x[0-9]+}}, x[[HIREG]], :lo12:var32
4649
}
@@ -54,6 +57,7 @@ define i64 @test_i64(i64 %new) {
5457
; CHECK: ldr {{x[0-9]+}}, [x[[HIREG]], :lo12:var64]
5558
; CHECK: str {{x[0-9]+}}, [x[[HIREG]], :lo12:var64]
5659

60+
; CHECK-FAST-LABEL: test_i64:
5761
; CHECK-FAST: adrp x[[HIREG:[0-9]+]], var64
5862
; CHECK-FAST: add {{x[0-9]+}}, x[[HIREG]], :lo12:var64
5963
}
@@ -64,6 +68,7 @@ define i64* @test_addr() {
6468
; CHECK: adrp [[HIREG:x[0-9]+]], var64
6569
; CHECK: add x0, [[HIREG]], :lo12:var64
6670

71+
; CHECK-FAST-LABEL: test_addr:
6772
; CHECK-FAST: adrp [[HIREG:x[0-9]+]], var64
6873
; CHECK-FAST: add x0, [[HIREG]], :lo12:var64
6974
}

‎llvm/test/CodeGen/ARM/fast-isel-call.ll

Lines changed: 23 additions & 23 deletions
Original file line numberDiff line numberDiff line change
@@ -38,8 +38,8 @@ define i32 @t4(i16 zeroext %a) nounwind {
3838
}
3939

4040
define void @foo(i8 %a, i16 %b) nounwind {
41-
; ARM: foo
42-
; THUMB: foo
41+
; ARM-LABEL: foo:
42+
; THUMB-LABEL: foo:
4343
;; Materialize i1 1
4444
; ARM: movw [[REG0:r[0-9]+]], #1
4545
; THUMB: movs [[REG0:r[0-9]+]], #1
@@ -87,7 +87,7 @@ declare zeroext i1 @t9();
8787

8888
define i32 @t10() {
8989
entry:
90-
; ARM: @t10
90+
; ARM-LABEL: @t10
9191
; ARM-DAG: movw [[R0:l?r[0-9]*]], #0
9292
; ARM-DAG: movw [[R1:l?r[0-9]*]], #248
9393
; ARM-DAG: movw [[R2:l?r[0-9]*]], #187
@@ -114,7 +114,7 @@ entry:
114114
; ARM-LONG-ELF: ldr [[R:r[0-9]+]], {{\[}}[[R1]]]
115115

116116
; ARM-LONG: blx [[R]]
117-
; THUMB: @t10
117+
; THUMB-LABEL: @t10
118118
; THUMB-DAG: movs [[R0:l?r[0-9]*]], #0
119119
; THUMB-DAG: movs [[R1:l?r[0-9]*]], #248
120120
; THUMB-DAG: movs [[R2:l?r[0-9]*]], #187
@@ -146,7 +146,7 @@ define i32 @bar0(i32 %i) nounwind {
146146
}
147147

148148
define void @foo3() uwtable {
149-
; ARM: @foo3
149+
; ARM-LABEL: @foo3
150150
; ARM: {{(movw r[0-9]+, :lower16:_?bar0)|(ldr r[0-9]+, .LCPI)}}
151151
; ARM: {{(movt r[0-9]+, :upper16:_?bar0)|(ldr r[0-9]+, \[r[0-9]+\])}}
152152
; ARM: movw {{r[0-9]+}}, #0
@@ -164,9 +164,9 @@ define void @foo3() uwtable {
164164

165165
define i32 @LibCall(i32 %a, i32 %b) {
166166
entry:
167-
; ARM: LibCall
167+
; ARM-LABEL: LibCall:
168168
; ARM: bl {{___udivsi3|__aeabi_uidiv}}
169-
; ARM-LONG-LABEL: LibCall
169+
; ARM-LONG-LABEL: LibCall:
170170

171171
; ARM-LONG-MACHO: {{(movw r2, :lower16:L___udivsi3\$non_lazy_ptr)|(ldr r2, .LCPI)}}
172172
; ARM-LONG-MACHO: {{(movt r2, :upper16:L___udivsi3\$non_lazy_ptr)?}}
@@ -176,7 +176,7 @@ entry:
176176
; ARM-LONG-ELF: movt r2, :upper16:__aeabi_uidiv
177177

178178
; ARM-LONG: blx r2
179-
; THUMB: LibCall
179+
; THUMB-LABEL: LibCall:
180180
; THUMB: bl {{___udivsi3|__aeabi_uidiv}}
181181
; THUMB-LONG-LABEL: LibCall
182182
; THUMB-LONG: {{(movw r2, :lower16:L___udivsi3\$non_lazy_ptr)|(ldr.n r2, .LCPI)}}
@@ -191,9 +191,9 @@ entry:
191191

192192
define fastcc void @fast_callee(float %i) ssp {
193193
entry:
194-
; ARM: fast_callee
194+
; ARM-LABEL: fast_callee:
195195
; ARM: vmov r0, s0
196-
; THUMB: fast_callee
196+
; THUMB-LABEL: fast_callee:
197197
; THUMB: vmov r0, s0
198198
; ARM-NOVFP: fast_callee
199199
; ARM-NOVFP-NOT: s0
@@ -205,14 +205,14 @@ entry:
205205

206206
define void @fast_caller() ssp {
207207
entry:
208-
; ARM: fast_caller
208+
; ARM-LABEL: fast_caller:
209209
; ARM: vldr s0,
210-
; THUMB: fast_caller
210+
; THUMB-LABEL: fast_caller:
211211
; THUMB: vldr s0,
212-
; ARM-NOVFP: fast_caller
212+
; ARM-NOVFP-LABEL: fast_caller:
213213
; ARM-NOVFP: movw r0, #13107
214214
; ARM-NOVFP: movt r0, #16611
215-
; THUMB-NOVFP: fast_caller
215+
; THUMB-NOVFP-LABEL: fast_caller:
216216
; THUMB-NOVFP: movw r0, #13107
217217
; THUMB-NOVFP: movt r0, #16611
218218
call fastcc void @fast_callee(float 0x401C666660000000)
@@ -221,28 +221,28 @@ entry:
221221

222222
define void @no_fast_callee(float %i) ssp {
223223
entry:
224-
; ARM: no_fast_callee
224+
; ARM-LABEL: no_fast_callee:
225225
; ARM: vmov s0, r0
226-
; THUMB: no_fast_callee
226+
; THUMB-LABEL: no_fast_callee:
227227
; THUMB: vmov s0, r0
228-
; ARM-NOVFP: no_fast_callee
228+
; ARM-NOVFP-LABEL: no_fast_callee:
229229
; ARM-NOVFP-NOT: s0
230-
; THUMB-NOVFP: no_fast_callee
230+
; THUMB-NOVFP-LABEL: no_fast_callee:
231231
; THUMB-NOVFP-NOT: s0
232232
call void @print(float %i)
233233
ret void
234234
}
235235

236236
define void @no_fast_caller() ssp {
237237
entry:
238-
; ARM: no_fast_caller
238+
; ARM-LABEL: no_fast_caller:
239239
; ARM: vmov r0, s0
240-
; THUMB: no_fast_caller
240+
; THUMB-LABEL: no_fast_caller:
241241
; THUMB: vmov r0, s0
242-
; ARM-NOVFP: no_fast_caller
242+
; ARM-NOVFP-LABEL: no_fast_caller:
243243
; ARM-NOVFP: movw r0, #13107
244244
; ARM-NOVFP: movt r0, #16611
245-
; THUMB-NOVFP: no_fast_caller
245+
; THUMB-NOVFP-LABEL: no_fast_caller:
246246
; THUMB-NOVFP: movw r0, #13107
247247
; THUMB-NOVFP: movt r0, #16611
248248
call void @no_fast_callee(float 0x401C666660000000)
@@ -252,7 +252,7 @@ entry:
252252
declare void @bar2(i32 %a1, i32 %a2, i32 %a3, i32 %a4, i32 %a5, i32 %a6)
253253

254254
define void @call_undef_args() {
255-
; ARM-LABEL: call_undef_args
255+
; ARM-LABEL: call_undef_args:
256256
; ARM: movw r0, #1
257257
; ARM-NEXT: movw r1, #2
258258
; ARM-NEXT: movw r2, #3

‎llvm/test/CodeGen/ARM/fast-isel-ldrh-strh-arm.ll

Lines changed: 15 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -4,7 +4,7 @@
44

55
define zeroext i16 @t1(i16* nocapture %a) nounwind uwtable readonly ssp {
66
entry:
7-
; ARM: t1
7+
; ARM-LABEL: t1:
88
%add.ptr = getelementptr inbounds i16, i16* %a, i64 -8
99
%0 = load i16, i16* %add.ptr, align 2
1010
; ARM: ldrh r0, [r0, #-16]
@@ -13,7 +13,7 @@ entry:
1313

1414
define zeroext i16 @t2(i16* nocapture %a) nounwind uwtable readonly ssp {
1515
entry:
16-
; ARM: t2
16+
; ARM-LABEL: t2:
1717
%add.ptr = getelementptr inbounds i16, i16* %a, i64 -16
1818
%0 = load i16, i16* %add.ptr, align 2
1919
; ARM: ldrh r0, [r0, #-32]
@@ -22,7 +22,7 @@ entry:
2222

2323
define zeroext i16 @t3(i16* nocapture %a) nounwind uwtable readonly ssp {
2424
entry:
25-
; ARM: t3
25+
; ARM-LABEL: t3:
2626
%add.ptr = getelementptr inbounds i16, i16* %a, i64 -127
2727
%0 = load i16, i16* %add.ptr, align 2
2828
; ARM: ldrh r0, [r0, #-254]
@@ -31,7 +31,7 @@ entry:
3131

3232
define zeroext i16 @t4(i16* nocapture %a) nounwind uwtable readonly ssp {
3333
entry:
34-
; ARM: t4
34+
; ARM-LABEL: t4:
3535
%add.ptr = getelementptr inbounds i16, i16* %a, i64 -128
3636
%0 = load i16, i16* %add.ptr, align 2
3737
; ARM: mvn r{{[1-9]}}, #255
@@ -42,7 +42,7 @@ entry:
4242

4343
define zeroext i16 @t5(i16* nocapture %a) nounwind uwtable readonly ssp {
4444
entry:
45-
; ARM: t5
45+
; ARM-LABEL: t5:
4646
%add.ptr = getelementptr inbounds i16, i16* %a, i64 8
4747
%0 = load i16, i16* %add.ptr, align 2
4848
; ARM: ldrh r0, [r0, #16]
@@ -51,7 +51,7 @@ entry:
5151

5252
define zeroext i16 @t6(i16* nocapture %a) nounwind uwtable readonly ssp {
5353
entry:
54-
; ARM: t6
54+
; ARM-LABEL: t6:
5555
%add.ptr = getelementptr inbounds i16, i16* %a, i64 16
5656
%0 = load i16, i16* %add.ptr, align 2
5757
; ARM: ldrh r0, [r0, #32]
@@ -60,7 +60,7 @@ entry:
6060

6161
define zeroext i16 @t7(i16* nocapture %a) nounwind uwtable readonly ssp {
6262
entry:
63-
; ARM: t7
63+
; ARM-LABEL: t7:
6464
%add.ptr = getelementptr inbounds i16, i16* %a, i64 127
6565
%0 = load i16, i16* %add.ptr, align 2
6666
; ARM: ldrh r0, [r0, #254]
@@ -69,7 +69,7 @@ entry:
6969

7070
define zeroext i16 @t8(i16* nocapture %a) nounwind uwtable readonly ssp {
7171
entry:
72-
; ARM: t8
72+
; ARM-LABEL: t8:
7373
%add.ptr = getelementptr inbounds i16, i16* %a, i64 128
7474
%0 = load i16, i16* %add.ptr, align 2
7575
; ARM: add r0, r0, #256
@@ -79,7 +79,7 @@ entry:
7979

8080
define void @t9(i16* nocapture %a) nounwind uwtable ssp {
8181
entry:
82-
; ARM: t9
82+
; ARM-LABEL: t9:
8383
%add.ptr = getelementptr inbounds i16, i16* %a, i64 -8
8484
store i16 0, i16* %add.ptr, align 2
8585
; ARM: movw [[REG0:r[0-9]+]], #0
@@ -91,7 +91,7 @@ entry:
9191
; strh r2, [r0, r1]
9292
define void @t10(i16* nocapture %a) nounwind uwtable ssp {
9393
entry:
94-
; ARM: t10
94+
; ARM-LABEL: t10:
9595
%add.ptr = getelementptr inbounds i16, i16* %a, i64 -128
9696
store i16 0, i16* %add.ptr, align 2
9797
; ARM: mvn r1, #255
@@ -103,7 +103,7 @@ entry:
103103

104104
define void @t11(i16* nocapture %a) nounwind uwtable ssp {
105105
entry:
106-
; ARM: t11
106+
; ARM-LABEL: t11:
107107
%add.ptr = getelementptr inbounds i16, i16* %a, i64 8
108108
store i16 0, i16* %add.ptr, align 2
109109
; ARM: movw [[REG1:r[0-9]+]], #0
@@ -115,7 +115,7 @@ entry:
115115
; strh r2, [r0, r1]
116116
define void @t12(i16* nocapture %a) nounwind uwtable ssp {
117117
entry:
118-
; ARM: t12
118+
; ARM-LABEL: t12:
119119
%add.ptr = getelementptr inbounds i16, i16* %a, i64 128
120120
store i16 0, i16* %add.ptr, align 2
121121
; ARM: add [[REG0:r[0-9]+]], r0, #256
@@ -126,7 +126,7 @@ entry:
126126

127127
define signext i8 @t13(i8* nocapture %a) nounwind uwtable readonly ssp {
128128
entry:
129-
; ARM: t13
129+
; ARM-LABEL: t13:
130130
%add.ptr = getelementptr inbounds i8, i8* %a, i64 -8
131131
%0 = load i8, i8* %add.ptr, align 2
132132
; ARM: ldrsb r0, [r0, #-8]
@@ -135,7 +135,7 @@ entry:
135135

136136
define signext i8 @t14(i8* nocapture %a) nounwind uwtable readonly ssp {
137137
entry:
138-
; ARM: t14
138+
; ARM-LABEL: t14:
139139
%add.ptr = getelementptr inbounds i8, i8* %a, i64 -255
140140
%0 = load i8, i8* %add.ptr, align 2
141141
; ARM: ldrsb r0, [r0, #-255]
@@ -144,7 +144,7 @@ entry:
144144

145145
define signext i8 @t15(i8* nocapture %a) nounwind uwtable readonly ssp {
146146
entry:
147-
; ARM: t15
147+
; ARM-LABEL: t15:
148148
%add.ptr = getelementptr inbounds i8, i8* %a, i64 -256
149149
%0 = load i8, i8* %add.ptr, align 2
150150
; ARM: mvn r{{[1-9]}}, #255

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