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iclsrc
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Merge from 'sycl' to 'sycl-web'
2 parents 41861c7 + d6a8fd1 commit f6c3efd

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7 files changed

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7 files changed

+410
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‎libclc/ptx-nvidiacl/libspirv/atomic/atomic_helpers.h

Lines changed: 53 additions & 53 deletions
Original file line numberDiff line numberDiff line change
@@ -72,62 +72,62 @@ _CLC_OVERLOAD _CLC_DECL void __spirv_MemoryBarrier(unsigned int, unsigned int);
7272
} \
7373
}
7474

75-
#define __CLC_NVVM_ATOMIC_IMPL(TYPE, TYPE_MANGLED, TYPE_NV, TYPE_MANGLED_NV, \
76-
OP, NAME_MANGLED, ADDR_SPACE, \
77-
ADDR_SPACE_MANGLED, ADDR_SPACE_NV) \
78-
_CLC_DECL TYPE \
79-
NAME_MANGLED##PU3##ADDR_SPACE_MANGLED##TYPE_MANGLED##N5__spv5Scope4FlagENS1_19MemorySemanticsMask4FlagE##TYPE_MANGLED( \
80-
volatile ADDR_SPACE TYPE *pointer, enum Scope scope, \
81-
enum MemorySemanticsMask semantics, TYPE value) { \
82-
/* Semantics mask may include memory order, storage class and other info \
83-
Memory order is stored in the lowest 5 bits */ \
84-
unsigned int order = semantics & 0x1F; \
85-
switch (order) { \
86-
case None: \
87-
__CLC_NVVM_ATOMIC_IMPL_ORDER(TYPE, TYPE_NV, TYPE_MANGLED_NV, OP, \
88-
ADDR_SPACE, ADDR_SPACE_NV, ) \
89-
break; \
90-
case Acquire: \
91-
if (__clc_nvvm_reflect_arch() >= 700) { \
92-
__CLC_NVVM_ATOMIC_IMPL_ORDER(TYPE, TYPE_NV, TYPE_MANGLED_NV, OP, \
93-
ADDR_SPACE, ADDR_SPACE_NV, _acquire) \
94-
} else { \
95-
__CLC_NVVM_ATOMIC_IMPL_ACQUIRE_FENCE(TYPE, TYPE_NV, TYPE_MANGLED_NV, \
96-
OP, ADDR_SPACE, ADDR_SPACE_NV) \
97-
} \
98-
break; \
99-
case Release: \
100-
if (__clc_nvvm_reflect_arch() >= 700) { \
101-
__CLC_NVVM_ATOMIC_IMPL_ORDER(TYPE, TYPE_NV, TYPE_MANGLED_NV, OP, \
102-
ADDR_SPACE, ADDR_SPACE_NV, _release) \
103-
} else { \
104-
__spirv_MemoryBarrier(scope, Release); \
105-
__CLC_NVVM_ATOMIC_IMPL_ORDER(TYPE, TYPE_NV, TYPE_MANGLED_NV, OP, \
106-
ADDR_SPACE, ADDR_SPACE_NV, ) \
107-
} \
108-
break; \
109-
case AcquireRelease: \
110-
if (__clc_nvvm_reflect_arch() >= 700) { \
111-
__CLC_NVVM_ATOMIC_IMPL_ORDER(TYPE, TYPE_NV, TYPE_MANGLED_NV, OP, \
112-
ADDR_SPACE, ADDR_SPACE_NV, _acq_rel) \
113-
} else { \
114-
__spirv_MemoryBarrier(scope, Release); \
115-
__CLC_NVVM_ATOMIC_IMPL_ACQUIRE_FENCE(TYPE, TYPE_NV, TYPE_MANGLED_NV, \
116-
OP, ADDR_SPACE, ADDR_SPACE_NV) \
117-
} \
118-
break; \
119-
} \
120-
__builtin_trap(); \
121-
__builtin_unreachable(); \
75+
#define __CLC_NVVM_ATOMIC_IMPL( \
76+
TYPE, TYPE_MANGLED, TYPE_NV, TYPE_MANGLED_NV, OP, NAME_MANGLED, \
77+
ADDR_SPACE, POINTER_AND_ADDR_SPACE_MANGLED, ADDR_SPACE_NV, SUBSTITUTION) \
78+
__attribute__((always_inline)) _CLC_DECL TYPE \
79+
NAME_MANGLED##POINTER_AND_ADDR_SPACE_MANGLED##TYPE_MANGLED##N5__spv\
80+
5Scope4FlagENS##SUBSTITUTION##_19MemorySemanticsMask4FlagE##TYPE_MANGLED( \
81+
volatile ADDR_SPACE TYPE *pointer, enum Scope scope, \
82+
enum MemorySemanticsMask semantics, TYPE value) { \
83+
/* Semantics mask may include memory order, storage class and other info \
84+
Memory order is stored in the lowest 5 bits */ \
85+
unsigned int order = semantics & 0x1F; \
86+
switch (order) { \
87+
case None: \
88+
__CLC_NVVM_ATOMIC_IMPL_ORDER(TYPE, TYPE_NV, TYPE_MANGLED_NV, OP, \
89+
ADDR_SPACE, ADDR_SPACE_NV, ) \
90+
break; \
91+
case Acquire: \
92+
if (__clc_nvvm_reflect_arch() >= 700) { \
93+
__CLC_NVVM_ATOMIC_IMPL_ORDER(TYPE, TYPE_NV, TYPE_MANGLED_NV, OP, \
94+
ADDR_SPACE, ADDR_SPACE_NV, _acquire) \
95+
} else { \
96+
__CLC_NVVM_ATOMIC_IMPL_ACQUIRE_FENCE(TYPE, TYPE_NV, TYPE_MANGLED_NV, \
97+
OP, ADDR_SPACE, ADDR_SPACE_NV) \
98+
} \
99+
break; \
100+
case Release: \
101+
if (__clc_nvvm_reflect_arch() >= 700) { \
102+
__CLC_NVVM_ATOMIC_IMPL_ORDER(TYPE, TYPE_NV, TYPE_MANGLED_NV, OP, \
103+
ADDR_SPACE, ADDR_SPACE_NV, _release) \
104+
} else { \
105+
__spirv_MemoryBarrier(scope, Release); \
106+
__CLC_NVVM_ATOMIC_IMPL_ORDER(TYPE, TYPE_NV, TYPE_MANGLED_NV, OP, \
107+
ADDR_SPACE, ADDR_SPACE_NV, ) \
108+
} \
109+
break; \
110+
case AcquireRelease: \
111+
if (__clc_nvvm_reflect_arch() >= 700) { \
112+
__CLC_NVVM_ATOMIC_IMPL_ORDER(TYPE, TYPE_NV, TYPE_MANGLED_NV, OP, \
113+
ADDR_SPACE, ADDR_SPACE_NV, _acq_rel) \
114+
} else { \
115+
__spirv_MemoryBarrier(scope, Release); \
116+
__CLC_NVVM_ATOMIC_IMPL_ACQUIRE_FENCE(TYPE, TYPE_NV, TYPE_MANGLED_NV, \
117+
OP, ADDR_SPACE, ADDR_SPACE_NV) \
118+
} \
119+
break; \
120+
} \
121+
__builtin_trap(); \
122+
__builtin_unreachable(); \
122123
}
123124

124125
#define __CLC_NVVM_ATOMIC(TYPE, TYPE_MANGLED, TYPE_NV, TYPE_MANGLED_NV, OP, \
125126
NAME_MANGLED) \
126-
__attribute__((always_inline)) \
127127
__CLC_NVVM_ATOMIC_IMPL(TYPE, TYPE_MANGLED, TYPE_NV, TYPE_MANGLED_NV, OP, \
128-
NAME_MANGLED, __global, AS1, _global_) \
129-
__attribute__((always_inline)) \
130-
__CLC_NVVM_ATOMIC_IMPL(TYPE, TYPE_MANGLED, TYPE_NV, TYPE_MANGLED_NV, OP, \
131-
NAME_MANGLED, __local, AS3, _shared_)
132-
128+
NAME_MANGLED, __global, PU3AS1, _global_, 1) \
129+
__CLC_NVVM_ATOMIC_IMPL(TYPE, TYPE_MANGLED, TYPE_NV, TYPE_MANGLED_NV, OP, \
130+
NAME_MANGLED, __local, PU3AS3, _shared_, 1) \
131+
__CLC_NVVM_ATOMIC_IMPL(TYPE, TYPE_MANGLED, TYPE_NV, TYPE_MANGLED_NV, OP, \
132+
NAME_MANGLED, , P, _gen_, 0)
133133
#endif

‎sycl/doc/GetStartedGuide.md

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -735,7 +735,7 @@ cmake_minimum_required(VERSION 3.14)
735735
set(CMAKE_CXX_COMPILER "clang++")
736736
set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -fsycl")
737737
738-
project(simple-sycl-app)
738+
project(simple-sycl-app LANGUAGES CXX)
739739
740740
add_executable(simple-sycl-app simple-sycl-app.cpp)
741741
```

‎sycl/include/sycl/queue.hpp

Lines changed: 118 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1133,6 +1133,124 @@ class __SYCL_EXPORT queue {
11331133
CodeLoc);
11341134
}
11351135

1136+
/// Copies data from a memory region pointed to by a placeholder accessor to
1137+
/// another memory region pointed to by a shared_ptr.
1138+
///
1139+
/// \param Src is a placeholder accessor to the source memory.
1140+
/// \param Dest is a shared_ptr to the destination memory.
1141+
/// \return an event representing copy operation.
1142+
template <typename SrcT, int SrcDims, access_mode SrcMode, target SrcTgt,
1143+
access::placeholder IsPlaceholder, typename DestT>
1144+
event copy(accessor<SrcT, SrcDims, SrcMode, SrcTgt, IsPlaceholder> Src,
1145+
std::shared_ptr<DestT> Dest _CODELOCPARAM(&CodeLoc)) {
1146+
return submit([&](handler &CGH) {
1147+
CGH.require(Src);
1148+
CGH.copy(Src, Dest);
1149+
} _CODELOCFW(CodeLoc));
1150+
}
1151+
1152+
/// Copies data from a memory region pointed to by a shared_ptr to another
1153+
/// memory region pointed to by a placeholder accessor.
1154+
///
1155+
/// \param Src is a shared_ptr to the source memory.
1156+
/// \param Dest is a placeholder accessor to the destination memory.
1157+
/// \return an event representing copy operation.
1158+
template <typename SrcT, typename DestT, int DestDims, access_mode DestMode,
1159+
target DestTgt, access::placeholder IsPlaceholder>
1160+
event copy(std::shared_ptr<SrcT> Src,
1161+
accessor<DestT, DestDims, DestMode, DestTgt, IsPlaceholder> Dest
1162+
_CODELOCPARAM(&CodeLoc)) {
1163+
return submit([&](handler &CGH) {
1164+
CGH.require(Dest);
1165+
CGH.copy(Src, Dest);
1166+
} _CODELOCFW(CodeLoc));
1167+
}
1168+
1169+
/// Copies data from a memory region pointed to by a placeholder accessor to
1170+
/// another memory region pointed to by a raw pointer.
1171+
///
1172+
/// \param Src is a placeholder accessor to the source memory.
1173+
/// \param Dest is a raw pointer to the destination memory.
1174+
/// \return an event representing copy operation.
1175+
template <typename SrcT, int SrcDims, access_mode SrcMode, target SrcTgt,
1176+
access::placeholder IsPlaceholder, typename DestT>
1177+
event copy(accessor<SrcT, SrcDims, SrcMode, SrcTgt, IsPlaceholder> Src,
1178+
DestT *Dest _CODELOCPARAM(&CodeLoc)) {
1179+
return submit([&](handler &CGH) {
1180+
CGH.require(Src);
1181+
CGH.copy(Src, Dest);
1182+
} _CODELOCFW(CodeLoc));
1183+
}
1184+
1185+
/// Copies data from a memory region pointed to by a raw pointer to another
1186+
/// memory region pointed to by a placeholder accessor.
1187+
///
1188+
/// \param Src is a raw pointer to the source memory.
1189+
/// \param Dest is a placeholder accessor to the destination memory.
1190+
/// \return an event representing copy operation.
1191+
template <typename SrcT, typename DestT, int DestDims, access_mode DestMode,
1192+
target DestTgt, access::placeholder IsPlaceholder>
1193+
event copy(const SrcT *Src,
1194+
accessor<DestT, DestDims, DestMode, DestTgt, IsPlaceholder> Dest
1195+
_CODELOCPARAM(&CodeLoc)) {
1196+
return submit([&](handler &CGH) {
1197+
CGH.require(Dest);
1198+
CGH.copy(Src, Dest);
1199+
} _CODELOCFW(CodeLoc));
1200+
}
1201+
1202+
/// Copies data from one memory region to another, both pointed by placeholder
1203+
/// accessors.
1204+
///
1205+
/// \param Src is a placeholder accessor to the source memory.
1206+
/// \param Dest is a placeholder accessor to the destination memory.
1207+
/// \return an event representing copy operation.
1208+
template <typename SrcT, int SrcDims, access_mode SrcMode, target SrcTgt,
1209+
access::placeholder IsSrcPlaceholder, typename DestT, int DestDims,
1210+
access_mode DestMode, target DestTgt,
1211+
access::placeholder IsDestPlaceholder>
1212+
event
1213+
copy(accessor<SrcT, SrcDims, SrcMode, SrcTgt, IsSrcPlaceholder> Src,
1214+
accessor<DestT, DestDims, DestMode, DestTgt, IsDestPlaceholder> Dest
1215+
_CODELOCPARAM(&CodeLoc)) {
1216+
return submit([&](handler &CGH) {
1217+
CGH.require(Src);
1218+
CGH.require(Dest);
1219+
CGH.copy(Src, Dest);
1220+
} _CODELOCFW(CodeLoc));
1221+
}
1222+
1223+
/// Provides guarantees that the memory object accessed via Acc is updated
1224+
/// on the host after operation is complete.
1225+
///
1226+
/// \param Acc is a SYCL accessor that needs to be updated on host.
1227+
/// \return an event representing update_host operation.
1228+
template <typename T, int Dims, access_mode Mode, target Tgt,
1229+
access::placeholder IsPlaceholder>
1230+
event update_host(
1231+
accessor<T, Dims, Mode, Tgt, IsPlaceholder> Acc _CODELOCPARAM(&CodeLoc)) {
1232+
return submit([&](handler &CGH) {
1233+
CGH.require(Acc);
1234+
CGH.update_host(Acc);
1235+
} _CODELOCFW(CodeLoc));
1236+
}
1237+
1238+
/// Fills the specified memory with the specified data.
1239+
///
1240+
/// \param Dest is the placeholder accessor to the memory to fill.
1241+
/// \param Src is the data to fill the memory with. T should be
1242+
/// trivially copyable.
1243+
/// \return an event representing fill operation.
1244+
template <typename T, int Dims, access_mode Mode, target Tgt,
1245+
access::placeholder IsPlaceholder>
1246+
event fill(accessor<T, Dims, Mode, Tgt, IsPlaceholder> Dest,
1247+
const T &Src _CODELOCPARAM(&CodeLoc)) {
1248+
return submit([&](handler &CGH) {
1249+
CGH.require(Dest);
1250+
CGH.fill<T>(Dest, Src);
1251+
} _CODELOCFW(CodeLoc));
1252+
}
1253+
11361254
// Clean KERNELFUNC macros.
11371255
#undef _KERNELFUNCPARAM
11381256

‎sycl/plugins/cuda/pi_cuda.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -3922,7 +3922,7 @@ pi_result cuda_piEnqueueEventsWaitWithBarrier(pi_queue command_queue,
39223922
CUstream cuStream = command_queue->get_next_compute_stream(
39233923
num_events_in_wait_list, event_wait_list, guard, &stream_token);
39243924
{
3925-
std::lock_guard(command_queue->barrier_mutex_);
3925+
std::lock_guard<std::mutex> guard(command_queue->barrier_mutex_);
39263926
if (command_queue->barrier_event_ == nullptr) {
39273927
PI_CHECK_ERROR(cuEventCreate(&command_queue->barrier_event_,
39283928
CU_EVENT_DISABLE_TIMING));

‎sycl/plugins/hip/pi_hip.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -3747,7 +3747,7 @@ pi_result hip_piEnqueueEventsWaitWithBarrier(pi_queue command_queue,
37473747
hipStream_t hipStream = command_queue->get_next_compute_stream(
37483748
num_events_in_wait_list, event_wait_list, guard, &stream_token);
37493749
{
3750-
std::lock_guard(command_queue->barrier_mutex_);
3750+
std::lock_guard<std::mutex> guard(command_queue->barrier_mutex_);
37513751
if (command_queue->barrier_event_ == nullptr) {
37523752
PI_CHECK_ERROR(hipEventCreate(&command_queue->barrier_event_));
37533753
}

‎sycl/unittests/queue/CMakeLists.txt

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -4,4 +4,5 @@ add_sycl_unittest(QueueTests OBJECT
44
USM.cpp
55
Wait.cpp
66
GetProfilingInfo.cpp
7+
ShortcutFunctions.cpp
78
)

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