[SYCL] Enable SPV_INTEL_maximum_registers by default

[sarnex]

Use the SPV_INTEL_maximum_registers extension to implement per-kernel GRF selection. Previously we were doing it was a hack adding an annotation on the entry point which only worked for the scalar IGC backend.

This extension has long been supported in scalar IGC, and it never worked previously for ESIMD using the old path and support was recently added for ESIMD using this extension.

There should be no ABI break, previously-generated object files and executable generated with an old compiler will still have the same behavior as before this change.

[sarnex]

Previously, the translator was looking for RegisterAllocMode MD to be 0,1 or 2. With the new extension enabled, the translator looks for the actual GRF register size as the operand of RegisterAllocMode, which the sycl-grf-size attr already has, so now we need to fixup the old sycl-register-alloc-mode attr value to have the register size instead of the enum value.

Also, the SPV_INTEL_maximum_registers spec does not have a restriction on the value of the operand, so remove that restriction (we error for anything because 0, 128. or 256 in SYCL headers anyway)

We also remove the ESIMD check as the new extension is supported in the vector backend (though that driver is not in our CI yet, but as I said it never worked previously anyway).

[sarnex]

Sorry, actually the scalar backend support isn't working, so we can't merge this yet, closing for now.