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[SYCL] Enable nonsemantic.shader.debuginfo.200 by default #16120

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Merged
merged 2 commits into from
Nov 19, 2024
Merged

[SYCL] Enable nonsemantic.shader.debuginfo.200 by default #16120

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[SYCL] Enable nonsemantic.shader.debuginfo.200 by default
MrSidims Nov 19, 2024
cfdb0d9
add old model test
MrSidims Nov 19, 2024
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8 changes: 2 additions & 6 deletions clang/lib/Driver/ToolChains/Clang.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -10674,12 +10674,8 @@ static void getTripleBasedSPIRVTransOpts(Compilation &C,
ArgStringList &TranslatorArgs) {
bool IsCPU = Triple.isSPIR() &&
Triple.getSubArch() == llvm::Triple::SPIRSubArch_x86_64;
// Enable NonSemanticShaderDebugInfo.200 for CPU AOT and for non-Windows
const bool IsWindowsMSVC =
Triple.isWindowsMSVCEnvironment() ||
C.getDefaultToolChain().getTriple().isWindowsMSVCEnvironment();
const bool EnableNonSemanticDebug =
IsCPU || (!IsWindowsMSVC && !C.getDriver().IsFPGAHWMode());
// Enable NonSemanticShaderDebugInfo.200 for non-FPGA targets.
const bool EnableNonSemanticDebug = !C.getDriver().IsFPGAHWMode();
if (EnableNonSemanticDebug) {
TranslatorArgs.push_back(
"-spirv-debug-info-version=nonsemantic-shader-200");
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16 changes: 16 additions & 0 deletions clang/test/Driver/sycl-spirv-default-options.c
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@@ -0,0 +1,16 @@
// Generate .o file as SYCL device library file.
//
// RUN: touch %t.devicelib.cpp
// RUN: %clang %t.devicelib.cpp -fsycl -fsycl-targets=spir64-unknown-unknown -c --offload-new-driver -o %t_1.devicelib.o
// RUN: %clang %t.devicelib.cpp -fsycl -fsycl-targets=spir64_gen-unknown-unknown -c --offload-new-driver -o %t_2.devicelib.o
// RUN: %clang %t.devicelib.cpp -fsycl -fsycl-targets=spir64_x86_64-unknown-unknown -c --offload-new-driver -o %t_3.devicelib.o

// Test for default llvm-spirv options
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@MrSidims MrSidims Nov 19, 2024

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I haven't found the proper tests for this, so created a new one. The idea of it that when we decide to support new SPIR-V versions etc - we could modify this tests. Similar test is sycl-spirv-ext.c - but it was created for a bit different purpose and I'd like not to modify it with this patch.

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@mdtoguchi mdtoguchi Nov 19, 2024

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This test looks to cover the new offloading model with the changes for clang-linker-wrapper. Should an equivalent test be created for the old offloading model behaviors to check the driver defaults?

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@MrSidims MrSidims Nov 19, 2024

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added a new test, thanks!


// RUN: %clang -target x86_64-unknown-linux-gnu -fsycl --offload-new-driver \
// RUN: -fsycl-targets=spir64-unknown-unknown -c %s -o %t_1.o
// RUN: clang-linker-wrapper -sycl-device-libraries=%t_1.devicelib.o \
// RUN: "--host-triple=x86_64-unknown-linux-gnu" "--linker-path=/usr/bin/ld" \
// RUN: "--" "-o" "a.out" %t_1.o --dry-run 2>&1 | FileCheck %s

// CHECK: llvm-spirv{{.*}}-spirv-debug-info-version=nonsemantic-shader-200
14 changes: 1 addition & 13 deletions clang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp
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Expand Up @@ -830,19 +830,7 @@ getTripleBasedSPIRVTransOpts(const ArgList &Args,
const llvm::Triple Triple) {
bool IsCPU = Triple.isSPIR() &&
Triple.getSubArch() == llvm::Triple::SPIRSubArch_x86_64;
// Enable NonSemanticShaderDebugInfo.200 for CPU AOT and for non-Windows
const bool IsWindowsMSVC = Triple.isWindowsMSVCEnvironment() ||
Args.hasArg(OPT_sycl_is_windows_msvc_env);
const bool EnableNonSemanticDebug = IsCPU || !IsWindowsMSVC;
if (EnableNonSemanticDebug) {
TranslatorArgs.push_back(
"-spirv-debug-info-version=nonsemantic-shader-200");
} else {
TranslatorArgs.push_back("-spirv-debug-info-version=ocl-100");
// Prevent crash in the translator if input IR contains DIExpression
// operations which don't have mapping to OpenCL.DebugInfo.100 spec.
TranslatorArgs.push_back("-spirv-allow-extra-diexpressions");
}
TranslatorArgs.push_back("-spirv-debug-info-version=nonsemantic-shader-200");
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@sarnex sarnex Nov 19, 2024

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It looks like in the driver we don't want to do this for FPGA mode, and I don't see that implemented here, and I see at least one check for FPGA in this file:

Triple.getSubArch() != llvm::Triple::SPIRSubArch_fpga

Should we add that here?

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@MrSidims MrSidims Nov 19, 2024

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I can add it. Also the current version of getTripleBasedSPIRVTransOpts in ClangLinkerWrapper.cpp doesn't consider FPGA, while the logic must be exactly like in https://github.com/intel/llvm/blob/sycl/clang/lib/Driver/ToolChains/Clang.cpp#L10728 . This should go into a separate patch.

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@sarnex sarnex Nov 19, 2024

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yeah thats fine for now, i guess lets just make an internal tracker to decide what we're doing with fpga

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@asudarsa asudarsa Nov 19, 2024

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If/When we turn on new offloading model by default in our SYCL compilation flow, we will not be using it for FPGA modes. So, it is safe to not add FPGA related logic in ClangLinkerWrapper.

Thanks

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@sarnex sarnex Nov 19, 2024 •
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imo we should remove that one place that checks for fpga, but definitely not related to this pr

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@asudarsa asudarsa Nov 19, 2024

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Thanks @sarnex. There are some unnecessary FPGA related logic which has snuck into the wrapper. That needs to be cleaned up. In my todo list. :-)

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@sarnex sarnex Nov 19, 2024

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thx!

std::string UnknownIntrinsics("-spirv-allow-unknown-intrinsics=llvm.genx.");
if (IsCPU)
UnknownIntrinsics += ",llvm.fpbuiltin";
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