[L0 Runtime Wrapper][SIMT] Adding upstream L0 runtime wrapper usage in SIMT cases (#1113)

Garra1980 · web-flow · commit 378689fd7fd9 · 2025-08-28T20:32:51.000-05:00
Since Level Zero runtime wrappers have been upstreamed and we decided to move forward using them and not SYCL runtime ones this PR switches SIMT tests from one to another
diff --git a/CMakeLists.txt b/CMakeLists.txt
@@ -218,6 +218,10 @@ if(NOT DEFINED MLIR_ENABLE_SYCL_RUNNER)
     set(MLIR_ENABLE_SYCL_RUNNER 0)
 endif()
 
+if(NOT DEFINED MLIR_ENABLE_LEVELZERO_RUNNER)
+    set(MLIR_ENABLE_LEVELZERO_RUNNER 0)
+endif()
+
 if (IMEX_ENABLE_L0_RUNTIME)
     set(IMEX_ENABLE_L0_RUNTIME 1)
 else ()
diff --git a/test/CMakeLists.txt b/test/CMakeLists.txt
@@ -53,6 +53,12 @@ if(MLIR_ENABLE_SYCL_RUNNER)
         )
 endif()
 
+if(MLIR_ENABLE_LEVELZERO_RUNNER)
+    list(APPEND IMEX_TEST_DEPENDS
+        mlir_levelzero_runtime
+        )
+endif()
+
 if(IMEX_ENABLE_SYCL_RUNTIME)
     list(APPEND IMEX_TEST_DEPENDS
         sycl-runtime
diff --git a/test/Integration/Dialect/XeGPU/SG/gemm_4kx4kx4k_f16_f16_f16.mlir b/test/Integration/Dialect/XeGPU/SG/gemm_4kx4kx4k_f16_f16_f16.mlir
@@ -1,7 +1,7 @@
-// RUN: %python_executable %imex_runner --requires=mlir-sycl-runtime,spirv-backend -i %s --pass-pipeline-file=%p/xegpu-to-llvm.pp \
+// RUN: %python_executable %imex_runner --requires=mlir-levelzero-runtime,spirv-backend -i %s --pass-pipeline-file=%p/xegpu-to-llvm.pp \
 // RUN:                                       --runner mlir-runner -e main \
 // RUN:                                       --entry-point-result=void \
-// RUN:                                       --shared-libs=%irunner_utils,%mlir_runner_utils,%mlir_c_runner_utils,%mlir_sycl_runtime --filecheck
+// RUN:                                       --shared-libs=%irunner_utils,%mlir_runner_utils,%mlir_c_runner_utils,%mlir_levelzero_runtime --filecheck
 module @gemm attributes {gpu.container_module} {
   func.func @test(%A: memref<4096x4096xf16>, %B: memref<4096x4096xf16>, %C: memref<4096x4096xf16>) -> memref<4096x4096xf16> attributes {llvm.emit_c_interface} {
     %c1 = arith.constant 1 : index
diff --git a/test/Integration/Dialect/XeGPU/SG/lit.local.cfg b/test/Integration/Dialect/XeGPU/SG/lit.local.cfg
@@ -1,2 +1,2 @@
-if(not config.mlir_enable_sycl_runtime):
+if(not config.mlir_enable_levelzero_runtime):
   config.unsupported = True
diff --git a/test/Integration/Dialect/XeGPU/SG/simple_gemm.mlir b/test/Integration/Dialect/XeGPU/SG/simple_gemm.mlir
@@ -1,7 +1,7 @@
-// RUN: %python_executable %imex_runner --requires=mlir-sycl-runtime,spirv-backend -i %s --pass-pipeline-file=%p/xegpu-to-llvm.pp \
+// RUN: %python_executable %imex_runner --requires=mlir-levelzero-runtime,spirv-backend -i %s --pass-pipeline-file=%p/xegpu-to-llvm.pp \
 // RUN:                                       --runner mlir-runner -e main \
 // RUN:                                       --entry-point-result=void \
-// RUN:                                       --shared-libs=%irunner_utils,%mlir_runner_utils,%mlir_c_runner_utils,%mlir_sycl_runtime --filecheck
+// RUN:                                       --shared-libs=%irunner_utils,%mlir_runner_utils,%mlir_c_runner_utils,%mlir_levelzero_runtime --filecheck
 
 
 module @gemm attributes {gpu.container_module} {
diff --git a/test/Integration/Dialect/XeGPU/SIMT/col_reduce_16x16xf16.mlir b/test/Integration/Dialect/XeGPU/SIMT/col_reduce_16x16xf16.mlir
@@ -1,7 +1,7 @@
-// RUN: %python_executable %imex_runner --requires=mlir-sycl-runtime,spirv-backend -i %s --pass-pipeline-file=%p/xegpu-to-llvm.pp \
+// RUN: %python_executable %imex_runner --requires=mlir-levelzero-runtime,spirv-backend -i %s --pass-pipeline-file=%p/xegpu-to-llvm.pp \
 // RUN:                                       --runner mlir-runner -e main \
 // RUN:                                       --entry-point-result=void \
-// RUN:                                       --shared-libs=%irunner_utils,%mlir_runner_utils,%mlir_c_runner_utils,%mlir_sycl_runtime --filecheck
+// RUN:                                       --shared-libs=%irunner_utils,%mlir_runner_utils,%mlir_c_runner_utils,%mlir_levelzero_runtime --filecheck
 module @gemm attributes {gpu.container_module} {
   gpu.module @kernel {
     gpu.func @col_reduce(%in: memref<16x16xf16>, %c: memref<1x16xf16>) kernel attributes {intel_reqd_sub_group_size = 16 : i32} {
diff --git a/test/Integration/Dialect/XeGPU/SIMT/gemm_4kx4kx4k_f16_f16_f16.mlir b/test/Integration/Dialect/XeGPU/SIMT/gemm_4kx4kx4k_f16_f16_f16.mlir
@@ -1,7 +1,7 @@
-// RUN: %python_executable %imex_runner --requires=mlir-sycl-runtime,spirv-backend -i %s --pass-pipeline-file=%p/xegpu-to-llvm.pp \
+// RUN: %python_executable %imex_runner --requires=mlir-levelzero-runtime,spirv-backend -i %s --pass-pipeline-file=%p/xegpu-to-llvm.pp \
 // RUN:                                       --runner mlir-runner -e main \
 // RUN:                                       --entry-point-result=void \
-// RUN:                                       --shared-libs=%irunner_utils,%mlir_runner_utils,%mlir_c_runner_utils,%mlir_sycl_runtime --filecheck
+// RUN:                                       --shared-libs=%irunner_utils,%mlir_runner_utils,%mlir_c_runner_utils,%mlir_levelzero_runtime --filecheck
 module @gemm attributes {gpu.container_module} {
   func.func @test(%A: memref<4096x4096xf16>, %B: memref<4096x4096xf16>, %C: memref<4096x4096xf16>) -> memref<4096x4096xf16> attributes {llvm.emit_c_interface} {
     %c1 = arith.constant 1 : index
diff --git a/test/Integration/Dialect/XeGPU/SIMT/gemm_4kx4kx4k_transpose_b.mlir b/test/Integration/Dialect/XeGPU/SIMT/gemm_4kx4kx4k_transpose_b.mlir
@@ -1,7 +1,7 @@
-// RUN: %python_executable %imex_runner --requires=mlir-sycl-runtime,spirv-backend -i %s --pass-pipeline-file=%p/xegpu-to-llvm.pp \
+// RUN: %python_executable %imex_runner --requires=mlir-levelzero-runtime,spirv-backend -i %s --pass-pipeline-file=%p/xegpu-to-llvm.pp \
 // RUN:                                       --runner mlir-runner -e main \
 // RUN:                                       --entry-point-result=void \
-// RUN:                                       --shared-libs=%irunner_utils,%mlir_runner_utils,%mlir_c_runner_utils,%mlir_sycl_runtime --filecheck
+// RUN:                                       --shared-libs=%irunner_utils,%mlir_runner_utils,%mlir_c_runner_utils,%mlir_levelzero_runtime --filecheck
 module @gemm attributes {gpu.container_module} {
   func.func @test(%A: memref<4096x4096xf16>, %B: memref<4096x4096xf16>, %C: memref<4096x4096xf16>) -> memref<4096x4096xf16> attributes {llvm.emit_c_interface} {
     %c1 = arith.constant 1 : index
diff --git a/test/Integration/Dialect/XeGPU/SIMT/lit.local.cfg b/test/Integration/Dialect/XeGPU/SIMT/lit.local.cfg
@@ -1,2 +1,2 @@
-if(not config.mlir_enable_sycl_runtime):
+if(not config.mlir_enable_levelzero_runtime):
   config.unsupported = True
diff --git a/test/Integration/Dialect/XeGPU/SIMT/loadstore_nd.mlir b/test/Integration/Dialect/XeGPU/SIMT/loadstore_nd.mlir
@@ -1,7 +1,7 @@
-// RUN: %python_executable %imex_runner --requires=mlir-sycl-runtime,spirv-backend -i %s --pass-pipeline-file=%p/xegpu-to-llvm.pp \
+// RUN: %python_executable %imex_runner --requires=mlir-levelzero-runtime,spirv-backend -i %s --pass-pipeline-file=%p/xegpu-to-llvm.pp \
 // RUN:                                       --runner mlir-runner -e main \
 // RUN:                                       --entry-point-result=void \
-// RUN:                                       --shared-libs=%irunner_utils,%mlir_runner_utils,%mlir_c_runner_utils,%mlir_sycl_runtime --filecheck
+// RUN:                                       --shared-libs=%irunner_utils,%mlir_runner_utils,%mlir_c_runner_utils,%mlir_levelzero_runtime --filecheck
 
 module @gemm attributes {gpu.container_module} {
   gpu.module @kernel {
diff --git a/test/Integration/Dialect/XeGPU/SIMT/loadstore_nd_dpas.mlir b/test/Integration/Dialect/XeGPU/SIMT/loadstore_nd_dpas.mlir
@@ -1,7 +1,7 @@
-// RUN: %python_executable %imex_runner --requires=mlir-sycl-runtime,spirv-backend -i %s --pass-pipeline-file=%p/xegpu-to-llvm.pp \
+// RUN: %python_executable %imex_runner --requires=mlir-levelzero-runtime,spirv-backend -i %s --pass-pipeline-file=%p/xegpu-to-llvm.pp \
 // RUN:                                       --runner mlir-runner -e main \
 // RUN:                                       --entry-point-result=void \
-// RUN:                                       --shared-libs=%irunner_utils,%mlir_runner_utils,%mlir_c_runner_utils,%mlir_sycl_runtime --filecheck
+// RUN:                                       --shared-libs=%irunner_utils,%mlir_runner_utils,%mlir_c_runner_utils,%mlir_levelzero_runtime --filecheck
 
 #sg_map_a_f16 = #xegpu.layout<lane_layout = [1, 16], lane_data = [1, 1]>
 #sg_map_b_f16 = #xegpu.layout<lane_layout = [1, 16], lane_data = [2, 1]>
diff --git a/test/Integration/Dialect/XeGPU/SIMT/loadstore_nd_prefetch.mlir b/test/Integration/Dialect/XeGPU/SIMT/loadstore_nd_prefetch.mlir
@@ -1,7 +1,7 @@
-// RUN: %python_executable %imex_runner --requires=mlir-sycl-runtime,spirv-backend -i %s --pass-pipeline-file=%p/xegpu-to-llvm.pp \
+// RUN: %python_executable %imex_runner --requires=mlir-levelzero-runtime,spirv-backend -i %s --pass-pipeline-file=%p/xegpu-to-llvm.pp \
 // RUN:                                       --runner mlir-runner -e main \
 // RUN:                                       --entry-point-result=void \
-// RUN:                                       --shared-libs=%irunner_utils,%mlir_runner_utils,%mlir_c_runner_utils,%mlir_sycl_runtime --filecheck
+// RUN:                                       --shared-libs=%irunner_utils,%mlir_runner_utils,%mlir_c_runner_utils,%mlir_levelzero_runtime --filecheck
 
 module @gemm attributes {gpu.container_module} {
   gpu.module @kernel {
diff --git a/test/Integration/Dialect/XeGPU/SIMT/loadstore_nd_update_offset.mlir b/test/Integration/Dialect/XeGPU/SIMT/loadstore_nd_update_offset.mlir
@@ -1,7 +1,7 @@
-// RUN: %python_executable %imex_runner --requires=mlir-sycl-runtime,spirv-backend -i %s --pass-pipeline-file=%p/xegpu-to-llvm.pp \
+// RUN: %python_executable %imex_runner --requires=mlir-levelzero-runtime,spirv-backend -i %s --pass-pipeline-file=%p/xegpu-to-llvm.pp \
 // RUN:                                       --runner mlir-runner -e main \
 // RUN:                                       --entry-point-result=void \
-// RUN:                                       --shared-libs=%irunner_utils,%mlir_runner_utils,%mlir_c_runner_utils,%mlir_sycl_runtime --filecheck
+// RUN:                                       --shared-libs=%irunner_utils,%mlir_runner_utils,%mlir_c_runner_utils,%mlir_levelzero_runtime --filecheck
 
 module @gemm attributes {gpu.container_module} {
   gpu.module @kernel {
diff --git a/test/Integration/Dialect/XeGPU/SIMT/loadstore_scatter_chunk_size_1.mlir b/test/Integration/Dialect/XeGPU/SIMT/loadstore_scatter_chunk_size_1.mlir
@@ -1,7 +1,7 @@
-// RUN: %python_executable %imex_runner --requires=mlir-sycl-runtime,spirv-backend -i %s --pass-pipeline-file=%p/xegpu-to-llvm.pp \
+// RUN: %python_executable %imex_runner --requires=mlir-levelzero-runtime,spirv-backend -i %s --pass-pipeline-file=%p/xegpu-to-llvm.pp \
 // RUN:                                       --runner mlir-runner -e main \
 // RUN:                                       --entry-point-result=void \
-// RUN:                                       --shared-libs=%irunner_utils,%mlir_runner_utils,%mlir_c_runner_utils,%mlir_sycl_runtime --filecheck
+// RUN:                                       --shared-libs=%irunner_utils,%mlir_runner_utils,%mlir_c_runner_utils,%mlir_levelzero_runtime --filecheck
 
 module @gemm attributes {gpu.container_module} {
   gpu.module @kernel {
diff --git a/test/Integration/Dialect/XeGPU/SIMT/loadstore_scatter_chunk_size_1_non_contig_offsets.mlir b/test/Integration/Dialect/XeGPU/SIMT/loadstore_scatter_chunk_size_1_non_contig_offsets.mlir
@@ -1,7 +1,7 @@
-// RUN: %python_executable %imex_runner --requires=mlir-sycl-runtime,spirv-backend -i %s --pass-pipeline-file=%p/xegpu-to-llvm.pp \
+// RUN: %python_executable %imex_runner --requires=mlir-levelzero-runtime,spirv-backend -i %s --pass-pipeline-file=%p/xegpu-to-llvm.pp \
 // RUN:                                       --runner mlir-runner -e main \
 // RUN:                                       --entry-point-result=void \
-// RUN:                                       --shared-libs=%irunner_utils,%mlir_runner_utils,%mlir_c_runner_utils,%mlir_sycl_runtime --filecheck
+// RUN:                                       --shared-libs=%irunner_utils,%mlir_runner_utils,%mlir_c_runner_utils,%mlir_levelzero_runtime --filecheck
 
 module @gemm attributes {gpu.container_module} {
   gpu.module @kernel {
diff --git a/test/Integration/Dialect/XeGPU/SIMT/loadstore_scatter_chunk_size_1_update_offset.mlir b/test/Integration/Dialect/XeGPU/SIMT/loadstore_scatter_chunk_size_1_update_offset.mlir
@@ -1,7 +1,7 @@
-// RUN: %python_executable %imex_runner --requires=mlir-sycl-runtime,spirv-backend -i %s --pass-pipeline-file=%p/xegpu-to-llvm.pp \
+// RUN: %python_executable %imex_runner --requires=mlir-levelzero-runtime,spirv-backend -i %s --pass-pipeline-file=%p/xegpu-to-llvm.pp \
 // RUN:                                       --runner mlir-runner -e main \
 // RUN:                                       --entry-point-result=void \
-// RUN:                                       --shared-libs=%irunner_utils,%mlir_runner_utils,%mlir_c_runner_utils,%mlir_sycl_runtime --filecheck
+// RUN:                                       --shared-libs=%irunner_utils,%mlir_runner_utils,%mlir_c_runner_utils,%mlir_levelzero_runtime --filecheck
 
 module @gemm attributes {gpu.container_module} {
   gpu.module @kernel {
diff --git a/test/Integration/Dialect/XeGPU/SIMT/loadstore_scatter_chunk_size_2.mlir b/test/Integration/Dialect/XeGPU/SIMT/loadstore_scatter_chunk_size_2.mlir
@@ -1,7 +1,7 @@
-// RUN: %python_executable %imex_runner --requires=mlir-sycl-runtime,spirv-backend -i %s --pass-pipeline-file=%p/xegpu-to-llvm.pp \
+// RUN: %python_executable %imex_runner --requires=mlir-levelzero-runtime,spirv-backend -i %s --pass-pipeline-file=%p/xegpu-to-llvm.pp \
 // RUN:                                       --runner mlir-runner -e main \
 // RUN:                                       --entry-point-result=void \
-// RUN:                                       --shared-libs=%irunner_utils,%mlir_runner_utils,%mlir_c_runner_utils,%mlir_sycl_runtime --filecheck
+// RUN:                                       --shared-libs=%irunner_utils,%mlir_runner_utils,%mlir_c_runner_utils,%mlir_levelzero_runtime --filecheck
 module @gemm attributes {gpu.container_module} {
   gpu.module @kernel {
     gpu.func @load_store_2d(%src: memref<128xf32, 1>, %dst: memref<128xf32, 1>) kernel {
diff --git a/test/Integration/Dialect/XeGPU/SIMT/row_reduce_16x16xf16.mlir b/test/Integration/Dialect/XeGPU/SIMT/row_reduce_16x16xf16.mlir
@@ -1,7 +1,7 @@
-// RUN: %python_executable %imex_runner --requires=mlir-sycl-runtime,spirv-backend -i %s --pass-pipeline-file=%p/xegpu-to-llvm.pp \
+// RUN: %python_executable %imex_runner --requires=mlir-levelzero-runtime,spirv-backend -i %s --pass-pipeline-file=%p/xegpu-to-llvm.pp \
 // RUN:                                       --runner mlir-runner -e main \
 // RUN:                                       --entry-point-result=void \
-// RUN:                                       --shared-libs=%irunner_utils,%mlir_runner_utils,%mlir_c_runner_utils,%mlir_sycl_runtime --filecheck
+// RUN:                                       --shared-libs=%irunner_utils,%mlir_runner_utils,%mlir_c_runner_utils,%mlir_levelzero_runtime --filecheck
 module @gemm attributes {gpu.container_module} {
   gpu.module @kernel {
     gpu.func @row_reduce(%in: memref<16x16xf16>, %c: memref<16x16xf16>) kernel attributes {intel_reqd_sub_group_size = 16 : i32} {
diff --git a/test/Integration/Dialect/XeGPU/SIMT/simple_gemm.mlir b/test/Integration/Dialect/XeGPU/SIMT/simple_gemm.mlir
@@ -1,7 +1,7 @@
-// RUN: %python_executable %imex_runner --requires=mlir-sycl-runtime,spirv-backend -i %s --pass-pipeline-file=%p/xegpu-to-llvm.pp \
+// RUN: %python_executable %imex_runner --requires=mlir-levelzero-runtime,spirv-backend -i %s --pass-pipeline-file=%p/xegpu-to-llvm.pp \
 // RUN:                                       --runner mlir-runner -e main \
 // RUN:                                       --entry-point-result=void \
-// RUN:                                       --shared-libs=%irunner_utils,%mlir_runner_utils,%mlir_c_runner_utils,%mlir_sycl_runtime --filecheck
+// RUN:                                       --shared-libs=%irunner_utils,%mlir_runner_utils,%mlir_c_runner_utils,%mlir_levelzero_runtime --filecheck
 
 
 module @gemm attributes {gpu.container_module} {
diff --git a/test/Integration/Dialect/XeGPU/WG/gemm_4kx4kx4k_f16_f16_f32.mlir b/test/Integration/Dialect/XeGPU/WG/gemm_4kx4kx4k_f16_f16_f32.mlir
@@ -1,7 +1,7 @@
-// RUN: %python_executable %imex_runner --requires=mlir-sycl-runtime,spirv-backend -i %s --pass-pipeline-file=%p/xegpu-to-llvm.pp \
+// RUN: %python_executable %imex_runner --requires=mlir-levelzero-runtime,spirv-backend -i %s --pass-pipeline-file=%p/xegpu-to-llvm.pp \
 // RUN:                                       --runner mlir-runner -e main \
 // RUN:                                       --entry-point-result=void \
-// RUN:                                       --shared-libs=%irunner_utils,%mlir_runner_utils,%mlir_c_runner_utils,%mlir_sycl_runtime --filecheck
+// RUN:                                       --shared-libs=%irunner_utils,%mlir_runner_utils,%mlir_c_runner_utils,%mlir_levelzero_runtime --filecheck
 #a = #xegpu.layout<sg_layout = [8, 4], sg_data = [32, 32], inst_data = [8, 16]>
 #b = #xegpu.layout<sg_layout = [8, 4], sg_data = [32, 64], inst_data = [16, 16]>
 #c = #xegpu.layout<sg_layout = [8, 4], sg_data = [32, 64], inst_data = [8, 16]>
diff --git a/test/Integration/Dialect/XeGPU/WG/lit.local.cfg b/test/Integration/Dialect/XeGPU/WG/lit.local.cfg
@@ -1,2 +1,2 @@
-if(not config.mlir_enable_sycl_runtime):
+if(not config.mlir_enable_levelzero_runtime):
   config.unsupported = True
diff --git a/test/Integration/Dialect/XeVM/lit.local.cfg b/test/Integration/Dialect/XeVM/lit.local.cfg
@@ -1,2 +1,2 @@
-if(not config.mlir_enable_sycl_runtime):
+if(not config.mlir_enable_levelzero_runtime):
   config.unsupported = True
diff --git a/test/lit.cfg.py b/test/lit.cfg.py
@@ -41,6 +41,8 @@
 config.substitutions.append(('%python_executable', config.python_executable))
 if config.mlir_enable_sycl_runtime:
     config.substitutions.append(('%mlir_sycl_runtime', config.mlir_sycl_runtime))
+if config.mlir_enable_levelzero_runtime:
+    config.substitutions.append(('%mlir_levelzero_runtime', config.mlir_levelzero_runtime))
 if config.imex_enable_sycl_runtime:
     config.substitutions.append(('%sycl_runtime', config.sycl_runtime))
 if config.imex_enable_l0_runtime:
diff --git a/test/lit.site.cfg.py.in b/test/lit.site.cfg.py.in
@@ -44,6 +44,7 @@ config.imex_enable_pvc_target = @IMEX_ENABLE_PVC_TARGET@
 config.imex_enable_bmg_target = @IMEX_ENABLE_BMG_TARGET@
 config.imex_enable_bindings_python = @IMEX_ENABLE_BINDINGS_PYTHON@
 config.mlir_enable_sycl_runtime = @MLIR_ENABLE_SYCL_RUNNER@
+config.mlir_enable_levelzero_runtime = @MLIR_ENABLE_LEVELZERO_RUNNER@
 
 if sys.platform.startswith('win32'):
     config.shlib_prefix = ""
@@ -58,6 +59,8 @@ if config.imex_enable_sycl_runtime:
     config.sycl_runtime = os.path.normpath(os.path.join(config.imex_lib_dir, config.shlib_prefix + "sycl-runtime" + config.llvm_shlib_ext))
 if config.mlir_enable_sycl_runtime:
     config.mlir_sycl_runtime = os.path.normpath(os.path.join(config.mlir_runner_utils_dir, config.shlib_prefix + "mlir_sycl_runtime" + config.llvm_shlib_ext))
+if config.mlir_enable_levelzero_runtime:
+    config.mlir_levelzero_runtime = os.path.normpath(os.path.join(config.mlir_runner_utils_dir, config.shlib_prefix + "mlir_levelzero_runtime" + config.llvm_shlib_ext))
 if config.imex_enable_l0_runtime:
     config.levelzero_runtime = os.path.normpath(os.path.join(config.imex_lib_dir, config.shlib_prefix + "level-zero-runtime" + config.llvm_shlib_ext))
 config.imex_enable_igpu = config.imex_enable_l0_runtime or config.imex_enable_sycl_runtime
diff --git a/tools/imex-runner/imex-runner.py.in b/tools/imex-runner/imex-runner.py.in
@@ -55,10 +55,12 @@ imex_enable_l0_runtime = @IMEX_ENABLE_L0_RUNTIME@
 imex_enable_sycl_runtime = @IMEX_ENABLE_SYCL_RUNTIME@
 imex_enable_spirv_backend = @IMEX_SPIRV_BACKEND_ENABLED@
 mlir_enable_sycl_runtime = @MLIR_ENABLE_SYCL_RUNNER@
+mlir_enable_levelzero_runtime = @MLIR_ENABLE_LEVELZERO_RUNNER@
+
 
 runner_choices = ['mlir-runner']
 enabled_features = []
-all_features = ['vulkan-runner', 'l0-runtime', 'sycl-runtime', 'igpu-fp64', 'spirv-backend', 'mlir-sycl-runtime']
+all_features = ['vulkan-runner', 'l0-runtime', 'sycl-runtime', 'igpu-fp64', 'spirv-backend', 'mlir-sycl-runtime', 'mlir-levelzero-runtime']
 if imex_enable_vulkan_runner:
     runner_choices.append('mlir-vulkan-runner')
     enabled_features.append('vulkan-runner')
@@ -70,6 +72,8 @@ if imex_enable_spirv_backend:
     enabled_features.append('spirv-backend')
 if mlir_enable_sycl_runtime:
     enabled_features.append('mlir-sycl-runtime')
+if mlir_enable_levelzero_runtime:
+    enabled_features.append('mlir-levelzero-runtime')
 
 class SplitArgs(argparse.Action):
     def __call__(self, parser, namespace, values, option_string=None):

Original file line number	Diff line number	Diff line change
`@@ -1,2 +1,2 @@`
`1`		`-if(not config.mlir_enable_sycl_runtime):`
	`1`	`+if(not config.mlir_enable_levelzero_runtime):`
`2`	`2`	`config.unsupported = True`