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Add Initial set of FLOAT32 SPIR-V test cases.
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‎test/SPIRV/OpTest.Argmax_FLOAT32.mlir

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‎test/SPIRV/OpTest.BroadcastNonNumpy_FLOAT32.mlir

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// RUN: %python_executable %imex_runner --requires=l0-runtime -i %s --pass-pipeline-file=%p/spirv-to-llvm.pp \
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// RUN: --runner imex-cpu-runner -e main \
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// RUN: --entry-point-result=void \
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// RUN: --shared-libs=%irunner_utils,%mlir_runner_utils,%mlir_c_runner_utils,%levelzero_runtime --filecheck
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// RUN: %python_executable %imex_runner --requires=sycl-runtime -i %s --pass-pipeline-file=%p/spirv-to-llvm.pp \
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// RUN: --runner imex-cpu-runner -e main \
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// RUN: --entry-point-result=void \
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// RUN: --shared-libs=%irunner_utils,%mlir_runner_utils,%mlir_c_runner_utils,%sycl_runtime --filecheck
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module @broadcast_non_numpy attributes {gpu.container_module} {
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memref.global "private" constant @__constant_3xf32 : memref<3xf32> = dense<[1.000000e+00, 2.000000e+00, 3.000000e+00]>
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memref.global "private" constant @__constant_3x4xf32_ref_result : memref<3x4xf32> = dense<[[1.0, 1.0, 1.0, 1.0], [2.0, 2.0, 2.0, 2.0], [3.0, 3.0, 3.0, 3.0]]>
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func.func @test(%arg0: memref<3xf32>) -> memref<3x4xf32> attributes {llvm.emit_c_interface} {
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%c4 = arith.constant 4 : index
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%c3 = arith.constant 3 : index
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%cst = arith.constant 0.000000e+00 : f32
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%c1 = arith.constant 1 : index
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%memref = gpu.alloc host_shared () : memref<3xf32>
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memref.copy %arg0, %memref : memref<3xf32> to memref<3xf32>
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%memref_0 = gpu.alloc () : memref<3x4xf32>
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gpu.launch_func @test_kernel::@test_kernel blocks in (%c3, %c4, %c1) threads in (%c1, %c1, %c1) args(%cst : f32, %memref_0 : memref<3x4xf32>)
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%memref_1 = gpu.alloc host_shared () : memref<3x4xf32>
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gpu.launch_func @test_kernel_0::@test_kernel blocks in (%c3, %c4, %c1) threads in (%c1, %c1, %c1) args(%memref : memref<3xf32>, %memref_1 : memref<3x4xf32>)
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gpu.dealloc %memref_0 : memref<3x4xf32>
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gpu.dealloc %memref : memref<3xf32>
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return %memref_1 : memref<3x4xf32>
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}
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spirv.module @__spv__test_kernel Physical64 OpenCL requires #spirv.vce<v1.0, [Int64, Kernel, Addresses], []> attributes {spirv.target_env = #spirv.target_env<#spirv.vce<v1.0, [Addresses, Float16Buffer, Int64, Int16, Int8, Kernel, Linkage, Vector16, GenericPointer, Groups, Float16, Float64, AtomicFloat32AddEXT, ExpectAssumeKHR], [SPV_EXT_shader_atomic_float_add, SPV_KHR_expect_assume]>, api=OpenCL, #spirv.resource_limits<>>} {
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spirv.GlobalVariable @__builtin_var_WorkgroupId__ built_in("WorkgroupId") : !spirv.ptr<vector<3xi64>, Input>
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spirv.func @test_kernel(%arg0: f32, %arg1: !spirv.ptr<!spirv.array<12 x f32>, CrossWorkgroup>) "None" attributes {gpu.known_block_size = array<i32: 1, 1, 1>, gpu.known_grid_size = array<i32: 3, 4, 1>, workgroup_attributions = 0 : i64} {
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%__builtin_var_WorkgroupId___addr = spirv.mlir.addressof @__builtin_var_WorkgroupId__ : !spirv.ptr<vector<3xi64>, Input>
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%0 = spirv.Load "Input" %__builtin_var_WorkgroupId___addr : vector<3xi64>
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%1 = spirv.CompositeExtract %0[0 : i32] : vector<3xi64>
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%__builtin_var_WorkgroupId___addr_0 = spirv.mlir.addressof @__builtin_var_WorkgroupId__ : !spirv.ptr<vector<3xi64>, Input>
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%2 = spirv.Load "Input" %__builtin_var_WorkgroupId___addr_0 : vector<3xi64>
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%3 = spirv.CompositeExtract %2[1 : i32] : vector<3xi64>
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%cst0_i64 = spirv.Constant 0 : i64
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%cst4_i64 = spirv.Constant 4 : i64
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%4 = spirv.IMul %cst4_i64, %1 : i64
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%5 = spirv.IAdd %cst0_i64, %4 : i64
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%cst1_i64 = spirv.Constant 1 : i64
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%6 = spirv.IMul %cst1_i64, %3 : i64
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%7 = spirv.IAdd %5, %6 : i64
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%8 = spirv.AccessChain %arg1[%7] : !spirv.ptr<!spirv.array<12 x f32>, CrossWorkgroup>, i64
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spirv.Store "CrossWorkgroup" %8, %arg0 : f32
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spirv.Return
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}
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spirv.EntryPoint "Kernel" @test_kernel, @__builtin_var_WorkgroupId__
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}
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gpu.module @test_kernel attributes {spirv.target_env = #spirv.target_env<#spirv.vce<v1.0, [Addresses, Float16Buffer, Int64, Int16, Int8, Kernel, Linkage, Vector16, GenericPointer, Groups, Float16, Float64, AtomicFloat32AddEXT, ExpectAssumeKHR], [SPV_EXT_shader_atomic_float_add, SPV_KHR_expect_assume]>, api=OpenCL, #spirv.resource_limits<>>} {
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gpu.func @test_kernel(%arg0: f32, %arg1: memref<3x4xf32>) kernel attributes {gpu.known_block_size = array<i32: 1, 1, 1>, gpu.known_grid_size = array<i32: 3, 4, 1>, spirv.entry_point_abi = #spirv.entry_point_abi<>} {
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%0 = gpu.block_id x
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%1 = gpu.block_id y
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memref.store %arg0, %arg1[%0, %1] : memref<3x4xf32>
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gpu.return
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}
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}
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spirv.module @__spv__test_kernel_0 Physical64 OpenCL requires #spirv.vce<v1.0, [Int64, Kernel, Addresses], []> attributes {spirv.target_env = #spirv.target_env<#spirv.vce<v1.0, [Addresses, Float16Buffer, Int64, Int16, Int8, Kernel, Linkage, Vector16, GenericPointer, Groups, Float16, Float64, AtomicFloat32AddEXT, ExpectAssumeKHR], [SPV_EXT_shader_atomic_float_add, SPV_KHR_expect_assume]>, api=OpenCL, #spirv.resource_limits<>>} {
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spirv.GlobalVariable @__builtin_var_WorkgroupId__ built_in("WorkgroupId") : !spirv.ptr<vector<3xi64>, Input>
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spirv.func @test_kernel(%arg0: !spirv.ptr<!spirv.array<3 x f32>, CrossWorkgroup>, %arg1: !spirv.ptr<!spirv.array<12 x f32>, CrossWorkgroup>) "None" attributes {gpu.known_block_size = array<i32: 1, 1, 1>, gpu.known_grid_size = array<i32: 3, 4, 1>, workgroup_attributions = 0 : i64} {
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%__builtin_var_WorkgroupId___addr = spirv.mlir.addressof @__builtin_var_WorkgroupId__ : !spirv.ptr<vector<3xi64>, Input>
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%0 = spirv.Load "Input" %__builtin_var_WorkgroupId___addr : vector<3xi64>
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%1 = spirv.CompositeExtract %0[0 : i32] : vector<3xi64>
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%__builtin_var_WorkgroupId___addr_0 = spirv.mlir.addressof @__builtin_var_WorkgroupId__ : !spirv.ptr<vector<3xi64>, Input>
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%2 = spirv.Load "Input" %__builtin_var_WorkgroupId___addr_0 : vector<3xi64>
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%3 = spirv.CompositeExtract %2[1 : i32] : vector<3xi64>
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%cst0_i64 = spirv.Constant 0 : i64
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%cst1_i64 = spirv.Constant 1 : i64
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%4 = spirv.IMul %cst1_i64, %1 : i64
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%5 = spirv.IAdd %cst0_i64, %4 : i64
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%6 = spirv.AccessChain %arg0[%5] : !spirv.ptr<!spirv.array<3 x f32>, CrossWorkgroup>, i64
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%7 = spirv.Load "CrossWorkgroup" %6 : f32
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%cst0_i64_1 = spirv.Constant 0 : i64
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%cst4_i64 = spirv.Constant 4 : i64
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%8 = spirv.IMul %cst4_i64, %1 : i64
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%9 = spirv.IAdd %cst0_i64_1, %8 : i64
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%cst1_i64_2 = spirv.Constant 1 : i64
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%10 = spirv.IMul %cst1_i64_2, %3 : i64
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%11 = spirv.IAdd %9, %10 : i64
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%12 = spirv.AccessChain %arg1[%11] : !spirv.ptr<!spirv.array<12 x f32>, CrossWorkgroup>, i64
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spirv.Store "CrossWorkgroup" %12, %7 : f32
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spirv.Return
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}
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spirv.EntryPoint "Kernel" @test_kernel, @__builtin_var_WorkgroupId__
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}
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gpu.module @test_kernel_0 attributes {spirv.target_env = #spirv.target_env<#spirv.vce<v1.0, [Addresses, Float16Buffer, Int64, Int16, Int8, Kernel, Linkage, Vector16, GenericPointer, Groups, Float16, Float64, AtomicFloat32AddEXT, ExpectAssumeKHR], [SPV_EXT_shader_atomic_float_add, SPV_KHR_expect_assume]>, api=OpenCL, #spirv.resource_limits<>>} {
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gpu.func @test_kernel(%arg0: memref<3xf32>, %arg1: memref<3x4xf32>) kernel attributes {gpu.known_block_size = array<i32: 1, 1, 1>, gpu.known_grid_size = array<i32: 3, 4, 1>, spirv.entry_point_abi = #spirv.entry_point_abi<>} {
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%0 = gpu.block_id x
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%1 = gpu.block_id y
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%2 = memref.load %arg0[%0] : memref<3xf32>
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memref.store %2, %arg1[%0, %1] : memref<3x4xf32>
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gpu.return
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}
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}
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func.func @main() attributes {llvm.emit_c_interface} {
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%c0 = arith.constant 0 : index
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%c1 = arith.constant 1 : index
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%c100 = arith.constant 100 : index
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%0 = memref.get_global @__constant_3xf32 : memref<3xf32>
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%ref_result = memref.get_global @__constant_3x4xf32_ref_result : memref<3x4xf32>
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%unranked_ref_result = memref.cast %ref_result : memref<3x4xf32> to memref<*xf32>
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scf.for %arg0 = %c0 to %c100 step %c1 {
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%1 = func.call @test(%0) : (memref<3xf32>) -> memref<3x4xf32>
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%cast = memref.cast %1 : memref<3x4xf32> to memref<*xf32>
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func.call @printAllcloseF32(%cast, %unranked_ref_result) : (memref<*xf32>, memref<*xf32>) -> ()
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func.call @printMemrefF32(%cast) : (memref<*xf32>) -> ()
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// CHECK: [ALLCLOSE: TRUE]
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}
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return
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}
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func.func private @printAllcloseF32(memref<*xf32>, memref<*xf32>) attributes {llvm.emit_c_interface}
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func.func private @printMemrefF32(memref<*xf32>) attributes {llvm.emit_c_interface}
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}

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