pcm-pcie: allow core offlining on select processor generations

Author: rdementi

src/cpucounters.cpp

@@ -10283,6 +10283,7 @@ uint32 PCM::getMaxNumOfCBoxesInternal() const
         break;
     case SNOWRIDGE:
         num = (uint32)num_phys_cores_per_socket / 4;
+        maxNumOfCBoxesBasedOnCoreCount = true;
         break;
     default:
         /*
@@ -10291,6 +10292,7 @@ uint32 PCM::getMaxNumOfCBoxesInternal() const
          *  value to be returned.
          */
         num = (uint32)num_phys_cores_per_socket;
+        maxNumOfCBoxesBasedOnCoreCount = true;
     }
 #ifdef PCM_USE_PERF
     if (num <= 0)

src/cpucounters.h

@@ -624,6 +624,7 @@ class PCM_API PCM
     int32 num_phys_cores_per_socket;
     int32 num_online_cores;
     int32 num_online_sockets;
+    mutable bool maxNumOfCBoxesBasedOnCoreCount{false};
     uint32 accel;
     uint32 accel_counters_num_max;
     uint32 core_gen_counter_num_max;
@@ -1886,6 +1887,12 @@ class PCM_API PCM
      */
     bool isSomeCoreOfflined();
 
+    //! \brief Returns true if the CBox or CHA PMU count detection relies on physical core count
+    bool isMaxNumOfCBoxesBasedOnCoreCount() const
+    {
+        return maxNumOfCBoxesBasedOnCoreCount;
+    }
+
     /*! \brief Returns the maximum number of custom (general-purpose) core events supported by CPU
     */
     int32 getMaxCustomCoreEvents();

src/pcm-pcie.h

@@ -70,9 +70,19 @@ void IPlatform::init()
 {
     print_cpu_details();
 
-    if (m_pcm->isSomeCoreOfflined())
+    if (m_pcm->isMaxNumOfCBoxesBasedOnCoreCount() &&  m_pcm->isSomeCoreOfflined())
     {
-        cerr << "Core offlining is not supported. Program aborted\n";
+        /*
+            The bandwwidth metrics can be calculated correctly only if we aggregate
+            the event counts from all CHAs (CBoxes) in the socket. For this need to
+            know the number of CBoxes in the socket. For some processors we do not
+            have access to a register containing the CHA count but on those processors
+            the number of CBoxes is equal to the number of cores. On such systems if
+            the cores are offlined then the number of CBoxes can't be determined.
+            pcm-pcie does not support such systems because the bandwidth can't be
+            computed correctly.
+        */
+        cerr << "Core offlining is not supported on your processor. Program aborted\n";
         exit(EXIT_FAILURE);
     }
 }