refactoring

Change-Id: Ifa648f16f089446e33b30b390326b33fdcce74b8

Author: rdementi

src/types.h

@@ -78,42 +78,41 @@ constexpr auto MSR_LOAD_LATENCY = 0x3F6;
 constexpr auto MSR_FRONTEND = 0x3F7;
 
 /* From Table B-5. of the above mentioned document */
-#define PLATFORM_INFO_ADDR              (0xCE)
+constexpr auto PLATFORM_INFO_ADDR = 0xCE;
 
-#define IA32_TIME_STAMP_COUNTER         (0x10)
+constexpr auto IA32_TIME_STAMP_COUNTER = 0x10;
 
 // Event IDs
 
 // Nehalem/Westmere on-core events
-#define MEM_LOAD_RETIRED_L3_MISS_EVTNR  (0xCB)
-#define MEM_LOAD_RETIRED_L3_MISS_UMASK  (0x10)
+constexpr auto MEM_LOAD_RETIRED_L3_MISS_EVTNR = 0xCB;
+constexpr auto MEM_LOAD_RETIRED_L3_MISS_UMASK = 0x10;
 
-#define MEM_LOAD_RETIRED_L3_UNSHAREDHIT_EVTNR   (0xCB)
-#define MEM_LOAD_RETIRED_L3_UNSHAREDHIT_UMASK   (0x04)
+constexpr auto MEM_LOAD_RETIRED_L3_UNSHAREDHIT_EVTNR = 0xCB;
+constexpr auto MEM_LOAD_RETIRED_L3_UNSHAREDHIT_UMASK = 0x04;
 
-#define MEM_LOAD_RETIRED_L2_HITM_EVTNR  (0xCB)
-#define MEM_LOAD_RETIRED_L2_HITM_UMASK  (0x08)
+constexpr auto MEM_LOAD_RETIRED_L2_HITM_EVTNR = 0xCB;
+constexpr auto MEM_LOAD_RETIRED_L2_HITM_UMASK = 0x08;
 
-#define MEM_LOAD_RETIRED_L2_HIT_EVTNR   (0xCB)
-#define MEM_LOAD_RETIRED_L2_HIT_UMASK   (0x02)
+constexpr auto MEM_LOAD_RETIRED_L2_HIT_EVTNR = 0xCB;
+constexpr auto MEM_LOAD_RETIRED_L2_HIT_UMASK = 0x02;
 
 // Sandy Bridge on-core events
 
-#define MEM_LOAD_UOPS_MISC_RETIRED_LLC_MISS_EVTNR (0xD4)
-#define MEM_LOAD_UOPS_MISC_RETIRED_LLC_MISS_UMASK (0x02)
+constexpr auto MEM_LOAD_UOPS_MISC_RETIRED_LLC_MISS_EVTNR = 0xD4;
+constexpr auto MEM_LOAD_UOPS_MISC_RETIRED_LLC_MISS_UMASK = 0x02;
 
-#define MEM_LOAD_UOPS_LLC_HIT_RETIRED_XSNP_NONE_EVTNR (0xD2)
-#define MEM_LOAD_UOPS_LLC_HIT_RETIRED_XSNP_NONE_UMASK (0x08)
+constexpr auto MEM_LOAD_UOPS_LLC_HIT_RETIRED_XSNP_NONE_EVTNR = 0xD2;
+constexpr auto MEM_LOAD_UOPS_LLC_HIT_RETIRED_XSNP_NONE_UMASK = 0x08;
 
-#define MEM_LOAD_UOPS_LLC_HIT_RETIRED_XSNP_HITM_EVTNR (0xD2)
-#define MEM_LOAD_UOPS_LLC_HIT_RETIRED_XSNP_HITM_UMASK (0x04)
+constexpr auto MEM_LOAD_UOPS_LLC_HIT_RETIRED_XSNP_HITM_EVTNR = 0xD2;
+constexpr auto MEM_LOAD_UOPS_LLC_HIT_RETIRED_XSNP_HITM_UMASK = 0x04;
 
-#define MEM_LOAD_UOPS_LLC_HIT_RETIRED_XSNP_EVTNR (0xD2)
-#define MEM_LOAD_UOPS_LLC_HIT_RETIRED_XSNP_UMASK (0x07)
-
-#define MEM_LOAD_UOPS_RETIRED_L2_HIT_EVTNR (0xD1)
-#define MEM_LOAD_UOPS_RETIRED_L2_HIT_UMASK (0x02)
+constexpr auto MEM_LOAD_UOPS_LLC_HIT_RETIRED_XSNP_EVTNR = 0xD2;
+constexpr auto MEM_LOAD_UOPS_LLC_HIT_RETIRED_XSNP_UMASK = 0x07;
 
+constexpr auto MEM_LOAD_UOPS_RETIRED_L2_HIT_EVTNR = 0xD1;
+constexpr auto MEM_LOAD_UOPS_RETIRED_L2_HIT_UMASK = 0x02;
 // Haswell on-core events
 
 constexpr auto HSX_L2_RQSTS_MISS_EVTNR = 0x24;