Merge pull request #162 from intel-innersource/rdementi/pcm-raw-custom-msr

pcm-raw: support custom MSR_EVENTs

Author: rdementi

src/cpucounters.cpp

@@ -4283,7 +4283,11 @@ void BasicCounterState::readAndAggregateTSC(std::shared_ptr<SafeMsrHandle> msr)
     uint64 cInvariantTSC = 0;
     PCM * m = PCM::getInstance();
     const auto cpu_model = m->getCPUModel();
-    if(m->isAtom() == false || cpu_model == PCM::AVOTON) msr->read(IA32_TIME_STAMP_COUNTER, &cInvariantTSC);
+    if (m->isAtom() == false || cpu_model == PCM::AVOTON)
+    {
+        msr->read(IA32_TIME_STAMP_COUNTER, &cInvariantTSC);
+        MSRValues[IA32_TIME_STAMP_COUNTER] = cInvariantTSC;
+    }
     else
     {
 #ifdef _MSC_VER
@@ -4413,14 +4417,22 @@ void BasicCounterState::readAndAggregate(std::shared_ptr<SafeMsrHandle> msr)
     readAndAggregateTSC(msr);
 
     // reading core C state counters
-    for(int i=0; i <= (int)(PCM::MAX_C_STATE) ;++i)
-        if(m->coreCStateMsr && m->coreCStateMsr[i])
-                msr->read(m->coreCStateMsr[i], &(cCStateResidency[i]));
+    for (int i = 0; i <= (int)(PCM::MAX_C_STATE); ++i)
+    {
+        if (m->coreCStateMsr && m->coreCStateMsr[i])
+        {
+            const auto index = m->coreCStateMsr[i];
+            msr->read(index, &(cCStateResidency[i]));
+            MSRValues[index] = cCStateResidency[i];
+        }
+    }
 
     // reading temperature
     msr->read(MSR_IA32_THERM_STATUS, &thermStatus);
+    MSRValues[MSR_IA32_THERM_STATUS] = thermStatus;
 
     msr->read(MSR_SMI_COUNT, &cSMICount);
+    MSRValues[MSR_SMI_COUNT] = cSMICount;
 
     InstRetiredAny += checked_uint64(m->extractCoreFixedCounterValue(cInstRetiredAny), extract_bits(overflows, 32, 32));
     CpuClkUnhaltedThread += checked_uint64(m->extractCoreFixedCounterValue(cCpuClkUnhaltedThread), extract_bits(overflows, 33, 33));
@@ -4657,6 +4669,8 @@ void PCM::programPCU(uint32* PCUCntConf, const uint64 filter)
 PCM::ErrorCode PCM::program(const RawPMUConfigs& curPMUConfigs_, const bool silent)
 {
     if (MSR.empty())  return PCM::MSRAccessDenied;
+    threadMSRConfig = RawPMUConfig{};
+    packageMSRConfig = RawPMUConfig{};
     RawPMUConfigs curPMUConfigs = curPMUConfigs_;
     constexpr auto globalRegPos = 0;
     if (curPMUConfigs.count("core"))
@@ -4789,6 +4803,14 @@ PCM::ErrorCode PCM::program(const RawPMUConfigs& curPMUConfigs_, const bool sile
         {
             programIIOCounters(events64);
         }
+        else if (type == "package_msr")
+        {
+            packageMSRConfig = pmuConfig.second;
+        }
+        else if (type == "thread_msr")
+        {
+            threadMSRConfig = pmuConfig.second;
+        }
         else
         {
             std::cerr << "ERROR: unrecognized PMU type \"" << type << "\"\n";
@@ -5066,6 +5088,28 @@ void PCM::readAndAggregateEnergyCounters(const uint32 socket, CounterStateType &
         result.DRAMEnergyStatus += dram_energy_status[socket]->read();
 }
 
+template <class CounterStateType>
+void PCM::readMSRs(std::shared_ptr<SafeMsrHandle> msr, const PCM::RawPMUConfig& msrConfig, CounterStateType& result)
+{
+    auto read = [&msr, &result](const RawEventConfig & cfg) {
+        const auto index = cfg.first[MSREventPosition::index];
+        if (result.MSRValues.find(index) == result.MSRValues.end())
+        {
+            uint64 val{ 0 };
+            msr->read(index, &val);
+            result.MSRValues[index] = val;
+        }
+    };
+    for (const auto& cfg : msrConfig.programmable)
+    {
+        read(cfg);
+    }
+    for (const auto& cfg : msrConfig.fixed)
+    {
+        read(cfg);
+    }
+}
+
 template <class CounterStateType>
 void PCM::readAndAggregatePackageCStateResidencies(std::shared_ptr<SafeMsrHandle> msr, CounterStateType & result)
 {
@@ -5202,6 +5246,7 @@ void PCM::readPackageThermalHeadroom(const uint32 socket, CounterStateType & res
     {
         uint64 val = 0;
         MSR[socketRefCore[socket]]->read(MSR_PACKAGE_THERM_STATUS,&val);
+        result.MSRValues[MSR_PACKAGE_THERM_STATUS] = val;
         result.ThermalHeadroom = extractThermalHeadroom(val);
     }
     else
@@ -5257,6 +5302,7 @@ void PCM::getAllCounterStates(SystemCounterState & systemState, std::vector<Sock
                     {
                         socketStates[topology[core].socket].UncoreCounterState::readAndAggregate(MSR[core]); // read package C state counters
                     }
+                    readMSRs(MSR[core], threadMSRConfig, coreStates[core]);
                 }
             );
             asyncCoreResults.push_back(task.get_future());
@@ -5269,11 +5315,12 @@ void PCM::getAllCounterStates(SystemCounterState & systemState, std::vector<Sock
     {
         int32 refCore = socketRefCore[s];
         if (refCore<0) refCore = 0;
-        std::packaged_task<void()> task([this, s, &socketStates]() -> void
+        std::packaged_task<void()> task([this, s, &socketStates, refCore]() -> void
             {
                 readAndAggregateUncoreMCCounters(s, socketStates[s]);
                 readAndAggregateEnergyCounters(s, socketStates[s]);
                 readPackageThermalHeadroom(s, socketStates[s]);
+                readMSRs(MSR[refCore], packageMSRConfig, socketStates[s]);
             } );
         asyncCoreResults.push_back(task.get_future());
         coreTaskQueues[refCore]->push(task);

src/cpucounters.h

@@ -846,6 +846,17 @@ class PCM_API PCM
         int divider[4]; //We usually like to have some kind of divider (i.e. /10e6 )
     };
 
+    enum MSREventPosition
+    {
+        index = 0,
+        type = 1
+    };
+    enum MSRType
+    {
+        Static = 0,
+        Freerun = 1
+    };
+
 private:
     ProgramMode mode;
     CustomCoreEventDescription coreEventDesc[PERF_MAX_CUSTOM_COUNTERS];
@@ -955,6 +966,11 @@ class PCM_API PCM
     void readPackageThermalHeadroom(const uint32 socket, CounterStateType & counterState);
     template <class CounterStateType>
     void readAndAggregatePackageCStateResidencies(std::shared_ptr<SafeMsrHandle> msr, CounterStateType & result);
+public:
+    struct RawPMUConfig;
+private:
+    template <class CounterStateType>
+    void readMSRs(std::shared_ptr<SafeMsrHandle> msr, const RawPMUConfig & msrConfig, CounterStateType & result);
     void readQPICounters(SystemCounterState & counterState);
     void reportQPISpeed() const;
     void readCoreCounterConfig(const bool complainAboutMSR = false);
@@ -1428,6 +1444,7 @@ class PCM_API PCM
         }
         return false;
     }
+    RawPMUConfig threadMSRConfig{}, packageMSRConfig{};
 public:
 
     //! \brief Reads CPU model id
@@ -2265,11 +2282,12 @@ class BasicCounterState
     friend double getBadSpeculation(const CounterStateType & before, const CounterStateType & after);
     template <class CounterStateType>
     friend double getRetiring(const CounterStateType & before, const CounterStateType & after);
-
+    template <class CounterStateType>
+    friend uint64 getMSREvent(const uint64 & index, const PCM::MSRType & type, const CounterStateType& before, const CounterStateType& after);
 protected:
-    checked_uint64 InstRetiredAny;
-    checked_uint64 CpuClkUnhaltedThread;
-    checked_uint64 CpuClkUnhaltedRef;
+    checked_uint64 InstRetiredAny{};
+    checked_uint64 CpuClkUnhaltedThread{};
+    checked_uint64 CpuClkUnhaltedRef{};
     checked_uint64 Event[PERF_MAX_CUSTOM_COUNTERS];
     enum
     {
@@ -2290,6 +2308,7 @@ class BasicCounterState
     uint64 MemoryBWTotal;
     uint64 SMICount;
     uint64 FrontendBoundSlots, BadSpeculationSlots, BackendBoundSlots, RetiringSlots, AllSlotsRaw;
+    std::unordered_map<uint64, uint64> MSRValues;
 
 public:
     BasicCounterState() :
@@ -4056,6 +4075,34 @@ inline double getRetiring(const CounterStateType & before, const CounterStateTyp
     return 0.;
 }
 
+template <class CounterStateType>
+uint64 getMSREvent(const uint64& index, const PCM::MSRType& type, const CounterStateType& before, const CounterStateType& after)
+{
+    switch (type)
+    {
+    case PCM::MSRType::Freerun:
+        {
+            const auto beforeIt = before.MSRValues.find(index);
+            const auto afterIt = after.MSRValues.find(index);
+            if (beforeIt != before.MSRValues.end() && afterIt != after.MSRValues.end())
+            {
+                return afterIt->second - beforeIt->second;
+            }
+            break;
+        }
+    case PCM::MSRType::Static:
+        {
+            const auto result = after.MSRValues.find(index);
+            if (result != after.MSRValues.end())
+            {
+                return result->second;
+            }
+            break;
+        }
+    }
+    return 0ULL;
+}
+
 } // namespace pcm
 
 #endif