Merge remote-tracking branch 'opcm-github/master'

Change-Id: I8fd4198cef7e464bf918e4f8c6d70705e2e137b2

Author: rdementi

.github/workflows/freebsd_build.yml

@@ -25,12 +25,12 @@ jobs:
         submodules: recursive
     - name: build in FreeBSD VM
       id: build
-      uses: cross-platform-actions/action@cdc9ee69ef84a5f2e59c9058335d9c57bcb4ac86 # v0.25.0
+      uses: cross-platform-actions/action@2d97d42e1972a17b045fd709a422f7e55a86230d
       with:
         memory: 2048
         shell: sh
         operating_system: freebsd
-        version: '14.1'
+        version: '14.2'
         run: |
           sudo mkdir -p /usr/local/etc/pkg/repos
           sudo sh -c 'echo "FreeBSD: { url: \"https://pkg.FreeBSD.org/\${ABI}/quarterly\", mirror_type: \"srv\", enabled: yes }" > /usr/local/etc/pkg/repos/FreeBSD.conf'

.github/workflows/freebsd_scan_build.yml

@@ -25,12 +25,12 @@ jobs:
         submodules: recursive
     - name: clang scan build in FreeBSD VM
       id: clang-scan-build
-      uses: cross-platform-actions/action@cdc9ee69ef84a5f2e59c9058335d9c57bcb4ac86 # v0.25.0
+      uses: cross-platform-actions/action@2d97d42e1972a17b045fd709a422f7e55a86230d
       with:
         memory: 2048
         shell: sh
         operating_system: freebsd
-        version: '14.1'
+        version: '14.2'
         run: |
           sudo mkdir -p /usr/local/etc/pkg/repos
           sudo sh -c 'echo "FreeBSD: { url: \"https://pkg.FreeBSD.org/\${ABI}/quarterly\", mirror_type: \"srv\", enabled: yes }" > /usr/local/etc/pkg/repos/FreeBSD.conf'

Dockerfile

@@ -1,4 +1,4 @@
-FROM fedora:41@sha256:3ec60eb34fa1a095c0c34dd37cead9fd38afb62612d43892fcf1d3425c32bc1e AS builder
+FROM fedora:41@sha256:f84a7b765ce09163d11de44452a4b56c1b2f5571b6f640b3b973c6afc4e63212 AS builder
 # Dockerfile for Intel PCM sensor server
 # SPDX-License-Identifier: BSD-3-Clause
 # Copyright (c) 2020-2024 Intel Corporation
@@ -7,7 +7,7 @@ RUN dnf -y install gcc-c++ git findutils make cmake openssl openssl-devel libasa
 COPY . /tmp/pcm
 RUN cd /tmp/pcm && mkdir build && cd build && cmake -DPCM_NO_STATIC_LIBASAN=OFF .. && make -j
 
-FROM fedora:41@sha256:3ec60eb34fa1a095c0c34dd37cead9fd38afb62612d43892fcf1d3425c32bc1e
+FROM fedora:41@sha256:f84a7b765ce09163d11de44452a4b56c1b2f5571b6f640b3b973c6afc4e63212
 COPY --from=builder /tmp/pcm/build/bin/* /usr/local/bin/
 COPY --from=builder /tmp/pcm/build/bin/opCode*.txt /usr/local/share/pcm/
 COPY --from=builder /usr/share/hwdata/pci.ids /usr/share/hwdata/pci.ids

README.md

@@ -42,7 +42,7 @@ PCM provides a number of command-line utilities for real-time monitoring:
 
 - **pcm-latency** : monitor L1 cache miss and DDR/PMM memory latency
 - **pcm-pcie** : monitor PCIe bandwidth per-socket
-- **pcm-iio** : monitor PCIe bandwidth per PCIe device
+- **pcm-iio** : [monitor PCIe bandwidth per PCIe bus/device](doc/PCM_IIO_README.md)
 
 ![pcm-iio output](https://raw.githubusercontent.com/wiki/intel/pcm/pcm-iio.png)
 - **pcm-numa** : monitor local and remote memory accesses

doc/PCM_ACCEL_README.md

@@ -1,12 +1,10 @@
 ## Purpose:
 
-Intel® Xeon® Scalable Processors UNCORE accelerator(start from 4th Gen Intel® Xeon® Scalable Processor (codenamed Sapphire Rapids)) including Intel® In-Memory Analytics Accelerator (Intel® IAA), Intel® Data Streaming Accelerator (Intel® DSA) and Intel® QuickAssist Technology (Intel® QAT), etc are key feature of Intel® Xeon® Scalable Processors that can benefit the Intel architecture platform performance in the data center industry.
+Intel® Xeon® Scalable Processors, starting from the 4th Generation (codenamed Sapphire Rapids), feature accelerators, which include the Intel® In-Memory Analytics Accelerator (Intel® IAA), Intel® Data Streaming Accelerator (Intel® DSA), and Intel® QuickAssist Technology (Intel® QAT), among others. These accelerators are essential components that can enhance the performance of Intel architecture platforms.
 
-The accelerator and related software stack can be a key contributor to data center system performance,  but sometimes it’s NOT easy for customer/user to get/understand the performance data of the accelerator like utilization, throughput, etc since low level hardware event sets is complex to understand without the deep knowledge of the accelerator hardware/software architecture.
+Although these accelerators and their associated software stacks can significantly contribute to data center system performance, customers and users often find it challenging to access and understand performance data such as utilization and throughput. This difficulty arises from the complexity of low-level hardware event sets, which require a deep understanding of the accelerator's hardware and software architecture.
 
-This pcm-accel tool will sample the performance data from accelerator hardware and show it to end user in an easy-to-understanding format.
-
-The goal is to help the user to quickly and accurately see a high-level performance picture or identify issues related to accelerator with or without solid knowledge of it.
+The pcm-accel tool addresses this challenge by sampling performance data from the accelerator hardware and presenting it to end users in an easy-to-understand format. Its goal is to enable users to quickly and accurately gain a high-level overview of performance or identify issues related to the accelerator, regardless of their level of expertise in the underlying technology.
 
 ## Command syntax:
 

doc/PCM_IIO_README.md

@@ -0,0 +1,35 @@
+## Purpose:
+
+PCM-IIO tool monitors PCIe transactions with a breakdown per PCIe bus (IIO stack) and/or PCIe devices.
+
+## Tool UI introduction:
+
+Inbound (PCIe device DMA into system) metrics:
+
+* IB write (inbound write): the number of bytes per second that the PCIe device requested to write to main memory through DMA
+* IB read (inbound read): the number of bytes per second that the PCIe device requested to read from main memory through DMA
+
+Outbound (CPU MMIO to the PCIe device) metrics:
+
+* OB read (outbound write): the number of bytes per second that the CPU requested to write to the PCIe device through MMIO (Memory-mapped I/O)
+* OB write (outbound read): the number of bytes per second that the CPU requested to read from the PCIe device through MMIO
+
+IOMMU metrics:
+
+* IOTLB Lookup: IOTLB lookups per second
+* IOTLB Miss: IOTLB misses per second
+* Ctxt Cache Hit: Context cache hits per second
+* 256T Cache Hit: Second Level Page Walk Cache Hits to a 256T page per second
+* 512G Cache Hit: Second Level Page Walk Cache Hits to a 512G page per second
+* 1G Cache Hit: Second Level Page Walk Cache Hits to a 1G page per second
+* 2M Cache Hit: Second Level Page Walk Cache Hits to a 2M page per second
+* IOMMU Mem Access: IOMMU memory accesses per second
+
+Sample output:
+
+![image](https://github.com/user-attachments/assets/e8cce396-b210-49d5-ac95-dc43f9ae69d3)
+
+## Event config file:
+
+pcm-iio tool allows the user to customize the performance events with a config file as an advanced feature. The event config files are in opCode-x-y.txt files where x/y is cpu family is model id, for example 6/143 for Sapphire Rapids.
+

src/pci.cpp

@@ -481,98 +481,6 @@ int PciHandle::openMcfgTable() {
     return handle;
 }
 
-#ifndef PCM_USE_PCI_MM_LINUX
-
-PciHandleM::PciHandleM(uint32 bus_, uint32 device_, uint32 function_) :
-    fd(-1),
-    bus(bus_),
-    device(device_),
-    function(function_),
-    base_addr(0)
-{
-    int handle = ::open("/dev/mem", O_RDWR);
-    if (handle < 0) throw std::exception();
-    fd = handle;
-
-    int mcfg_handle = PciHandle::openMcfgTable();
-    if (mcfg_handle < 0) throw std::runtime_error("Cannot open any of /[pcm]/sys/firmware/acpi/tables/MCFG* files!");
-
-    int32 result = ::pread(mcfg_handle, (void *)&base_addr, sizeof(uint64), 44);
-
-    if (result != sizeof(uint64))
-    {
-        ::close(mcfg_handle);
-        throw std::exception();
-    }
-
-    unsigned char max_bus = 0;
-
-    result = ::pread(mcfg_handle, (void *)&max_bus, sizeof(unsigned char), 55);
-
-    ::close(mcfg_handle);
-    if (result != sizeof(unsigned char))
-    {
-        throw std::exception();
-    }
-
-    if (bus > (unsigned)max_bus)
-    {
-        std::cout << "WARNING: Requested bus number " << bus << " is larger than the max bus number " << (unsigned)max_bus << "\n";
-        throw std::exception();
-    }
-
-    // std::cout << "PCI config base addr: "<< std::hex << base_addr<< "\n" << std::dec;
-
-    base_addr += (bus * 1024ULL * 1024ULL + device * 32ULL * 1024ULL + function * 4ULL * 1024ULL);
-}
-
-
-bool PciHandleM::exists(uint32 /*groupnr_*/, uint32 /* bus_*/, uint32 /* device_ */, uint32 /* function_ */)
-{
-    int handle = ::open("/dev/mem", O_RDWR);
-
-    if (handle < 0) {
-        perror("error opening /dev/mem");
-        return false;
-    }
-
-    ::close(handle);
-
-    handle = PciHandle::openMcfgTable();
-    if (handle < 0) {
-        return false;
-    }
-
-    ::close(handle);
-
-    return true;
-}
-
-int32 PciHandleM::read32(uint64 offset, uint32 * value)
-{
-    warnAlignment<4>("PciHandleM::read32", false, offset);
-    return ::pread(fd, (void *)value, sizeof(uint32), offset + base_addr);
-}
-
-int32 PciHandleM::write32(uint64 offset, uint32 value)
-{
-    warnAlignment<4>("PciHandleM::write32", false, offset);
-    return ::pwrite(fd, (const void *)&value, sizeof(uint32), offset + base_addr);
-}
-
-int32 PciHandleM::read64(uint64 offset, uint64 * value)
-{
-    warnAlignment<4>("PciHandleM::read64", false, offset);
-    return ::pread(fd, (void *)value, sizeof(uint64), offset + base_addr);
-}
-
-PciHandleM::~PciHandleM()
-{
-    if (fd >= 0) ::close(fd);
-}
-
-#endif // PCM_USE_PCI_MM_LINUX
-
 // mmapped I/O version
 
 MCFGHeader PciHandleMM::mcfgHeader;

src/pci.h

@@ -49,7 +49,6 @@ class PciHandle
     DWORD pciAddress;
 #endif
 
-    friend class PciHandleM;
     friend class PciHandleMM;
 
     PciHandle();                                // forbidden
@@ -79,40 +78,7 @@ typedef PciHandle PciHandleType;
 typedef PciHandle PciHandleType;
 #elif defined(__FreeBSD__) || defined(__DragonFly__)
 typedef PciHandle PciHandleType;
-#else
-
-// read/write PCI config space using physical memory
-class PciHandleM
-{
-#ifdef _MSC_VER
-
-#else
-    int32 fd;
-#endif
-
-    uint32 bus;
-    uint32 device;
-    uint32 function;
-    uint64 base_addr;
-
-    PciHandleM() = delete;             // forbidden
-    PciHandleM(PciHandleM &) = delete; // forbidden
-    PciHandleM & operator = (PciHandleM &) = delete; // forbidden
-
-public:
-    PciHandleM(uint32 bus_, uint32 device_, uint32 function_);
-
-    static bool exists(uint32 groupnr_, uint32 bus_, uint32 device_, uint32 function_);
-
-    int32 read32(uint64 offset, uint32 * value);
-    int32 write32(uint64 offset, uint32 value);
-
-    int32 read64(uint64 offset, uint64 * value);
-
-    virtual ~PciHandleM();
-};
-
-#ifndef _MSC_VER
+#elif defined(__linux__)
 
 // read/write PCI config space using physical memory using mmapped file I/O
 class PciHandleMM
@@ -125,11 +91,9 @@ class PciHandleMM
     uint32 function;
     uint64 base_addr;
 
-#ifdef __linux__
     static MCFGHeader mcfgHeader;
     static std::vector<MCFGRecord> mcfgRecords;
     static void readMCFG();
-#endif
 
     PciHandleMM() = delete;             // forbidden
     PciHandleMM(const PciHandleMM &) = delete; // forbidden
@@ -147,9 +111,7 @@ class PciHandleMM
 
     virtual ~PciHandleMM();
 
-#ifdef __linux__
     static const std::vector<MCFGRecord> & getMCFGRecords();
-#endif
 };
 
 #ifdef PCM_USE_PCI_MM_LINUX
@@ -158,8 +120,8 @@ class PciHandleMM
 #define PciHandleType PciHandle
 #endif
 
-#endif //  _MSC_VER
-
+#else
+#error "Platform not supported"
 #endif
 
 template <class F>