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Improve accuracy of index put deterministic kernel (#1890)
Fix #1751 by following methods: - Align accumulate type selection logic with CUDA in index put deterministic kernel - Adopt radix sort instead of merge sort --------- Co-authored-by: chunhuanMeng <[email protected]>
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3 files changed

+60
-36
lines changed

3 files changed

+60
-36
lines changed

src/ATen/native/xpu/sycl/Indexing.cpp

Lines changed: 57 additions & 32 deletions
Original file line numberDiff line numberDiff line change
@@ -14,6 +14,7 @@
1414
#include <ATen/native/xpu/sycl/Indexing.h>
1515
#include <ATen/native/xpu/sycl/IndexingUtils.h>
1616
#include <ATen/native/xpu/sycl/Loops.h>
17+
#include <ATen/native/xpu/sycl/SortingKernels.h>
1718
#include <ATen/native/xpu/sycl/pstl/PSTLFunctions.h>
1819
#include <ATen/ops/_sparse_coo_tensor_with_dims_and_tensors.h>
1920
#include <ATen/ops/arange.h>
@@ -675,42 +676,66 @@ void index_put_deterministic_kernel(
675676

676677
linearIndex.divide_(sliceSize, "trunc");
677678

678-
sorted_indices.copy_(linearIndex);
679-
pstl::itoa(
680-
orig_indices.data_ptr<int64_t>(),
681-
orig_indices.data_ptr<int64_t>() + linearIndex.numel(),
682-
(int64_t)0);
683-
pstl::sort<int64_t, int64_t>(
679+
auto range = at::arange(num_indices, linearIndex.options());
680+
sort_pairs<int64_t, int64_t>(
684681
linearIndex.const_data_ptr<int64_t>(),
685-
sorted_indices.data_ptr<int64_t>(),
686-
orig_indices.data_ptr<int64_t>(),
687-
linearIndex.numel(),
682+
sorted_indices.mutable_data_ptr<int64_t>(),
683+
range.const_data_ptr<int64_t>(),
684+
orig_indices.mutable_data_ptr<int64_t>(),
685+
num_indices,
688686
false);
687+
689688
TORCH_INTERNAL_ASSERT(
690689
linearIndex.numel() * sliceSize * nElemBefore == expandedValue.numel(),
691690
"number of flattened indices did not match number of elements in the value tensor: ",
692691
linearIndex.numel() * sliceSize * nElemBefore,
693692
" vs ",
694693
expandedValue.numel());
695-
AT_DISPATCH_ALL_TYPES_AND_COMPLEX_AND4(
696-
at::ScalarType::ComplexHalf,
697-
at::ScalarType::BFloat16,
698-
at::ScalarType::Half,
699-
at::ScalarType::Bool,
700-
expandedValue.scalar_type(),
701-
"index_put_deterministic_kernel",
702-
[&] {
703-
launch_index_put_deterministic_kernel<scalar_t>(
704-
sorted_indices.mutable_data_ptr<int64_t>(),
705-
orig_indices.mutable_data_ptr<int64_t>(),
706-
expandedValue.const_data_ptr<scalar_t>(),
707-
src_.mutable_data_ptr<scalar_t>(),
708-
num_indices,
709-
sliceSize,
710-
strideBefore,
711-
nElemBefore,
712-
accumulate);
713-
});
694+
695+
if (sliceSize > SIMD) {
696+
AT_DISPATCH_ALL_TYPES_AND_COMPLEX_AND4(
697+
at::ScalarType::ComplexHalf,
698+
at::ScalarType::BFloat16,
699+
at::ScalarType::Half,
700+
at::ScalarType::Bool,
701+
expandedValue.scalar_type(),
702+
"index_put_deterministic_kernel",
703+
[&] {
704+
launch_index_put_deterministic_kernel<scalar_t, scalar_t>(
705+
sorted_indices.mutable_data_ptr<int64_t>(),
706+
orig_indices.mutable_data_ptr<int64_t>(),
707+
expandedValue.const_data_ptr<scalar_t>(),
708+
src_.mutable_data_ptr<scalar_t>(),
709+
num_indices,
710+
sliceSize,
711+
strideBefore,
712+
nElemBefore,
713+
accumulate);
714+
});
715+
} else {
716+
// Align acc type with CUDA
717+
AT_DISPATCH_ALL_TYPES_AND_COMPLEX_AND4(
718+
at::ScalarType::ComplexHalf,
719+
at::ScalarType::BFloat16,
720+
at::ScalarType::Half,
721+
at::ScalarType::Bool,
722+
expandedValue.scalar_type(),
723+
"index_put_deterministic_kernel",
724+
[&] {
725+
using accscalar_t = at::opmath_type<scalar_t>;
726+
launch_index_put_deterministic_kernel<scalar_t, accscalar_t>(
727+
sorted_indices.mutable_data_ptr<int64_t>(),
728+
orig_indices.mutable_data_ptr<int64_t>(),
729+
expandedValue.const_data_ptr<scalar_t>(),
730+
src_.mutable_data_ptr<scalar_t>(),
731+
num_indices,
732+
sliceSize,
733+
strideBefore,
734+
nElemBefore,
735+
accumulate);
736+
});
737+
}
738+
714739
if (permuted)
715740
self.copy_(src_.permute(inversePerm));
716741
else if (!self_contiguous) {
@@ -1477,8 +1502,8 @@ void index_reduce_func_xpu_template(
14771502
getTensorInfo<const index_t, unsigned int>(index);
14781503
indexInfo.collapseDims();
14791504

1480-
// A reasonable choice for when to have each thread iterate over
1481-
// index to choose
1505+
// A reasonable choice for when to have each thread iterate
1506+
// over index to choose
14821507
if (numIndex <= 16) {
14831508
auto caller =
14841509
SMALL_INDEX(scalar_t, index_t, unsigned int, func_t);
@@ -1707,8 +1732,8 @@ static inline ForwardIt find_bound(
17071732
const T& value) {
17081733
ForwardIt it;
17091734
typename std::iterator_traits<ForwardIt>::difference_type count, step;
1710-
// NOTE: std::distance(first, last) compiles but produces wrong results here,
1711-
// so only legacy random access iterators are safe in this code.
1735+
// NOTE: std::distance(first, last) compiles but produces wrong results
1736+
// here, so only legacy random access iterators are safe in this code.
17121737
count = last - first;
17131738

17141739
while (count > 0) {

src/ATen/native/xpu/sycl/Indexing.h

Lines changed: 1 addition & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -887,7 +887,7 @@ struct IndexPutDeterministicKernelFunctor {
887887
BatchKernelConfig cfg_;
888888
};
889889

890-
template <typename scalar_t>
890+
template <typename scalar_t, typename accscalar_t>
891891
void launch_index_put_deterministic_kernel(
892892
int64_t* sorted_indices,
893893
int64_t* indices,
@@ -902,8 +902,6 @@ void launch_index_put_deterministic_kernel(
902902
return;
903903
}
904904
int64_t v_stride_before = numel * stride;
905-
// align with precision of CPU backend.
906-
using accscalar_t = scalar_t; /* acc_type<scalar_t>; */
907905
using KernelClass = IndexPutDeterministicKernelFunctor<scalar_t, accscalar_t>;
908906
BatchKernelConfig cfg = BatchKernelConfig::make_config<KernelClass>(
909907
/* num of indices */ numel,

test/regressions/test_index_and_index_put.py

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -33,7 +33,8 @@ def test_index_and_index_put(self, dtype=torch.float):
3333
x_xpu.index_put_([indcies], input, True)
3434
self.assertEqual(x_cpu, x_xpu.to(cpu_device))
3535

36-
def test_index_put(self, dtype=torch.bfloat16):
36+
def test_index_put(self, dtype=torch.float32):
37+
# For half precision, XPU and CUDA produce consistent results, but crash on the following case, so we ignore it.
3738
cpu_device = torch.device("cpu")
3839
xpu_device = torch.device("xpu")
3940

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