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[CI] Remove extra PRs for CI tests (#1929)
1. Remove FP64 fallback PR pytorch/pytorch#156456 2. Remove tolerance PR pytorch/pytorch#143739 3. Remove PT2E half-precision support PR pytorch/pytorch#154339 disable_distributed disable_windows
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.github/ci_expected_accuracy/lts/inductor_timm_models_training.csv

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@@ -5,7 +5,7 @@ botnet26t_256,pass,pass,pass,pass,pass
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cait_m36_384,pass,pass,pass,pass,pass
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coat_lite_mini,pass,pass,pass,pass,pass
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convit_base,pass,pass,pass,pass,pass
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convmixer_768_32,pass,pass,pass,pass,pass
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convmixer_768_32,pass,fail_accuracy,pass,fail_accuracy,pass
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# https://github.com/intel/torch-xpu-ops/issues/1274
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convnext_base,pass,fail_accuracy,fail_accuracy,pass,pass
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crossvit_9_240,pass,pass,pass,pass,pass

.github/ci_expected_accuracy/rolling/inductor_timm_models_training.csv

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@@ -2,10 +2,10 @@ name,float32,bfloat16,float16,amp_bf16,amp_fp16
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adv_inception_v3,pass,pass,pass,pass,pass
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beit_base_patch16_224,pass,pass,pass,pass,pass
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botnet26t_256,pass,pass,pass,pass,pass
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cait_m36_384,pass,pass,pass,pass,pass
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cait_m36_384,pass,pass,fail_accuracy,pass,pass
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coat_lite_mini,pass,pass,pass,pass,pass
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convit_base,pass,pass,pass,pass,pass
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convmixer_768_32,pass,pass,pass,pass,pass
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convmixer_768_32,pass,fail_accuracy,pass,fail_accuracy,pass
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# https://github.com/intel/torch-xpu-ops/issues/1274
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convnext_base,pass,fail_accuracy,fail_accuracy,pass,pass
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crossvit_9_240,pass,pass,pass,pass,pass

.github/ci_expected_accuracy/rolling/inductor_torchbench_inference.csv

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@@ -19,11 +19,11 @@ densenet121,pass,pass,pass,pass,pass
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# https://github.com/intel/torch-xpu-ops/issues/1278
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detectron2_fasterrcnn_r_101_c4,pass,eager_fail_to_run,fail_accuracy,fail_accuracy,fail_accuracy
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detectron2_fasterrcnn_r_101_dc5,pass,eager_fail_to_run,fail_accuracy,fail_accuracy,fail_accuracy
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detectron2_fasterrcnn_r_101_fpn,pass,eager_fail_to_run,fail_accuracy,fail_accuracy,fail_accuracy
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detectron2_fasterrcnn_r_101_fpn,eager_1st_run_OOM,eager_fail_to_run,fail_accuracy,fail_accuracy,fail_accuracy
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detectron2_fasterrcnn_r_50_c4,pass,eager_fail_to_run,fail_accuracy,fail_accuracy,fail_accuracy
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detectron2_fasterrcnn_r_50_dc5,pass,eager_fail_to_run,fail_accuracy,fail_accuracy,fail_accuracy
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detectron2_fasterrcnn_r_50_fpn,pass,eager_fail_to_run,fail_accuracy,fail_accuracy,pass
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detectron2_fcos_r_50_fpn,pass,pass,pass,pass,pass
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detectron2_fasterrcnn_r_50_fpn,eager_1st_run_OOM,eager_fail_to_run,eager_1st_run_OOM,fail_accuracy,pass
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detectron2_fcos_r_50_fpn,pass,pass,pass,fail_accuracy,pass
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detectron2_maskrcnn,fail_to_run,eager_fail_to_run,fail_to_run,eager_fail_to_run,fail_to_run
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detectron2_maskrcnn_r_101_c4,fail_accuracy,eager_fail_to_run,fail_accuracy,fail_accuracy,fail_accuracy
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detectron2_maskrcnn_r_101_fpn,fail_accuracy,eager_fail_to_run,eager_1st_run_OOM,eager_1st_run_OOM,fail_accuracy

.github/scripts/apply_torch_pr.py

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@@ -9,12 +9,7 @@
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parser = argparse.ArgumentParser()
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parser.add_argument('--pr-list', '-n', nargs='+',
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default=[
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# Fallback to CPU for XPU FP64
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"https://github.com/pytorch/pytorch/pull/156456",
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# Modify the tolerance level in TIMM benchmark
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"https://github.com/pytorch/pytorch/pull/143739",
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# "Enhance testing infrastructure to add half-precision support for histc on XPU"
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"https://github.com/pytorch/pytorch/pull/154339",
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# Additional PRs link if need for CICD tests
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]
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)
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parser.add_argument('--extra-pr-list', '-e', nargs='+',default=[])

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