Commit d4d5020
External Release v2024.11.04
The release updates XED according to Intel's latest ISA publications, as detailed in
ISE054, ISE055 and AVX10.2-rev2.0.
This version includes support for:
- Intel Diamond Rapids (DMR) chip
- Diamond Rapids AMX instructions
- MOVRS and AVX10-MOVRS instructions
- SM4 EVEX instructions
- MSR-IMM instructions (including APX-promoted variants)
- Encoding updates for various AVX10.2 instructions
- Other updates across XED chip definitions
General
- Shared Library Build for Python: Introduces a unique XED shared library build, exposing all XED APIs via a shared library object. This enables the library to be loaded in Python environments, allowing interaction with XED using Python APIs.
See the [examples in pyext/README.md](pyext/examples/README.md) for more details. (Closes #302)
- Disassembler Enhancements: Adds support for emitting CS/DS ignored branch hint prefixes, configurable through the `xed_format_options_t` structure.
- Updates minimum Python requirement from 3.8 to 3.9.
- Improves Internal ISA definition APX files (See #338)
Fixes
- Resolves C11 build warnings with GCC (Fixes #332)
- Improves length and error reporting for illegal instructions caused by a zeroed EVEX map (Resolves #334)
Co-authored-by: Arjevani, Maor <maor.arjevani@intel.com>1 parent b86dd50 commit d4d5020
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- amx-dmr
- apx-f
- avx10-2
- avx512-fp16
- avx512-skx
- avx512f
- cwf
- dmr
- future
- knl
- lunar-lake
- movrs
- msr-imm
- ptl
- sm4-evex
- vbmi2
- vex-map5
- docsrc
- examples
- include/public/xed
- misc
- pyext
- examples
- gen
- pysrc
- src
- common
- dec
- tests
- bulk-tests
- tests-base
- test-00554
- test-00555
- test-00556
- test-00557
- test-00558
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