Bump LLVM to llvm/llvm-project@c8cf393 (#22354)

New Revert:
-
llvm/llvm-project@8c05b5c
causes numerical errors see
(#22354 (comment))

Still carrying these reverts:
- llvm/llvm-project#160615 (See
#22171)

Fixes:
- API change to linalg::rewriteAsPaddedOp
(llvm/llvm-project@1508a8e)
- API change to populateMathToROCDLConversionPatterns
(llvm/llvm-project@fbbffc1)
- Changes to lit tests

---------

Signed-off-by: Muzammiluddin Syed <[email protected]>

Author: Muzammiluddin-Syed-ECE

compiler/src/iree/compiler/Codegen/Common/GPU/GPUApplyPaddingLevel.cpp

@@ -210,15 +210,15 @@ static LogicalResult applyPaddingLevel(RewriterBase &rewriter,
   }
 
   // 4. Pad.
-  SmallVector<tensor::PadOp> padOps;
-  FailureOr<TilingInterface> maybePaddedOp =
-      linalg::rewriteAsPaddedOp(rewriter, tilingInterfaceOp, options, padOps);
-  if (failed(maybePaddedOp)) {
+  FailureOr<linalg::PadTilingInterfaceResult> maybePadResult =
+      linalg::rewriteAsPaddedOp(rewriter, tilingInterfaceOp, options);
+  if (failed(maybePadResult)) {
     tilingInterfaceOp.emitWarning("failed to pad op");
     return failure();
   }
-
-  TilingInterface paddedOp = *maybePaddedOp;
+  const linalg::PadTilingInterfaceResult &padResult = maybePadResult.value();
+  rewriter.replaceOp(tilingInterfaceOp, padResult.replacements);
+  TilingInterface paddedOp = padResult.paddedOp;
   Location loc = paddedOp.getLoc();
 
   if (auto paddedLinalgOp =
@@ -304,7 +304,7 @@ static LogicalResult applyPaddingLevel(RewriterBase &rewriter,
   }
 
   // 5. For each PadOp, create a linalg::CopyOp to allow dim propagations.
-  for (tensor::PadOp padOp : padOps) {
+  for (tensor::PadOp padOp : padResult.padOps) {
     OpBuilder::InsertionGuard g(rewriter);
     rewriter.setInsertionPointAfter(padOp);
 

compiler/src/iree/compiler/Codegen/Common/GPU/GPUPadConvs.cpp

@@ -33,12 +33,12 @@ static LogicalResult padToStaticSizes(RewriterBase &rewriter,
                      .setPaddingValues(paddingValues)
                      .setPadToMultipleOf(true);
 
-  SmallVector<tensor::PadOp> padOps;
-  FailureOr<TilingInterface> maybePaddedOp =
-      linalg::rewriteAsPaddedOp(rewriter, tilingInterfaceOp, options, padOps);
-  if (failed(maybePaddedOp)) {
+  FailureOr<linalg::PadTilingInterfaceResult> maybePadResult =
+      linalg::rewriteAsPaddedOp(rewriter, tilingInterfaceOp, options);
+  if (failed(maybePadResult)) {
     return tilingInterfaceOp->emitOpError("failed to pad op");
   }
+  rewriter.replaceOp(tilingInterfaceOp, maybePadResult->replacements);
 
   return success();
 }

compiler/src/iree/compiler/Codegen/Common/test/flatten_memref_subspan.mlir

@@ -632,4 +632,4 @@ func.func @reinterpret_cast_lowering_dynamic_zero_offset() -> f32 {
 }
 // CHECK-LABEL: func @reinterpret_cast_lowering_dynamic_zero_offset()
 //       CHECK:   %[[C0:.+]] = arith.constant 0 : index
-//       CHECK:   memref.reinterpret_cast %{{.+}} to offset: [%[[C0]]], sizes: [], strides: [] : memref<?xf32> to memref<f32, strided<[], offset: ?>>
+//       CHECK:   memref.reinterpret_cast %{{.+}} to offset: [0], sizes: [], strides: [] : memref<?xf32> to memref<f32, strided<[]>>

compiler/src/iree/compiler/Codegen/LLVMGPU/ConvertToROCDL.cpp

@@ -348,7 +348,8 @@ struct ConvertToROCDLPass final
       LLVMConversionTarget target(getContext());
       populateFuncToLLVMFuncOpConversionPattern(converter, llvmPatterns);
       configureGpuToROCDLConversionLegality(target);
-      populateMathToROCDLConversionPatterns(converter, llvmPatterns);
+      populateMathToROCDLConversionPatterns(converter, llvmPatterns,
+                                            /*chipset=*/*maybeChipset);
       ub::populateUBToLLVMConversionPatterns(converter, llvmPatterns);
 
       if (failed(applyPartialConversion(m, target, std::move(llvmPatterns)))) {