Integrate llvm/llvm-project@386a3af (#23639)

RattataKing · web-flow · commit 46b54e8d2887 · 2026-03-04T10:40:24.000-05:00
Integrate up to llvm/llvm-project@386a3af Reverts: - llvm/llvm-project@5a4a5db (requires IREE to bump [stablehlo](https://github.com/iree-org/stablehlo) version) - llvm/llvm-project@7ad2c6d (IREE needs to update how it emits index cast ops) --------- Signed-off-by: Amily Wu <amilywu2@amd.com>
diff --git a/build_tools/linters/typos.toml b/build_tools/linters/typos.toml
@@ -80,7 +80,3 @@ mye = "mye"
 # Workgroup coordinate variables (iz, iy).
 iz = "iz"
 iy = "iy"
-# Upstream MLIR API name (warpSyncronizationFn).
-syncronization = "syncronization"
-# Upstream MLIR error message typo (faild to tile operation).
-faild = "faild"
diff --git a/compiler/src/iree/compiler/Codegen/Common/GPU/GPUDistributeSharedMemoryCopy.cpp b/compiler/src/iree/compiler/Codegen/Common/GPU/GPUDistributeSharedMemoryCopy.cpp
@@ -451,8 +451,9 @@ LogicalResult gpuDistributeSharedMemoryCopy(mlir::FunctionOpInterface funcOp) {
     debugPrint(funcOp, "After tiling for unaligned case");
 
     // Apply canonicalization patterns.
-    RewritePatternSet threadTilingCanonicalizationPatterns =
-        linalg::getLinalgTilingCanonicalizationPatterns(context);
+    RewritePatternSet threadTilingCanonicalizationPatterns(context);
+    linalg::populateLinalgTilingCanonicalizationPatterns(
+        threadTilingCanonicalizationPatterns);
     populateAffineMinSCFCanonicalizationPattern(
         threadTilingCanonicalizationPatterns);
     if (failed(applyPatternsGreedily(
diff --git a/compiler/src/iree/compiler/Codegen/Common/GPU/GPUTensorTile.cpp b/compiler/src/iree/compiler/Codegen/Common/GPU/GPUTensorTile.cpp
@@ -224,8 +224,9 @@ LogicalResult tileReductionToSerialLoops(mlir::FunctionOpInterface funcOp,
   }
 
   {
-    RewritePatternSet wgTilingCanonicalizationPatterns =
-        linalg::getLinalgTilingCanonicalizationPatterns(funcOp.getContext());
+    RewritePatternSet wgTilingCanonicalizationPatterns(funcOp.getContext());
+    linalg::populateLinalgTilingCanonicalizationPatterns(
+        wgTilingCanonicalizationPatterns);
     populateAffineMinSCFCanonicalizationPattern(
         wgTilingCanonicalizationPatterns);
     scf::populateSCFForLoopCanonicalizationPatterns(
diff --git a/compiler/src/iree/compiler/Codegen/Common/GPU/VectorReductionToGPU.cpp b/compiler/src/iree/compiler/Codegen/Common/GPU/VectorReductionToGPU.cpp
@@ -328,8 +328,8 @@ struct VectorReductionToGPUPass final
       RewritePatternSet patterns(ctx);
       vector::WarpExecuteOnLane0LoweringOptions options;
       options.warpAllocationFn = allocateGlobalSharedMemory;
-      options.warpSyncronizationFn = [](Location loc, OpBuilder &builder,
-                                        gpu::WarpExecuteOnLane0Op warpOp) {
+      options.warpSynchronizationFn = [](Location loc, OpBuilder &builder,
+                                         gpu::WarpExecuteOnLane0Op warpOp) {
         // There's no communication via global memory occurring, so we only need
         // to fence on workgroup memory.
         gpu::BarrierOp::create(builder, loc, gpu::AddressSpace::Workgroup);
diff --git a/compiler/src/iree/compiler/Codegen/LLVMCPU/BUILD.bazel b/compiler/src/iree/compiler/Codegen/LLVMCPU/BUILD.bazel
@@ -184,7 +184,7 @@ iree_compiler_cc_library(
         "@llvm-project//mlir:VectorToLLVM",
         "@llvm-project//mlir:VectorToSCF",
         "@llvm-project//mlir:VectorTransforms",
-        "@llvm-project//mlir:X86VectorTransforms",
+        "@llvm-project//mlir:X86Transforms",
     ],
 )
 
diff --git a/compiler/src/iree/compiler/Codegen/LLVMCPU/CMakeLists.txt b/compiler/src/iree/compiler/Codegen/LLVMCPU/CMakeLists.txt
@@ -151,7 +151,7 @@ iree_cc_library(
     MLIRVectorToLLVM
     MLIRVectorToSCF
     MLIRVectorTransforms
-    MLIRX86VectorTransforms
+    MLIRX86Transforms
     iree::compiler::Codegen::Common
     iree::compiler::Codegen::Common::CPU::CommonCPUPasses
     iree::compiler::Codegen::Common::TransformDialectInterpreterPass
diff --git a/compiler/src/iree/compiler/Codegen/LLVMCPU/LLVMCPUTile.cpp b/compiler/src/iree/compiler/Codegen/LLVMCPU/LLVMCPUTile.cpp
@@ -112,8 +112,8 @@ void LLVMCPUTilePass::runOnOperation() {
     rewriter.replaceOp(op, tiledResults->replacements);
   }
 
-  RewritePatternSet patterns =
-      linalg::getLinalgTilingCanonicalizationPatterns(context);
+  RewritePatternSet patterns(context);
+  linalg::populateLinalgTilingCanonicalizationPatterns(patterns);
   scf::populateSCFForLoopCanonicalizationPatterns(patterns);
   tensor::populateFoldTensorEmptyPatterns(patterns);
   memref::populateResolveRankedShapedTypeResultDimsPatterns(patterns);
diff --git a/compiler/src/iree/compiler/Codegen/LLVMCPU/LLVMCPUTileAndFuseProducerConsumer.cpp b/compiler/src/iree/compiler/Codegen/LLVMCPU/LLVMCPUTileAndFuseProducerConsumer.cpp
@@ -293,8 +293,8 @@ void LLVMCPUTileAndFuseProducerConsumer::runOnOperation() {
     }
   }
 
-  RewritePatternSet patterns =
-      linalg::getLinalgTilingCanonicalizationPatterns(context);
+  RewritePatternSet patterns(context);
+  linalg::populateLinalgTilingCanonicalizationPatterns(patterns);
   scf::populateSCFForLoopCanonicalizationPatterns(patterns);
   scf::ForallOp::getCanonicalizationPatterns(patterns, context);
   tensor::populateFoldTensorEmptyPatterns(patterns);
diff --git a/compiler/src/iree/compiler/Codegen/LLVMCPU/LLVMCPUTileToVectorSize.cpp b/compiler/src/iree/compiler/Codegen/LLVMCPU/LLVMCPUTileToVectorSize.cpp
@@ -175,8 +175,8 @@ void LLVMCPUTileToVectorSizePass::runOnOperation() {
     rewriter.replaceOp(op, tiledResults->replacements);
   }
 
-  RewritePatternSet patterns =
-      linalg::getLinalgTilingCanonicalizationPatterns(context);
+  RewritePatternSet patterns(context);
+  linalg::populateLinalgTilingCanonicalizationPatterns(patterns);
   scf::populateSCFForLoopCanonicalizationPatterns(patterns);
   tensor::populateFoldTensorEmptyPatterns(patterns);
   memref::populateResolveRankedShapedTypeResultDimsPatterns(patterns);
diff --git a/compiler/src/iree/compiler/Codegen/LLVMCPU/LLVMCPUVectorTransposeLowering.cpp b/compiler/src/iree/compiler/Codegen/LLVMCPU/LLVMCPUVectorTransposeLowering.cpp
@@ -7,7 +7,7 @@
 #include "iree/compiler/Codegen/LLVMCPU/Passes.h"
 #include "mlir/Dialect/Vector/Transforms/LoweringPatterns.h"
 #include "mlir/Dialect/Vector/Transforms/VectorTransforms.h"
-#include "mlir/Dialect/X86Vector/Transforms.h"
+#include "mlir/Dialect/X86/Transforms.h"
 #include "mlir/Pass/Pass.h"
 #include "mlir/Transforms/GreedyPatternRewriteDriver.h"
 
@@ -75,12 +75,9 @@ void LLVMCPUVectorTransposeLoweringPass::runOnOperation() {
       patterns, kNarrowTypeEmulationBenefit);
 
   if (lowerVectorTransposeToAVX2) {
-    auto avx2LoweringOptions =
-        x86vector::avx2::LoweringOptions().setTransposeOptions(
-            x86vector::avx2::TransposeLoweringOptions()
-                .lower4x8xf32()
-                .lower8x8xf32());
-    x86vector::avx2::populateSpecializedTransposeLoweringPatterns(
+    auto avx2LoweringOptions = x86::avx2::LoweringOptions().setTransposeOptions(
+        x86::avx2::TransposeLoweringOptions().lower4x8xf32().lower8x8xf32());
+    x86::avx2::populateSpecializedTransposeLoweringPatterns(
         patterns, avx2LoweringOptions, kSpecializedBenefit);
   }
   (void)applyPatternsGreedily(funcOp, std::move(patterns));
diff --git a/compiler/src/iree/compiler/Codegen/LLVMGPU/LLVMGPUTileAndDistribute.cpp b/compiler/src/iree/compiler/Codegen/LLVMGPU/LLVMGPUTileAndDistribute.cpp
@@ -75,8 +75,9 @@ static LogicalResult tileToSerialLoops(mlir::FunctionOpInterface funcOp) {
   }
 
   {
-    RewritePatternSet wgTilingCanonicalizationPatterns =
-        linalg::getLinalgTilingCanonicalizationPatterns(funcOp.getContext());
+    RewritePatternSet wgTilingCanonicalizationPatterns(funcOp.getContext());
+    linalg::populateLinalgTilingCanonicalizationPatterns(
+        wgTilingCanonicalizationPatterns);
     populateAffineMinSCFCanonicalizationPattern(
         wgTilingCanonicalizationPatterns);
     scf::populateSCFForLoopCanonicalizationPatterns(
@@ -264,8 +265,9 @@ class LLVMGPUTileAndDistributePass final
     }
 
     {
-      RewritePatternSet promotionCanonicalization =
-          linalg::getLinalgTilingCanonicalizationPatterns(context);
+      RewritePatternSet promotionCanonicalization(context);
+      linalg::populateLinalgTilingCanonicalizationPatterns(
+          promotionCanonicalization);
       if (failed(applyPatternsGreedily(funcOp,
                                        std::move(promotionCanonicalization)))) {
         return signalPassFailure();
@@ -291,8 +293,9 @@ class LLVMGPUTileAndDistributePass final
     }
     {
       // Apply canonicalization patterns.
-      RewritePatternSet threadTilingCanonicalizationPatterns =
-          linalg::getLinalgTilingCanonicalizationPatterns(context);
+      RewritePatternSet threadTilingCanonicalizationPatterns(context);
+      linalg::populateLinalgTilingCanonicalizationPatterns(
+          threadTilingCanonicalizationPatterns);
       populateAffineMinSCFCanonicalizationPattern(
           threadTilingCanonicalizationPatterns);
       if (failed(applyPatternsGreedily(
diff --git a/compiler/src/iree/compiler/Codegen/LLVMGPU/TransformExtensions/LLVMGPUExtensions.cpp b/compiler/src/iree/compiler/Codegen/LLVMGPU/TransformExtensions/LLVMGPUExtensions.cpp
@@ -632,7 +632,7 @@ transform_dialect::VectorWarpDistributionOp::applyToOne(
   RewritePatternSet endPatterns(ctx);
   vector::WarpExecuteOnLane0LoweringOptions options;
   options.warpAllocationFn = allocateGlobalSharedMemory;
-  options.warpSyncronizationFn = warpSynchronizationFn;
+  options.warpSynchronizationFn = warpSynchronizationFn;
   populateWarpExecuteOnLane0ToScf(target, endPatterns, options,
                                   /*benefit=*/0);
   if (failed(applyPatternsGreedily(target, std::move(endPatterns), config))) {
diff --git a/compiler/src/iree/compiler/Codegen/SPIRV/SPIRVTileAndDistribute.cpp b/compiler/src/iree/compiler/Codegen/SPIRV/SPIRVTileAndDistribute.cpp
@@ -154,8 +154,9 @@ void SPIRVTileAndDistributePass::runOnOperation() {
   }
 
   {
-    RewritePatternSet canonicalizationPatterns =
-        linalg::getLinalgTilingCanonicalizationPatterns(context);
+    RewritePatternSet canonicalizationPatterns(context);
+    linalg::populateLinalgTilingCanonicalizationPatterns(
+        canonicalizationPatterns);
 
     SmallVector<int64_t> numWorkgroups = getStaticNumWorkgroups(funcOp);
     populateFoldAffineMinInDistributedLoopsPatterns(canonicalizationPatterns,
@@ -183,8 +184,9 @@ void SPIRVTileAndDistributePass::runOnOperation() {
       return signalPassFailure();
     }
 
-    RewritePatternSet canonicalizationPatterns =
-        linalg::getLinalgTilingCanonicalizationPatterns(context);
+    RewritePatternSet canonicalizationPatterns(context);
+    linalg::populateLinalgTilingCanonicalizationPatterns(
+        canonicalizationPatterns);
     scf::populateSCFForLoopCanonicalizationPatterns(canonicalizationPatterns);
     if (failed(applyPatternsGreedily(funcOp,
                                      std::move(canonicalizationPatterns)))) {
diff --git a/compiler/src/iree/compiler/Codegen/SPIRV/SPIRVTileAndPromote.cpp b/compiler/src/iree/compiler/Codegen/SPIRV/SPIRVTileAndPromote.cpp
@@ -163,8 +163,8 @@ void SPIRVTileAndPromotePass::runOnOperation() {
     }
   }
   {
-    RewritePatternSet patterns =
-        linalg::getLinalgTilingCanonicalizationPatterns(context);
+    RewritePatternSet patterns(context);
+    linalg::populateLinalgTilingCanonicalizationPatterns(patterns);
     scf::populateSCFForLoopCanonicalizationPatterns(patterns);
     if (failed(applyPatternsGreedily(funcOp, std::move(patterns)))) {
       return signalPassFailure();
@@ -253,8 +253,8 @@ void SPIRVTileAndPromotePass::runOnOperation() {
       return signalPassFailure();
     }
 
-    RewritePatternSet patterns =
-        linalg::getLinalgTilingCanonicalizationPatterns(context);
+    RewritePatternSet patterns(context);
+    linalg::populateLinalgTilingCanonicalizationPatterns(patterns);
     SmallVector<int64_t> numWorkgroups = getStaticNumWorkgroups(funcOp);
     populateFoldAffineMinInDistributedLoopsPatterns(patterns, numWorkgroups);
     if (failed(applyPatternsGreedily(funcOp, std::move(patterns)))) {
diff --git a/compiler/src/iree/compiler/Codegen/SPIRV/SPIRVTileAndVectorizeToCooperativeOps.cpp b/compiler/src/iree/compiler/Codegen/SPIRV/SPIRVTileAndVectorizeToCooperativeOps.cpp
@@ -389,8 +389,9 @@ class SPIRVTileToCooperativeOpsPass final
         return signalPassFailure();
       }
 
-      RewritePatternSet canonicalizationPatterns =
-          linalg::getLinalgTilingCanonicalizationPatterns(context);
+      RewritePatternSet canonicalizationPatterns(context);
+      linalg::populateLinalgTilingCanonicalizationPatterns(
+          canonicalizationPatterns);
       SmallVector<int64_t> numWorkgroups = getStaticNumWorkgroups(funcOp);
       populateFoldAffineMinInDistributedLoopsPatterns(canonicalizationPatterns,
                                                       numWorkgroups);
diff --git a/compiler/src/iree/compiler/Dialect/LinalgExt/Transforms/test/tiling.mlir b/compiler/src/iree/compiler/Dialect/LinalgExt/Transforms/test/tiling.mlir
@@ -4015,7 +4015,7 @@ module attributes { transform.with_named_sequence } {
 // -----
 
 func.func @no_tile_concat_dynamic(%arg0 : tensor<?x?xi32>, %arg1 : tensor<?x?xi32>) -> tensor<?x?xi32> {
- // expected-error @below {{faild to tile operation}}
+ // expected-error @below {{failed to tile operation}}
  // expected-error @below {{failed to generate tiling loops}}
   %0 = tensor.concat dim(1) %arg0, %arg1 : (tensor<?x?xi32>, tensor<?x?xi32>) -> tensor<?x?xi32>
   return %0 : tensor<?x?xi32>
@@ -4031,7 +4031,7 @@ module attributes { transform.with_named_sequence } {
 // -----
 
 func.func @no_tile_concat_concated_dim(%arg0 : tensor<?x64xi32>, %arg1 : tensor<?x64xi32>) -> tensor<?x128xi32> {
- // expected-error @below {{faild to tile operation}}
+ // expected-error @below {{failed to tile operation}}
  // expected-error @below {{failed to generate tiling loops}}
   %0 = tensor.concat dim(1) %arg0, %arg1 : (tensor<?x64xi32>, tensor<?x64xi32>) -> tensor<?x128xi32>
   return %0 : tensor<?x128xi32>
diff --git a/third_party/llvm-project b/third_party/llvm-project
@@ -1 +1 @@
-Subproject commit c95bd0bba5be9710292ce3a29832b67a0e33f887
+Subproject commit ecf5883dc5d77b97b1e6b9665d2796ab22d07d4c

Original file line number	Diff line number	Diff line change
`@@ -224,8 +224,9 @@ LogicalResult tileReductionToSerialLoops(mlir::FunctionOpInterface funcOp,`
`224`	`224`	`}`
`225`	`225`
`226`	`226`	`{`
`227`		`- RewritePatternSet wgTilingCanonicalizationPatterns =`
`228`		`- linalg::getLinalgTilingCanonicalizationPatterns(funcOp.getContext());`
	`227`	`+ RewritePatternSet wgTilingCanonicalizationPatterns(funcOp.getContext());`
	`228`	`+ linalg::populateLinalgTilingCanonicalizationPatterns(`
	`229`	`+ wgTilingCanonicalizationPatterns);`
`229`	`230`	`populateAffineMinSCFCanonicalizationPattern(`
`230`	`231`	`wgTilingCanonicalizationPatterns);`
`231`	`232`	`scf::populateSCFForLoopCanonicalizationPatterns(`
Original file line number	Diff line number	Diff line change
`@@ -184,7 +184,7 @@ iree_compiler_cc_library(`
`184`	`184`	`"@llvm-project//mlir:VectorToLLVM",`
`185`	`185`	`"@llvm-project//mlir:VectorToSCF",`
`186`	`186`	`"@llvm-project//mlir:VectorTransforms",`
`187`		`- "@llvm-project//mlir:X86VectorTransforms",`
	`187`	`+ "@llvm-project//mlir:X86Transforms",`
`188`	`188`	`],`
`189`	`189`	`)`
`190`	`190`
Original file line number	Diff line number	Diff line change
`@@ -293,8 +293,8 @@ void LLVMCPUTileAndFuseProducerConsumer::runOnOperation() {`
`293`	`293`	`}`
`294`	`294`	`}`
`295`	`295`
`296`		`- RewritePatternSet patterns =`
`297`		`- linalg::getLinalgTilingCanonicalizationPatterns(context);`
	`296`	`+ RewritePatternSet patterns(context);`
	`297`	`+ linalg::populateLinalgTilingCanonicalizationPatterns(patterns);`
`298`	`298`	`scf::populateSCFForLoopCanonicalizationPatterns(patterns);`
`299`	`299`	`scf::ForallOp::getCanonicalizationPatterns(patterns, context);`
`300`	`300`	`tensor::populateFoldTensorEmptyPatterns(patterns);`