@@ -153,7 +153,7 @@ func.func @matmul_DYN_1_4096(%arg0: !TA, %arg1: !TB, %arg2: !TC, %arg3: !DTC, %a
153153!DTC = !iree_tensor_ext.dispatch.tensor <readwrite :tensor <32 x32 xf32 >>
154154
155155// CHECK: #translation = #iree_codegen.translation_info<pipeline = LLVMGPUTileAndFuse
156- // CHECK-SAME: workgroup_size = [64, 16, 1] subgroup_size = 64, {gpu_pipeline_options = #iree_gpu.pipeline_options<no_reduce_shared_memory_bank_conflicts = false , use_igemm_convolution = false>}>
156+ // CHECK-SAME: workgroup_size = [64, 16, 1] subgroup_size = 64, {gpu_pipeline_options = #iree_gpu.pipeline_options<no_reduce_shared_memory_bank_conflicts = true , use_igemm_convolution = false>}>
157157func.func @matmul_32_32_DYN (%arg0: !TA , %arg1: !TB , %arg2: !TC , %arg3: !DTC ) {
158158 // CHECK: #iree_gpu.lowering_config<{reduction = [0, 0, 1], thread = [1, 8, 0], workgroup = [64, 128, 1]}
159159 %0 = linalg.matmul ins (%arg0 , %arg1 : !TA , !TB ) outs (%arg2 : !TC ) -> !TC
@@ -168,7 +168,7 @@ func.func @matmul_32_32_DYN(%arg0: !TA, %arg1: !TB, %arg2: !TC, %arg3: !DTC) {
168168!TC = tensor <4096 x4096 xf32 >
169169!DTC = !iree_tensor_ext.dispatch.tensor <readwrite :tensor <4096 x4096 xf32 >>
170170// CHECK: #translation = #iree_codegen.translation_info<pipeline = LLVMGPUTileAndFuse
171- // CHECK-SAME: workgroup_size = [64, 16, 1] subgroup_size = 64, {gpu_pipeline_options = #iree_gpu.pipeline_options<no_reduce_shared_memory_bank_conflicts = false , use_igemm_convolution = false>}>
171+ // CHECK-SAME: workgroup_size = [64, 16, 1] subgroup_size = 64, {gpu_pipeline_options = #iree_gpu.pipeline_options<no_reduce_shared_memory_bank_conflicts = true , use_igemm_convolution = false>}>
172172func.func @matmul_4096_4096_DYN (%arg0: !TA , %arg1: !TB , %arg2: !TC , %arg3: !DTC ) {
173173 // CHECK: #iree_gpu.lowering_config<{reduction = [0, 0, 1], thread = [1, 8, 0], workgroup = [64, 128, 1]}
174174 %0 = linalg.matmul ins (%arg0 , %arg1 : !TA , !TB ) outs (%arg2 : !TC ) -> !TC
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