[LLVMCPU] Populate fp4 expansion patterns on CPUs (#21413)

This allows fp4 code, including uses of scaling_extf and scaling_truncf,
to run (via software implementation of conversions into/out of the type)
on CPU backends.

It also moves the bfloat expansion patterns into an earlier pattern set,
so that they're no longer actively in conflict with arith-to-llvm.

Author: krzysz00

compiler/src/iree/compiler/Codegen/LLVMCPU/ConvertToLLVM.cpp

@@ -1049,7 +1049,6 @@ void ConvertToLLVMPass::runOnOperation() {
   populateFinalizeMemRefToLLVMConversionPatterns(typeConverter, patterns);
   populateFuncToLLVMConversionPatterns(typeConverter, patterns);
   arith::populateArithToLLVMConversionPatterns(typeConverter, patterns);
-  arith::populateExpandBFloat16Patterns(patterns);
   index::populateIndexToLLVMConversionPatterns(typeConverter, patterns);
   populateVectorToSCFConversionPatterns(patterns);
   // Some n-D vectors are generated by EmulateNarrowType pass, so we need to

compiler/src/iree/compiler/Codegen/LLVMCPU/Passes.cpp

@@ -772,7 +772,13 @@ static void addLowerToLLVMPasses(OpPassManager &modulePassManager,
       // (HAL, IREE, Linalg, CF) -> LLVM
       .addPass(memref::createFoldMemRefAliasOpsPass)
       .addPass(affine::createAffineExpandIndexOpsPass)
-      .addPass(arith::createArithExpandOpsPass)
+      .addPass([&]() {
+        arith::ArithExpandOpsPassOptions options;
+        options.includeBf16 = true;
+        options.includeF4E2M1 = true;
+        options.includeF8E8M0 = true;
+        return arith::createArithExpandOpsPass(options);
+      })
       .addPass(createEmulateNarrowTypePass)
       .addPass(createCanonicalizerPass)
       .addPass(createCSEPass)