Skip to content

Commit bf711a1

Browse files
authored
Add strip assertions flag (#19014)
This change _temporarily_ adds `iree-opt-strip-assertions` to SDXL CI which should fix the regression discussed in #19002. Assertions within `linalg.generic` ops can mess with dispatch creation and lead to poorly performing dispatches, despite the fact that they get stripped in later pipelines. --------- Signed-off-by: Ian Wood <[email protected]>
1 parent dd9d616 commit bf711a1

File tree

5 files changed

+12
-10
lines changed

5 files changed

+12
-10
lines changed

.github/workflows/pkgci_regression_test.yml

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -221,7 +221,7 @@ jobs:
221221
--goldentime-rocm-clip-ms 18.5 \
222222
--goldentime-rocm-vae-ms 337.0 \
223223
--goldendispatch-rocm-unet 1531 \
224-
--goldendispatch-rocm-clip 1141 \
224+
--goldendispatch-rocm-clip 1139 \
225225
--goldendispatch-rocm-vae 246 \
226226
--goldensize-rocm-unet-bytes 2280000 \
227227
--goldensize-rocm-clip-bytes 860000 \
@@ -243,7 +243,7 @@ jobs:
243243
--goldentime-rocm-clip-ms 15.5 \
244244
--goldentime-rocm-vae-ms 80.0 \
245245
--goldendispatch-rocm-unet 1531 \
246-
--goldendispatch-rocm-clip 1141 \
246+
--goldendispatch-rocm-clip 1139 \
247247
--goldendispatch-rocm-vae 246 \
248248
--goldensize-rocm-unet-bytes 2270000 \
249249
--goldensize-rocm-clip-bytes 860000 \

compiler/src/iree/compiler/GlobalOptimization/Passes.cpp

Lines changed: 4 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -95,6 +95,8 @@ void buildGlobalOptimizationPassPipeline(
9595

9696
// Preprocessing passes to get the program into a canonical state.
9797
FunctionLikeNest(mainPassManager)
98+
.addPredicatedPass(transformOptions.options.stripAssertions,
99+
IREE::Util::createStripDebugOpsPass)
98100
.addPass(IREE::Util::createOptimizeIntArithmeticPass)
99101
.addPass(createLinalgQuantizedConvToConvPass)
100102
.addPass(createLinalgQuantizedMatmulToMatmulPass)
@@ -217,16 +219,10 @@ void buildGlobalOptimizationPassPipeline(
217219

218220
FunctionLikeNest(mainPassManager)
219221
.addPass(IREE::Flow::createCanonicalizerPass)
220-
.addPass(mlir::createCSEPass);
221-
222-
FunctionLikeNest(mainPassManager)
222+
.addPass(mlir::createCSEPass)
223223
// After running const-eval to a fixed point and folding unit extent dims,
224224
// try any new raising opportunities.
225-
.addPass(createRaiseSpecialOpsPass)
226-
// Strip std.assert & co after we perform optimizations; prior to this we
227-
// may use the assertions to derive information during analysis.
228-
.addPredicatedPass(transformOptions.options.stripAssertions,
229-
IREE::Util::createStripDebugOpsPass);
225+
.addPass(createRaiseSpecialOpsPass);
230226

231227
// Export after const-eval. If the user wants to keep the input constants
232228
// as is in the final parameter archive, they will probably want to disable

experimental/regression_suite/shark-test-suite-models/sdxl/test_clip.py

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -63,6 +63,7 @@
6363
"--iree-llvmcpu-fail-on-out-of-bounds-stack-allocation=false",
6464
"--iree-llvmcpu-distribution-size=32",
6565
"--iree-opt-const-eval=false",
66+
"--iree-opt-strip-assertions=true",
6667
"--iree-llvmcpu-enable-ukernels=all",
6768
"--iree-global-opt-enable-quantized-matmul-reassociation",
6869
]
@@ -92,6 +93,7 @@ def SDXL_CLIP_COMMON_RUN_FLAGS(
9293
f"--iree-hip-target={rocm_chip}",
9394
"--iree-input-type=torch",
9495
"--iree-opt-const-eval=false",
96+
"--iree-opt-strip-assertions=true",
9597
"--iree-global-opt-propagate-transposes=true",
9698
"--iree-opt-outer-dim-concat=true",
9799
"--iree-hip-waves-per-eu=2",

experimental/regression_suite/shark-test-suite-models/sdxl/test_unet.py

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -131,6 +131,7 @@
131131
"--iree-llvmcpu-fail-on-out-of-bounds-stack-allocation=false",
132132
"--iree-llvmcpu-distribution-size=32",
133133
"--iree-opt-const-eval=false",
134+
"--iree-opt-strip-assertions=true",
134135
"--iree-llvmcpu-enable-ukernels=all",
135136
"--iree-global-opt-enable-quantized-matmul-reassociation",
136137
]
@@ -194,6 +195,7 @@ def SDXL_PUNET_INT8_FP8_OUT(
194195
"--iree-hal-target-backends=rocm",
195196
f"--iree-hip-target={rocm_chip}",
196197
"--iree-opt-const-eval=false",
198+
"--iree-opt-strip-assertions=true",
197199
"--iree-global-opt-propagate-transposes=true",
198200
"--iree-dispatch-creation-enable-fuse-horizontal-contractions=true",
199201
"--iree-dispatch-creation-enable-aggressive-fusion=true",

experimental/regression_suite/shark-test-suite-models/sdxl/test_vae.py

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -43,6 +43,7 @@
4343
"--iree-llvmcpu-fail-on-out-of-bounds-stack-allocation=false",
4444
"--iree-llvmcpu-distribution-size=32",
4545
"--iree-opt-const-eval=false",
46+
"--iree-opt-strip-assertions=true",
4647
"--iree-llvmcpu-enable-ukernels=all",
4748
"--iree-global-opt-enable-quantized-matmul-reassociation",
4849
]
@@ -63,6 +64,7 @@ def SDXL_VAE_COMMON_RUN_FLAGS(
6364
"--iree-hal-target-backends=rocm",
6465
f"--iree-hip-target={rocm_chip}",
6566
"--iree-opt-const-eval=false",
67+
"--iree-opt-strip-assertions=true",
6668
"--iree-global-opt-propagate-transposes=true",
6769
"--iree-opt-outer-dim-concat=true",
6870
"--iree-llvmgpu-enable-prefetch=true",

0 commit comments

Comments
 (0)