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qedawkinsclaude
qedawkins
and
claude
authored
[Integrate] Integrate llvm-project@ae920e2636d3 (#23738)
Integrate up to llvm/llvm-project@ae920e2636d3 Changes: - Bump third_party/llvm-project to ae920e2636d3 (234 commits) - Fix DIDerivedTypeAttr::get calls after MLIR added file, line, scope parameters (e55805076e05) - Update tests for arith.extui+uitofp canonicalization fold (5368b8163d50) which now folds extui+uitofp into direct uitofp, and removes the corresponding BitwiseAnd with 255 in SPIRV lowering Co-authored-by: Claude Opus 4.6 <noreply@anthropic.com>
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7 files changed

+21
-19
lines changed

7 files changed

+21
-19
lines changed

‎compiler/src/iree/compiler/Codegen/LLVMCPU/DispatchABI.cpp‎

Lines changed: 8 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -124,7 +124,8 @@ LLVM::DIDerivedTypeAttr
124124
ExecutableLibraryDI::getConstOf(LLVM::DITypeAttr typeAttr) {
125125
return LLVM::DIDerivedTypeAttr::get(
126126
builder.getContext(), llvm::dwarf::DW_TAG_const_type,
127-
/*name=*/nullptr, typeAttr, /*sizeInBits=*/0, /*alignInBits=*/0,
127+
/*name=*/nullptr, /*file=*/nullptr, /*line=*/0, /*scope=*/nullptr,
128+
typeAttr, /*sizeInBits=*/0, /*alignInBits=*/0,
128129
/*offsetInBits=*/0, /*dwarfAddressSpace=*/std::nullopt,
129130
/*flags=*/LLVM::DIFlags::Zero, /*extraData=*/nullptr);
130131
}
@@ -133,7 +134,8 @@ LLVM::DIDerivedTypeAttr
133134
ExecutableLibraryDI::getPtrOf(LLVM::DITypeAttr typeAttr) {
134135
return LLVM::DIDerivedTypeAttr::get(
135136
builder.getContext(), llvm::dwarf::DW_TAG_pointer_type,
136-
/*name=*/nullptr, typeAttr, /*sizeInBits=*/ptrBitwidth,
137+
/*name=*/nullptr, /*file=*/nullptr, /*line=*/0, /*scope=*/nullptr,
138+
typeAttr, /*sizeInBits=*/ptrBitwidth,
137139
/*alignInBits=*/0,
138140
/*offsetInBits=*/0,
139141
/*dwarfAddressSpace=*/std::nullopt,
@@ -164,7 +166,8 @@ LLVM::DIDerivedTypeAttr
164166
ExecutableLibraryDI::getTypedefOf(StringRef name, LLVM::DITypeAttr typeAttr) {
165167
return LLVM::DIDerivedTypeAttr::get(
166168
builder.getContext(), llvm::dwarf::DW_TAG_typedef,
167-
builder.getStringAttr(name), typeAttr, /*sizeInBits=*/0,
169+
builder.getStringAttr(name), /*file=*/nullptr, /*line=*/0,
170+
/*scope=*/nullptr, typeAttr, /*sizeInBits=*/0,
168171
/*alignInBits=*/0, /*offsetInBits=*/0, /*dwarfAddressSpace=*/std::nullopt,
169172
/*flags=*/LLVM::DIFlags::Zero, /*extraData=*/nullptr);
170173
}
@@ -177,7 +180,8 @@ ExecutableLibraryDI::getMemberOf(StringRef name, LLVM::DITypeAttr typeAttr,
177180
*offsetInBits += memberSizeInBits;
178181
return LLVM::DIDerivedTypeAttr::get(
179182
builder.getContext(), llvm::dwarf::DW_TAG_member,
180-
builder.getStringAttr(name), typeAttr,
183+
builder.getStringAttr(name), /*file=*/nullptr, /*line=*/0,
184+
/*scope=*/nullptr, typeAttr,
181185
/*sizeInBits=*/memberSizeInBits, /*alignInBits=*/0,
182186
/*offsetInBits=*/memberOffsetInBits, /*dwarfAddressSpace=*/std::nullopt,
183187
/*flags=*/LLVM::DIFlags::Zero, /*extraData=*/nullptr);

‎compiler/src/iree/compiler/Codegen/LLVMGPU/test/reduction_pipeline_cuda.mlir‎

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -525,8 +525,7 @@ hal.executable private @i4_dequant_matvec {
525525
// CHECK: vector.transfer_read {{.*}} : memref<1x32x4xf16, {{.*}}>, vector<1x1x4xf16>
526526
// CHECK: memref.expand_shape {{.*}} : memref<1x1x128xi4, {{.*}}> into memref<1x1x32x4xi4, {{.*}}>
527527
// CHECK: vector.transfer_read {{.*}} : memref<1x1x32x4xi4, {{.*}}>, vector<1x1x1x4xi4>
528-
// CHECK: arith.extui %{{.*}} : vector<1x1x1x1x1x1x1x1x1x1x1x4xi4> to vector<1x1x1x1x1x1x1x1x1x1x1x4xi32>
529-
// CHECK: arith.uitofp %{{.*}} : vector<1x1x1x1x1x1x1x1x1x1x1x4xi32> to vector<1x1x1x1x1x1x1x1x1x1x1x4xf16>
528+
// CHECK: arith.uitofp %{{.*}} : vector<1x1x1x1x1x1x1x1x1x1x1x4xi4> to vector<1x1x1x1x1x1x1x1x1x1x1x4xf16>
530529
// CHECK: arith.subf %{{.*}}, %{{.*}} : vector<1x1x1x1x1x1x1x1x1x1x1x4xf16>
531530
// CHECK: arith.mulf %{{.*}}, %{{.*}} : vector<1x1x1x1x1x1x1x1x1x1x1x4xf16>
532531
// CHECK: vector.contract {{.*}} : vector<1x1x1x1x1x1x1x1x4xf16>, vector<1x1x1x1x1x1x1x1x1x1x1x4xf16> into vector<1x1x1x1x1x1x1x1x1xf16>

‎compiler/src/iree/compiler/Codegen/LLVMGPU/test/reduction_pipeline_rocm.mlir‎

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -141,8 +141,7 @@ hal.executable private @i4_dequant_matvec {
141141
// RDNA3-DAG: %[[CST:.+]] = arith.constant dense<0.000000e+00> : vector<4x1x1x1x1x1x1x1x1xf16>
142142
// RDNA3: %[[FOR:.+]] = scf.for %{{.+}} = %[[C0]] to %[[C32]] step %[[C1]] iter_args(%{{.*}} = %[[CST]]) -> (vector<4x1x1x1x1x1x1x1x1xf16>)
143143
// RDNA3: memref.expand_shape {{.*}} : memref<4x1x128xi4, {{.*}}> into memref<4x1x32x4xi4, {{.*}}>
144-
// RDNA3: %{{.*}} = arith.extui %{{.*}} : vector<4x1x1x1x1x1x1x1x1x1x1x4xi4> to vector<4x1x1x1x1x1x1x1x1x1x1x4xi32>
145-
// RDNA3: %{{.*}} = arith.uitofp %{{.*}} : vector<4x1x1x1x1x1x1x1x1x1x1x4xi32> to vector<4x1x1x1x1x1x1x1x1x1x1x4xf16>
144+
// RDNA3: %{{.*}} = arith.uitofp %{{.*}} : vector<4x1x1x1x1x1x1x1x1x1x1x4xi4> to vector<4x1x1x1x1x1x1x1x1x1x1x4xf16>
146145
// RDNA3: %{{.*}} = arith.subf %{{.*}}, %{{.*}} : vector<4x1x1x1x1x1x1x1x1x1x1x4xf16>
147146
// RDNA3: %{{.*}} = arith.mulf %{{.*}}, %{{.*}} : vector<4x1x1x1x1x1x1x1x1x1x1x4xf16>
148147
// RDNA3: vector.contract {{.*}} : vector<1x1x1x1x1x1x1x1x4xf16>, vector<4x1x1x1x1x1x1x1x1x1x1x4xf16> into vector<4x1x1x1x1x1x1x1x1xf16>

‎compiler/src/iree/compiler/Codegen/SPIRV/test/lowering_matvec.mlir‎

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -50,8 +50,7 @@ func.func @i4_dequant_matvec_f32() {
5050
// CHECK: %[[READ1:.+]] = vector.transfer_read {{.+}} : memref<4096x86xf32, #hal.descriptor_type<storage_buffer>>, vector<1xf32>
5151
// CHECK: %[[READ2:.+]] = vector.transfer_read {{.+}} : memref<4096x86xf32, #hal.descriptor_type<storage_buffer>>, vector<1xf32>
5252
// CHECK: %[[READ3:.+]] = vector.transfer_read {{.+}} : memref<86x128xf32, #hal.descriptor_type<storage_buffer>>, vector<4xf32>
53-
// CHECK: %[[EXTEND:.+]] = arith.extui %[[READ0]] : vector<4xi4> to vector<4xi32>
54-
// CHECK: %[[CVT:.+]] = arith.uitofp %[[EXTEND]] : vector<4xi32> to vector<4xf32>
53+
// CHECK: %[[CVT:.+]] = arith.uitofp %[[READ0]] : vector<4xi4> to vector<4xf32>
5554
// CHECK: %[[EXTRACT0:.+]] = vector.extract %[[READ1]][0] : f32 from vector<1xf32>
5655
// CHECK: %[[BROADCAST0:.+]] = vector.broadcast %[[EXTRACT0]] : f32 to vector<4xf32>
5756
// CHECK: %[[SUB:.+]] = arith.subf %[[CVT]], %[[BROADCAST0]] : vector<4xf32>

‎compiler/src/iree/compiler/Codegen/SPIRV/test/pipeline_matvec.mlir‎

Lines changed: 4 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -73,7 +73,6 @@ hal.executable @i4_dequant_unit_matmul_f16 {
7373

7474
// CHECK-LABEL: spirv.func @i4_dequant_unit_matmul_f16
7575

76-
// CHECK-DAG: %[[CSTVEC4XI32_255:.+]] = spirv.Constant dense<255> : vector<4xi32>
7776
// CHECK-DAG: spirv.Constant dense<0> : vector<4xi32>
7877
// CHECK-DAG: %[[CSTVEC2XI32_4:.+]] = spirv.Constant dense<4> : vector<2xi32>
7978
// CHECK-DAG: %[[CSTVEC2XI32_15:.+]] = spirv.Constant dense<15> : vector<2xi32>
@@ -85,12 +84,12 @@ hal.executable @i4_dequant_unit_matmul_f16 {
8584
// CHECK: %[[SHUF01:.+]] = spirv.VectorShuffle [0 : i32, 1 : i32] %[[LOAD]], %[[LOAD]] : vector<4xi32>, vector<4xi32> -> vector<2xi32>
8685
// CHECK: %[[MASKED:.+]] = spirv.BitwiseAnd %[[SHUF01]], %[[CSTVEC2XI32_15]] : vector<2xi32>
8786
// CHECK: %[[SHIFTED:.+]] = spirv.ShiftRightLogical %[[SHUF01]], %[[CSTVEC2XI32_4]] : vector<2xi32>, vector<2xi32>
88-
// CHECK: %[[SHUF0011:.+]] = spirv.VectorShuffle [0 : i32, 2 : i32, 1 : i32, 3 : i32] %[[MASKED]], %[[SHIFTED]] : vector<2xi32>, vector<2xi32> -> vector<4xi32>
89-
// CHECK: spirv.BitwiseAnd %[[SHUF0011]], %[[CSTVEC4XI32_255]] : vector<4xi32>
87+
// CHECK: spirv.VectorShuffle [0 : i32, 2 : i32, 1 : i32, 3 : i32] %[[MASKED]], %[[SHIFTED]] : vector<2xi32>, vector<2xi32> -> vector<4xi32>
88+
// CHECK: spirv.ConvertUToF %{{.+}} : vector<4xi32> to vector<4xf16>
9089

9190
// CHECK: spirv.VectorShuffle [2 : i32, 3 : i32] %[[LOAD:.+]], %[[LOAD:.+]] : vector<4xi32>, vector<4xi32> -> vector<2xi32>
92-
93-
// CHECK-COUNT-2: spirv.ConvertUToF %{{.+}} : vector<4xi32> to vector<4xf16>
91+
// CHECK: spirv.VectorShuffle [0 : i32, 2 : i32, 1 : i32, 3 : i32]
92+
// CHECK: spirv.ConvertUToF %{{.+}} : vector<4xi32> to vector<4xf16>
9493
// CHECK-COUNT-2: spirv.FSub %{{.+}}, %{{.+}} : vector<4xf16>
9594
// CHECK-COUNT-4: spirv.FMul %{{.+}}, %{{.+}} : vector<4xf16>
9695
// CHECK-COUNT-2: spirv.FAdd %{{.+}}, %{{.+}} : vector<4xf16>
@@ -183,7 +182,6 @@ hal.executable @i4_dequant_matvec_f16_subgroup_64 {
183182
// CHECK-DAG: %[[C2:.+]] = spirv.Constant 2 : i32
184183
// CHECK-DAG: %[[C0:.+]] = spirv.Constant 0 : i32
185184
// CHECK-DAG: %[[CSTVEC4XF16_1:.+]] = spirv.Constant dense<1.000000e+00> : vector<4xf16>
186-
// CHECK-DAG: %[[CSTVEC4XI32_255:.+]] = spirv.Constant dense<255> : vector<4xi32>
187185

188186
// CHECK: %[[WIDX:.+]] = spirv.CompositeExtract %{{.*}}[0 : i32] : vector<3xi32>
189187
// CHECK: %[[PCPTR:.+]] = spirv.AccessChain %{{.*}}[{{.*}}, %[[C0]]] : !spirv.ptr<!spirv.struct<(!spirv.array<5 x i32, stride=4> [0])>, PushConstant>, i32, i32

‎compiler/src/iree/compiler/Codegen/SPIRV/test/pipeline_sub_byte_dequant.mlir‎

Lines changed: 5 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -48,13 +48,16 @@ hal.executable @i4_dequant {
4848
// CHECK: %[[SHIFTED:.+]] = spirv.ShiftRightLogical %[[BYTE1]]
4949
// CHECK: %[[COPIED:.+]] = spirv.VectorShuffle [0 : i32, 2 : i32, 1 : i32, 3 : i32] %[[MASKED]], %[[SHIFTED]] : vector<2xi32>, vector<2xi32> -> vector<4xi32>
5050
// CHECK: spirv.BitwiseAnd %[[COPIED]]
51+
// CHECK: spirv.ConvertUToF {{.+}} : vector<4xi32> to vector<4xf32>
5152
// CHECK: spirv.VectorShuffle [2 : i32, 3 : i32] {{.*}} : vector<4xi32>, vector<4xi32> -> vector<2xi32>
53+
// CHECK: spirv.VectorShuffle [0 : i32, 2 : i32, 1 : i32, 3 : i32]
54+
// CHECK: spirv.ConvertUToF {{.+}} : vector<4xi32> to vector<4xf32>
5255
// CHECK: spirv.VectorShuffle [0 : i32, 1 : i32]
5356
// CHECK: spirv.VectorShuffle [0 : i32, 2 : i32, 1 : i32, 3 : i32]
57+
// CHECK: spirv.ConvertUToF {{.+}} : vector<4xi32> to vector<4xf32>
5458
// CHECK: spirv.VectorShuffle [2 : i32, 3 : i32]
5559
// CHECK: spirv.VectorShuffle [0 : i32, 2 : i32, 1 : i32, 3 : i32]
5660
// CHECK-NOT: spirv.VectorShuffle
57-
58-
// CHECK-COUNT-4: spirv.ConvertUToF {{.+}} : vector<4xi32> to vector<4xf32>
61+
// CHECK: spirv.ConvertUToF {{.+}} : vector<4xi32> to vector<4xf32>
5962
// CHECK-COUNT-4: spirv.FSub
6063
// CHECK-COUNT-4: spirv.FMul

‎third_party/llvm-project‎

Submodule llvm-project updated 1700 files

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