@@ -7202,7 +7202,7 @@ static MachineInstr *fuseInst(MachineFunction &MF, unsigned Opcode,
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return MIB;
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}
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- static MachineInstr *MakeM0Inst (const TargetInstrInfo &TII, unsigned Opcode,
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+ static MachineInstr *makeM0Inst (const TargetInstrInfo &TII, unsigned Opcode,
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ArrayRef<MachineOperand> MOs,
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MachineBasicBlock::iterator InsertPt,
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MachineInstr &MI) {
@@ -7282,6 +7282,12 @@ MachineInstr *X86InstrInfo::foldMemoryOperandCustom(
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}
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}
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break ;
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+ case X86::MOV32r0:
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+ if (auto *NewMI =
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+ makeM0Inst (*this , (Size == 4 ) ? X86::MOV32mi : X86::MOV64mi32, MOs,
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+ InsertPt, MI))
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+ return NewMI;
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+ break ;
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}
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return nullptr ;
@@ -7382,10 +7388,6 @@ MachineInstr *X86InstrInfo::foldMemoryOperandImpl(
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Size, Alignment))
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return CustomMI;
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- if (Opc == X86::MOV32r0)
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- if (auto *NewMI = MakeM0Inst (*this , X86::MOV32mi, MOs, InsertPt, MI))
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- return NewMI;
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-
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// Folding a memory location into the two-address part of a two-address
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// instruction is different than folding it other places. It requires
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// replacing the *two* registers with the memory location.
@@ -7483,6 +7485,10 @@ MachineInstr *X86InstrInfo::foldMemoryOperandImpl(
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for (auto Op : Ops) {
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MachineOperand &MO = MI.getOperand (Op);
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auto SubReg = MO.getSubReg ();
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+ // MOV32r0 is special b/c it's used to clear a 64-bit register too.
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+ // (See patterns for MOV32r0 in TD files).
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+ if (MI.getOpcode () == X86::MOV32r0 && SubReg == X86::sub_32bit)
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+ continue ;
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if (SubReg && (MO.isDef () || SubReg == X86::sub_8bit_hi))
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return nullptr ;
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}
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