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[AMDGPU][True16][MC] true16 for v_fract_f16 (llvm#120647)
Support true16 format for v_fract_f16 in MC
1 parent 20d491b commit dc307be

29 files changed

+1461
-462
lines changed

‎llvm/lib/Target/AMDGPU/VOP1Instructions.td‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1044,7 +1044,7 @@ defm V_CEIL_F16_t16 : VOP1_Real_FULL_t16_gfx11_gfx12<0x05c, "v_ceil_f16
10441044
defm V_CEIL_F16_fake16 : VOP1_Real_FULL_t16_gfx11_gfx12<0x05c, "v_ceil_f16">;
10451045
defm V_TRUNC_F16 : VOP1_Real_FULL_t16_and_fake16_gfx11_gfx12<0x05d, "v_trunc_f16">;
10461046
defm V_RNDNE_F16_fake16 : VOP1_Real_FULL_t16_gfx11_gfx12<0x05e, "v_rndne_f16">;
1047-
defm V_FRACT_F16_fake16 : VOP1_Real_FULL_t16_gfx11_gfx12<0x05f, "v_fract_f16">;
1047+
defm V_FRACT_F16 : VOP1_Real_FULL_t16_and_fake16_gfx11_gfx12<0x05f, "v_fract_f16">;
10481048
defm V_SIN_F16 : VOP1_Real_FULL_t16_and_fake16_gfx11_gfx12<0x060, "v_sin_f16">;
10491049
defm V_COS_F16_fake16 : VOP1_Real_FULL_t16_gfx11_gfx12<0x061, "v_cos_f16">;
10501050
defm V_SAT_PK_U8_I16 : VOP1_Real_FULL_t16_and_fake16_gfx11_gfx12<0x062, "v_sat_pk_u8_i16">;

‎llvm/test/CodeGen/AMDGPU/fract-match.ll‎

Lines changed: 428 additions & 0 deletions
Large diffs are not rendered by default.

‎llvm/test/MC/AMDGPU/gfx11_asm_vop1.s‎

Lines changed: 45 additions & 30 deletions
Original file line numberDiff line numberDiff line change
@@ -2093,50 +2093,65 @@ v_floor_f64 v[5:6], src_scc
20932093
v_floor_f64 v[254:255], 0xaf123456
20942094
// GFX11: v_floor_f64_e32 v[254:255], 0xaf123456 ; encoding: [0xff,0x34,0xfc,0x7f,0x56,0x34,0x12,0xaf]
20952095

2096-
v_fract_f16 v5, v1
2097-
// GFX11: v_fract_f16_e32 v5, v1 ; encoding: [0x01,0xbf,0x0a,0x7e]
2096+
v_fract_f16 v5.l, v1.l
2097+
// GFX11: v_fract_f16_e32 v5.l, v1.l ; encoding: [0x01,0xbf,0x0a,0x7e]
20982098

2099-
v_fract_f16 v5, v127
2100-
// GFX11: v_fract_f16_e32 v5, v127 ; encoding: [0x7f,0xbf,0x0a,0x7e]
2099+
v_fract_f16 v5.l, v127.l
2100+
// GFX11: v_fract_f16_e32 v5.l, v127.l ; encoding: [0x7f,0xbf,0x0a,0x7e]
21012101

2102-
v_fract_f16 v5, s1
2103-
// GFX11: v_fract_f16_e32 v5, s1 ; encoding: [0x01,0xbe,0x0a,0x7e]
2102+
v_fract_f16 v5.l, s1
2103+
// GFX11: v_fract_f16_e32 v5.l, s1 ; encoding: [0x01,0xbe,0x0a,0x7e]
21042104

2105-
v_fract_f16 v5, s105
2106-
// GFX11: v_fract_f16_e32 v5, s105 ; encoding: [0x69,0xbe,0x0a,0x7e]
2105+
v_fract_f16 v5.l, s105
2106+
// GFX11: v_fract_f16_e32 v5.l, s105 ; encoding: [0x69,0xbe,0x0a,0x7e]
21072107

2108-
v_fract_f16 v5, vcc_lo
2109-
// GFX11: v_fract_f16_e32 v5, vcc_lo ; encoding: [0x6a,0xbe,0x0a,0x7e]
2108+
v_fract_f16 v5.l, vcc_lo
2109+
// GFX11: v_fract_f16_e32 v5.l, vcc_lo ; encoding: [0x6a,0xbe,0x0a,0x7e]
21102110

2111-
v_fract_f16 v5, vcc_hi
2112-
// GFX11: v_fract_f16_e32 v5, vcc_hi ; encoding: [0x6b,0xbe,0x0a,0x7e]
2111+
v_fract_f16 v5.l, vcc_hi
2112+
// GFX11: v_fract_f16_e32 v5.l, vcc_hi ; encoding: [0x6b,0xbe,0x0a,0x7e]
21132113

2114-
v_fract_f16 v5, ttmp15
2115-
// GFX11: v_fract_f16_e32 v5, ttmp15 ; encoding: [0x7b,0xbe,0x0a,0x7e]
2114+
v_fract_f16 v5.l, ttmp15
2115+
// GFX11: v_fract_f16_e32 v5.l, ttmp15 ; encoding: [0x7b,0xbe,0x0a,0x7e]
21162116

2117-
v_fract_f16 v5, m0
2118-
// GFX11: v_fract_f16_e32 v5, m0 ; encoding: [0x7d,0xbe,0x0a,0x7e]
2117+
v_fract_f16 v5.l, m0
2118+
// GFX11: v_fract_f16_e32 v5.l, m0 ; encoding: [0x7d,0xbe,0x0a,0x7e]
21192119

2120-
v_fract_f16 v5, exec_lo
2121-
// GFX11: v_fract_f16_e32 v5, exec_lo ; encoding: [0x7e,0xbe,0x0a,0x7e]
2120+
v_fract_f16 v5.l, exec_lo
2121+
// GFX11: v_fract_f16_e32 v5.l, exec_lo ; encoding: [0x7e,0xbe,0x0a,0x7e]
21222122

2123-
v_fract_f16 v5, exec_hi
2124-
// GFX11: v_fract_f16_e32 v5, exec_hi ; encoding: [0x7f,0xbe,0x0a,0x7e]
2123+
v_fract_f16 v5.l, exec_hi
2124+
// GFX11: v_fract_f16_e32 v5.l, exec_hi ; encoding: [0x7f,0xbe,0x0a,0x7e]
21252125

2126-
v_fract_f16 v5, null
2127-
// GFX11: v_fract_f16_e32 v5, null ; encoding: [0x7c,0xbe,0x0a,0x7e]
2126+
v_fract_f16 v5.l, null
2127+
// GFX11: v_fract_f16_e32 v5.l, null ; encoding: [0x7c,0xbe,0x0a,0x7e]
21282128

2129-
v_fract_f16 v5, -1
2130-
// GFX11: v_fract_f16_e32 v5, -1 ; encoding: [0xc1,0xbe,0x0a,0x7e]
2129+
v_fract_f16 v5.l, -1
2130+
// GFX11: v_fract_f16_e32 v5.l, -1 ; encoding: [0xc1,0xbe,0x0a,0x7e]
21312131

2132-
v_fract_f16 v5, 0.5
2133-
// GFX11: v_fract_f16_e32 v5, 0.5 ; encoding: [0xf0,0xbe,0x0a,0x7e]
2132+
v_fract_f16 v5.l, 0.5
2133+
// GFX11: v_fract_f16_e32 v5.l, 0.5 ; encoding: [0xf0,0xbe,0x0a,0x7e]
21342134

2135-
v_fract_f16 v5, src_scc
2136-
// GFX11: v_fract_f16_e32 v5, src_scc ; encoding: [0xfd,0xbe,0x0a,0x7e]
2135+
v_fract_f16 v5.l, src_scc
2136+
// GFX11: v_fract_f16_e32 v5.l, src_scc ; encoding: [0xfd,0xbe,0x0a,0x7e]
21372137

2138-
v_fract_f16 v127, 0xfe0b
2139-
// GFX11: v_fract_f16_e32 v127, 0xfe0b ; encoding: [0xff,0xbe,0xfe,0x7e,0x0b,0xfe,0x00,0x00]
2138+
v_fract_f16 v127.l, 0xfe0b
2139+
// GFX11: v_fract_f16_e32 v127.l, 0xfe0b ; encoding: [0xff,0xbe,0xfe,0x7e,0x0b,0xfe,0x00,0x00]
2140+
2141+
v_fract_f16 v5.l, v1.h
2142+
// GFX11: v_fract_f16_e32 v5.l, v1.h ; encoding: [0x81,0xbf,0x0a,0x7e]
2143+
2144+
v_fract_f16 v5.l, v127.h
2145+
// GFX11: v_fract_f16_e32 v5.l, v127.h ; encoding: [0xff,0xbf,0x0a,0x7e]
2146+
2147+
v_fract_f16 v127.l, 0.5
2148+
// GFX11: v_fract_f16_e32 v127.l, 0.5 ; encoding: [0xf0,0xbe,0xfe,0x7e]
2149+
2150+
v_fract_f16 v5.h, src_scc
2151+
// GFX11: v_fract_f16_e32 v5.h, src_scc ; encoding: [0xfd,0xbe,0x0a,0x7f]
2152+
2153+
v_fract_f16 v127.h, 0xfe0b
2154+
// GFX11: v_fract_f16_e32 v127.h, 0xfe0b ; encoding: [0xff,0xbe,0xfe,0x7f,0x0b,0xfe,0x00,0x00]
21402155

21412156
v_fract_f32 v5, v1
21422157
// GFX11: v_fract_f32_e32 v5, v1 ; encoding: [0x01,0x41,0x0a,0x7e]

‎llvm/test/MC/AMDGPU/gfx11_asm_vop1_dpp16.s‎

Lines changed: 37 additions & 28 deletions
Original file line numberDiff line numberDiff line change
@@ -1598,47 +1598,56 @@ v_floor_f32 v5, v1 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
15981598
v_floor_f32 v255, -|v255| row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
15991599
// GFX11: v_floor_f32_dpp v255, -|v255| row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x48,0xfe,0x7f,0xff,0x6f,0x35,0x30]
16001600

1601-
v_fract_f16 v5, v1 quad_perm:[3,2,1,0]
1602-
// GFX11: v_fract_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0xbe,0x0a,0x7e,0x01,0x1b,0x00,0xff]
1601+
v_fract_f16 v5.l, v1.l quad_perm:[3,2,1,0]
1602+
// GFX11: v_fract_f16_dpp v5.l, v1.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0xbe,0x0a,0x7e,0x01,0x1b,0x00,0xff]
16031603

1604-
v_fract_f16 v5, v1 quad_perm:[0,1,2,3]
1605-
// GFX11: v_fract_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0xbe,0x0a,0x7e,0x01,0xe4,0x00,0xff]
1604+
v_fract_f16 v5.l, v1.l quad_perm:[0,1,2,3]
1605+
// GFX11: v_fract_f16_dpp v5.l, v1.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0xbe,0x0a,0x7e,0x01,0xe4,0x00,0xff]
16061606

1607-
v_fract_f16 v5, v1 row_mirror
1608-
// GFX11: v_fract_f16_dpp v5, v1 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0xbe,0x0a,0x7e,0x01,0x40,0x01,0xff]
1607+
v_fract_f16 v5.l, v1.l row_mirror
1608+
// GFX11: v_fract_f16_dpp v5.l, v1.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0xbe,0x0a,0x7e,0x01,0x40,0x01,0xff]
16091609

1610-
v_fract_f16 v5, v1 row_half_mirror
1611-
// GFX11: v_fract_f16_dpp v5, v1 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0xbe,0x0a,0x7e,0x01,0x41,0x01,0xff]
1610+
v_fract_f16 v5.l, v1.l row_half_mirror
1611+
// GFX11: v_fract_f16_dpp v5.l, v1.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0xbe,0x0a,0x7e,0x01,0x41,0x01,0xff]
16121612

1613-
v_fract_f16 v5, v1 row_shl:1
1614-
// GFX11: v_fract_f16_dpp v5, v1 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0xbe,0x0a,0x7e,0x01,0x01,0x01,0xff]
1613+
v_fract_f16 v5.l, v1.l row_shl:1
1614+
// GFX11: v_fract_f16_dpp v5.l, v1.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0xbe,0x0a,0x7e,0x01,0x01,0x01,0xff]
16151615

1616-
v_fract_f16 v5, v1 row_shl:15
1617-
// GFX11: v_fract_f16_dpp v5, v1 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0xbe,0x0a,0x7e,0x01,0x0f,0x01,0xff]
1616+
v_fract_f16 v5.l, v1.l row_shl:15
1617+
// GFX11: v_fract_f16_dpp v5.l, v1.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0xbe,0x0a,0x7e,0x01,0x0f,0x01,0xff]
16181618

1619-
v_fract_f16 v5, v1 row_shr:1
1620-
// GFX11: v_fract_f16_dpp v5, v1 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0xbe,0x0a,0x7e,0x01,0x11,0x01,0xff]
1619+
v_fract_f16 v5.l, v1.l row_shr:1
1620+
// GFX11: v_fract_f16_dpp v5.l, v1.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0xbe,0x0a,0x7e,0x01,0x11,0x01,0xff]
16211621

1622-
v_fract_f16 v5, v1 row_shr:15
1623-
// GFX11: v_fract_f16_dpp v5, v1 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0xbe,0x0a,0x7e,0x01,0x1f,0x01,0xff]
1622+
v_fract_f16 v5.l, v1.l row_shr:15
1623+
// GFX11: v_fract_f16_dpp v5.l, v1.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0xbe,0x0a,0x7e,0x01,0x1f,0x01,0xff]
16241624

1625-
v_fract_f16 v5, v1 row_ror:1
1626-
// GFX11: v_fract_f16_dpp v5, v1 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0xbe,0x0a,0x7e,0x01,0x21,0x01,0xff]
1625+
v_fract_f16 v5.l, v1.l row_ror:1
1626+
// GFX11: v_fract_f16_dpp v5.l, v1.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0xbe,0x0a,0x7e,0x01,0x21,0x01,0xff]
16271627

1628-
v_fract_f16 v5, v1 row_ror:15
1629-
// GFX11: v_fract_f16_dpp v5, v1 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0xbe,0x0a,0x7e,0x01,0x2f,0x01,0xff]
1628+
v_fract_f16 v5.l, v1.l row_ror:15
1629+
// GFX11: v_fract_f16_dpp v5.l, v1.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0xbe,0x0a,0x7e,0x01,0x2f,0x01,0xff]
16301630

1631-
v_fract_f16 v5, v1 row_share:0 row_mask:0xf bank_mask:0xf
1632-
// GFX11: v_fract_f16_dpp v5, v1 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0xbe,0x0a,0x7e,0x01,0x50,0x01,0xff]
1631+
v_fract_f16 v5.l, v1.l row_share:0 row_mask:0xf bank_mask:0xf
1632+
// GFX11: v_fract_f16_dpp v5.l, v1.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0xbe,0x0a,0x7e,0x01,0x50,0x01,0xff]
16331633

1634-
v_fract_f16 v5, v1 row_share:15 row_mask:0x0 bank_mask:0x1
1635-
// GFX11: v_fract_f16_dpp v5, v1 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0xbe,0x0a,0x7e,0x01,0x5f,0x01,0x01]
1634+
v_fract_f16 v5.l, v1.l row_share:15 row_mask:0x0 bank_mask:0x1
1635+
// GFX11: v_fract_f16_dpp v5.l, v1.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0xbe,0x0a,0x7e,0x01,0x5f,0x01,0x01]
16361636

1637-
v_fract_f16 v5, v1 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
1638-
// GFX11: v_fract_f16_dpp v5, v1 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0xbe,0x0a,0x7e,0x01,0x60,0x09,0x13]
1637+
v_fract_f16 v5.l, v1.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1
1638+
// GFX11: v_fract_f16_dpp v5.l, v1.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0xbe,0x0a,0x7e,0x01,0x60,0x09,0x13]
16391639

1640-
v_fract_f16 v127, -|v127| row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
1641-
// GFX11: v_fract_f16_dpp v127, -|v127| row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xbe,0xfe,0x7e,0x7f,0x6f,0x35,0x30]
1640+
v_fract_f16 v127.l, -|v127.l| row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1
1641+
// GFX11: v_fract_f16_dpp v127.l, -|v127.l| row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xbe,0xfe,0x7e,0x7f,0x6f,0x35,0x30]
1642+
1643+
v_fract_f16 v127.l, v127.l row_share:15 row_mask:0x0 bank_mask:0x1
1644+
// GFX11: v_fract_f16_dpp v127.l, v127.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0xbe,0xfe,0x7e,0x7f,0x5f,0x01,0x01]
1645+
1646+
v_fract_f16 v5.h, v1.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
1647+
// GFX11: v_fract_f16_dpp v5.h, v1.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0xbe,0x0a,0x7f,0x81,0x60,0x09,0x13]
1648+
1649+
v_fract_f16 v127.h, -|v127.h| row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
1650+
// GFX11: v_fract_f16_dpp v127.h, -|v127.h| row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xbe,0xfe,0x7f,0xff,0x6f,0x35,0x30]
16421651

16431652
v_fract_f32 v5, v1 quad_perm:[3,2,1,0]
16441653
// GFX11: v_fract_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x40,0x0a,0x7e,0x01,0x1b,0x00,0xff]

‎llvm/test/MC/AMDGPU/gfx11_asm_vop1_dpp8.s‎

Lines changed: 15 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -377,14 +377,23 @@ v_floor_f32 v5, v1 dpp8:[7,6,5,4,3,2,1,0] fi:1
377377
v_floor_f32 v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:0
378378
// GFX11: v_floor_f32_dpp v255, v255 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0x48,0xfe,0x7f,0xff,0x00,0x00,0x00]
379379

380-
v_fract_f16 v5, v1 dpp8:[7,6,5,4,3,2,1,0]
381-
// GFX11: v_fract_f16_dpp v5, v1 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0xbe,0x0a,0x7e,0x01,0x77,0x39,0x05]
380+
v_fract_f16 v5.l, v1.l dpp8:[7,6,5,4,3,2,1,0]
381+
// GFX11: v_fract_f16_dpp v5.l, v1.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0xbe,0x0a,0x7e,0x01,0x77,0x39,0x05]
382382

383-
v_fract_f16 v5, v1 dpp8:[7,6,5,4,3,2,1,0] fi:1
384-
// GFX11: v_fract_f16_dpp v5, v1 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0xbe,0x0a,0x7e,0x01,0x77,0x39,0x05]
383+
v_fract_f16 v5.l, v1.l dpp8:[7,6,5,4,3,2,1,0] fi:1
384+
// GFX11: v_fract_f16_dpp v5.l, v1.l dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0xbe,0x0a,0x7e,0x01,0x77,0x39,0x05]
385385

386-
v_fract_f16 v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:0
387-
// GFX11: v_fract_f16_dpp v127, v127 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xbe,0xfe,0x7e,0x7f,0x00,0x00,0x00]
386+
v_fract_f16 v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0]
387+
// GFX11: v_fract_f16_dpp v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xbe,0xfe,0x7e,0x7f,0x00,0x00,0x00]
388+
389+
v_fract_f16 v127.l, v127.l dpp8:[7,6,5,4,3,2,1,0]
390+
// GFX11: v_fract_f16_dpp v127.l, v127.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0xbe,0xfe,0x7e,0x7f,0x77,0x39,0x05]
391+
392+
v_fract_f16 v5.h, v1.h dpp8:[7,6,5,4,3,2,1,0] fi:1
393+
// GFX11: v_fract_f16_dpp v5.h, v1.h dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0xbe,0x0a,0x7f,0x81,0x77,0x39,0x05]
394+
395+
v_fract_f16 v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] fi:0
396+
// GFX11: v_fract_f16_dpp v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xbe,0xfe,0x7f,0xff,0x00,0x00,0x00]
388397

389398
v_fract_f32 v5, v1 dpp8:[7,6,5,4,3,2,1,0]
390399
// GFX11: v_fract_f32_dpp v5, v1 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x40,0x0a,0x7e,0x01,0x77,0x39,0x05]

‎llvm/test/MC/AMDGPU/gfx11_asm_vop1_t16_err.s‎

Lines changed: 42 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -458,6 +458,12 @@ v_floor_f16_e32 v5.l, v199.l quad_perm:[3,2,1,0]
458458
v_fract_f16_e32 v128, 0xfe0b
459459
// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
460460

461+
v_fract_f16_e32 v128.h, 0xfe0b
462+
// GFX11: :[[@LINE-1]]:17: error: invalid operand for instruction
463+
464+
v_fract_f16_e32 v128.l, 0xfe0b
465+
// GFX11: :[[@LINE-1]]:17: error: invalid operand for instruction
466+
461467
v_fract_f16_e32 v255, v1
462468
// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
463469

@@ -467,6 +473,24 @@ v_fract_f16_e32 v255, v1 dpp8:[7,6,5,4,3,2,1,0]
467473
v_fract_f16_e32 v255, v1 quad_perm:[3,2,1,0]
468474
// GFX11: :[[@LINE-1]]:26: error: invalid operand for instruction
469475

476+
v_fract_f16_e32 v255.h, v1.h
477+
// GFX11: :[[@LINE-1]]:17: error: invalid operand for instruction
478+
479+
v_fract_f16_e32 v255.h, v1.h dpp8:[7,6,5,4,3,2,1,0]
480+
// GFX11: :[[@LINE-1]]:17: error: invalid operand for instruction
481+
482+
v_fract_f16_e32 v255.h, v1.h quad_perm:[3,2,1,0]
483+
// GFX11: :[[@LINE-1]]:17: error: invalid operand for instruction
484+
485+
v_fract_f16_e32 v255.l, v1.l
486+
// GFX11: :[[@LINE-1]]:17: error: invalid operand for instruction
487+
488+
v_fract_f16_e32 v255.l, v1.l dpp8:[7,6,5,4,3,2,1,0]
489+
// GFX11: :[[@LINE-1]]:17: error: invalid operand for instruction
490+
491+
v_fract_f16_e32 v255.l, v1.l quad_perm:[3,2,1,0]
492+
// GFX11: :[[@LINE-1]]:17: error: invalid operand for instruction
493+
470494
v_fract_f16_e32 v5, v199
471495
// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
472496

@@ -476,6 +500,24 @@ v_fract_f16_e32 v5, v199 dpp8:[7,6,5,4,3,2,1,0]
476500
v_fract_f16_e32 v5, v199 quad_perm:[3,2,1,0]
477501
// GFX11: :[[@LINE-1]]:26: error: invalid operand for instruction
478502

503+
v_fract_f16_e32 v5.h, v199.h
504+
// GFX11: :[[@LINE-1]]:23: error: invalid operand for instruction
505+
506+
v_fract_f16_e32 v5.h, v199.h dpp8:[7,6,5,4,3,2,1,0]
507+
// GFX11: :[[@LINE-1]]:23: error: invalid operand for instruction
508+
509+
v_fract_f16_e32 v5.h, v199.h quad_perm:[3,2,1,0]
510+
// GFX11: :[[@LINE-1]]:23: error: invalid operand for instruction
511+
512+
v_fract_f16_e32 v5.l, v199.l
513+
// GFX11: :[[@LINE-1]]:23: error: invalid operand for instruction
514+
515+
v_fract_f16_e32 v5.l, v199.l dpp8:[7,6,5,4,3,2,1,0]
516+
// GFX11: :[[@LINE-1]]:23: error: invalid operand for instruction
517+
518+
v_fract_f16_e32 v5.l, v199.l quad_perm:[3,2,1,0]
519+
// GFX11: :[[@LINE-1]]:23: error: invalid operand for instruction
520+
479521
v_frexp_exp_i16_f16_e32 v128.h, 0xfe0b
480522
// GFX11: :[[@LINE-1]]:25: error: invalid operand for instruction
481523

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