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added target lpc1754
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‎.github/workflows/build.yml‎

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strategy:
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matrix:
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cpu: [atsam3x8e, atsam4s2b, lpc802, lpc1752, lpc1756, lpc1759, lpc1788, lpc55s66, max32625, max32660, mb9bf566k, stm32f103, stm32f407, stm32h723, tmpm373]
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cpu: [atsam3x8e, atsam4s2b, lpc802, lpc1752, lpc1754, lpc1756, lpc1759, lpc1788, lpc55s66, max32625, max32660, mb9bf566k, stm32f103, stm32f407, stm32h723, tmpm373]
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steps:
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- uses: actions/checkout@v4

‎targets/chip/lpc1754/.gitignore‎

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lpc1754.h

‎targets/chip/lpc1754/CMakeLists.txt‎

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# export our linkerscript
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set(TARGET_LINKERSCRIPT "${CMAKE_CURRENT_SOURCE_DIR}/linkerscript.ld" PARENT_SCOPE)
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# set the lpc1754 cpu options as a seperate target so the driver layer can link agains klib
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add_library(target_cpu_options INTERFACE)
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set_target_properties(target_cpu_options PROPERTIES FOLDER "klib")
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# alias projectname::target_cpu_options to target_cpu_options
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add_library(${PROJECT_NAME}::target_cpu_options ALIAS target_cpu_options)
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# include the arm directory for all the cmsis files
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target_include_directories(target_cpu_options INTERFACE ${CMAKE_SOURCE_DIR}/targets/arm/)
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# set the cpu options for the compiler
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target_compile_options(target_cpu_options INTERFACE "-march=armv7-m")
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target_compile_options(target_cpu_options INTERFACE "-mcpu=cortex-m3")
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target_compile_options(target_cpu_options INTERFACE "-mthumb")
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# set the cpu options for the linker
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target_link_options(target_cpu_options INTERFACE "-march=armv7-m")
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target_link_options(target_cpu_options INTERFACE "-mcpu=cortex-m3")
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target_link_options(target_cpu_options INTERFACE "-mthumb")
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# other compiler settings
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target_compile_options(target_cpu_options INTERFACE "-Wno-attributes")
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target_compile_options(target_cpu_options INTERFACE "-fno-non-call-exceptions")
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target_compile_options(target_cpu_options INTERFACE "-fno-common")
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target_compile_options(target_cpu_options INTERFACE "-ffunction-sections")
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target_compile_options(target_cpu_options INTERFACE "-fdata-sections")
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target_compile_options(target_cpu_options INTERFACE "-fno-exceptions")
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target_compile_options(target_cpu_options INTERFACE "-fno-asynchronous-unwind-tables")
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# cpu lpc1754 target drivers
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set(SOURCES
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${CMAKE_CURRENT_SOURCE_DIR}/../../arm/vector_table/cortex-m3.cpp
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)
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set(HEADERS_PRIVATE
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)
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set(HEADERS_PUBLIC
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)
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# add the target_cpu library
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add_library(target_cpu OBJECT
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${SOURCES}
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${HEADERS_PUBLIC}
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${HEADERS_PRIVATE}
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)
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set_target_properties(target_cpu PROPERTIES FOLDER "klib")
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# alias projectname::target_cpu to target_cpu
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add_library(${PROJECT_NAME}::target_cpu ALIAS target_cpu)
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# enable C++20 support for the library
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target_compile_features(target_cpu PUBLIC cxx_std_20)
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# set the target_cpu for klib
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get_filename_component(TARGET_CPU_FOLDER ${CMAKE_CURRENT_SOURCE_DIR} NAME)
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set(TARGET_CPU ${TARGET_CPU_FOLDER} PARENT_SCOPE)
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target_compile_definitions(target_cpu PUBLIC "TARGET_CPU=${TARGET_CPU}")
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# add target specific compile options
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target_compile_options(target_cpu PUBLIC $<$<COMPILE_LANGUAGE:CXX>:-Wno-volatile>)
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# link to klib and target_cpu_options
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target_link_libraries(target_cpu PUBLIC target_cpu_options)
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target_link_libraries(target_cpu PUBLIC klib)
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# Global includes. Used by all targets
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# Note:
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# - header can be included by C++ code `#include <target/target.hpp>`
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# - header location in project: ${CMAKE_CURRENT_BINARY_DIR}/generated_headers
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target_include_directories(
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target_cpu PUBLIC
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"$<BUILD_INTERFACE:${CMAKE_CURRENT_SOURCE_DIR}>"
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"$<BUILD_INTERFACE:${CMAKE_CURRENT_SOURCE_DIR}>"
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"$<BUILD_INTERFACE:${GENERATED_HEADERS_DIR}>"
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)

‎targets/chip/lpc1754/io/can.hpp‎

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#ifndef KLIB_LPC1754_CAN_HPP
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#define KLIB_LPC1754_CAN_HPP
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#include <cstdint>
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#include <targets/core/nxp/lpc175x/can.hpp>
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#include "pins.hpp"
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namespace klib::lpc1754::io::periph::detail::can {
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enum class mode {
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rd,
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td,
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};
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template <typename Pin, mode Type, typename Periph>
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struct can {
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// pin of the peripheral
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using pin = Pin;
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// type of the pin
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constexpr static mode type = Type;
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// alternate function
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using periph = Periph;
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};
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}
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namespace klib::lpc1754::io::periph::lqfp_80 {
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template <
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typename Td = pins::package::lqfp_80::p38
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>
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struct can0 {
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// peripheral id (e.g can0, can1)
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constexpr static uint32_t id = 0;
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// peripheral clock bit position
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constexpr static uint32_t clock_id = 13;
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// interrupt id (including the arm vector table)
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constexpr static uint32_t interrupt_id = 41;
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// port to the CAN hardware
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static inline CAN1_Type *const port = CAN1;
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// amount of hardware buffers for transmitting data
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constexpr static uint32_t tx_buffers = 3;
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// pins allowed per output pin. Used for determining if a pin is valid on compile time
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using td_pins = std::tuple<
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detail::can::can<pins::package::lqfp_80::p38, detail::can::mode::td, core::lpc175x::io::detail::alternate::func_1>,
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detail::can::can<pins::package::lqfp_80::p44, detail::can::mode::td, core::lpc175x::io::detail::alternate::func_3>
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>;
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// pin configuration. Uses above mapping ()
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using rd = detail::can::can<pins::package::lqfp_80::p37, detail::can::mode::rd, core::lpc175x::io::detail::alternate::func_1>;
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using td = std::tuple_element<klib::io::peripheral::get_index<Td, td_pins>(), td_pins>::type;
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};
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struct can1 {
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// peripheral id (e.g can0, can1)
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constexpr static uint32_t id = 1;
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// peripheral clock bit position
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constexpr static uint32_t clock_id = 14;
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// interrupt id (including the arm vector table)
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constexpr static uint32_t interrupt_id = 41;
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// port to the CAN hardware
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static inline CAN1_Type *const port = CAN2;
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// amount of hardware buffers for transmitting data
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constexpr static uint32_t tx_buffers = 3;
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// P2.7 and P2.8 (80 pin package does not have the following so only 1 configuration for can1)
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using rd = detail::can::can<pins::package::lqfp_80::p51, detail::can::mode::rd, core::lpc175x::io::detail::alternate::func_1>;
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using td = detail::can::can<pins::package::lqfp_80::p50, detail::can::mode::td, core::lpc175x::io::detail::alternate::func_1>;
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};
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}
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namespace klib::lpc1754::io {
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/**
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* @brief lpc1754 can driver
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*
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* @tparam Can
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* @tparam CanTxBuffers amount of tx hardware buffers used. Can help
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* when a protocol needs a specific order of messages
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*/
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template <typename Can, uint32_t CanTxBuffers = Can::tx_buffers>
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using can = core::lpc175x::io::can<Can, CanTxBuffers>;
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}
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#endif

‎targets/chip/lpc1754/io/clocks.hpp‎

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#ifndef KLIB_LPC1754_CLOCKS_HPP
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#define KLIB_LPC1754_CLOCKS_HPP
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#include <targets/core/nxp/lpc175x/clocks.hpp>
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namespace klib::lpc1754::io {
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using clocks = klib::core::lpc175x::io::clocks;
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}
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#endif

‎targets/chip/lpc1754/io/dma.hpp‎

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#ifndef KLIB_LPC1754_DMA_HPP
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#define KLIB_LPC1754_DMA_HPP
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#include <array>
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#include <targets/core/nxp/lpc175x/dma.hpp>
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namespace klib::lpc1754::io::periph {
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struct dma0 {
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// peripheral id (e.g dma0, dma1)
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constexpr static uint32_t id = 0;
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// interrupt id (including the arm vector table)
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constexpr static uint32_t interrupt_id = 42;
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// peripheral clock bit position
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constexpr static uint32_t clock_id = 29;
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// port to the GPDMA hardware
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static inline GPDMA_Type *const port = GPDMA;
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// available channels in the dma
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constexpr static uint32_t max_channels = 8;
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};
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}
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namespace klib::lpc1754::io {
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template <typename Dma>
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using dma = core::lpc175x::io::dma<Dma>;
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template <typename Dma, uint8_t Channel, typename Source, typename Destination>
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using dma_channel = core::lpc175x::io::dma_channel<Dma, Channel, Source, Destination>;
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}
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#endif

‎targets/chip/lpc1754/io/flash.hpp‎

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#ifndef KLIB_LPC1754_FLASH_HPP
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#define KLIB_LPC1754_FLASH_HPP
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#include <cstdint>
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#include <targets/core/nxp/lpc17xx/flash.hpp>
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namespace klib::lpc1754::io {
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using flash = core::lpc17xx::io::flash;
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}
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#endif

‎targets/chip/lpc1754/io/i2c.hpp‎

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#ifndef KLIB_LPC1754_I2C_HPP
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#define KLIB_LPC1754_I2C_HPP
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#include <cstdint>
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#include <lpc1754.hpp>
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namespace klib::lpc1754::io::periph {
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struct i2c0 {
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// peripheral id (e.g i2c0, i2c1)
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constexpr static uint32_t id = 0;
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// interrupt id (including the arm vector table)
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constexpr static uint32_t interrupt_id = 26;
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// port to the I2C hardware
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static inline I2C0_Type *const port = I2C0;
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};
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struct i2c1 {
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// peripheral id (e.g i2c0, i2c1)
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constexpr static uint32_t id = 1;
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// interrupt id (including the arm vector table)
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constexpr static uint32_t interrupt_id = 27;
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// port to the I2C hardware
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static inline I2C0_Type *const port = I2C1;
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};
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struct i2c2 {
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// peripheral id (e.g i2c0, i2c1)
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constexpr static uint32_t id = 2;
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// interrupt id (including the arm vector table)
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constexpr static uint32_t interrupt_id = 28;
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// port to the I2C hardware
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static inline I2C0_Type *const port = I2C2;
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};
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}
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#endif

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