changed pll setup to use crystal frequency as input instead of final frequency

Author: itzandroidtab

targets/chip/lpc1752/startup.cpp

@@ -20,9 +20,9 @@ void __attribute__((__constructor__(101))) __target_startup() {
 
     // setup the clock to 96Mhz (in this example we are using a 12Mhz
     // oscillator)
-    // (((15 + 1) * 2 * 12Mhz) / (0 + 1) = 384Mhz) / (3 + 1) = 96Mhz
-    clock::set_main<clock::source::main, 96'000'000, 15, 0, 3>();
-    // clock::set_main<clock::source::internal, 96'000'000, 47, 0, 3>();
+    // ((16 * 2 * 12Mhz) / 1 = 384Mhz) / 4 = 96Mhz
+    clock::set_main<clock::source::main, 12'000'000, 16, 1, 4>();
+    // clock::set_main<clock::source::internal, 12'000'000, 48, 1, 4>();
 
     // setup the irq handler before main is called. This
     // moves the vector table to ram so it can be changed

targets/chip/lpc1756/startup.cpp

@@ -20,9 +20,9 @@ void __attribute__((__constructor__(101))) __target_startup() {
 
     // setup the clock to 96Mhz (in this example we are using a 12Mhz
     // oscillator)
-    // (((15 + 1) * 2 * 12Mhz) / (0 + 1) = 384Mhz) / (3 + 1) = 96Mhz
-    clock::set_main<clock::source::main, 96'000'000, 15, 0, 3>();
-    // clock::set_main<clock::source::internal, 96'000'000, 47, 0, 3>();
+    // ((16 * 2 * 12Mhz) / 1 = 384Mhz) / 4 = 96Mhz
+    clock::set_main<clock::source::main, 12'000'000, 16, 1, 4>();
+    // clock::set_main<clock::source::internal, 12'000'000, 48, 1, 4>();
 
     // setup the irq handler before main is called. This
     // moves the vector table to ram so it can be changed

targets/chip/lpc1759/startup.cpp

@@ -18,11 +18,11 @@ void __attribute__((__constructor__(101))) __target_startup() {
     // setup the flash wait state to 4 + 1 CPU clocks
     target::io::system::flash::setup<4>();
 
-    // setup the clock to 120Mhz (in this example we are using a 12Mhz
+    // setup the clock to 96Mhz (in this example we are using a 12Mhz
     // oscillator)
-    // (((19 + 1) * 2 * 12Mhz) / (0 + 1) = 480Mhz) / (3 + 1) = 120Mhz
-    clock::set_main<clock::source::main, 120'000'000, 19, 0, 3>();
-    // clock::set_main<clock::source::internal, 96'000'000, 47, 0, 3>();
+    // ((16 * 2 * 12Mhz) / 1 = 384Mhz) / 4 = 96Mhz
+    clock::set_main<clock::source::main, 12'000'000, 16, 1, 4>();
+    // clock::set_main<clock::source::internal, 12'000'000, 48, 1, 4>();
 
     // setup the irq handler before main is called. This
     // moves the vector table to ram so it can be changed

targets/chip/lpc1788/startup.cpp

@@ -22,9 +22,9 @@ void __attribute__((__constructor__(101))) __target_startup() {
 
     // setup the clock to 120Mhz (in this example we are using a 12Mhz
     // oscillator). FCCO needs to be in range 156 - 320Mhz
-    // (((9 + 1) * 2 * 12Mhz) / (0 + 1) = 240Mhz) / (1 + 1) = 120Mhz
+    // ((10 * 2 * 12Mhz) / 1 = 240Mhz) / 2 = 120Mhz
     clock::set_main<
-        clock::source::main, 120'000'000, 9, clock::pre_divider::div_1, 1
+        clock::source::main, 12'000'000, 10, clock::pre_divider::div_1, 2
     >();
 
     // set the global peripheral clock divider to 1. All the

targets/chip/lpc802/io/system.hpp

@@ -30,7 +30,7 @@ namespace klib::lpc802::io::system {
 
     public:
         template <clock_source Clock>
-        static void set() {
+        static void set_main() {
             // check if we have a valid clock
             static_assert(
                 Clock == clock_source::mhz_9 ||
@@ -65,7 +65,7 @@ namespace klib::lpc802::io::system {
         }
 
         template <uint32_t Trim, uint32_t ClockFreq>
-        static void set() {
+        static void set_main() {
             // check if the trim value will lock up the cpu
             static_assert(
                 Trim <= (klib::exp2(18) - 1),

targets/chip/lpc802/startup.cpp

@@ -14,7 +14,7 @@ void __attribute__((__constructor__(101))) __target_startup() {
     namespace target = klib::lpc802;
 
     // change the clock frequency to 15Mhz
-    target::io::system::clock::set<target::io::system::clock::clock_source::mhz_15>();
+    target::io::system::clock::set_main<target::io::system::clock::clock_source::mhz_15>();
 
     // setup the irq handler before main is called. This
     // moves the vector table to ram so it can be changed

targets/chip/tmpm373/startup.cpp

@@ -23,7 +23,7 @@ void __attribute__((__constructor__(101))) __target_startup() {
     wdt::disable();
 
     // enable the PLL using the internal oscillator
-    target::io::system::clock::setup<
+    target::io::system::clock::set_main<
         10'000'000,
         target::io::system::clock::source::internal
     >();

targets/core/atmel/atsam4s/system.hpp

@@ -369,16 +369,19 @@ namespace klib::core::atsam4s::io::system {
          *
          * @tparam Source
          * @tparam Pll
-         * @tparam OscillatorFreq
+         * @tparam Freq
          * @tparam Multiplier
          * @tparam Div
          */
         template <
-            source Source, pll Pll, uint32_t OscillatorFreq = 0,
+            source Source, pll Pll, uint32_t Freq = 0,
             uint16_t Multiplier = 0, uint32_t Div = 0,
             prescaler Prescaler = prescaler::div_1
         >
         static void set_main() {
+            // make sure the input is valid
+            static_assert(Freq > 0, "Invalid frequency");
+
             // disable the write protect on the PMC
             target::io::power_control::write_protect<false>();
 
@@ -397,6 +400,10 @@ namespace klib::core::atsam4s::io::system {
 
             // check if we need to configure a pll
             if constexpr (Pll != pll::none) {
+                // make sure the pll inputs are valid
+                static_assert(Multiplier > 0, "Invalid multiplier");
+                static_assert(Div > 0, "Invalid divider");
+
                 // make sure the user did not enable a pll. slow clock is not
                 // supported as a pll input
                 static_assert(
@@ -416,11 +423,11 @@ namespace klib::core::atsam4s::io::system {
                 >();
 
                 // notify klib what freqency we are running
-                klib::io::clock::set(((OscillatorFreq * Multiplier) / Div) / get_divider<Prescaler>());
+                klib::io::clock::set(((Freq * Multiplier) / Div) / get_divider<Prescaler>());
             }
             else {
                 // notify klib what freqency we are running
-                klib::io::clock::set(OscillatorFreq / get_divider<Prescaler>());
+                klib::io::clock::set(Freq / get_divider<Prescaler>());
             }
 
             // enable the write protect again

targets/core/nxp/lpc175x/system.hpp

@@ -212,6 +212,23 @@ namespace klib::core::lpc175x::io::system {
 
         template <source Source, uint32_t Freq, uint16_t Multiplier, uint8_t PreDivider, uint32_t Div>
         static void set_main() {
+            // make sure the input is valid
+            static_assert(Freq > 0, "Invalid frequency");
+            static_assert(Multiplier > 0, "Invalid multiplier");
+            static_assert(Div > 0 && Div <= 256, "Invalid divider");
+            static_assert(PreDivider > 0, "Invalid pre-divider");
+
+            // calculate the fcco frequency using the oscilator and multiplier
+            constexpr static uint32_t partial_freq = (Freq * 2 * Multiplier) / klib::exp2(static_cast<uint32_t>(PreDivider));
+
+            static_assert(
+                (Multiplier == 1) || (partial_freq >= 156'000'000 && partial_freq <= 320'000'000), 
+                "Invalid Fcco output. PLL frequency needs to be between 156 and 320mhz"
+            );
+
+            // calculate the final frequency
+            constexpr static uint32_t freq = (partial_freq / Div);
+
             // disconnect the main pll if it is connected.
             if (is_connected<pll::main>()) {
                 // disconnect the pll
@@ -224,37 +241,46 @@ namespace klib::core::lpc175x::io::system {
                 enable<pll::main, false>();
             }
 
-            // enable the crystal if it is not enabled
-            if (!crystal::is_enabled()) {
-                // enable the crystal
-                crystal::enable<true>();
+            // check if we need the crystal
+            if constexpr (Source == source::main) {
+                // enable the crystal if it is not enabled
+                if (!crystal::is_enabled()) {
+                    // enable the crystal
+                    crystal::enable<true>();
+                }
             }
 
             // set the clock divider to 0
             SYSCON->CCLKCFG = 0;
 
-            // set the clock source for PLL0 to the oscillator
+            // set the clock source for the system clock
             SYSCON->CLKSRCSEL = static_cast<uint32_t>(Source);
 
-            // setup the pll
-            setup<pll::main>(Multiplier, PreDivider);
+            // check if we need to setup the pll
+            if constexpr (Multiplier > 1) {
+                // setup the pll
+                setup<pll::main>((Multiplier - 1), (PreDivider - 1));
 
-            // enable the pll after configuring it
-            enable<pll::main, true>();
+                // enable the pll after configuring it
+                enable<pll::main, true>();
+
+                // wait until the pll is locked
+                while (!is_locked<pll::main>()) {
+                    // do nothing
+                }
+            }
 
             // setup the divider to get the correct cpu frequency
-            SYSCON->CCLKCFG = Div;
+            SYSCON->CCLKCFG = (Div - 1);
 
-            // wait until the pll is locked
-            while (!is_locked<pll::main>()) {
-                // do nothing
+            // check if we need to connect the pll
+            if constexpr (Multiplier > 1) {
+                // connect the pll
+                connect<pll::main, true>();
             }
 
-            // connect the pll
-            connect<pll::main, true>();
-
             // notify klib what freqency we are running
-            klib::io::clock::set(Freq);
+            klib::io::clock::set(freq);
         }
 
         template <uint32_t ExtCrystalFreq, uint8_t PreDivider = 0x1>

targets/core/nxp/lpc178x/system.hpp

@@ -132,10 +132,24 @@ namespace klib::core::lpc178x::io::system {
 
         template <
             source Source, uint32_t Freq,
-            uint16_t Multiplier, pre_divider PreDivider,
-            uint8_t Div
+            uint16_t Multiplier = 1, pre_divider PreDivider = pre_divider::div_1,
+            uint8_t Div = 1
         >
         static void set_main() {
+            // calculate the fcco frequency using the oscilator and multiplier
+            constexpr static uint32_t partial_freq = (Freq * 2 * Multiplier) / klib::exp2(static_cast<uint32_t>(PreDivider));
+
+            // make sure the pll inputs are valid
+            static_assert(Multiplier > 0, "Invalid multiplier");
+            static_assert(Div > 0, "Invalid divider");
+            static_assert(
+                (Multiplier == 1) || (partial_freq >= 156'000'000 && partial_freq <= 320'000'000), 
+                "Invalid Fcco output. PLL frequency needs to be between 156 and 320mhz"
+            );
+
+            // calculate the final frequency
+            constexpr static uint32_t freq = (partial_freq / Div);
+
             // enable the crystal if we are changing to that
             if constexpr (Source == source::main) {
                 crystal::enable<true>();
@@ -148,10 +162,10 @@ namespace klib::core::lpc178x::io::system {
 
             // enable/disable the boost based on the frequency
             // (> 100 Mhz = on)
-            SYSCON->PBOOST = (Freq > 100'000'000) ? 0b11 : 0b00;
+            SYSCON->PBOOST = (freq > 100'000'000) ? 0b11 : 0b00;
 
             // check if we need to enable the pll
-            if constexpr (Multiplier) {
+            if constexpr (Multiplier > 1) {
                 // disconnect the main pll if it is connected.
                 if (SYSCON->CCLKSEL & (0x1 << 8)) {
                     SYSCON->CCLKSEL &= ~(0x1 << 8);
@@ -173,7 +187,7 @@ namespace klib::core::lpc178x::io::system {
                 SYSCON->CLKSRCSEL = static_cast<uint32_t>(Source);
 
                 // setup the main pll
-                setup<pll::main>(Multiplier, PreDivider);
+                setup<pll::main>((Multiplier - 1), PreDivider);
 
                 // enable the pll
                 enable<pll::main, true>();
@@ -189,20 +203,26 @@ namespace klib::core::lpc178x::io::system {
             }
 
             // setup the cpu clock divider
-            SYSCON->CCLKSEL = Div & 0x1f | ((Multiplier > 0) << 8);
+            SYSCON->CCLKSEL = (Div - 1) & 0x1f | ((Multiplier > 1) << 8);
 
             // notify klib what freqency we are running
-            klib::io::clock::set(Freq);
+            klib::io::clock::set(freq);
         }
 
         template <
             uint32_t Freq, uint16_t Multiplier,
             pre_divider PreDivider
         >
         static void set_usb() {
-            static_assert((Freq % 48'000'000) == 0, "Pll frequency needs to be 48, 96 or 144Mhz");
-            static_assert(Freq <= 144'000'000, "Maximum USB pll frequency supported is 144Mhz");
-            static_assert(Freq >= 48'000'000, "Minumim USB pll frequency supported is 48Mhz");
+            static_assert((48'000'000 % Freq) == 0, "Invalid crystal frequency");
+
+            // calculate the frequency
+            constexpr static uint32_t freq = ((Freq * Multiplier) / klib::exp2(static_cast<uint32_t>(PreDivider)));
+
+            static_assert((freq % 48'000'000) == 0, "Pll frequency needs to be 48, 96 or 144Mhz");
+            static_assert(freq <= 144'000'000, "Maximum USB pll frequency supported is 144Mhz");
+            static_assert(freq >= 48'000'000, "Minumim USB pll frequency supported is 48Mhz");
+            static_assert(Multiplier > 0, "Invalid multiplier");
 
             // check if the crystal is stable and enabled
             if (!crystal::status()) {
@@ -221,7 +241,7 @@ namespace klib::core::lpc178x::io::system {
             }
 
             // setup the second pll
-            setup<pll::alternate>(Multiplier, PreDivider);
+            setup<pll::alternate>(Multiplier - 1, PreDivider);
 
             // enable the pll
             enable<pll::alternate, true>();
@@ -233,7 +253,7 @@ namespace klib::core::lpc178x::io::system {
 
             // setup the correct divider for the usb and
             // change to the alternate pll
-            SYSCON->USBCLKSEL = (Freq / 48'000'000) | (0x2 << 8);
+            SYSCON->USBCLKSEL = (freq / 48'000'000) | (0x2 << 8);
         }
     };