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target: add bridge definitions for pwm-commutate example
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11 files changed

+318
-0
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11 files changed

+318
-0
lines changed

‎src/target/b-g431b-esc1/target-pwm.h‎

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#define PWM_DMA_REQUEST TIM_DIER_CC1DE
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#define PWM_DMAMUX_REQID 56
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#define BRIDGE_HI_A_GPIO_RCC RCC_GPIOA
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#define BRIDGE_HI_A_GPIO_PORT GPIOA
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#define BRIDGE_HI_A_GPIO_PIN GPIO8
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#define BRIDGE_HI_A_GPIO_AF GPIO_AF6
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#define BRIDGE_HI_B_GPIO_RCC RCC_GPIOA
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#define BRIDGE_HI_B_GPIO_PORT GPIOA
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#define BRIDGE_HI_B_GPIO_PIN GPIO9
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#define BRIDGE_HI_B_GPIO_AF GPIO_AF6
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#define BRIDGE_HI_C_GPIO_RCC RCC_GPIOA
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#define BRIDGE_HI_C_GPIO_PORT GPIOA
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#define BRIDGE_HI_C_GPIO_PIN GPIO10
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#define BRIDGE_HI_C_GPIO_AF GPIO_AF6
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#define BRIDGE_LO_A_GPIO_RCC RCC_GPIOC
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#define BRIDGE_LO_A_GPIO_PORT GPIOC
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#define BRIDGE_LO_A_GPIO_PIN GPIO13
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#define BRIDGE_LO_A_GPIO_AF GPIO_AF4
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#define BRIDGE_LO_B_GPIO_RCC RCC_GPIOA
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#define BRIDGE_LO_B_GPIO_PORT GPIOA
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#define BRIDGE_LO_B_GPIO_PIN GPIO12
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#define BRIDGE_LO_B_GPIO_AF GPIO_AF6
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#define BRIDGE_LO_C_GPIO_RCC RCC_GPIOB
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#define BRIDGE_LO_C_GPIO_PORT GPIOB
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#define BRIDGE_LO_C_GPIO_PIN GPIO15
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#define BRIDGE_LO_C_GPIO_AF GPIO_AF4

‎src/target/blue-pill/target-pwm.h‎

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// TIM2 is a 32 bit counter, with 32 bit CCR registers
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#define PWM_DMA_PERIPH_SIZE DMA_CCR_PSIZE_32BIT
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#define PWM_DMA_REQUEST TIM_DIER_CC1DE
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#define BRIDGE_HI_A_GPIO_RCC RCC_GPIOA
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#define BRIDGE_HI_A_GPIO_PORT GPIOA
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#define BRIDGE_HI_A_GPIO_PIN GPIO8
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#define BRIDGE_HI_B_GPIO_RCC RCC_GPIOA
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#define BRIDGE_HI_B_GPIO_PORT GPIOA
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#define BRIDGE_HI_B_GPIO_PIN GPIO9
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#define BRIDGE_HI_C_GPIO_RCC RCC_GPIOA
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#define BRIDGE_HI_C_GPIO_PORT GPIOA
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#define BRIDGE_HI_C_GPIO_PIN GPIO10
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#define BRIDGE_LO_A_GPIO_RCC RCC_GPIOB
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#define BRIDGE_LO_A_GPIO_PORT GPIOB
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#define BRIDGE_LO_A_GPIO_PIN GPIO13
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#define BRIDGE_LO_B_GPIO_RCC RCC_GPIOB
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#define BRIDGE_LO_B_GPIO_PORT GPIOB
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#define BRIDGE_LO_B_GPIO_PIN GPIO14
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#define BRIDGE_LO_C_GPIO_RCC RCC_GPIOB
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#define BRIDGE_LO_C_GPIO_PORT GPIOB
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#define BRIDGE_LO_C_GPIO_PIN GPIO15

‎src/target/f030-minimal/target-pwm.h‎

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// TIM2 is a 32 bit counter, with 32 bit CCR registers
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#define PWM_DMA_PERIPH_SIZE DMA_CCR_PSIZE_32BIT
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#define PWM_DMA_REQUEST TIM_DIER_CC1DE
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#define BRIDGE_HI_A_GPIO_RCC RCC_GPIOA
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#define BRIDGE_HI_A_GPIO_PORT GPIOA
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#define BRIDGE_HI_A_GPIO_PIN GPIO8
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#define BRIDGE_HI_A_GPIO_AF GPIO_AF2
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#define BRIDGE_HI_B_GPIO_RCC RCC_GPIOA
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#define BRIDGE_HI_B_GPIO_PORT GPIOA
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#define BRIDGE_HI_B_GPIO_PIN GPIO9
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#define BRIDGE_HI_B_GPIO_AF GPIO_AF2
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#define BRIDGE_HI_C_GPIO_RCC RCC_GPIOA
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#define BRIDGE_HI_C_GPIO_PORT GPIOA
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#define BRIDGE_HI_C_GPIO_PIN GPIO10
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#define BRIDGE_HI_C_GPIO_AF GPIO_AF2
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#define BRIDGE_LO_A_GPIO_RCC RCC_GPIOA
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#define BRIDGE_LO_A_GPIO_PORT GPIOA
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#define BRIDGE_LO_A_GPIO_PIN GPIO7
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#define BRIDGE_LO_A_GPIO_AF GPIO_AF2
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#define BRIDGE_LO_B_GPIO_RCC RCC_GPIOB
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#define BRIDGE_LO_B_GPIO_PORT GPIOB
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#define BRIDGE_LO_B_GPIO_PIN GPIO0
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#define BRIDGE_LO_B_GPIO_AF GPIO_AF2
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#define BRIDGE_LO_C_GPIO_RCC RCC_GPIOB
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#define BRIDGE_LO_C_GPIO_PORT GPIOB
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#define BRIDGE_LO_C_GPIO_PIN GPIO1
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#define BRIDGE_LO_C_GPIO_AF GPIO_AF2

‎src/target/maple-mini/target-pwm.h‎

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// TIM2 is a 32 bit counter, with 32 bit CCR registers
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#define PWM_DMA_PERIPH_SIZE DMA_CCR_PSIZE_32BIT
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#define PWM_DMA_REQUEST TIM_DIER_CC1DE
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#define BRIDGE_HI_A_GPIO_RCC RCC_GPIOA
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#define BRIDGE_HI_A_GPIO_PORT GPIOA
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#define BRIDGE_HI_A_GPIO_PIN GPIO8
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#define BRIDGE_HI_B_GPIO_RCC RCC_GPIOA
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#define BRIDGE_HI_B_GPIO_PORT GPIOA
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#define BRIDGE_HI_B_GPIO_PIN GPIO9
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#define BRIDGE_HI_C_GPIO_RCC RCC_GPIOA
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#define BRIDGE_HI_C_GPIO_PORT GPIOA
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#define BRIDGE_HI_C_GPIO_PIN GPIO10
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#define BRIDGE_LO_A_GPIO_RCC RCC_GPIOB
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#define BRIDGE_LO_A_GPIO_PORT GPIOB
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#define BRIDGE_LO_A_GPIO_PIN GPIO13
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#define BRIDGE_LO_B_GPIO_RCC RCC_GPIOB
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#define BRIDGE_LO_B_GPIO_PORT GPIOB
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#define BRIDGE_LO_B_GPIO_PIN GPIO14
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#define BRIDGE_LO_C_GPIO_RCC RCC_GPIOB
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#define BRIDGE_LO_C_GPIO_PORT GPIOB
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#define BRIDGE_LO_C_GPIO_PIN GPIO15

‎src/target/nucleo-f042/target-pwm.h‎

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// TIM2 is a 32 bit counter, with 32 bit CCR registers
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#define PWM_DMA_PERIPH_SIZE DMA_CCR_PSIZE_32BIT
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#define PWM_DMA_REQUEST TIM_DIER_CC1DE
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#define BRIDGE_HI_A_GPIO_RCC RCC_GPIOA
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#define BRIDGE_HI_A_GPIO_PORT GPIOA
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#define BRIDGE_HI_A_GPIO_PIN GPIO8
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#define BRIDGE_HI_A_GPIO_AF GPIO_AF2
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#define BRIDGE_HI_B_GPIO_RCC RCC_GPIOA
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#define BRIDGE_HI_B_GPIO_PORT GPIOA
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#define BRIDGE_HI_B_GPIO_PIN GPIO9
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#define BRIDGE_HI_B_GPIO_AF GPIO_AF2
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#define BRIDGE_HI_C_GPIO_RCC RCC_GPIOA
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#define BRIDGE_HI_C_GPIO_PORT GPIOA
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#define BRIDGE_HI_C_GPIO_PIN GPIO10
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#define BRIDGE_HI_C_GPIO_AF GPIO_AF2
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#define BRIDGE_LO_A_GPIO_RCC RCC_GPIOA
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#define BRIDGE_LO_A_GPIO_PORT GPIOA
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#define BRIDGE_LO_A_GPIO_PIN GPIO7
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#define BRIDGE_LO_A_GPIO_AF GPIO_AF2
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#define BRIDGE_LO_B_GPIO_RCC RCC_GPIOB
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#define BRIDGE_LO_B_GPIO_PORT GPIOB
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#define BRIDGE_LO_B_GPIO_PIN GPIO0
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#define BRIDGE_LO_B_GPIO_AF GPIO_AF2
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#define BRIDGE_LO_C_GPIO_RCC RCC_GPIOB
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#define BRIDGE_LO_C_GPIO_PORT GPIOB
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#define BRIDGE_LO_C_GPIO_PIN GPIO1
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#define BRIDGE_LO_C_GPIO_AF GPIO_AF2

‎src/target/nucleo-f072/target-pwm.h‎

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// TIM2 is a 32 bit counter, with 32 bit CCR registers
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#define PWM_DMA_PERIPH_SIZE DMA_CCR_PSIZE_32BIT
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#define PWM_DMA_REQUEST TIM_DIER_CC1DE
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#define BRIDGE_HI_A_GPIO_RCC RCC_GPIOA
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#define BRIDGE_HI_A_GPIO_PORT GPIOA
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#define BRIDGE_HI_A_GPIO_PIN GPIO8
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#define BRIDGE_HI_A_GPIO_AF GPIO_AF2
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#define BRIDGE_HI_B_GPIO_RCC RCC_GPIOA
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#define BRIDGE_HI_B_GPIO_PORT GPIOA
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#define BRIDGE_HI_B_GPIO_PIN GPIO9
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#define BRIDGE_HI_B_GPIO_AF GPIO_AF2
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#define BRIDGE_HI_C_GPIO_RCC RCC_GPIOA
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#define BRIDGE_HI_C_GPIO_PORT GPIOA
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#define BRIDGE_HI_C_GPIO_PIN GPIO10
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#define BRIDGE_HI_C_GPIO_AF GPIO_AF2
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#define BRIDGE_LO_A_GPIO_RCC RCC_GPIOA
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#define BRIDGE_LO_A_GPIO_PORT GPIOA
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#define BRIDGE_LO_A_GPIO_PIN GPIO7
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#define BRIDGE_LO_A_GPIO_AF GPIO_AF2
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#define BRIDGE_LO_B_GPIO_RCC RCC_GPIOB
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#define BRIDGE_LO_B_GPIO_PORT GPIOB
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#define BRIDGE_LO_B_GPIO_PIN GPIO0
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#define BRIDGE_LO_B_GPIO_AF GPIO_AF2
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#define BRIDGE_LO_C_GPIO_RCC RCC_GPIOB
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#define BRIDGE_LO_C_GPIO_PORT GPIOB
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#define BRIDGE_LO_C_GPIO_PIN GPIO1
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#define BRIDGE_LO_C_GPIO_AF GPIO_AF2

‎src/target/nucleo-f303/target-pwm.h‎

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// TIM8 is a 16 bit counter, with 16 bit CCR registers
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#define PWM_DMA_PERIPH_SIZE DMA_CCR_PSIZE_16BIT
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#define PWM_DMA_REQUEST TIM_DIER_CC1DE
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#define BRIDGE_HI_A_GPIO_RCC RCC_GPIOA
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#define BRIDGE_HI_A_GPIO_PORT GPIOA
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#define BRIDGE_HI_A_GPIO_PIN GPIO8
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#define BRIDGE_HI_A_GPIO_AF GPIO_AF6
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#define BRIDGE_HI_B_GPIO_RCC RCC_GPIOA
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#define BRIDGE_HI_B_GPIO_PORT GPIOA
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#define BRIDGE_HI_B_GPIO_PIN GPIO9
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#define BRIDGE_HI_B_GPIO_AF GPIO_AF6
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#define BRIDGE_HI_C_GPIO_RCC RCC_GPIOA
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#define BRIDGE_HI_C_GPIO_PORT GPIOA
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#define BRIDGE_HI_C_GPIO_PIN GPIO10
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#define BRIDGE_HI_C_GPIO_AF GPIO_AF6
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#define BRIDGE_LO_A_GPIO_RCC RCC_GPIOA
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#define BRIDGE_LO_A_GPIO_PORT GPIOA
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#define BRIDGE_LO_A_GPIO_PIN GPIO11
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#define BRIDGE_LO_A_GPIO_AF GPIO_AF6
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#define BRIDGE_LO_B_GPIO_RCC RCC_GPIOB
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#define BRIDGE_LO_B_GPIO_PORT GPIOB
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#define BRIDGE_LO_B_GPIO_PIN GPIO0
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#define BRIDGE_LO_B_GPIO_AF GPIO_AF6
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#define BRIDGE_LO_C_GPIO_RCC RCC_GPIOB
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#define BRIDGE_LO_C_GPIO_PORT GPIOB
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#define BRIDGE_LO_C_GPIO_PIN GPIO1
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#define BRIDGE_LO_C_GPIO_AF GPIO_AF6

‎src/target/nucleo-f334/target-pwm.h‎

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// TIM2 is a 32 bit counter, with 32 bit CCR registers
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#define PWM_DMA_PERIPH_SIZE DMA_CCR_PSIZE_32BIT
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#define PWM_DMA_REQUEST TIM_DIER_CC1DE
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#define BRIDGE_HI_A_GPIO_RCC RCC_GPIOA
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#define BRIDGE_HI_A_GPIO_PORT GPIOA
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#define BRIDGE_HI_A_GPIO_PIN GPIO8
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#define BRIDGE_HI_A_GPIO_AF GPIO_AF6
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#define BRIDGE_HI_B_GPIO_RCC RCC_GPIOA
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#define BRIDGE_HI_B_GPIO_PORT GPIOA
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#define BRIDGE_HI_B_GPIO_PIN GPIO9
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#define BRIDGE_HI_B_GPIO_AF GPIO_AF6
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#define BRIDGE_HI_C_GPIO_RCC RCC_GPIOA
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#define BRIDGE_HI_C_GPIO_PORT GPIOA
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#define BRIDGE_HI_C_GPIO_PIN GPIO10
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#define BRIDGE_HI_C_GPIO_AF GPIO_AF6
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#define BRIDGE_LO_A_GPIO_RCC RCC_GPIOA
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#define BRIDGE_LO_A_GPIO_PORT GPIOA
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#define BRIDGE_LO_A_GPIO_PIN GPIO7
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#define BRIDGE_LO_A_GPIO_AF GPIO_AF6
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#define BRIDGE_LO_B_GPIO_RCC RCC_GPIOB
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#define BRIDGE_LO_B_GPIO_PORT GPIOB
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#define BRIDGE_LO_B_GPIO_PIN GPIO0
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#define BRIDGE_LO_B_GPIO_AF GPIO_AF6
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#define BRIDGE_LO_C_GPIO_RCC RCC_GPIOB
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#define BRIDGE_LO_C_GPIO_PORT GPIOB
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#define BRIDGE_LO_C_GPIO_PIN GPIO1
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#define BRIDGE_LO_C_GPIO_AF GPIO_AF6

‎src/target/nucleo-g071/target-pwm.h‎

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#define PWM_DMA_REQUEST TIM_DIER_CC1DE
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#define PWM_DMAMUX_REQID 26
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#define BRIDGE_HI_A_GPIO_RCC RCC_GPIOA
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#define BRIDGE_HI_A_GPIO_PORT GPIOA
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#define BRIDGE_HI_A_GPIO_PIN GPIO8
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#define BRIDGE_HI_A_GPIO_AF GPIO_AF2
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#define BRIDGE_HI_B_GPIO_RCC RCC_GPIOA
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#define BRIDGE_HI_B_GPIO_PORT GPIOA
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#define BRIDGE_HI_B_GPIO_PIN GPIO9
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#define BRIDGE_HI_B_GPIO_AF GPIO_AF2
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#define BRIDGE_HI_C_GPIO_RCC RCC_GPIOA
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#define BRIDGE_HI_C_GPIO_PORT GPIOA
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#define BRIDGE_HI_C_GPIO_PIN GPIO10
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#define BRIDGE_HI_C_GPIO_AF GPIO_AF2
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#define BRIDGE_LO_A_GPIO_RCC RCC_GPIOB
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#define BRIDGE_LO_A_GPIO_PORT GPIOB
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#define BRIDGE_LO_A_GPIO_PIN GPIO13
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#define BRIDGE_LO_A_GPIO_AF GPIO_AF2
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#define BRIDGE_LO_B_GPIO_RCC RCC_GPIOB
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#define BRIDGE_LO_B_GPIO_PORT GPIOB
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#define BRIDGE_LO_B_GPIO_PIN GPIO14
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#define BRIDGE_LO_B_GPIO_AF GPIO_AF2
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#define BRIDGE_LO_C_GPIO_RCC RCC_GPIOB
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#define BRIDGE_LO_C_GPIO_PORT GPIOB
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#define BRIDGE_LO_C_GPIO_PIN GPIO15
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#define BRIDGE_LO_C_GPIO_AF GPIO_AF2

‎src/target/nucleo-g431/target-pwm.h‎

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#define PWM_DMA_REQUEST TIM_DIER_CC1DE
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#define PWM_DMAMUX_REQID 56
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#define BRIDGE_HI_A_GPIO_RCC RCC_GPIOA
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#define BRIDGE_HI_A_GPIO_PORT GPIOA
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#define BRIDGE_HI_A_GPIO_PIN GPIO8
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#define BRIDGE_HI_A_GPIO_AF GPIO_AF6
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#define BRIDGE_HI_B_GPIO_RCC RCC_GPIOA
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#define BRIDGE_HI_B_GPIO_PORT GPIOA
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#define BRIDGE_HI_B_GPIO_PIN GPIO9
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#define BRIDGE_HI_B_GPIO_AF GPIO_AF6
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#define BRIDGE_HI_C_GPIO_RCC RCC_GPIOA
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#define BRIDGE_HI_C_GPIO_PORT GPIOA
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#define BRIDGE_HI_C_GPIO_PIN GPIO10
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#define BRIDGE_HI_C_GPIO_AF GPIO_AF6
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#define BRIDGE_LO_A_GPIO_RCC RCC_GPIOC
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#define BRIDGE_LO_A_GPIO_PORT GPIOC
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#define BRIDGE_LO_A_GPIO_PIN GPIO13
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#define BRIDGE_LO_A_GPIO_AF GPIO_AF4
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#define BRIDGE_LO_B_GPIO_RCC RCC_GPIOA
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#define BRIDGE_LO_B_GPIO_PORT GPIOA
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#define BRIDGE_LO_B_GPIO_PIN GPIO12
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#define BRIDGE_LO_B_GPIO_AF GPIO_AF6
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#define BRIDGE_LO_C_GPIO_RCC RCC_GPIOB
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#define BRIDGE_LO_C_GPIO_PORT GPIOB
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#define BRIDGE_LO_C_GPIO_PIN GPIO15
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#define BRIDGE_LO_C_GPIO_AF GPIO_AF4

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