Large_Integer_Arithmetic_Operations_Hardware_Accelerator/vivado_2490.backup.jou at main · jeffeehsiung/Large_Integer_Arithmetic_Operations_Hardware_Accelerator · GitHub

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#-----------------------------------------------------------
# Vivado v2020.1 (64-bit)
# SW Build 2902540 on Wed May 27 19:54:35 MDT 2020
# IP Build 2902112 on Wed May 27 22:43:36 MDT 2020
# Start of session at: Mon Mar 20 07:42:36 2023
# Process ID: 2490
# Current directory: /media/jeffee/T7/vivado
# Command line: vivado
# Log file: /media/jeffee/T7/vivado/vivado.log
# Journal file: /media/jeffee/T7/vivado/vivado.jou
#-----------------------------------------------------------
start_gui
open_project /media/jeffee/T7/vivado/UART/UART.xpr
# Disabling source management mode.  This is to allow the top design properties to be set without GUI intervention.
set_property source_mgmt_mode None [current_project]
set_property top uart_top [current_fileset]
# Re-enabling previously disabled source management mode.
set_property source_mgmt_mode DisplayOnly [current_project]
launch_simulation
open_wave_config /media/jeffee/T7/vivado/UART/uart_top_TB_behav.wcfg
source uart_top_TB.tcl
run 1 ms
open_bd_design {/media/jeffee/T7/vivado/UART/UART.srcs/sources_1/bd/uart/uart.bd}
regenerate_bd_layout
validate_bd_design -force
close_bd_design [get_bd_designs uart]
relaunch_sim
run 1 ms
close_sim
launch_simulation
open_wave_config /media/jeffee/T7/vivado/UART/uart_top_TB_behav.wcfg
source uart_top_TB.tcl
run 1 ms
export_ip_user_files -of_objects  [get_files /media/jeffee/T7/vivado/UART/uart_top_TB_behav.wcfg] -no_script -reset -force -quiet
remove_files  -fileset sim_1 /media/jeffee/T7/vivado/UART/uart_top_TB_behav.wcfg
close_sim
launch_simulation
source uart_top_TB.tcl
run 1 ms
relaunch_sim
run 1 ms
relaunch_sim
run 1 ms
relaunch_sim
relaunch_sim
run 80 us
set_property needs_refresh false [get_runs synth_1]
set_property needs_refresh false [get_runs impl_1]
set_property needs_refresh false [get_runs uart_Debounce_Switch_0_0_synth_1]
set_property needs_refresh false [get_runs uart_uart_top_0_0_synth_1]
close_sim