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Merge tag 'drm-intel-fixes-2025-08-13' of https://gitlab.freedesktop.org/drm/i915/kernel into drm-fixes
- Fix the implementation of wa_18038517565 [fbc] (Vinod Govindapillai) - Do not trigger Frame Change events from frontbuffer flush [psr] (Jouni Högander) Signed-off-by: Dave Airlie <[email protected]> From: Tvrtko Ursulin <[email protected]> Link: https://lore.kernel.org/r/aJ0HAh06VHWVdv63@linux
2 parents 68ad07d + 184889d commit 4699c04

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2 files changed

+13
-9
lines changed

2 files changed

+13
-9
lines changed

drivers/gpu/drm/i915/display/intel_fbc.c

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -552,10 +552,6 @@ static void ilk_fbc_deactivate(struct intel_fbc *fbc)
552552
if (dpfc_ctl & DPFC_CTL_EN) {
553553
dpfc_ctl &= ~DPFC_CTL_EN;
554554
intel_de_write(display, ILK_DPFC_CONTROL(fbc->id), dpfc_ctl);
555-
556-
/* wa_18038517565 Enable DPFC clock gating after FBC disable */
557-
if (display->platform.dg2 || DISPLAY_VER(display) >= 14)
558-
fbc_compressor_clkgate_disable_wa(fbc, false);
559555
}
560556
}
561557

@@ -1710,6 +1706,10 @@ static void __intel_fbc_disable(struct intel_fbc *fbc)
17101706

17111707
__intel_fbc_cleanup_cfb(fbc);
17121708

1709+
/* wa_18038517565 Enable DPFC clock gating after FBC disable */
1710+
if (display->platform.dg2 || DISPLAY_VER(display) >= 14)
1711+
fbc_compressor_clkgate_disable_wa(fbc, false);
1712+
17131713
fbc->state.plane = NULL;
17141714
fbc->flip_pending = false;
17151715
fbc->busy_bits = 0;

drivers/gpu/drm/i915/display/intel_psr.c

Lines changed: 9 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -3275,7 +3275,9 @@ static void intel_psr_configure_full_frame_update(struct intel_dp *intel_dp)
32753275

32763276
static void _psr_invalidate_handle(struct intel_dp *intel_dp)
32773277
{
3278-
if (intel_dp->psr.psr2_sel_fetch_enabled) {
3278+
struct intel_display *display = to_intel_display(intel_dp);
3279+
3280+
if (DISPLAY_VER(display) < 20 && intel_dp->psr.psr2_sel_fetch_enabled) {
32793281
if (!intel_dp->psr.psr2_sel_fetch_cff_enabled) {
32803282
intel_dp->psr.psr2_sel_fetch_cff_enabled = true;
32813283
intel_psr_configure_full_frame_update(intel_dp);
@@ -3361,7 +3363,7 @@ static void _psr_flush_handle(struct intel_dp *intel_dp)
33613363
{
33623364
struct intel_display *display = to_intel_display(intel_dp);
33633365

3364-
if (intel_dp->psr.psr2_sel_fetch_enabled) {
3366+
if (DISPLAY_VER(display) < 20 && intel_dp->psr.psr2_sel_fetch_enabled) {
33653367
if (intel_dp->psr.psr2_sel_fetch_cff_enabled) {
33663368
/* can we turn CFF off? */
33673369
if (intel_dp->psr.busy_frontbuffer_bits == 0)
@@ -3378,11 +3380,13 @@ static void _psr_flush_handle(struct intel_dp *intel_dp)
33783380
* existing SU configuration
33793381
*/
33803382
intel_psr_configure_full_frame_update(intel_dp);
3381-
}
33823383

3383-
intel_psr_force_update(intel_dp);
3384+
intel_psr_force_update(intel_dp);
3385+
} else {
3386+
intel_psr_exit(intel_dp);
3387+
}
33843388

3385-
if (!intel_dp->psr.psr2_sel_fetch_enabled && !intel_dp->psr.active &&
3389+
if ((!intel_dp->psr.psr2_sel_fetch_enabled || DISPLAY_VER(display) >= 20) &&
33863390
!intel_dp->psr.busy_frontbuffer_bits)
33873391
queue_work(display->wq.unordered, &intel_dp->psr.work);
33883392
}

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