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Merge tag 'imx-fixes-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/fixes
i.MX fixes for 6.17: - Correct FlexCAN PHY settings on imx95-19x19-evk board (Haibo Chen) - Add missing microSD slot supplies for DH electronics i.MX8M Plus boards (Marek Vasut) - Fix assigned clocks for JPEG encoder node on i.MX95 (Marek Vasut) - A couple of regulator setting fixes for imx8mp-tqma8mpql board (Markus Niebel) * tag 'imx-fixes-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: arm64: dts: imx95: Fix JPEG encoder node assigned clock arm64: dts: imx95-19x19-evk: correct the phy setting for flexcan1/2 arm64: dts: imx8mp: Fix missing microSD slot vqmmc on Data Modul i.MX8M Plus eDM SBC arm64: dts: imx8mp: Fix missing microSD slot vqmmc on DH electronics i.MX8M Plus DHCOM arm64: dts: imx8mp-tqma8mpql: remove virtual 3.3V regulator arm64: dts: imx8mp-tqma8mpql: fix LDO5 power off Link: https://lore.kernel.org/r/aK6BuzIYwUBRU1GW@dragon Signed-off-by: Arnd Bergmann <[email protected]>
2 parents 0aee6fa + 37e5caa commit e019bbd

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7 files changed

+44
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‎arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc.dts‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -555,6 +555,7 @@
555555
pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
556556
cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
557557
vmmc-supply = <&reg_usdhc2_vmmc>;
558+
vqmmc-supply = <&ldo5>;
558559
bus-width = <4>;
559560
status = "okay";
560561
};

‎arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -609,6 +609,7 @@
609609
pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
610610
cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
611611
vmmc-supply = <&reg_usdhc2_vmmc>;
612+
vqmmc-supply = <&ldo5>;
612613
bus-width = <4>;
613614
status = "okay";
614615
};

‎arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mp-ras314.dts‎

Lines changed: 7 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -467,6 +467,10 @@
467467
status = "okay";
468468
};
469469

470+
&reg_usdhc2_vqmmc {
471+
status = "okay";
472+
};
473+
470474
&sai5 {
471475
pinctrl-names = "default";
472476
pinctrl-0 = <&pinctrl_sai5>;
@@ -876,8 +880,7 @@
876880
<MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d2>,
877881
<MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d2>,
878882
<MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d2>,
879-
<MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d2>,
880-
<MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc0>;
883+
<MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d2>;
881884
};
882885

883886
pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
@@ -886,8 +889,7 @@
886889
<MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d4>,
887890
<MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d4>,
888891
<MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d4>,
889-
<MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d4>,
890-
<MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc0>;
892+
<MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d4>;
891893
};
892894

893895
pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
@@ -896,8 +898,7 @@
896898
<MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d4>,
897899
<MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d4>,
898900
<MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d4>,
899-
<MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d4>,
900-
<MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc0>;
901+
<MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d4>;
901902
};
902903

903904
pinctrl_usdhc2_gpio: usdhc2-gpiogrp {

‎arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mpxl.dts‎

Lines changed: 7 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -604,6 +604,10 @@
604604
status = "okay";
605605
};
606606

607+
&reg_usdhc2_vqmmc {
608+
status = "okay";
609+
};
610+
607611
&sai3 {
608612
pinctrl-names = "default";
609613
pinctrl-0 = <&pinctrl_sai3>;
@@ -983,8 +987,7 @@
983987
<MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d2>,
984988
<MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d2>,
985989
<MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d2>,
986-
<MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d2>,
987-
<MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc0>;
990+
<MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d2>;
988991
};
989992

990993
pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
@@ -993,8 +996,7 @@
993996
<MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d4>,
994997
<MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d4>,
995998
<MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d4>,
996-
<MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d4>,
997-
<MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc0>;
999+
<MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d4>;
9981000
};
9991001

10001002
pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
@@ -1003,8 +1005,7 @@
10031005
<MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d4>,
10041006
<MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d4>,
10051007
<MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d4>,
1006-
<MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d4>,
1007-
<MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc0>;
1008+
<MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d4>;
10081009
};
10091010

10101011
pinctrl_usdhc2_gpio: usdhc2-gpiogrp {

‎arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql.dtsi‎

Lines changed: 22 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -16,13 +16,18 @@
1616
reg = <0x0 0x40000000 0 0x80000000>;
1717
};
1818

19-
/* identical to buck4_reg, but should never change */
20-
reg_vcc3v3: regulator-vcc3v3 {
21-
compatible = "regulator-fixed";
22-
regulator-name = "VCC3V3";
23-
regulator-min-microvolt = <3300000>;
19+
reg_usdhc2_vqmmc: regulator-usdhc2-vqmmc {
20+
compatible = "regulator-gpio";
21+
pinctrl-names = "default";
22+
pinctrl-0 = <&pinctrl_reg_usdhc2_vqmmc>;
23+
regulator-name = "V_SD2";
24+
regulator-min-microvolt = <1800000>;
2425
regulator-max-microvolt = <3300000>;
25-
regulator-always-on;
26+
gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;
27+
states = <1800000 0x1>,
28+
<3300000 0x0>;
29+
vin-supply = <&ldo5_reg>;
30+
status = "disabled";
2631
};
2732
};
2833

@@ -173,17 +178,21 @@
173178
read-only;
174179
reg = <0x53>;
175180
pagesize = <16>;
176-
vcc-supply = <&reg_vcc3v3>;
181+
vcc-supply = <&buck4_reg>;
177182
};
178183

179184
m24c64: eeprom@57 {
180185
compatible = "atmel,24c64";
181186
reg = <0x57>;
182187
pagesize = <32>;
183-
vcc-supply = <&reg_vcc3v3>;
188+
vcc-supply = <&buck4_reg>;
184189
};
185190
};
186191

192+
&usdhc2 {
193+
vqmmc-supply = <&reg_usdhc2_vqmmc>;
194+
};
195+
187196
&usdhc3 {
188197
pinctrl-names = "default", "state_100mhz", "state_200mhz";
189198
pinctrl-0 = <&pinctrl_usdhc3>;
@@ -193,7 +202,7 @@
193202
non-removable;
194203
no-sd;
195204
no-sdio;
196-
vmmc-supply = <&reg_vcc3v3>;
205+
vmmc-supply = <&buck4_reg>;
197206
vqmmc-supply = <&buck5_reg>;
198207
status = "okay";
199208
};
@@ -233,6 +242,10 @@
233242
fsl,pins = <MX8MP_IOMUXC_SD2_RESET_B__GPIO2_IO19 0x10>;
234243
};
235244

245+
pinctrl_reg_usdhc2_vqmmc: regusdhc2vqmmcgrp {
246+
fsl,pins = <MX8MP_IOMUXC_GPIO1_IO04__GPIO1_IO04 0xc0>;
247+
};
248+
236249
pinctrl_usdhc3: usdhc3grp {
237250
fsl,pins = <MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x194>,
238251
<MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d4>,

‎arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts‎

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -80,17 +80,17 @@
8080
flexcan1_phy: can-phy0 {
8181
compatible = "nxp,tjr1443";
8282
#phy-cells = <0>;
83-
max-bitrate = <1000000>;
83+
max-bitrate = <8000000>;
8484
enable-gpios = <&i2c6_pcal6416 6 GPIO_ACTIVE_HIGH>;
85-
standby-gpios = <&i2c6_pcal6416 5 GPIO_ACTIVE_HIGH>;
85+
standby-gpios = <&i2c6_pcal6416 5 GPIO_ACTIVE_LOW>;
8686
};
8787

8888
flexcan2_phy: can-phy1 {
8989
compatible = "nxp,tjr1443";
9090
#phy-cells = <0>;
91-
max-bitrate = <1000000>;
92-
enable-gpios = <&i2c6_pcal6416 4 GPIO_ACTIVE_HIGH>;
93-
standby-gpios = <&i2c6_pcal6416 3 GPIO_ACTIVE_HIGH>;
91+
max-bitrate = <8000000>;
92+
enable-gpios = <&i2c4_gpio_expander_21 4 GPIO_ACTIVE_HIGH>;
93+
standby-gpios = <&i2c4_gpio_expander_21 3 GPIO_ACTIVE_LOW>;
9494
};
9595

9696
reg_vref_1v8: regulator-1p8v {

‎arch/arm64/boot/dts/freescale/imx95.dtsi‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1843,7 +1843,7 @@
18431843
<GIC_SPI 294 IRQ_TYPE_LEVEL_HIGH>;
18441844
clocks = <&scmi_clk IMX95_CLK_VPU>,
18451845
<&vpu_blk_ctrl IMX95_CLK_VPUBLK_JPEG_ENC>;
1846-
assigned-clocks = <&vpu_blk_ctrl IMX95_CLK_VPUBLK_JPEG_DEC>;
1846+
assigned-clocks = <&vpu_blk_ctrl IMX95_CLK_VPUBLK_JPEG_ENC>;
18471847
assigned-clock-parents = <&scmi_clk IMX95_CLK_VPUJPEG>;
18481848
power-domains = <&scmi_devpd IMX95_PD_VPU>;
18491849
};

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