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joergroedeljoergroedel
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Merge branches 'iommu/fixes', 'arm/tegra', 'arm/smmu', 'virtio', 'x86/vt-d', 'x86/amd', 'core' and 's390' into next
8 parents 6e6c6d6 + f7da9c0 + aa5cabc + 9e13ec6 + e82c175 + cedc811 + 3613047 + 92bce97 commit e8cca46

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lines changed

‎Documentation/admin-guide/kernel-parameters.txt‎

Lines changed: 5 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -2220,7 +2220,7 @@
22202220
forcing Dual Address Cycle for PCI cards supporting
22212221
greater than 32-bit addressing.
22222222

2223-
iommu.strict= [ARM64, X86] Configure TLB invalidation behaviour
2223+
iommu.strict= [ARM64, X86, S390] Configure TLB invalidation behaviour
22242224
Format: { "0" | "1" }
22252225
0 - Lazy mode.
22262226
Request that DMA unmap operations use deferred
@@ -5611,9 +5611,10 @@
56115611
s390_iommu= [HW,S390]
56125612
Set s390 IOTLB flushing mode
56135613
strict
5614-
With strict flushing every unmap operation will result in
5615-
an IOTLB flush. Default is lazy flushing before reuse,
5616-
which is faster.
5614+
With strict flushing every unmap operation will result
5615+
in an IOTLB flush. Default is lazy flushing before
5616+
reuse, which is faster. Deprecated, equivalent to
5617+
iommu.strict=1.
56175618

56185619
s390_iommu_aperture= [KNL,S390]
56195620
Specifies the size of the per device DMA address space

‎Documentation/devicetree/bindings/iommu/arm,smmu.yaml‎

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -110,6 +110,7 @@ properties:
110110
- qcom,sdm630-smmu-v2
111111
- qcom,sdm845-smmu-v2
112112
- qcom,sm6350-smmu-v2
113+
- qcom,sm7150-smmu-v2
113114
- const: qcom,adreno-smmu
114115
- const: qcom,smmu-v2
115116
- description: Qcom Adreno GPUs on Google Cheza platform
@@ -409,6 +410,7 @@ allOf:
409410
contains:
410411
enum:
411412
- qcom,sm6350-smmu-v2
413+
- qcom,sm7150-smmu-v2
412414
- qcom,sm8150-smmu-500
413415
- qcom,sm8250-smmu-500
414416
then:

‎arch/arm/configs/multi_v7_defconfig‎

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1073,7 +1073,6 @@ CONFIG_QCOM_IPCC=y
10731073
CONFIG_OMAP_IOMMU=y
10741074
CONFIG_OMAP_IOMMU_DEBUG=y
10751075
CONFIG_ROCKCHIP_IOMMU=y
1076-
CONFIG_TEGRA_IOMMU_GART=y
10771076
CONFIG_TEGRA_IOMMU_SMMU=y
10781077
CONFIG_EXYNOS_IOMMU=y
10791078
CONFIG_QCOM_IOMMU=y

‎arch/arm/configs/tegra_defconfig‎

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -292,7 +292,6 @@ CONFIG_CHROME_PLATFORMS=y
292292
CONFIG_CROS_EC=y
293293
CONFIG_CROS_EC_I2C=m
294294
CONFIG_CROS_EC_SPI=m
295-
CONFIG_TEGRA_IOMMU_GART=y
296295
CONFIG_TEGRA_IOMMU_SMMU=y
297296
CONFIG_ARCH_TEGRA_2x_SOC=y
298297
CONFIG_ARCH_TEGRA_3x_SOC=y

‎arch/powerpc/kernel/iommu.c‎

Lines changed: 24 additions & 29 deletions
Original file line numberDiff line numberDiff line change
@@ -1280,13 +1280,19 @@ struct iommu_table_group_ops spapr_tce_table_group_ops = {
12801280
/*
12811281
* A simple iommu_ops to allow less cruft in generic VFIO code.
12821282
*/
1283-
static int spapr_tce_blocking_iommu_attach_dev(struct iommu_domain *dom,
1284-
struct device *dev)
1283+
static int
1284+
spapr_tce_platform_iommu_attach_dev(struct iommu_domain *platform_domain,
1285+
struct device *dev)
12851286
{
1287+
struct iommu_domain *domain = iommu_get_domain_for_dev(dev);
12861288
struct iommu_group *grp = iommu_group_get(dev);
12871289
struct iommu_table_group *table_group;
12881290
int ret = -EINVAL;
12891291

1292+
/* At first attach the ownership is already set */
1293+
if (!domain)
1294+
return 0;
1295+
12901296
if (!grp)
12911297
return -ENODEV;
12921298

@@ -1297,17 +1303,22 @@ static int spapr_tce_blocking_iommu_attach_dev(struct iommu_domain *dom,
12971303
return ret;
12981304
}
12991305

1300-
static void spapr_tce_blocking_iommu_set_platform_dma(struct device *dev)
1301-
{
1302-
struct iommu_group *grp = iommu_group_get(dev);
1303-
struct iommu_table_group *table_group;
1306+
static const struct iommu_domain_ops spapr_tce_platform_domain_ops = {
1307+
.attach_dev = spapr_tce_platform_iommu_attach_dev,
1308+
};
13041309

1305-
table_group = iommu_group_get_iommudata(grp);
1306-
table_group->ops->release_ownership(table_group);
1307-
}
1310+
static struct iommu_domain spapr_tce_platform_domain = {
1311+
.type = IOMMU_DOMAIN_PLATFORM,
1312+
.ops = &spapr_tce_platform_domain_ops,
1313+
};
13081314

1309-
static const struct iommu_domain_ops spapr_tce_blocking_domain_ops = {
1310-
.attach_dev = spapr_tce_blocking_iommu_attach_dev,
1315+
static struct iommu_domain spapr_tce_blocked_domain = {
1316+
.type = IOMMU_DOMAIN_BLOCKED,
1317+
/*
1318+
* FIXME: SPAPR mixes blocked and platform behaviors, the blocked domain
1319+
* also sets the dma_api ops
1320+
*/
1321+
.ops = &spapr_tce_platform_domain_ops,
13111322
};
13121323

13131324
static bool spapr_tce_iommu_capable(struct device *dev, enum iommu_cap cap)
@@ -1322,22 +1333,6 @@ static bool spapr_tce_iommu_capable(struct device *dev, enum iommu_cap cap)
13221333
return false;
13231334
}
13241335

1325-
static struct iommu_domain *spapr_tce_iommu_domain_alloc(unsigned int type)
1326-
{
1327-
struct iommu_domain *dom;
1328-
1329-
if (type != IOMMU_DOMAIN_BLOCKED)
1330-
return NULL;
1331-
1332-
dom = kzalloc(sizeof(*dom), GFP_KERNEL);
1333-
if (!dom)
1334-
return NULL;
1335-
1336-
dom->ops = &spapr_tce_blocking_domain_ops;
1337-
1338-
return dom;
1339-
}
1340-
13411336
static struct iommu_device *spapr_tce_iommu_probe_device(struct device *dev)
13421337
{
13431338
struct pci_dev *pdev;
@@ -1371,12 +1366,12 @@ static struct iommu_group *spapr_tce_iommu_device_group(struct device *dev)
13711366
}
13721367

13731368
static const struct iommu_ops spapr_tce_iommu_ops = {
1369+
.default_domain = &spapr_tce_platform_domain,
1370+
.blocked_domain = &spapr_tce_blocked_domain,
13741371
.capable = spapr_tce_iommu_capable,
1375-
.domain_alloc = spapr_tce_iommu_domain_alloc,
13761372
.probe_device = spapr_tce_iommu_probe_device,
13771373
.release_device = spapr_tce_iommu_release_device,
13781374
.device_group = spapr_tce_iommu_device_group,
1379-
.set_platform_dma_ops = spapr_tce_blocking_iommu_set_platform_dma,
13801375
};
13811376

13821377
static struct attribute *spapr_tce_iommu_attrs[] = {

‎arch/s390/include/asm/pci.h‎

Lines changed: 0 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -159,13 +159,6 @@ struct zpci_dev {
159159
unsigned long *dma_table;
160160
int tlb_refresh;
161161

162-
spinlock_t iommu_bitmap_lock;
163-
unsigned long *iommu_bitmap;
164-
unsigned long *lazy_bitmap;
165-
unsigned long iommu_size;
166-
unsigned long iommu_pages;
167-
unsigned int next_bit;
168-
169162
struct iommu_device iommu_dev; /* IOMMU core handle */
170163

171164
char res_name[16];
@@ -180,10 +173,6 @@ struct zpci_dev {
180173
struct zpci_fmb *fmb;
181174
u16 fmb_update; /* update interval */
182175
u16 fmb_length;
183-
/* software counters */
184-
atomic64_t allocated_pages;
185-
atomic64_t mapped_pages;
186-
atomic64_t unmapped_pages;
187176

188177
u8 version;
189178
enum pci_bus_speed max_bus_speed;

‎arch/s390/include/asm/pci_clp.h‎

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -50,6 +50,9 @@ struct clp_fh_list_entry {
5050
#define CLP_UTIL_STR_LEN 64
5151
#define CLP_PFIP_NR_SEGMENTS 4
5252

53+
/* PCI function type numbers */
54+
#define PCI_FUNC_TYPE_ISM 0x5 /* ISM device */
55+
5356
extern bool zpci_unique_uid;
5457

5558
struct clp_rsp_slpc_pci {

‎arch/s390/include/asm/pci_dma.h‎

Lines changed: 10 additions & 111 deletions
Original file line numberDiff line numberDiff line change
@@ -82,117 +82,16 @@ enum zpci_ioat_dtype {
8282
#define ZPCI_TABLE_VALID_MASK 0x20
8383
#define ZPCI_TABLE_PROT_MASK 0x200
8484

85-
static inline unsigned int calc_rtx(dma_addr_t ptr)
86-
{
87-
return ((unsigned long) ptr >> ZPCI_RT_SHIFT) & ZPCI_INDEX_MASK;
88-
}
89-
90-
static inline unsigned int calc_sx(dma_addr_t ptr)
91-
{
92-
return ((unsigned long) ptr >> ZPCI_ST_SHIFT) & ZPCI_INDEX_MASK;
93-
}
94-
95-
static inline unsigned int calc_px(dma_addr_t ptr)
96-
{
97-
return ((unsigned long) ptr >> PAGE_SHIFT) & ZPCI_PT_MASK;
98-
}
99-
100-
static inline void set_pt_pfaa(unsigned long *entry, phys_addr_t pfaa)
101-
{
102-
*entry &= ZPCI_PTE_FLAG_MASK;
103-
*entry |= (pfaa & ZPCI_PTE_ADDR_MASK);
104-
}
105-
106-
static inline void set_rt_sto(unsigned long *entry, phys_addr_t sto)
107-
{
108-
*entry &= ZPCI_RTE_FLAG_MASK;
109-
*entry |= (sto & ZPCI_RTE_ADDR_MASK);
110-
*entry |= ZPCI_TABLE_TYPE_RTX;
111-
}
112-
113-
static inline void set_st_pto(unsigned long *entry, phys_addr_t pto)
114-
{
115-
*entry &= ZPCI_STE_FLAG_MASK;
116-
*entry |= (pto & ZPCI_STE_ADDR_MASK);
117-
*entry |= ZPCI_TABLE_TYPE_SX;
118-
}
119-
120-
static inline void validate_rt_entry(unsigned long *entry)
121-
{
122-
*entry &= ~ZPCI_TABLE_VALID_MASK;
123-
*entry &= ~ZPCI_TABLE_OFFSET_MASK;
124-
*entry |= ZPCI_TABLE_VALID;
125-
*entry |= ZPCI_TABLE_LEN_RTX;
126-
}
127-
128-
static inline void validate_st_entry(unsigned long *entry)
129-
{
130-
*entry &= ~ZPCI_TABLE_VALID_MASK;
131-
*entry |= ZPCI_TABLE_VALID;
132-
}
133-
134-
static inline void invalidate_pt_entry(unsigned long *entry)
135-
{
136-
WARN_ON_ONCE((*entry & ZPCI_PTE_VALID_MASK) == ZPCI_PTE_INVALID);
137-
*entry &= ~ZPCI_PTE_VALID_MASK;
138-
*entry |= ZPCI_PTE_INVALID;
139-
}
140-
141-
static inline void validate_pt_entry(unsigned long *entry)
142-
{
143-
WARN_ON_ONCE((*entry & ZPCI_PTE_VALID_MASK) == ZPCI_PTE_VALID);
144-
*entry &= ~ZPCI_PTE_VALID_MASK;
145-
*entry |= ZPCI_PTE_VALID;
146-
}
147-
148-
static inline void entry_set_protected(unsigned long *entry)
149-
{
150-
*entry &= ~ZPCI_TABLE_PROT_MASK;
151-
*entry |= ZPCI_TABLE_PROTECTED;
152-
}
153-
154-
static inline void entry_clr_protected(unsigned long *entry)
155-
{
156-
*entry &= ~ZPCI_TABLE_PROT_MASK;
157-
*entry |= ZPCI_TABLE_UNPROTECTED;
158-
}
159-
160-
static inline int reg_entry_isvalid(unsigned long entry)
161-
{
162-
return (entry & ZPCI_TABLE_VALID_MASK) == ZPCI_TABLE_VALID;
163-
}
164-
165-
static inline int pt_entry_isvalid(unsigned long entry)
166-
{
167-
return (entry & ZPCI_PTE_VALID_MASK) == ZPCI_PTE_VALID;
168-
}
169-
170-
static inline unsigned long *get_rt_sto(unsigned long entry)
171-
{
172-
if ((entry & ZPCI_TABLE_TYPE_MASK) == ZPCI_TABLE_TYPE_RTX)
173-
return phys_to_virt(entry & ZPCI_RTE_ADDR_MASK);
174-
else
175-
return NULL;
176-
177-
}
178-
179-
static inline unsigned long *get_st_pto(unsigned long entry)
180-
{
181-
if ((entry & ZPCI_TABLE_TYPE_MASK) == ZPCI_TABLE_TYPE_SX)
182-
return phys_to_virt(entry & ZPCI_STE_ADDR_MASK);
183-
else
184-
return NULL;
185-
}
186-
187-
/* Prototypes */
188-
void dma_free_seg_table(unsigned long);
189-
unsigned long *dma_alloc_cpu_table(gfp_t gfp);
190-
void dma_cleanup_tables(unsigned long *);
191-
unsigned long *dma_walk_cpu_trans(unsigned long *rto, dma_addr_t dma_addr,
192-
gfp_t gfp);
193-
void dma_update_cpu_trans(unsigned long *entry, phys_addr_t page_addr, int flags);
194-
195-
extern const struct dma_map_ops s390_pci_dma_ops;
85+
struct zpci_iommu_ctrs {
86+
atomic64_t mapped_pages;
87+
atomic64_t unmapped_pages;
88+
atomic64_t global_rpcits;
89+
atomic64_t sync_map_rpcits;
90+
atomic64_t sync_rpcits;
91+
};
92+
93+
struct zpci_dev;
19694

95+
struct zpci_iommu_ctrs *zpci_get_iommu_ctrs(struct zpci_dev *zdev);
19796

19897
#endif

‎arch/s390/pci/Makefile‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -3,7 +3,7 @@
33
# Makefile for the s390 PCI subsystem.
44
#
55

6-
obj-$(CONFIG_PCI) += pci.o pci_irq.o pci_dma.o pci_clp.o pci_sysfs.o \
6+
obj-$(CONFIG_PCI) += pci.o pci_irq.o pci_clp.o pci_sysfs.o \
77
pci_event.o pci_debug.o pci_insn.o pci_mmio.o \
88
pci_bus.o pci_kvm_hook.o
99
obj-$(CONFIG_PCI_IOV) += pci_iov.o

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