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Merge tag 'parisc-for-6.7-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux
Pull parisc updates from Helge Deller: "Usual fixes and updates: - Add up to 12 nops after TLB inserts for PA8x00 CPUs as the specification requires (Dave Anglin) - Simplify the parisc smp_prepare_boot_cpu() code (Russell King) - Use 64-bit little-endian values in SBA IOMMU PDIR table for AGP Since there is upcoming support for booting a 64-bit kernel on QEMU, some corner cases were fixed and improvements added: - Fix 64-bit kernel crash in STI (graphics console) font setup code which miscalculated the font start address as it gets signed vs unsigned offsets wrong - Support building an uncompressed Linux kernel - Add support for soft power-off in qemu" * tag 'parisc-for-6.7-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux: fbdev: stifb: Make the STI next font pointer a 32-bit signed offset parisc: Show default CPU PSW.W setting as reported by PDC parisc/pdc: Add width field to struct pdc_model parisc: Add nop instructions after TLB inserts parisc: simplify smp_prepare_boot_cpu() parisc/agp: Use 64-bit LE values in SBA IOMMU PDIR table parisc/firmware: Use PDC constants for narrow/wide firmware parisc: Move parisc_narrow_firmware variable to header file parisc/power: Trivial whitespace cleanups and license update parisc/power: Add power soft-off when running on qemu parisc: Allow building uncompressed Linux kernel parisc: Add some missing PDC functions and constants parisc: sba-iommu: Fix comment when calculating IOC number
2 parents 979ff1e + 8a32aa1 commit f00593e

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14 files changed

+133
-102
lines changed

14 files changed

+133
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lines changed

‎arch/parisc/Kconfig‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -25,6 +25,7 @@ config PARISC
2525
select INIT_ALL_POSSIBLE
2626
select BUG
2727
select BUILDTIME_TABLE_SORT
28+
select HAVE_KERNEL_UNCOMPRESSED
2829
select HAVE_PCI
2930
select HAVE_PERF_EVENTS
3031
select HAVE_KERNEL_BZIP2

‎arch/parisc/boot/Makefile‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -10,7 +10,7 @@ subdir- := compressed
1010
$(obj)/image: vmlinux FORCE
1111
$(call if_changed,objcopy)
1212

13-
$(obj)/bzImage: $(obj)/compressed/vmlinux FORCE
13+
$(obj)/bzImage: $(if $(CONFIG_KERNEL_UNCOMPRESSED),$(objtree)/vmlinux,$(obj)/compressed/vmlinux) FORCE
1414
$(call if_changed,objcopy)
1515

1616
$(obj)/compressed/vmlinux: FORCE

‎arch/parisc/include/asm/processor.h‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -287,6 +287,7 @@ extern int _parisc_requires_coherency;
287287
#endif
288288

289289
extern int running_on_qemu;
290+
extern int parisc_narrow_firmware;
290291

291292
extern void __noreturn toc_intr(struct pt_regs *regs);
292293
extern void toc_handler(void);

‎arch/parisc/include/uapi/asm/pdc.h‎

Lines changed: 26 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -58,8 +58,8 @@
5858
#define PDC_MODEL_NVA_SUPPORTED (0 << 4)
5959
#define PDC_MODEL_NVA_SLOW (1 << 4)
6060
#define PDC_MODEL_NVA_UNSUPPORTED (3 << 4)
61-
#define PDC_MODEL_GET_BOOT__OP 8 /* returns boot test options */
62-
#define PDC_MODEL_SET_BOOT__OP 9 /* set boot test options */
61+
#define PDC_MODEL_FIRM_TEST_GET 8 /* returns boot test options */
62+
#define PDC_MODEL_FIRM_TEST_SET 9 /* set boot test options */
6363
#define PDC_MODEL_GET_PLATFORM_INFO 10 /* returns platform info */
6464
#define PDC_MODEL_GET_INSTALL_KERNEL 11 /* returns kernel for installation */
6565

@@ -472,6 +472,7 @@ struct pdc_model { /* for PDC_MODEL */
472472
unsigned long arch_rev;
473473
unsigned long pot_key;
474474
unsigned long curr_key;
475+
unsigned long width; /* default of PSW_W bit (1=enabled) */
475476
};
476477

477478
struct pdc_cache_cf { /* for PDC_CACHE (I/D-caches) */
@@ -609,6 +610,12 @@ struct pdc_system_map_addr_info { /* PDC_SYSTEM_MAP/FIND_ADDRESS */
609610
unsigned long mod_pgs;
610611
};
611612

613+
struct pdc_relocate_info_block { /* PDC_RELOCATE_INFO */
614+
unsigned long pdc_size;
615+
unsigned long pdc_alignment;
616+
unsigned long pdc_address;
617+
};
618+
612619
struct pdc_initiator { /* PDC_INITIATOR */
613620
int host_id;
614621
int factor;
@@ -717,6 +724,23 @@ struct pdc_toc_pim_20 {
717724
struct pim_cpu_state_cf cpu_state;
718725
};
719726

727+
/* for SpeedyBoot/firm_ctl funtionality */
728+
struct pdc_firm_test_get_rtn_block { /* PDC_MODEL/PDC_FIRM_TEST_GET */
729+
unsigned long current_tests; /* u_R_addr Raddr_ints[0] */
730+
unsigned long tests_supported; /* u_R_addr Raddr_ints[1] */
731+
unsigned long default_tests; /* u_R_addr Raddr_ints[2] */
732+
};
733+
734+
#define TORNADO_CPU_ID 0xB
735+
#define PCXL_CPU_ID 0xD
736+
#define PCXU_CPU_ID 0xE /* U and U+ for all but C-class with bug */
737+
#define VR_CPU_ID 0xF
738+
#define PCXU_PLUS_CPU_ID 0x10 /* U+ only on C-class with bug */
739+
#define PCXW_CPU_ID 0x11
740+
#define PCXW_PLUS_CPU_ID 0x12
741+
#define PIRANHA_CPU_ID 0x13
742+
#define MAKO_CPU_ID 0x14
743+
720744
#endif /* !defined(__ASSEMBLY__) */
721745

722746
#endif /* _UAPI_PARISC_PDC_H */

‎arch/parisc/kernel/drivers.c‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -927,8 +927,8 @@ static __init void qemu_header(void)
927927

928928
#define p ((unsigned long *)&boot_cpu_data.pdc.model)
929929
pr_info("#define PARISC_PDC_MODEL 0x%lx, 0x%lx, 0x%lx, "
930-
"0x%lx, 0x%lx, 0x%lx, 0x%lx, 0x%lx, 0x%lx\n\n",
931-
p[0], p[1], p[2], p[3], p[4], p[5], p[6], p[7], p[8]);
930+
"0x%lx, 0x%lx, 0x%lx, 0x%lx, 0x%lx, 0x%lx, 0x%lx\n\n",
931+
p[0], p[1], p[2], p[3], p[4], p[5], p[6], p[7], p[8], p[9]);
932932
#undef p
933933

934934
pr_info("#define PARISC_PDC_VERSION 0x%04lx\n\n",

‎arch/parisc/kernel/entry.S‎

Lines changed: 52 additions & 29 deletions
Original file line numberDiff line numberDiff line change
@@ -36,6 +36,24 @@
3636
.level 2.0
3737
#endif
3838

39+
/*
40+
* We need seven instructions after a TLB insert for it to take effect.
41+
* The PA8800/PA8900 processors are an exception and need 12 instructions.
42+
* The RFI changes both IAOQ_Back and IAOQ_Front, so it counts as one.
43+
*/
44+
#ifdef CONFIG_64BIT
45+
#define NUM_PIPELINE_INSNS 12
46+
#else
47+
#define NUM_PIPELINE_INSNS 7
48+
#endif
49+
50+
/* Insert num nops */
51+
.macro insert_nops num
52+
.rept \num
53+
nop
54+
.endr
55+
.endm
56+
3957
/* Get aligned page_table_lock address for this mm from cr28/tr4 */
4058
.macro get_ptl reg
4159
mfctl %cr28,\reg
@@ -415,24 +433,20 @@
415433
3:
416434
.endm
417435

418-
/* Release page_table_lock without reloading lock address.
419-
We use an ordered store to ensure all prior accesses are
420-
performed prior to releasing the lock. */
421-
.macro ptl_unlock0 spc,tmp,tmp2
436+
/* Release page_table_lock if for user space. We use an ordered
437+
store to ensure all prior accesses are performed prior to
438+
releasing the lock. Note stw may not be executed, so we
439+
provide one extra nop when CONFIG_TLB_PTLOCK is defined. */
440+
.macro ptl_unlock spc,tmp,tmp2
422441
#ifdef CONFIG_TLB_PTLOCK
423-
98: ldi __ARCH_SPIN_LOCK_UNLOCKED_VAL, \tmp2
442+
98: get_ptl \tmp
443+
ldi __ARCH_SPIN_LOCK_UNLOCKED_VAL, \tmp2
424444
or,COND(=) %r0,\spc,%r0
425445
stw,ma \tmp2,0(\tmp)
426446
99: ALTERNATIVE(98b, 99b, ALT_COND_NO_SMP, INSN_NOP)
427-
#endif
428-
.endm
429-
430-
/* Release page_table_lock. */
431-
.macro ptl_unlock1 spc,tmp,tmp2
432-
#ifdef CONFIG_TLB_PTLOCK
433-
98: get_ptl \tmp
434-
ptl_unlock0 \spc,\tmp,\tmp2
435-
99: ALTERNATIVE(98b, 99b, ALT_COND_NO_SMP, INSN_NOP)
447+
insert_nops NUM_PIPELINE_INSNS - 4
448+
#else
449+
insert_nops NUM_PIPELINE_INSNS - 1
436450
#endif
437451
.endm
438452

@@ -1124,7 +1138,7 @@ dtlb_miss_20w:
11241138

11251139
idtlbt pte,prot
11261140

1127-
ptl_unlock1 spc,t0,t1
1141+
ptl_unlock spc,t0,t1
11281142
rfir
11291143
nop
11301144

@@ -1133,6 +1147,7 @@ dtlb_check_alias_20w:
11331147

11341148
idtlbt pte,prot
11351149

1150+
insert_nops NUM_PIPELINE_INSNS - 1
11361151
rfir
11371152
nop
11381153

@@ -1150,7 +1165,7 @@ nadtlb_miss_20w:
11501165

11511166
idtlbt pte,prot
11521167

1153-
ptl_unlock1 spc,t0,t1
1168+
ptl_unlock spc,t0,t1
11541169
rfir
11551170
nop
11561171

@@ -1159,6 +1174,7 @@ nadtlb_check_alias_20w:
11591174

11601175
idtlbt pte,prot
11611176

1177+
insert_nops NUM_PIPELINE_INSNS - 1
11621178
rfir
11631179
nop
11641180

@@ -1184,7 +1200,7 @@ dtlb_miss_11:
11841200

11851201
mtsp t1, %sr1 /* Restore sr1 */
11861202

1187-
ptl_unlock1 spc,t0,t1
1203+
ptl_unlock spc,t0,t1
11881204
rfir
11891205
nop
11901206

@@ -1194,6 +1210,7 @@ dtlb_check_alias_11:
11941210
idtlba pte,(va)
11951211
idtlbp prot,(va)
11961212

1213+
insert_nops NUM_PIPELINE_INSNS - 1
11971214
rfir
11981215
nop
11991216

@@ -1217,7 +1234,7 @@ nadtlb_miss_11:
12171234

12181235
mtsp t1, %sr1 /* Restore sr1 */
12191236

1220-
ptl_unlock1 spc,t0,t1
1237+
ptl_unlock spc,t0,t1
12211238
rfir
12221239
nop
12231240

@@ -1227,6 +1244,7 @@ nadtlb_check_alias_11:
12271244
idtlba pte,(va)
12281245
idtlbp prot,(va)
12291246

1247+
insert_nops NUM_PIPELINE_INSNS - 1
12301248
rfir
12311249
nop
12321250

@@ -1246,7 +1264,7 @@ dtlb_miss_20:
12461264

12471265
idtlbt pte,prot
12481266

1249-
ptl_unlock1 spc,t0,t1
1267+
ptl_unlock spc,t0,t1
12501268
rfir
12511269
nop
12521270

@@ -1255,6 +1273,7 @@ dtlb_check_alias_20:
12551273

12561274
idtlbt pte,prot
12571275

1276+
insert_nops NUM_PIPELINE_INSNS - 1
12581277
rfir
12591278
nop
12601279

@@ -1274,7 +1293,7 @@ nadtlb_miss_20:
12741293

12751294
idtlbt pte,prot
12761295

1277-
ptl_unlock1 spc,t0,t1
1296+
ptl_unlock spc,t0,t1
12781297
rfir
12791298
nop
12801299

@@ -1283,6 +1302,7 @@ nadtlb_check_alias_20:
12831302

12841303
idtlbt pte,prot
12851304

1305+
insert_nops NUM_PIPELINE_INSNS - 1
12861306
rfir
12871307
nop
12881308

@@ -1319,7 +1339,7 @@ itlb_miss_20w:
13191339

13201340
iitlbt pte,prot
13211341

1322-
ptl_unlock1 spc,t0,t1
1342+
ptl_unlock spc,t0,t1
13231343
rfir
13241344
nop
13251345

@@ -1343,7 +1363,7 @@ naitlb_miss_20w:
13431363

13441364
iitlbt pte,prot
13451365

1346-
ptl_unlock1 spc,t0,t1
1366+
ptl_unlock spc,t0,t1
13471367
rfir
13481368
nop
13491369

@@ -1352,6 +1372,7 @@ naitlb_check_alias_20w:
13521372

13531373
iitlbt pte,prot
13541374

1375+
insert_nops NUM_PIPELINE_INSNS - 1
13551376
rfir
13561377
nop
13571378

@@ -1377,7 +1398,7 @@ itlb_miss_11:
13771398

13781399
mtsp t1, %sr1 /* Restore sr1 */
13791400

1380-
ptl_unlock1 spc,t0,t1
1401+
ptl_unlock spc,t0,t1
13811402
rfir
13821403
nop
13831404

@@ -1401,7 +1422,7 @@ naitlb_miss_11:
14011422

14021423
mtsp t1, %sr1 /* Restore sr1 */
14031424

1404-
ptl_unlock1 spc,t0,t1
1425+
ptl_unlock spc,t0,t1
14051426
rfir
14061427
nop
14071428

@@ -1411,6 +1432,7 @@ naitlb_check_alias_11:
14111432
iitlba pte,(%sr0, va)
14121433
iitlbp prot,(%sr0, va)
14131434

1435+
insert_nops NUM_PIPELINE_INSNS - 1
14141436
rfir
14151437
nop
14161438

@@ -1431,7 +1453,7 @@ itlb_miss_20:
14311453

14321454
iitlbt pte,prot
14331455

1434-
ptl_unlock1 spc,t0,t1
1456+
ptl_unlock spc,t0,t1
14351457
rfir
14361458
nop
14371459

@@ -1451,7 +1473,7 @@ naitlb_miss_20:
14511473

14521474
iitlbt pte,prot
14531475

1454-
ptl_unlock1 spc,t0,t1
1476+
ptl_unlock spc,t0,t1
14551477
rfir
14561478
nop
14571479

@@ -1460,6 +1482,7 @@ naitlb_check_alias_20:
14601482

14611483
iitlbt pte,prot
14621484

1485+
insert_nops NUM_PIPELINE_INSNS - 1
14631486
rfir
14641487
nop
14651488

@@ -1481,7 +1504,7 @@ dbit_trap_20w:
14811504

14821505
idtlbt pte,prot
14831506

1484-
ptl_unlock0 spc,t0,t1
1507+
ptl_unlock spc,t0,t1
14851508
rfir
14861509
nop
14871510
#else
@@ -1507,7 +1530,7 @@ dbit_trap_11:
15071530

15081531
mtsp t1, %sr1 /* Restore sr1 */
15091532

1510-
ptl_unlock0 spc,t0,t1
1533+
ptl_unlock spc,t0,t1
15111534
rfir
15121535
nop
15131536

@@ -1527,7 +1550,7 @@ dbit_trap_20:
15271550

15281551
idtlbt pte,prot
15291552

1530-
ptl_unlock0 spc,t0,t1
1553+
ptl_unlock spc,t0,t1
15311554
rfir
15321555
nop
15331556
#endif

‎arch/parisc/kernel/firmware.c‎

Lines changed: 7 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -78,12 +78,12 @@ static unsigned long pdc_result[NUM_PDC_RESULT] __aligned(8);
7878
static unsigned long pdc_result2[NUM_PDC_RESULT] __aligned(8);
7979

8080
#ifdef CONFIG_64BIT
81-
#define WIDE_FIRMWARE 0x1
82-
#define NARROW_FIRMWARE 0x2
81+
#define WIDE_FIRMWARE PDC_MODEL_OS64
82+
#define NARROW_FIRMWARE PDC_MODEL_OS32
8383

84-
/* Firmware needs to be initially set to narrow to determine the
84+
/* Firmware needs to be initially set to narrow to determine the
8585
* actual firmware width. */
86-
int parisc_narrow_firmware __ro_after_init = 2;
86+
int parisc_narrow_firmware __ro_after_init = NARROW_FIRMWARE;
8787
#endif
8888

8989
/* On most currently-supported platforms, IODC I/O calls are 32-bit calls
@@ -166,10 +166,10 @@ void set_firmware_width_unlocked(void)
166166
if (pdc_result[0] != NARROW_FIRMWARE)
167167
parisc_narrow_firmware = 0;
168168
}
169-
169+
170170
/**
171171
* set_firmware_width - Determine if the firmware is wide or narrow.
172-
*
172+
*
173173
* This function must be called before any pdc_* function that uses the
174174
* convert_to_wide function.
175175
*/
@@ -178,7 +178,7 @@ void set_firmware_width(void)
178178
unsigned long flags;
179179

180180
/* already initialized? */
181-
if (parisc_narrow_firmware != 2)
181+
if (parisc_narrow_firmware != NARROW_FIRMWARE)
182182
return;
183183

184184
spin_lock_irqsave(&pdc_lock, flags);

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