Merge pull request The-OpenROAD-Project#3493 from The-OpenROAD-Project-staging/secure-update-variables-yaml

Removed `stages` of SYNTH_WRAPPED_OPERATORS and SWAP_ARITH_OPERATORS in variables.yaml

Author: maliberty

docs/user/FlowVariables.md

@@ -265,7 +265,6 @@ configuration file.
 - [MIN_BUF_CELL_AND_PORTS](#MIN_BUF_CELL_AND_PORTS)
 - [SDC_FILE](#SDC_FILE)
 - [SDC_GUT](#SDC_GUT)
-- [SWAP_ARITH_OPERATORS](#SWAP_ARITH_OPERATORS)
 - [SYNTH_BLACKBOXES](#SYNTH_BLACKBOXES)
 - [SYNTH_CANONICALIZE_TCL](#SYNTH_CANONICALIZE_TCL)
 - [SYNTH_GUT](#SYNTH_GUT)
@@ -277,7 +276,6 @@ configuration file.
 - [SYNTH_NETLIST_FILES](#SYNTH_NETLIST_FILES)
 - [SYNTH_OPT_HIER](#SYNTH_OPT_HIER)
 - [SYNTH_RETIME_MODULES](#SYNTH_RETIME_MODULES)
-- [SYNTH_WRAPPED_OPERATORS](#SYNTH_WRAPPED_OPERATORS)
 - [TIEHI_CELL_AND_PORT](#TIEHI_CELL_AND_PORT)
 - [TIELO_CELL_AND_PORT](#TIELO_CELL_AND_PORT)
 - [VERILOG_DEFINES](#VERILOG_DEFINES)
@@ -340,8 +338,6 @@ configuration file.
 - [SKIP_REPAIR_TIE_FANOUT](#SKIP_REPAIR_TIE_FANOUT)
 - [SKIP_REPORT_METRICS](#SKIP_REPORT_METRICS)
 - [SKIP_VT_SWAP](#SKIP_VT_SWAP)
-- [SWAP_ARITH_OPERATORS](#SWAP_ARITH_OPERATORS)
-- [SYNTH_WRAPPED_OPERATORS](#SYNTH_WRAPPED_OPERATORS)
 - [TAPCELL_TCL](#TAPCELL_TCL)
 - [TIEHI_CELL_AND_PORT](#TIEHI_CELL_AND_PORT)
 - [TIELO_CELL_AND_PORT](#TIELO_CELL_AND_PORT)
@@ -366,8 +362,6 @@ configuration file.
 - [PLACE_PINS_ARGS](#PLACE_PINS_ARGS)
 - [ROUTING_LAYER_ADJUSTMENT](#ROUTING_LAYER_ADJUSTMENT)
 - [SKIP_REPORT_METRICS](#SKIP_REPORT_METRICS)
-- [SWAP_ARITH_OPERATORS](#SWAP_ARITH_OPERATORS)
-- [SYNTH_WRAPPED_OPERATORS](#SYNTH_WRAPPED_OPERATORS)
 
 ## cts variables
 
@@ -394,8 +388,6 @@ configuration file.
 - [SKIP_PIN_SWAP](#SKIP_PIN_SWAP)
 - [SKIP_REPORT_METRICS](#SKIP_REPORT_METRICS)
 - [SKIP_VT_SWAP](#SKIP_VT_SWAP)
-- [SWAP_ARITH_OPERATORS](#SWAP_ARITH_OPERATORS)
-- [SYNTH_WRAPPED_OPERATORS](#SYNTH_WRAPPED_OPERATORS)
 - [TNS_END_PERCENT](#TNS_END_PERCENT)
 
 ## grt variables
@@ -418,8 +410,6 @@ configuration file.
 - [SKIP_PIN_SWAP](#SKIP_PIN_SWAP)
 - [SKIP_REPORT_METRICS](#SKIP_REPORT_METRICS)
 - [SKIP_VT_SWAP](#SKIP_VT_SWAP)
-- [SWAP_ARITH_OPERATORS](#SWAP_ARITH_OPERATORS)
-- [SYNTH_WRAPPED_OPERATORS](#SYNTH_WRAPPED_OPERATORS)
 - [TNS_END_PERCENT](#TNS_END_PERCENT)
 
 ## route variables
@@ -435,8 +425,6 @@ configuration file.
 - [ROUTING_LAYER_ADJUSTMENT](#ROUTING_LAYER_ADJUSTMENT)
 - [SKIP_DETAILED_ROUTE](#SKIP_DETAILED_ROUTE)
 - [SKIP_REPORT_METRICS](#SKIP_REPORT_METRICS)
-- [SWAP_ARITH_OPERATORS](#SWAP_ARITH_OPERATORS)
-- [SYNTH_WRAPPED_OPERATORS](#SYNTH_WRAPPED_OPERATORS)
 
 ## final variables
 
@@ -450,6 +438,10 @@ configuration file.
 - [ROUTING_LAYER_ADJUSTMENT](#ROUTING_LAYER_ADJUSTMENT)
 - [SKIP_DETAILED_ROUTE](#SKIP_DETAILED_ROUTE)
 - [SKIP_REPORT_METRICS](#SKIP_REPORT_METRICS)
+
+## All stages variables
+
+- [OPENROAD_HIERARCHICAL](#OPENROAD_HIERARCHICAL)
 - [SWAP_ARITH_OPERATORS](#SWAP_ARITH_OPERATORS)
 - [SYNTH_WRAPPED_OPERATORS](#SYNTH_WRAPPED_OPERATORS)
 
@@ -461,10 +453,6 @@ configuration file.
 
 - [RULES_JSON](#RULES_JSON)
 
-## All stages variables
-
-
-
 ## Uncategorized variables
 
 - [ADDITIONAL_FILES](#ADDITIONAL_FILES)
@@ -492,7 +480,6 @@ configuration file.
 - [KLAYOUT_TECH_FILE](#KLAYOUT_TECH_FILE)
 - [LIB_FILES](#LIB_FILES)
 - [MACRO_EXTENSION](#MACRO_EXTENSION)
-- [OPENROAD_HIERARCHICAL](#OPENROAD_HIERARCHICAL)
 - [PLATFORM](#PLATFORM)
 - [PLATFORM_TCL](#PLATFORM_TCL)
 - [PROCESS](#PROCESS)

flow/scripts/generate-variables-docs.py

@@ -43,7 +43,7 @@
 
 markdown_table += table_header + table_rows
 
-for stage in stages + ["All stages", "Uncategorized"]:
+for stage in stages + ["Uncategorized"]:
     markdown_table += f"## {stage} variables\n\n"
     stage_keys = [
         key

flow/scripts/non_stage_variables.py

@@ -18,6 +18,8 @@
 for key, value in data.items():
     if "stages" not in value:
         continue
+    if "All stages" in value["stages"]:
+        continue
     if sys.argv[1] in value["stages"]:
         continue
     # This variable is in a stage, but not in this stage

flow/scripts/variables.yaml

@@ -297,24 +297,12 @@ SYNTH_WRAPPED_OPERATORS:
     design. These options are available for switching among in later stages of
     the flow.
   stages:
-    - synth
-    - floorplan
-    - place
-    - cts
-    - grt
-    - route
-    - final
+    - All stages
 SWAP_ARITH_OPERATORS:
   description: >
     Improve timing QoR by swapping ALU and MULT arithmetic operators.
   stages:
-    - synth
-    - floorplan
-    - place
-    - cts
-    - grt
-    - route
-    - final
+    - All stages
 FLOORPLAN_DEF:
   description: |
     Use the DEF file to initialize floorplan.
@@ -1071,3 +1059,5 @@ OPENROAD_HIERARCHICAL:
     otherwise considered flat. Will eventually be the default and
     this option will be retired.
   default: 0
+  stages:
+    - All stages