diff --git a/.github/dependabot.yml b/.github/dependabot.yml
new file mode 100644
index 0000000000..123014908b
--- /dev/null
+++ b/.github/dependabot.yml
@@ -0,0 +1,6 @@
+version: 2
+updates:
+ - package-ecosystem: "github-actions"
+ directory: "/"
+ schedule:
+ interval: "daily"
diff --git a/.github/workflows/black.yaml b/.github/workflows/black.yaml
index 117bbab072..bcca7ef110 100644
--- a/.github/workflows/black.yaml
+++ b/.github/workflows/black.yaml
@@ -5,5 +5,5 @@ jobs:
lint:
runs-on: ${{ vars.USE_SELF_HOSTED == 'true' && 'self-hosted' || 'ubuntu-latest' }}
steps:
- - uses: actions/checkout@v3
+ - uses: actions/checkout@v5
- uses: psf/black@stable
diff --git a/.github/workflows/github-actions-cron-test-installer.yml b/.github/workflows/github-actions-cron-test-installer.yml
index 2a53fde91a..fd16918e50 100644
--- a/.github/workflows/github-actions-cron-test-installer.yml
+++ b/.github/workflows/github-actions-cron-test-installer.yml
@@ -30,7 +30,7 @@ jobs:
runs-on: ${{ vars.USE_SELF_HOSTED == 'true' && 'self-hosted' || 'ubuntu-latest' }}
steps:
- name: Check out repository code
- uses: actions/checkout@v3
+ uses: actions/checkout@v5
with:
fetch-depth: 1
submodules: recursive
diff --git a/.github/workflows/github-actions-cron-update-OR.yml b/.github/workflows/github-actions-cron-update-OR.yml
index 695bd621f0..29ebac9589 100644
--- a/.github/workflows/github-actions-cron-update-OR.yml
+++ b/.github/workflows/github-actions-cron-update-OR.yml
@@ -10,7 +10,7 @@ jobs:
runs-on: ${{ vars.USE_SELF_HOSTED == 'true' && 'self-hosted' || 'ubuntu-latest' }}
steps:
- name: Check out repository code recursively
- uses: actions/checkout@v3
+ uses: actions/checkout@v5
with:
submodules: recursive
- name: Pull changes in OpenROAD submodule
diff --git a/.github/workflows/github-actions-cron-update-yosys.yml b/.github/workflows/github-actions-cron-update-yosys.yml
index f19a27ebe5..22d1caff51 100644
--- a/.github/workflows/github-actions-cron-update-yosys.yml
+++ b/.github/workflows/github-actions-cron-update-yosys.yml
@@ -11,7 +11,7 @@ jobs:
runs-on: ${{ vars.USE_SELF_HOSTED == 'true' && 'self-hosted' || 'ubuntu-latest' }}
steps:
- name: Check out repository code recursively
- uses: actions/checkout@v3
+ uses: actions/checkout@v5
with:
submodules: recursive
fetch-depth: 0
@@ -28,7 +28,7 @@ jobs:
git checkout ${latesttag}
- if: "steps.remote-update.outputs.has_update != ''"
name: Create Draft PR
- uses: peter-evans/create-pull-request@v6
+ uses: peter-evans/create-pull-request@v7
with:
token: ${{ github.token }}
signoff: true
diff --git a/.github/workflows/github-actions-cron-util-test.yml b/.github/workflows/github-actions-cron-util-test.yml
index dcfda4c78b..9afdae08ca 100644
--- a/.github/workflows/github-actions-cron-util-test.yml
+++ b/.github/workflows/github-actions-cron-util-test.yml
@@ -20,7 +20,7 @@ jobs:
runs-on: ${{ vars.USE_SELF_HOSTED == 'true' && 'self-hosted' || 'ubuntu-latest' }}
steps:
- name: Check out repository code
- uses: actions/checkout@v3
+ uses: actions/checkout@v5
with:
fetch-depth: 1
submodules: recursive
diff --git a/.github/workflows/github-actions-lint-tcl.yml b/.github/workflows/github-actions-lint-tcl.yml
index 0399b50831..4b34d73322 100644
--- a/.github/workflows/github-actions-lint-tcl.yml
+++ b/.github/workflows/github-actions-lint-tcl.yml
@@ -13,7 +13,7 @@ jobs:
runs-on: ${{ vars.USE_SELF_HOSTED == 'true' && 'self-hosted' || 'ubuntu-latest' }}
steps:
- name: Checkout repository
- uses: actions/checkout@v4
+ uses: actions/checkout@v5
- name: Install Dependencies
run: |
diff --git a/.github/workflows/github-actions-manual-update-rules.yml b/.github/workflows/github-actions-manual-update-rules.yml
index cdcf2744e2..f5ea682ef7 100644
--- a/.github/workflows/github-actions-manual-update-rules.yml
+++ b/.github/workflows/github-actions-manual-update-rules.yml
@@ -14,10 +14,10 @@ jobs:
fail-fast: false
steps:
- name: Check out repository code recursively
- uses: actions/checkout@v3
+ uses: actions/checkout@v5
with:
fetch-depth: 0
- - uses: actions/setup-python@v4
+ - uses: actions/setup-python@v6
with:
python-version: "3.10"
- name: Install Python Packages
diff --git a/.github/workflows/github-actions-on-push.yml b/.github/workflows/github-actions-on-push.yml
index 579beea403..a4cba86dd8 100644
--- a/.github/workflows/github-actions-on-push.yml
+++ b/.github/workflows/github-actions-on-push.yml
@@ -11,6 +11,6 @@ jobs:
runs-on: ${{ vars.USE_SELF_HOSTED == 'true' && 'self-hosted' || 'ubuntu-latest' }}
steps:
- name: Check out repository code
- uses: actions/checkout@v2
+ uses: actions/checkout@v5
- name: run security_scan_on_push
uses: The-OpenROAD-Project/actions/security_scan_on_push@main
diff --git a/.github/workflows/github-actions-publish-docker-images.yml b/.github/workflows/github-actions-publish-docker-images.yml
index 476ec3220d..5a7d60a975 100644
--- a/.github/workflows/github-actions-publish-docker-images.yml
+++ b/.github/workflows/github-actions-publish-docker-images.yml
@@ -30,7 +30,7 @@ jobs:
runs-on: ${{ vars.USE_SELF_HOSTED == 'true' && 'self-hosted' || 'ubuntu-latest' }}
timeout-minutes: 600
steps:
- - uses: actions/checkout@v4
+ - uses: actions/checkout@v5
- name: Set environment variables
run: echo "IMAGE=ghcr.io/$(echo ${{ github.repository }} | tr '[:upper:]' '[:lower:]')" >> $GITHUB_ENV
@@ -64,7 +64,7 @@ jobs:
runs-on: ${{ vars.USE_SELF_HOSTED == 'true' && 'self-hosted' || 'ubuntu-latest' }}
steps:
- name: Check out repository code
- uses: actions/checkout@v4
+ uses: actions/checkout@v5
with:
fetch-depth: 1
submodules: recursive
@@ -78,7 +78,7 @@ jobs:
- name: Login to GitHub Container Registry (GHCR)
if: github.event_name != 'pull_request'
- uses: docker/login-action@v2
+ uses: docker/login-action@v3
with:
registry: ghcr.io
username: gha
@@ -113,7 +113,7 @@ jobs:
tool-cache: false
- name: Check out repository code
- uses: actions/checkout@v4
+ uses: actions/checkout@v5
with:
fetch-depth: 1
submodules: recursive
@@ -129,7 +129,7 @@ jobs:
- name: Login to GitHub Container Registry (GHCR)
if: github.event_name != 'pull_request'
- uses: docker/login-action@v2
+ uses: docker/login-action@v3
with:
registry: ghcr.io
username: gha
diff --git a/.github/workflows/github-actions-update-rules.yml b/.github/workflows/github-actions-update-rules.yml
index 3355612ba5..9350ed41c8 100644
--- a/.github/workflows/github-actions-update-rules.yml
+++ b/.github/workflows/github-actions-update-rules.yml
@@ -11,7 +11,7 @@ jobs:
fail-fast: false
steps:
- name: Check out repository code recursively
- uses: actions/checkout@v3
+ uses: actions/checkout@v5
with:
fetch-depth: 0
- name: Git prep
@@ -19,7 +19,7 @@ jobs:
git config --add remote.origin.fetch "+refs/pull/*/head:refs/remotes/origin/pr/*"
git fetch
git checkout "origin/pr/${{ github.event.client_payload.branch }}"
- - uses: actions/setup-python@v4
+ - uses: actions/setup-python@v6
with:
python-version: "3.10"
- name: Install Python Packages
@@ -58,7 +58,7 @@ jobs:
git push origin "HEAD:refs/pull/${{ github.event.client_payload.branch }}/head"
- if: "steps.remote-update.outputs.has_update == 'true' && github.event.client_payload.branch == 'master'"
name: Create Draft PR
- uses: peter-evans/create-pull-request@v5
+ uses: peter-evans/create-pull-request@v7
with:
token: ${{ github.token }}
signoff: true
diff --git a/.github/workflows/github-actions-yaml-test.yml b/.github/workflows/github-actions-yaml-test.yml
index 704f34ab78..ad54a2625f 100644
--- a/.github/workflows/github-actions-yaml-test.yml
+++ b/.github/workflows/github-actions-yaml-test.yml
@@ -10,7 +10,7 @@ jobs:
runs-on: ${{ vars.USE_SELF_HOSTED == 'true' && 'self-hosted' || 'ubuntu-latest' }}
steps:
- name: Checkout repository
- uses: actions/checkout@v4
+ uses: actions/checkout@v5
with:
fetch-depth: 1
sparse-checkout: |
diff --git a/build_openroad.sh b/build_openroad.sh
index c4967f9b68..6350784bc1 100755
--- a/build_openroad.sh
+++ b/build_openroad.sh
@@ -49,6 +49,8 @@ Options:
-l, --latest Use the head of branch --or_branch or 'master'
by default for tools/OpenROAD.
+ -s, --skip_openroad Skip building and all git operations on OpenROAD.
+
--or_branch BRANCH_NAME Use the head of branch BRANCH for tools/OpenROAD.
--or_repo REPO_URL Use a fork at REPO-URL (https/ssh) for tools/OpenROAD.
@@ -107,6 +109,9 @@ while (( "$#" )); do
-l|--latest)
USE_OPENROAD_APP_LATEST=1
;;
+ -s|--skip_openroad)
+ SKIP_OPENROAD=1
+ ;;
--or_branch)
OPENROAD_APP_BRANCH="$2"
shift
@@ -237,9 +242,11 @@ __local_build()
set -u
fi
- echo "[INFO FLW-0018] Compiling OpenROAD."
- eval ${NICE} ./tools/OpenROAD/etc/Build.sh -dir="$DIR/tools/OpenROAD/build" -threads=${PROC} -cmake=\'${OPENROAD_APP_ARGS}\'
- ${NICE} cmake --build tools/OpenROAD/build --target install -j "${PROC}"
+ if [ -z "${SKIP_OPENROAD+x}" ]; then
+ echo "[INFO FLW-0018] Compiling OpenROAD."
+ eval ${NICE} ./tools/OpenROAD/etc/Build.sh -dir="$DIR/tools/OpenROAD/build" -threads=${PROC} -cmake=\'${OPENROAD_APP_ARGS}\'
+ ${NICE} cmake --build tools/OpenROAD/build --target install -j "${PROC}"
+ fi
YOSYS_ABC_PATH=tools/yosys/abc
if [[ -d "${YOSYS_ABC_PATH}/.git" ]]; then
@@ -303,7 +310,7 @@ __common_setup()
__change_openroad_app_remote
fi
- if [ ! -z "${USE_OPENROAD_APP_LATEST+x}" ] || [ "${OPENROAD_APP_BRANCH}" != "master" ]; then
+ if [ -z "${SKIP_OPENROAD+x}" ] && ( [ ! -z "${USE_OPENROAD_APP_LATEST+x}" ] || [ "${OPENROAD_APP_BRANCH}" != "master" ] ) ; then
echo -n "[INFO FLW-0004] Updating OpenROAD app to the HEAD"
echo " of ${OPENROAD_APP_REMOTE}/${OPENROAD_APP_BRANCH}."
__update_openroad_app_latest
diff --git a/docs/user/BuildLocally.md b/docs/user/BuildLocally.md
index 857235d288..79a2dd09aa 100644
--- a/docs/user/BuildLocally.md
+++ b/docs/user/BuildLocally.md
@@ -12,6 +12,23 @@ cd OpenROAD-flow-scripts
sudo ./setup.sh
```
+## Using Bazel to build OpenROAD and run the ORFS flow
+
+Long story short: OpenROAD will eventually switch to using Bazel for downloading dependencies and building OpenROAD for all the reasons that the DependencyInstaller.sh and cmake are hard to support and brittle across platforms.
+
+Currently the simplest way to build OpenROAD and run ORFS is to run one test, which will download all OpenROAD dependencies and build OpenROAD in the exec configuration:
+
+``` shell
+cd tools/OpenROAD
+bazelisk test src/drt/...
+cd ../../flow
+make OPENROAD_EXE=$(pwd)/../tools/OpenROAD/bazel-out/k8-opt-exec-ST-*/bin/openroad
+```
+
+Bazel could similarly be used to download and make available pre-built binaries for tools such as Yosys, eqy and KLayout.
+
+Running some quick tests will cause the desired exec config of OpenROAD to be built. There's no explicit Bazel way to build an exec config of an executable and we want to to use an exec config that is the same binary as is used for a local OpenROAD modify + test Bazel cycle.
+
## Build
``` shell
diff --git a/docs/user/BuildWithPrebuilt.md b/docs/user/BuildWithPrebuilt.md
index 2fc27fd486..10b7dc7b2f 100644
--- a/docs/user/BuildWithPrebuilt.md
+++ b/docs/user/BuildWithPrebuilt.md
@@ -5,7 +5,7 @@ Please ensure the Klayout version (denoted with `klayoutVersion` variable) is co
Instructions for installing:
- [Klayout>=0.28.8](https://www.klayout.de/build.html)
-- [Yosys>=0.39](https://github.com/YosysHQ/oss-cad-suite-build/blob/master/README.md#installation)
+- [Yosys>=0.58](https://github.com/YosysHQ/oss-cad-suite-build/blob/master/README.md#installation)
```{tip} Unfortunately KLayout maintainers do not provide Debian 11 compatible packages. You can follow the build-from-sources instruction (Version >=0.25) and Ubuntu 22 instructions [here](https://www.klayout.de/build.html#:~:text=Building%20KLayout%20on%20Linux%20(Version%20%3E%3D%200.25)).
```
diff --git a/docs/user/FlowVariables.md b/docs/user/FlowVariables.md
index d03bf79859..dbf7d4bb62 100644
--- a/docs/user/FlowVariables.md
+++ b/docs/user/FlowVariables.md
@@ -100,12 +100,14 @@ configuration file.
| ADDITIONAL_GDS| Hardened macro GDS files listed here.| |
| ADDITIONAL_LEFS| Hardened macro LEF view files listed here. The LEF information of the macros is immutable and used throughout all stages. Stored in the .odb file.| |
| ADDITIONAL_LIBS| Hardened macro library files listed here. The library information is immutable and used throughout all stages. Not stored in the .odb file.| |
+| BALANCE_ROWS| Balance rows during placement.| 0|
| BLOCKS| Blocks used as hard macros in a hierarchical flow. Do note that you have to specify block-specific inputs file in the directory mentioned by Makefile.| |
| CAP_MARGIN| Specifies a capacitance margin when fixing max capacitance violations. This option allows you to overfix.| |
| CDL_FILES| Insert additional Circuit Description Language (`.cdl`) netlist files.| |
| CELL_PAD_IN_SITES_DETAIL_PLACEMENT| Cell padding on both sides in site widths to ease routability in detail placement.| 0|
| CELL_PAD_IN_SITES_GLOBAL_PLACEMENT| Cell padding on both sides in site widths to ease routability during global placement.| 0|
| CLKGATE_MAP_FILE| List of cells for gating clock treated as a black box by Yosys.| |
+| CLUSTER_FLOPS| Minimum number of flip-flops per sink cluster.| 0|
| CORE_AREA| The core area specified as a list of lower-left and upper-right corners in microns (X1 Y1 X2 Y2).| |
| CORE_ASPECT_RATIO| The core aspect ratio (height / width). This value is ignored if `CORE_UTILIZATION` is undefined.| 1.0|
| CORE_MARGIN| The margin between the core area and die area, specified in microns. Allowed values are either one value for all margins or a set of four values, one for each margin. The order of the four values are: `{bottom top left right}`. This variable is ignored if `CORE_UTILIZATION` is undefined.| 1.0|
@@ -118,6 +120,7 @@ configuration file.
| CTS_CLUSTER_SIZE| Maximum number of sinks per cluster.| |
| CTS_LIB_NAME| Name of the Liberty library to use in selecting the clock buffers.| |
| CTS_SNAPSHOT| Creates ODB/SDC files prior to clock net and setup/hold repair.| |
+| CTS_SNAPSHOTS| Create ODB/SDC files at different stages of CTS.| 0|
| DESIGN_NAME| The name of the top-level module of the design.| |
| DESIGN_NICKNAME| DESIGN_NICKNAME just changes the directory name that ORFS outputs to be DESIGN_NICKNAME instead of DESIGN_NAME in case DESIGN_NAME is unwieldy or conflicts with a different design.| |
| DETAILED_METRICS| If set, then calls report_metrics prior to repair operations in the CTS and global route stages| 0|
@@ -125,8 +128,8 @@ configuration file.
| DETAILED_ROUTE_END_ITERATION| Maximum number of iterations.| 64|
| DFF_LIB_FILES| Technology mapping liberty files for flip-flops.| |
| DIE_AREA| The die area specified as a list of lower-left and upper-right corners in microns (X1 Y1 X2 Y2).| |
+| DONT_BUFFER_PORTS| Do not buffer input/output ports during floorplanning.| 0|
| DONT_USE_CELLS| Dont use cells eases pin access in detailed routing.| |
-| DONT_USE_LIBS| Set liberty files as `dont_use`.| |
| DPO_MAX_DISPLACEMENT| Specifies how far an instance can be moved when optimizing.| 5 1|
| EARLY_SIZING_CAP_RATIO| Ratio between the input pin capacitance and the output pin load during initial gate sizing.| |
| ENABLE_DPO| Enable detail placement with improve_placement feature.| 1|
@@ -134,8 +137,10 @@ configuration file.
| FASTROUTE_TCL| Specifies a Tcl script with commands to run before FastRoute.| |
| FILL_CELLS| Fill cells are used to fill empty sites. If not set or empty, fill cell insertion is skipped.| |
| FILL_CONFIG| JSON rule file for metal fill during chip finishing.| |
-| FLOORPLAN_DEF| Use the DEF file to initialize floorplan.| |
+| FLOORPLAN_DEF| Use the DEF file to initialize floorplan. Mutually exclusive with FOOTPRINT or DIE_AREA/CORE_AREA or CORE_UTILIZATION.| |
| FLOW_VARIANT| Flow variant to use, used in the flow variant directory name.| base|
+| FOOTPRINT| Custom footprint definition file for ICeWall-based floorplan initialization. Mutually exclusive with FLOORPLAN_DEF or DIE_AREA/CORE_AREA or CORE_UTILIZATION.| |
+| FOOTPRINT_TCL| Specifies a Tcl script with custom footprint-related commands for floorplan setup.| |
| GDS_ALLOW_EMPTY| Regular expression of module names of macros that have no .gds file| |
| GDS_FILES| Path to platform GDS files.| |
| GENERATE_ARTIFACTS_ON_FAILURE| For instance Bazel needs artifacts (.odb and .rpt files) on a failure to allow the user to save hours on re-running the failed step locally, but when working with a Makefile flow, it is more natural to fail the step and leave the user to manually inspect the logs and artifacts directly via the file system. Set to 1 to change the behavior to generate artifacts upon failure to e.g. do a global route. The exit code will still be non-zero on all other failures that aren't covered by the "useful to inspect the artifacts on failure" use-case. Example: just like detailed routing, a global route that fails with congestion, is not a build failure(as in exit code non-zero), it is a successful(as in zero exit code) global route that produce reports detailing the problem. Detailed route will not proceed, if there is global routing congestion This allows build systems, such as bazel, to create artifacts for global and detailed route, even if the operation had problems, without having know about the semantics between global and detailed route. Considering that global and detailed route can run for a long time and use a lot of memory, this allows inspecting results on a laptop for a build that ran on a server.| 0|
@@ -155,7 +160,7 @@ configuration file.
| LIB_FILES| A Liberty file of the standard cell library with PVT characterization, input and output characteristics, timing and power definitions for each cell.| |
| MACRO_BLOCKAGE_HALO| Distance beyond the edges of a macro that will also be covered by the blockage generated for that macro. Note that the default macro blockage halo comes from the largest of the specified MACRO_PLACE_HALO x or y values. This variable overrides that calculation.| |
| MACRO_EXTENSION| Sets the number of GCells added to the blockages boundaries from macros.| |
-| MACRO_PLACEMENT_TCL| Specifies the path of a TCL file on how to place certain macros manually.| |
+| MACRO_PLACEMENT_TCL| Specifies the path of a TCL file on how to place macros manually. The user may choose to place just some of the macros in the design. The macro placer will handle the remaining unplaced macros.| |
| MACRO_PLACE_HALO| Horizontal/vertical halo around macros (microns). Used by automatic macro placement.| |
| MACRO_ROWS_HALO_X| Horizontal distance between the edge of the macro and the beginning of the rows created by tapcell. Only available for ASAP7 PDK and GF180/uart-blocks design.| |
| MACRO_ROWS_HALO_Y| Vertical distance between the edge of the macro and the beginning of the rows created by tapcell. Only available for ASAP7 PDK and GF180/uart-blocks design.| |
@@ -164,6 +169,7 @@ configuration file.
| MATCH_CELL_FOOTPRINT| Enforce sizing operations to only swap cells that have the same layout boundary.| 0|
| MAX_REPAIR_ANTENNAS_ITER_DRT| Defines the maximum number of iterations post-detailed routing repair antennas will run.| 5|
| MAX_REPAIR_ANTENNAS_ITER_GRT| Defines the maximum number of iterations post global routing repair antennas will run.| 5|
+| MAX_REPAIR_TIMING_ITER| Maximum number of iterations for repair setup and repair hold.| |
| MAX_ROUTING_LAYER| The highest metal layer name to be used in routing.| |
| MIN_BUF_CELL_AND_PORTS| Used to insert a buffer cell to pass through wires. Used in synthesis.| |
| MIN_ROUTING_LAYER| The lowest metal layer name to be used in routing.| |
@@ -181,7 +187,7 @@ configuration file.
| PWR_NETS_VOLTAGES| Used for IR Drop calculation.| |
| RCX_RULES| RC Extraction rules file path.| |
| RECOVER_POWER| Specifies how many percent of paths with positive slacks can be slowed for power savings [0-100].| 0|
-| REMOVE_ABC_BUFFERS (deprecated)| Remove abc buffers from the netlist. If timing repair in floorplanning is taking too long, use a SETUP/HOLD_SLACK_MARGIN to terminate timing repair early instead of using REMOVE_ABC_BUFFERS or set SKIP_LAST_GASP=1.| |
+| REMOVE_ABC_BUFFERS (deprecated)| Remove abc buffers from the netlist. If timing repair in floorplanning is taking too long, use a SETUP/HOLD_SLACK_MARGIN to terminate timing repair early instead of using REMOVE_ABC_BUFFERS or set SKIP_LAST_GASP=1.| 0|
| REMOVE_CELLS_FOR_EQY| String patterns directly passed to write_verilog -remove_cells <> for equivalence checks.| |
| REPAIR_PDN_VIA_LAYER| Remove power grid vias which generate DRC violations after detailed routing.| |
| REPORT_CLOCK_SKEW| Report clock skew as part of reporting metrics, starting at CTS, before which there is no clock skew. This metric can be quite time-consuming, so it can be useful to disable.| 1|
@@ -203,7 +209,6 @@ configuration file.
| RTLMP_NOTCH_WT| Weight for the notch, or the existence of dead space that cannot be used for placement and routing.| 10.0|
| RTLMP_OUTLINE_WT| Weight for violating the fixed outline constraint, meaning that all clusters should be placed within the shape of their parent cluster.| 100.0|
| RTLMP_RPT_DIR| Path to the directory where reports are saved.| |
-| RTLMP_SIGNATURE_NET_THRESHOLD| Minimum number of connections between two clusters to be identified as connected.| 50|
| RTLMP_WIRELENGTH_WT| Weight for half-perimiter wirelength.| 100.0|
| RULES_JSON| json files with the metrics baseline regression rules. In the ORFS Makefile, this defaults to $DESIGN_DIR/rules-base.json, but ORFS does not mandate the users source directory layout and this can be placed elsewhere when the user sets up an ORFS config.mk or from bazel-orfs.| |
| RUN_LOG_NAME_STEM| Stem of the log file name, the log file will be named `$(LOG_DIR)/$(RUN_LOG_NAME_STEM).log`.| run|
@@ -215,21 +220,25 @@ configuration file.
| SETUP_REPAIR_SEQUENCE| Specifies the sequence of moves to do in repair_timing -setup. This should be a string of move keywords separated by commas such as the default when not used: "unbuffer,sizedown,sizeup,swap,buffer,clone,split".| |
| SETUP_SLACK_MARGIN| Specifies a time margin for the slack when fixing setup violations. This option allows you to overfix or underfix(negative value, terminate retiming before 0 or positive slack). See HOLD_SLACK_MARGIN for more details.| 0|
| SET_RC_TCL| Metal & Via RC definition file path.| |
-| SKIP_CTS_REPAIR_TIMING| Skipping CTS repair, which can take a long time, can be useful in architectural exploration or when getting CI up and running.| |
+| SKIP_ANTENNA_REPAIR| Skips antenna repair entirely.| 0|
+| SKIP_ANTENNA_REPAIR_POST_DRT| Skips antenna repair post-detailed routing.| 0|
+| SKIP_ANTENNA_REPAIR_PRE_GRT| Skips antenna repair pre-global routing.| 0|
+| SKIP_CRIT_VT_SWAP| Do not perform VT swap on critical cells to improve QoR (default: do critical VT swap). This is an additional VT swap on critical cells that remain near the end of setup fixing. If SKIP_VT_SWAP is set to 1, this also disables critical cell VT swap.| |
+| SKIP_CTS_REPAIR_TIMING| Skipping CTS repair, which can take a long time, can be useful in architectural exploration or when getting CI up and running.| 0|
| SKIP_DETAILED_ROUTE| Skips detailed route.| 0|
| SKIP_GATE_CLONING| Do not use gate cloning transform to fix timing violations (default: use gate cloning).| |
| SKIP_INCREMENTAL_REPAIR| Skip incremental repair in global route.| 0|
| SKIP_LAST_GASP| Do not use last gasp optimization to fix timing violations (default: use gate last gasp).| |
| SKIP_PIN_SWAP| Do not use pin swapping as a transform to fix timing violations (default: use pin swapping).| |
-| SKIP_REPAIR_TIE_FANOUT| Skip repair_tie_fanout at floorplan step.| |
-| SKIP_REPORT_METRICS| If set to 1, then metrics, report_metrics does nothing. Useful to speed up builds.| |
+| SKIP_REPAIR_TIE_FANOUT| Skip repair_tie_fanout at floorplan step.| 0|
+| SKIP_REPORT_METRICS| If set to 1, then metrics, report_metrics does nothing. Useful to speed up builds.| 0|
| SKIP_VT_SWAP| Do not perform VT swap to improve QoR (default: do VT swap).| |
| SLEW_MARGIN| Specifies a slew margin when fixing max slew violations. This option allows you to overfix.| |
| SWAP_ARITH_OPERATORS| Improve timing QoR by swapping ALU and MULT arithmetic operators.| |
| SYNTH_ARGS| Optional synthesis variables for yosys.| |
| SYNTH_BLACKBOXES| List of cells treated as a black box by Yosys. With Bazel, this can be used to run synthesis in parallel for the large modules of the design.| |
| SYNTH_CANONICALIZE_TCL| Specifies a Tcl script with commands to run as part of the synth canonicalize step.| |
-| SYNTH_GUT| Load design and remove all internal logic before doing synthesis. This is useful when creating a mock .lef abstract that has a smaller area than the amount of logic would allow. bazel-orfs uses this to mock SRAMs, for instance.| |
+| SYNTH_GUT| Load design and remove all internal logic before doing synthesis. This is useful when creating a mock .lef abstract that has a smaller area than the amount of logic would allow. bazel-orfs uses this to mock SRAMs, for instance.| 0|
| SYNTH_HDL_FRONTEND| Select an alternative language frontend to ingest the design. Available option is "slang". If the variable is empty, design is read with the Yosys read_verilog command.| |
| SYNTH_HIERARCHICAL| Enable to Synthesis hierarchically, otherwise considered flat synthesis.| 0|
| SYNTH_HIER_SEPARATOR| Separator used for the synthesis flatten stage.| .|
@@ -239,6 +248,8 @@ configuration file.
| SYNTH_NETLIST_FILES| Skips synthesis and uses the supplied netlist files. If the netlist files contains duplicate modules, which can happen when using hierarchical synthesis on indvidual netlist files and combining here, subsequent modules are silently ignored and only the first module is used.| |
| SYNTH_OPT_HIER| Optimize constants across hierarchical boundaries.| |
| SYNTH_RETIME_MODULES| *This is an experimental option and may cause adverse effects.* *No effort has been made to check if the retimed RTL is logically equivalent to the non-retimed RTL.* List of modules to apply automatic retiming to. These modules must not get dissolved and as such they should either be the top module or be included in SYNTH_KEEP_MODULES. The main use case is to quickly identify if performance can be improved by manually retiming the input RTL. Retiming will treat module ports like register endpoints/startpoints. The objective function of retiming isn't informed by SDC, even the clock period is ignored. As such, retiming will optimize for best delay at potentially high register number cost. Automatic retiming can produce suboptimal results as its timing model is crude and it doesn't find the optimal distribution of registers on long pipelines. See OR discussion #8080.| |
+| SYNTH_WRAPPED_ADDERS| Specify the adder modules that can be used for synthesis, separated by commas. The default adder module is determined by the first element of this variable.| |
+| SYNTH_WRAPPED_MULTIPLIERS| Specify the multiplier modules that can be used for synthesis, separated by commas. The default multiplier module is determined by the first element of this variable.| |
| SYNTH_WRAPPED_OPERATORS| Synthesize multiple architectural options for each arithmetic operator in the design. These options are available for switching among in later stages of the flow.| |
| TAPCELL_TCL| Path to Endcap and Welltie cells file.| |
| TAP_CELL_NAME| Name of the cell to use in tap cell insertion.| |
@@ -265,7 +276,6 @@ configuration file.
- [MIN_BUF_CELL_AND_PORTS](#MIN_BUF_CELL_AND_PORTS)
- [SDC_FILE](#SDC_FILE)
- [SDC_GUT](#SDC_GUT)
-- [SWAP_ARITH_OPERATORS](#SWAP_ARITH_OPERATORS)
- [SYNTH_BLACKBOXES](#SYNTH_BLACKBOXES)
- [SYNTH_CANONICALIZE_TCL](#SYNTH_CANONICALIZE_TCL)
- [SYNTH_GUT](#SYNTH_GUT)
@@ -277,7 +287,8 @@ configuration file.
- [SYNTH_NETLIST_FILES](#SYNTH_NETLIST_FILES)
- [SYNTH_OPT_HIER](#SYNTH_OPT_HIER)
- [SYNTH_RETIME_MODULES](#SYNTH_RETIME_MODULES)
-- [SYNTH_WRAPPED_OPERATORS](#SYNTH_WRAPPED_OPERATORS)
+- [SYNTH_WRAPPED_ADDERS](#SYNTH_WRAPPED_ADDERS)
+- [SYNTH_WRAPPED_MULTIPLIERS](#SYNTH_WRAPPED_MULTIPLIERS)
- [TIEHI_CELL_AND_PORT](#TIEHI_CELL_AND_PORT)
- [TIELO_CELL_AND_PORT](#TIELO_CELL_AND_PORT)
- [VERILOG_DEFINES](#VERILOG_DEFINES)
@@ -295,6 +306,8 @@ configuration file.
- [CORE_UTILIZATION](#CORE_UTILIZATION)
- [DIE_AREA](#DIE_AREA)
- [FLOORPLAN_DEF](#FLOORPLAN_DEF)
+- [FOOTPRINT](#FOOTPRINT)
+- [FOOTPRINT_TCL](#FOOTPRINT_TCL)
- [HOLD_SLACK_MARGIN](#HOLD_SLACK_MARGIN)
- [IO_CONSTRAINTS](#IO_CONSTRAINTS)
- [MACRO_BLOCKAGE_HALO](#MACRO_BLOCKAGE_HALO)
@@ -305,6 +318,7 @@ configuration file.
- [MACRO_WRAPPERS](#MACRO_WRAPPERS)
- [MAKE_TRACKS](#MAKE_TRACKS)
- [MATCH_CELL_FOOTPRINT](#MATCH_CELL_FOOTPRINT)
+- [MAX_REPAIR_TIMING_ITER](#MAX_REPAIR_TIMING_ITER)
- [MAX_ROUTING_LAYER](#MAX_ROUTING_LAYER)
- [MIN_ROUTING_LAYER](#MIN_ROUTING_LAYER)
- [PDN_TCL](#PDN_TCL)
@@ -330,18 +344,16 @@ configuration file.
- [RTLMP_NOTCH_WT](#RTLMP_NOTCH_WT)
- [RTLMP_OUTLINE_WT](#RTLMP_OUTLINE_WT)
- [RTLMP_RPT_DIR](#RTLMP_RPT_DIR)
-- [RTLMP_SIGNATURE_NET_THRESHOLD](#RTLMP_SIGNATURE_NET_THRESHOLD)
- [RTLMP_WIRELENGTH_WT](#RTLMP_WIRELENGTH_WT)
- [SETUP_REPAIR_SEQUENCE](#SETUP_REPAIR_SEQUENCE)
- [SETUP_SLACK_MARGIN](#SETUP_SLACK_MARGIN)
+- [SKIP_CRIT_VT_SWAP](#SKIP_CRIT_VT_SWAP)
- [SKIP_GATE_CLONING](#SKIP_GATE_CLONING)
- [SKIP_LAST_GASP](#SKIP_LAST_GASP)
- [SKIP_PIN_SWAP](#SKIP_PIN_SWAP)
- [SKIP_REPAIR_TIE_FANOUT](#SKIP_REPAIR_TIE_FANOUT)
- [SKIP_REPORT_METRICS](#SKIP_REPORT_METRICS)
- [SKIP_VT_SWAP](#SKIP_VT_SWAP)
-- [SWAP_ARITH_OPERATORS](#SWAP_ARITH_OPERATORS)
-- [SYNTH_WRAPPED_OPERATORS](#SYNTH_WRAPPED_OPERATORS)
- [TAPCELL_TCL](#TAPCELL_TCL)
- [TIEHI_CELL_AND_PORT](#TIEHI_CELL_AND_PORT)
- [TIELO_CELL_AND_PORT](#TIELO_CELL_AND_PORT)
@@ -350,8 +362,11 @@ configuration file.
## place variables
+- [BALANCE_ROWS](#BALANCE_ROWS)
- [CELL_PAD_IN_SITES_DETAIL_PLACEMENT](#CELL_PAD_IN_SITES_DETAIL_PLACEMENT)
- [CELL_PAD_IN_SITES_GLOBAL_PLACEMENT](#CELL_PAD_IN_SITES_GLOBAL_PLACEMENT)
+- [CLUSTER_FLOPS](#CLUSTER_FLOPS)
+- [DONT_BUFFER_PORTS](#DONT_BUFFER_PORTS)
- [EARLY_SIZING_CAP_RATIO](#EARLY_SIZING_CAP_RATIO)
- [FLOORPLAN_DEF](#FLOORPLAN_DEF)
- [GPL_ROUTABILITY_DRIVEN](#GPL_ROUTABILITY_DRIVEN)
@@ -359,6 +374,7 @@ configuration file.
- [IO_PLACER_H](#IO_PLACER_H)
- [IO_PLACER_V](#IO_PLACER_V)
- [MATCH_CELL_FOOTPRINT](#MATCH_CELL_FOOTPRINT)
+- [MAX_REPAIR_TIMING_ITER](#MAX_REPAIR_TIMING_ITER)
- [MAX_ROUTING_LAYER](#MAX_ROUTING_LAYER)
- [MIN_ROUTING_LAYER](#MIN_ROUTING_LAYER)
- [PLACE_DENSITY](#PLACE_DENSITY)
@@ -366,8 +382,7 @@ configuration file.
- [PLACE_PINS_ARGS](#PLACE_PINS_ARGS)
- [ROUTING_LAYER_ADJUSTMENT](#ROUTING_LAYER_ADJUSTMENT)
- [SKIP_REPORT_METRICS](#SKIP_REPORT_METRICS)
-- [SWAP_ARITH_OPERATORS](#SWAP_ARITH_OPERATORS)
-- [SYNTH_WRAPPED_OPERATORS](#SYNTH_WRAPPED_OPERATORS)
+- [TNS_END_PERCENT](#TNS_END_PERCENT)
## cts variables
@@ -379,23 +394,24 @@ configuration file.
- [CTS_CLUSTER_SIZE](#CTS_CLUSTER_SIZE)
- [CTS_LIB_NAME](#CTS_LIB_NAME)
- [CTS_SNAPSHOT](#CTS_SNAPSHOT)
+- [CTS_SNAPSHOTS](#CTS_SNAPSHOTS)
- [DETAILED_METRICS](#DETAILED_METRICS)
- [EQUIVALENCE_CHECK](#EQUIVALENCE_CHECK)
- [HOLD_SLACK_MARGIN](#HOLD_SLACK_MARGIN)
- [MATCH_CELL_FOOTPRINT](#MATCH_CELL_FOOTPRINT)
+- [MAX_REPAIR_TIMING_ITER](#MAX_REPAIR_TIMING_ITER)
- [POST_CTS_TCL](#POST_CTS_TCL)
- [REMOVE_CELLS_FOR_EQY](#REMOVE_CELLS_FOR_EQY)
- [REPORT_CLOCK_SKEW](#REPORT_CLOCK_SKEW)
- [SETUP_REPAIR_SEQUENCE](#SETUP_REPAIR_SEQUENCE)
- [SETUP_SLACK_MARGIN](#SETUP_SLACK_MARGIN)
+- [SKIP_CRIT_VT_SWAP](#SKIP_CRIT_VT_SWAP)
- [SKIP_CTS_REPAIR_TIMING](#SKIP_CTS_REPAIR_TIMING)
- [SKIP_GATE_CLONING](#SKIP_GATE_CLONING)
- [SKIP_LAST_GASP](#SKIP_LAST_GASP)
- [SKIP_PIN_SWAP](#SKIP_PIN_SWAP)
- [SKIP_REPORT_METRICS](#SKIP_REPORT_METRICS)
- [SKIP_VT_SWAP](#SKIP_VT_SWAP)
-- [SWAP_ARITH_OPERATORS](#SWAP_ARITH_OPERATORS)
-- [SYNTH_WRAPPED_OPERATORS](#SYNTH_WRAPPED_OPERATORS)
- [TNS_END_PERCENT](#TNS_END_PERCENT)
## grt variables
@@ -405,6 +421,7 @@ configuration file.
- [GLOBAL_ROUTE_ARGS](#GLOBAL_ROUTE_ARGS)
- [HOLD_SLACK_MARGIN](#HOLD_SLACK_MARGIN)
- [MAX_REPAIR_ANTENNAS_ITER_GRT](#MAX_REPAIR_ANTENNAS_ITER_GRT)
+- [MAX_REPAIR_TIMING_ITER](#MAX_REPAIR_TIMING_ITER)
- [MAX_ROUTING_LAYER](#MAX_ROUTING_LAYER)
- [MIN_ROUTING_LAYER](#MIN_ROUTING_LAYER)
- [PRE_GLOBAL_ROUTE_TCL](#PRE_GLOBAL_ROUTE_TCL)
@@ -412,14 +429,15 @@ configuration file.
- [ROUTING_LAYER_ADJUSTMENT](#ROUTING_LAYER_ADJUSTMENT)
- [SETUP_REPAIR_SEQUENCE](#SETUP_REPAIR_SEQUENCE)
- [SETUP_SLACK_MARGIN](#SETUP_SLACK_MARGIN)
+- [SKIP_ANTENNA_REPAIR](#SKIP_ANTENNA_REPAIR)
+- [SKIP_ANTENNA_REPAIR_PRE_GRT](#SKIP_ANTENNA_REPAIR_PRE_GRT)
+- [SKIP_CRIT_VT_SWAP](#SKIP_CRIT_VT_SWAP)
- [SKIP_GATE_CLONING](#SKIP_GATE_CLONING)
- [SKIP_INCREMENTAL_REPAIR](#SKIP_INCREMENTAL_REPAIR)
- [SKIP_LAST_GASP](#SKIP_LAST_GASP)
- [SKIP_PIN_SWAP](#SKIP_PIN_SWAP)
- [SKIP_REPORT_METRICS](#SKIP_REPORT_METRICS)
- [SKIP_VT_SWAP](#SKIP_VT_SWAP)
-- [SWAP_ARITH_OPERATORS](#SWAP_ARITH_OPERATORS)
-- [SYNTH_WRAPPED_OPERATORS](#SYNTH_WRAPPED_OPERATORS)
- [TNS_END_PERCENT](#TNS_END_PERCENT)
## route variables
@@ -433,10 +451,9 @@ configuration file.
- [MIN_ROUTING_LAYER](#MIN_ROUTING_LAYER)
- [REPORT_CLOCK_SKEW](#REPORT_CLOCK_SKEW)
- [ROUTING_LAYER_ADJUSTMENT](#ROUTING_LAYER_ADJUSTMENT)
+- [SKIP_ANTENNA_REPAIR_POST_DRT](#SKIP_ANTENNA_REPAIR_POST_DRT)
- [SKIP_DETAILED_ROUTE](#SKIP_DETAILED_ROUTE)
- [SKIP_REPORT_METRICS](#SKIP_REPORT_METRICS)
-- [SWAP_ARITH_OPERATORS](#SWAP_ARITH_OPERATORS)
-- [SYNTH_WRAPPED_OPERATORS](#SYNTH_WRAPPED_OPERATORS)
## final variables
@@ -450,6 +467,10 @@ configuration file.
- [ROUTING_LAYER_ADJUSTMENT](#ROUTING_LAYER_ADJUSTMENT)
- [SKIP_DETAILED_ROUTE](#SKIP_DETAILED_ROUTE)
- [SKIP_REPORT_METRICS](#SKIP_REPORT_METRICS)
+
+## All stages variables
+
+- [OPENROAD_HIERARCHICAL](#OPENROAD_HIERARCHICAL)
- [SWAP_ARITH_OPERATORS](#SWAP_ARITH_OPERATORS)
- [SYNTH_WRAPPED_OPERATORS](#SYNTH_WRAPPED_OPERATORS)
@@ -461,10 +482,6 @@ configuration file.
- [RULES_JSON](#RULES_JSON)
-## All stages variables
-
-
-
## Uncategorized variables
- [ADDITIONAL_FILES](#ADDITIONAL_FILES)
@@ -478,7 +495,6 @@ configuration file.
- [DESIGN_NICKNAME](#DESIGN_NICKNAME)
- [DFF_LIB_FILES](#DFF_LIB_FILES)
- [DONT_USE_CELLS](#DONT_USE_CELLS)
-- [DONT_USE_LIBS](#DONT_USE_LIBS)
- [DPO_MAX_DISPLACEMENT](#DPO_MAX_DISPLACEMENT)
- [ENABLE_DPO](#ENABLE_DPO)
- [FASTROUTE_TCL](#FASTROUTE_TCL)
@@ -492,7 +508,6 @@ configuration file.
- [KLAYOUT_TECH_FILE](#KLAYOUT_TECH_FILE)
- [LIB_FILES](#LIB_FILES)
- [MACRO_EXTENSION](#MACRO_EXTENSION)
-- [OPENROAD_HIERARCHICAL](#OPENROAD_HIERARCHICAL)
- [PLATFORM](#PLATFORM)
- [PLATFORM_TCL](#PLATFORM_TCL)
- [PROCESS](#PROCESS)
diff --git a/etc/DependencyInstaller.sh b/etc/DependencyInstaller.sh
index bb934e86a4..97975ed322 100755
--- a/etc/DependencyInstaller.sh
+++ b/etc/DependencyInstaller.sh
@@ -24,7 +24,7 @@ _installORDependencies() {
./tools/OpenROAD/etc/DependencyInstaller.sh ${OR_INSTALLER_ARGS}
}
-_installCommon() {
+_installPipCommon() {
if [[ -f /opt/rh/rh-python38/enable ]]; then
set +u
source /opt/rh/rh-python38/enable
@@ -36,7 +36,10 @@ _installCommon() {
else
pip3 install --no-cache-dir --user -U $pkgs
fi
+}
+_installVerilator() {
+ local baseDir
if [[ "$constantBuildDir" == "true" ]]; then
baseDir="/tmp/DependencyInstaller-ORFS"
if [[ -d "$baseDir" ]]; then
@@ -468,7 +471,8 @@ case "${os}" in
esac
if [[ "${option}" == "common" || "${option}" == "all" ]]; then
- _installCommon
+ _installPipCommon
+ _installVerilator
fi
;;
"Ubuntu" | "Debian GNU/Linux rodete" )
@@ -486,10 +490,13 @@ case "${os}" in
_installUbuntuCleanUp
fi
if [[ "${option}" == "common" || "${option}" == "all" ]]; then
- if [[ $version == "rodete" ]]; then
+ if [[ $version != "rodete" ]]; then
+ if _versionCompare ${version} -lt 23.04 ; then
+ _installPipCommon
+ fi
+ _installVerilator
+ else
echo "Skip common for rodete"
- elif _versionCompare ${version} -lt 23.04 ; then
- _installCommon
fi
fi
;;
@@ -502,7 +509,8 @@ case "${os}" in
_installDarwinPackages
fi
if [[ "${option}" == "common" || "${option}" == "all" ]]; then
- _installCommon
+ _installPipCommon
+ _installVerilator
fi
;;
*)
diff --git a/flake.lock b/flake.lock
index 05d03ea8bb..724d7fe1e0 100644
--- a/flake.lock
+++ b/flake.lock
@@ -38,11 +38,11 @@
},
"nixpkgs": {
"locked": {
- "lastModified": 1741851582,
- "narHash": "sha256-cPfs8qMccim2RBgtKGF+x9IBCduRvd/N5F4nYpU0TVE=",
+ "lastModified": 1744932701,
+ "narHash": "sha256-fusHbZCyv126cyArUwwKrLdCkgVAIaa/fQJYFlCEqiU=",
"owner": "NixOS",
"repo": "nixpkgs",
- "rev": "6607cf789e541e7873d40d3a8f7815ea92204f32",
+ "rev": "b024ced1aac25639f8ca8fdfc2f8c4fbd66c48ef",
"type": "github"
},
"original": {
@@ -89,17 +89,17 @@
"nixpkgs": "nixpkgs_2"
},
"locked": {
- "lastModified": 1741801451,
- "narHash": "sha256-fzWCeq0o6vx8/GoFcOtnaIENes3jXzNk9qfWnIaxtHI=",
+ "lastModified": 1745262648,
+ "narHash": "sha256-NPLjho9TAygCUbRGdR8y+gxYcV0tek2ceMmuoFhwv1s=",
"ref": "refs/heads/master",
- "rev": "ec1bf1a13902813b722f8341c432cd09714d9e55",
- "revCount": 27845,
+ "rev": "7ecbe2e306a961888c17adc8eb761f51c94f06d8",
+ "revCount": 29094,
"submodules": true,
"type": "git",
"url": "https://github.com/The-OpenROAD-Project/OpenROAD"
},
"original": {
- "rev": "ec1bf1a13902813b722f8341c432cd09714d9e55",
+ "rev": "7ecbe2e306a961888c17adc8eb761f51c94f06d8",
"submodules": true,
"type": "git",
"url": "https://github.com/The-OpenROAD-Project/OpenROAD"
diff --git a/flake.nix b/flake.nix
index 5d95e01629..f6fba52b27 100644
--- a/flake.nix
+++ b/flake.nix
@@ -6,7 +6,7 @@
type = "git";
url = "https://github.com/The-OpenROAD-Project/OpenROAD";
submodules = true;
- rev = "ec1bf1a13902813b722f8341c432cd09714d9e55";
+ rev = "7ecbe2e306a961888c17adc8eb761f51c94f06d8";
};
yosys = {
type = "git";
diff --git a/flow/Makefile b/flow/Makefile
index e167864b96..6204b0674c 100644
--- a/flow/Makefile
+++ b/flow/Makefile
@@ -58,7 +58,6 @@
# DESIGN_CONFIG=./designs/asap7/ibex/config.mk
# DESIGN_CONFIG=./designs/asap7/jpeg/config.mk
# DESIGN_CONFIG=./designs/asap7/megaboom/config.mk
-# DESIGN_CONFIG=./designs/asap7/mock-array/config.mk
# DESIGN_CONFIG=./designs/asap7/riscv32i/config.mk
# DESIGN_CONFIG=./designs/asap7/swerv_wrapper/config.mk
# DESIGN_CONFIG=./designs/asap7/uart/config.mk
@@ -179,19 +178,6 @@ build_macros: $(BLOCK_LEFS) $(BLOCK_TYP_LIBS)
$(foreach block,$(BLOCKS),$(eval $(call GENERATE_ABSTRACT_RULE,$(WORK_HOME)/results/$(PLATFORM)/$(DESIGN_NICKNAME)_$(block)/$(FLOW_VARIANT)/${block}.lef,$(WORK_HOME)/results/$(PLATFORM)/$(DESIGN_NICKNAME)_$(block)/$(FLOW_VARIANT)/${block}_typ.lib,$(shell dirname $(DESIGN_CONFIG))/${block}/config.mk)))
$(foreach block,$(BLOCKS),$(eval $(WORK_HOME)/results/$(PLATFORM)/$(DESIGN_NICKNAME)_$(block)/$(FLOW_VARIANT)/6_final.gds: $(WORK_HOME)/results/$(PLATFORM)/$(DESIGN_NICKNAME)_$(block)/$(FLOW_VARIANT)/${block}.lef))
-# Pre-process libraries
-# ==============================================================================
-
-# Create temporary Liberty files which have the proper dont_use properties set
-# For use with Yosys and ABC
-.SECONDEXPANSION:
-$(DONT_USE_LIBS): $$(filter %$$(@F) %$$(@F).gz,$(LIB_FILES))
- @mkdir -p $(OBJECTS_DIR)/lib
- $(PYTHON_EXE) $(UTILS_DIR)/preprocessLib.py -i $^ -o $@
-
-$(OBJECTS_DIR)/lib/merged.lib: $(DONT_USE_LIBS)
- $(PYTHON_EXE) $(UTILS_DIR)/merge_lib.py $(PLATFORM)_merged $(DONT_USE_LIBS) > $@
-
# Pre-process KLayout tech
# ==============================================================================
$(OBJECTS_DIR)/klayout_tech.lef: $(TECH_LEF)
@@ -272,11 +258,11 @@ $(SDC_FILE_CLOCK_PERIOD): $(SDC_FILE)
yosys-dependencies: $(YOSYS_DEPENDENCIES)
.PHONY: do-yosys
-do-yosys: $(DONT_USE_SC_LIB)
+do-yosys: yosys-dependencies
$(SCRIPTS_DIR)/synth.sh $(SYNTH_SCRIPT) $(LOG_DIR)/1_2_yosys.log
.PHONY: do-yosys-canonicalize
-do-yosys-canonicalize: yosys-dependencies $(DONT_USE_SC_LIB)
+do-yosys-canonicalize: yosys-dependencies
$(SCRIPTS_DIR)/synth.sh $(SCRIPTS_DIR)/synth_canonicalize.tcl $(LOG_DIR)/1_1_yosys_canonicalize.log
$(RESULTS_DIR)/1_1_yosys_canonicalize.rtlil: $(YOSYS_DEPENDENCIES)
@@ -344,6 +330,9 @@ gui_$(1):
$(2)=$(RESULTS_DIR)/$(1) $(OPENROAD_GUI_CMD) $(SCRIPTS_DIR)/open.tcl
endef
+# Enables "make gui_5_1_grt-failed"
+$(eval $(call OPEN_GUI_SHORTCUT,5_1_grt-failed,5_1_grt-failed.odb))
+
# Separate dependency checking and doing a step. This can
# be useful to retest a stage without having to delete the
# target, or when building a wafer thin layer on top of
@@ -403,9 +392,20 @@ do-$(1)$(if $(4),$(4),):
cp $(RESULTS_DIR)/$(2) $(RESULTS_DIR)/$(1)$(if $(4),$(4),.odb)
endef
+# ==============================================================================
+
+# Custom target to go from synthesis to placement in a single OpenROAD run
+$(eval $(call do-step,1_3_floorplan_to_place, $(RESULTS_DIR)/1_synth.v $(RESULTS_DIR)/1_synth.sdc,floorplan_to_place))
+
+.PHONY: floorplan_to_place
+floorplan_to_place: $(RESULTS_DIR)/1_synth.v $(RESULTS_DIR)/1_synth.sdc
+ $(UNSET_AND_MAKE) do-1_3_floorplan_to_place
+
+# ==============================================================================
+
$(eval $(call do-step,1_3_synth,$(RESULTS_DIR)/1_synth.v $(RESULTS_DIR)/1_synth.sdc,synth_odb))
-$(eval $(call do-step,2_1_floorplan,$(RESULTS_DIR)/1_synth.v $(RESULTS_DIR)/1_synth.sdc $(TECH_LEF) $(SC_LEF) $(ADDITIONAL_LEFS) $(FOOTPRINT) $(SIG_MAP_FILE) $(FOOTPRINT_TCL) $(DONT_USE_SC_LIB) $(IO_CONSTRAINTS),floorplan))
+$(eval $(call do-step,2_1_floorplan,$(RESULTS_DIR)/1_synth.v $(RESULTS_DIR)/1_synth.sdc $(TECH_LEF) $(SC_LEF) $(ADDITIONAL_LEFS) $(FOOTPRINT) $(SIG_MAP_FILE) $(FOOTPRINT_TCL) $(LIB_FILES) $(IO_CONSTRAINTS),floorplan))
$(eval $(call do-copy,2_floorplan,2_1_floorplan.sdc,,.sdc))
@@ -476,6 +476,12 @@ $(eval $(call do-copy,3_place,2_floorplan.sdc,,.sdc))
do-place:
$(UNSET_AND_MAKE) do-3_1_place_gp_skip_io do-3_2_place_iop do-3_3_place_gp do-3_4_place_resized do-3_5_place_dp do-3_place do-3_place.sdc
+# Custom repair_timing target after placement
+$(eval $(call do-step,3_6_place_repair_timing,$(RESULTS_DIR)/3_5_place_dp.odb $(RESULTS_DIR)/3_place.sdc,repair_timing_post_place))
+
+.PHONY: place_repair_timing
+place_repair_timing: $(RESULTS_DIR)/3_6_place_repair_timing.odb
+
# Clean Targets
#-------------------------------------------------------------------------------
.PHONY: clean_place
diff --git a/flow/designs/asap7/aes-block/rules-base.json b/flow/designs/asap7/aes-block/rules-base.json
index 0b9d8c69c3..4f12b227fb 100644
--- a/flow/designs/asap7/aes-block/rules-base.json
+++ b/flow/designs/asap7/aes-block/rules-base.json
@@ -1,4 +1,99 @@
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@@ -8,11 +103,11 @@
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@@ -20,19 +115,51 @@
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"globalroute__antenna_diodes_count": {
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@@ -44,27 +171,43 @@
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\ No newline at end of file
diff --git a/flow/designs/asap7/aes-mbff/rules-base.json b/flow/designs/asap7/aes-mbff/rules-base.json
index 778fe33e36..8d36181dd2 100644
--- a/flow/designs/asap7/aes-mbff/rules-base.json
+++ b/flow/designs/asap7/aes-mbff/rules-base.json
@@ -1,4 +1,94 @@
{
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+ "level": "warning"
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+ "globalroute__flow__warnings__count:GRT-0246": {
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+ "compare": "<=",
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+ "compare": "<=",
+ "level": "warning"
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+ "globalroute__flow__warnings__count:STA-1212": {
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+ "compare": "<=",
+ "level": "warning"
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+ "placeopt__flow__warnings__count:STA-1212": {
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+ "compare": "<=",
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@@ -8,7 +98,7 @@
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"placeopt__design__instance__count__stdcell": {
@@ -27,12 +117,44 @@
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},
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+ "value": -40.1,
+ "compare": ">="
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+ "cts__timing__setup__tns": {
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+ "compare": ">="
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+ "compare": ">="
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"globalroute__antenna_diodes_count": {
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+ "value": 100,
"compare": "<="
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+ "compare": ">="
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+ "globalroute__timing__setup__tns": {
+ "value": -2430.0,
+ "compare": ">="
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@@ -44,27 +166,43 @@
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\ No newline at end of file
diff --git a/flow/designs/asap7/aes/rules-base.json b/flow/designs/asap7/aes/rules-base.json
index e1ca0e0126..7f4b87c4a3 100644
--- a/flow/designs/asap7/aes/rules-base.json
+++ b/flow/designs/asap7/aes/rules-base.json
@@ -1,4 +1,99 @@
{
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+ "compare": "<=",
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+ "level": "warning"
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+ "compare": "<=",
+ "level": "warning"
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+ "flow__warnings__count:PDN-1041": {
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+ "level": "warning"
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+ "compare": "<=",
+ "level": "warning"
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+ "globalplace__flow__warnings__count:STA-1212": {
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+ "level": "warning"
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+ "compare": "<=",
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+ "placeopt__flow__warnings__count:STA-1212": {
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+ "compare": "<=",
+ "level": "warning"
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"synth__design__instance__area__stdcell": {
"value": 1928.39,
"compare": "<="
@@ -27,12 +122,44 @@
"value": 1704,
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},
+ "cts__timing__setup__ws": {
+ "value": -43.9,
+ "compare": ">="
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+ "cts__timing__setup__tns": {
+ "value": -793.0,
+ "compare": ">="
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+ "cts__timing__hold__ws": {
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+ "compare": ">="
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+ "cts__timing__hold__tns": {
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+ "compare": ">="
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"globalroute__antenna_diodes_count": {
- "value": 0,
+ "value": 100,
"compare": "<="
},
+ "globalroute__timing__setup__ws": {
+ "value": -54.9,
+ "compare": ">="
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+ "globalroute__timing__setup__tns": {
+ "value": -2160.0,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__ws": {
+ "value": -19.0,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__tns": {
+ "value": -76.0,
+ "compare": ">="
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"detailedroute__route__wirelength": {
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+ "value": 72539,
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"detailedroute__route__drc_errors": {
@@ -44,27 +171,43 @@
"compare": "<="
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"detailedroute__antenna_diodes_count": {
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+ "detailedroute__timing__setup__ws": {
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"compare": ">="
},
- "finish__design__instance__area": {
- "value": 2278,
- "compare": "<="
+ "detailedroute__timing__setup__tns": {
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- "finish__timing__drv__setup_violation_count": {
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- "finish__timing__wns_percent_delay": {
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+ "finish__timing__setup__ws": {
+ "value": -43.1,
+ "compare": ">="
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+ "finish__timing__setup__tns": {
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"compare": ">="
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\ No newline at end of file
diff --git a/flow/designs/asap7/aes_lvt/rules-base.json b/flow/designs/asap7/aes_lvt/rules-base.json
index 49b6e6ac55..df847fc63e 100644
--- a/flow/designs/asap7/aes_lvt/rules-base.json
+++ b/flow/designs/asap7/aes_lvt/rules-base.json
@@ -1,4 +1,84 @@
{
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+ "compare": "<=",
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+ "detailedroute__flow__warnings__count:GRT-0246": {
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+ "compare": "<=",
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+ "finish__flow__warnings__count:GUI-0076": {
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+ "compare": "<=",
+ "level": "warning"
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+ "compare": "<=",
+ "level": "warning"
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+ "floorplan__flow__warnings__count:EST-0027": {
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+ "compare": "<=",
+ "level": "warning"
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+ "floorplan__flow__warnings__count:IFP-0028": {
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+ "compare": "<=",
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+ "compare": "<=",
+ "level": "warning"
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+ "compare": "<=",
+ "level": "warning"
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+ "flow__warnings__count:PDN-1041": {
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+ "compare": "<=",
+ "level": "warning"
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+ "flow__warnings__count:STA-1212": {
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+ "compare": "<=",
+ "level": "warning"
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+ "globalplace__flow__warnings__count:STA-1212": {
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+ "level": "warning"
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+ "level": "warning"
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+ "compare": "<=",
+ "level": "warning"
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+ "placeopt__flow__warnings__count:STA-1212": {
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+ "compare": "<=",
+ "level": "warning"
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"synth__design__instance__area__stdcell": {
"value": 1920.63,
"compare": "<="
@@ -8,7 +88,7 @@
"compare": "=="
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+ "value": 1987,
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"placeopt__design__instance__count__stdcell": {
@@ -27,10 +107,42 @@
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+ "compare": ">="
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+ "cts__timing__setup__tns": {
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+ "compare": ">="
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+ "cts__timing__hold__ws": {
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+ "compare": ">="
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+ "cts__timing__hold__tns": {
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+ "compare": ">="
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"globalroute__antenna_diodes_count": {
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+ "value": 100,
"compare": "<="
},
+ "globalroute__timing__setup__ws": {
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+ "globalroute__timing__hold__tns": {
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+ "compare": ">="
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"detailedroute__route__wirelength": {
"value": 69277,
"compare": "<="
@@ -44,27 +156,43 @@
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"detailedroute__antenna_diodes_count": {
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},
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- "finish__design__instance__area": {
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+ "compare": ">="
},
- "finish__timing__drv__setup_violation_count": {
- "value": 771,
- "compare": "<="
+ "detailedroute__timing__hold__ws": {
+ "value": -18.0,
+ "compare": ">="
},
- "finish__timing__drv__hold_violation_count": {
- "value": 100,
- "compare": "<="
+ "detailedroute__timing__hold__tns": {
+ "value": -72.0,
+ "compare": ">="
},
- "finish__timing__wns_percent_delay": {
- "value": -10.0,
+ "finish__timing__setup__ws": {
+ "value": -18.0,
"compare": ">="
+ },
+ "finish__timing__setup__tns": {
+ "value": -72.0,
+ "compare": ">="
+ },
+ "finish__timing__hold__ws": {
+ "value": -18.0,
+ "compare": ">="
+ },
+ "finish__timing__hold__tns": {
+ "value": -72.0,
+ "compare": ">="
+ },
+ "finish__design__instance__area": {
+ "value": 2026,
+ "compare": "<="
}
}
\ No newline at end of file
diff --git a/flow/designs/asap7/cva6/config.mk b/flow/designs/asap7/cva6/config.mk
index 5144d99aec..85b00dc9be 100644
--- a/flow/designs/asap7/cva6/config.mk
+++ b/flow/designs/asap7/cva6/config.mk
@@ -95,7 +95,7 @@ export PLACE_DENSITY = 0.69
# a smoketest for this option, there are a
# few last gasp iterations
-export SKIP_LAST_GASP ?= 1
+#export SKIP_LAST_GASP ?= 1
# For use with SYNTH_HIERARCHICAL
export SYNTH_MINIMUM_KEEP_SIZE ?= 40000
diff --git a/flow/designs/asap7/cva6/constraint.sdc b/flow/designs/asap7/cva6/constraint.sdc
index 08bf5ba873..bb2840e946 100644
--- a/flow/designs/asap7/cva6/constraint.sdc
+++ b/flow/designs/asap7/cva6/constraint.sdc
@@ -34,3 +34,4 @@ create_clock [get_ports $clk_port] -name $clk_name -period $clk_period
set_false_path -to [get_ports {rvfi_probes_o}]
+set_max_fanout 10 [current_design]
diff --git a/flow/designs/asap7/cva6/rules-base.json b/flow/designs/asap7/cva6/rules-base.json
index d4fc73ec72..7da3b02522 100644
--- a/flow/designs/asap7/cva6/rules-base.json
+++ b/flow/designs/asap7/cva6/rules-base.json
@@ -1,6 +1,111 @@
{
+ "cts__flow__warnings__count:STA-1212": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "detailedplace__flow__warnings__count:STA-1212": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "detailedroute__flow__warnings__count:GRT-0246": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "detailedroute__flow__warnings__count:STA-1212": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "finish__flow__warnings__count:GUI-0076": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "finish__flow__warnings__count:STA-1212": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:EST-0027": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:IFP-0028": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:RSZ-0062": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:RSZ-0075": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:STA-0366": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:STA-0473": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:STA-1212": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "flow__warnings__count:GPL-0302": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "flow__warnings__count:PDN-1041": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "flow__warnings__count:STA-1212": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalplace__flow__warnings__count:GPL-0302": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalplace__flow__warnings__count:STA-1212": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:GRT-0246": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:STA-1212": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "placeopt__flow__warnings__count:STA-1212": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
"synth__design__instance__area__stdcell": {
- "value": 18975.35,
+ "value": 18784.414249,
"compare": "<="
},
"constraints__clocks__count": {
@@ -8,11 +113,11 @@
"compare": "=="
},
"placeopt__design__instance__area": {
- "value": 19362,
+ "value": 19875,
"compare": "<="
},
"placeopt__design__instance__count__stdcell": {
- "value": 123443,
+ "value": 134139,
"compare": "<="
},
"detailedplace__design__violations": {
@@ -20,19 +125,51 @@
"compare": "=="
},
"cts__design__instance__count__setup_buffer": {
- "value": 10734,
+ "value": 11664,
"compare": "<="
},
"cts__design__instance__count__hold_buffer": {
- "value": 10734,
+ "value": 11664,
"compare": "<="
},
+ "cts__timing__setup__ws": {
+ "value": -50.8,
+ "compare": ">="
+ },
+ "cts__timing__setup__tns": {
+ "value": -201.0,
+ "compare": ">="
+ },
+ "cts__timing__hold__ws": {
+ "value": -50.0,
+ "compare": ">="
+ },
+ "cts__timing__hold__tns": {
+ "value": -200.0,
+ "compare": ">="
+ },
"globalroute__antenna_diodes_count": {
- "value": 0,
+ "value": 118,
"compare": "<="
},
+ "globalroute__timing__setup__ws": {
+ "value": -54.4,
+ "compare": ">="
+ },
+ "globalroute__timing__setup__tns": {
+ "value": -254.0,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__ws": {
+ "value": -50.0,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__tns": {
+ "value": -200.0,
+ "compare": ">="
+ },
"detailedroute__route__wirelength": {
- "value": 716033,
+ "value": 688855,
"compare": "<="
},
"detailedroute__route__drc_errors": {
@@ -44,27 +181,43 @@
"compare": "<="
},
"detailedroute__antenna_diodes_count": {
- "value": 5,
+ "value": 118,
"compare": "<="
},
- "finish__timing__setup__ws": {
- "value": -82.95,
+ "detailedroute__timing__setup__ws": {
+ "value": -50.0,
"compare": ">="
},
- "finish__design__instance__area": {
- "value": 19577,
- "compare": "<="
+ "detailedroute__timing__setup__tns": {
+ "value": -200.0,
+ "compare": ">="
},
- "finish__timing__drv__setup_violation_count": {
- "value": 5367,
- "compare": "<="
+ "detailedroute__timing__hold__ws": {
+ "value": -50.0,
+ "compare": ">="
},
- "finish__timing__drv__hold_violation_count": {
- "value": 100,
- "compare": "<="
+ "detailedroute__timing__hold__tns": {
+ "value": -200.0,
+ "compare": ">="
+ },
+ "finish__timing__setup__ws": {
+ "value": -56.3,
+ "compare": ">="
+ },
+ "finish__timing__setup__tns": {
+ "value": -257.0,
+ "compare": ">="
+ },
+ "finish__timing__hold__ws": {
+ "value": -50.0,
+ "compare": ">="
},
- "finish__timing__wns_percent_delay": {
- "value": -10.0,
+ "finish__timing__hold__tns": {
+ "value": -200.0,
"compare": ">="
+ },
+ "finish__design__instance__area": {
+ "value": 20198,
+ "compare": "<="
}
}
\ No newline at end of file
diff --git a/flow/designs/asap7/ethmac/rules-base.json b/flow/designs/asap7/ethmac/rules-base.json
index 33f664a048..93515aa3e8 100644
--- a/flow/designs/asap7/ethmac/rules-base.json
+++ b/flow/designs/asap7/ethmac/rules-base.json
@@ -1,6 +1,106 @@
{
+ "cts__flow__warnings__count:RSZ-0062": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "cts__flow__warnings__count:STA-1212": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "detailedplace__flow__warnings__count:STA-1212": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "detailedroute__flow__warnings__count:GRT-0246": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "detailedroute__flow__warnings__count:STA-1212": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "finish__flow__warnings__count:GUI-0076": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "finish__flow__warnings__count:STA-1212": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:EST-0027": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:IFP-0028": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:RSZ-0062": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:RSZ-0075": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:STA-1212": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "flow__warnings__count:PDN-1041": {
+ "value": 424,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "flow__warnings__count:STA-1212": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalplace__flow__warnings__count:STA-1212": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:FLW-0010": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:GRT-0246": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:RSZ-0062": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:STA-1212": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "placeopt__flow__warnings__count:STA-1212": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
"synth__design__instance__area__stdcell": {
- "value": 8504.63,
+ "value": 8450.0,
"compare": "<="
},
"constraints__clocks__count": {
@@ -8,11 +108,11 @@
"compare": "=="
},
"placeopt__design__instance__area": {
- "value": 8752,
+ "value": 8676,
"compare": "<="
},
"placeopt__design__instance__count__stdcell": {
- "value": 70347,
+ "value": 69601,
"compare": "<="
},
"detailedplace__design__violations": {
@@ -20,17 +120,49 @@
"compare": "=="
},
"cts__design__instance__count__setup_buffer": {
- "value": 6117,
+ "value": 6052,
"compare": "<="
},
"cts__design__instance__count__hold_buffer": {
- "value": 6117,
+ "value": 6052,
"compare": "<="
},
+ "cts__timing__setup__ws": {
+ "value": -125.0,
+ "compare": ">="
+ },
+ "cts__timing__setup__tns": {
+ "value": -2530.0,
+ "compare": ">="
+ },
+ "cts__timing__hold__ws": {
+ "value": -15.0,
+ "compare": ">="
+ },
+ "cts__timing__hold__tns": {
+ "value": -60.0,
+ "compare": ">="
+ },
"globalroute__antenna_diodes_count": {
- "value": 0,
+ "value": 100,
"compare": "<="
},
+ "globalroute__timing__setup__ws": {
+ "value": -144.0,
+ "compare": ">="
+ },
+ "globalroute__timing__setup__tns": {
+ "value": -3740.0,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__ws": {
+ "value": -15.0,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__tns": {
+ "value": -60.0,
+ "compare": ">="
+ },
"detailedroute__route__wirelength": {
"value": 210949,
"compare": "<="
@@ -44,27 +176,43 @@
"compare": "<="
},
"detailedroute__antenna_diodes_count": {
- "value": 5,
+ "value": 100,
"compare": "<="
},
- "finish__timing__setup__ws": {
- "value": -156.06,
+ "detailedroute__timing__setup__ws": {
+ "value": -91.0,
"compare": ">="
},
- "finish__design__instance__area": {
- "value": 8904,
- "compare": "<="
+ "detailedroute__timing__setup__tns": {
+ "value": -1650.0,
+ "compare": ">="
},
- "finish__timing__drv__setup_violation_count": {
- "value": 3059,
- "compare": "<="
+ "detailedroute__timing__hold__ws": {
+ "value": -15.0,
+ "compare": ">="
},
- "finish__timing__drv__hold_violation_count": {
- "value": 100,
- "compare": "<="
+ "detailedroute__timing__hold__tns": {
+ "value": -60.0,
+ "compare": ">="
+ },
+ "finish__timing__setup__ws": {
+ "value": -127.0,
+ "compare": ">="
+ },
+ "finish__timing__setup__tns": {
+ "value": -2599.45,
+ "compare": ">="
+ },
+ "finish__timing__hold__ws": {
+ "value": -15.0,
+ "compare": ">="
},
- "finish__timing__wns_percent_delay": {
- "value": -41.11,
+ "finish__timing__hold__tns": {
+ "value": -60.0,
"compare": ">="
+ },
+ "finish__design__instance__area": {
+ "value": 8904,
+ "compare": "<="
}
}
\ No newline at end of file
diff --git a/flow/designs/asap7/ethmac_lvt/rules-base.json b/flow/designs/asap7/ethmac_lvt/rules-base.json
index 9182fb1e89..6a381588d6 100644
--- a/flow/designs/asap7/ethmac_lvt/rules-base.json
+++ b/flow/designs/asap7/ethmac_lvt/rules-base.json
@@ -1,6 +1,116 @@
{
+ "cts__flow__warnings__count:RSZ-0062": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "cts__flow__warnings__count:STA-1212": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "detailedplace__flow__warnings__count:STA-1212": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "detailedroute__flow__warnings__count:DRT-0120": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "detailedroute__flow__warnings__count:GRT-0246": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "detailedroute__flow__warnings__count:STA-1212": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "finish__flow__warnings__count:GUI-0076": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "finish__flow__warnings__count:STA-1212": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:EST-0027": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:IFP-0028": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:RSZ-0062": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:RSZ-0075": {
+ "value": 788,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:STA-1212": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "flow__warnings__count:PDN-1041": {
+ "value": 424,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "flow__warnings__count:STA-1212": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalplace__flow__warnings__count:STA-1212": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:DRT-0120": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:FLW-0010": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:GRT-0246": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:RSZ-0062": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:STA-1212": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "placeopt__flow__warnings__count:STA-1212": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
"synth__design__instance__area__stdcell": {
- "value": 8453.47,
+ "value": 8418.677166,
"compare": "<="
},
"constraints__clocks__count": {
@@ -8,11 +118,11 @@
"compare": "=="
},
"placeopt__design__instance__area": {
- "value": 8380,
+ "value": 8282,
"compare": "<="
},
"placeopt__design__instance__count__stdcell": {
- "value": 66074,
+ "value": 65020,
"compare": "<="
},
"detailedplace__design__violations": {
@@ -20,19 +130,51 @@
"compare": "=="
},
"cts__design__instance__count__setup_buffer": {
- "value": 5746,
+ "value": 5654,
"compare": "<="
},
"cts__design__instance__count__hold_buffer": {
- "value": 5746,
+ "value": 5654,
"compare": "<="
},
+ "cts__timing__setup__ws": {
+ "value": -38.4,
+ "compare": ">="
+ },
+ "cts__timing__setup__tns": {
+ "value": -353.0,
+ "compare": ">="
+ },
+ "cts__timing__hold__ws": {
+ "value": -15.0,
+ "compare": ">="
+ },
+ "cts__timing__hold__tns": {
+ "value": -60.0,
+ "compare": ">="
+ },
"globalroute__antenna_diodes_count": {
- "value": 0,
+ "value": 100,
"compare": "<="
},
+ "globalroute__timing__setup__ws": {
+ "value": -46.6,
+ "compare": ">="
+ },
+ "globalroute__timing__setup__tns": {
+ "value": -506.0,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__ws": {
+ "value": -15.0,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__tns": {
+ "value": -60.0,
+ "compare": ">="
+ },
"detailedroute__route__wirelength": {
- "value": 235407,
+ "value": 234030,
"compare": "<="
},
"detailedroute__route__drc_errors": {
@@ -44,27 +186,43 @@
"compare": "<="
},
"detailedroute__antenna_diodes_count": {
- "value": 5,
+ "value": 100,
"compare": "<="
},
- "finish__timing__setup__ws": {
- "value": -55.18,
+ "detailedroute__timing__setup__ws": {
+ "value": -15.0,
"compare": ">="
},
- "finish__design__instance__area": {
- "value": 8537,
- "compare": "<="
+ "detailedroute__timing__setup__tns": {
+ "value": -60.0,
+ "compare": ">="
},
- "finish__timing__drv__setup_violation_count": {
- "value": 2873,
- "compare": "<="
+ "detailedroute__timing__hold__ws": {
+ "value": -15.0,
+ "compare": ">="
},
- "finish__timing__drv__hold_violation_count": {
- "value": 100,
- "compare": "<="
+ "detailedroute__timing__hold__tns": {
+ "value": -60.0,
+ "compare": ">="
+ },
+ "finish__timing__setup__ws": {
+ "value": -38.1,
+ "compare": ">="
+ },
+ "finish__timing__setup__tns": {
+ "value": -343.0,
+ "compare": ">="
+ },
+ "finish__timing__hold__ws": {
+ "value": -15.0,
+ "compare": ">="
},
- "finish__timing__wns_percent_delay": {
- "value": -22.5,
+ "finish__timing__hold__tns": {
+ "value": -60.0,
"compare": ">="
+ },
+ "finish__design__instance__area": {
+ "value": 8537,
+ "compare": "<="
}
}
\ No newline at end of file
diff --git a/flow/designs/asap7/gcd-ccs/rules-base.json b/flow/designs/asap7/gcd-ccs/rules-base.json
index bd68a26acc..1a8ed5e6a3 100644
--- a/flow/designs/asap7/gcd-ccs/rules-base.json
+++ b/flow/designs/asap7/gcd-ccs/rules-base.json
@@ -1,6 +1,96 @@
{
+ "cts__flow__warnings__count:RSZ-0062": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "cts__flow__warnings__count:STA-1212": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "detailedplace__flow__warnings__count:STA-1212": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "detailedroute__flow__warnings__count:GRT-0246": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "detailedroute__flow__warnings__count:STA-1212": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "finish__flow__warnings__count:GUI-0076": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "finish__flow__warnings__count:STA-1212": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:EST-0027": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:RSZ-0062": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:RSZ-0075": {
+ "value": 508,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:STA-1212": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "flow__warnings__count:PDN-1041": {
+ "value": 424,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "flow__warnings__count:STA-1212": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalplace__flow__warnings__count:STA-1212": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:GRT-0246": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:RSZ-0062": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:STA-1212": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "placeopt__flow__warnings__count:STA-1212": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
"synth__design__instance__area__stdcell": {
- "value": 43.38,
+ "value": 43.1,
"compare": "<="
},
"constraints__clocks__count": {
@@ -12,7 +102,7 @@
"compare": "<="
},
"placeopt__design__instance__count__stdcell": {
- "value": 535,
+ "value": 526,
"compare": "<="
},
"detailedplace__design__violations": {
@@ -27,10 +117,42 @@
"value": 44,
"compare": "<="
},
+ "cts__timing__setup__ws": {
+ "value": -39.4,
+ "compare": ">="
+ },
+ "cts__timing__setup__tns": {
+ "value": -205.0,
+ "compare": ">="
+ },
+ "cts__timing__hold__ws": {
+ "value": -15.5,
+ "compare": ">="
+ },
+ "cts__timing__hold__tns": {
+ "value": -62.0,
+ "compare": ">="
+ },
"globalroute__antenna_diodes_count": {
- "value": 0,
+ "value": 100,
"compare": "<="
},
+ "globalroute__timing__setup__ws": {
+ "value": -38.9,
+ "compare": ">="
+ },
+ "globalroute__timing__setup__tns": {
+ "value": -200.0,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__ws": {
+ "value": -15.5,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__tns": {
+ "value": -62.0,
+ "compare": ">="
+ },
"detailedroute__route__wirelength": {
"value": 1176,
"compare": "<="
@@ -44,27 +166,43 @@
"compare": "<="
},
"detailedroute__antenna_diodes_count": {
- "value": 5,
+ "value": 100,
"compare": "<="
},
- "finish__timing__setup__ws": {
- "value": -67.5,
+ "detailedroute__timing__setup__ws": {
+ "value": -38.9,
"compare": ">="
},
- "finish__design__instance__area": {
- "value": 55,
- "compare": "<="
+ "detailedroute__timing__setup__tns": {
+ "value": -200.0,
+ "compare": ">="
},
- "finish__timing__drv__setup_violation_count": {
- "value": 23,
- "compare": "<="
+ "detailedroute__timing__hold__ws": {
+ "value": -15.5,
+ "compare": ">="
},
- "finish__timing__drv__hold_violation_count": {
- "value": 100,
- "compare": "<="
+ "detailedroute__timing__hold__tns": {
+ "value": -62.0,
+ "compare": ">="
+ },
+ "finish__timing__setup__ws": {
+ "value": -60.7,
+ "compare": ">="
},
- "finish__timing__wns_percent_delay": {
- "value": -30.8,
+ "finish__timing__setup__tns": {
+ "value": -684.0,
"compare": ">="
+ },
+ "finish__timing__hold__ws": {
+ "value": -15.5,
+ "compare": ">="
+ },
+ "finish__timing__hold__tns": {
+ "value": -62.0,
+ "compare": ">="
+ },
+ "finish__design__instance__area": {
+ "value": 54,
+ "compare": "<="
}
}
\ No newline at end of file
diff --git a/flow/designs/asap7/gcd/rules-base.json b/flow/designs/asap7/gcd/rules-base.json
index 37ffc042b2..3c2f48b99a 100644
--- a/flow/designs/asap7/gcd/rules-base.json
+++ b/flow/designs/asap7/gcd/rules-base.json
@@ -1,6 +1,96 @@
{
+ "cts__flow__warnings__count:RSZ-0062": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "cts__flow__warnings__count:STA-1212": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "detailedplace__flow__warnings__count:STA-1212": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "detailedroute__flow__warnings__count:GRT-0246": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "detailedroute__flow__warnings__count:STA-1212": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "finish__flow__warnings__count:GUI-0076": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "finish__flow__warnings__count:STA-1212": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:EST-0027": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:RSZ-0062": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:RSZ-0075": {
+ "value": 508,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:STA-1212": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "flow__warnings__count:PDN-1041": {
+ "value": 424,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "flow__warnings__count:STA-1212": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalplace__flow__warnings__count:STA-1212": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:GRT-0246": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:RSZ-0062": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:STA-1212": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "placeopt__flow__warnings__count:STA-1212": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
"synth__design__instance__area__stdcell": {
- "value": 43.38,
+ "value": 43.1,
"compare": "<="
},
"constraints__clocks__count": {
@@ -12,7 +102,7 @@
"compare": "<="
},
"placeopt__design__instance__count__stdcell": {
- "value": 543,
+ "value": 538,
"compare": "<="
},
"detailedplace__design__violations": {
@@ -27,12 +117,44 @@
"value": 47,
"compare": "<="
},
+ "cts__timing__setup__ws": {
+ "value": -69.3,
+ "compare": ">="
+ },
+ "cts__timing__setup__tns": {
+ "value": -419.0,
+ "compare": ">="
+ },
+ "cts__timing__hold__ws": {
+ "value": -15.5,
+ "compare": ">="
+ },
+ "cts__timing__hold__tns": {
+ "value": -62.0,
+ "compare": ">="
+ },
"globalroute__antenna_diodes_count": {
- "value": 0,
+ "value": 100,
"compare": "<="
},
+ "globalroute__timing__setup__ws": {
+ "value": -78.2,
+ "compare": ">="
+ },
+ "globalroute__timing__setup__tns": {
+ "value": -551.0,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__ws": {
+ "value": -15.5,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__tns": {
+ "value": -62.0,
+ "compare": ">="
+ },
"detailedroute__route__wirelength": {
- "value": 1244,
+ "value": 1174,
"compare": "<="
},
"detailedroute__route__drc_errors": {
@@ -44,27 +166,43 @@
"compare": "<="
},
"detailedroute__antenna_diodes_count": {
- "value": 5,
+ "value": 100,
"compare": "<="
},
- "finish__timing__setup__ws": {
- "value": -73.56,
+ "detailedroute__timing__setup__ws": {
+ "value": -54.0,
"compare": ">="
},
- "finish__design__instance__area": {
- "value": 55,
- "compare": "<="
+ "detailedroute__timing__setup__tns": {
+ "value": -236.0,
+ "compare": ">="
},
- "finish__timing__drv__setup_violation_count": {
- "value": 24,
- "compare": "<="
+ "detailedroute__timing__hold__ws": {
+ "value": -15.5,
+ "compare": ">="
},
- "finish__timing__drv__hold_violation_count": {
- "value": 100,
- "compare": "<="
+ "detailedroute__timing__hold__tns": {
+ "value": -62.0,
+ "compare": ">="
+ },
+ "finish__timing__setup__ws": {
+ "value": -66.0,
+ "compare": ">="
+ },
+ "finish__timing__setup__tns": {
+ "value": -402.0,
+ "compare": ">="
+ },
+ "finish__timing__hold__ws": {
+ "value": -15.5,
+ "compare": ">="
},
- "finish__timing__wns_percent_delay": {
- "value": -32.76,
+ "finish__timing__hold__tns": {
+ "value": -62.0,
"compare": ">="
+ },
+ "finish__design__instance__area": {
+ "value": 55,
+ "compare": "<="
}
}
\ No newline at end of file
diff --git a/flow/designs/asap7/ibex/rules-base.json b/flow/designs/asap7/ibex/rules-base.json
index 3d32b4c580..7862350d54 100644
--- a/flow/designs/asap7/ibex/rules-base.json
+++ b/flow/designs/asap7/ibex/rules-base.json
@@ -1,6 +1,101 @@
{
+ "cts__flow__warnings__count:RSZ-0062": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "cts__flow__warnings__count:STA-1212": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "detailedplace__flow__warnings__count:STA-1212": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "detailedroute__flow__warnings__count:GRT-0246": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "detailedroute__flow__warnings__count:STA-1212": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "finish__flow__warnings__count:GUI-0076": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "finish__flow__warnings__count:STA-1212": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:EST-0027": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:IFP-0028": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:RSZ-0062": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:RSZ-0075": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:STA-1212": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "flow__warnings__count:PDN-1041": {
+ "value": 424,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "flow__warnings__count:STA-1212": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalplace__flow__warnings__count:STA-1212": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:GRT-0246": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:RSZ-0062": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:STA-1212": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "placeopt__flow__warnings__count:STA-1212": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
"synth__design__instance__area__stdcell": {
- "value": 2612.72,
+ "value": 2612.69,
"compare": "<="
},
"constraints__clocks__count": {
@@ -8,7 +103,7 @@
"compare": "=="
},
"placeopt__design__instance__area": {
- "value": 2802,
+ "value": 2781,
"compare": "<="
},
"placeopt__design__instance__count__stdcell": {
@@ -27,10 +122,42 @@
"value": 1995,
"compare": "<="
},
+ "cts__timing__setup__ws": {
+ "value": -213.0,
+ "compare": ">="
+ },
+ "cts__timing__setup__tns": {
+ "value": -94400.0,
+ "compare": ">="
+ },
+ "cts__timing__hold__ws": {
+ "value": -50.0,
+ "compare": ">="
+ },
+ "cts__timing__hold__tns": {
+ "value": -200.0,
+ "compare": ">="
+ },
"globalroute__antenna_diodes_count": {
- "value": 0,
+ "value": 100,
"compare": "<="
},
+ "globalroute__timing__setup__ws": {
+ "value": -214.0,
+ "compare": ">="
+ },
+ "globalroute__timing__setup__tns": {
+ "value": -99700.0,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__ws": {
+ "value": -50.0,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__tns": {
+ "value": -200.0,
+ "compare": ">="
+ },
"detailedroute__route__wirelength": {
"value": 101837,
"compare": "<="
@@ -44,27 +171,43 @@
"compare": "<="
},
"detailedroute__antenna_diodes_count": {
- "value": 5,
+ "value": 100,
"compare": "<="
},
- "finish__timing__setup__ws": {
- "value": -212.68,
+ "detailedroute__timing__setup__ws": {
+ "value": -50.0,
"compare": ">="
},
- "finish__design__instance__area": {
- "value": 2867,
- "compare": "<="
+ "detailedroute__timing__setup__tns": {
+ "value": -200.0,
+ "compare": ">="
},
- "finish__timing__drv__setup_violation_count": {
- "value": 997,
- "compare": "<="
+ "detailedroute__timing__hold__ws": {
+ "value": -50.0,
+ "compare": ">="
},
- "finish__timing__drv__hold_violation_count": {
- "value": 100,
- "compare": "<="
+ "detailedroute__timing__hold__tns": {
+ "value": -200.0,
+ "compare": ">="
},
- "finish__timing__wns_percent_delay": {
- "value": -30.27,
+ "finish__timing__setup__ws": {
+ "value": -193.0,
+ "compare": ">="
+ },
+ "finish__timing__setup__tns": {
+ "value": -53400.0,
"compare": ">="
+ },
+ "finish__timing__hold__ws": {
+ "value": -50.0,
+ "compare": ">="
+ },
+ "finish__timing__hold__tns": {
+ "value": -200.0,
+ "compare": ">="
+ },
+ "finish__design__instance__area": {
+ "value": 2867,
+ "compare": "<="
}
}
\ No newline at end of file
diff --git a/flow/designs/asap7/jpeg/jpeg_encoder15_7nm.sdc b/flow/designs/asap7/jpeg/jpeg_encoder15_7nm.sdc
index 84c409bc5c..063b06987a 100644
--- a/flow/designs/asap7/jpeg/jpeg_encoder15_7nm.sdc
+++ b/flow/designs/asap7/jpeg/jpeg_encoder15_7nm.sdc
@@ -13,3 +13,5 @@ set non_clock_inputs [all_inputs -no_clocks]
set_input_delay [expr $clk_period * $clk_io_pct] -clock $clk_name $non_clock_inputs
set_output_delay [expr $clk_period * $clk_io_pct] -clock $clk_name [all_outputs]
+
+set_max_fanout 10 [current_design]
diff --git a/flow/designs/asap7/jpeg/rules-base.json b/flow/designs/asap7/jpeg/rules-base.json
index 0922d071c8..410c5a7ec2 100644
--- a/flow/designs/asap7/jpeg/rules-base.json
+++ b/flow/designs/asap7/jpeg/rules-base.json
@@ -1,4 +1,89 @@
{
+ "cts__flow__warnings__count:RSZ-0062": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "cts__flow__warnings__count:STA-1212": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "detailedplace__flow__warnings__count:STA-1212": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "detailedroute__flow__warnings__count:GRT-0246": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "detailedroute__flow__warnings__count:STA-1212": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "finish__flow__warnings__count:STA-1212": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:EST-0027": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:IFP-0028": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:RSZ-0062": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:RSZ-0075": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:STA-1212": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "flow__warnings__count:STA-1212": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalplace__flow__warnings__count:STA-1212": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:GRT-0246": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:RSZ-0062": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:STA-1212": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "placeopt__flow__warnings__count:STA-1212": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
"synth__design__instance__area__stdcell": {
"value": 7008.24,
"compare": "<="
@@ -27,12 +112,44 @@
"value": 5530,
"compare": "<="
},
+ "cts__timing__setup__ws": {
+ "value": -50.8,
+ "compare": ">="
+ },
+ "cts__timing__setup__tns": {
+ "value": -153.0,
+ "compare": ">="
+ },
+ "cts__timing__hold__ws": {
+ "value": -34.0,
+ "compare": ">="
+ },
+ "cts__timing__hold__tns": {
+ "value": -136.0,
+ "compare": ">="
+ },
"globalroute__antenna_diodes_count": {
- "value": 0,
+ "value": 100,
"compare": "<="
},
+ "globalroute__timing__setup__ws": {
+ "value": -36.3,
+ "compare": ">="
+ },
+ "globalroute__timing__setup__tns": {
+ "value": -153.0,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__ws": {
+ "value": -34.0,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__tns": {
+ "value": -136.0,
+ "compare": ">="
+ },
"detailedroute__route__wirelength": {
- "value": 175657,
+ "value": 172630,
"compare": "<="
},
"detailedroute__route__drc_errors": {
@@ -44,27 +161,43 @@
"compare": "<="
},
"detailedroute__antenna_diodes_count": {
- "value": 5,
+ "value": 100,
"compare": "<="
},
- "finish__timing__setup__ws": {
- "value": -41.79,
+ "detailedroute__timing__setup__ws": {
+ "value": -34.0,
"compare": ">="
},
- "finish__design__instance__area": {
- "value": 7253,
- "compare": "<="
+ "detailedroute__timing__setup__tns": {
+ "value": -136.0,
+ "compare": ">="
},
- "finish__timing__drv__setup_violation_count": {
- "value": 2765,
- "compare": "<="
+ "detailedroute__timing__hold__ws": {
+ "value": -34.0,
+ "compare": ">="
},
- "finish__timing__drv__hold_violation_count": {
- "value": 100,
- "compare": "<="
+ "detailedroute__timing__hold__tns": {
+ "value": -136.0,
+ "compare": ">="
+ },
+ "finish__timing__setup__ws": {
+ "value": -34.0,
+ "compare": ">="
+ },
+ "finish__timing__setup__tns": {
+ "value": -136.0,
+ "compare": ">="
+ },
+ "finish__timing__hold__ws": {
+ "value": -34.0,
+ "compare": ">="
},
- "finish__timing__wns_percent_delay": {
- "value": -10.0,
+ "finish__timing__hold__tns": {
+ "value": -136.0,
"compare": ">="
+ },
+ "finish__design__instance__area": {
+ "value": 7253,
+ "compare": "<="
}
}
\ No newline at end of file
diff --git a/flow/designs/asap7/jpeg_lvt/rules-base.json b/flow/designs/asap7/jpeg_lvt/rules-base.json
index 93f654392d..fd18f817d5 100644
--- a/flow/designs/asap7/jpeg_lvt/rules-base.json
+++ b/flow/designs/asap7/jpeg_lvt/rules-base.json
@@ -1,6 +1,101 @@
{
+ "cts__flow__warnings__count:STA-1212": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "detailedplace__flow__warnings__count:STA-1212": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "detailedroute__flow__warnings__count:DRT-0120": {
+ "value": 3,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "detailedroute__flow__warnings__count:GRT-0246": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "detailedroute__flow__warnings__count:STA-1212": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "finish__flow__warnings__count:GUI-0076": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "finish__flow__warnings__count:STA-1212": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:EST-0027": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:IFP-0028": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:RSZ-0062": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:RSZ-0075": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:STA-1212": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "flow__warnings__count:PDN-1041": {
+ "value": 424,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "flow__warnings__count:STA-1212": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalplace__flow__warnings__count:STA-1212": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:DRT-0120": {
+ "value": 3,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:GRT-0246": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:STA-1212": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "placeopt__flow__warnings__count:STA-1212": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
"synth__design__instance__area__stdcell": {
- "value": 7048.92,
+ "value": 7047.572508,
"compare": "<="
},
"constraints__clocks__count": {
@@ -8,11 +103,11 @@
"compare": "=="
},
"placeopt__design__instance__area": {
- "value": 7037,
+ "value": 7019,
"compare": "<="
},
"placeopt__design__instance__count__stdcell": {
- "value": 64677,
+ "value": 64302,
"compare": "<="
},
"detailedplace__design__violations": {
@@ -20,17 +115,49 @@
"compare": "=="
},
"cts__design__instance__count__setup_buffer": {
- "value": 5624,
+ "value": 5592,
"compare": "<="
},
"cts__design__instance__count__hold_buffer": {
- "value": 5624,
+ "value": 5592,
"compare": "<="
},
+ "cts__timing__setup__ws": {
+ "value": -30.0,
+ "compare": ">="
+ },
+ "cts__timing__setup__tns": {
+ "value": -120.0,
+ "compare": ">="
+ },
+ "cts__timing__hold__ws": {
+ "value": -30.0,
+ "compare": ">="
+ },
+ "cts__timing__hold__tns": {
+ "value": -120.0,
+ "compare": ">="
+ },
"globalroute__antenna_diodes_count": {
- "value": 0,
+ "value": 100,
"compare": "<="
},
+ "globalroute__timing__setup__ws": {
+ "value": -30.0,
+ "compare": ">="
+ },
+ "globalroute__timing__setup__tns": {
+ "value": -120.0,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__ws": {
+ "value": -30.0,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__tns": {
+ "value": -120.0,
+ "compare": ">="
+ },
"detailedroute__route__wirelength": {
"value": 176948,
"compare": "<="
@@ -44,27 +171,43 @@
"compare": "<="
},
"detailedroute__antenna_diodes_count": {
- "value": 5,
+ "value": 100,
"compare": "<="
},
- "finish__timing__setup__ws": {
- "value": 0.0,
+ "detailedroute__timing__setup__ws": {
+ "value": -30.0,
"compare": ">="
},
- "finish__design__instance__area": {
- "value": 7124,
- "compare": "<="
+ "detailedroute__timing__setup__tns": {
+ "value": -120.0,
+ "compare": ">="
},
- "finish__timing__drv__setup_violation_count": {
- "value": 2812,
- "compare": "<="
+ "detailedroute__timing__hold__ws": {
+ "value": -30.0,
+ "compare": ">="
},
- "finish__timing__drv__hold_violation_count": {
- "value": 100,
- "compare": "<="
+ "detailedroute__timing__hold__tns": {
+ "value": -120.0,
+ "compare": ">="
+ },
+ "finish__timing__setup__ws": {
+ "value": -30.0,
+ "compare": ">="
+ },
+ "finish__timing__setup__tns": {
+ "value": -120.0,
+ "compare": ">="
},
- "finish__timing__wns_percent_delay": {
- "value": -10.0,
+ "finish__timing__hold__ws": {
+ "value": -30.0,
"compare": ">="
+ },
+ "finish__timing__hold__tns": {
+ "value": -120.0,
+ "compare": ">="
+ },
+ "finish__design__instance__area": {
+ "value": 7124,
+ "compare": "<="
}
}
\ No newline at end of file
diff --git a/flow/designs/asap7/mock-alu/rules-base.json b/flow/designs/asap7/mock-alu/rules-base.json
index 50f89f6080..8e66545cb5 100644
--- a/flow/designs/asap7/mock-alu/rules-base.json
+++ b/flow/designs/asap7/mock-alu/rules-base.json
@@ -1,4 +1,99 @@
{
+ "cts__flow__warnings__count:RSZ-0062": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "cts__flow__warnings__count:STA-1212": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "detailedplace__flow__warnings__count:STA-1212": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "detailedroute__flow__warnings__count:GRT-0246": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "detailedroute__flow__warnings__count:STA-1212": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "finish__flow__warnings__count:GUI-0076": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "finish__flow__warnings__count:STA-1212": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:EST-0027": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:IFP-0028": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:RSZ-0062": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:RSZ-0075": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:STA-1212": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "flow__warnings__count:PDN-1041": {
+ "value": 424,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "flow__warnings__count:STA-1212": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalplace__flow__warnings__count:STA-1212": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:GRT-0246": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:RSZ-0062": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:STA-1212": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "placeopt__flow__warnings__count:STA-1212": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
"synth__design__instance__area__stdcell": {
"value": 1665.04,
"compare": "<="
@@ -8,7 +103,7 @@
"compare": "=="
},
"placeopt__design__instance__area": {
- "value": 1817,
+ "value": 1816,
"compare": "<="
},
"placeopt__design__instance__count__stdcell": {
@@ -27,10 +122,42 @@
"value": 1286,
"compare": "<="
},
+ "cts__timing__setup__ws": {
+ "value": -278.0,
+ "compare": ">="
+ },
+ "cts__timing__setup__tns": {
+ "value": -19200.0,
+ "compare": ">="
+ },
+ "cts__timing__hold__ws": {
+ "value": -15.0,
+ "compare": ">="
+ },
+ "cts__timing__hold__tns": {
+ "value": -60.0,
+ "compare": ">="
+ },
"globalroute__antenna_diodes_count": {
- "value": 0,
+ "value": 100,
"compare": "<="
},
+ "globalroute__timing__setup__ws": {
+ "value": -310.0,
+ "compare": ">="
+ },
+ "globalroute__timing__setup__tns": {
+ "value": -23300.0,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__ws": {
+ "value": -15.0,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__tns": {
+ "value": -60.0,
+ "compare": ">="
+ },
"detailedroute__route__wirelength": {
"value": 50078,
"compare": "<="
@@ -44,27 +171,43 @@
"compare": "<="
},
"detailedroute__antenna_diodes_count": {
- "value": 5,
+ "value": 100,
"compare": "<="
},
- "finish__timing__setup__ws": {
- "value": -285.92,
+ "detailedroute__timing__setup__ws": {
+ "value": -255.0,
"compare": ">="
},
- "finish__design__instance__area": {
- "value": 1858,
- "compare": "<="
+ "detailedroute__timing__setup__tns": {
+ "value": -14900.0,
+ "compare": ">="
},
- "finish__timing__drv__setup_violation_count": {
- "value": 667,
- "compare": "<="
+ "detailedroute__timing__hold__ws": {
+ "value": -15.0,
+ "compare": ">="
},
- "finish__timing__drv__hold_violation_count": {
- "value": 100,
- "compare": "<="
+ "detailedroute__timing__hold__tns": {
+ "value": -60.0,
+ "compare": ">="
},
- "finish__timing__wns_percent_delay": {
- "value": -60.98,
+ "finish__timing__setup__ws": {
+ "value": -297.0,
+ "compare": ">="
+ },
+ "finish__timing__setup__tns": {
+ "value": -20500.0,
"compare": ">="
+ },
+ "finish__timing__hold__ws": {
+ "value": -15.0,
+ "compare": ">="
+ },
+ "finish__timing__hold__tns": {
+ "value": -60.0,
+ "compare": ">="
+ },
+ "finish__design__instance__area": {
+ "value": 1858,
+ "compare": "<="
}
}
\ No newline at end of file
diff --git a/flow/designs/asap7/mock-array/BUILD.bazel b/flow/designs/asap7/mock-array/BUILD.bazel
deleted file mode 100644
index e6f26739e5..0000000000
--- a/flow/designs/asap7/mock-array/BUILD.bazel
+++ /dev/null
@@ -1,186 +0,0 @@
-load("@bazel-orfs//:openroad.bzl", "orfs_flow")
-
-# single source of truth for defaults.
-# each number is a unit
-# current unit is configured as 2.16 which is on the routing grid for M5
-
-# table of Elements - (rows cols width height pitch_x pitch_y)
-MOCK_ARRAY_TABLE = [
- 8,
- 8,
- 20,
- 20,
- 20,
- 22,
-]
-
-# Element'd data width
-MOCK_ARRAY_DATAWIDTH = 64
-
-# Must be zero for routing by abutment
-MACRO_BLOCKAGE_HALO = 0
-
-MOCK_ARRAY_SCALE = 45
-
-# Routing pitches for relevant metal layers.
-# For x, this is M5; for y, this is M4.
-# Pitches are specified in OpenROAD-flow-scripts/flow/platforms/asap7/lef/asap7_tech_1x_201209.lef.
-# For asap7, x and y pitch is the same.
-#
-# make_tracks M5 -x_offset 0.012 -x_pitch 0.048 -y_offset 0.012 -y_pitch 0.048
-#
-# the macro needs to be on a multiple of the track pattern
-placement_grid_x = 0.048 * MOCK_ARRAY_SCALE
-
-placement_grid_y = 0.048 * MOCK_ARRAY_SCALE
-
-# number of Elements in row and column, can be control by user via environment variable
-# MOCK_ARRAY_TABLE (rows, cols, width, height, pitch_x, pitch_y)
-# rows, cols - number of Element in rows, cols
-# width, height - width and height of each Element
-#
-# When the pitch is equal to the width/height, we have routing by abutment
-# https://en.wikipedia.org/wiki/Pitch#Linear_measurement
-#
-# pitch_x, pitch_y - placement pitch for each Element, in x and y direction
-# specification are in unit of placement grid
-rows, cols, ce_x, ce_y, pitch_x, pitch_y = MOCK_ARRAY_TABLE
-
-# Element size is set to multiple of placement grid above
-ce_width = ce_x * placement_grid_x
-
-ce_height = ce_y * placement_grid_y
-
-# top level core offset
-margin_x = placement_grid_x
-
-margin_y = placement_grid_y
-
-# Element core margin
-ce_margin_x = placement_grid_x * 0.5
-
-ce_margin_y = placement_grid_y * 0.5
-
-# PDN problems if it is smaller. Not investigated.
-array_spacing_x = margin_x * 2
-
-array_spacing_y = margin_y * 2
-
-array_offset_x = array_spacing_x + margin_x
-
-array_offset_y = array_spacing_y + margin_y
-
-# top level core and die size
-core_width = (
- 2 * array_spacing_x + ((placement_grid_x * pitch_x) * (cols - 1)) + ce_width
-)
-
-core_height = (
- 2 * array_spacing_y + ((placement_grid_y * pitch_y) * (rows - 1)) + ce_height
-)
-
-die_width = core_width + (margin_x * 2)
-
-die_height = core_height + (margin_y * 2)
-
-filegroup(
- name = "mock-array-constraints",
- srcs = [
- "constraints.sdc",
- ],
- visibility = [":__subpackages__"],
-)
-
-filegroup(
- name = "mock-array-io",
- srcs = [
- "io.tcl",
- ],
- data = [
- "//flow/designs/src/mock-array:util.tcl",
- ],
- visibility = [":__subpackages__"],
-)
-
-orfs_flow(
- name = "MockArray",
- arguments = {
- "PLACE_PINS_ARGS": "-annealing",
- "PLACE_DENSITY": "0.30",
- "CORE_AREA": "{} {} {} {}".format(
- margin_x,
- margin_y,
- core_width + margin_x,
- core_height + margin_y,
- ),
- "DIE_AREA": "0 0 {} {}".format(
- die_width,
- die_height,
- ),
- "MACRO_PLACE_HALO": "0 2.16",
- "RTLMP_BOUNDARY_WT": "0",
- "PDN_TCL": "$(PLATFORM_DIR)/openRoad/pdn/BLOCKS_grid_strategy.tcl",
- "MACRO_ROWS_HALO_X": "0.5",
- "MACRO_ROWS_HALO_Y": "0.5",
- "MACRO_BLOCKAGE_HALO": "0",
- "MAX_ROUTING_LAYER": "M9",
- "GDS_ALLOW_EMPTY": "Element",
- "PWR_NETS_VOLTAGES": "",
- "GND_NETS_VOLTAGES": "",
- "IO_PLACER_V": "M5 M7",
- "IO_PLACER_H": "M4 M6",
- "DETAILED_ROUTE_END_ITERATION": "6",
- },
- macros = ["Element_generate_abstract"],
- sources = {
- "SDC_FILE": [":mock-array-constraints"],
- "IO_CONSTRAINTS": [":mock-array-io"],
- # "MACRO_PLACEMENT_TCL": [":macro-placement.tcl"],
- },
- verilog_files = ["//flow/designs/src/mock-array:verilog"],
-)
-
-filegroup(
- name = "mock-array-element-io",
- srcs = [
- "Element/io.tcl",
- ],
- data = [
- "//flow/designs/src/mock-array:util.tcl",
- ],
- visibility = [":__subpackages__"],
-)
-
-orfs_flow(
- name = "Element",
- abstract_stage = "route",
- arguments = {
- "PLACE_DENSITY": "0.82",
- "MOCK_ARRAY_ROWS": "8",
- "MOCK_ARRAY_COLS": "8",
- "DETAILED_ROUTE_END_ITERATION": "6",
- "MIN_ROUTING_LAYER": "M2",
- "MAX_ROUTING_LAYER": "M5",
- "IO_PLACER_H": "M2 M4",
- "IO_PLACER_V": "M3 M5",
- "PLACE_PINS_ARGS": "-annealing",
- "GND_NETS_VOLTAGES": "",
- "PWR_NETS_VOLTAGES": "",
- "CORE_AREA": "{} {} {} {}".format(
- ce_margin_x,
- ce_margin_y,
- ce_width - ce_margin_x,
- ce_height - ce_margin_y,
- ),
- "DIE_AREA": "0 0 {} {}".format(
- ce_width,
- ce_height,
- ),
- "PDN_TCL": "$(PLATFORM_DIR)/openRoad/pdn/BLOCK_grid_strategy.tcl",
- },
- sources = {
- "IO_CONSTRAINTS": [":mock-array-element-io"],
- "SDC_FILE": [":mock-array-constraints"],
- },
- verilog_files = ["//flow/designs/src/mock-array:verilog"],
-)
diff --git a/flow/designs/asap7/mock-array/Element/config.mk b/flow/designs/asap7/mock-array/Element/config.mk
deleted file mode 100644
index a326e07c32..0000000000
--- a/flow/designs/asap7/mock-array/Element/config.mk
+++ /dev/null
@@ -1,44 +0,0 @@
-include designs/asap7/mock-array/defaults.mk
-
-export DESIGN_NAME = Element
-export DESIGN_NICKNAME = mock-array_Element
-
-export VERILOG_FILES = designs/src/mock-array/*.v
-export SDC_FILE = designs/asap7/mock-array/constraints.sdc
-
-export PLATFORM = asap7
-
-export PLACE_DENSITY = 0.82
-
-export CORE_AREA = $(shell \
- export MOCK_ARRAY_TABLE="$(MOCK_ARRAY_TABLE)" && \
- export MOCK_ARRAY_SCALE="$(MOCK_ARRAY_SCALE)" && \
- cd $(DESIGN_DIR)/../ && \
- python3 -c "import config; print(f'{config.ce_margin_x} {config.ce_margin_y} {config.ce_width - config.ce_margin_x} {config.ce_height - config.ce_margin_y}')")
-
-export DIE_AREA = $(shell \
- export MOCK_ARRAY_TABLE="$(MOCK_ARRAY_TABLE)" && \
- export MOCK_ARRAY_SCALE="$(MOCK_ARRAY_SCALE)" && \
- cd $(DESIGN_DIR)/../ && \
- python3 -c "import config; print(f'0 0 {config.ce_width} {config.ce_height}')")
-
-export IO_CONSTRAINTS = designs/asap7/mock-array/Element/io.tcl
-
-export PDN_TCL = $(PLATFORM_DIR)/openRoad/pdn/BLOCK_grid_strategy.tcl
-
-# Detailed routing should be easy, limit iterations
-export DETAILED_ROUTE_END_ITERATION ?= 6
-
-export MIN_ROUTING_LAYER = M2
-# M5 is the top PDN layer, so don't exceed that.
-export MAX_ROUTING_LAYER = M5
-
-export IO_PLACER_H=M2 M4
-export IO_PLACER_V=M3 M5
-
-export PLACE_PINS_ARGS = -annealing
-
-export GND_NETS_VOLTAGES =
-export PWR_NETS_VOLTAGES =
-
-export ADDITIONAL_FILES = designs/src/mock-array/util.tcl
diff --git a/flow/designs/asap7/mock-array/Element/io.tcl b/flow/designs/asap7/mock-array/Element/io.tcl
deleted file mode 100644
index e0e50243c7..0000000000
--- a/flow/designs/asap7/mock-array/Element/io.tcl
+++ /dev/null
@@ -1,51 +0,0 @@
-# bazel has root of OpenROAD-flow-scripts as working directory
-foreach prefix {"" flow/} {
- set f ${prefix}designs/src/mock-array/util.tcl
- if { [file exists $f] } {
- source $f
- }
-}
-
-set assignments [list \
- top bottom \
- [list [concat \
- {*}[match_pins io_ins_down.*] \
- {*}[match_pins io_outs_up.*]] \
- [concat \
- {*}[match_pins io_outs_down.*] \
- {*}[match_pins io_ins_up.*]]] \
- left right \
- [list [concat \
- {*}[match_pins io_ins_right.*] \
- {*}[match_pins io_outs_left.*]] \
- [concat \
- {*}[match_pins io_outs_right.*] \
- {*}[match_pins io_ins_left.*]]] \
- left right \
- [list [concat \
- {*}[match_pins io_lsbIns_.*]] \
- [concat \
- {*}[match_pins io_lsbOuts_.*]]]]
-
-proc zip { list1 list2 } {
- set result {}
- set length [llength $list1]
- set skip [expr [llength $list2] - [llength $list1]]
- for { set i 0 } { $i < $length } { incr i } {
- lappend result [lindex $list2 [expr $skip + $i]] [lindex $list1 $i]
- }
- return $result
-}
-
-
-foreach {direction direction2 names} $assignments {
- set mirrored [zip {*}$names]
- set_io_pin_constraint -region $direction2:* -pin_names [lindex $names 1]
- # Test pins across multiple metal layers; so don't group
- # pins as a group of pins must be on a single metal layer.
- #
- # set_io_pin_constraint -group -order -pin_names [lindex $names 1]
- set_io_pin_constraint -mirrored_pins $mirrored
-}
-
-set_io_pin_constraint -region top:* -pin_names clock
diff --git a/flow/designs/asap7/mock-array/config.mk b/flow/designs/asap7/mock-array/config.mk
deleted file mode 100644
index 6b694315ff..0000000000
--- a/flow/designs/asap7/mock-array/config.mk
+++ /dev/null
@@ -1,77 +0,0 @@
-include designs/asap7/mock-array/defaults.mk
-
-export DESIGN_NAME = MockArray
-export DESIGN_NICKNAME = mock-array
-
-export VERILOG_FILES = designs/src/mock-array/*.v
-
-export SDC_FILE = designs/asap7/mock-array/constraints.sdc
-
-export PLATFORM = asap7
-
-export PLACE_DENSITY = 0.30
-
-export CORE_AREA = $(shell \
- export MOCK_ARRAY_TABLE="$(MOCK_ARRAY_TABLE)" && \
- export MOCK_ARRAY_SCALE="$(MOCK_ARRAY_SCALE)" && \
- cd $(DESIGN_DIR) && \
- python3 -c "import config ; print(f'{config.margin_x} {config.margin_y} {config.core_width + config.margin_x} {config.core_height + config.margin_y}')")
-
-export DIE_AREA = $(shell \
- export MOCK_ARRAY_TABLE="$(MOCK_ARRAY_TABLE)" && \
- export MOCK_ARRAY_SCALE="$(MOCK_ARRAY_SCALE)" && \
- cd $(DESIGN_DIR) && \
- python3 -c "import config; print(f'{0} {0} {config.die_width} {config.die_height}')")
-
-export MACRO_PLACE_HALO = 0 2.16
-export RTLMP_BOUNDARY_WT = 0
-export RTLMP_FLOW ?= 1
-export RTLMP_MAX_INST = 250
-export RTLMP_MIN_INST = 50
-export RTLMP_MAX_MACRO = 64
-export RTLMP_MIN_MACRO = 8
-
-export BLOCKS ?= Element
-
-ifneq ($(BLOCKS),)
- export GDS_ALLOW_EMPTY = Element
- ifneq ($(RTLMP_FLOW), 1)
- export MACRO_PLACEMENT_TCL = $(DESIGN_HOME)/asap7/mock-array/macro-placement.tcl
- endif
- export PDN_TCL = $(PLATFORM_DIR)/openRoad/pdn/BLOCKS_grid_strategy.tcl
-endif
-
-export IO_CONSTRAINTS = designs/asap7/mock-array/io.tcl
-
-# Target to force generation of Verilog per user settings MOCK_ARRAY_TABLE (rows, cols)
-.PHONY: verilog
-verilog:
- export MOCK_ARRAY_ROWS=$(word 1, $(MOCK_ARRAY_TABLE)) ; \
- export MOCK_ARRAY_COLS=$(word 2, $(MOCK_ARRAY_TABLE)) ; \
- $(DESIGN_HOME)/asap7/mock-array/verilog.sh
-
-.PHONY: simulate
-simulate:
- export MOCK_ARRAY_ROWS=$(word 1, $(MOCK_ARRAY_TABLE)) ; \
- export MOCK_ARRAY_COLS=$(word 2, $(MOCK_ARRAY_TABLE)) ; \
- $(DESIGN_HOME)/asap7/mock-array/simulate.sh
-
-.PHONY: power
-power:
- $(OPENSTA_EXE) -no_init -exit designs/asap7/mock-array/power.tcl
-
-# Routing by abutment should be easy, limit iterations
-export DETAILED_ROUTE_END_ITERATION ?= 6
-
-export MAX_ROUTING_LAYER = M9
-
-# ensure we have some rows, so we don't get a bad clock skew.
-export MACRO_ROWS_HALO_X = 0.5
-export MACRO_ROWS_HALO_Y = 0.5
-
-export ADDITIONAL_FILES = \
- designs/src/mock-array/util.tcl \
- designs/asap7/mock-array/macro-placement.tcl
-
-export IO_PLACER_V = M5 M7
-export IO_PLACER_H = M4 M6
diff --git a/flow/designs/asap7/mock-array/config.py b/flow/designs/asap7/mock-array/config.py
deleted file mode 100644
index a8979bd4fe..0000000000
--- a/flow/designs/asap7/mock-array/config.py
+++ /dev/null
@@ -1,56 +0,0 @@
-import os
-
-# Routing pitches for relevant metal layers.
-# For x, this is M5; for y, this is M4.
-# Pitches are specified in OpenROAD-flow-scripts/flow/platforms/asap7/lef/asap7_tech_1x_201209.lef.
-# For asap7, x and y pitch is the same.
-#
-# make_tracks M5 -x_offset 0.012 -x_pitch 0.048 -y_offset 0.012 -y_pitch 0.048
-#
-# the macro needs to be on a multiple of the track pattern
-placement_grid_x = 0.048 * int(os.environ.get("MOCK_ARRAY_SCALE"))
-placement_grid_y = 0.048 * int(os.environ.get("MOCK_ARRAY_SCALE"))
-
-# number of Elements in row and column, can be control by user via environment variable
-# MOCK_ARRAY_TABLE (rows, cols, width, height, pitch_x, pitch_y)
-# rows, cols - number of Element in rows, cols
-# width, height - width and height of each Element
-#
-# When the pitch is equal to the width/height, we have routing by abutment
-# https://en.wikipedia.org/wiki/Pitch#Linear_measurement
-#
-# pitch_x, pitch_y - placement pitch for each Element, in x and y direction
-# specification are in unit of placement grid
-rows, cols, ce_x, ce_y, pitch_x, pitch_y = map(
- int, os.environ.get("MOCK_ARRAY_TABLE").split()
-)
-
-# Element size is set to multiple of placement grid above
-ce_width = ce_x * placement_grid_x
-ce_height = ce_y * placement_grid_y
-
-# top level core offset
-margin_x = placement_grid_x
-margin_y = placement_grid_y
-
-# Element core margin
-ce_margin_x = placement_grid_x * 0.5
-ce_margin_y = placement_grid_y * 0.5
-
-# PDN problems if it is smaller. Not investigated.
-array_spacing_x = margin_x * 2
-array_spacing_y = margin_y * 2
-
-array_offset_x = array_spacing_x + margin_x
-array_offset_y = array_spacing_y + margin_y
-
-# top level core and die size
-core_width = (
- 2 * array_spacing_x + ((placement_grid_x * pitch_x) * (cols - 1)) + ce_width
-)
-core_height = (
- 2 * array_spacing_y + ((placement_grid_y * pitch_y) * (rows - 1)) + ce_height
-)
-
-die_width = core_width + (margin_x * 2)
-die_height = core_height + (margin_y * 2)
diff --git a/flow/designs/asap7/mock-array/constraints.sdc b/flow/designs/asap7/mock-array/constraints.sdc
deleted file mode 100644
index 42a0f5177c..0000000000
--- a/flow/designs/asap7/mock-array/constraints.sdc
+++ /dev/null
@@ -1,5 +0,0 @@
-set clk_name clock
-set clk_port_name clock
-set clk_period 250
-
-source $env(PLATFORM_DIR)/constraints.sdc
diff --git a/flow/designs/asap7/mock-array/defaults.mk b/flow/designs/asap7/mock-array/defaults.mk
deleted file mode 100644
index bd8eb304ff..0000000000
--- a/flow/designs/asap7/mock-array/defaults.mk
+++ /dev/null
@@ -1,14 +0,0 @@
-# single source of truth for defaults.
-# each number is a unit
-# current unit is configured as 2.16 which is on the routing grid for M5
-
-# table of Elements - (rows cols width height pitch_x pitch_y)
-export MOCK_ARRAY_TABLE ?= 8 8 20 20 20 22
-
-# Element'd data width
-export MOCK_ARRAY_DATAWIDTH ?= 64
-
-# Must be zero for routing by abutment
-export MACRO_BLOCKAGE_HALO ?= 0
-
-export MOCK_ARRAY_SCALE ?= 45
diff --git a/flow/designs/asap7/mock-array/io.tcl b/flow/designs/asap7/mock-array/io.tcl
deleted file mode 100644
index 1bf0ee962b..0000000000
--- a/flow/designs/asap7/mock-array/io.tcl
+++ /dev/null
@@ -1,30 +0,0 @@
-# bazel has root of OpenROAD-flow-scripts as working directory
-foreach prefix {"" flow/} {
- set f ${prefix}designs/src/mock-array/util.tcl
- if { [file exists $f] } {
- source $f
- }
-}
-
-set assignments [list \
- top \
- [concat \
- {*}[match_pins io_ins_down_.*] \
- {*}[match_pins io_outs_up_.*]] \
- bottom \
- [concat \
- {*}[match_pins io_ins_up_.*] \
- {*}[match_pins io_outs_down_.*]] \
- left \
- [concat \
- {*}[match_pins io_ins_right_.*] \
- {*}[match_pins io_outs_left_.*]] \
- right \
- [concat \
- {*}[match_pins io_ins_left_.*] \
- {*}[match_pins io_outs_right_.*] \
- {*}[match_pins io_lsbs_.*]]]
-
-foreach {direction names} $assignments {
- set_io_pin_constraint -region $direction:* -pin_names $names
-}
diff --git a/flow/designs/asap7/mock-array/macro-placement.tcl b/flow/designs/asap7/mock-array/macro-placement.tcl
deleted file mode 100644
index 6eed9be902..0000000000
--- a/flow/designs/asap7/mock-array/macro-placement.tcl
+++ /dev/null
@@ -1,28 +0,0 @@
-# Define the variables x and y for the offset
-
-set block [ord::get_db_block]
-set core [$block getCoreArea]
-
-set element [lindex [find_macros] 0]
-set bbox [$element getBBox]
-
-# Calculate the x and y pitch
-set x_pitch [$bbox getDX]
-set y_pitch [expr [$bbox getDY] + 4/[ord::dbu_to_microns 1]]
-
-# Define the base location
-set x_offset [expr [$core xMin] + ([$core dx] - (7 * $x_pitch) - [$bbox getDX])/2]
-set y_offset [expr [$core yMin] + ([$core dy] - (7 * $y_pitch) - [$bbox getDY])/2]
-
-# Loop through the 8x8 array, add the offset, and invoke place_macro
-for { set i 0 } { $i < 8 } { incr i } {
- for { set j 0 } { $j < 8 } { incr j } {
- set macro_name [format "ces_%d_%d" $i $j]
- set x_location [expr { $j * $x_pitch + $x_offset }]
- set y_location [expr { $i * $y_pitch + $y_offset }]
- place_macro -macro_name $macro_name -location \
- [list [expr [ord::dbu_to_microns 1] * $x_location] \
- [expr [ord::dbu_to_microns 1] * $y_location]] \
- -orientation R0
- }
-}
diff --git a/flow/designs/asap7/mock-array/power.tcl b/flow/designs/asap7/mock-array/power.tcl
deleted file mode 100644
index b132101bd8..0000000000
--- a/flow/designs/asap7/mock-array/power.tcl
+++ /dev/null
@@ -1,123 +0,0 @@
-source $::env(SCRIPTS_DIR)/util.tcl
-
-foreach libFile $::env(LIB_FILES) {
- if { [lsearch -exact $::env(ADDITIONAL_LIBS) $libFile] == -1 } {
- read_liberty $libFile
- }
-}
-
-log_cmd read_verilog results/asap7/mock-array_Element/base/6_final.v
-log_cmd read_verilog $::env(RESULTS_DIR)/6_final.v
-log_cmd read_verilog $::env(PLATFORM_DIR)/verilog/stdcell/empty.v
-log_cmd link_design MockArray
-
-log_cmd read_sdc $::env(RESULTS_DIR)/6_final.sdc
-log_cmd read_spef $::env(RESULTS_DIR)/6_final.spef
-puts "read_spef for ces_*_* macros"
-for { set x 0 } { $x < 8 } { incr x } {
- for { set y 0 } { $y < 8 } { incr y } {
- read_spef -path ces_${x}_${y} results/asap7/mock-array_Element/base/6_final.spef
- }
-}
-
-# OpenSTA reports reg2reg paths inside macros,
-# whereas these paths are hidden to OpenROAD that
-# uses a .lib file for the macros.
-log_cmd report_checks
-
-log_cmd report_power
-
-set vcd_file $::env(RESULTS_DIR)/MockArrayTestbench.vcd
-log_cmd read_vcd -scope TOP/MockArray $vcd_file
-
-set fp [open $::env(RESULTS_DIR)/activity.tcl w]
-set pins [get_pins -hierarchical *]
-set clock_period [expr [get_property [get_clocks] period] * 1e-12]
-foreach pin $pins {
- set activity [get_property $pin activity]
- set activity_origin [lindex $activity 2]
- if { $activity_origin != "vcd" } {
- continue
- }
- puts $fp "set_power_activity \
- -pin \[get_pins \{[get_property $pin full_name]\}\] \
- -activity [expr [lindex $activity 0] * $clock_period] \
- -duty [lindex $activity 1]"
-}
-close $fp
-
-puts "Total number of pins: [llength [get_pins -hierarchical *]]"
-set no_vcd_activity {}
-foreach pin $pins {
- set activity [get_property $pin activity]
- set activity_origin [lindex $activity 2]
- if { $activity_origin == "vcd" } {
- continue
- }
- if { $activity_origin == "constant" } {
- continue
- }
- if { $activity_origin == "unknown" } {
- continue
- }
- if { [get_property $pin is_hierarchical] } {
- continue
- }
- if { $activity_origin == "clock" } {
- continue
- }
- set direction [get_property $pin direction]
- if { $direction == "internal" } {
- continue
- }
- lappend no_vcd_activity "[get_full_name $pin] $activity $direction"
- if { [llength $no_vcd_activity] >= 10 } {
- break
- }
-}
-
-if { [llength $no_vcd_activity] > 0 } {
- puts "Error: Listing [llength $no_vcd_activity] pins without activity from $vcd_file:"
- foreach pin $no_vcd_activity {
- puts $pin
- }
- exit 1
-}
-
-set ces {}
-for { set x 0 } { $x < 8 } { incr x } {
- for { set y 0 } { $y < 8 } { incr y } {
- lappend ces ces_${x}_${y}
- }
-}
-
-puts {report_power -instances [get_cells $ces]}
-report_power -instances [get_cells $ces]
-
-proc total_power { } {
- return [lindex [sta::design_power [sta::corners]] 3]
-}
-
-set total_power_vcd [total_power]
-log_cmd report_power
-
-source $::env(RESULTS_DIR)/activity.tcl
-log_cmd report_power
-set total_power_user_activity [total_power]
-
-puts "Total power from VCD: $total_power_vcd"
-puts "Total power from user activity: $total_power_user_activity"
-
-if { $total_power_vcd == $total_power_user_activity } {
- puts "Error: settting user power activity had no effect, expected some loss in accuracy"
- exit 1
-}
-
-if { abs($total_power_vcd - $total_power_user_activity) > 1e-3 } {
- puts "Error: Total power mismatch between VCD and user activity: \
- $total_power_vcd vs $total_power_user_activity"
- exit 1
-}
-
-log_cmd report_parasitic_annotation
-log_cmd report_activity_annotation -report_unannotated
diff --git a/flow/designs/asap7/mock-array/rules-base.json b/flow/designs/asap7/mock-array/rules-base.json
deleted file mode 100644
index 2e7ee4f7b3..0000000000
--- a/flow/designs/asap7/mock-array/rules-base.json
+++ /dev/null
@@ -1,70 +0,0 @@
-{
- "synth__design__instance__area__stdcell": {
- "value": 34311.75,
- "compare": "<="
- },
- "constraints__clocks__count": {
- "value": 1,
- "compare": "=="
- },
- "placeopt__design__instance__area": {
- "value": 137948,
- "compare": "<="
- },
- "placeopt__design__instance__count__stdcell": {
- "value": 12335,
- "compare": "<="
- },
- "detailedplace__design__violations": {
- "value": 0,
- "compare": "=="
- },
- "cts__design__instance__count__setup_buffer": {
- "value": 1073,
- "compare": "<="
- },
- "cts__design__instance__count__hold_buffer": {
- "value": 1073,
- "compare": "<="
- },
- "globalroute__antenna_diodes_count": {
- "value": 0,
- "compare": "<="
- },
- "detailedroute__route__wirelength": {
- "value": 73555,
- "compare": "<="
- },
- "detailedroute__route__drc_errors": {
- "value": 0,
- "compare": "<="
- },
- "detailedroute__antenna__violating__nets": {
- "value": 0,
- "compare": "<="
- },
- "detailedroute__antenna_diodes_count": {
- "value": 5,
- "compare": "<="
- },
- "finish__timing__setup__ws": {
- "value": -89.95,
- "compare": ">="
- },
- "finish__design__instance__area": {
- "value": 137967,
- "compare": "<="
- },
- "finish__timing__drv__setup_violation_count": {
- "value": 536,
- "compare": "<="
- },
- "finish__timing__drv__hold_violation_count": {
- "value": 100,
- "compare": "<="
- },
- "finish__timing__wns_percent_delay": {
- "value": -31.9,
- "compare": ">="
- }
-}
\ No newline at end of file
diff --git a/flow/designs/asap7/mock-array/simulate.sh b/flow/designs/asap7/mock-array/simulate.sh
deleted file mode 100755
index 5cb8a771b1..0000000000
--- a/flow/designs/asap7/mock-array/simulate.sh
+++ /dev/null
@@ -1,43 +0,0 @@
-#!/usr/bin/env bash
-#
-# Executes Verilator to generate a VCD file based on simulation
-# simulate.cpp is set up to write the VCD file into the results directory
-#
-set -ex
-
-OBJ_DIR="$RESULTS_DIR/verilator/obj"
-POST_DIR="$RESULTS_DIR/verilator/post"
-
-# Make sure the output directories are created
-mkdir -p $OBJ_DIR
-mkdir -p $POST_DIR
-
-# Copy Verilog files used for simulation to post dir in the objects area
-cp $RESULTS_DIR/6_final.v $POST_DIR/MockArrayFinal.v
-cp $RESULTS_DIR/../../mock-array_Element/base/6_final.v $POST_DIR/MockArrayElement.v
-
-# Run simulation and have Verilator write the output files to the objects area
-verilator -Wall --cc \
- --timescale 1ps/1ps \
- -Wno-DECLFILENAME \
- -Wno-UNUSEDSIGNAL \
- -Wno-PINMISSING \
- --Mdir $OBJ_DIR \
- --top-module MockArray \
- --trace \
- --trace-underscore \
- $PLATFORM_DIR/verilog/stdcell/asap7sc7p5t_AO_RVT_TT_201020.v \
- $PLATFORM_DIR/verilog/stdcell/asap7sc7p5t_INVBUF_RVT_TT_201020.v \
- $PLATFORM_DIR/verilog/stdcell/asap7sc7p5t_SIMPLE_RVT_TT_201020.v \
- $PLATFORM_DIR/verilog/stdcell/dff.v \
- $PLATFORM_DIR/verilog/stdcell/empty.v \
- $RESULTS_DIR/6_final.v \
- $RESULTS_DIR/../../mock-array_Element/base/6_final.v \
- --exe \
- $DESIGN_HOME/src/mock-array/simulate.cpp
-
-# Link the generated object files into the VMockArray executable
-make -j16 -C $OBJ_DIR -f VMockArray.mk
-
-# Run the simulation
-$OBJ_DIR/VMockArray
diff --git a/flow/designs/asap7/mock-array/verilog.sh b/flow/designs/asap7/mock-array/verilog.sh
deleted file mode 100755
index 11ec8229a7..0000000000
--- a/flow/designs/asap7/mock-array/verilog.sh
+++ /dev/null
@@ -1,16 +0,0 @@
-#!/usr/bin/env bash
-set -ex
-
-# allow this script to be invoked from any folder
-DIR="$( cd "$( dirname "${BASH_SOURCE[0]}" )" && pwd )"
-BASE=$DIR/../..
-
-cd $DIR
-
-cd ../../src/mock-array
-
-sbt -Duser.home="$HOME" -Djline.terminal=jline.UnsupportedTerminal -batch \
- "test:runMain GenerateMockArray --width ${MOCK_ARRAY_COLS} --height ${MOCK_ARRAY_ROWS} --dataWidth ${MOCK_ARRAY_DATAWIDTH} -- --emit-modules verilog --emission-options disableMemRandomization,disableRegisterRandomization --target-dir ."
-
-# reduce git noise as these comments will change if the line numbers in Chisel changes
-find . -name "*.v" -type f -exec sed -i 's/ \/\/.*$//' {} \;
diff --git a/flow/designs/asap7/mock-cpu/rules-base.json b/flow/designs/asap7/mock-cpu/rules-base.json
index b23a143971..e97ac72424 100644
--- a/flow/designs/asap7/mock-cpu/rules-base.json
+++ b/flow/designs/asap7/mock-cpu/rules-base.json
@@ -1,4 +1,194 @@
{
+ "cts__flow__warnings__count:RSZ-0062": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "cts__flow__warnings__count:STA-1212": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "cts__flow__warnings__count:STA-1551": {
+ "value": 2,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "cts__flow__warnings__count:STA-1554": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "detailedplace__flow__warnings__count:STA-1212": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "detailedplace__flow__warnings__count:STA-1551": {
+ "value": 2,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "detailedplace__flow__warnings__count:STA-1554": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "detailedroute__flow__warnings__count:GRT-0246": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "detailedroute__flow__warnings__count:STA-1212": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "detailedroute__flow__warnings__count:STA-1551": {
+ "value": 2,
+ "compare": "<=",
+ "level": "warning"
+ },
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@@ -27,10 +217,42 @@
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@@ -44,27 +266,43 @@
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+ "compare": ">="
},
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"compare": ">="
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diff --git a/flow/designs/asap7/riscv32i-mock-sram/rules-base.json b/flow/designs/asap7/riscv32i-mock-sram/rules-base.json
index 8c1dff2529..7ee997a952 100644
--- a/flow/designs/asap7/riscv32i-mock-sram/rules-base.json
+++ b/flow/designs/asap7/riscv32i-mock-sram/rules-base.json
@@ -1,6 +1,96 @@
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@@ -8,11 +98,11 @@
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@@ -20,19 +110,51 @@
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+ "cts__timing__hold__ws": {
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+ "compare": ">="
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+ "cts__timing__hold__tns": {
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+ "compare": ">="
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"globalroute__antenna_diodes_count": {
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+ "value": 100,
"compare": "<="
},
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@@ -44,27 +166,43 @@
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diff --git a/flow/designs/asap7/riscv32i/rules-base.json b/flow/designs/asap7/riscv32i/rules-base.json
index 7cd995ba59..0e59537c0a 100644
--- a/flow/designs/asap7/riscv32i/rules-base.json
+++ b/flow/designs/asap7/riscv32i/rules-base.json
@@ -1,6 +1,96 @@
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+ "compare": "<=",
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@@ -8,7 +98,7 @@
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"placeopt__design__instance__count__stdcell": {
@@ -27,10 +117,42 @@
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},
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+ "compare": ">="
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"globalroute__antenna_diodes_count": {
- "value": 0,
+ "value": 100,
"compare": "<="
},
+ "globalroute__timing__setup__ws": {
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+ "compare": ">="
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@@ -44,27 +166,43 @@
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},
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\ No newline at end of file
diff --git a/flow/designs/asap7/swerv_wrapper/rules-base.json b/flow/designs/asap7/swerv_wrapper/rules-base.json
index 22bd002f03..cc3ca2ee86 100644
--- a/flow/designs/asap7/swerv_wrapper/rules-base.json
+++ b/flow/designs/asap7/swerv_wrapper/rules-base.json
@@ -1,4 +1,79 @@
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"synth__design__instance__area__stdcell": {
"value": 53459.06,
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@@ -8,7 +83,7 @@
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"globalroute__antenna_diodes_count": {
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+ "compare": ">="
+ },
+ "globalroute__timing__hold__tns": {
+ "value": -320.0,
+ "compare": ">="
+ },
"detailedroute__route__wirelength": {
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+ "value": 1610613,
"compare": "<="
},
"detailedroute__route__drc_errors": {
@@ -44,27 +151,43 @@
"compare": "<="
},
"detailedroute__antenna_diodes_count": {
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+ "value": 118,
"compare": "<="
},
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+ "detailedroute__timing__setup__ws": {
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"compare": ">="
},
- "finish__design__instance__area": {
- "value": 56249,
- "compare": "<="
+ "detailedroute__timing__setup__tns": {
+ "value": -320.0,
+ "compare": ">="
},
- "finish__timing__drv__setup_violation_count": {
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- "compare": "<="
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+ "value": -80.0,
+ "compare": ">="
},
- "finish__timing__drv__hold_violation_count": {
- "value": 1330,
- "compare": "<="
+ "detailedroute__timing__hold__tns": {
+ "value": -320.0,
+ "compare": ">="
+ },
+ "finish__timing__setup__ws": {
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+ "compare": ">="
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+ "finish__timing__setup__tns": {
+ "value": -223000.0,
+ "compare": ">="
+ },
+ "finish__timing__hold__ws": {
+ "value": -285.0,
+ "compare": ">="
},
- "finish__timing__wns_percent_delay": {
- "value": -24.59,
+ "finish__timing__hold__tns": {
+ "value": -86400.0,
"compare": ">="
+ },
+ "finish__design__instance__area": {
+ "value": 56249,
+ "compare": "<="
}
}
\ No newline at end of file
diff --git a/flow/designs/asap7/uart/rules-base.json b/flow/designs/asap7/uart/rules-base.json
index be5d1de76f..bea3214abc 100644
--- a/flow/designs/asap7/uart/rules-base.json
+++ b/flow/designs/asap7/uart/rules-base.json
@@ -1,4 +1,89 @@
{
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+ "compare": "<=",
+ "level": "warning"
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+ "compare": "<=",
+ "level": "warning"
+ },
+ "detailedplace__flow__warnings__count:STA-1212": {
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+ "compare": "<=",
+ "level": "warning"
+ },
+ "detailedroute__flow__warnings__count:GRT-0246": {
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+ "compare": "<=",
+ "level": "warning"
+ },
+ "detailedroute__flow__warnings__count:STA-1212": {
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+ "compare": "<=",
+ "level": "warning"
+ },
+ "finish__flow__warnings__count:GUI-0076": {
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+ "compare": "<=",
+ "level": "warning"
+ },
+ "finish__flow__warnings__count:STA-1212": {
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+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:EST-0027": {
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+ "compare": "<=",
+ "level": "warning"
+ },
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+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:RSZ-0075": {
+ "value": 795,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:STA-1212": {
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+ "compare": "<=",
+ "level": "warning"
+ },
+ "flow__warnings__count:STA-1212": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalplace__flow__warnings__count:STA-1212": {
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+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:GRT-0246": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:RSZ-0062": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:STA-1212": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "placeopt__flow__warnings__count:STA-1212": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
"synth__design__instance__area__stdcell": {
"value": 83.24,
"compare": "<="
@@ -8,11 +93,11 @@
"compare": "=="
},
"placeopt__design__instance__area": {
- "value": 95,
+ "value": 110,
"compare": "<="
},
"placeopt__design__instance__count__stdcell": {
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+ "value": 1004,
"compare": "<="
},
"detailedplace__design__violations": {
@@ -27,10 +112,42 @@
"value": 73,
"compare": "<="
},
+ "cts__timing__setup__ws": {
+ "value": -33.8,
+ "compare": ">="
+ },
+ "cts__timing__setup__tns": {
+ "value": -556.0,
+ "compare": ">="
+ },
+ "cts__timing__hold__ws": {
+ "value": -13.5,
+ "compare": ">="
+ },
+ "cts__timing__hold__tns": {
+ "value": -54.0,
+ "compare": ">="
+ },
"globalroute__antenna_diodes_count": {
- "value": 0,
+ "value": 100,
"compare": "<="
},
+ "globalroute__timing__setup__ws": {
+ "value": -42.8,
+ "compare": ">="
+ },
+ "globalroute__timing__setup__tns": {
+ "value": -1170.0,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__ws": {
+ "value": -13.5,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__tns": {
+ "value": -54.0,
+ "compare": ">="
+ },
"detailedroute__route__wirelength": {
"value": 1754,
"compare": "<="
@@ -44,27 +161,43 @@
"compare": "<="
},
"detailedroute__antenna_diodes_count": {
- "value": 5,
+ "value": 100,
"compare": "<="
},
- "finish__timing__setup__ws": {
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+ "detailedroute__timing__setup__ws": {
+ "value": -18.8,
"compare": ">="
},
- "finish__design__instance__area": {
- "value": 103,
- "compare": "<="
+ "detailedroute__timing__setup__tns": {
+ "value": -98.6,
+ "compare": ">="
},
- "finish__timing__drv__setup_violation_count": {
- "value": 74,
- "compare": "<="
+ "detailedroute__timing__hold__ws": {
+ "value": -13.5,
+ "compare": ">="
},
- "finish__timing__drv__hold_violation_count": {
- "value": 100,
- "compare": "<="
+ "detailedroute__timing__hold__tns": {
+ "value": -54.0,
+ "compare": ">="
+ },
+ "finish__timing__setup__ws": {
+ "value": -34.3,
+ "compare": ">="
+ },
+ "finish__timing__setup__tns": {
+ "value": -658.0,
+ "compare": ">="
+ },
+ "finish__timing__hold__ws": {
+ "value": -13.5,
+ "compare": ">="
},
- "finish__timing__wns_percent_delay": {
- "value": -11.75,
+ "finish__timing__hold__tns": {
+ "value": -54.0,
"compare": ">="
+ },
+ "finish__design__instance__area": {
+ "value": 103,
+ "compare": "<="
}
}
\ No newline at end of file
diff --git a/flow/designs/gf12/aes/rules-base.json b/flow/designs/gf12/aes/rules-base.json
index c8cb078207..a70faa0c3e 100644
--- a/flow/designs/gf12/aes/rules-base.json
+++ b/flow/designs/gf12/aes/rules-base.json
@@ -1,4 +1,64 @@
{
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+ "value": 5,
+ "compare": "<=",
+ "level": "warning"
+ },
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+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:IFP-0028": {
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+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:ODB-0254": {
+ "value": 3,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:ODB-0256": {
+ "value": 5,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:ODB-0260": {
+ "value": 2,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "flow__warnings__count:PDN-1031": {
+ "value": 2,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "flow__warnings__count:TAP-0014": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "flow__warnings__count:TAP-0015": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "flow__warnings__count:TAP-0016": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "flow__warnings__count:TAP-0017": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:DRT-0142": {
+ "value": 5,
+ "compare": "<=",
+ "level": "warning"
+ },
"synth__design__instance__area__stdcell": {
"value": 3732.67,
"compare": "<="
@@ -8,7 +68,7 @@
"compare": "=="
},
"placeopt__design__instance__area": {
- "value": 4596,
+ "value": 4194,
"compare": "<="
},
"placeopt__design__instance__count__stdcell": {
@@ -27,10 +87,42 @@
"value": 1418,
"compare": "<="
},
+ "cts__timing__setup__ws": {
+ "value": -21.0,
+ "compare": ">="
+ },
+ "cts__timing__setup__tns": {
+ "value": -84.0,
+ "compare": ">="
+ },
+ "cts__timing__hold__ws": {
+ "value": -21.0,
+ "compare": ">="
+ },
+ "cts__timing__hold__tns": {
+ "value": -84.0,
+ "compare": ">="
+ },
"globalroute__antenna_diodes_count": {
- "value": 0,
+ "value": 100,
"compare": "<="
},
+ "globalroute__timing__setup__ws": {
+ "value": -21.0,
+ "compare": ">="
+ },
+ "globalroute__timing__setup__tns": {
+ "value": -84.0,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__ws": {
+ "value": -21.0,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__tns": {
+ "value": -84.0,
+ "compare": ">="
+ },
"detailedroute__route__wirelength": {
"value": 108230,
"compare": "<="
@@ -44,27 +136,43 @@
"compare": "<="
},
"detailedroute__antenna_diodes_count": {
- "value": 5,
+ "value": 100,
"compare": "<="
},
- "finish__timing__setup__ws": {
- "value": 0.0,
+ "detailedroute__timing__setup__ws": {
+ "value": -21.0,
"compare": ">="
},
- "finish__design__instance__area": {
- "value": 4702,
- "compare": "<="
+ "detailedroute__timing__setup__tns": {
+ "value": -84.0,
+ "compare": ">="
},
- "finish__timing__drv__setup_violation_count": {
- "value": 709,
- "compare": "<="
+ "detailedroute__timing__hold__ws": {
+ "value": -21.0,
+ "compare": ">="
},
- "finish__timing__drv__hold_violation_count": {
- "value": 100,
- "compare": "<="
+ "detailedroute__timing__hold__tns": {
+ "value": -84.0,
+ "compare": ">="
+ },
+ "finish__timing__setup__ws": {
+ "value": -21.0,
+ "compare": ">="
},
- "finish__timing__wns_percent_delay": {
- "value": -10.0,
+ "finish__timing__setup__tns": {
+ "value": -84.0,
"compare": ">="
+ },
+ "finish__timing__hold__ws": {
+ "value": -21.0,
+ "compare": ">="
+ },
+ "finish__timing__hold__tns": {
+ "value": -84.0,
+ "compare": ">="
+ },
+ "finish__design__instance__area": {
+ "value": 4273,
+ "compare": "<="
}
}
\ No newline at end of file
diff --git a/flow/designs/gf12/ariane/rules-base.json b/flow/designs/gf12/ariane/rules-base.json
index 50323e9660..8bb5c35f3d 100644
--- a/flow/designs/gf12/ariane/rules-base.json
+++ b/flow/designs/gf12/ariane/rules-base.json
@@ -1,4 +1,99 @@
{
+ "cts__flow__warnings__count:RSZ-0062": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "detailedroute__flow__warnings__count:DRT-0120": {
+ "value": 23,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "detailedroute__flow__warnings__count:DRT-0142": {
+ "value": 5,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:IFP-0028": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:ODB-0186": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:ODB-0254": {
+ "value": 3,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:ODB-0256": {
+ "value": 5,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:ODB-0260": {
+ "value": 2,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "flow__warnings__count:PDN-1031": {
+ "value": 2,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "flow__warnings__count:TAP-0014": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "flow__warnings__count:TAP-0015": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "flow__warnings__count:TAP-0016": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "flow__warnings__count:TAP-0017": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalplace__flow__warnings__count:GPL-0998": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalplace__flow__warnings__count:GPL-0999": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:DRT-0120": {
+ "value": 23,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:DRT-0142": {
+ "value": 5,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:RSZ-0062": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "placeopt__flow__warnings__count:RSZ-0095": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
"synth__design__instance__area__stdcell": {
"value": 193105.1,
"compare": "<="
@@ -8,7 +103,7 @@
"compare": "=="
},
"placeopt__design__instance__area": {
- "value": 216604,
+ "value": 214773,
"compare": "<="
},
"placeopt__design__instance__count__stdcell": {
@@ -27,16 +122,48 @@
"value": 18840,
"compare": "<="
},
+ "cts__timing__setup__ws": {
+ "value": -208.0,
+ "compare": ">="
+ },
+ "cts__timing__setup__tns": {
+ "value": -715.0,
+ "compare": ">="
+ },
+ "cts__timing__hold__ws": {
+ "value": -150.0,
+ "compare": ">="
+ },
+ "cts__timing__hold__tns": {
+ "value": -600.0,
+ "compare": ">="
+ },
"globalroute__antenna_diodes_count": {
- "value": 0,
+ "value": 180,
"compare": "<="
},
+ "globalroute__timing__setup__ws": {
+ "value": -210.0,
+ "compare": ">="
+ },
+ "globalroute__timing__setup__tns": {
+ "value": -717.0,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__ws": {
+ "value": -150.0,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__tns": {
+ "value": -600.0,
+ "compare": ">="
+ },
"detailedroute__route__wirelength": {
- "value": 4900103,
+ "value": 3507181,
"compare": "<="
},
"detailedroute__route__drc_errors": {
- "value": 0,
+ "value": 2,
"compare": "<="
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"detailedroute__antenna__violating__nets": {
@@ -44,27 +171,43 @@
"compare": "<="
},
"detailedroute__antenna_diodes_count": {
- "value": 5,
+ "value": 180,
"compare": "<="
},
- "finish__timing__setup__ws": {
- "value": -212.42,
+ "detailedroute__timing__setup__ws": {
+ "value": -202.0,
"compare": ">="
},
- "finish__design__instance__area": {
- "value": 218993,
- "compare": "<="
+ "detailedroute__timing__setup__tns": {
+ "value": -701.0,
+ "compare": ">="
},
- "finish__timing__drv__setup_violation_count": {
- "value": 9420,
- "compare": "<="
+ "detailedroute__timing__hold__ws": {
+ "value": -150.0,
+ "compare": ">="
},
- "finish__timing__drv__hold_violation_count": {
- "value": 100,
- "compare": "<="
+ "detailedroute__timing__hold__tns": {
+ "value": -600.0,
+ "compare": ">="
},
- "finish__timing__wns_percent_delay": {
- "value": -14.79,
+ "finish__timing__setup__ws": {
+ "value": -206.0,
"compare": ">="
+ },
+ "finish__timing__setup__tns": {
+ "value": -710.0,
+ "compare": ">="
+ },
+ "finish__timing__hold__ws": {
+ "value": -150.0,
+ "compare": ">="
+ },
+ "finish__timing__hold__tns": {
+ "value": -600.0,
+ "compare": ">="
+ },
+ "finish__design__instance__area": {
+ "value": 217050,
+ "compare": "<="
}
}
\ No newline at end of file
diff --git a/flow/designs/gf12/ariane133/rules-base.json b/flow/designs/gf12/ariane133/rules-base.json
index 2f8ee67d4f..d145cc4420 100644
--- a/flow/designs/gf12/ariane133/rules-base.json
+++ b/flow/designs/gf12/ariane133/rules-base.json
@@ -8,7 +8,7 @@
"compare": "=="
},
"placeopt__design__instance__area": {
- "value": 301238,
+ "value": 288202,
"compare": "<="
},
"placeopt__design__instance__count__stdcell": {
@@ -27,16 +27,48 @@
"value": 14737,
"compare": "<="
},
+ "cts__timing__setup__ws": {
+ "value": -20.2409,
+ "compare": ">="
+ },
+ "cts__timing__setup__tns": {
+ "value": 0.0,
+ "compare": ">="
+ },
+ "cts__timing__hold__ws": {
+ "value": 0.0,
+ "compare": ">="
+ },
+ "cts__timing__hold__tns": {
+ "value": 0.0,
+ "compare": ">="
+ },
"globalroute__antenna_diodes_count": {
"value": 0,
"compare": "<="
},
+ "globalroute__timing__setup__ws": {
+ "value": 0.0,
+ "compare": ">="
+ },
+ "globalroute__timing__setup__tns": {
+ "value": 0.0,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__ws": {
+ "value": 0.0,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__tns": {
+ "value": 0.0,
+ "compare": ">="
+ },
"detailedroute__route__wirelength": {
- "value": 3846017,
+ "value": 3495428,
"compare": "<="
},
"detailedroute__route__drc_errors": {
- "value": 0,
+ "value": 3,
"compare": "<="
},
"detailedroute__antenna__violating__nets": {
@@ -47,20 +79,40 @@
"value": 5,
"compare": "<="
},
+ "detailedroute__timing__setup__ws": {
+ "value": 0.0,
+ "compare": ">="
+ },
+ "detailedroute__timing__setup__tns": {
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+ "compare": ">="
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+ "detailedroute__timing__hold__ws": {
+ "value": 0.0,
+ "compare": ">="
+ },
+ "detailedroute__timing__hold__tns": {
+ "value": 0.0,
+ "compare": ">="
+ },
"finish__timing__setup__ws": {
- "value": -112.74,
+ "value": 0.0,
"compare": ">="
},
- "finish__design__instance__area": {
- "value": 301805,
- "compare": "<="
+ "finish__timing__setup__tns": {
+ "value": 0.0,
+ "compare": ">="
},
- "finish__timing__drv__setup_violation_count": {
- "value": 7369,
- "compare": "<="
+ "finish__timing__hold__ws": {
+ "value": 0.0,
+ "compare": ">="
+ },
+ "finish__timing__hold__tns": {
+ "value": 0.0,
+ "compare": ">="
},
- "finish__timing__drv__hold_violation_count": {
- "value": 100,
+ "finish__design__instance__area": {
+ "value": 290504,
"compare": "<="
},
"finish__timing__wns_percent_delay": {
diff --git a/flow/designs/gf12/bp_dual/rules-base.json b/flow/designs/gf12/bp_dual/rules-base.json
index ff225a0338..ab5e433780 100644
--- a/flow/designs/gf12/bp_dual/rules-base.json
+++ b/flow/designs/gf12/bp_dual/rules-base.json
@@ -1,14 +1,159 @@
{
+ "cts__flow__warnings__count:CTS-0041": {
+ "value": 21,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "cts__flow__warnings__count:RSZ-0062": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "cts__flow__warnings__count:STA-1551": {
+ "value": 40,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "detailedplace__flow__warnings__count:STA-1551": {
+ "value": 40,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "detailedroute__flow__warnings__count:DRT-0120": {
+ "value": 54,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "detailedroute__flow__warnings__count:DRT-0142": {
+ "value": 5,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "detailedroute__flow__warnings__count:STA-1551": {
+ "value": 40,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "finish__flow__warnings__count:STA-1551": {
+ "value": 40,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:EST-0027": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:IFP-0028": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:ODB-0254": {
+ "value": 3,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:ODB-0256": {
+ "value": 5,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:ODB-0260": {
+ "value": 2,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:STA-1551": {
+ "value": 40,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "flow__warnings__count:PDN-0110": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "flow__warnings__count:PDN-0231": {
+ "value": 8,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "flow__warnings__count:PDN-1031": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "flow__warnings__count:STA-1551": {
+ "value": 40,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "flow__warnings__count:TAP-0014": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "flow__warnings__count:TAP-0015": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "flow__warnings__count:TAP-0016": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "flow__warnings__count:TAP-0017": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalplace__flow__warnings__count:STA-1551": {
+ "value": 40,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:DRT-0120": {
+ "value": 54,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:DRT-0142": {
+ "value": 5,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:FLW-0010": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:STA-1551": {
+ "value": 40,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "placeopt__flow__warnings__count:RSZ-0095": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "placeopt__flow__warnings__count:STA-1551": {
+ "value": 40,
+ "compare": "<=",
+ "level": "warning"
+ },
"constraints__clocks__count": {
"value": 8,
"compare": "=="
},
"placeopt__design__instance__area": {
- "value": 838834,
+ "value": 836829,
"compare": "<="
},
"placeopt__design__instance__count__stdcell": {
- "value": 915351,
+ "value": 908653,
"compare": "<="
},
"detailedplace__design__violations": {
@@ -16,23 +161,55 @@
"compare": "=="
},
"cts__design__instance__count__setup_buffer": {
- "value": 79596,
+ "value": 79013,
"compare": "<="
},
"cts__design__instance__count__hold_buffer": {
- "value": 79596,
+ "value": 79013,
"compare": "<="
},
+ "cts__timing__setup__ws": {
+ "value": -193.0,
+ "compare": ">="
+ },
+ "cts__timing__setup__tns": {
+ "value": -4660.0,
+ "compare": ">="
+ },
+ "cts__timing__hold__ws": {
+ "value": 0.0,
+ "compare": ">="
+ },
+ "cts__timing__hold__tns": {
+ "value": 0.0,
+ "compare": ">="
+ },
"globalroute__antenna_diodes_count": {
"value": 0,
"compare": "<="
},
+ "globalroute__timing__setup__ws": {
+ "value": -100.0,
+ "compare": ">="
+ },
+ "globalroute__timing__setup__tns": {
+ "value": -400.0,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__ws": {
+ "value": -2.0547,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__tns": {
+ "value": -2.0547,
+ "compare": ">="
+ },
"detailedroute__route__wirelength": {
- "value": 14134310,
+ "value": 12984371,
"compare": "<="
},
"detailedroute__route__drc_errors": {
- "value": 2,
+ "value": 0,
"compare": "<="
},
"detailedroute__antenna__violating__nets": {
@@ -43,24 +220,40 @@
"value": 5,
"compare": "<="
},
+ "detailedroute__timing__setup__ws": {
+ "value": -307.0,
+ "compare": ">="
+ },
+ "detailedroute__timing__setup__tns": {
+ "value": -2500.0,
+ "compare": ">="
+ },
+ "detailedroute__timing__hold__ws": {
+ "value": -47.5581,
+ "compare": ">="
+ },
+ "detailedroute__timing__hold__tns": {
+ "value": -2850.0,
+ "compare": ">="
+ },
"finish__timing__setup__ws": {
"value": -216.79,
"compare": ">="
},
- "finish__design__instance__area": {
- "value": 852120,
- "compare": "<="
- },
- "finish__timing__drv__setup_violation_count": {
- "value": 39798,
- "compare": "<="
+ "finish__timing__setup__tns": {
+ "value": -1441.656,
+ "compare": ">="
},
- "finish__timing__drv__hold_violation_count": {
- "value": 100,
- "compare": "<="
+ "finish__timing__hold__ws": {
+ "value": -15.0974,
+ "compare": ">="
},
- "finish__timing__wns_percent_delay": {
- "value": -16.84,
+ "finish__timing__hold__tns": {
+ "value": -443.0,
"compare": ">="
+ },
+ "finish__design__instance__area": {
+ "value": 851537,
+ "compare": "<="
}
}
\ No newline at end of file
diff --git a/flow/designs/gf12/bp_single/config.mk b/flow/designs/gf12/bp_single/config.mk
index 53f9f1d165..4748ede574 100644
--- a/flow/designs/gf12/bp_single/config.mk
+++ b/flow/designs/gf12/bp_single/config.mk
@@ -51,10 +51,10 @@ export ABC_CLOCK_PERIOD_IN_PS = 1250
export PLACE_DENSITY = 0.80
export MACRO_WRAPPERS = $(PLATFORM_DIR)/bp/wrappers/wrappers.tcl
-export RTLMP_FENCE_LX = 606.44
-export RTLMP_FENCE_LY = 896.44
-export RTLMP_FENCE_UX = 2449.96
-export RTLMP_FENCE_UY = 2239.96
+export RTLMP_FENCE_LX = 850
+export RTLMP_FENCE_LY = 850
+export RTLMP_FENCE_UX = 2150
+export RTLMP_FENCE_UY = 2150
export MACRO_PLACE_HALO = 28.2 28.2
export PDN_TCL = $(PLATFORM_DIR)/cfg/pdn_grid_strategy_13m_9T.top.tcl
diff --git a/flow/designs/gf12/bp_single/rules-base.json b/flow/designs/gf12/bp_single/rules-base.json
index 39b69c7813..66ac9e811e 100644
--- a/flow/designs/gf12/bp_single/rules-base.json
+++ b/flow/designs/gf12/bp_single/rules-base.json
@@ -1,6 +1,171 @@
{
+ "cts__flow__warnings__count:CTS-0041": {
+ "value": 21,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "cts__flow__warnings__count:RSZ-0062": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "cts__flow__warnings__count:RSZ-0066": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "cts__flow__warnings__count:STA-1551": {
+ "value": 40,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "detailedplace__flow__warnings__count:STA-1551": {
+ "value": 40,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "detailedroute__flow__warnings__count:DRT-0120": {
+ "value": 5,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "detailedroute__flow__warnings__count:DRT-0142": {
+ "value": 5,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "detailedroute__flow__warnings__count:STA-1551": {
+ "value": 40,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "finish__flow__warnings__count:STA-1551": {
+ "value": 40,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:EST-0027": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:IFP-0028": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:ODB-0254": {
+ "value": 3,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:ODB-0256": {
+ "value": 5,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:ODB-0260": {
+ "value": 2,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:RSZ-0062": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:STA-1551": {
+ "value": 40,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "flow__warnings__count:PDN-0110": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "flow__warnings__count:PDN-0231": {
+ "value": 8,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "flow__warnings__count:PDN-1031": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "flow__warnings__count:STA-1551": {
+ "value": 40,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "flow__warnings__count:TAP-0014": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "flow__warnings__count:TAP-0015": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "flow__warnings__count:TAP-0016": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "flow__warnings__count:TAP-0017": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalplace__flow__warnings__count:STA-1551": {
+ "value": 40,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:DRT-0120": {
+ "value": 5,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:DRT-0142": {
+ "value": 5,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:FLW-0010": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:RSZ-0062": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:RSZ-0066": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:STA-1551": {
+ "value": 40,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "placeopt__flow__warnings__count:RSZ-0095": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "placeopt__flow__warnings__count:STA-1551": {
+ "value": 40,
+ "compare": "<=",
+ "level": "warning"
+ },
"synth__design__instance__area__stdcell": {
- "value": 1024521.29,
+ "value": 1020000.0,
"compare": "<="
},
"constraints__clocks__count": {
@@ -8,7 +173,7 @@
"compare": "=="
},
"placeopt__design__instance__area": {
- "value": 491017,
+ "value": 472099,
"compare": "<="
},
"placeopt__design__instance__count__stdcell": {
@@ -27,12 +192,44 @@
"value": 46583,
"compare": "<="
},
+ "cts__timing__setup__ws": {
+ "value": -100.0,
+ "compare": ">="
+ },
+ "cts__timing__setup__tns": {
+ "value": -400.0,
+ "compare": ">="
+ },
+ "cts__timing__hold__ws": {
+ "value": -355.0,
+ "compare": ">="
+ },
+ "cts__timing__hold__tns": {
+ "value": -5460.0,
+ "compare": ">="
+ },
"globalroute__antenna_diodes_count": {
- "value": 0,
+ "value": 333,
"compare": "<="
},
+ "globalroute__timing__setup__ws": {
+ "value": -100.0,
+ "compare": ">="
+ },
+ "globalroute__timing__setup__tns": {
+ "value": -400.0,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__ws": {
+ "value": -117.0,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__tns": {
+ "value": -1880.0,
+ "compare": ">="
+ },
"detailedroute__route__wirelength": {
- "value": 6200511,
+ "value": 6150585,
"compare": "<="
},
"detailedroute__route__drc_errors": {
@@ -44,27 +241,43 @@
"compare": "<="
},
"detailedroute__antenna_diodes_count": {
- "value": 5,
+ "value": 333,
"compare": "<="
},
- "finish__timing__setup__ws": {
- "value": -97.15,
+ "detailedroute__timing__setup__ws": {
+ "value": -237.0,
"compare": ">="
},
- "finish__design__instance__area": {
- "value": 495468,
- "compare": "<="
+ "detailedroute__timing__setup__tns": {
+ "value": -2050.0,
+ "compare": ">="
},
- "finish__timing__drv__setup_violation_count": {
- "value": 23292,
- "compare": "<="
+ "detailedroute__timing__hold__ws": {
+ "value": -120.0,
+ "compare": ">="
},
- "finish__timing__drv__hold_violation_count": {
- "value": 108,
- "compare": "<="
+ "detailedroute__timing__hold__tns": {
+ "value": -7300.0,
+ "compare": ">="
+ },
+ "finish__timing__setup__ws": {
+ "value": -166.0,
+ "compare": ">="
},
- "finish__timing__wns_percent_delay": {
- "value": -10.0,
+ "finish__timing__setup__tns": {
+ "value": -931.0,
"compare": ">="
+ },
+ "finish__timing__hold__ws": {
+ "value": -100.0,
+ "compare": ">="
+ },
+ "finish__timing__hold__tns": {
+ "value": -400.0,
+ "compare": ">="
+ },
+ "finish__design__instance__area": {
+ "value": 480134,
+ "compare": "<="
}
}
\ No newline at end of file
diff --git a/flow/designs/gf12/ca53/config.mk b/flow/designs/gf12/ca53/config.mk
index c867e3c6a5..b788b1fbea 100644
--- a/flow/designs/gf12/ca53/config.mk
+++ b/flow/designs/gf12/ca53/config.mk
@@ -54,6 +54,9 @@ export MACRO_PLACE_HALO = 7 7
export MACRO_WRAPPERS = $(DESIGN_DIR)/wrappers.tcl
+# Temporarily disable NDR for clock nets
+export CTS_ARGS = -sink_clustering_enable -repair_clock_nets -distance_between_buffers 100 -apply_ndr none
+
#export MAX_ROUTING_LAYER = H2
export FASTROUTE_TCL = $(DESIGN_DIR)/fastroute.tcl
#
diff --git a/flow/designs/gf12/ca53/rules-base.json b/flow/designs/gf12/ca53/rules-base.json
index d266e6de9d..5072be0104 100644
--- a/flow/designs/gf12/ca53/rules-base.json
+++ b/flow/designs/gf12/ca53/rules-base.json
@@ -1,10 +1,95 @@
{
+ "detailedroute__flow__warnings__count:DRT-0120": {
+ "value": 65,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "detailedroute__flow__warnings__count:DRT-0142": {
+ "value": 5,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:EST-0027": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:IFP-0028": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:ODB-0186": {
+ "value": 8,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:ODB-0254": {
+ "value": 3,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:ODB-0256": {
+ "value": 5,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:ODB-0260": {
+ "value": 2,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:STA-0345": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "flow__warnings__count:PDN-1031": {
+ "value": 2,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "flow__warnings__count:TAP-0014": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "flow__warnings__count:TAP-0015": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "flow__warnings__count:TAP-0016": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "flow__warnings__count:TAP-0017": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:DRT-0120": {
+ "value": 65,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:DRT-0142": {
+ "value": 5,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "placeopt__flow__warnings__count:RSZ-0020": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
"constraints__clocks__count": {
"value": 1,
"compare": "=="
},
"placeopt__design__instance__area": {
- "value": 416955,
+ "value": 375030,
"compare": "<="
},
"placeopt__design__instance__count__stdcell": {
@@ -23,10 +108,42 @@
"value": 53090,
"compare": "<="
},
+ "cts__timing__setup__ws": {
+ "value": -100.0,
+ "compare": ">="
+ },
+ "cts__timing__setup__tns": {
+ "value": -100.0,
+ "compare": ">="
+ },
+ "cts__timing__hold__ws": {
+ "value": -100.0,
+ "compare": ">="
+ },
+ "cts__timing__hold__tns": {
+ "value": -100.0,
+ "compare": ">="
+ },
"globalroute__antenna_diodes_count": {
- "value": 0,
+ "value": 528,
"compare": "<="
},
+ "globalroute__timing__setup__ws": {
+ "value": -100.0,
+ "compare": ">="
+ },
+ "globalroute__timing__setup__tns": {
+ "value": -100.0,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__ws": {
+ "value": -100.0,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__tns": {
+ "value": -1410.0,
+ "compare": ">="
+ },
"detailedroute__route__wirelength": {
"value": 16935687,
"compare": "<="
@@ -40,27 +157,43 @@
"compare": "<="
},
"detailedroute__antenna_diodes_count": {
- "value": 5,
+ "value": 528,
"compare": "<="
},
- "finish__timing__setup__ws": {
- "value": 0.0,
+ "detailedroute__timing__setup__ws": {
+ "value": -100.0,
"compare": ">="
},
- "finish__design__instance__area": {
- "value": 425943,
- "compare": "<="
+ "detailedroute__timing__setup__tns": {
+ "value": -100.0,
+ "compare": ">="
},
- "finish__timing__drv__setup_violation_count": {
- "value": 26545,
- "compare": "<="
+ "detailedroute__timing__hold__ws": {
+ "value": -241.0,
+ "compare": ">="
},
- "finish__timing__drv__hold_violation_count": {
- "value": 782,
- "compare": "<="
+ "detailedroute__timing__hold__tns": {
+ "value": -102000.0,
+ "compare": ">="
+ },
+ "finish__timing__setup__ws": {
+ "value": -100.0,
+ "compare": ">="
+ },
+ "finish__timing__setup__tns": {
+ "value": -100.0,
+ "compare": ">="
+ },
+ "finish__timing__hold__ws": {
+ "value": -100.0,
+ "compare": ">="
},
- "finish__timing__wns_percent_delay": {
- "value": -10.0,
+ "finish__timing__hold__tns": {
+ "value": -4850.0,
"compare": ">="
+ },
+ "finish__design__instance__area": {
+ "value": 408918,
+ "compare": "<="
}
}
\ No newline at end of file
diff --git a/flow/designs/gf12/coyote/rules-base.json b/flow/designs/gf12/coyote/rules-base.json
index fd5f730fed..823c6631d0 100644
--- a/flow/designs/gf12/coyote/rules-base.json
+++ b/flow/designs/gf12/coyote/rules-base.json
@@ -1,6 +1,76 @@
{
+ "detailedroute__flow__warnings__count:DRT-0142": {
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+ "compare": "<=",
+ "level": "warning"
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+ "floorplan__flow__warnings__count:EST-0027": {
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+ "compare": "<=",
+ "level": "warning"
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+ "compare": "<=",
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+ "compare": "<=",
+ "level": "warning"
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+ "value": 5,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:ODB-0260": {
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+ "compare": "<=",
+ "level": "warning"
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+ "flow__warnings__count:PDN-0110": {
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+ "compare": "<=",
+ "level": "warning"
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+ "flow__warnings__count:PDN-1031": {
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+ "compare": "<=",
+ "level": "warning"
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+ "flow__warnings__count:TAP-0014": {
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+ "compare": "<=",
+ "level": "warning"
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+ "flow__warnings__count:TAP-0015": {
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+ "compare": "<=",
+ "level": "warning"
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+ "compare": "<=",
+ "level": "warning"
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+ "flow__warnings__count:TAP-0017": {
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+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:DRT-0142": {
+ "value": 5,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "placeopt__flow__warnings__count:RSZ-0095": {
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+ "compare": "<=",
+ "level": "warning"
+ },
"synth__design__instance__area__stdcell": {
- "value": 171649.26,
+ "value": 172000.0,
"compare": "<="
},
"constraints__clocks__count": {
@@ -8,7 +78,7 @@
"compare": "=="
},
"placeopt__design__instance__area": {
- "value": 211522,
+ "value": 198400,
"compare": "<="
},
"placeopt__design__instance__count__stdcell": {
@@ -27,10 +97,42 @@
"value": 33027,
"compare": "<="
},
+ "cts__timing__setup__ws": {
+ "value": -207.0,
+ "compare": ">="
+ },
+ "cts__timing__setup__tns": {
+ "value": -807.0,
+ "compare": ">="
+ },
+ "cts__timing__hold__ws": {
+ "value": -200.0,
+ "compare": ">="
+ },
+ "cts__timing__hold__tns": {
+ "value": -800.0,
+ "compare": ">="
+ },
"globalroute__antenna_diodes_count": {
- "value": 0,
+ "value": 336,
"compare": "<="
},
+ "globalroute__timing__setup__ws": {
+ "value": -200.0,
+ "compare": ">="
+ },
+ "globalroute__timing__setup__tns": {
+ "value": -800.0,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__ws": {
+ "value": -200.0,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__tns": {
+ "value": -800.0,
+ "compare": ">="
+ },
"detailedroute__route__wirelength": {
"value": 4257073,
"compare": "<="
@@ -44,27 +146,43 @@
"compare": "<="
},
"detailedroute__antenna_diodes_count": {
- "value": 5,
+ "value": 336,
"compare": "<="
},
- "finish__timing__setup__ws": {
- "value": 0.0,
+ "detailedroute__timing__setup__ws": {
+ "value": -200.0,
"compare": ">="
},
- "finish__design__instance__area": {
- "value": 215687,
- "compare": "<="
+ "detailedroute__timing__setup__tns": {
+ "value": -800.0,
+ "compare": ">="
},
- "finish__timing__drv__setup_violation_count": {
- "value": 16514,
- "compare": "<="
+ "detailedroute__timing__hold__ws": {
+ "value": -239.0,
+ "compare": ">="
},
- "finish__timing__drv__hold_violation_count": {
- "value": 118,
- "compare": "<="
+ "detailedroute__timing__hold__tns": {
+ "value": -10400.0,
+ "compare": ">="
+ },
+ "finish__timing__setup__ws": {
+ "value": -200.0,
+ "compare": ">="
},
- "finish__timing__wns_percent_delay": {
- "value": -10.0,
+ "finish__timing__setup__tns": {
+ "value": -800.0,
"compare": ">="
+ },
+ "finish__timing__hold__ws": {
+ "value": -200.0,
+ "compare": ">="
+ },
+ "finish__timing__hold__tns": {
+ "value": -800.0,
+ "compare": ">="
+ },
+ "finish__design__instance__area": {
+ "value": 202906,
+ "compare": "<="
}
}
\ No newline at end of file
diff --git a/flow/designs/gf12/gcd/rules-base.json b/flow/designs/gf12/gcd/rules-base.json
index 0c42d3626d..73984d3538 100644
--- a/flow/designs/gf12/gcd/rules-base.json
+++ b/flow/designs/gf12/gcd/rules-base.json
@@ -1,6 +1,81 @@
{
+ "cts__flow__warnings__count:RSZ-0062": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "detailedroute__flow__warnings__count:DRT-0142": {
+ "value": 5,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:EST-0027": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:IFP-0028": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:ODB-0254": {
+ "value": 3,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:ODB-0256": {
+ "value": 5,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:ODB-0260": {
+ "value": 2,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:RSZ-0075": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "flow__warnings__count:PDN-1031": {
+ "value": 2,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "flow__warnings__count:TAP-0014": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "flow__warnings__count:TAP-0015": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "flow__warnings__count:TAP-0016": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "flow__warnings__count:TAP-0017": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:DRT-0142": {
+ "value": 5,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:RSZ-0062": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
"synth__design__instance__area__stdcell": {
- "value": 131.15,
+ "value": 134.0,
"compare": "<="
},
"constraints__clocks__count": {
@@ -8,11 +83,11 @@
"compare": "=="
},
"placeopt__design__instance__area": {
- "value": 478,
+ "value": 472,
"compare": "<="
},
"placeopt__design__instance__count__stdcell": {
- "value": 895,
+ "value": 974,
"compare": "<="
},
"detailedplace__design__violations": {
@@ -20,19 +95,51 @@
"compare": "=="
},
"cts__design__instance__count__setup_buffer": {
- "value": 78,
+ "value": 85,
"compare": "<="
},
"cts__design__instance__count__hold_buffer": {
- "value": 78,
+ "value": 85,
"compare": "<="
},
+ "cts__timing__setup__ws": {
+ "value": -36.9,
+ "compare": ">="
+ },
+ "cts__timing__setup__tns": {
+ "value": -313,
+ "compare": ">="
+ },
+ "cts__timing__hold__ws": {
+ "value": -14.0,
+ "compare": ">="
+ },
+ "cts__timing__hold__tns": {
+ "value": -14.0,
+ "compare": ">="
+ },
"globalroute__antenna_diodes_count": {
- "value": 0,
+ "value": 100,
"compare": "<="
},
+ "globalroute__timing__setup__ws": {
+ "value": -47.0,
+ "compare": ">="
+ },
+ "globalroute__timing__setup__tns": {
+ "value": -357,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__ws": {
+ "value": -14.0,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__tns": {
+ "value": -14.0,
+ "compare": ">="
+ },
"detailedroute__route__wirelength": {
- "value": 4455,
+ "value": 4449,
"compare": "<="
},
"detailedroute__route__drc_errors": {
@@ -44,27 +151,43 @@
"compare": "<="
},
"detailedroute__antenna_diodes_count": {
- "value": 5,
+ "value": 100,
"compare": "<="
},
- "finish__timing__setup__ws": {
- "value": -13.26,
+ "detailedroute__timing__setup__ws": {
+ "value": -14.0,
"compare": ">="
},
- "finish__design__instance__area": {
- "value": 500,
- "compare": "<="
+ "detailedroute__timing__setup__tns": {
+ "value": -22.8,
+ "compare": ">="
},
- "finish__timing__drv__setup_violation_count": {
- "value": 39,
- "compare": "<="
+ "detailedroute__timing__hold__ws": {
+ "value": -14.0,
+ "compare": ">="
},
- "finish__timing__drv__hold_violation_count": {
- "value": 100,
- "compare": "<="
+ "detailedroute__timing__hold__tns": {
+ "value": -14.0,
+ "compare": ">="
+ },
+ "finish__timing__setup__ws": {
+ "value": -29.0,
+ "compare": ">="
+ },
+ "finish__timing__setup__tns": {
+ "value": -161,
+ "compare": ">="
+ },
+ "finish__timing__hold__ws": {
+ "value": -14.0,
+ "compare": ">="
},
- "finish__timing__wns_percent_delay": {
- "value": -10.0,
+ "finish__timing__hold__tns": {
+ "value": -14.0,
"compare": ">="
+ },
+ "finish__design__instance__area": {
+ "value": 490,
+ "compare": "<="
}
}
\ No newline at end of file
diff --git a/flow/designs/gf12/ibex/rules-base.json b/flow/designs/gf12/ibex/rules-base.json
index 43a7a8310c..1a32ce6fdf 100644
--- a/flow/designs/gf12/ibex/rules-base.json
+++ b/flow/designs/gf12/ibex/rules-base.json
@@ -1,4 +1,74 @@
{
+ "cts__flow__warnings__count:RSZ-0062": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "detailedroute__flow__warnings__count:DRT-0142": {
+ "value": 5,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:EST-0027": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:IFP-0028": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:ODB-0254": {
+ "value": 3,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:ODB-0256": {
+ "value": 5,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:ODB-0260": {
+ "value": 2,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "flow__warnings__count:PDN-1031": {
+ "value": 2,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "flow__warnings__count:TAP-0014": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "flow__warnings__count:TAP-0015": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "flow__warnings__count:TAP-0016": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "flow__warnings__count:TAP-0017": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:DRT-0142": {
+ "value": 5,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:RSZ-0062": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
"synth__design__instance__area__stdcell": {
"value": 6241.99,
"compare": "<="
@@ -8,11 +78,11 @@
"compare": "=="
},
"placeopt__design__instance__area": {
- "value": 7850,
+ "value": 6874,
"compare": "<="
},
"placeopt__design__instance__count__stdcell": {
- "value": 18055,
+ "value": 17680,
"compare": "<="
},
"detailedplace__design__violations": {
@@ -27,12 +97,44 @@
"value": 1570,
"compare": "<="
},
+ "cts__timing__setup__ws": {
+ "value": -114.0,
+ "compare": ">="
+ },
+ "cts__timing__setup__tns": {
+ "value": -1310.0,
+ "compare": ">="
+ },
+ "cts__timing__hold__ws": {
+ "value": -51.0,
+ "compare": ">="
+ },
+ "cts__timing__hold__tns": {
+ "value": -204.0,
+ "compare": ">="
+ },
"globalroute__antenna_diodes_count": {
- "value": 0,
+ "value": 100,
"compare": "<="
},
+ "globalroute__timing__setup__ws": {
+ "value": -66.4,
+ "compare": ">="
+ },
+ "globalroute__timing__setup__tns": {
+ "value": -271.0,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__ws": {
+ "value": -51.0,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__tns": {
+ "value": -204.0,
+ "compare": ">="
+ },
"detailedroute__route__wirelength": {
- "value": 177926,
+ "value": 161696,
"compare": "<="
},
"detailedroute__route__drc_errors": {
@@ -44,27 +146,43 @@
"compare": "<="
},
"detailedroute__antenna_diodes_count": {
- "value": 5,
+ "value": 100,
"compare": "<="
},
- "finish__timing__setup__ws": {
- "value": 0.0,
+ "detailedroute__timing__setup__ws": {
+ "value": -51.0,
"compare": ">="
},
- "finish__design__instance__area": {
- "value": 8636,
- "compare": "<="
+ "detailedroute__timing__setup__tns": {
+ "value": -204.0,
+ "compare": ">="
},
- "finish__timing__drv__setup_violation_count": {
- "value": 722,
- "compare": "<="
+ "detailedroute__timing__hold__ws": {
+ "value": -51.0,
+ "compare": ">="
},
- "finish__timing__drv__hold_violation_count": {
- "value": 100,
- "compare": "<="
+ "detailedroute__timing__hold__tns": {
+ "value": -204.0,
+ "compare": ">="
+ },
+ "finish__timing__setup__ws": {
+ "value": -51.0,
+ "compare": ">="
+ },
+ "finish__timing__setup__tns": {
+ "value": -204.0,
+ "compare": ">="
+ },
+ "finish__timing__hold__ws": {
+ "value": -51.0,
+ "compare": ">="
},
- "finish__timing__wns_percent_delay": {
- "value": -10.0,
+ "finish__timing__hold__tns": {
+ "value": -204.0,
"compare": ">="
+ },
+ "finish__design__instance__area": {
+ "value": 7960,
+ "compare": "<="
}
}
\ No newline at end of file
diff --git a/flow/designs/gf12/jpeg/rules-base.json b/flow/designs/gf12/jpeg/rules-base.json
index f539f8d6c3..b364b5e73b 100644
--- a/flow/designs/gf12/jpeg/rules-base.json
+++ b/flow/designs/gf12/jpeg/rules-base.json
@@ -1,4 +1,74 @@
{
+ "detailedroute__flow__warnings__count:DRT-0120": {
+ "value": 2,
+ "compare": "<=",
+ "level": "warning"
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+ "detailedroute__flow__warnings__count:DRT-0142": {
+ "value": 5,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:EST-0027": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:IFP-0028": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:ODB-0254": {
+ "value": 3,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:ODB-0256": {
+ "value": 5,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:ODB-0260": {
+ "value": 2,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "flow__warnings__count:PDN-1031": {
+ "value": 2,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "flow__warnings__count:TAP-0014": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "flow__warnings__count:TAP-0015": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "flow__warnings__count:TAP-0016": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "flow__warnings__count:TAP-0017": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:DRT-0120": {
+ "value": 2,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:DRT-0142": {
+ "value": 5,
+ "compare": "<=",
+ "level": "warning"
+ },
"synth__design__instance__area__stdcell": {
"value": 20440.28,
"compare": "<="
@@ -8,7 +78,7 @@
"compare": "=="
},
"placeopt__design__instance__area": {
- "value": 23000,
+ "value": 21478,
"compare": "<="
},
"placeopt__design__instance__count__stdcell": {
@@ -27,12 +97,44 @@
"value": 7563,
"compare": "<="
},
+ "cts__timing__setup__ws": {
+ "value": -38.5,
+ "compare": ">="
+ },
+ "cts__timing__setup__tns": {
+ "value": -154.0,
+ "compare": ">="
+ },
+ "cts__timing__hold__ws": {
+ "value": -38.5,
+ "compare": ">="
+ },
+ "cts__timing__hold__tns": {
+ "value": -154.0,
+ "compare": ">="
+ },
"globalroute__antenna_diodes_count": {
- "value": 0,
+ "value": 100,
"compare": "<="
},
+ "globalroute__timing__setup__ws": {
+ "value": -38.5,
+ "compare": ">="
+ },
+ "globalroute__timing__setup__tns": {
+ "value": -154.0,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__ws": {
+ "value": -38.5,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__tns": {
+ "value": -154.0,
+ "compare": ">="
+ },
"detailedroute__route__wirelength": {
- "value": 427742,
+ "value": 427011,
"compare": "<="
},
"detailedroute__route__drc_errors": {
@@ -44,27 +146,43 @@
"compare": "<="
},
"detailedroute__antenna_diodes_count": {
- "value": 5,
+ "value": 100,
"compare": "<="
},
- "finish__timing__setup__ws": {
- "value": 0.0,
+ "detailedroute__timing__setup__ws": {
+ "value": -38.5,
"compare": ">="
},
- "finish__design__instance__area": {
- "value": 23657,
- "compare": "<="
+ "detailedroute__timing__setup__tns": {
+ "value": -154.0,
+ "compare": ">="
},
- "finish__timing__drv__setup_violation_count": {
- "value": 3782,
- "compare": "<="
+ "detailedroute__timing__hold__ws": {
+ "value": -38.5,
+ "compare": ">="
},
- "finish__timing__drv__hold_violation_count": {
- "value": 100,
- "compare": "<="
+ "detailedroute__timing__hold__tns": {
+ "value": -154.0,
+ "compare": ">="
+ },
+ "finish__timing__setup__ws": {
+ "value": -38.5,
+ "compare": ">="
},
- "finish__timing__wns_percent_delay": {
- "value": -10.0,
+ "finish__timing__setup__tns": {
+ "value": -154.0,
"compare": ">="
+ },
+ "finish__timing__hold__ws": {
+ "value": -38.5,
+ "compare": ">="
+ },
+ "finish__timing__hold__tns": {
+ "value": -154.0,
+ "compare": ">="
+ },
+ "finish__design__instance__area": {
+ "value": 21992,
+ "compare": "<="
}
}
\ No newline at end of file
diff --git a/flow/designs/gf12/swerv_wrapper/rules-base.json b/flow/designs/gf12/swerv_wrapper/rules-base.json
index fe51988a92..dc48ffae02 100644
--- a/flow/designs/gf12/swerv_wrapper/rules-base.json
+++ b/flow/designs/gf12/swerv_wrapper/rules-base.json
@@ -1,4 +1,89 @@
{
+ "cts__flow__warnings__count:CTS-0041": {
+ "value": 5,
+ "compare": "<=",
+ "level": "warning"
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+ "detailedroute__flow__warnings__count:DRT-0120": {
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+ "compare": "<=",
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@@ -8,7 +93,7 @@
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@@ -27,16 +112,48 @@
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@@ -44,27 +161,43 @@
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+ "compare": ">="
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"compare": ">="
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\ No newline at end of file
diff --git a/flow/designs/gf12/tinyRocket/rules-base.json b/flow/designs/gf12/tinyRocket/rules-base.json
index 9b728d2218..ab08c7504d 100644
--- a/flow/designs/gf12/tinyRocket/rules-base.json
+++ b/flow/designs/gf12/tinyRocket/rules-base.json
@@ -1,4 +1,69 @@
{
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@@ -8,7 +73,7 @@
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@@ -27,10 +92,42 @@
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"value": 477442,
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@@ -44,27 +141,43 @@
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"compare": ">="
},
- "finish__design__instance__area": {
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},
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- "value": -10.0,
+ "finish__timing__setup__tns": {
+ "value": -160.0,
"compare": ">="
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\ No newline at end of file
diff --git a/flow/designs/gf180/aes-hybrid/rules-base.json b/flow/designs/gf180/aes-hybrid/rules-base.json
index aac67aa959..f8f13bb56c 100644
--- a/flow/designs/gf180/aes-hybrid/rules-base.json
+++ b/flow/designs/gf180/aes-hybrid/rules-base.json
@@ -1,6 +1,56 @@
{
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+ "level": "warning"
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"synth__design__instance__area__stdcell": {
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+ "value": 489779.41376,
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"constraints__clocks__count": {
@@ -8,11 +58,11 @@
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"detailedplace__design__violations": {
@@ -27,12 +77,44 @@
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+ "compare": ">="
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+ "compare": ">="
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"globalroute__antenna_diodes_count": {
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+ "value": 100,
"compare": "<="
},
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+ "value": -1.29,
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+ "globalroute__timing__hold__tns": {
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+ "compare": ">="
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+ "value": 1503289,
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@@ -44,27 +126,43 @@
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+ "value": 100,
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"compare": ">="
},
- "finish__design__instance__area": {
- "value": 803898,
- "compare": "<="
+ "detailedroute__timing__setup__tns": {
+ "value": -83.5,
+ "compare": ">="
},
- "finish__timing__drv__setup_violation_count": {
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- "value": -36.02,
+ "finish__timing__setup__tns": {
+ "value": -181.0,
"compare": ">="
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+ "finish__timing__hold__ws": {
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\ No newline at end of file
diff --git a/flow/designs/gf180/aes/rules-base.json b/flow/designs/gf180/aes/rules-base.json
index cb39880698..45b5deead7 100644
--- a/flow/designs/gf180/aes/rules-base.json
+++ b/flow/designs/gf180/aes/rules-base.json
@@ -1,6 +1,66 @@
{
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+ "level": "warning"
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+ "floorplan__flow__warnings__count:IFP-0028": {
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+ "compare": "<=",
+ "level": "warning"
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+ "floorplan__flow__warnings__count:RSZ-0062": {
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+ "level": "warning"
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+ "compare": "<=",
+ "level": "warning"
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+ "value": 620000.0,
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"constraints__clocks__count": {
@@ -8,11 +68,11 @@
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"detailedplace__design__violations": {
@@ -27,12 +87,44 @@
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+ "value": 100,
"compare": "<="
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+ "compare": ">="
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@@ -44,27 +136,43 @@
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- "finish__design__instance__area": {
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+ "compare": ">="
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+ "compare": ">="
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"compare": ">="
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\ No newline at end of file
diff --git a/flow/designs/gf180/ibex/rules-base.json b/flow/designs/gf180/ibex/rules-base.json
index 4e8064cea0..41a6f790b3 100644
--- a/flow/designs/gf180/ibex/rules-base.json
+++ b/flow/designs/gf180/ibex/rules-base.json
@@ -1,6 +1,66 @@
{
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+ "placeopt__flow__warnings__count:RSZ-0095": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
"synth__design__instance__area__stdcell": {
- "value": 731295.7,
+ "value": 719000.0,
"compare": "<="
},
"constraints__clocks__count": {
@@ -8,11 +68,11 @@
"compare": "=="
},
"placeopt__design__instance__area": {
- "value": 772631,
+ "value": 756103,
"compare": "<="
},
"placeopt__design__instance__count__stdcell": {
- "value": 16937,
+ "value": 16806,
"compare": "<="
},
"detailedplace__design__violations": {
@@ -20,19 +80,51 @@
"compare": "=="
},
"cts__design__instance__count__setup_buffer": {
- "value": 1473,
+ "value": 1461,
"compare": "<="
},
"cts__design__instance__count__hold_buffer": {
- "value": 1473,
+ "value": 1461,
"compare": "<="
},
+ "cts__timing__setup__ws": {
+ "value": -0.786,
+ "compare": ">="
+ },
+ "cts__timing__setup__tns": {
+ "value": -44.8,
+ "compare": ">="
+ },
+ "cts__timing__hold__ws": {
+ "value": -0.5,
+ "compare": ">="
+ },
+ "cts__timing__hold__tns": {
+ "value": -2.0,
+ "compare": ">="
+ },
"globalroute__antenna_diodes_count": {
- "value": 28,
+ "value": 100,
"compare": "<="
},
+ "globalroute__timing__setup__ws": {
+ "value": -0.893,
+ "compare": ">="
+ },
+ "globalroute__timing__setup__tns": {
+ "value": -93.6,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__ws": {
+ "value": -0.5,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__tns": {
+ "value": -2.0,
+ "compare": ">="
+ },
"detailedroute__route__wirelength": {
- "value": 1544585,
+ "value": 1457917,
"compare": "<="
},
"detailedroute__route__drc_errors": {
@@ -44,27 +136,43 @@
"compare": "<="
},
"detailedroute__antenna_diodes_count": {
- "value": 10,
+ "value": 100,
"compare": "<="
},
- "finish__timing__setup__ws": {
- "value": -0.69,
+ "detailedroute__timing__setup__ws": {
+ "value": -0.5,
"compare": ">="
},
- "finish__design__instance__area": {
- "value": 980281,
- "compare": "<="
+ "detailedroute__timing__setup__tns": {
+ "value": -2.0,
+ "compare": ">="
},
- "finish__timing__drv__setup_violation_count": {
- "value": 736,
- "compare": "<="
+ "detailedroute__timing__hold__ws": {
+ "value": -0.5,
+ "compare": ">="
},
- "finish__timing__drv__hold_violation_count": {
- "value": 100,
- "compare": "<="
+ "detailedroute__timing__hold__tns": {
+ "value": -2.0,
+ "compare": ">="
+ },
+ "finish__timing__setup__ws": {
+ "value": -0.803,
+ "compare": ">="
},
- "finish__timing__wns_percent_delay": {
- "value": -12.79,
+ "finish__timing__setup__tns": {
+ "value": -52.5,
"compare": ">="
+ },
+ "finish__timing__hold__ws": {
+ "value": -0.5,
+ "compare": ">="
+ },
+ "finish__timing__hold__tns": {
+ "value": -2.0,
+ "compare": ">="
+ },
+ "finish__design__instance__area": {
+ "value": 800080,
+ "compare": "<="
}
}
\ No newline at end of file
diff --git a/flow/designs/gf180/jpeg/rules-base.json b/flow/designs/gf180/jpeg/rules-base.json
index b7d2f76d73..2d1ce84cae 100644
--- a/flow/designs/gf180/jpeg/rules-base.json
+++ b/flow/designs/gf180/jpeg/rules-base.json
@@ -1,4 +1,44 @@
{
+ "detailedroute__flow__warnings__count:DRT-0120": {
+ "value": 144,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "detailedroute__flow__warnings__count:DRT-0349": {
+ "value": 8,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "finish__flow__warnings__count:GUI-0076": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:EST-0027": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:IFP-0028": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "flow__warnings__count:TAP-0014": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:DRT-0120": {
+ "value": 48,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:DRT-0349": {
+ "value": 8,
+ "compare": "<=",
+ "level": "warning"
+ },
"synth__design__instance__area__stdcell": {
"value": 2161429.49,
"compare": "<="
@@ -12,7 +52,7 @@
"compare": "<="
},
"placeopt__design__instance__count__stdcell": {
- "value": 53818,
+ "value": 53612,
"compare": "<="
},
"detailedplace__design__violations": {
@@ -20,19 +60,51 @@
"compare": "=="
},
"cts__design__instance__count__setup_buffer": {
- "value": 4680,
+ "value": 4662,
"compare": "<="
},
"cts__design__instance__count__hold_buffer": {
- "value": 4680,
+ "value": 4662,
"compare": "<="
},
+ "cts__timing__setup__ws": {
+ "value": -0.375,
+ "compare": ">="
+ },
+ "cts__timing__setup__tns": {
+ "value": -1.5,
+ "compare": ">="
+ },
+ "cts__timing__hold__ws": {
+ "value": -0.375,
+ "compare": ">="
+ },
+ "cts__timing__hold__tns": {
+ "value": -1.5,
+ "compare": ">="
+ },
"globalroute__antenna_diodes_count": {
- "value": 0,
+ "value": 100,
"compare": "<="
},
+ "globalroute__timing__setup__ws": {
+ "value": -0.375,
+ "compare": ">="
+ },
+ "globalroute__timing__setup__tns": {
+ "value": -1.5,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__ws": {
+ "value": -0.375,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__tns": {
+ "value": -1.5,
+ "compare": ">="
+ },
"detailedroute__route__wirelength": {
- "value": 2911755,
+ "value": 2810762,
"compare": "<="
},
"detailedroute__route__drc_errors": {
@@ -44,27 +116,43 @@
"compare": "<="
},
"detailedroute__antenna_diodes_count": {
- "value": 5,
+ "value": 100,
"compare": "<="
},
- "finish__timing__setup__ws": {
- "value": 0.0,
+ "detailedroute__timing__setup__ws": {
+ "value": -0.375,
"compare": ">="
},
- "finish__design__instance__area": {
- "value": 2509185,
- "compare": "<="
+ "detailedroute__timing__setup__tns": {
+ "value": -1.5,
+ "compare": ">="
},
- "finish__timing__drv__setup_violation_count": {
- "value": 2340,
- "compare": "<="
+ "detailedroute__timing__hold__ws": {
+ "value": -0.375,
+ "compare": ">="
},
- "finish__timing__drv__hold_violation_count": {
- "value": 100,
- "compare": "<="
+ "detailedroute__timing__hold__tns": {
+ "value": -1.5,
+ "compare": ">="
+ },
+ "finish__timing__setup__ws": {
+ "value": -0.375,
+ "compare": ">="
+ },
+ "finish__timing__setup__tns": {
+ "value": -1.5,
+ "compare": ">="
+ },
+ "finish__timing__hold__ws": {
+ "value": -0.375,
+ "compare": ">="
},
- "finish__timing__wns_percent_delay": {
- "value": -10.0,
+ "finish__timing__hold__tns": {
+ "value": -1.5,
"compare": ">="
+ },
+ "finish__design__instance__area": {
+ "value": 2243765,
+ "compare": "<="
}
}
\ No newline at end of file
diff --git a/flow/designs/gf180/riscv32i/rules-base.json b/flow/designs/gf180/riscv32i/rules-base.json
index 8699f031b1..e14cde7ba4 100644
--- a/flow/designs/gf180/riscv32i/rules-base.json
+++ b/flow/designs/gf180/riscv32i/rules-base.json
@@ -1,4 +1,49 @@
{
+ "cts__flow__warnings__count:RSZ-0062": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "detailedroute__flow__warnings__count:DRT-0349": {
+ "value": 8,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "finish__flow__warnings__count:GUI-0076": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:EST-0027": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:IFP-0028": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:RSZ-0075": {
+ "value": 54,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "flow__warnings__count:TAP-0014": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:DRT-0349": {
+ "value": 8,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:RSZ-0062": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
"synth__design__instance__area__stdcell": {
"value": 355874.87,
"compare": "<="
@@ -12,7 +57,7 @@
"compare": "<="
},
"placeopt__design__instance__count__stdcell": {
- "value": 8224,
+ "value": 9602,
"compare": "<="
},
"detailedplace__design__violations": {
@@ -27,12 +72,44 @@
"value": 715,
"compare": "<="
},
+ "cts__timing__setup__ws": {
+ "value": -0.726,
+ "compare": ">="
+ },
+ "cts__timing__setup__tns": {
+ "value": -2.23,
+ "compare": ">="
+ },
+ "cts__timing__hold__ws": {
+ "value": -0.5,
+ "compare": ">="
+ },
+ "cts__timing__hold__tns": {
+ "value": -2.0,
+ "compare": ">="
+ },
"globalroute__antenna_diodes_count": {
- "value": 0,
+ "value": 100,
"compare": "<="
},
+ "globalroute__timing__setup__ws": {
+ "value": -0.795,
+ "compare": ">="
+ },
+ "globalroute__timing__setup__tns": {
+ "value": -2.3,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__ws": {
+ "value": -0.5,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__tns": {
+ "value": -2.0,
+ "compare": ">="
+ },
"detailedroute__route__wirelength": {
- "value": 715180,
+ "value": 817804,
"compare": "<="
},
"detailedroute__route__drc_errors": {
@@ -44,27 +121,43 @@
"compare": "<="
},
"detailedroute__antenna_diodes_count": {
- "value": 5,
+ "value": 100,
"compare": "<="
},
- "finish__timing__setup__ws": {
- "value": -0.58,
+ "detailedroute__timing__setup__ws": {
+ "value": -0.5,
"compare": ">="
},
- "finish__design__instance__area": {
- "value": 461285,
- "compare": "<="
+ "detailedroute__timing__setup__tns": {
+ "value": -2.0,
+ "compare": ">="
},
- "finish__timing__drv__setup_violation_count": {
- "value": 358,
- "compare": "<="
+ "detailedroute__timing__hold__ws": {
+ "value": -0.5,
+ "compare": ">="
},
- "finish__timing__drv__hold_violation_count": {
- "value": 100,
- "compare": "<="
+ "detailedroute__timing__hold__tns": {
+ "value": -2.0,
+ "compare": ">="
},
- "finish__timing__wns_percent_delay": {
- "value": -10.0,
+ "finish__timing__setup__ws": {
+ "value": -0.834,
"compare": ">="
+ },
+ "finish__timing__setup__tns": {
+ "value": -2.38,
+ "compare": ">="
+ },
+ "finish__timing__hold__ws": {
+ "value": -0.5,
+ "compare": ">="
+ },
+ "finish__timing__hold__tns": {
+ "value": -2.0,
+ "compare": ">="
+ },
+ "finish__design__instance__area": {
+ "value": 388398,
+ "compare": "<="
}
}
\ No newline at end of file
diff --git a/flow/designs/gf180/uart-blocks/rules-base.json b/flow/designs/gf180/uart-blocks/rules-base.json
index a8dd165412..73dca907ee 100644
--- a/flow/designs/gf180/uart-blocks/rules-base.json
+++ b/flow/designs/gf180/uart-blocks/rules-base.json
@@ -1,6 +1,36 @@
{
+ "detailedroute__flow__warnings__count:DRT-0349": {
+ "value": 8,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "finish__flow__warnings__count:GUI-0076": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:EST-0027": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:IFP-0028": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "flow__warnings__count:TAP-0014": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:DRT-0349": {
+ "value": 8,
+ "compare": "<=",
+ "level": "warning"
+ },
"synth__design__instance__area__stdcell": {
- "value": 62967.6,
+ "value": 61300.0,
"compare": "<="
},
"constraints__clocks__count": {
@@ -27,12 +57,44 @@
"value": 63,
"compare": "<="
},
+ "cts__timing__setup__ws": {
+ "value": -0.3,
+ "compare": ">="
+ },
+ "cts__timing__setup__tns": {
+ "value": -1.2,
+ "compare": ">="
+ },
+ "cts__timing__hold__ws": {
+ "value": -0.3,
+ "compare": ">="
+ },
+ "cts__timing__hold__tns": {
+ "value": -1.2,
+ "compare": ">="
+ },
"globalroute__antenna_diodes_count": {
- "value": 0,
+ "value": 100,
"compare": "<="
},
+ "globalroute__timing__setup__ws": {
+ "value": -0.3,
+ "compare": ">="
+ },
+ "globalroute__timing__setup__tns": {
+ "value": -1.2,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__ws": {
+ "value": -0.3,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__tns": {
+ "value": -1.2,
+ "compare": ">="
+ },
"detailedroute__route__wirelength": {
- "value": 17661,
+ "value": 17413,
"compare": "<="
},
"detailedroute__route__drc_errors": {
@@ -44,27 +106,43 @@
"compare": "<="
},
"detailedroute__antenna_diodes_count": {
- "value": 5,
+ "value": 100,
"compare": "<="
},
- "finish__timing__setup__ws": {
- "value": 0.0,
+ "detailedroute__timing__setup__ws": {
+ "value": -0.3,
"compare": ">="
},
- "finish__design__instance__area": {
- "value": 70132,
- "compare": "<="
+ "detailedroute__timing__setup__tns": {
+ "value": -1.2,
+ "compare": ">="
},
- "finish__timing__drv__setup_violation_count": {
- "value": 32,
- "compare": "<="
+ "detailedroute__timing__hold__ws": {
+ "value": -0.3,
+ "compare": ">="
},
- "finish__timing__drv__hold_violation_count": {
- "value": 100,
- "compare": "<="
+ "detailedroute__timing__hold__tns": {
+ "value": -1.2,
+ "compare": ">="
+ },
+ "finish__timing__setup__ws": {
+ "value": -0.3,
+ "compare": ">="
+ },
+ "finish__timing__setup__tns": {
+ "value": -1.2,
+ "compare": ">="
},
- "finish__timing__wns_percent_delay": {
- "value": -10.0,
+ "finish__timing__hold__ws": {
+ "value": -0.3,
"compare": ">="
+ },
+ "finish__timing__hold__tns": {
+ "value": -1.2,
+ "compare": ">="
+ },
+ "finish__design__instance__area": {
+ "value": 70132,
+ "compare": "<="
}
}
\ No newline at end of file
diff --git a/flow/designs/ihp-sg13g2/aes/rules-base.json b/flow/designs/ihp-sg13g2/aes/rules-base.json
index 054c97db01..ee69fbc018 100644
--- a/flow/designs/ihp-sg13g2/aes/rules-base.json
+++ b/flow/designs/ihp-sg13g2/aes/rules-base.json
@@ -1,6 +1,31 @@
{
+ "detailedroute__flow__warnings__count:DRT-0349": {
+ "value": 10,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "finish__flow__warnings__count:GUI-0076": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:IFP-0028": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "flow__warnings__count:FIN-0010": {
+ "value": 12,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:DRT-0349": {
+ "value": 10,
+ "compare": "<=",
+ "level": "warning"
+ },
"synth__design__instance__area__stdcell": {
- "value": 218429.67,
+ "value": 217000.0,
"compare": "<="
},
"constraints__clocks__count": {
@@ -8,11 +33,11 @@
"compare": "=="
},
"placeopt__design__instance__area": {
- "value": 203544,
+ "value": 203465,
"compare": "<="
},
"placeopt__design__instance__count__stdcell": {
- "value": 18986,
+ "value": 18984,
"compare": "<="
},
"detailedplace__design__violations": {
@@ -27,10 +52,42 @@
"value": 1128,
"compare": "<="
},
+ "cts__timing__setup__ws": {
+ "value": -0.225,
+ "compare": ">="
+ },
+ "cts__timing__setup__tns": {
+ "value": -0.9,
+ "compare": ">="
+ },
+ "cts__timing__hold__ws": {
+ "value": -0.225,
+ "compare": ">="
+ },
+ "cts__timing__hold__tns": {
+ "value": -0.9,
+ "compare": ">="
+ },
"globalroute__antenna_diodes_count": {
- "value": 14,
+ "value": 100,
"compare": "<="
},
+ "globalroute__timing__setup__ws": {
+ "value": -0.225,
+ "compare": ">="
+ },
+ "globalroute__timing__setup__tns": {
+ "value": -0.9,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__ws": {
+ "value": -0.225,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__tns": {
+ "value": -0.9,
+ "compare": ">="
+ },
"detailedroute__route__wirelength": {
"value": 782983,
"compare": "<="
@@ -40,31 +97,47 @@
"compare": "<="
},
"detailedroute__antenna__violating__nets": {
- "value": 1,
+ "value": 0,
"compare": "<="
},
"detailedroute__antenna_diodes_count": {
- "value": 32,
+ "value": 100,
"compare": "<="
},
- "finish__timing__setup__ws": {
- "value": 0.0,
+ "detailedroute__timing__setup__ws": {
+ "value": -0.225,
"compare": ">="
},
- "finish__design__instance__area": {
- "value": 1061886,
- "compare": "<="
+ "detailedroute__timing__setup__tns": {
+ "value": -0.9,
+ "compare": ">="
},
- "finish__timing__drv__setup_violation_count": {
- "value": 826,
- "compare": "<="
+ "detailedroute__timing__hold__ws": {
+ "value": -0.225,
+ "compare": ">="
},
- "finish__timing__drv__hold_violation_count": {
- "value": 100,
- "compare": "<="
+ "detailedroute__timing__hold__tns": {
+ "value": -0.9,
+ "compare": ">="
+ },
+ "finish__timing__setup__ws": {
+ "value": -0.225,
+ "compare": ">="
+ },
+ "finish__timing__setup__tns": {
+ "value": -0.9,
+ "compare": ">="
},
- "finish__timing__wns_percent_delay": {
- "value": -10.0,
+ "finish__timing__hold__ws": {
+ "value": -0.225,
"compare": ">="
+ },
+ "finish__timing__hold__tns": {
+ "value": -0.9,
+ "compare": ">="
+ },
+ "finish__design__instance__area": {
+ "value": 1054989,
+ "compare": "<="
}
-}
\ No newline at end of file
+}
diff --git a/flow/designs/ihp-sg13g2/gcd/constraint.sdc b/flow/designs/ihp-sg13g2/gcd/constraint.sdc
index 0c1e6d1d5b..c50ffe37b4 100644
--- a/flow/designs/ihp-sg13g2/gcd/constraint.sdc
+++ b/flow/designs/ihp-sg13g2/gcd/constraint.sdc
@@ -2,7 +2,7 @@ current_design gcd
set clk_name core_clock
set clk_port_name clk
-set clk_period 2.6
+set clk_period 2.8
set clk_io_pct 0.2
set clk_port [get_ports $clk_port_name]
diff --git a/flow/designs/ihp-sg13g2/gcd/rules-base.json b/flow/designs/ihp-sg13g2/gcd/rules-base.json
index 02f0d5f27d..03134bc6fe 100644
--- a/flow/designs/ihp-sg13g2/gcd/rules-base.json
+++ b/flow/designs/ihp-sg13g2/gcd/rules-base.json
@@ -1,6 +1,36 @@
{
+ "detailedroute__flow__warnings__count:DRT-0349": {
+ "value": 10,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "finish__flow__warnings__count:GUI-0076": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:EST-0027": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:IFP-0028": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "flow__warnings__count:FIN-0010": {
+ "value": 12,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:DRT-0349": {
+ "value": 10,
+ "compare": "<=",
+ "level": "warning"
+ },
"synth__design__instance__area__stdcell": {
- "value": 5719.01,
+ "value": 6828.9632,
"compare": "<="
},
"constraints__clocks__count": {
@@ -8,11 +38,11 @@
"compare": "=="
},
"placeopt__design__instance__area": {
- "value": 6431,
+ "value": 7382,
"compare": "<="
},
"placeopt__design__instance__count__stdcell": {
- "value": 494,
+ "value": 614,
"compare": "<="
},
"detailedplace__design__violations": {
@@ -27,12 +57,44 @@
"value": 20,
"compare": "<="
},
+ "cts__timing__setup__ws": {
+ "value": -0.13,
+ "compare": ">="
+ },
+ "cts__timing__setup__tns": {
+ "value": -0.52,
+ "compare": ">="
+ },
+ "cts__timing__hold__ws": {
+ "value": -0.13,
+ "compare": ">="
+ },
+ "cts__timing__hold__tns": {
+ "value": -0.52,
+ "compare": ">="
+ },
"globalroute__antenna_diodes_count": {
- "value": 0,
+ "value": 100,
"compare": "<="
},
+ "globalroute__timing__setup__ws": {
+ "value": -0.13,
+ "compare": ">="
+ },
+ "globalroute__timing__setup__tns": {
+ "value": -0.52,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__ws": {
+ "value": -0.13,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__tns": {
+ "value": -0.52,
+ "compare": ">="
+ },
"detailedroute__route__wirelength": {
- "value": 12788,
+ "value": 15132,
"compare": "<="
},
"detailedroute__route__drc_errors": {
@@ -44,27 +106,43 @@
"compare": "<="
},
"detailedroute__antenna_diodes_count": {
- "value": 5,
+ "value": 100,
"compare": "<="
},
- "finish__timing__setup__ws": {
- "value": 0.0,
+ "detailedroute__timing__setup__ws": {
+ "value": -0.13,
"compare": ">="
},
- "finish__design__instance__area": {
- "value": 27303,
- "compare": "<="
+ "detailedroute__timing__setup__tns": {
+ "value": -0.52,
+ "compare": ">="
},
- "finish__timing__drv__setup_violation_count": {
- "value": 10,
- "compare": "<="
+ "detailedroute__timing__hold__ws": {
+ "value": -0.13,
+ "compare": ">="
},
- "finish__timing__drv__hold_violation_count": {
- "value": 10,
- "compare": "<="
+ "detailedroute__timing__hold__tns": {
+ "value": -0.52,
+ "compare": ">="
+ },
+ "finish__timing__setup__ws": {
+ "value": -0.13,
+ "compare": ">="
+ },
+ "finish__timing__setup__tns": {
+ "value": -0.52,
+ "compare": ">="
+ },
+ "finish__timing__hold__ws": {
+ "value": -0.13,
+ "compare": ">="
},
- "finish__timing__wns_percent_delay": {
- "value": -10.0,
+ "finish__timing__hold__tns": {
+ "value": -0.52,
"compare": ">="
+ },
+ "finish__design__instance__area": {
+ "value": 7693,
+ "compare": "<="
}
-}
\ No newline at end of file
+}
diff --git a/flow/designs/ihp-sg13g2/i2c-gpio-expander/I2cDeviceCtrl/config.mk b/flow/designs/ihp-sg13g2/i2c-gpio-expander/I2cDeviceCtrl/config.mk
index 68feb648f2..172eb524b6 100644
--- a/flow/designs/ihp-sg13g2/i2c-gpio-expander/I2cDeviceCtrl/config.mk
+++ b/flow/designs/ihp-sg13g2/i2c-gpio-expander/I2cDeviceCtrl/config.mk
@@ -10,7 +10,7 @@ export SDC_FILE = $(DESIGN_HOME)/$(PLATFORM)/$(TOP_DESIGN_NICKNAME)/${DESIGN_NAM
export DIE_AREA = 0.0 0.0 147.84 147.42
export CORE_AREA = 18.72 18.9 128.64 128.52
-export MAX_ROUTING_LAYER = TopMetal2
+export MAX_ROUTING_LAYER = Metal4
export TNS_END_PERCENT = 100
export PLACE_DENSITY = 0.75
diff --git a/flow/designs/ihp-sg13g2/i2c-gpio-expander/I2cDeviceCtrl/pdn.tcl b/flow/designs/ihp-sg13g2/i2c-gpio-expander/I2cDeviceCtrl/pdn.tcl
index aa6f2f142a..11a54c43c5 100644
--- a/flow/designs/ihp-sg13g2/i2c-gpio-expander/I2cDeviceCtrl/pdn.tcl
+++ b/flow/designs/ihp-sg13g2/i2c-gpio-expander/I2cDeviceCtrl/pdn.tcl
@@ -25,14 +25,14 @@ global_connect
set_voltage_domain -name {CORE} -power {VDD} -ground {VSS}
# stdcell grid
-define_pdn_grid -name {grid} -voltage_domains {CORE}
+define_pdn_grid -name {grid} -voltage_domains {CORE} -pins {Metal4 Metal5}
add_pdn_stripe -grid {grid} -layer {Metal1} -width {0.44} -pitch {7.56} -offset {0} \
- -followpins -extend_to_core_ring
-add_pdn_ring -grid {grid} -layers {Metal3 Metal4} -widths {3.0} -spacings {2.0} \
+ -followpins
+add_pdn_ring -grid {grid} -layers {Metal4 Metal5} -widths {3.0} -spacings {2.0} \
-core_offsets {4.5} -connect_to_pads
-add_pdn_stripe -grid {grid} -layer {Metal3} -width {1.840} -pitch {75.6} -offset {37.8} \
+add_pdn_stripe -grid {grid} -layer {Metal4} -width {1.840} -pitch {75.6} -offset {13.6} \
-extend_to_core_ring
-add_pdn_stripe -grid {grid} -layer {Metal4} -width {1.840} -pitch {75.6} -offset {37.8} \
+add_pdn_stripe -grid {grid} -layer {Metal5} -width {1.840} -pitch {75.6} -offset {13.6} \
-extend_to_core_ring
-add_pdn_connect -grid {grid} -layers {Metal1 Metal3}
-add_pdn_connect -grid {grid} -layers {Metal3 Metal4}
+add_pdn_connect -grid {grid} -layers {Metal1 Metal4}
+add_pdn_connect -grid {grid} -layers {Metal4 Metal5}
diff --git a/flow/designs/ihp-sg13g2/i2c-gpio-expander/config.mk b/flow/designs/ihp-sg13g2/i2c-gpio-expander/config.mk
index f46620b481..4bbe78e459 100644
--- a/flow/designs/ihp-sg13g2/i2c-gpio-expander/config.mk
+++ b/flow/designs/ihp-sg13g2/i2c-gpio-expander/config.mk
@@ -8,14 +8,14 @@ export SDC_FILE = $(DESIGN_HOME)/$(PLATFORM)/$(DESIGN_NICKNAME)/constraint.sdc
export SEAL_GDS = $(DESIGN_HOME)/$(PLATFORM)/$(DESIGN_NICKNAME)/sealring.gds.gz
-export DIE_AREA = 0.0 0.0 1050.0 1050.0
+export DIE_AREA = 0.0 0.0 1050.24 1050.84
export CORE_AREA = 351.36 351.54 699.84 699.3
export MAX_ROUTING_LAYER = TopMetal2
export TNS_END_PERCENT = 100
export PLACE_DENSITY = 0.75
-
+export MACRO_PLACE_HALO = 20 20
export CORNERS = slow fast
export FOOTPRINT_TCL = $(DESIGN_HOME)/$(PLATFORM)/$(DESIGN_NICKNAME)/pad.tcl
diff --git a/flow/designs/ihp-sg13g2/i2c-gpio-expander/constraint.sdc b/flow/designs/ihp-sg13g2/i2c-gpio-expander/constraint.sdc
index b66bcf5e1c..2c765360c8 100644
--- a/flow/designs/ihp-sg13g2/i2c-gpio-expander/constraint.sdc
+++ b/flow/designs/ihp-sg13g2/i2c-gpio-expander/constraint.sdc
@@ -10,6 +10,9 @@ create_clock [get_pins sg13g2_IOPad_io_clock/p2c] -name clk_core -period 20.0 -w
set_clock_uncertainty 0.15 [get_clocks clk_core]
set_clock_transition 0.25 [get_clocks clk_core]
+set input_delay_value_clk_core 4.0
+set output_delay_value_clk_core 4.0
+
set clock_ports [get_ports {
io_clock_PAD
}]
@@ -26,16 +29,16 @@ set clk_core_inout_16mA_ports [get_ports {
io_gpio_7_PAD
}]
set_driving_cell -lib_cell sg13g2_IOPadInOut16mA -pin pad $clk_core_inout_16mA_ports
-set_input_delay 8 -clock clk_core $clk_core_inout_16mA_ports
-set_output_delay 8 -clock clk_core $clk_core_inout_16mA_ports
+set_input_delay $input_delay_value_clk_core -clock clk_core $clk_core_inout_16mA_ports
+set_output_delay $output_delay_value_clk_core -clock clk_core $clk_core_inout_16mA_ports
set clk_core_inout_4mA_ports [get_ports {
io_i2c_scl_PAD
io_i2c_sda_PAD
}]
set_driving_cell -lib_cell sg13g2_IOPadInOut4mA -pin pad $clk_core_inout_4mA_ports
-set_input_delay 8 -clock clk_core $clk_core_inout_4mA_ports
-set_output_delay 8 -clock clk_core $clk_core_inout_4mA_ports
+set_input_delay $input_delay_value_clk_core -clock clk_core $clk_core_inout_4mA_ports
+set_output_delay $output_delay_value_clk_core -clock clk_core $clk_core_inout_4mA_ports
set clk_core_input_ports [get_ports {
io_reset_PAD
@@ -44,13 +47,13 @@ set clk_core_input_ports [get_ports {
io_address_2_PAD
}]
set_driving_cell -lib_cell sg13g2_IOPadIn -pin pad $clk_core_input_ports
-set_input_delay 8 -clock clk_core $clk_core_input_ports
+set_input_delay $input_delay_value_clk_core -clock clk_core $clk_core_input_ports
set clk_core_output_4mA_ports [get_ports {
io_i2c_interrupt_PAD
}]
set_driving_cell -lib_cell sg13g2_IOPadOut4mA -pin pad $clk_core_output_4mA_ports
-set_output_delay 8 -clock clk_core $clk_core_output_4mA_ports
+set_output_delay $output_delay_value_clk_core -clock clk_core $clk_core_output_4mA_ports
set_load -pin_load 5 [all_inputs]
set_load -pin_load 5 [all_outputs]
diff --git a/flow/designs/ihp-sg13g2/i2c-gpio-expander/pdn.tcl b/flow/designs/ihp-sg13g2/i2c-gpio-expander/pdn.tcl
index 6e80d2f55e..e3954dd938 100644
--- a/flow/designs/ihp-sg13g2/i2c-gpio-expander/pdn.tcl
+++ b/flow/designs/ihp-sg13g2/i2c-gpio-expander/pdn.tcl
@@ -25,22 +25,20 @@ global_connect
set_voltage_domain -name {CORE} -power {VDD} -ground {VSS}
# stdcell grid
-define_pdn_grid -name {grid} -voltage_domains {CORE}
+define_pdn_grid -name {grid} -voltage_domains {CORE} -pins {TopMetal1 TopMetal2}
add_pdn_stripe -grid {grid} -layer {Metal1} -width {0.44} -pitch {7.56} -offset {0} \
-followpins -extend_to_core_ring
-add_pdn_ring -grid {grid} -layers {Metal5 TopMetal1} -widths {8.0} -spacings {5.0} \
+add_pdn_ring -grid {grid} -layers {TopMetal1 TopMetal2} -widths {8.0} -spacings {5.0} \
-core_offsets {4.5} -connect_to_pads
-add_pdn_stripe -grid {grid} -layer {Metal5} -width {2.200} -pitch {75.6} -offset {37.8} \
+add_pdn_stripe -grid {grid} -layer {TopMetal1} -width {2.200} -pitch {75.6} -offset {13.6} \
-extend_to_core_ring
-add_pdn_stripe -grid {grid} -layer {TopMetal1} -width {2.200} -pitch {75.6} -offset {37.8} \
+add_pdn_stripe -grid {grid} -layer {TopMetal2} -width {2.200} -pitch {75.6} -offset {13.6} \
-extend_to_core_ring
-add_pdn_connect -grid {grid} -layers {Metal1 Metal5}
-add_pdn_connect -grid {grid} -layers {Metal5 TopMetal1}
-add_pdn_connect -grid {grid} -layers {Metal5 TopMetal2}
+add_pdn_connect -grid {grid} -layers {Metal1 TopMetal1}
add_pdn_connect -grid {grid} -layers {TopMetal1 TopMetal2}
define_pdn_grid \
-name {CORE_macro_grid_1} -voltage_domains {CORE} \
-macro -cells {I2cDeviceCtrl} -grid_over_boundary
-add_pdn_connect -grid {CORE_macro_grid_1} -layers {Metal3 TopMetal1}
add_pdn_connect -grid {CORE_macro_grid_1} -layers {Metal4 TopMetal1}
+add_pdn_connect -grid {CORE_macro_grid_1} -layers {Metal5 TopMetal1}
diff --git a/flow/designs/ihp-sg13g2/i2c-gpio-expander/rules-base.json b/flow/designs/ihp-sg13g2/i2c-gpio-expander/rules-base.json
index e50bea3464..b8120e3c61 100644
--- a/flow/designs/ihp-sg13g2/i2c-gpio-expander/rules-base.json
+++ b/flow/designs/ihp-sg13g2/i2c-gpio-expander/rules-base.json
@@ -1,4 +1,89 @@
{
+ "cts__flow__warnings__count:STA-1140": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "detailedplace__flow__warnings__count:STA-1140": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "detailedroute__flow__warnings__count:DRT-0349": {
+ "value": 10,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "detailedroute__flow__warnings__count:STA-1140": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "finish__flow__warnings__count:GUI-0076": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "finish__flow__warnings__count:STA-1140": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:EST-0027": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:PAD-0033": {
+ "value": 4,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:STA-0347": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:STA-1140": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "flow__warnings__count:PDN-0189": {
+ "value": 2,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "flow__warnings__count:STA-1140": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalplace__flow__warnings__count:STA-1140": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:DRT-0349": {
+ "value": 10,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:STA-1140": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "placeopt__flow__warnings__count:RSZ-0020": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "placeopt__flow__warnings__count:STA-1140": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
"synth__design__instance__area__stdcell": {
"value": 286097.29,
"compare": "<="
@@ -8,11 +93,11 @@
"compare": "=="
},
"placeopt__design__instance__area": {
- "value": 39144,
+ "value": 39063,
"compare": "<="
},
"placeopt__design__instance__count__stdcell": {
- "value": 965,
+ "value": 953,
"compare": "<="
},
"detailedplace__design__violations": {
@@ -20,19 +105,51 @@
"compare": "=="
},
"cts__design__instance__count__setup_buffer": {
- "value": 84,
+ "value": 83,
"compare": "<="
},
"cts__design__instance__count__hold_buffer": {
- "value": 84,
+ "value": 83,
"compare": "<="
},
+ "cts__timing__setup__ws": {
+ "value": -1.0,
+ "compare": ">="
+ },
+ "cts__timing__setup__tns": {
+ "value": -4.0,
+ "compare": ">="
+ },
+ "cts__timing__hold__ws": {
+ "value": -1.0,
+ "compare": ">="
+ },
+ "cts__timing__hold__tns": {
+ "value": -4.0,
+ "compare": ">="
+ },
"globalroute__antenna_diodes_count": {
- "value": 96,
+ "value": 100,
"compare": "<="
},
+ "globalroute__timing__setup__ws": {
+ "value": -1.0,
+ "compare": ">="
+ },
+ "globalroute__timing__setup__tns": {
+ "value": -4.0,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__ws": {
+ "value": -1.0,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__tns": {
+ "value": -4.0,
+ "compare": ">="
+ },
"detailedroute__route__wirelength": {
- "value": 39121,
+ "value": 38502,
"compare": "<="
},
"detailedroute__route__drc_errors": {
@@ -44,27 +161,43 @@
"compare": "<="
},
"detailedroute__antenna_diodes_count": {
- "value": 5,
+ "value": 100,
"compare": "<="
},
- "finish__timing__setup__ws": {
- "value": 0.0,
+ "detailedroute__timing__setup__ws": {
+ "value": -1.0,
"compare": ">="
},
- "finish__design__instance__area": {
- "value": 135675,
- "compare": "<="
+ "detailedroute__timing__setup__tns": {
+ "value": -4.0,
+ "compare": ">="
},
- "finish__timing__drv__setup_violation_count": {
- "value": 42,
- "compare": "<="
+ "detailedroute__timing__hold__ws": {
+ "value": -1.0,
+ "compare": ">="
},
- "finish__timing__drv__hold_violation_count": {
- "value": 100,
- "compare": "<="
+ "detailedroute__timing__hold__tns": {
+ "value": -4.0,
+ "compare": ">="
+ },
+ "finish__timing__setup__ws": {
+ "value": -1.0,
+ "compare": ">="
+ },
+ "finish__timing__setup__tns": {
+ "value": -4.0,
+ "compare": ">="
+ },
+ "finish__timing__hold__ws": {
+ "value": -1.0,
+ "compare": ">="
},
- "finish__timing__wns_percent_delay": {
- "value": -10.0,
+ "finish__timing__hold__tns": {
+ "value": -4.0,
"compare": ">="
+ },
+ "finish__design__instance__area": {
+ "value": 42034,
+ "compare": "<="
}
}
\ No newline at end of file
diff --git a/flow/designs/ihp-sg13g2/ibex/config.mk b/flow/designs/ihp-sg13g2/ibex/config.mk
index 2ec1ac66f8..7663a4ad86 100644
--- a/flow/designs/ihp-sg13g2/ibex/config.mk
+++ b/flow/designs/ihp-sg13g2/ibex/config.mk
@@ -15,7 +15,7 @@ export SDC_FILE = $(DESIGN_HOME)/$(PLATFORM)/$(DESIGN_NICKNAME)/constraint.
# Adders degrade ibex setup repair
export ADDER_MAP_FILE :=
-export CORE_UTILIZATION = 45
+export CORE_UTILIZATION = 35
export PLACE_DENSITY_LB_ADDON = 0.2
export TNS_END_PERCENT = 100
-export CTS_BUF_DISTANCE = 60
\ No newline at end of file
+export CTS_BUF_DISTANCE = 60
diff --git a/flow/designs/ihp-sg13g2/ibex/rules-base.json b/flow/designs/ihp-sg13g2/ibex/rules-base.json
index 7642335451..e0fdfc5027 100644
--- a/flow/designs/ihp-sg13g2/ibex/rules-base.json
+++ b/flow/designs/ihp-sg13g2/ibex/rules-base.json
@@ -8,11 +8,11 @@
"compare": "=="
},
"placeopt__design__instance__area": {
- "value": 302065,
+ "value": 299930,
"compare": "<="
},
"placeopt__design__instance__count__stdcell": {
- "value": 20753,
+ "value": 20731,
"compare": "<="
},
"detailedplace__design__violations": {
@@ -27,12 +27,44 @@
"value": 931,
"compare": "<="
},
+ "cts__timing__setup__ws": {
+ "value": -0.5,
+ "compare": ">="
+ },
+ "cts__timing__setup__tns": {
+ "value": -2.0,
+ "compare": ">="
+ },
+ "cts__timing__hold__ws": {
+ "value": -0.5,
+ "compare": ">="
+ },
+ "cts__timing__hold__tns": {
+ "value": -2.0,
+ "compare": ">="
+ },
"globalroute__antenna_diodes_count": {
- "value": 0,
+ "value": 100,
"compare": "<="
},
+ "globalroute__timing__setup__ws": {
+ "value": -0.5,
+ "compare": ">="
+ },
+ "globalroute__timing__setup__tns": {
+ "value": -2.0,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__ws": {
+ "value": -0.5,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__tns": {
+ "value": -2.0,
+ "compare": ">="
+ },
"detailedroute__route__wirelength": {
- "value": 1027854,
+ "value": 989089,
"compare": "<="
},
"detailedroute__route__drc_errors": {
@@ -44,27 +76,43 @@
"compare": "<="
},
"detailedroute__antenna_diodes_count": {
- "value": 36,
+ "value": 100,
"compare": "<="
},
- "finish__timing__setup__ws": {
- "value": -0.17,
+ "detailedroute__timing__setup__ws": {
+ "value": -0.5,
"compare": ">="
},
- "finish__design__instance__area": {
- "value": 645302,
- "compare": "<="
+ "detailedroute__timing__setup__tns": {
+ "value": -2.0,
+ "compare": ">="
},
- "finish__timing__drv__setup_violation_count": {
- "value": 902,
- "compare": "<="
+ "detailedroute__timing__hold__ws": {
+ "value": -0.5,
+ "compare": ">="
},
- "finish__timing__drv__hold_violation_count": {
- "value": 10,
- "compare": "<="
+ "detailedroute__timing__hold__tns": {
+ "value": -2.0,
+ "compare": ">="
},
- "finish__timing__wns_percent_delay": {
- "value": -10.0,
+ "finish__timing__setup__ws": {
+ "value": -0.5,
"compare": ">="
+ },
+ "finish__timing__setup__tns": {
+ "value": -2.0,
+ "compare": ">="
+ },
+ "finish__timing__hold__ws": {
+ "value": -0.5,
+ "compare": ">="
+ },
+ "finish__timing__hold__tns": {
+ "value": -2.0,
+ "compare": ">="
+ },
+ "finish__design__instance__area": {
+ "value": 314511,
+ "compare": "<="
}
}
\ No newline at end of file
diff --git a/flow/designs/ihp-sg13g2/jpeg/rules-base.json b/flow/designs/ihp-sg13g2/jpeg/rules-base.json
index c7e00a7e96..5eca92e9cc 100644
--- a/flow/designs/ihp-sg13g2/jpeg/rules-base.json
+++ b/flow/designs/ihp-sg13g2/jpeg/rules-base.json
@@ -27,10 +27,42 @@
"value": 2903,
"compare": "<="
},
+ "cts__timing__setup__ws": {
+ "value": 0.0,
+ "compare": ">="
+ },
+ "cts__timing__setup__tns": {
+ "value": -1.6,
+ "compare": ">="
+ },
+ "cts__timing__hold__ws": {
+ "value": -0.4,
+ "compare": ">="
+ },
+ "cts__timing__hold__tns": {
+ "value": -1.6,
+ "compare": ">="
+ },
"globalroute__antenna_diodes_count": {
- "value": 20,
+ "value": 100,
"compare": "<="
},
+ "globalroute__timing__setup__ws": {
+ "value": -0.0182,
+ "compare": ">="
+ },
+ "globalroute__timing__setup__tns": {
+ "value": -1.6,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__ws": {
+ "value": -0.4,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__tns": {
+ "value": -1.6,
+ "compare": ">="
+ },
"detailedroute__route__wirelength": {
"value": 3140459,
"compare": "<="
@@ -40,31 +72,47 @@
"compare": "<="
},
"detailedroute__antenna__violating__nets": {
- "value": 1,
+ "value": 0,
"compare": "<="
},
"detailedroute__antenna_diodes_count": {
- "value": 222,
+ "value": 132,
"compare": "<="
},
- "finish__timing__setup__ws": {
- "value": 0.0,
+ "detailedroute__timing__setup__ws": {
+ "value": -0.4,
"compare": ">="
},
- "finish__design__instance__area": {
- "value": 2605152,
- "compare": "<="
+ "detailedroute__timing__setup__tns": {
+ "value": -1.6,
+ "compare": ">="
},
- "finish__timing__drv__setup_violation_count": {
- "value": 3758,
- "compare": "<="
+ "detailedroute__timing__hold__ws": {
+ "value": -0.4,
+ "compare": ">="
},
- "finish__timing__drv__hold_violation_count": {
- "value": 10,
- "compare": "<="
+ "detailedroute__timing__hold__tns": {
+ "value": -1.6,
+ "compare": ">="
},
- "finish__timing__wns_percent_delay": {
- "value": -10.0,
+ "finish__timing__setup__ws": {
+ "value": -0.4,
"compare": ">="
+ },
+ "finish__timing__setup__tns": {
+ "value": -1.6,
+ "compare": ">="
+ },
+ "finish__timing__hold__ws": {
+ "value": -0.4,
+ "compare": ">="
+ },
+ "finish__timing__hold__tns": {
+ "value": -1.6,
+ "compare": ">="
+ },
+ "finish__design__instance__area": {
+ "value": 1059270,
+ "compare": "<="
}
}
\ No newline at end of file
diff --git a/flow/designs/ihp-sg13g2/riscv32i/config.mk b/flow/designs/ihp-sg13g2/riscv32i/config.mk
index 43bbc9f064..be6c25a640 100644
--- a/flow/designs/ihp-sg13g2/riscv32i/config.mk
+++ b/flow/designs/ihp-sg13g2/riscv32i/config.mk
@@ -5,7 +5,7 @@ export PLATFORM = ihp-sg13g2
export VERILOG_FILES = $(sort $(wildcard $(DESIGN_HOME)/src/$(DESIGN_NICKNAME)/*.v))
export SDC_FILE = $(DESIGN_HOME)/$(PLATFORM)/$(DESIGN_NICKNAME)/constraint.sdc
-export USE_FILL 1
+export USE_FILL = 1
export CORE_UTILIZATION = 35
export PLACE_DENSITY_LB_ADDON = 0.2
diff --git a/flow/designs/ihp-sg13g2/riscv32i/rules-base.json b/flow/designs/ihp-sg13g2/riscv32i/rules-base.json
index bab968de6a..0e911b7b11 100644
--- a/flow/designs/ihp-sg13g2/riscv32i/rules-base.json
+++ b/flow/designs/ihp-sg13g2/riscv32i/rules-base.json
@@ -8,7 +8,7 @@
"compare": "=="
},
"placeopt__design__instance__area": {
- "value": 159244,
+ "value": 156945,
"compare": "<="
},
"placeopt__design__instance__count__stdcell": {
@@ -27,12 +27,44 @@
"value": 504,
"compare": "<="
},
+ "cts__timing__setup__ws": {
+ "value": -0.0277,
+ "compare": ">="
+ },
+ "cts__timing__setup__tns": {
+ "value": -1.2,
+ "compare": ">="
+ },
+ "cts__timing__hold__ws": {
+ "value": -0.3,
+ "compare": ">="
+ },
+ "cts__timing__hold__tns": {
+ "value": -1.2,
+ "compare": ">="
+ },
"globalroute__antenna_diodes_count": {
- "value": 0,
+ "value": 100,
"compare": "<="
},
+ "globalroute__timing__setup__ws": {
+ "value": -0.1853,
+ "compare": ">="
+ },
+ "globalroute__timing__setup__tns": {
+ "value": 0.0,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__ws": {
+ "value": -0.3,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__tns": {
+ "value": -1.2,
+ "compare": ">="
+ },
"detailedroute__route__wirelength": {
- "value": 511850,
+ "value": 506565,
"compare": "<="
},
"detailedroute__route__drc_errors": {
@@ -44,27 +76,43 @@
"compare": "<="
},
"detailedroute__antenna_diodes_count": {
- "value": 9,
+ "value": 100,
"compare": "<="
},
- "finish__timing__setup__ws": {
- "value": 0.0,
+ "detailedroute__timing__setup__ws": {
+ "value": -0.3,
"compare": ">="
},
- "finish__design__instance__area": {
- "value": 411968,
- "compare": "<="
+ "detailedroute__timing__setup__tns": {
+ "value": -1.2,
+ "compare": ">="
},
- "finish__timing__drv__setup_violation_count": {
- "value": 478,
- "compare": "<="
+ "detailedroute__timing__hold__ws": {
+ "value": -0.3,
+ "compare": ">="
},
- "finish__timing__drv__hold_violation_count": {
- "value": 10,
- "compare": "<="
+ "detailedroute__timing__hold__tns": {
+ "value": -1.2,
+ "compare": ">="
+ },
+ "finish__timing__setup__ws": {
+ "value": -0.3,
+ "compare": ">="
},
- "finish__timing__wns_percent_delay": {
- "value": -10.0,
+ "finish__timing__setup__tns": {
+ "value": -1.2,
"compare": ">="
+ },
+ "finish__timing__hold__ws": {
+ "value": -0.3,
+ "compare": ">="
+ },
+ "finish__timing__hold__tns": {
+ "value": -1.2,
+ "compare": ">="
+ },
+ "finish__design__instance__area": {
+ "value": 168818,
+ "compare": "<="
}
}
\ No newline at end of file
diff --git a/flow/designs/ihp-sg13g2/spi/constraint.sdc b/flow/designs/ihp-sg13g2/spi/constraint.sdc
index 956369e4b8..81917df7ed 100644
--- a/flow/designs/ihp-sg13g2/spi/constraint.sdc
+++ b/flow/designs/ihp-sg13g2/spi/constraint.sdc
@@ -2,7 +2,7 @@ current_design spi
set clk_name core_clock
set clk_port_name clk
-set clk_period 0.9
+set clk_period 1.0
set clk_io_pct 0.2
set clk_port [get_ports $clk_port_name]
diff --git a/flow/designs/ihp-sg13g2/spi/rules-base.json b/flow/designs/ihp-sg13g2/spi/rules-base.json
index 7f98fb327d..9f5cac13a7 100644
--- a/flow/designs/ihp-sg13g2/spi/rules-base.json
+++ b/flow/designs/ihp-sg13g2/spi/rules-base.json
@@ -1,6 +1,51 @@
{
+ "detailedroute__flow__warnings__count:DRT-0349": {
+ "value": 10,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "finish__flow__warnings__count:GUI-0076": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:EST-0027": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:IFP-0028": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:RSZ-0062": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:RSZ-0075": {
+ "value": 25,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "flow__warnings__count:FIN-0010": {
+ "value": 12,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:DRT-0349": {
+ "value": 10,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:RSZ-0062": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
"synth__design__instance__area__stdcell": {
- "value": 2244.75,
+ "value": 2232.28,
"compare": "<="
},
"constraints__clocks__count": {
@@ -8,11 +53,11 @@
"compare": "=="
},
"placeopt__design__instance__area": {
- "value": 2422,
+ "value": 2662,
"compare": "<="
},
"placeopt__design__instance__count__stdcell": {
- "value": 181,
+ "value": 179,
"compare": "<="
},
"detailedplace__design__violations": {
@@ -27,12 +72,44 @@
"value": 13,
"compare": "<="
},
+ "cts__timing__setup__ws": {
+ "value": 0.0,
+ "compare": ">="
+ },
+ "cts__timing__setup__tns": {
+ "value": -0.18,
+ "compare": ">="
+ },
+ "cts__timing__hold__ws": {
+ "value": -0.045,
+ "compare": ">="
+ },
+ "cts__timing__hold__tns": {
+ "value": -0.18,
+ "compare": ">="
+ },
"globalroute__antenna_diodes_count": {
- "value": 0,
+ "value": 100,
"compare": "<="
},
+ "globalroute__timing__setup__ws": {
+ "value": -0.0426,
+ "compare": ">="
+ },
+ "globalroute__timing__setup__tns": {
+ "value": 0.0,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__ws": {
+ "value": -0.045,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__tns": {
+ "value": -0.18,
+ "compare": ">="
+ },
"detailedroute__route__wirelength": {
- "value": 3721,
+ "value": 3686,
"compare": "<="
},
"detailedroute__route__drc_errors": {
@@ -44,27 +121,43 @@
"compare": "<="
},
"detailedroute__antenna_diodes_count": {
- "value": 5,
+ "value": 100,
"compare": "<="
},
- "finish__timing__setup__ws": {
- "value": -0.09,
+ "detailedroute__timing__setup__ws": {
+ "value": -0.045,
"compare": ">="
},
- "finish__design__instance__area": {
- "value": 10376,
- "compare": "<="
+ "detailedroute__timing__setup__tns": {
+ "value": -0.18,
+ "compare": ">="
},
- "finish__timing__drv__setup_violation_count": {
- "value": 9,
- "compare": "<="
+ "detailedroute__timing__hold__ws": {
+ "value": -0.045,
+ "compare": ">="
},
- "finish__timing__drv__hold_violation_count": {
- "value": 10,
- "compare": "<="
+ "detailedroute__timing__hold__tns": {
+ "value": -0.18,
+ "compare": ">="
},
- "finish__timing__wns_percent_delay": {
- "value": -13.57,
+ "finish__timing__setup__ws": {
+ "value": -0.045,
"compare": ">="
+ },
+ "finish__timing__setup__tns": {
+ "value": -0.18,
+ "compare": ">="
+ },
+ "finish__timing__hold__ws": {
+ "value": -0.045,
+ "compare": ">="
+ },
+ "finish__timing__hold__tns": {
+ "value": -0.18,
+ "compare": ">="
+ },
+ "finish__design__instance__area": {
+ "value": 2767,
+ "compare": "<="
}
-}
\ No newline at end of file
+}
diff --git a/flow/designs/nangate45/aes/rules-base.json b/flow/designs/nangate45/aes/rules-base.json
index 46beeaa84a..db6b3d1039 100644
--- a/flow/designs/nangate45/aes/rules-base.json
+++ b/flow/designs/nangate45/aes/rules-base.json
@@ -1,6 +1,41 @@
{
+ "detailedroute__flow__warnings__count:GRT-0246": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "finish__flow__warnings__count:GUI-0076": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:EST-0027": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:RSZ-0062": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:RSZ-0075": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "flow__warnings__count:PDN-1041": {
+ "value": 270,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:GRT-0246": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
"synth__design__instance__area__stdcell": {
- "value": 23502.91,
+ "value": 23300.0,
"compare": "<="
},
"constraints__clocks__count": {
@@ -8,7 +43,7 @@
"compare": "=="
},
"placeopt__design__instance__area": {
- "value": 26265,
+ "value": 26064,
"compare": "<="
},
"placeopt__design__instance__count__stdcell": {
@@ -27,12 +62,44 @@
"value": 1586,
"compare": "<="
},
+ "cts__timing__setup__ws": {
+ "value": -0.041,
+ "compare": ">="
+ },
+ "cts__timing__setup__tns": {
+ "value": -0.164,
+ "compare": ">="
+ },
+ "cts__timing__hold__ws": {
+ "value": -0.041,
+ "compare": ">="
+ },
+ "cts__timing__hold__tns": {
+ "value": -0.164,
+ "compare": ">="
+ },
"globalroute__antenna_diodes_count": {
- "value": 0,
+ "value": 100,
"compare": "<="
},
+ "globalroute__timing__setup__ws": {
+ "value": -0.0685,
+ "compare": ">="
+ },
+ "globalroute__timing__setup__tns": {
+ "value": -0.799,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__ws": {
+ "value": -0.0441,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__tns": {
+ "value": -0.171,
+ "compare": ">="
+ },
"detailedroute__route__wirelength": {
- "value": 291564,
+ "value": 288398,
"compare": "<="
},
"detailedroute__route__drc_errors": {
@@ -44,27 +111,43 @@
"compare": "<="
},
"detailedroute__antenna_diodes_count": {
- "value": 5,
+ "value": 100,
"compare": "<="
},
- "finish__timing__setup__ws": {
- "value": -0.06,
+ "detailedroute__timing__setup__ws": {
+ "value": -0.041,
"compare": ">="
},
- "finish__design__instance__area": {
- "value": 26699,
- "compare": "<="
+ "detailedroute__timing__setup__tns": {
+ "value": -0.164,
+ "compare": ">="
},
- "finish__timing__drv__setup_violation_count": {
- "value": 793,
- "compare": "<="
+ "detailedroute__timing__hold__ws": {
+ "value": -0.041,
+ "compare": ">="
},
- "finish__timing__drv__hold_violation_count": {
- "value": 100,
- "compare": "<="
+ "detailedroute__timing__hold__tns": {
+ "value": -0.164,
+ "compare": ">="
+ },
+ "finish__timing__setup__ws": {
+ "value": -0.071,
+ "compare": ">="
+ },
+ "finish__timing__setup__tns": {
+ "value": -1.08,
+ "compare": ">="
+ },
+ "finish__timing__hold__ws": {
+ "value": -0.041,
+ "compare": ">="
},
- "finish__timing__wns_percent_delay": {
- "value": -13.22,
+ "finish__timing__hold__tns": {
+ "value": -0.164,
"compare": ">="
+ },
+ "finish__design__instance__area": {
+ "value": 26342,
+ "compare": "<="
}
}
\ No newline at end of file
diff --git a/flow/designs/nangate45/ariane133/rules-base.json b/flow/designs/nangate45/ariane133/rules-base.json
index 3c7adc3c54..dad310eeb7 100644
--- a/flow/designs/nangate45/ariane133/rules-base.json
+++ b/flow/designs/nangate45/ariane133/rules-base.json
@@ -1,4 +1,39 @@
{
+ "detailedroute__flow__warnings__count:DRT-0120": {
+ "value": 11,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "detailedroute__flow__warnings__count:GRT-0246": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "finish__flow__warnings__count:GUI-0076": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:EST-0027": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:IFP-0028": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:DRT-0120": {
+ "value": 11,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:GRT-0246": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
"synth__design__instance__area__stdcell": {
"value": 825864.85,
"compare": "<="
@@ -27,12 +62,44 @@
"value": 16670,
"compare": "<="
},
+ "cts__timing__setup__ws": {
+ "value": -0.2,
+ "compare": ">="
+ },
+ "cts__timing__setup__tns": {
+ "value": -0.8,
+ "compare": ">="
+ },
+ "cts__timing__hold__ws": {
+ "value": -0.2,
+ "compare": ">="
+ },
+ "cts__timing__hold__tns": {
+ "value": -0.8,
+ "compare": ">="
+ },
"globalroute__antenna_diodes_count": {
- "value": 0,
+ "value": 194,
"compare": "<="
},
+ "globalroute__timing__setup__ws": {
+ "value": -0.2,
+ "compare": ">="
+ },
+ "globalroute__timing__setup__tns": {
+ "value": -0.8,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__ws": {
+ "value": -0.2,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__tns": {
+ "value": -0.8,
+ "compare": ">="
+ },
"detailedroute__route__wirelength": {
- "value": 7238896,
+ "value": 7160156,
"compare": "<="
},
"detailedroute__route__drc_errors": {
@@ -44,27 +111,43 @@
"compare": "<="
},
"detailedroute__antenna_diodes_count": {
- "value": 5,
+ "value": 194,
"compare": "<="
},
- "finish__timing__setup__ws": {
- "value": -0.22,
+ "detailedroute__timing__setup__ws": {
+ "value": -0.2,
"compare": ">="
},
- "finish__design__instance__area": {
- "value": 843034,
- "compare": "<="
+ "detailedroute__timing__setup__tns": {
+ "value": -0.8,
+ "compare": ">="
},
- "finish__timing__drv__setup_violation_count": {
- "value": 8335,
- "compare": "<="
+ "detailedroute__timing__hold__ws": {
+ "value": -0.2,
+ "compare": ">="
},
- "finish__timing__drv__hold_violation_count": {
- "value": 100,
- "compare": "<="
+ "detailedroute__timing__hold__tns": {
+ "value": -0.8,
+ "compare": ">="
+ },
+ "finish__timing__setup__ws": {
+ "value": -0.264,
+ "compare": ">="
+ },
+ "finish__timing__setup__tns": {
+ "value": -88.9,
+ "compare": ">="
},
- "finish__timing__wns_percent_delay": {
- "value": -10.68,
+ "finish__timing__hold__ws": {
+ "value": -0.2,
"compare": ">="
+ },
+ "finish__timing__hold__tns": {
+ "value": -0.8,
+ "compare": ">="
+ },
+ "finish__design__instance__area": {
+ "value": 840911,
+ "compare": "<="
}
}
\ No newline at end of file
diff --git a/flow/designs/nangate45/ariane136/rules-base.json b/flow/designs/nangate45/ariane136/rules-base.json
index 2c7d5111cb..1ea2f44672 100644
--- a/flow/designs/nangate45/ariane136/rules-base.json
+++ b/flow/designs/nangate45/ariane136/rules-base.json
@@ -1,4 +1,49 @@
{
+ "cts__flow__warnings__count:RSZ-0066": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "detailedroute__flow__warnings__count:DRT-0120": {
+ "value": 3,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "detailedroute__flow__warnings__count:GRT-0246": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "finish__flow__warnings__count:GUI-0076": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:EST-0027": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:IFP-0028": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:STA-0441": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:DRT-0120": {
+ "value": 3,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:GRT-0246": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
"synth__design__instance__area__stdcell": {
"value": 845982.06,
"compare": "<="
@@ -8,7 +53,7 @@
"compare": "=="
},
"placeopt__design__instance__area": {
- "value": 854306,
+ "value": 853182,
"compare": "<="
},
"placeopt__design__instance__count__stdcell": {
@@ -27,12 +72,44 @@
"value": 17130,
"compare": "<="
},
+ "cts__timing__setup__ws": {
+ "value": -0.3,
+ "compare": ">="
+ },
+ "cts__timing__setup__tns": {
+ "value": -1.2,
+ "compare": ">="
+ },
+ "cts__timing__hold__ws": {
+ "value": -0.747,
+ "compare": ">="
+ },
+ "cts__timing__hold__tns": {
+ "value": -5.49,
+ "compare": ">="
+ },
"globalroute__antenna_diodes_count": {
- "value": 0,
+ "value": 202,
"compare": "<="
},
+ "globalroute__timing__setup__ws": {
+ "value": -0.3,
+ "compare": ">="
+ },
+ "globalroute__timing__setup__tns": {
+ "value": -1.2,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__ws": {
+ "value": -0.3,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__tns": {
+ "value": -1.2,
+ "compare": ">="
+ },
"detailedroute__route__wirelength": {
- "value": 7612186,
+ "value": 7658811,
"compare": "<="
},
"detailedroute__route__drc_errors": {
@@ -44,27 +121,43 @@
"compare": "<="
},
"detailedroute__antenna_diodes_count": {
- "value": 5,
+ "value": 202,
"compare": "<="
},
- "finish__timing__setup__ws": {
- "value": 0.0,
+ "detailedroute__timing__setup__ws": {
+ "value": -0.3,
"compare": ">="
},
- "finish__design__instance__area": {
- "value": 867354,
- "compare": "<="
+ "detailedroute__timing__setup__tns": {
+ "value": -1.2,
+ "compare": ">="
},
- "finish__timing__drv__setup_violation_count": {
- "value": 8565,
- "compare": "<="
+ "detailedroute__timing__hold__ws": {
+ "value": -0.326,
+ "compare": ">="
},
- "finish__timing__drv__hold_violation_count": {
- "value": 124,
- "compare": "<="
+ "detailedroute__timing__hold__tns": {
+ "value": -1.49,
+ "compare": ">="
+ },
+ "finish__timing__setup__ws": {
+ "value": -0.3,
+ "compare": ">="
+ },
+ "finish__timing__setup__tns": {
+ "value": -1.2,
+ "compare": ">="
+ },
+ "finish__timing__hold__ws": {
+ "value": -0.3,
+ "compare": ">="
},
- "finish__timing__wns_percent_delay": {
- "value": -10.0,
+ "finish__timing__hold__tns": {
+ "value": -1.2,
"compare": ">="
+ },
+ "finish__design__instance__area": {
+ "value": 864432,
+ "compare": "<="
}
}
\ No newline at end of file
diff --git a/flow/designs/nangate45/black_parrot/config.mk b/flow/designs/nangate45/black_parrot/config.mk
index bdf35d8289..771ea51da1 100644
--- a/flow/designs/nangate45/black_parrot/config.mk
+++ b/flow/designs/nangate45/black_parrot/config.mk
@@ -31,6 +31,10 @@ export IO_CONSTRAINTS = $(DESIGN_HOME)/$(PLATFORM)/$(DESIGN_NAME)/io.tcl
export PLACE_DENSITY_LB_ADDON = 0.05
+export MACRO_PLACEMENT_TCL = $(DESIGN_HOME)/$(PLATFORM)/$(DESIGN_NAME)/macro_placement.tcl
+
export MACRO_PLACE_HALO = 10 10
export TNS_END_PERCENT = 100
+
+export HOLD_SLACK_MARGIN = 0.03
diff --git a/flow/designs/nangate45/black_parrot/macro_placement.tcl b/flow/designs/nangate45/black_parrot/macro_placement.tcl
new file mode 100644
index 0000000000..41f518ed76
--- /dev/null
+++ b/flow/designs/nangate45/black_parrot/macro_placement.tcl
@@ -0,0 +1,43 @@
+place_macro \
+ -macro_name multi_top.me.genblk1_0__bp_cce_top.bp_cce/directory.wg_ram/macro_mem0.mem \
+ -location {20.07 355.915} -orientation MY
+
+place_macro \
+ -macro_name multi_top.me.genblk1_0__bp_cce_top.bp_cce/directory.wg_ram/macro_mem1.mem \
+ -location {94.6 355.915} -orientation MY
+
+place_macro \
+ -macro_name multi_top.rof1_0__core/fe.icache_1/metadata_mem.macro_mem.mem \
+ -location {20.07 245.105} -orientation R180
+
+place_macro \
+ -macro_name multi_top.rof1_0__core/be.be_mmu.dcache/data_mem_0__data_mem.macro_mem/mem \
+ -location {1177.31 1166.095} -orientation R0
+
+place_macro \
+ -macro_name multi_top.rof1_0__core/be.be_mmu.dcache/data_mem_1__data_mem.macro_mem/mem \
+ -location {659.6 1166.095} -orientation MY
+
+place_macro \
+ -macro_name multi_top.rof1_0__core/be.be_mmu.dcache/data_mem_2__data_mem.macro_mem/mem \
+ -location {1177.31 1032.605} -orientation MX
+
+place_macro \
+ -macro_name multi_top.rof1_0__core/be.be_mmu.dcache/data_mem_3__data_mem.macro_mem/mem \
+ -location {832.17 1166.095} -orientation R0
+
+place_macro \
+ -macro_name multi_top.rof1_0__core/be.be_mmu.dcache/data_mem_4__data_mem.macro_mem/mem \
+ -location {1004.74 1032.605} -orientation MX
+
+place_macro \
+ -macro_name multi_top.rof1_0__core/be.be_mmu.dcache/data_mem_5__data_mem.macro_mem/mem \
+ -location {832.17 1032.605} -orientation MX
+
+place_macro \
+ -macro_name multi_top.rof1_0__core/be.be_mmu.dcache/data_mem_6__data_mem.macro_mem/mem \
+ -location {1004.74 1166.095} -orientation R0
+
+place_macro \
+ -macro_name multi_top.rof1_0__core/be.be_mmu.dcache/data_mem_7__data_mem.macro_mem/mem \
+ -location {659.6 1032.605} -orientation R180
diff --git a/flow/designs/nangate45/black_parrot/rules-base.json b/flow/designs/nangate45/black_parrot/rules-base.json
index d734131457..46a193c331 100644
--- a/flow/designs/nangate45/black_parrot/rules-base.json
+++ b/flow/designs/nangate45/black_parrot/rules-base.json
@@ -1,6 +1,66 @@
{
+ "cts__flow__warnings__count:RSZ-0062": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "detailedroute__flow__warnings__count:DRT-0120": {
+ "value": 42,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "detailedroute__flow__warnings__count:GRT-0246": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "finish__flow__warnings__count:GUI-0076": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:EST-0027": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:RSZ-0062": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:RSZ-0075": {
+ "value": 321,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "flow__warnings__count:PDN-0195": {
+ "value": 44,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "flow__warnings__count:PDN-1041": {
+ "value": 270,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:DRT-0120": {
+ "value": 42,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:GRT-0246": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:RSZ-0062": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
"synth__design__instance__area__stdcell": {
- "value": 778242.64,
+ "value": 777884.7342,
"compare": "<="
},
"constraints__clocks__count": {
@@ -8,7 +68,7 @@
"compare": "=="
},
"placeopt__design__instance__area": {
- "value": 776627,
+ "value": 775367,
"compare": "<="
},
"placeopt__design__instance__count__stdcell": {
@@ -27,10 +87,42 @@
"value": 24426,
"compare": "<="
},
+ "cts__timing__setup__ws": {
+ "value": -2.73,
+ "compare": ">="
+ },
+ "cts__timing__setup__tns": {
+ "value": -3.12,
+ "compare": ">="
+ },
+ "cts__timing__hold__ws": {
+ "value": 0.0,
+ "compare": ">="
+ },
+ "cts__timing__hold__tns": {
+ "value": 0.0,
+ "compare": ">="
+ },
"globalroute__antenna_diodes_count": {
"value": 0,
"compare": "<="
},
+ "globalroute__timing__setup__ws": {
+ "value": -2.73,
+ "compare": ">="
+ },
+ "globalroute__timing__setup__tns": {
+ "value": -3.11,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__ws": {
+ "value": 0.0,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__tns": {
+ "value": 0.0,
+ "compare": ">="
+ },
"detailedroute__route__wirelength": {
"value": 7048481,
"compare": "<="
@@ -47,24 +139,40 @@
"value": 5,
"compare": "<="
},
- "finish__timing__setup__ws": {
- "value": -3.69,
+ "detailedroute__timing__setup__ws": {
+ "value": -4.94,
"compare": ">="
},
- "finish__design__instance__area": {
- "value": 792384,
- "compare": "<="
+ "detailedroute__timing__setup__tns": {
+ "value": -266.0,
+ "compare": ">="
},
- "finish__timing__drv__setup_violation_count": {
- "value": 12213,
- "compare": "<="
+ "detailedroute__timing__hold__ws": {
+ "value": -0.885,
+ "compare": ">="
},
- "finish__timing__drv__hold_violation_count": {
- "value": 100,
- "compare": "<="
+ "detailedroute__timing__hold__tns": {
+ "value": -15.7,
+ "compare": ">="
+ },
+ "finish__timing__setup__ws": {
+ "value": -2.67,
+ "compare": ">="
+ },
+ "finish__timing__setup__tns": {
+ "value": -3.05,
+ "compare": ">="
+ },
+ "finish__timing__hold__ws": {
+ "value": 0.0,
+ "compare": ">="
},
- "finish__timing__wns_percent_delay": {
- "value": -42.49,
+ "finish__timing__hold__tns": {
+ "value": 0.0,
"compare": ">="
+ },
+ "finish__design__instance__area": {
+ "value": 789561,
+ "compare": "<="
}
}
\ No newline at end of file
diff --git a/flow/designs/nangate45/bp_be_top/rules-base.json b/flow/designs/nangate45/bp_be_top/rules-base.json
index 5d1d50b722..a044639fc3 100644
--- a/flow/designs/nangate45/bp_be_top/rules-base.json
+++ b/flow/designs/nangate45/bp_be_top/rules-base.json
@@ -1,4 +1,49 @@
{
+ "cts__flow__warnings__count:RSZ-0062": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "detailedroute__flow__warnings__count:GRT-0246": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "finish__flow__warnings__count:GUI-0076": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:EST-0027": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:ODB-0011": {
+ "value": 2,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:RSZ-0075": {
+ "value": 13,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "flow__warnings__count:PDN-0195": {
+ "value": 11,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:GRT-0246": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:RSZ-0062": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
"synth__design__instance__area__stdcell": {
"value": 268204.56,
"compare": "<="
@@ -8,7 +53,7 @@
"compare": "=="
},
"placeopt__design__instance__area": {
- "value": 274273,
+ "value": 273548,
"compare": "<="
},
"placeopt__design__instance__count__stdcell": {
@@ -27,12 +72,44 @@
"value": 5442,
"compare": "<="
},
+ "cts__timing__setup__ws": {
+ "value": -0.333,
+ "compare": ">="
+ },
+ "cts__timing__setup__tns": {
+ "value": -19.9,
+ "compare": ">="
+ },
+ "cts__timing__hold__ws": {
+ "value": 0.0,
+ "compare": ">="
+ },
+ "cts__timing__hold__tns": {
+ "value": 0.0,
+ "compare": ">="
+ },
"globalroute__antenna_diodes_count": {
"value": 0,
"compare": "<="
},
+ "globalroute__timing__setup__ws": {
+ "value": -0.335,
+ "compare": ">="
+ },
+ "globalroute__timing__setup__tns": {
+ "value": -19.8,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__ws": {
+ "value": 0.0,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__tns": {
+ "value": 0.0,
+ "compare": ">="
+ },
"detailedroute__route__wirelength": {
- "value": 2679578,
+ "value": 2566212,
"compare": "<="
},
"detailedroute__route__drc_errors": {
@@ -47,24 +124,40 @@
"value": 5,
"compare": "<="
},
- "finish__timing__setup__ws": {
- "value": -0.35,
+ "detailedroute__timing__setup__ws": {
+ "value": 0.0,
"compare": ">="
},
- "finish__design__instance__area": {
- "value": 276023,
- "compare": "<="
+ "detailedroute__timing__setup__tns": {
+ "value": 0.0,
+ "compare": ">="
},
- "finish__timing__drv__setup_violation_count": {
- "value": 2721,
- "compare": "<="
+ "detailedroute__timing__hold__ws": {
+ "value": 0.0,
+ "compare": ">="
},
- "finish__timing__drv__hold_violation_count": {
- "value": 100,
- "compare": "<="
+ "detailedroute__timing__hold__tns": {
+ "value": 0.0,
+ "compare": ">="
+ },
+ "finish__timing__setup__ws": {
+ "value": -0.392,
+ "compare": ">="
+ },
+ "finish__timing__setup__tns": {
+ "value": -28.7,
+ "compare": ">="
+ },
+ "finish__timing__hold__ws": {
+ "value": 0.0,
+ "compare": ">="
},
- "finish__timing__wns_percent_delay": {
- "value": -22.31,
+ "finish__timing__hold__tns": {
+ "value": 0.0,
"compare": ">="
+ },
+ "finish__design__instance__area": {
+ "value": 275387,
+ "compare": "<="
}
}
\ No newline at end of file
diff --git a/flow/designs/nangate45/bp_fe_top/config.mk b/flow/designs/nangate45/bp_fe_top/config.mk
index 249771d43d..633035aa22 100644
--- a/flow/designs/nangate45/bp_fe_top/config.mk
+++ b/flow/designs/nangate45/bp_fe_top/config.mk
@@ -31,3 +31,5 @@ export TNS_END_PERCENT = 100
export FASTROUTE_TCL = $(DESIGN_HOME)/$(PLATFORM)/$(DESIGN_NAME)/fastroute.tcl
export GPL_KEEP_OVERFLOW = 0
+
+export HOLD_SLACK_MARGIN = 0.03
diff --git a/flow/designs/nangate45/bp_fe_top/rules-base.json b/flow/designs/nangate45/bp_fe_top/rules-base.json
index d26c045bfb..ade82f774e 100644
--- a/flow/designs/nangate45/bp_fe_top/rules-base.json
+++ b/flow/designs/nangate45/bp_fe_top/rules-base.json
@@ -1,4 +1,54 @@
{
+ "cts__flow__warnings__count:RSZ-0062": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "detailedroute__flow__warnings__count:GRT-0246": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "finish__flow__warnings__count:GUI-0076": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:EST-0027": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:IFP-0028": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:ODB-0011": {
+ "value": 2,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "flow__warnings__count:PDN-0195": {
+ "value": 11,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "flow__warnings__count:PDN-1041": {
+ "value": 270,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:GRT-0246": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:RSZ-0062": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
"synth__design__instance__area__stdcell": {
"value": 241575.35,
"compare": "<="
@@ -8,7 +58,7 @@
"compare": "=="
},
"placeopt__design__instance__area": {
- "value": 245106,
+ "value": 244991,
"compare": "<="
},
"placeopt__design__instance__count__stdcell": {
@@ -27,10 +77,42 @@
"value": 3371,
"compare": "<="
},
+ "cts__timing__setup__ws": {
+ "value": -0.0132,
+ "compare": ">="
+ },
+ "cts__timing__setup__tns": {
+ "value": -0.0249,
+ "compare": ">="
+ },
+ "cts__timing__hold__ws": {
+ "value": 0.0,
+ "compare": ">="
+ },
+ "cts__timing__hold__tns": {
+ "value": 0.0,
+ "compare": ">="
+ },
"globalroute__antenna_diodes_count": {
"value": 0,
"compare": "<="
},
+ "globalroute__timing__setup__ws": {
+ "value": -0.0931,
+ "compare": ">="
+ },
+ "globalroute__timing__setup__tns": {
+ "value": -0.367,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__ws": {
+ "value": 0.0,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__tns": {
+ "value": 0.0,
+ "compare": ">="
+ },
"detailedroute__route__wirelength": {
"value": 1659471,
"compare": "<="
@@ -47,24 +129,40 @@
"value": 5,
"compare": "<="
},
- "finish__timing__setup__ws": {
- "value": -0.17,
+ "detailedroute__timing__setup__ws": {
+ "value": 0.0,
"compare": ">="
},
- "finish__design__instance__area": {
- "value": 247731,
- "compare": "<="
+ "detailedroute__timing__setup__tns": {
+ "value": 0.0,
+ "compare": ">="
},
- "finish__timing__drv__setup_violation_count": {
- "value": 1686,
- "compare": "<="
+ "detailedroute__timing__hold__ws": {
+ "value": 0.0,
+ "compare": ">="
},
- "finish__timing__drv__hold_violation_count": {
- "value": 100,
- "compare": "<="
+ "detailedroute__timing__hold__tns": {
+ "value": 0.0,
+ "compare": ">="
+ },
+ "finish__timing__setup__ws": {
+ "value": -0.127,
+ "compare": ">="
+ },
+ "finish__timing__setup__tns": {
+ "value": -8.97,
+ "compare": ">="
+ },
+ "finish__timing__hold__ws": {
+ "value": 0.0,
+ "compare": ">="
},
- "finish__timing__wns_percent_delay": {
- "value": -12.16,
+ "finish__timing__hold__tns": {
+ "value": 0.0,
"compare": ">="
+ },
+ "finish__design__instance__area": {
+ "value": 247483,
+ "compare": "<="
}
}
\ No newline at end of file
diff --git a/flow/designs/nangate45/bp_multi_top/rules-base.json b/flow/designs/nangate45/bp_multi_top/rules-base.json
index a5a17df92c..ed866dfbda 100644
--- a/flow/designs/nangate45/bp_multi_top/rules-base.json
+++ b/flow/designs/nangate45/bp_multi_top/rules-base.json
@@ -1,4 +1,64 @@
{
+ "cts__flow__warnings__count:RSZ-0062": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
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+ "value": 102,
+ "compare": "<=",
+ "level": "warning"
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+ "compare": "<=",
+ "level": "warning"
+ },
+ "detailedroute__flow__warnings__count:GRT-0246": {
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+ "compare": "<=",
+ "level": "warning"
+ },
+ "finish__flow__warnings__count:GUI-0076": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:EST-0027": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:RSZ-0062": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:RSZ-0075": {
+ "value": 365,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "flow__warnings__count:PDN-0195": {
+ "value": 46,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:DRT-0120": {
+ "value": 3,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:GRT-0246": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:RSZ-0062": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
"synth__design__instance__area__stdcell": {
"value": 586679.15,
"compare": "<="
@@ -8,7 +68,7 @@
"compare": "=="
},
"placeopt__design__instance__area": {
- "value": 587578,
+ "value": 587567,
"compare": "<="
},
"placeopt__design__instance__count__stdcell": {
@@ -27,12 +87,44 @@
"value": 12520,
"compare": "<="
},
+ "cts__timing__setup__ws": {
+ "value": -4.6,
+ "compare": ">="
+ },
+ "cts__timing__setup__tns": {
+ "value": -5.28,
+ "compare": ">="
+ },
+ "cts__timing__hold__ws": {
+ "value": 0.0,
+ "compare": ">="
+ },
+ "cts__timing__hold__tns": {
+ "value": 0.0,
+ "compare": ">="
+ },
"globalroute__antenna_diodes_count": {
"value": 0,
"compare": "<="
},
+ "globalroute__timing__setup__ws": {
+ "value": -4.71,
+ "compare": ">="
+ },
+ "globalroute__timing__setup__tns": {
+ "value": -5.4,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__ws": {
+ "value": -0.24,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__tns": {
+ "value": -0.96,
+ "compare": ">="
+ },
"detailedroute__route__wirelength": {
- "value": 4291357,
+ "value": 4180077,
"compare": "<="
},
"detailedroute__route__drc_errors": {
@@ -47,24 +139,40 @@
"value": 5,
"compare": "<="
},
- "finish__timing__setup__ws": {
- "value": -4.47,
+ "detailedroute__timing__setup__ws": {
+ "value": -6.13,
"compare": ">="
},
- "finish__design__instance__area": {
- "value": 597097,
- "compare": "<="
+ "detailedroute__timing__setup__tns": {
+ "value": -607.0,
+ "compare": ">="
},
- "finish__timing__drv__setup_violation_count": {
- "value": 6260,
- "compare": "<="
+ "detailedroute__timing__hold__ws": {
+ "value": -1.48,
+ "compare": ">="
},
- "finish__timing__drv__hold_violation_count": {
- "value": 100,
- "compare": "<="
+ "detailedroute__timing__hold__tns": {
+ "value": -105.0,
+ "compare": ">="
},
- "finish__timing__wns_percent_delay": {
- "value": -57.81,
+ "finish__timing__setup__ws": {
+ "value": -4.68,
"compare": ">="
+ },
+ "finish__timing__setup__tns": {
+ "value": -5.36,
+ "compare": ">="
+ },
+ "finish__timing__hold__ws": {
+ "value": -0.0317,
+ "compare": ">="
+ },
+ "finish__timing__hold__tns": {
+ "value": -0.1086,
+ "compare": ">="
+ },
+ "finish__design__instance__area": {
+ "value": 595583,
+ "compare": "<="
}
}
\ No newline at end of file
diff --git a/flow/designs/nangate45/dynamic_node/rules-base.json b/flow/designs/nangate45/dynamic_node/rules-base.json
index fc4622093c..35130f0f63 100644
--- a/flow/designs/nangate45/dynamic_node/rules-base.json
+++ b/flow/designs/nangate45/dynamic_node/rules-base.json
@@ -1,4 +1,49 @@
{
+ "cts__flow__warnings__count:RSZ-0062": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "detailedroute__flow__warnings__count:GRT-0246": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "finish__flow__warnings__count:GUI-0076": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:EST-0027": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:IFP-0028": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:RSZ-0075": {
+ "value": 11,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "flow__warnings__count:PDN-1041": {
+ "value": 270,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:GRT-0246": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:RSZ-0062": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
"synth__design__instance__area__stdcell": {
"value": 25515.12,
"compare": "<="
@@ -27,12 +72,44 @@
"value": 1113,
"compare": "<="
},
+ "cts__timing__setup__ws": {
+ "value": -0.482,
+ "compare": ">="
+ },
+ "cts__timing__setup__tns": {
+ "value": -1.81,
+ "compare": ">="
+ },
+ "cts__timing__hold__ws": {
+ "value": -0.3,
+ "compare": ">="
+ },
+ "cts__timing__hold__tns": {
+ "value": -1.2,
+ "compare": ">="
+ },
"globalroute__antenna_diodes_count": {
- "value": 0,
+ "value": 100,
"compare": "<="
},
+ "globalroute__timing__setup__ws": {
+ "value": -0.463,
+ "compare": ">="
+ },
+ "globalroute__timing__setup__tns": {
+ "value": -1.78,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__ws": {
+ "value": -0.3,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__tns": {
+ "value": -1.2,
+ "compare": ">="
+ },
"detailedroute__route__wirelength": {
- "value": 232669,
+ "value": 229884,
"compare": "<="
},
"detailedroute__route__drc_errors": {
@@ -44,27 +121,43 @@
"compare": "<="
},
"detailedroute__antenna_diodes_count": {
- "value": 5,
+ "value": 100,
"compare": "<="
},
- "finish__timing__setup__ws": {
- "value": -0.49,
+ "detailedroute__timing__setup__ws": {
+ "value": -0.3,
"compare": ">="
},
- "finish__design__instance__area": {
- "value": 27422,
- "compare": "<="
+ "detailedroute__timing__setup__tns": {
+ "value": -1.2,
+ "compare": ">="
},
- "finish__timing__drv__setup_violation_count": {
- "value": 556,
- "compare": "<="
+ "detailedroute__timing__hold__ws": {
+ "value": -0.3,
+ "compare": ">="
},
- "finish__timing__drv__hold_violation_count": {
- "value": 100,
- "compare": "<="
+ "detailedroute__timing__hold__tns": {
+ "value": -1.2,
+ "compare": ">="
},
- "finish__timing__wns_percent_delay": {
- "value": -31.32,
+ "finish__timing__setup__ws": {
+ "value": -0.454,
"compare": ">="
+ },
+ "finish__timing__setup__tns": {
+ "value": -1.86,
+ "compare": ">="
+ },
+ "finish__timing__hold__ws": {
+ "value": -0.3,
+ "compare": ">="
+ },
+ "finish__timing__hold__tns": {
+ "value": -1.2,
+ "compare": ">="
+ },
+ "finish__design__instance__area": {
+ "value": 27349,
+ "compare": "<="
}
}
\ No newline at end of file
diff --git a/flow/designs/nangate45/gcd/rules-base.json b/flow/designs/nangate45/gcd/rules-base.json
index 5ff81308c6..1fb1bc7827 100644
--- a/flow/designs/nangate45/gcd/rules-base.json
+++ b/flow/designs/nangate45/gcd/rules-base.json
@@ -1,4 +1,39 @@
{
+ "cts__flow__warnings__count:RSZ-0062": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "detailedroute__flow__warnings__count:GRT-0246": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "finish__flow__warnings__count:GUI-0076": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:EST-0027": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:IFP-0028": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:GRT-0246": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:RSZ-0062": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
"synth__design__instance__area__stdcell": {
"value": 725.6,
"compare": "<="
@@ -12,7 +47,7 @@
"compare": "<="
},
"placeopt__design__instance__count__stdcell": {
- "value": 685,
+ "value": 677,
"compare": "<="
},
"detailedplace__design__violations": {
@@ -20,19 +55,51 @@
"compare": "=="
},
"cts__design__instance__count__setup_buffer": {
- "value": 60,
+ "value": 59,
"compare": "<="
},
"cts__design__instance__count__hold_buffer": {
- "value": 60,
+ "value": 59,
"compare": "<="
},
+ "cts__timing__setup__ws": {
+ "value": -0.0696,
+ "compare": ">="
+ },
+ "cts__timing__setup__tns": {
+ "value": -0.569,
+ "compare": ">="
+ },
+ "cts__timing__hold__ws": {
+ "value": -0.023,
+ "compare": ">="
+ },
+ "cts__timing__hold__tns": {
+ "value": -0.092,
+ "compare": ">="
+ },
"globalroute__antenna_diodes_count": {
- "value": 0,
+ "value": 100,
"compare": "<="
},
+ "globalroute__timing__setup__ws": {
+ "value": -0.0841,
+ "compare": ">="
+ },
+ "globalroute__timing__setup__tns": {
+ "value": -0.695,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__ws": {
+ "value": -0.023,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__tns": {
+ "value": -0.092,
+ "compare": ">="
+ },
"detailedroute__route__wirelength": {
- "value": 5050,
+ "value": 4628,
"compare": "<="
},
"detailedroute__route__drc_errors": {
@@ -44,27 +111,43 @@
"compare": "<="
},
"detailedroute__antenna_diodes_count": {
- "value": 5,
+ "value": 100,
"compare": "<="
},
- "finish__timing__setup__ws": {
- "value": -0.07,
+ "detailedroute__timing__setup__ws": {
+ "value": -0.0525,
"compare": ">="
},
- "finish__design__instance__area": {
- "value": 1042,
- "compare": "<="
+ "detailedroute__timing__setup__tns": {
+ "value": -0.322,
+ "compare": ">="
},
- "finish__timing__drv__setup_violation_count": {
- "value": 46,
- "compare": "<="
+ "detailedroute__timing__hold__ws": {
+ "value": -0.023,
+ "compare": ">="
},
- "finish__timing__drv__hold_violation_count": {
- "value": 100,
- "compare": "<="
+ "detailedroute__timing__hold__tns": {
+ "value": -0.092,
+ "compare": ">="
},
- "finish__timing__wns_percent_delay": {
- "value": -24.48,
+ "finish__timing__setup__ws": {
+ "value": -0.0774,
"compare": ">="
+ },
+ "finish__timing__setup__tns": {
+ "value": -0.629,
+ "compare": ">="
+ },
+ "finish__timing__hold__ws": {
+ "value": -0.023,
+ "compare": ">="
+ },
+ "finish__timing__hold__tns": {
+ "value": -0.092,
+ "compare": ">="
+ },
+ "finish__design__instance__area": {
+ "value": 980,
+ "compare": "<="
}
}
\ No newline at end of file
diff --git a/flow/designs/nangate45/ibex/rules-base.json b/flow/designs/nangate45/ibex/rules-base.json
index 3b5ce48222..847d59d731 100644
--- a/flow/designs/nangate45/ibex/rules-base.json
+++ b/flow/designs/nangate45/ibex/rules-base.json
@@ -1,4 +1,44 @@
{
+ "cts__flow__warnings__count:RSZ-0062": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "detailedroute__flow__warnings__count:GRT-0246": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "finish__flow__warnings__count:GUI-0076": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:EST-0027": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:IFP-0028": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:RSZ-0075": {
+ "value": 191,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:GRT-0246": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:RSZ-0062": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
"synth__design__instance__area__stdcell": {
"value": 32643.82,
"compare": "<="
@@ -27,10 +67,42 @@
"value": 1548,
"compare": "<="
},
+ "cts__timing__setup__ws": {
+ "value": -0.12,
+ "compare": ">="
+ },
+ "cts__timing__setup__tns": {
+ "value": -0.45,
+ "compare": ">="
+ },
+ "cts__timing__hold__ws": {
+ "value": -0.11,
+ "compare": ">="
+ },
+ "cts__timing__hold__tns": {
+ "value": -0.44,
+ "compare": ">="
+ },
"globalroute__antenna_diodes_count": {
- "value": 0,
+ "value": 100,
"compare": "<="
},
+ "globalroute__timing__setup__ws": {
+ "value": -0.118,
+ "compare": ">="
+ },
+ "globalroute__timing__setup__tns": {
+ "value": -0.456,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__ws": {
+ "value": -0.11,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__tns": {
+ "value": -0.44,
+ "compare": ">="
+ },
"detailedroute__route__wirelength": {
"value": 307535,
"compare": "<="
@@ -44,27 +116,43 @@
"compare": "<="
},
"detailedroute__antenna_diodes_count": {
- "value": 5,
+ "value": 100,
"compare": "<="
},
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- "value": -0.14,
+ "detailedroute__timing__setup__ws": {
+ "value": -0.11,
"compare": ">="
},
- "finish__design__instance__area": {
- "value": 33700,
- "compare": "<="
+ "detailedroute__timing__setup__tns": {
+ "value": -0.44,
+ "compare": ">="
},
- "finish__timing__drv__setup_violation_count": {
- "value": 774,
- "compare": "<="
+ "detailedroute__timing__hold__ws": {
+ "value": -0.11,
+ "compare": ">="
},
- "finish__timing__drv__hold_violation_count": {
- "value": 100,
- "compare": "<="
+ "detailedroute__timing__hold__tns": {
+ "value": -0.44,
+ "compare": ">="
+ },
+ "finish__timing__setup__ws": {
+ "value": -0.133,
+ "compare": ">="
+ },
+ "finish__timing__setup__tns": {
+ "value": -2.93,
+ "compare": ">="
},
- "finish__timing__wns_percent_delay": {
- "value": -11.47,
+ "finish__timing__hold__ws": {
+ "value": -0.11,
"compare": ">="
+ },
+ "finish__timing__hold__tns": {
+ "value": -0.44,
+ "compare": ">="
+ },
+ "finish__design__instance__area": {
+ "value": 33700,
+ "compare": "<="
}
}
\ No newline at end of file
diff --git a/flow/designs/nangate45/jpeg/rules-base.json b/flow/designs/nangate45/jpeg/rules-base.json
index 59a9696e1a..72740105ec 100644
--- a/flow/designs/nangate45/jpeg/rules-base.json
+++ b/flow/designs/nangate45/jpeg/rules-base.json
@@ -1,4 +1,44 @@
{
+ "detailedroute__flow__warnings__count:GRT-0246": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "finish__flow__warnings__count:GUI-0076": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:EST-0027": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:IFP-0028": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:RSZ-0062": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:RSZ-0075": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "flow__warnings__count:PDN-1041": {
+ "value": 270,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:GRT-0246": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
"synth__design__instance__area__stdcell": {
"value": 102576.23,
"compare": "<="
@@ -27,12 +67,44 @@
"value": 5957,
"compare": "<="
},
+ "cts__timing__setup__ws": {
+ "value": -0.06,
+ "compare": ">="
+ },
+ "cts__timing__setup__tns": {
+ "value": -0.24,
+ "compare": ">="
+ },
+ "cts__timing__hold__ws": {
+ "value": -0.06,
+ "compare": ">="
+ },
+ "cts__timing__hold__tns": {
+ "value": -0.24,
+ "compare": ">="
+ },
"globalroute__antenna_diodes_count": {
- "value": 0,
+ "value": 100,
"compare": "<="
},
+ "globalroute__timing__setup__ws": {
+ "value": -0.06,
+ "compare": ">="
+ },
+ "globalroute__timing__setup__tns": {
+ "value": -0.24,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__ws": {
+ "value": -0.06,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__tns": {
+ "value": -0.24,
+ "compare": ">="
+ },
"detailedroute__route__wirelength": {
- "value": 677813,
+ "value": 671143,
"compare": "<="
},
"detailedroute__route__drc_errors": {
@@ -44,27 +116,43 @@
"compare": "<="
},
"detailedroute__antenna_diodes_count": {
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+ "value": 100,
"compare": "<="
},
- "finish__timing__setup__ws": {
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+ "detailedroute__timing__setup__ws": {
+ "value": -0.06,
"compare": ">="
},
- "finish__design__instance__area": {
- "value": 103664,
- "compare": "<="
+ "detailedroute__timing__setup__tns": {
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+ "compare": ">="
},
- "finish__timing__drv__setup_violation_count": {
- "value": 2979,
- "compare": "<="
+ "detailedroute__timing__hold__ws": {
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+ "compare": ">="
},
- "finish__timing__drv__hold_violation_count": {
- "value": 100,
- "compare": "<="
+ "detailedroute__timing__hold__tns": {
+ "value": -0.24,
+ "compare": ">="
},
- "finish__timing__wns_percent_delay": {
- "value": -10.0,
+ "finish__timing__setup__ws": {
+ "value": -0.06,
"compare": ">="
+ },
+ "finish__timing__setup__tns": {
+ "value": -0.24,
+ "compare": ">="
+ },
+ "finish__timing__hold__ws": {
+ "value": -0.06,
+ "compare": ">="
+ },
+ "finish__timing__hold__tns": {
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+ "compare": ">="
+ },
+ "finish__design__instance__area": {
+ "value": 103424,
+ "compare": "<="
}
}
\ No newline at end of file
diff --git a/flow/designs/nangate45/mempool_group/rules-base.json b/flow/designs/nangate45/mempool_group/rules-base.json
index 69e09d5509..6496f27877 100644
--- a/flow/designs/nangate45/mempool_group/rules-base.json
+++ b/flow/designs/nangate45/mempool_group/rules-base.json
@@ -1,4 +1,94 @@
{
+ "cts__flow__warnings__count:RSZ-0062": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "detailedroute__flow__warnings__count:DRT-0120": {
+ "value": 2,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "detailedroute__flow__warnings__count:GRT-0246": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "detailedroute__flow__warnings__count:STA-0450": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "finish__flow__warnings__count:GUI-0076": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "finish__flow__warnings__count:STA-0450": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:EST-0027": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:IFP-0028": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:RSZ-0062": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:RSZ-0075": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:STA-0345": {
+ "value": 2,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "flow__warnings__count:PDN-1041": {
+ "value": 270,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "flow__warnings__count:STA-0450": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:DRT-0120": {
+ "value": 2,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:FLW-0010": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:GRT-0246": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:RSZ-0062": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:STA-0450": {
+ "value": 2,
+ "compare": "<=",
+ "level": "warning"
+ },
"synth__design__instance__area__stdcell": {
"value": 271098.37,
"compare": "<="
@@ -27,12 +117,44 @@
"value": 11373,
"compare": "<="
},
+ "cts__timing__setup__ws": {
+ "value": -2.35,
+ "compare": ">="
+ },
+ "cts__timing__setup__tns": {
+ "value": -12700.0,
+ "compare": ">="
+ },
+ "cts__timing__hold__ws": {
+ "value": -0.15,
+ "compare": ">="
+ },
+ "cts__timing__hold__tns": {
+ "value": -0.6,
+ "compare": ">="
+ },
"globalroute__antenna_diodes_count": {
- "value": 0,
+ "value": 170,
"compare": "<="
},
+ "globalroute__timing__setup__ws": {
+ "value": -2.35,
+ "compare": ">="
+ },
+ "globalroute__timing__setup__tns": {
+ "value": -12500.0,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__ws": {
+ "value": -0.15,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__tns": {
+ "value": -0.6,
+ "compare": ">="
+ },
"detailedroute__route__wirelength": {
- "value": 4076067,
+ "value": 4029078,
"compare": "<="
},
"detailedroute__route__drc_errors": {
@@ -44,27 +166,43 @@
"compare": "<="
},
"detailedroute__antenna_diodes_count": {
- "value": 5,
+ "value": 170,
"compare": "<="
},
- "finish__timing__setup__ws": {
- "value": -2.34,
+ "detailedroute__timing__setup__ws": {
+ "value": -2.35,
"compare": ">="
},
- "finish__design__instance__area": {
- "value": 304646,
- "compare": "<="
+ "detailedroute__timing__setup__tns": {
+ "value": -8320.0,
+ "compare": ">="
},
- "finish__timing__drv__setup_violation_count": {
- "value": 7210,
- "compare": "<="
+ "detailedroute__timing__hold__ws": {
+ "value": -0.15,
+ "compare": ">="
},
- "finish__timing__drv__hold_violation_count": {
- "value": 100,
- "compare": "<="
+ "detailedroute__timing__hold__tns": {
+ "value": -0.6,
+ "compare": ">="
+ },
+ "finish__timing__setup__ws": {
+ "value": -2.35,
+ "compare": ">="
+ },
+ "finish__timing__setup__tns": {
+ "value": -12500.0,
+ "compare": ">="
+ },
+ "finish__timing__hold__ws": {
+ "value": -0.15,
+ "compare": ">="
},
- "finish__timing__wns_percent_delay": {
- "value": -109.23,
+ "finish__timing__hold__tns": {
+ "value": -0.6,
"compare": ">="
+ },
+ "finish__design__instance__area": {
+ "value": 303227,
+ "compare": "<="
}
}
\ No newline at end of file
diff --git a/flow/designs/nangate45/swerv/rules-base.json b/flow/designs/nangate45/swerv/rules-base.json
index eebcbd9d3e..4f3e8e1226 100644
--- a/flow/designs/nangate45/swerv/rules-base.json
+++ b/flow/designs/nangate45/swerv/rules-base.json
@@ -1,4 +1,44 @@
{
+ "cts__flow__warnings__count:RSZ-0062": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "detailedroute__flow__warnings__count:GRT-0246": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "finish__flow__warnings__count:GUI-0076": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:EST-0027": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:IFP-0028": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:RSZ-0062": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:GRT-0246": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:RSZ-0062": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
"synth__design__instance__area__stdcell": {
"value": 178043.59,
"compare": "<="
@@ -8,7 +48,7 @@
"compare": "=="
},
"placeopt__design__instance__area": {
- "value": 180188,
+ "value": 179149,
"compare": "<="
},
"placeopt__design__instance__count__stdcell": {
@@ -27,12 +67,44 @@
"value": 8638,
"compare": "<="
},
+ "cts__timing__setup__ws": {
+ "value": -0.207,
+ "compare": ">="
+ },
+ "cts__timing__setup__tns": {
+ "value": -48.7,
+ "compare": ">="
+ },
+ "cts__timing__hold__ws": {
+ "value": -0.1,
+ "compare": ">="
+ },
+ "cts__timing__hold__tns": {
+ "value": -0.4,
+ "compare": ">="
+ },
"globalroute__antenna_diodes_count": {
- "value": 0,
+ "value": 102,
"compare": "<="
},
+ "globalroute__timing__setup__ws": {
+ "value": -0.224,
+ "compare": ">="
+ },
+ "globalroute__timing__setup__tns": {
+ "value": -62.2,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__ws": {
+ "value": -0.1,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__tns": {
+ "value": -0.4,
+ "compare": ">="
+ },
"detailedroute__route__wirelength": {
- "value": 2817047,
+ "value": 2814559,
"compare": "<="
},
"detailedroute__route__drc_errors": {
@@ -44,27 +116,43 @@
"compare": "<="
},
"detailedroute__antenna_diodes_count": {
- "value": 5,
+ "value": 102,
"compare": "<="
},
- "finish__timing__setup__ws": {
- "value": -0.25,
+ "detailedroute__timing__setup__ws": {
+ "value": -0.1,
"compare": ">="
},
- "finish__design__instance__area": {
- "value": 185087,
- "compare": "<="
+ "detailedroute__timing__setup__tns": {
+ "value": -0.4,
+ "compare": ">="
},
- "finish__timing__drv__setup_violation_count": {
- "value": 4319,
- "compare": "<="
+ "detailedroute__timing__hold__ws": {
+ "value": -0.107,
+ "compare": ">="
},
- "finish__timing__drv__hold_violation_count": {
- "value": 279,
- "compare": "<="
+ "detailedroute__timing__hold__tns": {
+ "value": -0.856,
+ "compare": ">="
+ },
+ "finish__timing__setup__ws": {
+ "value": -0.235,
+ "compare": ">="
+ },
+ "finish__timing__setup__tns": {
+ "value": -72.3,
+ "compare": ">="
+ },
+ "finish__timing__hold__ws": {
+ "value": -0.1,
+ "compare": ">="
},
- "finish__timing__wns_percent_delay": {
- "value": -18.17,
+ "finish__timing__hold__tns": {
+ "value": -0.4,
"compare": ">="
+ },
+ "finish__design__instance__area": {
+ "value": 183736,
+ "compare": "<="
}
}
\ No newline at end of file
diff --git a/flow/designs/nangate45/swerv_wrapper/rules-base.json b/flow/designs/nangate45/swerv_wrapper/rules-base.json
index 1bb9f2bd18..4dcf9eb142 100644
--- a/flow/designs/nangate45/swerv_wrapper/rules-base.json
+++ b/flow/designs/nangate45/swerv_wrapper/rules-base.json
@@ -1,4 +1,39 @@
{
+ "cts__flow__warnings__count:RSZ-0062": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "detailedroute__flow__warnings__count:GRT-0246": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "finish__flow__warnings__count:GUI-0076": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:EST-0027": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:RSZ-0062": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:GRT-0246": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:RSZ-0062": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
"synth__design__instance__area__stdcell": {
"value": 724516.2,
"compare": "<="
@@ -12,7 +47,7 @@
"compare": "<="
},
"placeopt__design__instance__count__stdcell": {
- "value": 112943,
+ "value": 112854,
"compare": "<="
},
"detailedplace__design__violations": {
@@ -20,19 +55,51 @@
"compare": "=="
},
"cts__design__instance__count__setup_buffer": {
- "value": 9821,
+ "value": 9813,
"compare": "<="
},
"cts__design__instance__count__hold_buffer": {
- "value": 9821,
+ "value": 9813,
"compare": "<="
},
+ "cts__timing__setup__ws": {
+ "value": -0.1,
+ "compare": ">="
+ },
+ "cts__timing__setup__tns": {
+ "value": -40.3,
+ "compare": ">="
+ },
+ "cts__timing__hold__ws": {
+ "value": -0.1,
+ "compare": ">="
+ },
+ "cts__timing__hold__tns": {
+ "value": -0.4,
+ "compare": ">="
+ },
"globalroute__antenna_diodes_count": {
- "value": 0,
+ "value": 109,
"compare": "<="
},
+ "globalroute__timing__setup__ws": {
+ "value": -0.1,
+ "compare": ">="
+ },
+ "globalroute__timing__setup__tns": {
+ "value": -42.4,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__ws": {
+ "value": -0.1,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__tns": {
+ "value": -0.4,
+ "compare": ">="
+ },
"detailedroute__route__wirelength": {
- "value": 3933057,
+ "value": 4181462,
"compare": "<="
},
"detailedroute__route__drc_errors": {
@@ -44,27 +111,43 @@
"compare": "<="
},
"detailedroute__antenna_diodes_count": {
- "value": 5,
+ "value": 109,
"compare": "<="
},
- "finish__timing__setup__ws": {
- "value": -0.3,
+ "detailedroute__timing__setup__ws": {
+ "value": -0.1,
"compare": ">="
},
- "finish__design__instance__area": {
- "value": 737022,
- "compare": "<="
+ "detailedroute__timing__setup__tns": {
+ "value": -0.4,
+ "compare": ">="
},
- "finish__timing__drv__setup_violation_count": {
- "value": 4911,
- "compare": "<="
+ "detailedroute__timing__hold__ws": {
+ "value": -0.106,
+ "compare": ">="
},
- "finish__timing__drv__hold_violation_count": {
- "value": 578,
- "compare": "<="
+ "detailedroute__timing__hold__tns": {
+ "value": -0.893,
+ "compare": ">="
+ },
+ "finish__timing__setup__ws": {
+ "value": -0.225,
+ "compare": ">="
+ },
+ "finish__timing__setup__tns": {
+ "value": -115.0,
+ "compare": ">="
+ },
+ "finish__timing__hold__ws": {
+ "value": -0.127,
+ "compare": ">="
},
- "finish__timing__wns_percent_delay": {
- "value": -19.37,
+ "finish__timing__hold__tns": {
+ "value": -4.07,
"compare": ">="
+ },
+ "finish__design__instance__area": {
+ "value": 735619,
+ "compare": "<="
}
}
\ No newline at end of file
diff --git a/flow/designs/nangate45/tinyRocket/rules-base.json b/flow/designs/nangate45/tinyRocket/rules-base.json
index cbf6193903..770e842c4f 100644
--- a/flow/designs/nangate45/tinyRocket/rules-base.json
+++ b/flow/designs/nangate45/tinyRocket/rules-base.json
@@ -1,4 +1,44 @@
{
+ "cts__flow__warnings__count:RSZ-0062": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "detailedroute__flow__warnings__count:GRT-0246": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "finish__flow__warnings__count:GUI-0076": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:EST-0027": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:RSZ-0062": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:RSZ-0075": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:GRT-0246": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:RSZ-0062": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
"synth__design__instance__area__stdcell": {
"value": 59681.09,
"compare": "<="
@@ -8,7 +48,7 @@
"compare": "=="
},
"placeopt__design__instance__area": {
- "value": 61634,
+ "value": 61249,
"compare": "<="
},
"placeopt__design__instance__count__stdcell": {
@@ -27,12 +67,44 @@
"value": 2826,
"compare": "<="
},
+ "cts__timing__setup__ws": {
+ "value": -0.103,
+ "compare": ">="
+ },
+ "cts__timing__setup__tns": {
+ "value": -11.3,
+ "compare": ">="
+ },
+ "cts__timing__hold__ws": {
+ "value": -0.06,
+ "compare": ">="
+ },
+ "cts__timing__hold__tns": {
+ "value": -0.24,
+ "compare": ">="
+ },
"globalroute__antenna_diodes_count": {
- "value": 0,
+ "value": 100,
"compare": "<="
},
+ "globalroute__timing__setup__ws": {
+ "value": -0.134,
+ "compare": ">="
+ },
+ "globalroute__timing__setup__tns": {
+ "value": -24.3,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__ws": {
+ "value": -0.06,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__tns": {
+ "value": -0.24,
+ "compare": ">="
+ },
"detailedroute__route__wirelength": {
- "value": 756638,
+ "value": 734937,
"compare": "<="
},
"detailedroute__route__drc_errors": {
@@ -44,27 +116,43 @@
"compare": "<="
},
"detailedroute__antenna_diodes_count": {
- "value": 5,
+ "value": 100,
"compare": "<="
},
- "finish__timing__setup__ws": {
- "value": -0.19,
+ "detailedroute__timing__setup__ws": {
+ "value": -0.0853,
"compare": ">="
},
- "finish__design__instance__area": {
- "value": 63696,
- "compare": "<="
+ "detailedroute__timing__setup__tns": {
+ "value": -0.378,
+ "compare": ">="
},
- "finish__timing__drv__setup_violation_count": {
- "value": 1413,
- "compare": "<="
+ "detailedroute__timing__hold__ws": {
+ "value": -0.06,
+ "compare": ">="
},
- "finish__timing__drv__hold_violation_count": {
- "value": 100,
- "compare": "<="
+ "detailedroute__timing__hold__tns": {
+ "value": -0.24,
+ "compare": ">="
},
- "finish__timing__wns_percent_delay": {
- "value": -15.79,
+ "finish__timing__setup__ws": {
+ "value": -0.139,
"compare": ">="
+ },
+ "finish__timing__setup__tns": {
+ "value": -27.5,
+ "compare": ">="
+ },
+ "finish__timing__hold__ws": {
+ "value": -0.06,
+ "compare": ">="
+ },
+ "finish__timing__hold__tns": {
+ "value": -0.24,
+ "compare": ">="
+ },
+ "finish__design__instance__area": {
+ "value": 63439,
+ "compare": "<="
}
}
\ No newline at end of file
diff --git a/flow/designs/rapidus2hp/cva6/config.mk b/flow/designs/rapidus2hp/cva6/config.mk
index 7d2fa62b8c..69447e1687 100644
--- a/flow/designs/rapidus2hp/cva6/config.mk
+++ b/flow/designs/rapidus2hp/cva6/config.mk
@@ -64,8 +64,8 @@ export VERILOG_FILES = $(sort $(wildcard $(SRC_HOME)/common/local/util/
$(SRC_HOME)/core/cvxif_example/include/cvxif_instr_pkg.sv \
$(sort $(wildcard $(SRC_HOME)/core/frontend/*.sv)) \
$(SRC_HOME)/vendor/pulp-platform/tech_cells_generic/src/rtl/tc_sram.sv \
- $(PLATFORM_DIR)/ram/verilog/fakeram7_64x256_shim.sv \
- $(PLATFORM_DIR)/ram/verilog/sacrls0g0d1p64x256m2b1w0c1p0d0i0s0cr0rr0rm4rw00ms0.sv \
+ $(PLATFORM_DIR)/ram/verilog/fakeram7_64x256_shim_half.sv \
+ $(PLATFORM_DIR)/ram/verilog/sacrls0g0d1p64x128m2b1w0c1p0d0i0s0cr0rr0rm4rw00ms0.sv \
$(PLATFORM_DIR)/ram/verilog/fakeram7_128x64_shim.sv \
$(PLATFORM_DIR)/ram/verilog/sacrls0g0d1p128x64m2b1w0c1p0d0i0s0cr0rr0rm4rw00ms0.sv \
$(PLATFORM_DIR)/ram/verilog/fakeram7_64x28_shim.sv \
@@ -79,12 +79,12 @@ export VERILOG_INCLUDE_DIRS = $(DESIGN_HOME)/src/$(DESIGN_NICKNAME)/core/include
export VERILOG_DEFINES += -D HPDCACHE_ASSERT_OFF
-export ADDITIONAL_LEFS = $(PLATFORM_DIR)/ram/lef/sacrls0g0d1p64x256m2b1w0c1p0d0i0s0cr0rr0rm4rw00ms0.lef \
+export ADDITIONAL_LEFS = $(PLATFORM_DIR)/ram/lef/sacrls0g0d1p64x128m2b1w0c1p0d0i0s0cr0rr0rm4rw00ms0.lef \
$(PLATFORM_DIR)/ram/lef/sacrls0g0d1p128x64m2b1w0c1p0d0i0s0cr0rr0rm4rw00ms0.lef \
$(PLATFORM_DIR)/ram/lef/sacrls0g0d1p64x28m2b1w0c1p0d0i0s0cr0rr0rm4rw00ms0.lef \
$(PLATFORM_DIR)/ram/lef/sacrls0g0d1p64x25m2b1w0c1p0d0i0s0cr0rr0rm4rw00ms0.lef
-export ADDITIONAL_LIBS += $(PLATFORM_DIR)/ram/lib/sacrls0g0d1p64x256m2b1w0c1p0d0i0s0cr0rr0rm4rw00ms0.lib \
+export ADDITIONAL_LIBS += $(PLATFORM_DIR)/ram/lib/sacrls0g0d1p64x128m2b1w0c1p0d0i0s0cr0rr0rm4rw00ms0.lib \
$(PLATFORM_DIR)/ram/lib/sacrls0g0d1p128x64m2b1w0c1p0d0i0s0cr0rr0rm4rw00ms0.lib \
$(PLATFORM_DIR)/ram/lib/sacrls0g0d1p64x28m2b1w0c1p0d0i0s0cr0rr0rm4rw00ms0.lib \
$(PLATFORM_DIR)/ram/lib/sacrls0g0d1p64x25m2b1w0c1p0d0i0s0cr0rr0rm4rw00ms0.lib
@@ -95,20 +95,7 @@ export SDC_FILE = $(DESIGN_HOME)/$(PLATFORM)/$(DESIGN_NAME)/constr
export SYNTH_HDL_FRONTEND = slang
export SYNTH_HIERARCHICAL = 1
-ifeq ($(SYNTH_HDL_FRONTEND),verific)
- # Reduce utilization for verific since it runs into issues with DPL not being
- # able to place instances or with one-site gap/overlap issues
- export CORE_UTILIZATION = 45
-else
- # Reduce the amount of resizing done between GPL and DPL
- export EARLY_SIZING_CAP_RATIO = 6
- ifeq ($(PLACE_SITE),SC6T)
- # Decrease the utilization so that the tall macros fit
- export CORE_UTILIZATION = 50
- else
- export CORE_UTILIZATION = 55
- endif
-endif
+export CORE_UTILIZATION = 65
export CORE_MARGIN = 2
export MACRO_PLACE_HALO = 2 2
diff --git a/flow/designs/rapidus2hp/cva6/constraint.sdc b/flow/designs/rapidus2hp/cva6/constraint.sdc
index 9682baa9e0..743e092ac3 100644
--- a/flow/designs/rapidus2hp/cva6/constraint.sdc
+++ b/flow/designs/rapidus2hp/cva6/constraint.sdc
@@ -3,7 +3,7 @@
set clk_name main_clk
set clk_port clk_i
set clk_ports_list [list $clk_port]
-set clk_period 1200
+set clk_period 1125
set input_delay 0.46
set output_delay 0.11
create_clock [get_ports $clk_port] -name $clk_name -period $clk_period
diff --git a/flow/designs/rapidus2hp/cva6/rules-base.json b/flow/designs/rapidus2hp/cva6/rules-base.json
index eaa1759409..cf12c83e23 100644
--- a/flow/designs/rapidus2hp/cva6/rules-base.json
+++ b/flow/designs/rapidus2hp/cva6/rules-base.json
@@ -1,6 +1,126 @@
{
+ "cts__flow__warnings__count:STA-0122": {
+ "value": 27,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "cts__flow__warnings__count:STA-1257": {
+ "value": 1502,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "detailedplace__flow__warnings__count:STA-1257": {
+ "value": 1502,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "detailedroute__flow__warnings__count:STA-1257": {
+ "value": 1502,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "finish__flow__warnings__count:STA-1257": {
+ "value": 1502,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:EST-0027": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:IFP-0028": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:ODB-0256": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:ODB-0279": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:ODB-0280": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:STA-1257": {
+ "value": 1502,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "flow__warnings__count:PDN-0110": {
+ "value": 12,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "flow__warnings__count:STA-1257": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalplace__flow__warnings__count:STA-0122": {
+ "value": 27,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalplace__flow__warnings__count:STA-1257": {
+ "value": 1502,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:DRT-0120": {
+ "value": 27,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:DRT-0240": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:DRT-0263": {
+ "value": 7,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:DRT-0349": {
+ "value": 10,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:GRT-0246": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:STA-0122": {
+ "value": 27,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:STA-1257": {
+ "value": 1502,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "placeopt__flow__warnings__count:STA-0122": {
+ "value": 27,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "placeopt__flow__warnings__count:STA-1257": {
+ "value": 1502,
+ "compare": "<=",
+ "level": "warning"
+ },
"synth__design__instance__area__stdcell": {
- "value": 13516.26,
+ "value": 17216.6843,
"compare": "<="
},
"constraints__clocks__count": {
@@ -8,7 +128,7 @@
"compare": "=="
},
"placeopt__design__instance__area": {
- "value": 14746,
+ "value": 14156,
"compare": "<="
},
"placeopt__design__instance__count__stdcell": {
@@ -27,28 +147,60 @@
"value": 14906,
"compare": "<="
},
+ "cts__timing__setup__ws": {
+ "value": -56.2,
+ "compare": ">="
+ },
+ "cts__timing__setup__tns": {
+ "value": -225.0,
+ "compare": ">="
+ },
+ "cts__timing__hold__ws": {
+ "value": -56.2,
+ "compare": ">="
+ },
+ "cts__timing__hold__tns": {
+ "value": -225.0,
+ "compare": ">="
+ },
"globalroute__antenna_diodes_count": {
- "value": 0,
+ "value": 145,
"compare": "<="
},
- "finish__timing__setup__ws": {
- "value": -188.55,
+ "globalroute__timing__setup__ws": {
+ "value": -63.1,
"compare": ">="
},
- "finish__design__instance__area": {
- "value": 15035,
- "compare": "<="
+ "globalroute__timing__setup__tns": {
+ "value": -245.0,
+ "compare": ">="
},
- "finish__timing__drv__setup_violation_count": {
- "value": 7453,
- "compare": "<="
+ "globalroute__timing__hold__ws": {
+ "value": -63.9,
+ "compare": ">="
},
- "finish__timing__drv__hold_violation_count": {
- "value": 100,
- "compare": "<="
+ "globalroute__timing__hold__tns": {
+ "value": -262.0,
+ "compare": ">="
},
- "finish__timing__wns_percent_delay": {
- "value": -10.0,
+ "finish__timing__setup__ws": {
+ "value": -63.1,
"compare": ">="
+ },
+ "finish__timing__setup__tns": {
+ "value": -245.0,
+ "compare": ">="
+ },
+ "finish__timing__hold__ws": {
+ "value": -63.9,
+ "compare": ">="
+ },
+ "finish__timing__hold__tns": {
+ "value": -262.0,
+ "compare": ">="
+ },
+ "finish__design__instance__area": {
+ "value": 14524,
+ "compare": "<="
}
}
\ No newline at end of file
diff --git a/flow/designs/rapidus2hp/ethmac/config.mk b/flow/designs/rapidus2hp/ethmac/config.mk
index b3507b64a9..1aae962a76 100644
--- a/flow/designs/rapidus2hp/ethmac/config.mk
+++ b/flow/designs/rapidus2hp/ethmac/config.mk
@@ -6,7 +6,7 @@ export VERILOG_FILES = $(sort $(wildcard $(DESIGN_HOME)/src/$(DESIGN_NIC
export SDC_FILE = $(DESIGN_HOME)/$(PLATFORM)/$(DESIGN_NICKNAME)/constraint.sdc
export ABC_AREA = 1
-export CORE_UTILIZATION = 45
+export CORE_UTILIZATION = 70
export CORE_ASPECT_RATIO = 1
export CORE_MARGIN = 0.75
export PLACE_DENSITY = 0.70
diff --git a/flow/designs/rapidus2hp/ethmac/rules-base.json b/flow/designs/rapidus2hp/ethmac/rules-base.json
index 9a9a3d40bd..062d92efb8 100644
--- a/flow/designs/rapidus2hp/ethmac/rules-base.json
+++ b/flow/designs/rapidus2hp/ethmac/rules-base.json
@@ -1,6 +1,146 @@
{
+ "cts__flow__warnings__count:RSZ-0062": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "cts__flow__warnings__count:STA-0122": {
+ "value": 27,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "cts__flow__warnings__count:STA-1257": {
+ "value": 1502,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "detailedplace__flow__warnings__count:STA-1257": {
+ "value": 1502,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "detailedroute__flow__warnings__count:STA-1257": {
+ "value": 1502,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "finish__flow__warnings__count:STA-1257": {
+ "value": 1502,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:EST-0027": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:IFP-0028": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:ODB-0256": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:ODB-0279": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:ODB-0280": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:RSZ-0062": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:RSZ-0075": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:STA-1257": {
+ "value": 1502,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "flow__warnings__count:GPL-0302": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "flow__warnings__count:STA-1257": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalplace__flow__warnings__count:STA-0122": {
+ "value": 27,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalplace__flow__warnings__count:STA-1257": {
+ "value": 1502,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:DRT-0240": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:DRT-0263": {
+ "value": 7,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:DRT-0349": {
+ "value": 10,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:FLW-0010": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:GRT-0246": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:RSZ-0062": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:STA-0122": {
+ "value": 27,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:STA-1257": {
+ "value": 1502,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "placeopt__flow__warnings__count:STA-0122": {
+ "value": 27,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "placeopt__flow__warnings__count:STA-1257": {
+ "value": 1502,
+ "compare": "<=",
+ "level": "warning"
+ },
"synth__design__instance__area__stdcell": {
- "value": 3307.96,
+ "value": 3301.5155,
"compare": "<="
},
"constraints__clocks__count": {
@@ -8,11 +148,11 @@
"compare": "=="
},
"placeopt__design__instance__area": {
- "value": 3774,
+ "value": 3482,
"compare": "<="
},
"placeopt__design__instance__count__stdcell": {
- "value": 70864,
+ "value": 68986,
"compare": "<="
},
"detailedplace__design__violations": {
@@ -20,35 +160,67 @@
"compare": "=="
},
"cts__design__instance__count__setup_buffer": {
- "value": 6162,
+ "value": 5999,
"compare": "<="
},
"cts__design__instance__count__hold_buffer": {
- "value": 6162,
+ "value": 5999,
"compare": "<="
},
- "globalroute__antenna_diodes_count": {
- "value": 0,
- "compare": "<="
+ "cts__timing__setup__ws": {
+ "value": -35.9,
+ "compare": ">="
},
- "finish__timing__setup__ws": {
- "value": -77.13,
+ "cts__timing__setup__tns": {
+ "value": -1359.48,
"compare": ">="
},
- "finish__design__instance__area": {
- "value": 3961,
- "compare": "<="
+ "cts__timing__hold__ws": {
+ "value": -5.5,
+ "compare": ">="
},
- "finish__timing__drv__setup_violation_count": {
- "value": 3081,
- "compare": "<="
+ "cts__timing__hold__tns": {
+ "value": -22.0,
+ "compare": ">="
},
- "finish__timing__drv__hold_violation_count": {
+ "globalroute__antenna_diodes_count": {
"value": 100,
"compare": "<="
},
- "finish__timing__wns_percent_delay": {
- "value": -51.34,
+ "globalroute__timing__setup__ws": {
+ "value": -73.9,
+ "compare": ">="
+ },
+ "globalroute__timing__setup__tns": {
+ "value": -2954.232,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__ws": {
+ "value": -5.5,
"compare": ">="
+ },
+ "globalroute__timing__hold__tns": {
+ "value": -22.0,
+ "compare": ">="
+ },
+ "finish__timing__setup__ws": {
+ "value": -73.9,
+ "compare": ">="
+ },
+ "finish__timing__setup__tns": {
+ "value": -2954.232,
+ "compare": ">="
+ },
+ "finish__timing__hold__ws": {
+ "value": -5.5,
+ "compare": ">="
+ },
+ "finish__timing__hold__tns": {
+ "value": -22.0,
+ "compare": ">="
+ },
+ "finish__design__instance__area": {
+ "value": 3700,
+ "compare": "<="
}
}
\ No newline at end of file
diff --git a/flow/designs/rapidus2hp/gcd/config.mk b/flow/designs/rapidus2hp/gcd/config.mk
index 0dae84d592..f2ee098a1c 100644
--- a/flow/designs/rapidus2hp/gcd/config.mk
+++ b/flow/designs/rapidus2hp/gcd/config.mk
@@ -5,6 +5,6 @@ export PLATFORM = rapidus2hp
export VERILOG_FILES = $(DESIGN_HOME)/src/$(DESIGN_NAME)/gcd.v
export SDC_FILE = $(DESIGN_HOME)/$(PLATFORM)/$(DESIGN_NAME)/constraint.sdc
-export CORE_UTILIZATION = 30
-export CORE_MARGIN = .75
+export CORE_UTILIZATION = 45
+export CORE_MARGIN = .5
export PLACE_DENSITY = 0.42
diff --git a/flow/designs/rapidus2hp/gcd/rules-base.json b/flow/designs/rapidus2hp/gcd/rules-base.json
index 08637fc729..2327221def 100644
--- a/flow/designs/rapidus2hp/gcd/rules-base.json
+++ b/flow/designs/rapidus2hp/gcd/rules-base.json
@@ -1,4 +1,144 @@
{
+ "cts__flow__warnings__count:RSZ-0062": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "cts__flow__warnings__count:STA-0122": {
+ "value": 27,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "cts__flow__warnings__count:STA-1257": {
+ "value": 1502,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "detailedplace__flow__warnings__count:STA-1257": {
+ "value": 1502,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "detailedroute__flow__warnings__count:STA-1257": {
+ "value": 1502,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "finish__flow__warnings__count:STA-1257": {
+ "value": 1502,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:EST-0027": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:IFP-0028": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:ODB-0256": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:ODB-0279": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:ODB-0280": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:RSZ-0062": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:RSZ-0075": {
+ "value": 146,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:STA-1257": {
+ "value": 1502,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "flow__warnings__count:GPL-0302": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "flow__warnings__count:STA-1257": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalplace__flow__warnings__count:GPL-0302": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalplace__flow__warnings__count:STA-0122": {
+ "value": 27,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalplace__flow__warnings__count:STA-1257": {
+ "value": 1502,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:DRT-0240": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:DRT-0263": {
+ "value": 7,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:DRT-0349": {
+ "value": 10,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:GRT-0246": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:RSZ-0062": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:STA-0122": {
+ "value": 27,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:STA-1257": {
+ "value": 1502,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "placeopt__flow__warnings__count:STA-0122": {
+ "value": 27,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "placeopt__flow__warnings__count:STA-1257": {
+ "value": 1502,
+ "compare": "<=",
+ "level": "warning"
+ },
"synth__design__instance__area__stdcell": {
"value": 20.89,
"compare": "<="
@@ -12,7 +152,7 @@
"compare": "<="
},
"placeopt__design__instance__count__stdcell": {
- "value": 758,
+ "value": 696,
"compare": "<="
},
"detailedplace__design__violations": {
@@ -27,28 +167,60 @@
"value": 54,
"compare": "<="
},
- "globalroute__antenna_diodes_count": {
- "value": 0,
- "compare": "<="
+ "cts__timing__setup__ws": {
+ "value": -25.4,
+ "compare": ">="
},
- "finish__timing__setup__ws": {
- "value": -38.69,
+ "cts__timing__setup__tns": {
+ "value": -531,
"compare": ">="
},
- "finish__design__instance__area": {
- "value": 40,
- "compare": "<="
+ "cts__timing__hold__ws": {
+ "value": -5.0,
+ "compare": ">="
},
- "finish__timing__drv__setup_violation_count": {
- "value": 47,
- "compare": "<="
+ "cts__timing__hold__tns": {
+ "value": -20.0,
+ "compare": ">="
},
- "finish__timing__drv__hold_violation_count": {
+ "globalroute__antenna_diodes_count": {
"value": 100,
"compare": "<="
},
- "finish__timing__wns_percent_delay": {
- "value": -45.56,
+ "globalroute__timing__setup__ws": {
+ "value": -40.9,
+ "compare": ">="
+ },
+ "globalroute__timing__setup__tns": {
+ "value": -1124,
"compare": ">="
+ },
+ "globalroute__timing__hold__ws": {
+ "value": -5.0,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__tns": {
+ "value": -20.0,
+ "compare": ">="
+ },
+ "finish__timing__setup__ws": {
+ "value": -40.9,
+ "compare": ">="
+ },
+ "finish__timing__setup__tns": {
+ "value": -1124,
+ "compare": ">="
+ },
+ "finish__timing__hold__ws": {
+ "value": -5.0,
+ "compare": ">="
+ },
+ "finish__timing__hold__tns": {
+ "value": -20.0,
+ "compare": ">="
+ },
+ "finish__design__instance__area": {
+ "value": 37,
+ "compare": "<="
}
}
\ No newline at end of file
diff --git a/flow/designs/rapidus2hp/hercules_idecode/config.mk b/flow/designs/rapidus2hp/hercules_idecode/config.mk
index ed5476c571..b61cc8e3a7 100644
--- a/flow/designs/rapidus2hp/hercules_idecode/config.mk
+++ b/flow/designs/rapidus2hp/hercules_idecode/config.mk
@@ -14,10 +14,18 @@ export VERILOG_INCLUDE_DIRS = $(SRC_HOME)/hercules_idecode/verilog \
export SDC_FILE = $(DESIGN_HOME)/$(PLATFORM)/$(DESIGN_NAME)/prects.sdc
export SYNTH_HDL_FRONTEND ?= slang
-export CORE_UTILIZATION = 25
+ifeq ($(SYNTH_HDL_FRONTEND), slang)
+ export CORE_UTILIZATION = 50
+else
+ export CORE_UTILIZATION = 48
+endif
+
export CORE_MARGIN = 1
export PLACE_DENSITY = 0.50
# a smoketest for this option, there are a
# few last gasp iterations
export SKIP_LAST_GASP ?= 1
+
+export CELL_PAD_IN_SITES_GLOBAL_PLACEMENT = 0
+export CELL_PAD_IN_SITES_DETAIL_PLACEMENT = 0
diff --git a/flow/designs/rapidus2hp/hercules_idecode/rules-base.json b/flow/designs/rapidus2hp/hercules_idecode/rules-base.json
index 140b5dae88..a04778e856 100644
--- a/flow/designs/rapidus2hp/hercules_idecode/rules-base.json
+++ b/flow/designs/rapidus2hp/hercules_idecode/rules-base.json
@@ -1,4 +1,134 @@
{
+ "cts__flow__warnings__count:CTS-0041": {
+ "value": 4,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "cts__flow__warnings__count:RSZ-0062": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "cts__flow__warnings__count:STA-0122": {
+ "value": 27,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "cts__flow__warnings__count:STA-1257": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "detailedplace__flow__warnings__count:STA-1257": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "detailedroute__flow__warnings__count:STA-1257": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "finish__flow__warnings__count:STA-1257": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:EST-0027": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:IFP-0028": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:ODB-0256": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:ODB-0279": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:ODB-0280": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:STA-1257": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "flow__warnings__count:GPL-0302": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "flow__warnings__count:STA-1257": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalplace__flow__warnings__count:STA-0122": {
+ "value": 27,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalplace__flow__warnings__count:STA-1257": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:DRT-0240": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:DRT-0263": {
+ "value": 7,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:DRT-0349": {
+ "value": 10,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:GRT-0246": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:RSZ-0062": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:STA-0122": {
+ "value": 27,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:STA-1257": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "placeopt__flow__warnings__count:STA-0122": {
+ "value": 27,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "placeopt__flow__warnings__count:STA-1257": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
"synth__design__instance__area__stdcell": {
"value": 8732.47,
"compare": "<="
@@ -8,7 +138,7 @@
"compare": "=="
},
"placeopt__design__instance__area": {
- "value": 13530,
+ "value": 12565,
"compare": "<="
},
"placeopt__design__instance__count__stdcell": {
@@ -27,28 +157,60 @@
"value": 27368,
"compare": "<="
},
+ "cts__timing__setup__ws": {
+ "value": -261.0,
+ "compare": ">="
+ },
+ "cts__timing__setup__tns": {
+ "value": -1110000.0,
+ "compare": ">="
+ },
+ "cts__timing__hold__ws": {
+ "value": 0.0,
+ "compare": ">="
+ },
+ "cts__timing__hold__tns": {
+ "value": 0.0,
+ "compare": ">="
+ },
"globalroute__antenna_diodes_count": {
"value": 0,
"compare": "<="
},
- "finish__timing__setup__ws": {
- "value": -504.31,
+ "globalroute__timing__setup__ws": {
+ "value": -227.0,
"compare": ">="
},
- "finish__design__instance__area": {
- "value": 13812,
- "compare": "<="
+ "globalroute__timing__setup__tns": {
+ "value": -564000.0,
+ "compare": ">="
},
- "finish__timing__drv__setup_violation_count": {
- "value": 13684,
- "compare": "<="
+ "globalroute__timing__hold__ws": {
+ "value": -12.5,
+ "compare": ">="
},
- "finish__timing__drv__hold_violation_count": {
- "value": 106,
- "compare": "<="
+ "globalroute__timing__hold__tns": {
+ "value": -50.0,
+ "compare": ">="
+ },
+ "finish__timing__setup__ws": {
+ "value": -227.0,
+ "compare": ">="
},
- "finish__timing__wns_percent_delay": {
- "value": -75.04,
+ "finish__timing__setup__tns": {
+ "value": -564000.0,
"compare": ">="
+ },
+ "finish__timing__hold__ws": {
+ "value": -12.5,
+ "compare": ">="
+ },
+ "finish__timing__hold__tns": {
+ "value": -50.0,
+ "compare": ">="
+ },
+ "finish__design__instance__area": {
+ "value": 12834,
+ "compare": "<="
}
}
\ No newline at end of file
diff --git a/flow/designs/rapidus2hp/hercules_is_int/config.mk b/flow/designs/rapidus2hp/hercules_is_int/config.mk
index 0c9549a576..6f50ed2160 100644
--- a/flow/designs/rapidus2hp/hercules_is_int/config.mk
+++ b/flow/designs/rapidus2hp/hercules_is_int/config.mk
@@ -25,7 +25,11 @@ export SYNTH_HIERARCHICAL ?= 0
ifeq ($(PLACE_SITE), SC6T)
export CORE_UTILIZATION = 30
else
- export CORE_UTILIZATION = 54
+ ifeq ($(SYNTH_HDL_FRONTEND), slang)
+ export CORE_UTILIZATION = 52
+ else
+ export CORE_UTILIZATION = 54
+ endif
endif
export CORE_MARGIN = 1
@@ -62,5 +66,4 @@ export ENABLE_DPO = 0
# \\hercules_is_resc_ls$$hercules_is_int.u_grcl \
# \\hercules_is_sxq$$hercules_is_int.u_sx0_iq \
# \\hercules_is_sxq$$hercules_is_int.u_sx1_iq
-# endif
# endif
diff --git a/flow/designs/rapidus2hp/hercules_is_int/rules-base.json b/flow/designs/rapidus2hp/hercules_is_int/rules-base.json
index 175ba09662..92c9989424 100644
--- a/flow/designs/rapidus2hp/hercules_is_int/rules-base.json
+++ b/flow/designs/rapidus2hp/hercules_is_int/rules-base.json
@@ -1,4 +1,129 @@
{
+ "cts__flow__warnings__count:RSZ-0062": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "cts__flow__warnings__count:STA-0122": {
+ "value": 27,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "cts__flow__warnings__count:STA-1257": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "detailedplace__flow__warnings__count:STA-1257": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "detailedroute__flow__warnings__count:STA-1257": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "finish__flow__warnings__count:STA-1257": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:EST-0027": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:IFP-0028": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:ODB-0256": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:ODB-0279": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:ODB-0280": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:STA-1257": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "flow__warnings__count:STA-1257": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalplace__flow__warnings__count:STA-0122": {
+ "value": 27,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalplace__flow__warnings__count:STA-1257": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:DRT-0240": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:DRT-0263": {
+ "value": 7,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:DRT-0349": {
+ "value": 10,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:GRT-0246": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:RSZ-0062": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:RSZ-0066": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:STA-0122": {
+ "value": 27,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:STA-1257": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "placeopt__flow__warnings__count:STA-0122": {
+ "value": 27,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "placeopt__flow__warnings__count:STA-1257": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
"synth__design__instance__area__stdcell": {
"value": 26631.02,
"compare": "<="
@@ -27,28 +152,60 @@
"value": 64972,
"compare": "<="
},
+ "cts__timing__setup__ws": {
+ "value": -390.0,
+ "compare": ">="
+ },
+ "cts__timing__setup__tns": {
+ "value": -3510000.0,
+ "compare": ">="
+ },
+ "cts__timing__hold__ws": {
+ "value": -12.5,
+ "compare": ">="
+ },
+ "cts__timing__hold__tns": {
+ "value": -50.0,
+ "compare": ">="
+ },
"globalroute__antenna_diodes_count": {
- "value": 0,
+ "value": 652,
"compare": "<="
},
- "finish__timing__setup__ws": {
- "value": -417.07,
+ "globalroute__timing__setup__ws": {
+ "value": -316.0,
"compare": ">="
},
- "finish__design__instance__area": {
- "value": 35330,
- "compare": "<="
+ "globalroute__timing__setup__tns": {
+ "value": -2040000.0,
+ "compare": ">="
},
- "finish__timing__drv__setup_violation_count": {
- "value": 32486,
- "compare": "<="
+ "globalroute__timing__hold__ws": {
+ "value": -55.5,
+ "compare": ">="
},
- "finish__timing__drv__hold_violation_count": {
- "value": 110,
- "compare": "<="
+ "globalroute__timing__hold__tns": {
+ "value": -484.0,
+ "compare": ">="
+ },
+ "finish__timing__setup__ws": {
+ "value": -316.0,
+ "compare": ">="
},
- "finish__timing__wns_percent_delay": {
- "value": -66.06,
+ "finish__timing__setup__tns": {
+ "value": -2040000.0,
"compare": ">="
+ },
+ "finish__timing__hold__ws": {
+ "value": -55.5,
+ "compare": ">="
+ },
+ "finish__timing__hold__tns": {
+ "value": -484.0,
+ "compare": ">="
+ },
+ "finish__design__instance__area": {
+ "value": 35285,
+ "compare": "<="
}
}
\ No newline at end of file
diff --git a/flow/designs/rapidus2hp/ibex/config.mk b/flow/designs/rapidus2hp/ibex/config.mk
index f29c39a686..6aaa7a6122 100644
--- a/flow/designs/rapidus2hp/ibex/config.mk
+++ b/flow/designs/rapidus2hp/ibex/config.mk
@@ -19,7 +19,7 @@ else
export SDC_FILE = $(DESIGN_HOME)/$(PLATFORM)/$(DESIGN_NICKNAME)/constraint.sdc
endif
-export CORE_UTILIZATION = 45
+export CORE_UTILIZATION = 70
export CORE_ASPECT_RATIO = 1
export CORE_MARGIN = 0.75
export PLACE_DENSITY_LB_ADDON = 0.20
diff --git a/flow/designs/rapidus2hp/ibex/rules-base.json b/flow/designs/rapidus2hp/ibex/rules-base.json
index f0e2d9b7b4..7f027ea048 100644
--- a/flow/designs/rapidus2hp/ibex/rules-base.json
+++ b/flow/designs/rapidus2hp/ibex/rules-base.json
@@ -1,4 +1,114 @@
{
+ "cts__flow__warnings__count:STA-0122": {
+ "value": 27,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "cts__flow__warnings__count:STA-1257": {
+ "value": 1502,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "detailedplace__flow__warnings__count:STA-1257": {
+ "value": 1502,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "detailedroute__flow__warnings__count:STA-1257": {
+ "value": 1502,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "finish__flow__warnings__count:STA-1257": {
+ "value": 1502,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:EST-0027": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:IFP-0028": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:ODB-0256": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:ODB-0279": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:ODB-0280": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:STA-1257": {
+ "value": 1502,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "flow__warnings__count:STA-1257": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalplace__flow__warnings__count:STA-0122": {
+ "value": 27,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalplace__flow__warnings__count:STA-1257": {
+ "value": 1502,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:DRT-0240": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:DRT-0263": {
+ "value": 7,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:DRT-0349": {
+ "value": 10,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:GRT-0246": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:STA-0122": {
+ "value": 27,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:STA-1257": {
+ "value": 1502,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "placeopt__flow__warnings__count:STA-0122": {
+ "value": 27,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "placeopt__flow__warnings__count:STA-1257": {
+ "value": 1502,
+ "compare": "<=",
+ "level": "warning"
+ },
"synth__design__instance__area__stdcell": {
"value": 1020.31,
"compare": "<="
@@ -27,28 +137,60 @@
"value": 1708,
"compare": "<="
},
- "globalroute__antenna_diodes_count": {
- "value": 0,
- "compare": "<="
+ "cts__timing__setup__ws": {
+ "value": -29.5,
+ "compare": ">="
},
- "finish__timing__setup__ws": {
- "value": -116.21,
+ "cts__timing__setup__tns": {
+ "value": -118.0,
"compare": ">="
},
- "finish__design__instance__area": {
- "value": 1105,
- "compare": "<="
+ "cts__timing__hold__ws": {
+ "value": -29.5,
+ "compare": ">="
},
- "finish__timing__drv__setup_violation_count": {
- "value": 1411,
- "compare": "<="
+ "cts__timing__hold__tns": {
+ "value": -118.0,
+ "compare": ">="
},
- "finish__timing__drv__hold_violation_count": {
+ "globalroute__antenna_diodes_count": {
"value": 100,
"compare": "<="
},
- "finish__timing__wns_percent_delay": {
- "value": -23.87,
+ "globalroute__timing__setup__ws": {
+ "value": -98.4,
+ "compare": ">="
+ },
+ "globalroute__timing__setup__tns": {
+ "value": -15900.0,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__ws": {
+ "value": -29.5,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__tns": {
+ "value": -118.0,
+ "compare": ">="
+ },
+ "finish__timing__setup__ws": {
+ "value": -98.4,
+ "compare": ">="
+ },
+ "finish__timing__setup__tns": {
+ "value": -15900.0,
+ "compare": ">="
+ },
+ "finish__timing__hold__ws": {
+ "value": -29.5,
+ "compare": ">="
+ },
+ "finish__timing__hold__tns": {
+ "value": -118.0,
"compare": ">="
+ },
+ "finish__design__instance__area": {
+ "value": 1105,
+ "compare": "<="
}
}
\ No newline at end of file
diff --git a/flow/designs/rapidus2hp/jpeg/config.mk b/flow/designs/rapidus2hp/jpeg/config.mk
index e75de0376d..e270e5c3a6 100644
--- a/flow/designs/rapidus2hp/jpeg/config.mk
+++ b/flow/designs/rapidus2hp/jpeg/config.mk
@@ -8,7 +8,7 @@ export VERILOG_INCLUDE_DIRS = $(DESIGN_HOME)/src/$(DESIGN_NICKNAME)/include
export SDC_FILE = $(DESIGN_HOME)/$(PLATFORM)/$(DESIGN_NICKNAME)/jpeg_encoder15_7nm.sdc
export ABC_AREA = 1
-export CORE_UTILIZATION = 45
+export CORE_UTILIZATION = 60
export CORE_ASPECT_RATIO = 1
export CORE_MARGIN = 0.75
export PLACE_DENSITY = 0.62
diff --git a/flow/designs/rapidus2hp/jpeg/rules-base.json b/flow/designs/rapidus2hp/jpeg/rules-base.json
index 7daa322bec..4c785cf45a 100644
--- a/flow/designs/rapidus2hp/jpeg/rules-base.json
+++ b/flow/designs/rapidus2hp/jpeg/rules-base.json
@@ -1,6 +1,116 @@
{
+ "cts__flow__warnings__count:STA-0122": {
+ "value": 27,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "cts__flow__warnings__count:STA-1257": {
+ "value": 1502,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "detailedplace__flow__warnings__count:STA-1257": {
+ "value": 1502,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "detailedroute__flow__warnings__count:STA-1257": {
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@@ -8,11 +118,11 @@
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@@ -20,35 +130,67 @@
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\ No newline at end of file
diff --git a/flow/designs/sky130hd/aes/rules-base.json b/flow/designs/sky130hd/aes/rules-base.json
index e5bbe5d20f..246b465db1 100644
--- a/flow/designs/sky130hd/aes/rules-base.json
+++ b/flow/designs/sky130hd/aes/rules-base.json
@@ -1,4 +1,29 @@
{
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+ "compare": "<=",
+ "level": "warning"
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"value": 99830.94,
"compare": "<="
@@ -27,12 +52,44 @@
"value": 1758,
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},
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+ "compare": ">="
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+ "compare": ">="
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+ "compare": ">="
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+ "cts__timing__hold__tns": {
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+ "compare": ">="
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"globalroute__antenna_diodes_count": {
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+ "value": 100,
"compare": "<="
},
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+ "compare": ">="
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@@ -44,27 +101,43 @@
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+ "compare": ">="
},
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+ "finish__timing__setup__ws": {
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+ "compare": ">="
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+ "finish__design__instance__area": {
+ "value": 141950,
+ "compare": "<="
}
}
\ No newline at end of file
diff --git a/flow/designs/sky130hd/chameleon/rules-base.json b/flow/designs/sky130hd/chameleon/rules-base.json
index 307957befc..babe031688 100644
--- a/flow/designs/sky130hd/chameleon/rules-base.json
+++ b/flow/designs/sky130hd/chameleon/rules-base.json
@@ -1,4 +1,54 @@
{
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+ "level": "warning"
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+ "floorplan__flow__warnings__count:IFP-0028": {
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+ "compare": "<=",
+ "level": "warning"
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+ "compare": "<=",
+ "level": "warning"
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+ "compare": "<=",
+ "level": "warning"
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"value": 27373.26,
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@@ -27,12 +77,44 @@
"value": 6062,
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},
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+ "compare": ">="
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+ "value": 232,
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},
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@@ -44,27 +126,43 @@
"compare": "<="
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+ "value": 100,
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},
- "finish__design__instance__area": {
- "value": 6534921,
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- "compare": "<="
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+ "compare": ">="
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+ "compare": ">="
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+ "compare": ">="
},
- "finish__timing__wns_percent_delay": {
- "value": -10.0,
+ "finish__timing__hold__ws": {
+ "value": -0.35,
"compare": ">="
+ },
+ "finish__timing__hold__tns": {
+ "value": -1.4,
+ "compare": ">="
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+ "finish__design__instance__area": {
+ "value": 6532057,
+ "compare": "<="
}
}
\ No newline at end of file
diff --git a/flow/designs/sky130hd/gcd/rules-base.json b/flow/designs/sky130hd/gcd/rules-base.json
index 84d44831bd..849724e2bd 100644
--- a/flow/designs/sky130hd/gcd/rules-base.json
+++ b/flow/designs/sky130hd/gcd/rules-base.json
@@ -1,6 +1,51 @@
{
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+ "level": "warning"
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+ "floorplan__flow__warnings__count:EST-0027": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:IFP-0028": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:RSZ-0062": {
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+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:RSZ-0075": {
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+ "compare": "<=",
+ "level": "warning"
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+ "globalroute__flow__warnings__count:DRT-0349": {
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+ "level": "warning"
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+ "compare": "<=",
+ "level": "warning"
+ },
"synth__design__instance__area__stdcell": {
- "value": 3027.41,
+ "value": 2760.0,
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},
"constraints__clocks__count": {
@@ -8,11 +53,11 @@
"compare": "=="
},
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+ "value": 4271,
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"detailedplace__design__violations": {
@@ -20,19 +65,51 @@
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+ "value": 46,
"compare": "<="
},
"cts__design__instance__count__hold_buffer": {
"value": 42,
"compare": "<="
},
+ "cts__timing__setup__ws": {
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+ "compare": ">="
+ },
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+ "compare": ">="
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+ "compare": ">="
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+ "compare": ">="
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"globalroute__antenna_diodes_count": {
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+ "value": 100,
"compare": "<="
},
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+ "compare": ">="
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+ "compare": ">="
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+ "compare": ">="
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+ "compare": ">="
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"detailedroute__route__wirelength": {
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"detailedroute__route__drc_errors": {
@@ -44,27 +121,43 @@
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+ "value": 100,
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+ "detailedroute__timing__setup__ws": {
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"compare": ">="
},
- "finish__design__instance__area": {
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- "compare": "<="
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+ "compare": ">="
},
- "finish__timing__drv__setup_violation_count": {
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+ "compare": ">="
},
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"compare": ">="
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+ "compare": ">="
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+ "compare": "<="
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}
\ No newline at end of file
diff --git a/flow/designs/sky130hd/ibex/rules-base.json b/flow/designs/sky130hd/ibex/rules-base.json
index b81cbe7949..9a753c0380 100644
--- a/flow/designs/sky130hd/ibex/rules-base.json
+++ b/flow/designs/sky130hd/ibex/rules-base.json
@@ -1,4 +1,44 @@
{
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+ "compare": "<=",
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+ "level": "warning"
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+ "level": "warning"
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"synth__design__instance__area__stdcell": {
"value": 153658.0,
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@@ -27,12 +67,44 @@
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+ "compare": ">="
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+ "compare": ">="
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+ "compare": ">="
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"globalroute__antenna_diodes_count": {
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+ "value": 100,
"compare": "<="
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+ "compare": ">="
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+ "compare": ">="
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+ "globalroute__timing__hold__tns": {
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+ "compare": ">="
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"detailedroute__route__wirelength": {
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- "compare": "<="
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- "value": 100,
- "compare": "<="
+ "detailedroute__timing__hold__tns": {
+ "value": -2.0,
+ "compare": ">="
+ },
+ "finish__timing__setup__ws": {
+ "value": -0.768,
+ "compare": ">="
+ },
+ "finish__timing__setup__tns": {
+ "value": -4.54,
+ "compare": ">="
},
- "finish__timing__wns_percent_delay": {
- "value": -12.59,
+ "finish__timing__hold__ws": {
+ "value": -0.5,
"compare": ">="
+ },
+ "finish__timing__hold__tns": {
+ "value": -2.0,
+ "compare": ">="
+ },
+ "finish__design__instance__area": {
+ "value": 187501,
+ "compare": "<="
}
}
\ No newline at end of file
diff --git a/flow/designs/sky130hd/jpeg/config.mk b/flow/designs/sky130hd/jpeg/config.mk
index 995fbeda5f..dced6f2bca 100644
--- a/flow/designs/sky130hd/jpeg/config.mk
+++ b/flow/designs/sky130hd/jpeg/config.mk
@@ -13,6 +13,3 @@ export TNS_END_PERCENT = 100
export FASTROUTE_TCL = $(DESIGN_HOME)/$(PLATFORM)/$(DESIGN_NICKNAME)/fastroute.tcl
export REMOVE_ABC_BUFFERS = 1
-
-# workaround for density growing to 0.91 from adjustments on TD/RD iterations
-export GPL_ROUTABILITY_DRIVEN = 0
diff --git a/flow/designs/sky130hd/jpeg/rules-base.json b/flow/designs/sky130hd/jpeg/rules-base.json
index 5a28b52789..1d9d50c238 100644
--- a/flow/designs/sky130hd/jpeg/rules-base.json
+++ b/flow/designs/sky130hd/jpeg/rules-base.json
@@ -1,4 +1,44 @@
{
+ "cts__flow__warnings__count:RSZ-0062": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "detailedroute__flow__warnings__count:DRT-0120": {
+ "value": 64,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "detailedroute__flow__warnings__count:DRT-0349": {
+ "value": 10,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "finish__flow__warnings__count:GUI-0076": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:IFP-0028": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:DRT-0120": {
+ "value": 16,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:DRT-0349": {
+ "value": 10,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:RSZ-0062": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
"synth__design__instance__area__stdcell": {
"value": 463729.45,
"compare": "<="
@@ -8,7 +48,7 @@
"compare": "=="
},
"placeopt__design__instance__area": {
- "value": 497427,
+ "value": 496234,
"compare": "<="
},
"placeopt__design__instance__count__stdcell": {
@@ -27,12 +67,44 @@
"value": 4810,
"compare": "<="
},
+ "cts__timing__setup__ws": {
+ "value": -0.321,
+ "compare": ">="
+ },
+ "cts__timing__setup__tns": {
+ "value": -1.19,
+ "compare": ">="
+ },
+ "cts__timing__hold__ws": {
+ "value": -0.275,
+ "compare": ">="
+ },
+ "cts__timing__hold__tns": {
+ "value": -1.1,
+ "compare": ">="
+ },
"globalroute__antenna_diodes_count": {
- "value": 182,
+ "value": 100,
"compare": "<="
},
+ "globalroute__timing__setup__ws": {
+ "value": -0.477,
+ "compare": ">="
+ },
+ "globalroute__timing__setup__tns": {
+ "value": -11.3,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__ws": {
+ "value": -0.275,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__tns": {
+ "value": -1.1,
+ "compare": ">="
+ },
"detailedroute__route__wirelength": {
- "value": 1362429,
+ "value": 1334833,
"compare": "<="
},
"detailedroute__route__drc_errors": {
@@ -44,27 +116,43 @@
"compare": "<="
},
"detailedroute__antenna_diodes_count": {
- "value": 75,
+ "value": 100,
"compare": "<="
},
- "finish__timing__setup__ws": {
- "value": -0.2,
+ "detailedroute__timing__setup__ws": {
+ "value": -0.275,
"compare": ">="
},
- "finish__design__instance__area": {
- "value": 520067,
- "compare": "<="
+ "detailedroute__timing__setup__tns": {
+ "value": -1.1,
+ "compare": ">="
},
- "finish__timing__drv__setup_violation_count": {
- "value": 2405,
- "compare": "<="
+ "detailedroute__timing__hold__ws": {
+ "value": -0.275,
+ "compare": ">="
},
- "finish__timing__drv__hold_violation_count": {
- "value": 100,
- "compare": "<="
+ "detailedroute__timing__hold__tns": {
+ "value": -1.1,
+ "compare": ">="
+ },
+ "finish__timing__setup__ws": {
+ "value": -0.275,
+ "compare": ">="
+ },
+ "finish__timing__setup__tns": {
+ "value": -1.1,
+ "compare": ">="
},
- "finish__timing__wns_percent_delay": {
- "value": -10.0,
+ "finish__timing__hold__ws": {
+ "value": -0.275,
"compare": ">="
+ },
+ "finish__timing__hold__tns": {
+ "value": -1.1,
+ "compare": ">="
+ },
+ "finish__design__instance__area": {
+ "value": 520067,
+ "compare": "<="
}
}
\ No newline at end of file
diff --git a/flow/designs/sky130hd/microwatt/config.mk b/flow/designs/sky130hd/microwatt/config.mk
index 86bb37ea08..5960708a65 100644
--- a/flow/designs/sky130hd/microwatt/config.mk
+++ b/flow/designs/sky130hd/microwatt/config.mk
@@ -21,21 +21,9 @@ export ADDITIONAL_LIBS = $(wildcard $(microwatt_DIR)/lib/*.lib)
export SYNTH_HIERARCHICAL = 1
-export MACRO_PLACE_HALO = 100 100
+export PLACE_DENSITY = 0.3
-# We use large placement blockages to try eliminating the channels between
-# RAMs in order to make that space inaccessible for GPL. Experiments have
-# showed that connections crossing the RAMs vertically can be painful to
-# route.
-export MACRO_BLOCKAGE_HALO = 151
-
-# There's less space due to the adapted blockage halos, so GPL requires a
-# higher density in order to run.
-export PLACE_DENSITY = 0.2
-
-# Extra effort to ease routing: avoid very tall std cell clusters in MPL.
-export RTLMP_MIN_AR = 0.40
-export RTLMP_NOTCH_WT = 20.0
+export MACRO_PLACE_HALO = 60 60
# CTS tuning
export CTS_BUF_DISTANCE = 600
diff --git a/flow/designs/sky130hd/microwatt/rules-base.json b/flow/designs/sky130hd/microwatt/rules-base.json
index 7cc26b6793..06eed0896c 100644
--- a/flow/designs/sky130hd/microwatt/rules-base.json
+++ b/flow/designs/sky130hd/microwatt/rules-base.json
@@ -1,4 +1,94 @@
{
+ "cts__flow__warnings__count:CTS-0041": {
+ "value": 11,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "cts__flow__warnings__count:RSZ-0062": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "detailedroute__flow__warnings__count:DRT-0120": {
+ "value": 6,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "detailedroute__flow__warnings__count:DRT-0349": {
+ "value": 10,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "detailedroute__flow__warnings__count:GRT-0243": {
+ "value": 2,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "finish__flow__warnings__count:GUI-0076": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:EST-0027": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:IFP-0028": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:ODB-0220": {
+ "value": 4,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:RSZ-0062": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:RSZ-0075": {
+ "value": 1001,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "flow__warnings__count:PDN-0110": {
+ "value": 123,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:DRT-0120": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:DRT-0349": {
+ "value": 10,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:FLW-0010": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:GRT-0243": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:RSZ-0062": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "placeopt__flow__warnings__count:RSZ-0095": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
"synth__design__instance__area__stdcell": {
"value": 732007.18,
"compare": "<="
@@ -8,7 +98,7 @@
"compare": "=="
},
"placeopt__design__instance__area": {
- "value": 5449862,
+ "value": 5444158,
"compare": "<="
},
"placeopt__design__instance__count__stdcell": {
@@ -27,12 +117,44 @@
"value": 15868,
"compare": "<="
},
+ "cts__timing__setup__ws": {
+ "value": -2.36,
+ "compare": ">="
+ },
+ "cts__timing__setup__tns": {
+ "value": -405.0,
+ "compare": ">="
+ },
+ "cts__timing__hold__ws": {
+ "value": -0.75,
+ "compare": ">="
+ },
+ "cts__timing__hold__tns": {
+ "value": -3.0,
+ "compare": ">="
+ },
"globalroute__antenna_diodes_count": {
- "value": 4688,
+ "value": 2548,
"compare": "<="
},
+ "globalroute__timing__setup__ws": {
+ "value": -2.53,
+ "compare": ">="
+ },
+ "globalroute__timing__setup__tns": {
+ "value": -420.0,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__ws": {
+ "value": -0.75,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__tns": {
+ "value": -3.0,
+ "compare": ">="
+ },
"detailedroute__route__wirelength": {
- "value": 8784214,
+ "value": 8055403,
"compare": "<="
},
"detailedroute__route__drc_errors": {
@@ -40,31 +162,47 @@
"compare": "<="
},
"detailedroute__antenna__violating__nets": {
- "value": 5,
+ "value": 0,
"compare": "<="
},
"detailedroute__antenna_diodes_count": {
- "value": 2478,
+ "value": 1274,
"compare": "<="
},
- "finish__timing__setup__ws": {
- "value": -2.09,
+ "detailedroute__timing__setup__ws": {
+ "value": -1.75,
"compare": ">="
},
- "finish__design__instance__area": {
- "value": 5601374,
- "compare": "<="
+ "detailedroute__timing__setup__tns": {
+ "value": -121.0,
+ "compare": ">="
},
- "finish__timing__drv__setup_violation_count": {
- "value": 7934,
- "compare": "<="
+ "detailedroute__timing__hold__ws": {
+ "value": -3.25,
+ "compare": ">="
},
- "finish__timing__drv__hold_violation_count": {
- "value": 120,
- "compare": "<="
+ "detailedroute__timing__hold__tns": {
+ "value": -428.0,
+ "compare": ">="
+ },
+ "finish__timing__setup__ws": {
+ "value": -2.49,
+ "compare": ">="
},
- "finish__timing__wns_percent_delay": {
- "value": -17.68,
+ "finish__timing__setup__tns": {
+ "value": -399.0,
"compare": ">="
+ },
+ "finish__timing__hold__ws": {
+ "value": -0.866,
+ "compare": ">="
+ },
+ "finish__timing__hold__tns": {
+ "value": -4.42,
+ "compare": ">="
+ },
+ "finish__design__instance__area": {
+ "value": 5582894,
+ "compare": "<="
}
}
\ No newline at end of file
diff --git a/flow/designs/sky130hd/riscv32i/rules-base.json b/flow/designs/sky130hd/riscv32i/rules-base.json
index 1b33fd67b6..e5d4cfb43e 100644
--- a/flow/designs/sky130hd/riscv32i/rules-base.json
+++ b/flow/designs/sky130hd/riscv32i/rules-base.json
@@ -1,4 +1,34 @@
{
+ "cts__flow__warnings__count:RSZ-0062": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "detailedroute__flow__warnings__count:DRT-0349": {
+ "value": 10,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "finish__flow__warnings__count:GUI-0076": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:IFP-0028": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:DRT-0349": {
+ "value": 10,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:RSZ-0062": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
"synth__design__instance__area__stdcell": {
"value": 70778.51,
"compare": "<="
@@ -27,12 +57,44 @@
"value": 636,
"compare": "<="
},
+ "cts__timing__setup__ws": {
+ "value": -1.85,
+ "compare": ">="
+ },
+ "cts__timing__setup__tns": {
+ "value": -47.5,
+ "compare": ">="
+ },
+ "cts__timing__hold__ws": {
+ "value": -0.3,
+ "compare": ">="
+ },
+ "cts__timing__hold__tns": {
+ "value": -1.2,
+ "compare": ">="
+ },
"globalroute__antenna_diodes_count": {
- "value": 4,
+ "value": 100,
"compare": "<="
},
+ "globalroute__timing__setup__ws": {
+ "value": -2.07,
+ "compare": ">="
+ },
+ "globalroute__timing__setup__tns": {
+ "value": -131.0,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__ws": {
+ "value": -0.3,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__tns": {
+ "value": -1.2,
+ "compare": ">="
+ },
"detailedroute__route__wirelength": {
- "value": 297104,
+ "value": 294316,
"compare": "<="
},
"detailedroute__route__drc_errors": {
@@ -44,27 +106,43 @@
"compare": "<="
},
"detailedroute__antenna_diodes_count": {
- "value": 9,
+ "value": 100,
"compare": "<="
},
- "finish__timing__setup__ws": {
- "value": -1.24,
+ "detailedroute__timing__setup__ws": {
+ "value": -0.903,
"compare": ">="
},
- "finish__design__instance__area": {
- "value": 83704,
- "compare": "<="
+ "detailedroute__timing__setup__tns": {
+ "value": -5.59,
+ "compare": ">="
},
- "finish__timing__drv__setup_violation_count": {
- "value": 318,
- "compare": "<="
+ "detailedroute__timing__hold__ws": {
+ "value": -0.3,
+ "compare": ">="
},
- "finish__timing__drv__hold_violation_count": {
- "value": 100,
- "compare": "<="
+ "detailedroute__timing__hold__tns": {
+ "value": -1.2,
+ "compare": ">="
+ },
+ "finish__timing__setup__ws": {
+ "value": -1.85,
+ "compare": ">="
+ },
+ "finish__timing__setup__tns": {
+ "value": -61.0,
+ "compare": ">="
},
- "finish__timing__wns_percent_delay": {
- "value": -28.53,
+ "finish__timing__hold__ws": {
+ "value": -0.3,
"compare": ">="
+ },
+ "finish__timing__hold__tns": {
+ "value": -1.2,
+ "compare": ">="
+ },
+ "finish__design__instance__area": {
+ "value": 83703,
+ "compare": "<="
}
}
\ No newline at end of file
diff --git a/flow/designs/sky130hs/aes/rules-base.json b/flow/designs/sky130hs/aes/rules-base.json
index e79f8ae86f..e5449e13d3 100644
--- a/flow/designs/sky130hs/aes/rules-base.json
+++ b/flow/designs/sky130hs/aes/rules-base.json
@@ -1,4 +1,39 @@
{
+ "cts__flow__warnings__count:RSZ-0062": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "detailedroute__flow__warnings__count:DRT-0349": {
+ "value": 10,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "finish__flow__warnings__count:GUI-0076": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:IFP-0028": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:ODB-0220": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:DRT-0349": {
+ "value": 10,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:RSZ-0062": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
"synth__design__instance__area__stdcell": {
"value": 134349.28,
"compare": "<="
@@ -27,10 +62,42 @@
"value": 1492,
"compare": "<="
},
+ "cts__timing__setup__ws": {
+ "value": -0.357,
+ "compare": ">="
+ },
+ "cts__timing__setup__tns": {
+ "value": -0.584,
+ "compare": ">="
+ },
+ "cts__timing__hold__ws": {
+ "value": -0.14,
+ "compare": ">="
+ },
+ "cts__timing__hold__tns": {
+ "value": -0.56,
+ "compare": ">="
+ },
"globalroute__antenna_diodes_count": {
- "value": 20,
+ "value": 100,
"compare": "<="
},
+ "globalroute__timing__setup__ws": {
+ "value": -0.585,
+ "compare": ">="
+ },
+ "globalroute__timing__setup__tns": {
+ "value": -5.4,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__ws": {
+ "value": -0.14,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__tns": {
+ "value": -0.56,
+ "compare": ">="
+ },
"detailedroute__route__wirelength": {
"value": 722796,
"compare": "<="
@@ -44,27 +111,43 @@
"compare": "<="
},
"detailedroute__antenna_diodes_count": {
- "value": 15,
+ "value": 100,
"compare": "<="
},
- "finish__timing__setup__ws": {
- "value": -0.45,
+ "detailedroute__timing__setup__ws": {
+ "value": -0.14,
"compare": ">="
},
- "finish__design__instance__area": {
- "value": 184400,
- "compare": "<="
+ "detailedroute__timing__setup__tns": {
+ "value": -0.56,
+ "compare": ">="
},
- "finish__timing__drv__setup_violation_count": {
- "value": 746,
- "compare": "<="
+ "detailedroute__timing__hold__ws": {
+ "value": -0.14,
+ "compare": ">="
},
- "finish__timing__drv__hold_violation_count": {
- "value": 100,
- "compare": "<="
+ "detailedroute__timing__hold__tns": {
+ "value": -0.56,
+ "compare": ">="
+ },
+ "finish__timing__setup__ws": {
+ "value": -0.313,
+ "compare": ">="
+ },
+ "finish__timing__setup__tns": {
+ "value": -1.34,
+ "compare": ">="
},
- "finish__timing__wns_percent_delay": {
- "value": -10.0,
+ "finish__timing__hold__ws": {
+ "value": -0.14,
"compare": ">="
+ },
+ "finish__timing__hold__tns": {
+ "value": -0.56,
+ "compare": ">="
+ },
+ "finish__design__instance__area": {
+ "value": 184400,
+ "compare": "<="
}
}
\ No newline at end of file
diff --git a/flow/designs/sky130hs/gcd/rules-base.json b/flow/designs/sky130hs/gcd/rules-base.json
index 72b426c468..aa697ab1e2 100644
--- a/flow/designs/sky130hs/gcd/rules-base.json
+++ b/flow/designs/sky130hs/gcd/rules-base.json
@@ -1,4 +1,34 @@
{
+ "detailedroute__flow__warnings__count:DRT-0349": {
+ "value": 10,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "finish__flow__warnings__count:GUI-0076": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:EST-0027": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:IFP-0028": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:ODB-0220": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:DRT-0349": {
+ "value": 10,
+ "compare": "<=",
+ "level": "warning"
+ },
"synth__design__instance__area__stdcell": {
"value": 4532.91,
"compare": "<="
@@ -27,12 +57,44 @@
"value": 54,
"compare": "<="
},
+ "cts__timing__setup__ws": {
+ "value": -0.095,
+ "compare": ">="
+ },
+ "cts__timing__setup__tns": {
+ "value": -0.38,
+ "compare": ">="
+ },
+ "cts__timing__hold__ws": {
+ "value": -0.095,
+ "compare": ">="
+ },
+ "cts__timing__hold__tns": {
+ "value": -0.38,
+ "compare": ">="
+ },
"globalroute__antenna_diodes_count": {
- "value": 0,
+ "value": 100,
"compare": "<="
},
+ "globalroute__timing__setup__ws": {
+ "value": -0.095,
+ "compare": ">="
+ },
+ "globalroute__timing__setup__tns": {
+ "value": -0.38,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__ws": {
+ "value": -0.095,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__tns": {
+ "value": -0.38,
+ "compare": ">="
+ },
"detailedroute__route__wirelength": {
- "value": 10678,
+ "value": 10120,
"compare": "<="
},
"detailedroute__route__drc_errors": {
@@ -44,27 +106,43 @@
"compare": "<="
},
"detailedroute__antenna_diodes_count": {
- "value": 5,
+ "value": 100,
"compare": "<="
},
- "finish__timing__setup__ws": {
- "value": 0.0,
+ "detailedroute__timing__setup__ws": {
+ "value": -0.095,
"compare": ">="
},
- "finish__design__instance__area": {
- "value": 5548,
- "compare": "<="
+ "detailedroute__timing__setup__tns": {
+ "value": -0.38,
+ "compare": ">="
},
- "finish__timing__drv__setup_violation_count": {
- "value": 27,
- "compare": "<="
+ "detailedroute__timing__hold__ws": {
+ "value": -0.095,
+ "compare": ">="
},
- "finish__timing__drv__hold_violation_count": {
- "value": 100,
- "compare": "<="
+ "detailedroute__timing__hold__tns": {
+ "value": -0.38,
+ "compare": ">="
+ },
+ "finish__timing__setup__ws": {
+ "value": -0.095,
+ "compare": ">="
+ },
+ "finish__timing__setup__tns": {
+ "value": -0.38,
+ "compare": ">="
+ },
+ "finish__timing__hold__ws": {
+ "value": -0.095,
+ "compare": ">="
},
- "finish__timing__wns_percent_delay": {
- "value": -10.0,
+ "finish__timing__hold__tns": {
+ "value": -0.38,
"compare": ">="
+ },
+ "finish__design__instance__area": {
+ "value": 5389,
+ "compare": "<="
}
}
\ No newline at end of file
diff --git a/flow/designs/sky130hs/ibex/rules-base.json b/flow/designs/sky130hs/ibex/rules-base.json
index fe44a9bb8e..cdc5c20e37 100644
--- a/flow/designs/sky130hs/ibex/rules-base.json
+++ b/flow/designs/sky130hs/ibex/rules-base.json
@@ -1,6 +1,51 @@
{
+ "cts__flow__warnings__count:RSZ-0062": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "detailedroute__flow__warnings__count:DRT-0120": {
+ "value": 3,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "detailedroute__flow__warnings__count:DRT-0349": {
+ "value": 10,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "finish__flow__warnings__count:GUI-0076": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:IFP-0028": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:ODB-0220": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:DRT-0120": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:DRT-0349": {
+ "value": 10,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:RSZ-0062": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
"synth__design__instance__area__stdcell": {
- "value": 214910.32,
+ "value": 214573.94,
"compare": "<="
},
"constraints__clocks__count": {
@@ -8,7 +53,7 @@
"compare": "=="
},
"placeopt__design__instance__area": {
- "value": 235081,
+ "value": 232924,
"compare": "<="
},
"placeopt__design__instance__count__stdcell": {
@@ -27,10 +72,42 @@
"value": 1690,
"compare": "<="
},
+ "cts__timing__setup__ws": {
+ "value": -0.629,
+ "compare": ">="
+ },
+ "cts__timing__setup__tns": {
+ "value": -2.53,
+ "compare": ">="
+ },
+ "cts__timing__hold__ws": {
+ "value": -0.35,
+ "compare": ">="
+ },
+ "cts__timing__hold__tns": {
+ "value": -1.4,
+ "compare": ">="
+ },
"globalroute__antenna_diodes_count": {
- "value": 20,
+ "value": 100,
"compare": "<="
},
+ "globalroute__timing__setup__ws": {
+ "value": -0.95,
+ "compare": ">="
+ },
+ "globalroute__timing__setup__tns": {
+ "value": -250.0,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__ws": {
+ "value": -0.35,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__tns": {
+ "value": -1.4,
+ "compare": ">="
+ },
"detailedroute__route__wirelength": {
"value": 845495,
"compare": "<="
@@ -44,27 +121,43 @@
"compare": "<="
},
"detailedroute__antenna_diodes_count": {
- "value": 38,
+ "value": 100,
"compare": "<="
},
- "finish__timing__setup__ws": {
- "value": -0.56,
+ "detailedroute__timing__setup__ws": {
+ "value": -0.35,
"compare": ">="
},
- "finish__design__instance__area": {
- "value": 253949,
- "compare": "<="
+ "detailedroute__timing__setup__tns": {
+ "value": -1.4,
+ "compare": ">="
},
- "finish__timing__drv__setup_violation_count": {
- "value": 845,
- "compare": "<="
+ "detailedroute__timing__hold__ws": {
+ "value": -0.35,
+ "compare": ">="
},
- "finish__timing__drv__hold_violation_count": {
- "value": 100,
- "compare": "<="
+ "detailedroute__timing__hold__tns": {
+ "value": -1.4,
+ "compare": ">="
},
- "finish__timing__wns_percent_delay": {
- "value": -10.0,
+ "finish__timing__setup__ws": {
+ "value": -0.859,
"compare": ">="
+ },
+ "finish__timing__setup__tns": {
+ "value": -85.9,
+ "compare": ">="
+ },
+ "finish__timing__hold__ws": {
+ "value": -0.35,
+ "compare": ">="
+ },
+ "finish__timing__hold__tns": {
+ "value": -1.4,
+ "compare": ">="
+ },
+ "finish__design__instance__area": {
+ "value": 250383,
+ "compare": "<="
}
}
\ No newline at end of file
diff --git a/flow/designs/sky130hs/jpeg/rules-base.json b/flow/designs/sky130hs/jpeg/rules-base.json
index 501e8010b2..ef42b4eb34 100644
--- a/flow/designs/sky130hs/jpeg/rules-base.json
+++ b/flow/designs/sky130hs/jpeg/rules-base.json
@@ -1,4 +1,49 @@
{
+ "detailedroute__flow__warnings__count:DRT-0120": {
+ "value": 36,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "detailedroute__flow__warnings__count:DRT-0349": {
+ "value": 10,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "finish__flow__warnings__count:GUI-0076": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:EST-0027": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:IFP-0028": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:ODB-0220": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:RSZ-0062": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:DRT-0120": {
+ "value": 9,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:DRT-0349": {
+ "value": 10,
+ "compare": "<=",
+ "level": "warning"
+ },
"synth__design__instance__area__stdcell": {
"value": 653350.08,
"compare": "<="
@@ -8,7 +53,7 @@
"compare": "=="
},
"placeopt__design__instance__area": {
- "value": 685257,
+ "value": 683485,
"compare": "<="
},
"placeopt__design__instance__count__stdcell": {
@@ -27,10 +72,42 @@
"value": 5511,
"compare": "<="
},
+ "cts__timing__setup__ws": {
+ "value": -0.2,
+ "compare": ">="
+ },
+ "cts__timing__setup__tns": {
+ "value": -0.8,
+ "compare": ">="
+ },
+ "cts__timing__hold__ws": {
+ "value": -0.2,
+ "compare": ">="
+ },
+ "cts__timing__hold__tns": {
+ "value": -0.8,
+ "compare": ">="
+ },
"globalroute__antenna_diodes_count": {
- "value": 208,
+ "value": 332,
"compare": "<="
},
+ "globalroute__timing__setup__ws": {
+ "value": -0.208,
+ "compare": ">="
+ },
+ "globalroute__timing__setup__tns": {
+ "value": -0.809,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__ws": {
+ "value": -0.2,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__tns": {
+ "value": -0.8,
+ "compare": ">="
+ },
"detailedroute__route__wirelength": {
"value": 1619030,
"compare": "<="
@@ -44,27 +121,43 @@
"compare": "<="
},
"detailedroute__antenna_diodes_count": {
- "value": 182,
+ "value": 100,
"compare": "<="
},
- "finish__timing__setup__ws": {
- "value": 0.0,
+ "detailedroute__timing__setup__ws": {
+ "value": -0.2,
"compare": ">="
},
- "finish__design__instance__area": {
- "value": 724792,
- "compare": "<="
+ "detailedroute__timing__setup__tns": {
+ "value": -0.8,
+ "compare": ">="
},
- "finish__timing__drv__setup_violation_count": {
- "value": 2755,
- "compare": "<="
+ "detailedroute__timing__hold__ws": {
+ "value": -0.2,
+ "compare": ">="
},
- "finish__timing__drv__hold_violation_count": {
- "value": 100,
- "compare": "<="
+ "detailedroute__timing__hold__tns": {
+ "value": -0.8,
+ "compare": ">="
+ },
+ "finish__timing__setup__ws": {
+ "value": -0.2,
+ "compare": ">="
+ },
+ "finish__timing__setup__tns": {
+ "value": -0.8,
+ "compare": ">="
},
- "finish__timing__wns_percent_delay": {
- "value": -10.0,
+ "finish__timing__hold__ws": {
+ "value": -0.2,
"compare": ">="
+ },
+ "finish__timing__hold__tns": {
+ "value": -0.8,
+ "compare": ">="
+ },
+ "finish__design__instance__area": {
+ "value": 724792,
+ "compare": "<="
}
}
\ No newline at end of file
diff --git a/flow/designs/sky130hs/riscv32i/rules-base.json b/flow/designs/sky130hs/riscv32i/rules-base.json
index d9abda05c8..f996a8f5b2 100644
--- a/flow/designs/sky130hs/riscv32i/rules-base.json
+++ b/flow/designs/sky130hs/riscv32i/rules-base.json
@@ -1,4 +1,39 @@
{
+ "cts__flow__warnings__count:RSZ-0062": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "detailedroute__flow__warnings__count:DRT-0349": {
+ "value": 10,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "finish__flow__warnings__count:GUI-0076": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:IFP-0028": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "floorplan__flow__warnings__count:ODB-0220": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:DRT-0349": {
+ "value": 10,
+ "compare": "<=",
+ "level": "warning"
+ },
+ "globalroute__flow__warnings__count:RSZ-0062": {
+ "value": 1,
+ "compare": "<=",
+ "level": "warning"
+ },
"synth__design__instance__area__stdcell": {
"value": 97352.63,
"compare": "<="
@@ -27,12 +62,44 @@
"value": 656,
"compare": "<="
},
+ "cts__timing__setup__ws": {
+ "value": -0.617,
+ "compare": ">="
+ },
+ "cts__timing__setup__tns": {
+ "value": -25.6,
+ "compare": ">="
+ },
+ "cts__timing__hold__ws": {
+ "value": -0.24,
+ "compare": ">="
+ },
+ "cts__timing__hold__tns": {
+ "value": -0.96,
+ "compare": ">="
+ },
"globalroute__antenna_diodes_count": {
- "value": 3,
+ "value": 100,
"compare": "<="
},
+ "globalroute__timing__setup__ws": {
+ "value": -1.05,
+ "compare": ">="
+ },
+ "globalroute__timing__setup__tns": {
+ "value": -82.3,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__ws": {
+ "value": -0.24,
+ "compare": ">="
+ },
+ "globalroute__timing__hold__tns": {
+ "value": -0.96,
+ "compare": ">="
+ },
"detailedroute__route__wirelength": {
- "value": 363444,
+ "value": 355618,
"compare": "<="
},
"detailedroute__route__drc_errors": {
@@ -44,27 +111,43 @@
"compare": "<="
},
"detailedroute__antenna_diodes_count": {
- "value": 9,
+ "value": 100,
"compare": "<="
},
- "finish__timing__setup__ws": {
- "value": -0.48,
+ "detailedroute__timing__setup__ws": {
+ "value": -0.24,
"compare": ">="
},
- "finish__design__instance__area": {
- "value": 126635,
- "compare": "<="
+ "detailedroute__timing__setup__tns": {
+ "value": -0.96,
+ "compare": ">="
},
- "finish__timing__drv__setup_violation_count": {
- "value": 328,
- "compare": "<="
+ "detailedroute__timing__hold__ws": {
+ "value": -0.24,
+ "compare": ">="
},
- "finish__timing__drv__hold_violation_count": {
- "value": 100,
- "compare": "<="
+ "detailedroute__timing__hold__tns": {
+ "value": -0.96,
+ "compare": ">="
+ },
+ "finish__timing__setup__ws": {
+ "value": -0.859,
+ "compare": ">="
+ },
+ "finish__timing__setup__tns": {
+ "value": -15.6,
+ "compare": ">="
+ },
+ "finish__timing__hold__ws": {
+ "value": -0.24,
+ "compare": ">="
},
- "finish__timing__wns_percent_delay": {
- "value": -22.09,
+ "finish__timing__hold__tns": {
+ "value": -0.96,
"compare": ">="
+ },
+ "finish__design__instance__area": {
+ "value": 112385,
+ "compare": "<="
}
}
\ No newline at end of file
diff --git a/flow/designs/src/mock-array/.gitignore b/flow/designs/src/mock-array/.gitignore
deleted file mode 100644
index 3e5c0ff96d..0000000000
--- a/flow/designs/src/mock-array/.gitignore
+++ /dev/null
@@ -1,10 +0,0 @@
-*.anno.json
-*.fir
-project/
-target/
-.metals/
-.vscode/
-.bloop/
-.bsp/
-test_run_dir/
-*.f
diff --git a/flow/designs/src/mock-array/.scalafmt.conf b/flow/designs/src/mock-array/.scalafmt.conf
deleted file mode 100644
index 1a33eb38a1..0000000000
--- a/flow/designs/src/mock-array/.scalafmt.conf
+++ /dev/null
@@ -1,2 +0,0 @@
-version = "3.7.10"
-runner.dialect = scala213
\ No newline at end of file
diff --git a/flow/designs/src/mock-array/BUILD.bazel b/flow/designs/src/mock-array/BUILD.bazel
deleted file mode 100644
index fc10b865c2..0000000000
--- a/flow/designs/src/mock-array/BUILD.bazel
+++ /dev/null
@@ -1,7 +0,0 @@
-exports_files(["util.tcl"] + glob(["*.v"]))
-
-filegroup(
- name = "verilog",
- srcs = glob(["*.v"]),
- visibility = ["//visibility:public"],
-)
diff --git a/flow/designs/src/mock-array/Element.v b/flow/designs/src/mock-array/Element.v
deleted file mode 100644
index bb3256d49d..0000000000
--- a/flow/designs/src/mock-array/Element.v
+++ /dev/null
@@ -1,131 +0,0 @@
-module Element(
- input clock,
- input [63:0] io_ins_down,
- input [63:0] io_ins_right,
- input [63:0] io_ins_up,
- input [63:0] io_ins_left,
- output [63:0] io_outs_down,
- output [63:0] io_outs_right,
- output [63:0] io_outs_up,
- output [63:0] io_outs_left,
- input io_lsbIns_1,
- input io_lsbIns_2,
- input io_lsbIns_3,
- input io_lsbIns_4,
- input io_lsbIns_5,
- input io_lsbIns_6,
- input io_lsbIns_7,
- output io_lsbOuts_0,
- output io_lsbOuts_1,
- output io_lsbOuts_2,
- output io_lsbOuts_3,
- output io_lsbOuts_4,
- output io_lsbOuts_5,
- output io_lsbOuts_6,
- output io_lsbOuts_7
-);
- wire [31:0] io_outs_left_mult_a;
- wire [31:0] io_outs_left_mult_b;
- wire [31:0] io_outs_left_mult_o;
- wire io_outs_left_mult_rst;
- wire io_outs_left_mult_clk;
- wire [31:0] io_outs_up_mult_a;
- wire [31:0] io_outs_up_mult_b;
- wire [31:0] io_outs_up_mult_o;
- wire io_outs_up_mult_rst;
- wire io_outs_up_mult_clk;
- wire [31:0] io_outs_right_mult_a;
- wire [31:0] io_outs_right_mult_b;
- wire [31:0] io_outs_right_mult_o;
- wire io_outs_right_mult_rst;
- wire io_outs_right_mult_clk;
- wire [31:0] io_outs_down_mult_a;
- wire [31:0] io_outs_down_mult_b;
- wire [31:0] io_outs_down_mult_o;
- wire io_outs_down_mult_rst;
- wire io_outs_down_mult_clk;
- reg [63:0] REG;
- reg [63:0] REG_1;
- reg [63:0] REG_2;
- reg [63:0] REG_3;
- reg [63:0] REG_4;
- reg [63:0] REG_5;
- reg [63:0] REG_6;
- reg [63:0] REG_7;
- reg [15:0] io_outs_left_REG;
- reg [15:0] io_outs_up_REG;
- reg [15:0] io_outs_right_REG;
- reg [15:0] io_outs_down_REG;
- reg REG_8;
- multiplier io_outs_left_mult (
- .a(io_outs_left_mult_a),
- .b(io_outs_left_mult_b),
- .o(io_outs_left_mult_o),
- .rst(io_outs_left_mult_rst),
- .clk(io_outs_left_mult_clk)
- );
- multiplier io_outs_up_mult (
- .a(io_outs_up_mult_a),
- .b(io_outs_up_mult_b),
- .o(io_outs_up_mult_o),
- .rst(io_outs_up_mult_rst),
- .clk(io_outs_up_mult_clk)
- );
- multiplier io_outs_right_mult (
- .a(io_outs_right_mult_a),
- .b(io_outs_right_mult_b),
- .o(io_outs_right_mult_o),
- .rst(io_outs_right_mult_rst),
- .clk(io_outs_right_mult_clk)
- );
- multiplier io_outs_down_mult (
- .a(io_outs_down_mult_a),
- .b(io_outs_down_mult_b),
- .o(io_outs_down_mult_o),
- .rst(io_outs_down_mult_rst),
- .clk(io_outs_down_mult_clk)
- );
- assign io_outs_down = {{48'd0}, io_outs_down_REG};
- assign io_outs_right = {{48'd0}, io_outs_right_REG};
- assign io_outs_up = {{48'd0}, io_outs_up_REG};
- assign io_outs_left = {{48'd0}, io_outs_left_REG};
- assign io_lsbOuts_0 = io_lsbIns_1;
- assign io_lsbOuts_1 = io_lsbIns_2;
- assign io_lsbOuts_2 = io_lsbIns_3;
- assign io_lsbOuts_3 = REG_8;
- assign io_lsbOuts_4 = io_lsbIns_5;
- assign io_lsbOuts_5 = io_lsbIns_6;
- assign io_lsbOuts_6 = io_lsbIns_7;
- assign io_lsbOuts_7 = io_outs_left[0];
- assign io_outs_left_mult_a = REG[31:0];
- assign io_outs_left_mult_b = REG_1[31:0];
- assign io_outs_left_mult_rst = 1'h0;
- assign io_outs_left_mult_clk = clock;
- assign io_outs_up_mult_a = REG_2[31:0];
- assign io_outs_up_mult_b = REG_3[31:0];
- assign io_outs_up_mult_rst = 1'h0;
- assign io_outs_up_mult_clk = clock;
- assign io_outs_right_mult_a = REG_4[31:0];
- assign io_outs_right_mult_b = REG_5[31:0];
- assign io_outs_right_mult_rst = 1'h0;
- assign io_outs_right_mult_clk = clock;
- assign io_outs_down_mult_a = REG_6[31:0];
- assign io_outs_down_mult_b = REG_7[31:0];
- assign io_outs_down_mult_rst = 1'h0;
- assign io_outs_down_mult_clk = clock;
- always @(posedge clock) begin
- REG <= io_ins_down;
- REG_1 <= io_ins_left;
- REG_2 <= io_ins_right;
- REG_3 <= io_ins_down;
- REG_4 <= io_ins_up;
- REG_5 <= io_ins_right;
- REG_6 <= io_ins_left;
- REG_7 <= io_ins_up;
- io_outs_left_REG <= io_outs_left_mult_o[15:0];
- io_outs_up_REG <= io_outs_up_mult_o[15:0];
- io_outs_right_REG <= io_outs_right_mult_o[15:0];
- io_outs_down_REG <= io_outs_down_mult_o[15:0];
- REG_8 <= io_lsbIns_4;
- end
-endmodule
diff --git a/flow/designs/src/mock-array/MockArray.v b/flow/designs/src/mock-array/MockArray.v
deleted file mode 100644
index 2e0ab51f0b..0000000000
--- a/flow/designs/src/mock-array/MockArray.v
+++ /dev/null
@@ -1,4327 +0,0 @@
-module MockArray(
- input clock,
- input reset,
- input [63:0] io_ins_down_0,
- input [63:0] io_ins_down_1,
- input [63:0] io_ins_down_2,
- input [63:0] io_ins_down_3,
- input [63:0] io_ins_down_4,
- input [63:0] io_ins_down_5,
- input [63:0] io_ins_down_6,
- input [63:0] io_ins_down_7,
- input [63:0] io_ins_up_0,
- input [63:0] io_ins_up_1,
- input [63:0] io_ins_up_2,
- input [63:0] io_ins_up_3,
- input [63:0] io_ins_up_4,
- input [63:0] io_ins_up_5,
- input [63:0] io_ins_up_6,
- input [63:0] io_ins_up_7,
- input [63:0] io_ins_right_0,
- input [63:0] io_ins_right_1,
- input [63:0] io_ins_right_2,
- input [63:0] io_ins_right_3,
- input [63:0] io_ins_right_4,
- input [63:0] io_ins_right_5,
- input [63:0] io_ins_right_6,
- input [63:0] io_ins_right_7,
- input [63:0] io_ins_left_0,
- input [63:0] io_ins_left_1,
- input [63:0] io_ins_left_2,
- input [63:0] io_ins_left_3,
- input [63:0] io_ins_left_4,
- input [63:0] io_ins_left_5,
- input [63:0] io_ins_left_6,
- input [63:0] io_ins_left_7,
- output [63:0] io_outs_down_0,
- output [63:0] io_outs_down_1,
- output [63:0] io_outs_down_2,
- output [63:0] io_outs_down_3,
- output [63:0] io_outs_down_4,
- output [63:0] io_outs_down_5,
- output [63:0] io_outs_down_6,
- output [63:0] io_outs_down_7,
- output [63:0] io_outs_up_0,
- output [63:0] io_outs_up_1,
- output [63:0] io_outs_up_2,
- output [63:0] io_outs_up_3,
- output [63:0] io_outs_up_4,
- output [63:0] io_outs_up_5,
- output [63:0] io_outs_up_6,
- output [63:0] io_outs_up_7,
- output [63:0] io_outs_right_0,
- output [63:0] io_outs_right_1,
- output [63:0] io_outs_right_2,
- output [63:0] io_outs_right_3,
- output [63:0] io_outs_right_4,
- output [63:0] io_outs_right_5,
- output [63:0] io_outs_right_6,
- output [63:0] io_outs_right_7,
- output [63:0] io_outs_left_0,
- output [63:0] io_outs_left_1,
- output [63:0] io_outs_left_2,
- output [63:0] io_outs_left_3,
- output [63:0] io_outs_left_4,
- output [63:0] io_outs_left_5,
- output [63:0] io_outs_left_6,
- output [63:0] io_outs_left_7,
- output io_lsbs_0,
- output io_lsbs_1,
- output io_lsbs_2,
- output io_lsbs_3,
- output io_lsbs_4,
- output io_lsbs_5,
- output io_lsbs_6,
- output io_lsbs_7,
- output io_lsbs_8,
- output io_lsbs_9,
- output io_lsbs_10,
- output io_lsbs_11,
- output io_lsbs_12,
- output io_lsbs_13,
- output io_lsbs_14,
- output io_lsbs_15,
- output io_lsbs_16,
- output io_lsbs_17,
- output io_lsbs_18,
- output io_lsbs_19,
- output io_lsbs_20,
- output io_lsbs_21,
- output io_lsbs_22,
- output io_lsbs_23,
- output io_lsbs_24,
- output io_lsbs_25,
- output io_lsbs_26,
- output io_lsbs_27,
- output io_lsbs_28,
- output io_lsbs_29,
- output io_lsbs_30,
- output io_lsbs_31,
- output io_lsbs_32,
- output io_lsbs_33,
- output io_lsbs_34,
- output io_lsbs_35,
- output io_lsbs_36,
- output io_lsbs_37,
- output io_lsbs_38,
- output io_lsbs_39,
- output io_lsbs_40,
- output io_lsbs_41,
- output io_lsbs_42,
- output io_lsbs_43,
- output io_lsbs_44,
- output io_lsbs_45,
- output io_lsbs_46,
- output io_lsbs_47,
- output io_lsbs_48,
- output io_lsbs_49,
- output io_lsbs_50,
- output io_lsbs_51,
- output io_lsbs_52,
- output io_lsbs_53,
- output io_lsbs_54,
- output io_lsbs_55,
- output io_lsbs_56,
- output io_lsbs_57,
- output io_lsbs_58,
- output io_lsbs_59,
- output io_lsbs_60,
- output io_lsbs_61,
- output io_lsbs_62,
- output io_lsbs_63
-);
- wire ces_0_0_clock;
- wire [63:0] ces_0_0_io_ins_down;
- wire [63:0] ces_0_0_io_ins_right;
- wire [63:0] ces_0_0_io_ins_up;
- wire [63:0] ces_0_0_io_ins_left;
- wire [63:0] ces_0_0_io_outs_down;
- wire [63:0] ces_0_0_io_outs_right;
- wire [63:0] ces_0_0_io_outs_up;
- wire [63:0] ces_0_0_io_outs_left;
- wire ces_0_0_io_lsbIns_1;
- wire ces_0_0_io_lsbIns_2;
- wire ces_0_0_io_lsbIns_3;
- wire ces_0_0_io_lsbIns_4;
- wire ces_0_0_io_lsbIns_5;
- wire ces_0_0_io_lsbIns_6;
- wire ces_0_0_io_lsbIns_7;
- wire ces_0_0_io_lsbOuts_0;
- wire ces_0_0_io_lsbOuts_1;
- wire ces_0_0_io_lsbOuts_2;
- wire ces_0_0_io_lsbOuts_3;
- wire ces_0_0_io_lsbOuts_4;
- wire ces_0_0_io_lsbOuts_5;
- wire ces_0_0_io_lsbOuts_6;
- wire ces_0_0_io_lsbOuts_7;
- wire ces_0_1_clock;
- wire [63:0] ces_0_1_io_ins_down;
- wire [63:0] ces_0_1_io_ins_right;
- wire [63:0] ces_0_1_io_ins_up;
- wire [63:0] ces_0_1_io_ins_left;
- wire [63:0] ces_0_1_io_outs_down;
- wire [63:0] ces_0_1_io_outs_right;
- wire [63:0] ces_0_1_io_outs_up;
- wire [63:0] ces_0_1_io_outs_left;
- wire ces_0_1_io_lsbIns_1;
- wire ces_0_1_io_lsbIns_2;
- wire ces_0_1_io_lsbIns_3;
- wire ces_0_1_io_lsbIns_4;
- wire ces_0_1_io_lsbIns_5;
- wire ces_0_1_io_lsbIns_6;
- wire ces_0_1_io_lsbIns_7;
- wire ces_0_1_io_lsbOuts_0;
- wire ces_0_1_io_lsbOuts_1;
- wire ces_0_1_io_lsbOuts_2;
- wire ces_0_1_io_lsbOuts_3;
- wire ces_0_1_io_lsbOuts_4;
- wire ces_0_1_io_lsbOuts_5;
- wire ces_0_1_io_lsbOuts_6;
- wire ces_0_1_io_lsbOuts_7;
- wire ces_0_2_clock;
- wire [63:0] ces_0_2_io_ins_down;
- wire [63:0] ces_0_2_io_ins_right;
- wire [63:0] ces_0_2_io_ins_up;
- wire [63:0] ces_0_2_io_ins_left;
- wire [63:0] ces_0_2_io_outs_down;
- wire [63:0] ces_0_2_io_outs_right;
- wire [63:0] ces_0_2_io_outs_up;
- wire [63:0] ces_0_2_io_outs_left;
- wire ces_0_2_io_lsbIns_1;
- wire ces_0_2_io_lsbIns_2;
- wire ces_0_2_io_lsbIns_3;
- wire ces_0_2_io_lsbIns_4;
- wire ces_0_2_io_lsbIns_5;
- wire ces_0_2_io_lsbIns_6;
- wire ces_0_2_io_lsbIns_7;
- wire ces_0_2_io_lsbOuts_0;
- wire ces_0_2_io_lsbOuts_1;
- wire ces_0_2_io_lsbOuts_2;
- wire ces_0_2_io_lsbOuts_3;
- wire ces_0_2_io_lsbOuts_4;
- wire ces_0_2_io_lsbOuts_5;
- wire ces_0_2_io_lsbOuts_6;
- wire ces_0_2_io_lsbOuts_7;
- wire ces_0_3_clock;
- wire [63:0] ces_0_3_io_ins_down;
- wire [63:0] ces_0_3_io_ins_right;
- wire [63:0] ces_0_3_io_ins_up;
- wire [63:0] ces_0_3_io_ins_left;
- wire [63:0] ces_0_3_io_outs_down;
- wire [63:0] ces_0_3_io_outs_right;
- wire [63:0] ces_0_3_io_outs_up;
- wire [63:0] ces_0_3_io_outs_left;
- wire ces_0_3_io_lsbIns_1;
- wire ces_0_3_io_lsbIns_2;
- wire ces_0_3_io_lsbIns_3;
- wire ces_0_3_io_lsbIns_4;
- wire ces_0_3_io_lsbIns_5;
- wire ces_0_3_io_lsbIns_6;
- wire ces_0_3_io_lsbIns_7;
- wire ces_0_3_io_lsbOuts_0;
- wire ces_0_3_io_lsbOuts_1;
- wire ces_0_3_io_lsbOuts_2;
- wire ces_0_3_io_lsbOuts_3;
- wire ces_0_3_io_lsbOuts_4;
- wire ces_0_3_io_lsbOuts_5;
- wire ces_0_3_io_lsbOuts_6;
- wire ces_0_3_io_lsbOuts_7;
- wire ces_0_4_clock;
- wire [63:0] ces_0_4_io_ins_down;
- wire [63:0] ces_0_4_io_ins_right;
- wire [63:0] ces_0_4_io_ins_up;
- wire [63:0] ces_0_4_io_ins_left;
- wire [63:0] ces_0_4_io_outs_down;
- wire [63:0] ces_0_4_io_outs_right;
- wire [63:0] ces_0_4_io_outs_up;
- wire [63:0] ces_0_4_io_outs_left;
- wire ces_0_4_io_lsbIns_1;
- wire ces_0_4_io_lsbIns_2;
- wire ces_0_4_io_lsbIns_3;
- wire ces_0_4_io_lsbIns_4;
- wire ces_0_4_io_lsbIns_5;
- wire ces_0_4_io_lsbIns_6;
- wire ces_0_4_io_lsbIns_7;
- wire ces_0_4_io_lsbOuts_0;
- wire ces_0_4_io_lsbOuts_1;
- wire ces_0_4_io_lsbOuts_2;
- wire ces_0_4_io_lsbOuts_3;
- wire ces_0_4_io_lsbOuts_4;
- wire ces_0_4_io_lsbOuts_5;
- wire ces_0_4_io_lsbOuts_6;
- wire ces_0_4_io_lsbOuts_7;
- wire ces_0_5_clock;
- wire [63:0] ces_0_5_io_ins_down;
- wire [63:0] ces_0_5_io_ins_right;
- wire [63:0] ces_0_5_io_ins_up;
- wire [63:0] ces_0_5_io_ins_left;
- wire [63:0] ces_0_5_io_outs_down;
- wire [63:0] ces_0_5_io_outs_right;
- wire [63:0] ces_0_5_io_outs_up;
- wire [63:0] ces_0_5_io_outs_left;
- wire ces_0_5_io_lsbIns_1;
- wire ces_0_5_io_lsbIns_2;
- wire ces_0_5_io_lsbIns_3;
- wire ces_0_5_io_lsbIns_4;
- wire ces_0_5_io_lsbIns_5;
- wire ces_0_5_io_lsbIns_6;
- wire ces_0_5_io_lsbIns_7;
- wire ces_0_5_io_lsbOuts_0;
- wire ces_0_5_io_lsbOuts_1;
- wire ces_0_5_io_lsbOuts_2;
- wire ces_0_5_io_lsbOuts_3;
- wire ces_0_5_io_lsbOuts_4;
- wire ces_0_5_io_lsbOuts_5;
- wire ces_0_5_io_lsbOuts_6;
- wire ces_0_5_io_lsbOuts_7;
- wire ces_0_6_clock;
- wire [63:0] ces_0_6_io_ins_down;
- wire [63:0] ces_0_6_io_ins_right;
- wire [63:0] ces_0_6_io_ins_up;
- wire [63:0] ces_0_6_io_ins_left;
- wire [63:0] ces_0_6_io_outs_down;
- wire [63:0] ces_0_6_io_outs_right;
- wire [63:0] ces_0_6_io_outs_up;
- wire [63:0] ces_0_6_io_outs_left;
- wire ces_0_6_io_lsbIns_1;
- wire ces_0_6_io_lsbIns_2;
- wire ces_0_6_io_lsbIns_3;
- wire ces_0_6_io_lsbIns_4;
- wire ces_0_6_io_lsbIns_5;
- wire ces_0_6_io_lsbIns_6;
- wire ces_0_6_io_lsbIns_7;
- wire ces_0_6_io_lsbOuts_0;
- wire ces_0_6_io_lsbOuts_1;
- wire ces_0_6_io_lsbOuts_2;
- wire ces_0_6_io_lsbOuts_3;
- wire ces_0_6_io_lsbOuts_4;
- wire ces_0_6_io_lsbOuts_5;
- wire ces_0_6_io_lsbOuts_6;
- wire ces_0_6_io_lsbOuts_7;
- wire ces_0_7_clock;
- wire [63:0] ces_0_7_io_ins_down;
- wire [63:0] ces_0_7_io_ins_right;
- wire [63:0] ces_0_7_io_ins_up;
- wire [63:0] ces_0_7_io_ins_left;
- wire [63:0] ces_0_7_io_outs_down;
- wire [63:0] ces_0_7_io_outs_right;
- wire [63:0] ces_0_7_io_outs_up;
- wire [63:0] ces_0_7_io_outs_left;
- wire ces_0_7_io_lsbIns_1;
- wire ces_0_7_io_lsbIns_2;
- wire ces_0_7_io_lsbIns_3;
- wire ces_0_7_io_lsbIns_4;
- wire ces_0_7_io_lsbIns_5;
- wire ces_0_7_io_lsbIns_6;
- wire ces_0_7_io_lsbIns_7;
- wire ces_0_7_io_lsbOuts_0;
- wire ces_0_7_io_lsbOuts_1;
- wire ces_0_7_io_lsbOuts_2;
- wire ces_0_7_io_lsbOuts_3;
- wire ces_0_7_io_lsbOuts_4;
- wire ces_0_7_io_lsbOuts_5;
- wire ces_0_7_io_lsbOuts_6;
- wire ces_0_7_io_lsbOuts_7;
- wire ces_1_0_clock;
- wire [63:0] ces_1_0_io_ins_down;
- wire [63:0] ces_1_0_io_ins_right;
- wire [63:0] ces_1_0_io_ins_up;
- wire [63:0] ces_1_0_io_ins_left;
- wire [63:0] ces_1_0_io_outs_down;
- wire [63:0] ces_1_0_io_outs_right;
- wire [63:0] ces_1_0_io_outs_up;
- wire [63:0] ces_1_0_io_outs_left;
- wire ces_1_0_io_lsbIns_1;
- wire ces_1_0_io_lsbIns_2;
- wire ces_1_0_io_lsbIns_3;
- wire ces_1_0_io_lsbIns_4;
- wire ces_1_0_io_lsbIns_5;
- wire ces_1_0_io_lsbIns_6;
- wire ces_1_0_io_lsbIns_7;
- wire ces_1_0_io_lsbOuts_0;
- wire ces_1_0_io_lsbOuts_1;
- wire ces_1_0_io_lsbOuts_2;
- wire ces_1_0_io_lsbOuts_3;
- wire ces_1_0_io_lsbOuts_4;
- wire ces_1_0_io_lsbOuts_5;
- wire ces_1_0_io_lsbOuts_6;
- wire ces_1_0_io_lsbOuts_7;
- wire ces_1_1_clock;
- wire [63:0] ces_1_1_io_ins_down;
- wire [63:0] ces_1_1_io_ins_right;
- wire [63:0] ces_1_1_io_ins_up;
- wire [63:0] ces_1_1_io_ins_left;
- wire [63:0] ces_1_1_io_outs_down;
- wire [63:0] ces_1_1_io_outs_right;
- wire [63:0] ces_1_1_io_outs_up;
- wire [63:0] ces_1_1_io_outs_left;
- wire ces_1_1_io_lsbIns_1;
- wire ces_1_1_io_lsbIns_2;
- wire ces_1_1_io_lsbIns_3;
- wire ces_1_1_io_lsbIns_4;
- wire ces_1_1_io_lsbIns_5;
- wire ces_1_1_io_lsbIns_6;
- wire ces_1_1_io_lsbIns_7;
- wire ces_1_1_io_lsbOuts_0;
- wire ces_1_1_io_lsbOuts_1;
- wire ces_1_1_io_lsbOuts_2;
- wire ces_1_1_io_lsbOuts_3;
- wire ces_1_1_io_lsbOuts_4;
- wire ces_1_1_io_lsbOuts_5;
- wire ces_1_1_io_lsbOuts_6;
- wire ces_1_1_io_lsbOuts_7;
- wire ces_1_2_clock;
- wire [63:0] ces_1_2_io_ins_down;
- wire [63:0] ces_1_2_io_ins_right;
- wire [63:0] ces_1_2_io_ins_up;
- wire [63:0] ces_1_2_io_ins_left;
- wire [63:0] ces_1_2_io_outs_down;
- wire [63:0] ces_1_2_io_outs_right;
- wire [63:0] ces_1_2_io_outs_up;
- wire [63:0] ces_1_2_io_outs_left;
- wire ces_1_2_io_lsbIns_1;
- wire ces_1_2_io_lsbIns_2;
- wire ces_1_2_io_lsbIns_3;
- wire ces_1_2_io_lsbIns_4;
- wire ces_1_2_io_lsbIns_5;
- wire ces_1_2_io_lsbIns_6;
- wire ces_1_2_io_lsbIns_7;
- wire ces_1_2_io_lsbOuts_0;
- wire ces_1_2_io_lsbOuts_1;
- wire ces_1_2_io_lsbOuts_2;
- wire ces_1_2_io_lsbOuts_3;
- wire ces_1_2_io_lsbOuts_4;
- wire ces_1_2_io_lsbOuts_5;
- wire ces_1_2_io_lsbOuts_6;
- wire ces_1_2_io_lsbOuts_7;
- wire ces_1_3_clock;
- wire [63:0] ces_1_3_io_ins_down;
- wire [63:0] ces_1_3_io_ins_right;
- wire [63:0] ces_1_3_io_ins_up;
- wire [63:0] ces_1_3_io_ins_left;
- wire [63:0] ces_1_3_io_outs_down;
- wire [63:0] ces_1_3_io_outs_right;
- wire [63:0] ces_1_3_io_outs_up;
- wire [63:0] ces_1_3_io_outs_left;
- wire ces_1_3_io_lsbIns_1;
- wire ces_1_3_io_lsbIns_2;
- wire ces_1_3_io_lsbIns_3;
- wire ces_1_3_io_lsbIns_4;
- wire ces_1_3_io_lsbIns_5;
- wire ces_1_3_io_lsbIns_6;
- wire ces_1_3_io_lsbIns_7;
- wire ces_1_3_io_lsbOuts_0;
- wire ces_1_3_io_lsbOuts_1;
- wire ces_1_3_io_lsbOuts_2;
- wire ces_1_3_io_lsbOuts_3;
- wire ces_1_3_io_lsbOuts_4;
- wire ces_1_3_io_lsbOuts_5;
- wire ces_1_3_io_lsbOuts_6;
- wire ces_1_3_io_lsbOuts_7;
- wire ces_1_4_clock;
- wire [63:0] ces_1_4_io_ins_down;
- wire [63:0] ces_1_4_io_ins_right;
- wire [63:0] ces_1_4_io_ins_up;
- wire [63:0] ces_1_4_io_ins_left;
- wire [63:0] ces_1_4_io_outs_down;
- wire [63:0] ces_1_4_io_outs_right;
- wire [63:0] ces_1_4_io_outs_up;
- wire [63:0] ces_1_4_io_outs_left;
- wire ces_1_4_io_lsbIns_1;
- wire ces_1_4_io_lsbIns_2;
- wire ces_1_4_io_lsbIns_3;
- wire ces_1_4_io_lsbIns_4;
- wire ces_1_4_io_lsbIns_5;
- wire ces_1_4_io_lsbIns_6;
- wire ces_1_4_io_lsbIns_7;
- wire ces_1_4_io_lsbOuts_0;
- wire ces_1_4_io_lsbOuts_1;
- wire ces_1_4_io_lsbOuts_2;
- wire ces_1_4_io_lsbOuts_3;
- wire ces_1_4_io_lsbOuts_4;
- wire ces_1_4_io_lsbOuts_5;
- wire ces_1_4_io_lsbOuts_6;
- wire ces_1_4_io_lsbOuts_7;
- wire ces_1_5_clock;
- wire [63:0] ces_1_5_io_ins_down;
- wire [63:0] ces_1_5_io_ins_right;
- wire [63:0] ces_1_5_io_ins_up;
- wire [63:0] ces_1_5_io_ins_left;
- wire [63:0] ces_1_5_io_outs_down;
- wire [63:0] ces_1_5_io_outs_right;
- wire [63:0] ces_1_5_io_outs_up;
- wire [63:0] ces_1_5_io_outs_left;
- wire ces_1_5_io_lsbIns_1;
- wire ces_1_5_io_lsbIns_2;
- wire ces_1_5_io_lsbIns_3;
- wire ces_1_5_io_lsbIns_4;
- wire ces_1_5_io_lsbIns_5;
- wire ces_1_5_io_lsbIns_6;
- wire ces_1_5_io_lsbIns_7;
- wire ces_1_5_io_lsbOuts_0;
- wire ces_1_5_io_lsbOuts_1;
- wire ces_1_5_io_lsbOuts_2;
- wire ces_1_5_io_lsbOuts_3;
- wire ces_1_5_io_lsbOuts_4;
- wire ces_1_5_io_lsbOuts_5;
- wire ces_1_5_io_lsbOuts_6;
- wire ces_1_5_io_lsbOuts_7;
- wire ces_1_6_clock;
- wire [63:0] ces_1_6_io_ins_down;
- wire [63:0] ces_1_6_io_ins_right;
- wire [63:0] ces_1_6_io_ins_up;
- wire [63:0] ces_1_6_io_ins_left;
- wire [63:0] ces_1_6_io_outs_down;
- wire [63:0] ces_1_6_io_outs_right;
- wire [63:0] ces_1_6_io_outs_up;
- wire [63:0] ces_1_6_io_outs_left;
- wire ces_1_6_io_lsbIns_1;
- wire ces_1_6_io_lsbIns_2;
- wire ces_1_6_io_lsbIns_3;
- wire ces_1_6_io_lsbIns_4;
- wire ces_1_6_io_lsbIns_5;
- wire ces_1_6_io_lsbIns_6;
- wire ces_1_6_io_lsbIns_7;
- wire ces_1_6_io_lsbOuts_0;
- wire ces_1_6_io_lsbOuts_1;
- wire ces_1_6_io_lsbOuts_2;
- wire ces_1_6_io_lsbOuts_3;
- wire ces_1_6_io_lsbOuts_4;
- wire ces_1_6_io_lsbOuts_5;
- wire ces_1_6_io_lsbOuts_6;
- wire ces_1_6_io_lsbOuts_7;
- wire ces_1_7_clock;
- wire [63:0] ces_1_7_io_ins_down;
- wire [63:0] ces_1_7_io_ins_right;
- wire [63:0] ces_1_7_io_ins_up;
- wire [63:0] ces_1_7_io_ins_left;
- wire [63:0] ces_1_7_io_outs_down;
- wire [63:0] ces_1_7_io_outs_right;
- wire [63:0] ces_1_7_io_outs_up;
- wire [63:0] ces_1_7_io_outs_left;
- wire ces_1_7_io_lsbIns_1;
- wire ces_1_7_io_lsbIns_2;
- wire ces_1_7_io_lsbIns_3;
- wire ces_1_7_io_lsbIns_4;
- wire ces_1_7_io_lsbIns_5;
- wire ces_1_7_io_lsbIns_6;
- wire ces_1_7_io_lsbIns_7;
- wire ces_1_7_io_lsbOuts_0;
- wire ces_1_7_io_lsbOuts_1;
- wire ces_1_7_io_lsbOuts_2;
- wire ces_1_7_io_lsbOuts_3;
- wire ces_1_7_io_lsbOuts_4;
- wire ces_1_7_io_lsbOuts_5;
- wire ces_1_7_io_lsbOuts_6;
- wire ces_1_7_io_lsbOuts_7;
- wire ces_2_0_clock;
- wire [63:0] ces_2_0_io_ins_down;
- wire [63:0] ces_2_0_io_ins_right;
- wire [63:0] ces_2_0_io_ins_up;
- wire [63:0] ces_2_0_io_ins_left;
- wire [63:0] ces_2_0_io_outs_down;
- wire [63:0] ces_2_0_io_outs_right;
- wire [63:0] ces_2_0_io_outs_up;
- wire [63:0] ces_2_0_io_outs_left;
- wire ces_2_0_io_lsbIns_1;
- wire ces_2_0_io_lsbIns_2;
- wire ces_2_0_io_lsbIns_3;
- wire ces_2_0_io_lsbIns_4;
- wire ces_2_0_io_lsbIns_5;
- wire ces_2_0_io_lsbIns_6;
- wire ces_2_0_io_lsbIns_7;
- wire ces_2_0_io_lsbOuts_0;
- wire ces_2_0_io_lsbOuts_1;
- wire ces_2_0_io_lsbOuts_2;
- wire ces_2_0_io_lsbOuts_3;
- wire ces_2_0_io_lsbOuts_4;
- wire ces_2_0_io_lsbOuts_5;
- wire ces_2_0_io_lsbOuts_6;
- wire ces_2_0_io_lsbOuts_7;
- wire ces_2_1_clock;
- wire [63:0] ces_2_1_io_ins_down;
- wire [63:0] ces_2_1_io_ins_right;
- wire [63:0] ces_2_1_io_ins_up;
- wire [63:0] ces_2_1_io_ins_left;
- wire [63:0] ces_2_1_io_outs_down;
- wire [63:0] ces_2_1_io_outs_right;
- wire [63:0] ces_2_1_io_outs_up;
- wire [63:0] ces_2_1_io_outs_left;
- wire ces_2_1_io_lsbIns_1;
- wire ces_2_1_io_lsbIns_2;
- wire ces_2_1_io_lsbIns_3;
- wire ces_2_1_io_lsbIns_4;
- wire ces_2_1_io_lsbIns_5;
- wire ces_2_1_io_lsbIns_6;
- wire ces_2_1_io_lsbIns_7;
- wire ces_2_1_io_lsbOuts_0;
- wire ces_2_1_io_lsbOuts_1;
- wire ces_2_1_io_lsbOuts_2;
- wire ces_2_1_io_lsbOuts_3;
- wire ces_2_1_io_lsbOuts_4;
- wire ces_2_1_io_lsbOuts_5;
- wire ces_2_1_io_lsbOuts_6;
- wire ces_2_1_io_lsbOuts_7;
- wire ces_2_2_clock;
- wire [63:0] ces_2_2_io_ins_down;
- wire [63:0] ces_2_2_io_ins_right;
- wire [63:0] ces_2_2_io_ins_up;
- wire [63:0] ces_2_2_io_ins_left;
- wire [63:0] ces_2_2_io_outs_down;
- wire [63:0] ces_2_2_io_outs_right;
- wire [63:0] ces_2_2_io_outs_up;
- wire [63:0] ces_2_2_io_outs_left;
- wire ces_2_2_io_lsbIns_1;
- wire ces_2_2_io_lsbIns_2;
- wire ces_2_2_io_lsbIns_3;
- wire ces_2_2_io_lsbIns_4;
- wire ces_2_2_io_lsbIns_5;
- wire ces_2_2_io_lsbIns_6;
- wire ces_2_2_io_lsbIns_7;
- wire ces_2_2_io_lsbOuts_0;
- wire ces_2_2_io_lsbOuts_1;
- wire ces_2_2_io_lsbOuts_2;
- wire ces_2_2_io_lsbOuts_3;
- wire ces_2_2_io_lsbOuts_4;
- wire ces_2_2_io_lsbOuts_5;
- wire ces_2_2_io_lsbOuts_6;
- wire ces_2_2_io_lsbOuts_7;
- wire ces_2_3_clock;
- wire [63:0] ces_2_3_io_ins_down;
- wire [63:0] ces_2_3_io_ins_right;
- wire [63:0] ces_2_3_io_ins_up;
- wire [63:0] ces_2_3_io_ins_left;
- wire [63:0] ces_2_3_io_outs_down;
- wire [63:0] ces_2_3_io_outs_right;
- wire [63:0] ces_2_3_io_outs_up;
- wire [63:0] ces_2_3_io_outs_left;
- wire ces_2_3_io_lsbIns_1;
- wire ces_2_3_io_lsbIns_2;
- wire ces_2_3_io_lsbIns_3;
- wire ces_2_3_io_lsbIns_4;
- wire ces_2_3_io_lsbIns_5;
- wire ces_2_3_io_lsbIns_6;
- wire ces_2_3_io_lsbIns_7;
- wire ces_2_3_io_lsbOuts_0;
- wire ces_2_3_io_lsbOuts_1;
- wire ces_2_3_io_lsbOuts_2;
- wire ces_2_3_io_lsbOuts_3;
- wire ces_2_3_io_lsbOuts_4;
- wire ces_2_3_io_lsbOuts_5;
- wire ces_2_3_io_lsbOuts_6;
- wire ces_2_3_io_lsbOuts_7;
- wire ces_2_4_clock;
- wire [63:0] ces_2_4_io_ins_down;
- wire [63:0] ces_2_4_io_ins_right;
- wire [63:0] ces_2_4_io_ins_up;
- wire [63:0] ces_2_4_io_ins_left;
- wire [63:0] ces_2_4_io_outs_down;
- wire [63:0] ces_2_4_io_outs_right;
- wire [63:0] ces_2_4_io_outs_up;
- wire [63:0] ces_2_4_io_outs_left;
- wire ces_2_4_io_lsbIns_1;
- wire ces_2_4_io_lsbIns_2;
- wire ces_2_4_io_lsbIns_3;
- wire ces_2_4_io_lsbIns_4;
- wire ces_2_4_io_lsbIns_5;
- wire ces_2_4_io_lsbIns_6;
- wire ces_2_4_io_lsbIns_7;
- wire ces_2_4_io_lsbOuts_0;
- wire ces_2_4_io_lsbOuts_1;
- wire ces_2_4_io_lsbOuts_2;
- wire ces_2_4_io_lsbOuts_3;
- wire ces_2_4_io_lsbOuts_4;
- wire ces_2_4_io_lsbOuts_5;
- wire ces_2_4_io_lsbOuts_6;
- wire ces_2_4_io_lsbOuts_7;
- wire ces_2_5_clock;
- wire [63:0] ces_2_5_io_ins_down;
- wire [63:0] ces_2_5_io_ins_right;
- wire [63:0] ces_2_5_io_ins_up;
- wire [63:0] ces_2_5_io_ins_left;
- wire [63:0] ces_2_5_io_outs_down;
- wire [63:0] ces_2_5_io_outs_right;
- wire [63:0] ces_2_5_io_outs_up;
- wire [63:0] ces_2_5_io_outs_left;
- wire ces_2_5_io_lsbIns_1;
- wire ces_2_5_io_lsbIns_2;
- wire ces_2_5_io_lsbIns_3;
- wire ces_2_5_io_lsbIns_4;
- wire ces_2_5_io_lsbIns_5;
- wire ces_2_5_io_lsbIns_6;
- wire ces_2_5_io_lsbIns_7;
- wire ces_2_5_io_lsbOuts_0;
- wire ces_2_5_io_lsbOuts_1;
- wire ces_2_5_io_lsbOuts_2;
- wire ces_2_5_io_lsbOuts_3;
- wire ces_2_5_io_lsbOuts_4;
- wire ces_2_5_io_lsbOuts_5;
- wire ces_2_5_io_lsbOuts_6;
- wire ces_2_5_io_lsbOuts_7;
- wire ces_2_6_clock;
- wire [63:0] ces_2_6_io_ins_down;
- wire [63:0] ces_2_6_io_ins_right;
- wire [63:0] ces_2_6_io_ins_up;
- wire [63:0] ces_2_6_io_ins_left;
- wire [63:0] ces_2_6_io_outs_down;
- wire [63:0] ces_2_6_io_outs_right;
- wire [63:0] ces_2_6_io_outs_up;
- wire [63:0] ces_2_6_io_outs_left;
- wire ces_2_6_io_lsbIns_1;
- wire ces_2_6_io_lsbIns_2;
- wire ces_2_6_io_lsbIns_3;
- wire ces_2_6_io_lsbIns_4;
- wire ces_2_6_io_lsbIns_5;
- wire ces_2_6_io_lsbIns_6;
- wire ces_2_6_io_lsbIns_7;
- wire ces_2_6_io_lsbOuts_0;
- wire ces_2_6_io_lsbOuts_1;
- wire ces_2_6_io_lsbOuts_2;
- wire ces_2_6_io_lsbOuts_3;
- wire ces_2_6_io_lsbOuts_4;
- wire ces_2_6_io_lsbOuts_5;
- wire ces_2_6_io_lsbOuts_6;
- wire ces_2_6_io_lsbOuts_7;
- wire ces_2_7_clock;
- wire [63:0] ces_2_7_io_ins_down;
- wire [63:0] ces_2_7_io_ins_right;
- wire [63:0] ces_2_7_io_ins_up;
- wire [63:0] ces_2_7_io_ins_left;
- wire [63:0] ces_2_7_io_outs_down;
- wire [63:0] ces_2_7_io_outs_right;
- wire [63:0] ces_2_7_io_outs_up;
- wire [63:0] ces_2_7_io_outs_left;
- wire ces_2_7_io_lsbIns_1;
- wire ces_2_7_io_lsbIns_2;
- wire ces_2_7_io_lsbIns_3;
- wire ces_2_7_io_lsbIns_4;
- wire ces_2_7_io_lsbIns_5;
- wire ces_2_7_io_lsbIns_6;
- wire ces_2_7_io_lsbIns_7;
- wire ces_2_7_io_lsbOuts_0;
- wire ces_2_7_io_lsbOuts_1;
- wire ces_2_7_io_lsbOuts_2;
- wire ces_2_7_io_lsbOuts_3;
- wire ces_2_7_io_lsbOuts_4;
- wire ces_2_7_io_lsbOuts_5;
- wire ces_2_7_io_lsbOuts_6;
- wire ces_2_7_io_lsbOuts_7;
- wire ces_3_0_clock;
- wire [63:0] ces_3_0_io_ins_down;
- wire [63:0] ces_3_0_io_ins_right;
- wire [63:0] ces_3_0_io_ins_up;
- wire [63:0] ces_3_0_io_ins_left;
- wire [63:0] ces_3_0_io_outs_down;
- wire [63:0] ces_3_0_io_outs_right;
- wire [63:0] ces_3_0_io_outs_up;
- wire [63:0] ces_3_0_io_outs_left;
- wire ces_3_0_io_lsbIns_1;
- wire ces_3_0_io_lsbIns_2;
- wire ces_3_0_io_lsbIns_3;
- wire ces_3_0_io_lsbIns_4;
- wire ces_3_0_io_lsbIns_5;
- wire ces_3_0_io_lsbIns_6;
- wire ces_3_0_io_lsbIns_7;
- wire ces_3_0_io_lsbOuts_0;
- wire ces_3_0_io_lsbOuts_1;
- wire ces_3_0_io_lsbOuts_2;
- wire ces_3_0_io_lsbOuts_3;
- wire ces_3_0_io_lsbOuts_4;
- wire ces_3_0_io_lsbOuts_5;
- wire ces_3_0_io_lsbOuts_6;
- wire ces_3_0_io_lsbOuts_7;
- wire ces_3_1_clock;
- wire [63:0] ces_3_1_io_ins_down;
- wire [63:0] ces_3_1_io_ins_right;
- wire [63:0] ces_3_1_io_ins_up;
- wire [63:0] ces_3_1_io_ins_left;
- wire [63:0] ces_3_1_io_outs_down;
- wire [63:0] ces_3_1_io_outs_right;
- wire [63:0] ces_3_1_io_outs_up;
- wire [63:0] ces_3_1_io_outs_left;
- wire ces_3_1_io_lsbIns_1;
- wire ces_3_1_io_lsbIns_2;
- wire ces_3_1_io_lsbIns_3;
- wire ces_3_1_io_lsbIns_4;
- wire ces_3_1_io_lsbIns_5;
- wire ces_3_1_io_lsbIns_6;
- wire ces_3_1_io_lsbIns_7;
- wire ces_3_1_io_lsbOuts_0;
- wire ces_3_1_io_lsbOuts_1;
- wire ces_3_1_io_lsbOuts_2;
- wire ces_3_1_io_lsbOuts_3;
- wire ces_3_1_io_lsbOuts_4;
- wire ces_3_1_io_lsbOuts_5;
- wire ces_3_1_io_lsbOuts_6;
- wire ces_3_1_io_lsbOuts_7;
- wire ces_3_2_clock;
- wire [63:0] ces_3_2_io_ins_down;
- wire [63:0] ces_3_2_io_ins_right;
- wire [63:0] ces_3_2_io_ins_up;
- wire [63:0] ces_3_2_io_ins_left;
- wire [63:0] ces_3_2_io_outs_down;
- wire [63:0] ces_3_2_io_outs_right;
- wire [63:0] ces_3_2_io_outs_up;
- wire [63:0] ces_3_2_io_outs_left;
- wire ces_3_2_io_lsbIns_1;
- wire ces_3_2_io_lsbIns_2;
- wire ces_3_2_io_lsbIns_3;
- wire ces_3_2_io_lsbIns_4;
- wire ces_3_2_io_lsbIns_5;
- wire ces_3_2_io_lsbIns_6;
- wire ces_3_2_io_lsbIns_7;
- wire ces_3_2_io_lsbOuts_0;
- wire ces_3_2_io_lsbOuts_1;
- wire ces_3_2_io_lsbOuts_2;
- wire ces_3_2_io_lsbOuts_3;
- wire ces_3_2_io_lsbOuts_4;
- wire ces_3_2_io_lsbOuts_5;
- wire ces_3_2_io_lsbOuts_6;
- wire ces_3_2_io_lsbOuts_7;
- wire ces_3_3_clock;
- wire [63:0] ces_3_3_io_ins_down;
- wire [63:0] ces_3_3_io_ins_right;
- wire [63:0] ces_3_3_io_ins_up;
- wire [63:0] ces_3_3_io_ins_left;
- wire [63:0] ces_3_3_io_outs_down;
- wire [63:0] ces_3_3_io_outs_right;
- wire [63:0] ces_3_3_io_outs_up;
- wire [63:0] ces_3_3_io_outs_left;
- wire ces_3_3_io_lsbIns_1;
- wire ces_3_3_io_lsbIns_2;
- wire ces_3_3_io_lsbIns_3;
- wire ces_3_3_io_lsbIns_4;
- wire ces_3_3_io_lsbIns_5;
- wire ces_3_3_io_lsbIns_6;
- wire ces_3_3_io_lsbIns_7;
- wire ces_3_3_io_lsbOuts_0;
- wire ces_3_3_io_lsbOuts_1;
- wire ces_3_3_io_lsbOuts_2;
- wire ces_3_3_io_lsbOuts_3;
- wire ces_3_3_io_lsbOuts_4;
- wire ces_3_3_io_lsbOuts_5;
- wire ces_3_3_io_lsbOuts_6;
- wire ces_3_3_io_lsbOuts_7;
- wire ces_3_4_clock;
- wire [63:0] ces_3_4_io_ins_down;
- wire [63:0] ces_3_4_io_ins_right;
- wire [63:0] ces_3_4_io_ins_up;
- wire [63:0] ces_3_4_io_ins_left;
- wire [63:0] ces_3_4_io_outs_down;
- wire [63:0] ces_3_4_io_outs_right;
- wire [63:0] ces_3_4_io_outs_up;
- wire [63:0] ces_3_4_io_outs_left;
- wire ces_3_4_io_lsbIns_1;
- wire ces_3_4_io_lsbIns_2;
- wire ces_3_4_io_lsbIns_3;
- wire ces_3_4_io_lsbIns_4;
- wire ces_3_4_io_lsbIns_5;
- wire ces_3_4_io_lsbIns_6;
- wire ces_3_4_io_lsbIns_7;
- wire ces_3_4_io_lsbOuts_0;
- wire ces_3_4_io_lsbOuts_1;
- wire ces_3_4_io_lsbOuts_2;
- wire ces_3_4_io_lsbOuts_3;
- wire ces_3_4_io_lsbOuts_4;
- wire ces_3_4_io_lsbOuts_5;
- wire ces_3_4_io_lsbOuts_6;
- wire ces_3_4_io_lsbOuts_7;
- wire ces_3_5_clock;
- wire [63:0] ces_3_5_io_ins_down;
- wire [63:0] ces_3_5_io_ins_right;
- wire [63:0] ces_3_5_io_ins_up;
- wire [63:0] ces_3_5_io_ins_left;
- wire [63:0] ces_3_5_io_outs_down;
- wire [63:0] ces_3_5_io_outs_right;
- wire [63:0] ces_3_5_io_outs_up;
- wire [63:0] ces_3_5_io_outs_left;
- wire ces_3_5_io_lsbIns_1;
- wire ces_3_5_io_lsbIns_2;
- wire ces_3_5_io_lsbIns_3;
- wire ces_3_5_io_lsbIns_4;
- wire ces_3_5_io_lsbIns_5;
- wire ces_3_5_io_lsbIns_6;
- wire ces_3_5_io_lsbIns_7;
- wire ces_3_5_io_lsbOuts_0;
- wire ces_3_5_io_lsbOuts_1;
- wire ces_3_5_io_lsbOuts_2;
- wire ces_3_5_io_lsbOuts_3;
- wire ces_3_5_io_lsbOuts_4;
- wire ces_3_5_io_lsbOuts_5;
- wire ces_3_5_io_lsbOuts_6;
- wire ces_3_5_io_lsbOuts_7;
- wire ces_3_6_clock;
- wire [63:0] ces_3_6_io_ins_down;
- wire [63:0] ces_3_6_io_ins_right;
- wire [63:0] ces_3_6_io_ins_up;
- wire [63:0] ces_3_6_io_ins_left;
- wire [63:0] ces_3_6_io_outs_down;
- wire [63:0] ces_3_6_io_outs_right;
- wire [63:0] ces_3_6_io_outs_up;
- wire [63:0] ces_3_6_io_outs_left;
- wire ces_3_6_io_lsbIns_1;
- wire ces_3_6_io_lsbIns_2;
- wire ces_3_6_io_lsbIns_3;
- wire ces_3_6_io_lsbIns_4;
- wire ces_3_6_io_lsbIns_5;
- wire ces_3_6_io_lsbIns_6;
- wire ces_3_6_io_lsbIns_7;
- wire ces_3_6_io_lsbOuts_0;
- wire ces_3_6_io_lsbOuts_1;
- wire ces_3_6_io_lsbOuts_2;
- wire ces_3_6_io_lsbOuts_3;
- wire ces_3_6_io_lsbOuts_4;
- wire ces_3_6_io_lsbOuts_5;
- wire ces_3_6_io_lsbOuts_6;
- wire ces_3_6_io_lsbOuts_7;
- wire ces_3_7_clock;
- wire [63:0] ces_3_7_io_ins_down;
- wire [63:0] ces_3_7_io_ins_right;
- wire [63:0] ces_3_7_io_ins_up;
- wire [63:0] ces_3_7_io_ins_left;
- wire [63:0] ces_3_7_io_outs_down;
- wire [63:0] ces_3_7_io_outs_right;
- wire [63:0] ces_3_7_io_outs_up;
- wire [63:0] ces_3_7_io_outs_left;
- wire ces_3_7_io_lsbIns_1;
- wire ces_3_7_io_lsbIns_2;
- wire ces_3_7_io_lsbIns_3;
- wire ces_3_7_io_lsbIns_4;
- wire ces_3_7_io_lsbIns_5;
- wire ces_3_7_io_lsbIns_6;
- wire ces_3_7_io_lsbIns_7;
- wire ces_3_7_io_lsbOuts_0;
- wire ces_3_7_io_lsbOuts_1;
- wire ces_3_7_io_lsbOuts_2;
- wire ces_3_7_io_lsbOuts_3;
- wire ces_3_7_io_lsbOuts_4;
- wire ces_3_7_io_lsbOuts_5;
- wire ces_3_7_io_lsbOuts_6;
- wire ces_3_7_io_lsbOuts_7;
- wire ces_4_0_clock;
- wire [63:0] ces_4_0_io_ins_down;
- wire [63:0] ces_4_0_io_ins_right;
- wire [63:0] ces_4_0_io_ins_up;
- wire [63:0] ces_4_0_io_ins_left;
- wire [63:0] ces_4_0_io_outs_down;
- wire [63:0] ces_4_0_io_outs_right;
- wire [63:0] ces_4_0_io_outs_up;
- wire [63:0] ces_4_0_io_outs_left;
- wire ces_4_0_io_lsbIns_1;
- wire ces_4_0_io_lsbIns_2;
- wire ces_4_0_io_lsbIns_3;
- wire ces_4_0_io_lsbIns_4;
- wire ces_4_0_io_lsbIns_5;
- wire ces_4_0_io_lsbIns_6;
- wire ces_4_0_io_lsbIns_7;
- wire ces_4_0_io_lsbOuts_0;
- wire ces_4_0_io_lsbOuts_1;
- wire ces_4_0_io_lsbOuts_2;
- wire ces_4_0_io_lsbOuts_3;
- wire ces_4_0_io_lsbOuts_4;
- wire ces_4_0_io_lsbOuts_5;
- wire ces_4_0_io_lsbOuts_6;
- wire ces_4_0_io_lsbOuts_7;
- wire ces_4_1_clock;
- wire [63:0] ces_4_1_io_ins_down;
- wire [63:0] ces_4_1_io_ins_right;
- wire [63:0] ces_4_1_io_ins_up;
- wire [63:0] ces_4_1_io_ins_left;
- wire [63:0] ces_4_1_io_outs_down;
- wire [63:0] ces_4_1_io_outs_right;
- wire [63:0] ces_4_1_io_outs_up;
- wire [63:0] ces_4_1_io_outs_left;
- wire ces_4_1_io_lsbIns_1;
- wire ces_4_1_io_lsbIns_2;
- wire ces_4_1_io_lsbIns_3;
- wire ces_4_1_io_lsbIns_4;
- wire ces_4_1_io_lsbIns_5;
- wire ces_4_1_io_lsbIns_6;
- wire ces_4_1_io_lsbIns_7;
- wire ces_4_1_io_lsbOuts_0;
- wire ces_4_1_io_lsbOuts_1;
- wire ces_4_1_io_lsbOuts_2;
- wire ces_4_1_io_lsbOuts_3;
- wire ces_4_1_io_lsbOuts_4;
- wire ces_4_1_io_lsbOuts_5;
- wire ces_4_1_io_lsbOuts_6;
- wire ces_4_1_io_lsbOuts_7;
- wire ces_4_2_clock;
- wire [63:0] ces_4_2_io_ins_down;
- wire [63:0] ces_4_2_io_ins_right;
- wire [63:0] ces_4_2_io_ins_up;
- wire [63:0] ces_4_2_io_ins_left;
- wire [63:0] ces_4_2_io_outs_down;
- wire [63:0] ces_4_2_io_outs_right;
- wire [63:0] ces_4_2_io_outs_up;
- wire [63:0] ces_4_2_io_outs_left;
- wire ces_4_2_io_lsbIns_1;
- wire ces_4_2_io_lsbIns_2;
- wire ces_4_2_io_lsbIns_3;
- wire ces_4_2_io_lsbIns_4;
- wire ces_4_2_io_lsbIns_5;
- wire ces_4_2_io_lsbIns_6;
- wire ces_4_2_io_lsbIns_7;
- wire ces_4_2_io_lsbOuts_0;
- wire ces_4_2_io_lsbOuts_1;
- wire ces_4_2_io_lsbOuts_2;
- wire ces_4_2_io_lsbOuts_3;
- wire ces_4_2_io_lsbOuts_4;
- wire ces_4_2_io_lsbOuts_5;
- wire ces_4_2_io_lsbOuts_6;
- wire ces_4_2_io_lsbOuts_7;
- wire ces_4_3_clock;
- wire [63:0] ces_4_3_io_ins_down;
- wire [63:0] ces_4_3_io_ins_right;
- wire [63:0] ces_4_3_io_ins_up;
- wire [63:0] ces_4_3_io_ins_left;
- wire [63:0] ces_4_3_io_outs_down;
- wire [63:0] ces_4_3_io_outs_right;
- wire [63:0] ces_4_3_io_outs_up;
- wire [63:0] ces_4_3_io_outs_left;
- wire ces_4_3_io_lsbIns_1;
- wire ces_4_3_io_lsbIns_2;
- wire ces_4_3_io_lsbIns_3;
- wire ces_4_3_io_lsbIns_4;
- wire ces_4_3_io_lsbIns_5;
- wire ces_4_3_io_lsbIns_6;
- wire ces_4_3_io_lsbIns_7;
- wire ces_4_3_io_lsbOuts_0;
- wire ces_4_3_io_lsbOuts_1;
- wire ces_4_3_io_lsbOuts_2;
- wire ces_4_3_io_lsbOuts_3;
- wire ces_4_3_io_lsbOuts_4;
- wire ces_4_3_io_lsbOuts_5;
- wire ces_4_3_io_lsbOuts_6;
- wire ces_4_3_io_lsbOuts_7;
- wire ces_4_4_clock;
- wire [63:0] ces_4_4_io_ins_down;
- wire [63:0] ces_4_4_io_ins_right;
- wire [63:0] ces_4_4_io_ins_up;
- wire [63:0] ces_4_4_io_ins_left;
- wire [63:0] ces_4_4_io_outs_down;
- wire [63:0] ces_4_4_io_outs_right;
- wire [63:0] ces_4_4_io_outs_up;
- wire [63:0] ces_4_4_io_outs_left;
- wire ces_4_4_io_lsbIns_1;
- wire ces_4_4_io_lsbIns_2;
- wire ces_4_4_io_lsbIns_3;
- wire ces_4_4_io_lsbIns_4;
- wire ces_4_4_io_lsbIns_5;
- wire ces_4_4_io_lsbIns_6;
- wire ces_4_4_io_lsbIns_7;
- wire ces_4_4_io_lsbOuts_0;
- wire ces_4_4_io_lsbOuts_1;
- wire ces_4_4_io_lsbOuts_2;
- wire ces_4_4_io_lsbOuts_3;
- wire ces_4_4_io_lsbOuts_4;
- wire ces_4_4_io_lsbOuts_5;
- wire ces_4_4_io_lsbOuts_6;
- wire ces_4_4_io_lsbOuts_7;
- wire ces_4_5_clock;
- wire [63:0] ces_4_5_io_ins_down;
- wire [63:0] ces_4_5_io_ins_right;
- wire [63:0] ces_4_5_io_ins_up;
- wire [63:0] ces_4_5_io_ins_left;
- wire [63:0] ces_4_5_io_outs_down;
- wire [63:0] ces_4_5_io_outs_right;
- wire [63:0] ces_4_5_io_outs_up;
- wire [63:0] ces_4_5_io_outs_left;
- wire ces_4_5_io_lsbIns_1;
- wire ces_4_5_io_lsbIns_2;
- wire ces_4_5_io_lsbIns_3;
- wire ces_4_5_io_lsbIns_4;
- wire ces_4_5_io_lsbIns_5;
- wire ces_4_5_io_lsbIns_6;
- wire ces_4_5_io_lsbIns_7;
- wire ces_4_5_io_lsbOuts_0;
- wire ces_4_5_io_lsbOuts_1;
- wire ces_4_5_io_lsbOuts_2;
- wire ces_4_5_io_lsbOuts_3;
- wire ces_4_5_io_lsbOuts_4;
- wire ces_4_5_io_lsbOuts_5;
- wire ces_4_5_io_lsbOuts_6;
- wire ces_4_5_io_lsbOuts_7;
- wire ces_4_6_clock;
- wire [63:0] ces_4_6_io_ins_down;
- wire [63:0] ces_4_6_io_ins_right;
- wire [63:0] ces_4_6_io_ins_up;
- wire [63:0] ces_4_6_io_ins_left;
- wire [63:0] ces_4_6_io_outs_down;
- wire [63:0] ces_4_6_io_outs_right;
- wire [63:0] ces_4_6_io_outs_up;
- wire [63:0] ces_4_6_io_outs_left;
- wire ces_4_6_io_lsbIns_1;
- wire ces_4_6_io_lsbIns_2;
- wire ces_4_6_io_lsbIns_3;
- wire ces_4_6_io_lsbIns_4;
- wire ces_4_6_io_lsbIns_5;
- wire ces_4_6_io_lsbIns_6;
- wire ces_4_6_io_lsbIns_7;
- wire ces_4_6_io_lsbOuts_0;
- wire ces_4_6_io_lsbOuts_1;
- wire ces_4_6_io_lsbOuts_2;
- wire ces_4_6_io_lsbOuts_3;
- wire ces_4_6_io_lsbOuts_4;
- wire ces_4_6_io_lsbOuts_5;
- wire ces_4_6_io_lsbOuts_6;
- wire ces_4_6_io_lsbOuts_7;
- wire ces_4_7_clock;
- wire [63:0] ces_4_7_io_ins_down;
- wire [63:0] ces_4_7_io_ins_right;
- wire [63:0] ces_4_7_io_ins_up;
- wire [63:0] ces_4_7_io_ins_left;
- wire [63:0] ces_4_7_io_outs_down;
- wire [63:0] ces_4_7_io_outs_right;
- wire [63:0] ces_4_7_io_outs_up;
- wire [63:0] ces_4_7_io_outs_left;
- wire ces_4_7_io_lsbIns_1;
- wire ces_4_7_io_lsbIns_2;
- wire ces_4_7_io_lsbIns_3;
- wire ces_4_7_io_lsbIns_4;
- wire ces_4_7_io_lsbIns_5;
- wire ces_4_7_io_lsbIns_6;
- wire ces_4_7_io_lsbIns_7;
- wire ces_4_7_io_lsbOuts_0;
- wire ces_4_7_io_lsbOuts_1;
- wire ces_4_7_io_lsbOuts_2;
- wire ces_4_7_io_lsbOuts_3;
- wire ces_4_7_io_lsbOuts_4;
- wire ces_4_7_io_lsbOuts_5;
- wire ces_4_7_io_lsbOuts_6;
- wire ces_4_7_io_lsbOuts_7;
- wire ces_5_0_clock;
- wire [63:0] ces_5_0_io_ins_down;
- wire [63:0] ces_5_0_io_ins_right;
- wire [63:0] ces_5_0_io_ins_up;
- wire [63:0] ces_5_0_io_ins_left;
- wire [63:0] ces_5_0_io_outs_down;
- wire [63:0] ces_5_0_io_outs_right;
- wire [63:0] ces_5_0_io_outs_up;
- wire [63:0] ces_5_0_io_outs_left;
- wire ces_5_0_io_lsbIns_1;
- wire ces_5_0_io_lsbIns_2;
- wire ces_5_0_io_lsbIns_3;
- wire ces_5_0_io_lsbIns_4;
- wire ces_5_0_io_lsbIns_5;
- wire ces_5_0_io_lsbIns_6;
- wire ces_5_0_io_lsbIns_7;
- wire ces_5_0_io_lsbOuts_0;
- wire ces_5_0_io_lsbOuts_1;
- wire ces_5_0_io_lsbOuts_2;
- wire ces_5_0_io_lsbOuts_3;
- wire ces_5_0_io_lsbOuts_4;
- wire ces_5_0_io_lsbOuts_5;
- wire ces_5_0_io_lsbOuts_6;
- wire ces_5_0_io_lsbOuts_7;
- wire ces_5_1_clock;
- wire [63:0] ces_5_1_io_ins_down;
- wire [63:0] ces_5_1_io_ins_right;
- wire [63:0] ces_5_1_io_ins_up;
- wire [63:0] ces_5_1_io_ins_left;
- wire [63:0] ces_5_1_io_outs_down;
- wire [63:0] ces_5_1_io_outs_right;
- wire [63:0] ces_5_1_io_outs_up;
- wire [63:0] ces_5_1_io_outs_left;
- wire ces_5_1_io_lsbIns_1;
- wire ces_5_1_io_lsbIns_2;
- wire ces_5_1_io_lsbIns_3;
- wire ces_5_1_io_lsbIns_4;
- wire ces_5_1_io_lsbIns_5;
- wire ces_5_1_io_lsbIns_6;
- wire ces_5_1_io_lsbIns_7;
- wire ces_5_1_io_lsbOuts_0;
- wire ces_5_1_io_lsbOuts_1;
- wire ces_5_1_io_lsbOuts_2;
- wire ces_5_1_io_lsbOuts_3;
- wire ces_5_1_io_lsbOuts_4;
- wire ces_5_1_io_lsbOuts_5;
- wire ces_5_1_io_lsbOuts_6;
- wire ces_5_1_io_lsbOuts_7;
- wire ces_5_2_clock;
- wire [63:0] ces_5_2_io_ins_down;
- wire [63:0] ces_5_2_io_ins_right;
- wire [63:0] ces_5_2_io_ins_up;
- wire [63:0] ces_5_2_io_ins_left;
- wire [63:0] ces_5_2_io_outs_down;
- wire [63:0] ces_5_2_io_outs_right;
- wire [63:0] ces_5_2_io_outs_up;
- wire [63:0] ces_5_2_io_outs_left;
- wire ces_5_2_io_lsbIns_1;
- wire ces_5_2_io_lsbIns_2;
- wire ces_5_2_io_lsbIns_3;
- wire ces_5_2_io_lsbIns_4;
- wire ces_5_2_io_lsbIns_5;
- wire ces_5_2_io_lsbIns_6;
- wire ces_5_2_io_lsbIns_7;
- wire ces_5_2_io_lsbOuts_0;
- wire ces_5_2_io_lsbOuts_1;
- wire ces_5_2_io_lsbOuts_2;
- wire ces_5_2_io_lsbOuts_3;
- wire ces_5_2_io_lsbOuts_4;
- wire ces_5_2_io_lsbOuts_5;
- wire ces_5_2_io_lsbOuts_6;
- wire ces_5_2_io_lsbOuts_7;
- wire ces_5_3_clock;
- wire [63:0] ces_5_3_io_ins_down;
- wire [63:0] ces_5_3_io_ins_right;
- wire [63:0] ces_5_3_io_ins_up;
- wire [63:0] ces_5_3_io_ins_left;
- wire [63:0] ces_5_3_io_outs_down;
- wire [63:0] ces_5_3_io_outs_right;
- wire [63:0] ces_5_3_io_outs_up;
- wire [63:0] ces_5_3_io_outs_left;
- wire ces_5_3_io_lsbIns_1;
- wire ces_5_3_io_lsbIns_2;
- wire ces_5_3_io_lsbIns_3;
- wire ces_5_3_io_lsbIns_4;
- wire ces_5_3_io_lsbIns_5;
- wire ces_5_3_io_lsbIns_6;
- wire ces_5_3_io_lsbIns_7;
- wire ces_5_3_io_lsbOuts_0;
- wire ces_5_3_io_lsbOuts_1;
- wire ces_5_3_io_lsbOuts_2;
- wire ces_5_3_io_lsbOuts_3;
- wire ces_5_3_io_lsbOuts_4;
- wire ces_5_3_io_lsbOuts_5;
- wire ces_5_3_io_lsbOuts_6;
- wire ces_5_3_io_lsbOuts_7;
- wire ces_5_4_clock;
- wire [63:0] ces_5_4_io_ins_down;
- wire [63:0] ces_5_4_io_ins_right;
- wire [63:0] ces_5_4_io_ins_up;
- wire [63:0] ces_5_4_io_ins_left;
- wire [63:0] ces_5_4_io_outs_down;
- wire [63:0] ces_5_4_io_outs_right;
- wire [63:0] ces_5_4_io_outs_up;
- wire [63:0] ces_5_4_io_outs_left;
- wire ces_5_4_io_lsbIns_1;
- wire ces_5_4_io_lsbIns_2;
- wire ces_5_4_io_lsbIns_3;
- wire ces_5_4_io_lsbIns_4;
- wire ces_5_4_io_lsbIns_5;
- wire ces_5_4_io_lsbIns_6;
- wire ces_5_4_io_lsbIns_7;
- wire ces_5_4_io_lsbOuts_0;
- wire ces_5_4_io_lsbOuts_1;
- wire ces_5_4_io_lsbOuts_2;
- wire ces_5_4_io_lsbOuts_3;
- wire ces_5_4_io_lsbOuts_4;
- wire ces_5_4_io_lsbOuts_5;
- wire ces_5_4_io_lsbOuts_6;
- wire ces_5_4_io_lsbOuts_7;
- wire ces_5_5_clock;
- wire [63:0] ces_5_5_io_ins_down;
- wire [63:0] ces_5_5_io_ins_right;
- wire [63:0] ces_5_5_io_ins_up;
- wire [63:0] ces_5_5_io_ins_left;
- wire [63:0] ces_5_5_io_outs_down;
- wire [63:0] ces_5_5_io_outs_right;
- wire [63:0] ces_5_5_io_outs_up;
- wire [63:0] ces_5_5_io_outs_left;
- wire ces_5_5_io_lsbIns_1;
- wire ces_5_5_io_lsbIns_2;
- wire ces_5_5_io_lsbIns_3;
- wire ces_5_5_io_lsbIns_4;
- wire ces_5_5_io_lsbIns_5;
- wire ces_5_5_io_lsbIns_6;
- wire ces_5_5_io_lsbIns_7;
- wire ces_5_5_io_lsbOuts_0;
- wire ces_5_5_io_lsbOuts_1;
- wire ces_5_5_io_lsbOuts_2;
- wire ces_5_5_io_lsbOuts_3;
- wire ces_5_5_io_lsbOuts_4;
- wire ces_5_5_io_lsbOuts_5;
- wire ces_5_5_io_lsbOuts_6;
- wire ces_5_5_io_lsbOuts_7;
- wire ces_5_6_clock;
- wire [63:0] ces_5_6_io_ins_down;
- wire [63:0] ces_5_6_io_ins_right;
- wire [63:0] ces_5_6_io_ins_up;
- wire [63:0] ces_5_6_io_ins_left;
- wire [63:0] ces_5_6_io_outs_down;
- wire [63:0] ces_5_6_io_outs_right;
- wire [63:0] ces_5_6_io_outs_up;
- wire [63:0] ces_5_6_io_outs_left;
- wire ces_5_6_io_lsbIns_1;
- wire ces_5_6_io_lsbIns_2;
- wire ces_5_6_io_lsbIns_3;
- wire ces_5_6_io_lsbIns_4;
- wire ces_5_6_io_lsbIns_5;
- wire ces_5_6_io_lsbIns_6;
- wire ces_5_6_io_lsbIns_7;
- wire ces_5_6_io_lsbOuts_0;
- wire ces_5_6_io_lsbOuts_1;
- wire ces_5_6_io_lsbOuts_2;
- wire ces_5_6_io_lsbOuts_3;
- wire ces_5_6_io_lsbOuts_4;
- wire ces_5_6_io_lsbOuts_5;
- wire ces_5_6_io_lsbOuts_6;
- wire ces_5_6_io_lsbOuts_7;
- wire ces_5_7_clock;
- wire [63:0] ces_5_7_io_ins_down;
- wire [63:0] ces_5_7_io_ins_right;
- wire [63:0] ces_5_7_io_ins_up;
- wire [63:0] ces_5_7_io_ins_left;
- wire [63:0] ces_5_7_io_outs_down;
- wire [63:0] ces_5_7_io_outs_right;
- wire [63:0] ces_5_7_io_outs_up;
- wire [63:0] ces_5_7_io_outs_left;
- wire ces_5_7_io_lsbIns_1;
- wire ces_5_7_io_lsbIns_2;
- wire ces_5_7_io_lsbIns_3;
- wire ces_5_7_io_lsbIns_4;
- wire ces_5_7_io_lsbIns_5;
- wire ces_5_7_io_lsbIns_6;
- wire ces_5_7_io_lsbIns_7;
- wire ces_5_7_io_lsbOuts_0;
- wire ces_5_7_io_lsbOuts_1;
- wire ces_5_7_io_lsbOuts_2;
- wire ces_5_7_io_lsbOuts_3;
- wire ces_5_7_io_lsbOuts_4;
- wire ces_5_7_io_lsbOuts_5;
- wire ces_5_7_io_lsbOuts_6;
- wire ces_5_7_io_lsbOuts_7;
- wire ces_6_0_clock;
- wire [63:0] ces_6_0_io_ins_down;
- wire [63:0] ces_6_0_io_ins_right;
- wire [63:0] ces_6_0_io_ins_up;
- wire [63:0] ces_6_0_io_ins_left;
- wire [63:0] ces_6_0_io_outs_down;
- wire [63:0] ces_6_0_io_outs_right;
- wire [63:0] ces_6_0_io_outs_up;
- wire [63:0] ces_6_0_io_outs_left;
- wire ces_6_0_io_lsbIns_1;
- wire ces_6_0_io_lsbIns_2;
- wire ces_6_0_io_lsbIns_3;
- wire ces_6_0_io_lsbIns_4;
- wire ces_6_0_io_lsbIns_5;
- wire ces_6_0_io_lsbIns_6;
- wire ces_6_0_io_lsbIns_7;
- wire ces_6_0_io_lsbOuts_0;
- wire ces_6_0_io_lsbOuts_1;
- wire ces_6_0_io_lsbOuts_2;
- wire ces_6_0_io_lsbOuts_3;
- wire ces_6_0_io_lsbOuts_4;
- wire ces_6_0_io_lsbOuts_5;
- wire ces_6_0_io_lsbOuts_6;
- wire ces_6_0_io_lsbOuts_7;
- wire ces_6_1_clock;
- wire [63:0] ces_6_1_io_ins_down;
- wire [63:0] ces_6_1_io_ins_right;
- wire [63:0] ces_6_1_io_ins_up;
- wire [63:0] ces_6_1_io_ins_left;
- wire [63:0] ces_6_1_io_outs_down;
- wire [63:0] ces_6_1_io_outs_right;
- wire [63:0] ces_6_1_io_outs_up;
- wire [63:0] ces_6_1_io_outs_left;
- wire ces_6_1_io_lsbIns_1;
- wire ces_6_1_io_lsbIns_2;
- wire ces_6_1_io_lsbIns_3;
- wire ces_6_1_io_lsbIns_4;
- wire ces_6_1_io_lsbIns_5;
- wire ces_6_1_io_lsbIns_6;
- wire ces_6_1_io_lsbIns_7;
- wire ces_6_1_io_lsbOuts_0;
- wire ces_6_1_io_lsbOuts_1;
- wire ces_6_1_io_lsbOuts_2;
- wire ces_6_1_io_lsbOuts_3;
- wire ces_6_1_io_lsbOuts_4;
- wire ces_6_1_io_lsbOuts_5;
- wire ces_6_1_io_lsbOuts_6;
- wire ces_6_1_io_lsbOuts_7;
- wire ces_6_2_clock;
- wire [63:0] ces_6_2_io_ins_down;
- wire [63:0] ces_6_2_io_ins_right;
- wire [63:0] ces_6_2_io_ins_up;
- wire [63:0] ces_6_2_io_ins_left;
- wire [63:0] ces_6_2_io_outs_down;
- wire [63:0] ces_6_2_io_outs_right;
- wire [63:0] ces_6_2_io_outs_up;
- wire [63:0] ces_6_2_io_outs_left;
- wire ces_6_2_io_lsbIns_1;
- wire ces_6_2_io_lsbIns_2;
- wire ces_6_2_io_lsbIns_3;
- wire ces_6_2_io_lsbIns_4;
- wire ces_6_2_io_lsbIns_5;
- wire ces_6_2_io_lsbIns_6;
- wire ces_6_2_io_lsbIns_7;
- wire ces_6_2_io_lsbOuts_0;
- wire ces_6_2_io_lsbOuts_1;
- wire ces_6_2_io_lsbOuts_2;
- wire ces_6_2_io_lsbOuts_3;
- wire ces_6_2_io_lsbOuts_4;
- wire ces_6_2_io_lsbOuts_5;
- wire ces_6_2_io_lsbOuts_6;
- wire ces_6_2_io_lsbOuts_7;
- wire ces_6_3_clock;
- wire [63:0] ces_6_3_io_ins_down;
- wire [63:0] ces_6_3_io_ins_right;
- wire [63:0] ces_6_3_io_ins_up;
- wire [63:0] ces_6_3_io_ins_left;
- wire [63:0] ces_6_3_io_outs_down;
- wire [63:0] ces_6_3_io_outs_right;
- wire [63:0] ces_6_3_io_outs_up;
- wire [63:0] ces_6_3_io_outs_left;
- wire ces_6_3_io_lsbIns_1;
- wire ces_6_3_io_lsbIns_2;
- wire ces_6_3_io_lsbIns_3;
- wire ces_6_3_io_lsbIns_4;
- wire ces_6_3_io_lsbIns_5;
- wire ces_6_3_io_lsbIns_6;
- wire ces_6_3_io_lsbIns_7;
- wire ces_6_3_io_lsbOuts_0;
- wire ces_6_3_io_lsbOuts_1;
- wire ces_6_3_io_lsbOuts_2;
- wire ces_6_3_io_lsbOuts_3;
- wire ces_6_3_io_lsbOuts_4;
- wire ces_6_3_io_lsbOuts_5;
- wire ces_6_3_io_lsbOuts_6;
- wire ces_6_3_io_lsbOuts_7;
- wire ces_6_4_clock;
- wire [63:0] ces_6_4_io_ins_down;
- wire [63:0] ces_6_4_io_ins_right;
- wire [63:0] ces_6_4_io_ins_up;
- wire [63:0] ces_6_4_io_ins_left;
- wire [63:0] ces_6_4_io_outs_down;
- wire [63:0] ces_6_4_io_outs_right;
- wire [63:0] ces_6_4_io_outs_up;
- wire [63:0] ces_6_4_io_outs_left;
- wire ces_6_4_io_lsbIns_1;
- wire ces_6_4_io_lsbIns_2;
- wire ces_6_4_io_lsbIns_3;
- wire ces_6_4_io_lsbIns_4;
- wire ces_6_4_io_lsbIns_5;
- wire ces_6_4_io_lsbIns_6;
- wire ces_6_4_io_lsbIns_7;
- wire ces_6_4_io_lsbOuts_0;
- wire ces_6_4_io_lsbOuts_1;
- wire ces_6_4_io_lsbOuts_2;
- wire ces_6_4_io_lsbOuts_3;
- wire ces_6_4_io_lsbOuts_4;
- wire ces_6_4_io_lsbOuts_5;
- wire ces_6_4_io_lsbOuts_6;
- wire ces_6_4_io_lsbOuts_7;
- wire ces_6_5_clock;
- wire [63:0] ces_6_5_io_ins_down;
- wire [63:0] ces_6_5_io_ins_right;
- wire [63:0] ces_6_5_io_ins_up;
- wire [63:0] ces_6_5_io_ins_left;
- wire [63:0] ces_6_5_io_outs_down;
- wire [63:0] ces_6_5_io_outs_right;
- wire [63:0] ces_6_5_io_outs_up;
- wire [63:0] ces_6_5_io_outs_left;
- wire ces_6_5_io_lsbIns_1;
- wire ces_6_5_io_lsbIns_2;
- wire ces_6_5_io_lsbIns_3;
- wire ces_6_5_io_lsbIns_4;
- wire ces_6_5_io_lsbIns_5;
- wire ces_6_5_io_lsbIns_6;
- wire ces_6_5_io_lsbIns_7;
- wire ces_6_5_io_lsbOuts_0;
- wire ces_6_5_io_lsbOuts_1;
- wire ces_6_5_io_lsbOuts_2;
- wire ces_6_5_io_lsbOuts_3;
- wire ces_6_5_io_lsbOuts_4;
- wire ces_6_5_io_lsbOuts_5;
- wire ces_6_5_io_lsbOuts_6;
- wire ces_6_5_io_lsbOuts_7;
- wire ces_6_6_clock;
- wire [63:0] ces_6_6_io_ins_down;
- wire [63:0] ces_6_6_io_ins_right;
- wire [63:0] ces_6_6_io_ins_up;
- wire [63:0] ces_6_6_io_ins_left;
- wire [63:0] ces_6_6_io_outs_down;
- wire [63:0] ces_6_6_io_outs_right;
- wire [63:0] ces_6_6_io_outs_up;
- wire [63:0] ces_6_6_io_outs_left;
- wire ces_6_6_io_lsbIns_1;
- wire ces_6_6_io_lsbIns_2;
- wire ces_6_6_io_lsbIns_3;
- wire ces_6_6_io_lsbIns_4;
- wire ces_6_6_io_lsbIns_5;
- wire ces_6_6_io_lsbIns_6;
- wire ces_6_6_io_lsbIns_7;
- wire ces_6_6_io_lsbOuts_0;
- wire ces_6_6_io_lsbOuts_1;
- wire ces_6_6_io_lsbOuts_2;
- wire ces_6_6_io_lsbOuts_3;
- wire ces_6_6_io_lsbOuts_4;
- wire ces_6_6_io_lsbOuts_5;
- wire ces_6_6_io_lsbOuts_6;
- wire ces_6_6_io_lsbOuts_7;
- wire ces_6_7_clock;
- wire [63:0] ces_6_7_io_ins_down;
- wire [63:0] ces_6_7_io_ins_right;
- wire [63:0] ces_6_7_io_ins_up;
- wire [63:0] ces_6_7_io_ins_left;
- wire [63:0] ces_6_7_io_outs_down;
- wire [63:0] ces_6_7_io_outs_right;
- wire [63:0] ces_6_7_io_outs_up;
- wire [63:0] ces_6_7_io_outs_left;
- wire ces_6_7_io_lsbIns_1;
- wire ces_6_7_io_lsbIns_2;
- wire ces_6_7_io_lsbIns_3;
- wire ces_6_7_io_lsbIns_4;
- wire ces_6_7_io_lsbIns_5;
- wire ces_6_7_io_lsbIns_6;
- wire ces_6_7_io_lsbIns_7;
- wire ces_6_7_io_lsbOuts_0;
- wire ces_6_7_io_lsbOuts_1;
- wire ces_6_7_io_lsbOuts_2;
- wire ces_6_7_io_lsbOuts_3;
- wire ces_6_7_io_lsbOuts_4;
- wire ces_6_7_io_lsbOuts_5;
- wire ces_6_7_io_lsbOuts_6;
- wire ces_6_7_io_lsbOuts_7;
- wire ces_7_0_clock;
- wire [63:0] ces_7_0_io_ins_down;
- wire [63:0] ces_7_0_io_ins_right;
- wire [63:0] ces_7_0_io_ins_up;
- wire [63:0] ces_7_0_io_ins_left;
- wire [63:0] ces_7_0_io_outs_down;
- wire [63:0] ces_7_0_io_outs_right;
- wire [63:0] ces_7_0_io_outs_up;
- wire [63:0] ces_7_0_io_outs_left;
- wire ces_7_0_io_lsbIns_1;
- wire ces_7_0_io_lsbIns_2;
- wire ces_7_0_io_lsbIns_3;
- wire ces_7_0_io_lsbIns_4;
- wire ces_7_0_io_lsbIns_5;
- wire ces_7_0_io_lsbIns_6;
- wire ces_7_0_io_lsbIns_7;
- wire ces_7_0_io_lsbOuts_0;
- wire ces_7_0_io_lsbOuts_1;
- wire ces_7_0_io_lsbOuts_2;
- wire ces_7_0_io_lsbOuts_3;
- wire ces_7_0_io_lsbOuts_4;
- wire ces_7_0_io_lsbOuts_5;
- wire ces_7_0_io_lsbOuts_6;
- wire ces_7_0_io_lsbOuts_7;
- wire ces_7_1_clock;
- wire [63:0] ces_7_1_io_ins_down;
- wire [63:0] ces_7_1_io_ins_right;
- wire [63:0] ces_7_1_io_ins_up;
- wire [63:0] ces_7_1_io_ins_left;
- wire [63:0] ces_7_1_io_outs_down;
- wire [63:0] ces_7_1_io_outs_right;
- wire [63:0] ces_7_1_io_outs_up;
- wire [63:0] ces_7_1_io_outs_left;
- wire ces_7_1_io_lsbIns_1;
- wire ces_7_1_io_lsbIns_2;
- wire ces_7_1_io_lsbIns_3;
- wire ces_7_1_io_lsbIns_4;
- wire ces_7_1_io_lsbIns_5;
- wire ces_7_1_io_lsbIns_6;
- wire ces_7_1_io_lsbIns_7;
- wire ces_7_1_io_lsbOuts_0;
- wire ces_7_1_io_lsbOuts_1;
- wire ces_7_1_io_lsbOuts_2;
- wire ces_7_1_io_lsbOuts_3;
- wire ces_7_1_io_lsbOuts_4;
- wire ces_7_1_io_lsbOuts_5;
- wire ces_7_1_io_lsbOuts_6;
- wire ces_7_1_io_lsbOuts_7;
- wire ces_7_2_clock;
- wire [63:0] ces_7_2_io_ins_down;
- wire [63:0] ces_7_2_io_ins_right;
- wire [63:0] ces_7_2_io_ins_up;
- wire [63:0] ces_7_2_io_ins_left;
- wire [63:0] ces_7_2_io_outs_down;
- wire [63:0] ces_7_2_io_outs_right;
- wire [63:0] ces_7_2_io_outs_up;
- wire [63:0] ces_7_2_io_outs_left;
- wire ces_7_2_io_lsbIns_1;
- wire ces_7_2_io_lsbIns_2;
- wire ces_7_2_io_lsbIns_3;
- wire ces_7_2_io_lsbIns_4;
- wire ces_7_2_io_lsbIns_5;
- wire ces_7_2_io_lsbIns_6;
- wire ces_7_2_io_lsbIns_7;
- wire ces_7_2_io_lsbOuts_0;
- wire ces_7_2_io_lsbOuts_1;
- wire ces_7_2_io_lsbOuts_2;
- wire ces_7_2_io_lsbOuts_3;
- wire ces_7_2_io_lsbOuts_4;
- wire ces_7_2_io_lsbOuts_5;
- wire ces_7_2_io_lsbOuts_6;
- wire ces_7_2_io_lsbOuts_7;
- wire ces_7_3_clock;
- wire [63:0] ces_7_3_io_ins_down;
- wire [63:0] ces_7_3_io_ins_right;
- wire [63:0] ces_7_3_io_ins_up;
- wire [63:0] ces_7_3_io_ins_left;
- wire [63:0] ces_7_3_io_outs_down;
- wire [63:0] ces_7_3_io_outs_right;
- wire [63:0] ces_7_3_io_outs_up;
- wire [63:0] ces_7_3_io_outs_left;
- wire ces_7_3_io_lsbIns_1;
- wire ces_7_3_io_lsbIns_2;
- wire ces_7_3_io_lsbIns_3;
- wire ces_7_3_io_lsbIns_4;
- wire ces_7_3_io_lsbIns_5;
- wire ces_7_3_io_lsbIns_6;
- wire ces_7_3_io_lsbIns_7;
- wire ces_7_3_io_lsbOuts_0;
- wire ces_7_3_io_lsbOuts_1;
- wire ces_7_3_io_lsbOuts_2;
- wire ces_7_3_io_lsbOuts_3;
- wire ces_7_3_io_lsbOuts_4;
- wire ces_7_3_io_lsbOuts_5;
- wire ces_7_3_io_lsbOuts_6;
- wire ces_7_3_io_lsbOuts_7;
- wire ces_7_4_clock;
- wire [63:0] ces_7_4_io_ins_down;
- wire [63:0] ces_7_4_io_ins_right;
- wire [63:0] ces_7_4_io_ins_up;
- wire [63:0] ces_7_4_io_ins_left;
- wire [63:0] ces_7_4_io_outs_down;
- wire [63:0] ces_7_4_io_outs_right;
- wire [63:0] ces_7_4_io_outs_up;
- wire [63:0] ces_7_4_io_outs_left;
- wire ces_7_4_io_lsbIns_1;
- wire ces_7_4_io_lsbIns_2;
- wire ces_7_4_io_lsbIns_3;
- wire ces_7_4_io_lsbIns_4;
- wire ces_7_4_io_lsbIns_5;
- wire ces_7_4_io_lsbIns_6;
- wire ces_7_4_io_lsbIns_7;
- wire ces_7_4_io_lsbOuts_0;
- wire ces_7_4_io_lsbOuts_1;
- wire ces_7_4_io_lsbOuts_2;
- wire ces_7_4_io_lsbOuts_3;
- wire ces_7_4_io_lsbOuts_4;
- wire ces_7_4_io_lsbOuts_5;
- wire ces_7_4_io_lsbOuts_6;
- wire ces_7_4_io_lsbOuts_7;
- wire ces_7_5_clock;
- wire [63:0] ces_7_5_io_ins_down;
- wire [63:0] ces_7_5_io_ins_right;
- wire [63:0] ces_7_5_io_ins_up;
- wire [63:0] ces_7_5_io_ins_left;
- wire [63:0] ces_7_5_io_outs_down;
- wire [63:0] ces_7_5_io_outs_right;
- wire [63:0] ces_7_5_io_outs_up;
- wire [63:0] ces_7_5_io_outs_left;
- wire ces_7_5_io_lsbIns_1;
- wire ces_7_5_io_lsbIns_2;
- wire ces_7_5_io_lsbIns_3;
- wire ces_7_5_io_lsbIns_4;
- wire ces_7_5_io_lsbIns_5;
- wire ces_7_5_io_lsbIns_6;
- wire ces_7_5_io_lsbIns_7;
- wire ces_7_5_io_lsbOuts_0;
- wire ces_7_5_io_lsbOuts_1;
- wire ces_7_5_io_lsbOuts_2;
- wire ces_7_5_io_lsbOuts_3;
- wire ces_7_5_io_lsbOuts_4;
- wire ces_7_5_io_lsbOuts_5;
- wire ces_7_5_io_lsbOuts_6;
- wire ces_7_5_io_lsbOuts_7;
- wire ces_7_6_clock;
- wire [63:0] ces_7_6_io_ins_down;
- wire [63:0] ces_7_6_io_ins_right;
- wire [63:0] ces_7_6_io_ins_up;
- wire [63:0] ces_7_6_io_ins_left;
- wire [63:0] ces_7_6_io_outs_down;
- wire [63:0] ces_7_6_io_outs_right;
- wire [63:0] ces_7_6_io_outs_up;
- wire [63:0] ces_7_6_io_outs_left;
- wire ces_7_6_io_lsbIns_1;
- wire ces_7_6_io_lsbIns_2;
- wire ces_7_6_io_lsbIns_3;
- wire ces_7_6_io_lsbIns_4;
- wire ces_7_6_io_lsbIns_5;
- wire ces_7_6_io_lsbIns_6;
- wire ces_7_6_io_lsbIns_7;
- wire ces_7_6_io_lsbOuts_0;
- wire ces_7_6_io_lsbOuts_1;
- wire ces_7_6_io_lsbOuts_2;
- wire ces_7_6_io_lsbOuts_3;
- wire ces_7_6_io_lsbOuts_4;
- wire ces_7_6_io_lsbOuts_5;
- wire ces_7_6_io_lsbOuts_6;
- wire ces_7_6_io_lsbOuts_7;
- wire ces_7_7_clock;
- wire [63:0] ces_7_7_io_ins_down;
- wire [63:0] ces_7_7_io_ins_right;
- wire [63:0] ces_7_7_io_ins_up;
- wire [63:0] ces_7_7_io_ins_left;
- wire [63:0] ces_7_7_io_outs_down;
- wire [63:0] ces_7_7_io_outs_right;
- wire [63:0] ces_7_7_io_outs_up;
- wire [63:0] ces_7_7_io_outs_left;
- wire ces_7_7_io_lsbIns_1;
- wire ces_7_7_io_lsbIns_2;
- wire ces_7_7_io_lsbIns_3;
- wire ces_7_7_io_lsbIns_4;
- wire ces_7_7_io_lsbIns_5;
- wire ces_7_7_io_lsbIns_6;
- wire ces_7_7_io_lsbIns_7;
- wire ces_7_7_io_lsbOuts_0;
- wire ces_7_7_io_lsbOuts_1;
- wire ces_7_7_io_lsbOuts_2;
- wire ces_7_7_io_lsbOuts_3;
- wire ces_7_7_io_lsbOuts_4;
- wire ces_7_7_io_lsbOuts_5;
- wire ces_7_7_io_lsbOuts_6;
- wire ces_7_7_io_lsbOuts_7;
- reg REG_0;
- reg REG_1;
- reg REG_2;
- reg REG_3;
- reg REG_4;
- reg REG_5;
- reg REG_6;
- reg REG_7;
- reg REG_8;
- reg REG_9;
- reg REG_10;
- reg REG_11;
- reg REG_12;
- reg REG_13;
- reg REG_14;
- reg REG_15;
- reg REG_16;
- reg REG_17;
- reg REG_18;
- reg REG_19;
- reg REG_20;
- reg REG_21;
- reg REG_22;
- reg REG_23;
- reg REG_24;
- reg REG_25;
- reg REG_26;
- reg REG_27;
- reg REG_28;
- reg REG_29;
- reg REG_30;
- reg REG_31;
- reg REG_32;
- reg REG_33;
- reg REG_34;
- reg REG_35;
- reg REG_36;
- reg REG_37;
- reg REG_38;
- reg REG_39;
- reg REG_40;
- reg REG_41;
- reg REG_42;
- reg REG_43;
- reg REG_44;
- reg REG_45;
- reg REG_46;
- reg REG_47;
- reg REG_48;
- reg REG_49;
- reg REG_50;
- reg REG_51;
- reg REG_52;
- reg REG_53;
- reg REG_54;
- reg REG_55;
- reg REG_56;
- reg REG_57;
- reg REG_58;
- reg REG_59;
- reg REG_60;
- reg REG_61;
- reg REG_62;
- reg REG_63;
- Element ces_0_0 (
- .clock(ces_0_0_clock),
- .io_ins_down(ces_0_0_io_ins_down),
- .io_ins_right(ces_0_0_io_ins_right),
- .io_ins_up(ces_0_0_io_ins_up),
- .io_ins_left(ces_0_0_io_ins_left),
- .io_outs_down(ces_0_0_io_outs_down),
- .io_outs_right(ces_0_0_io_outs_right),
- .io_outs_up(ces_0_0_io_outs_up),
- .io_outs_left(ces_0_0_io_outs_left),
- .io_lsbIns_1(ces_0_0_io_lsbIns_1),
- .io_lsbIns_2(ces_0_0_io_lsbIns_2),
- .io_lsbIns_3(ces_0_0_io_lsbIns_3),
- .io_lsbIns_4(ces_0_0_io_lsbIns_4),
- .io_lsbIns_5(ces_0_0_io_lsbIns_5),
- .io_lsbIns_6(ces_0_0_io_lsbIns_6),
- .io_lsbIns_7(ces_0_0_io_lsbIns_7),
- .io_lsbOuts_0(ces_0_0_io_lsbOuts_0),
- .io_lsbOuts_1(ces_0_0_io_lsbOuts_1),
- .io_lsbOuts_2(ces_0_0_io_lsbOuts_2),
- .io_lsbOuts_3(ces_0_0_io_lsbOuts_3),
- .io_lsbOuts_4(ces_0_0_io_lsbOuts_4),
- .io_lsbOuts_5(ces_0_0_io_lsbOuts_5),
- .io_lsbOuts_6(ces_0_0_io_lsbOuts_6),
- .io_lsbOuts_7(ces_0_0_io_lsbOuts_7)
- );
- Element ces_0_1 (
- .clock(ces_0_1_clock),
- .io_ins_down(ces_0_1_io_ins_down),
- .io_ins_right(ces_0_1_io_ins_right),
- .io_ins_up(ces_0_1_io_ins_up),
- .io_ins_left(ces_0_1_io_ins_left),
- .io_outs_down(ces_0_1_io_outs_down),
- .io_outs_right(ces_0_1_io_outs_right),
- .io_outs_up(ces_0_1_io_outs_up),
- .io_outs_left(ces_0_1_io_outs_left),
- .io_lsbIns_1(ces_0_1_io_lsbIns_1),
- .io_lsbIns_2(ces_0_1_io_lsbIns_2),
- .io_lsbIns_3(ces_0_1_io_lsbIns_3),
- .io_lsbIns_4(ces_0_1_io_lsbIns_4),
- .io_lsbIns_5(ces_0_1_io_lsbIns_5),
- .io_lsbIns_6(ces_0_1_io_lsbIns_6),
- .io_lsbIns_7(ces_0_1_io_lsbIns_7),
- .io_lsbOuts_0(ces_0_1_io_lsbOuts_0),
- .io_lsbOuts_1(ces_0_1_io_lsbOuts_1),
- .io_lsbOuts_2(ces_0_1_io_lsbOuts_2),
- .io_lsbOuts_3(ces_0_1_io_lsbOuts_3),
- .io_lsbOuts_4(ces_0_1_io_lsbOuts_4),
- .io_lsbOuts_5(ces_0_1_io_lsbOuts_5),
- .io_lsbOuts_6(ces_0_1_io_lsbOuts_6),
- .io_lsbOuts_7(ces_0_1_io_lsbOuts_7)
- );
- Element ces_0_2 (
- .clock(ces_0_2_clock),
- .io_ins_down(ces_0_2_io_ins_down),
- .io_ins_right(ces_0_2_io_ins_right),
- .io_ins_up(ces_0_2_io_ins_up),
- .io_ins_left(ces_0_2_io_ins_left),
- .io_outs_down(ces_0_2_io_outs_down),
- .io_outs_right(ces_0_2_io_outs_right),
- .io_outs_up(ces_0_2_io_outs_up),
- .io_outs_left(ces_0_2_io_outs_left),
- .io_lsbIns_1(ces_0_2_io_lsbIns_1),
- .io_lsbIns_2(ces_0_2_io_lsbIns_2),
- .io_lsbIns_3(ces_0_2_io_lsbIns_3),
- .io_lsbIns_4(ces_0_2_io_lsbIns_4),
- .io_lsbIns_5(ces_0_2_io_lsbIns_5),
- .io_lsbIns_6(ces_0_2_io_lsbIns_6),
- .io_lsbIns_7(ces_0_2_io_lsbIns_7),
- .io_lsbOuts_0(ces_0_2_io_lsbOuts_0),
- .io_lsbOuts_1(ces_0_2_io_lsbOuts_1),
- .io_lsbOuts_2(ces_0_2_io_lsbOuts_2),
- .io_lsbOuts_3(ces_0_2_io_lsbOuts_3),
- .io_lsbOuts_4(ces_0_2_io_lsbOuts_4),
- .io_lsbOuts_5(ces_0_2_io_lsbOuts_5),
- .io_lsbOuts_6(ces_0_2_io_lsbOuts_6),
- .io_lsbOuts_7(ces_0_2_io_lsbOuts_7)
- );
- Element ces_0_3 (
- .clock(ces_0_3_clock),
- .io_ins_down(ces_0_3_io_ins_down),
- .io_ins_right(ces_0_3_io_ins_right),
- .io_ins_up(ces_0_3_io_ins_up),
- .io_ins_left(ces_0_3_io_ins_left),
- .io_outs_down(ces_0_3_io_outs_down),
- .io_outs_right(ces_0_3_io_outs_right),
- .io_outs_up(ces_0_3_io_outs_up),
- .io_outs_left(ces_0_3_io_outs_left),
- .io_lsbIns_1(ces_0_3_io_lsbIns_1),
- .io_lsbIns_2(ces_0_3_io_lsbIns_2),
- .io_lsbIns_3(ces_0_3_io_lsbIns_3),
- .io_lsbIns_4(ces_0_3_io_lsbIns_4),
- .io_lsbIns_5(ces_0_3_io_lsbIns_5),
- .io_lsbIns_6(ces_0_3_io_lsbIns_6),
- .io_lsbIns_7(ces_0_3_io_lsbIns_7),
- .io_lsbOuts_0(ces_0_3_io_lsbOuts_0),
- .io_lsbOuts_1(ces_0_3_io_lsbOuts_1),
- .io_lsbOuts_2(ces_0_3_io_lsbOuts_2),
- .io_lsbOuts_3(ces_0_3_io_lsbOuts_3),
- .io_lsbOuts_4(ces_0_3_io_lsbOuts_4),
- .io_lsbOuts_5(ces_0_3_io_lsbOuts_5),
- .io_lsbOuts_6(ces_0_3_io_lsbOuts_6),
- .io_lsbOuts_7(ces_0_3_io_lsbOuts_7)
- );
- Element ces_0_4 (
- .clock(ces_0_4_clock),
- .io_ins_down(ces_0_4_io_ins_down),
- .io_ins_right(ces_0_4_io_ins_right),
- .io_ins_up(ces_0_4_io_ins_up),
- .io_ins_left(ces_0_4_io_ins_left),
- .io_outs_down(ces_0_4_io_outs_down),
- .io_outs_right(ces_0_4_io_outs_right),
- .io_outs_up(ces_0_4_io_outs_up),
- .io_outs_left(ces_0_4_io_outs_left),
- .io_lsbIns_1(ces_0_4_io_lsbIns_1),
- .io_lsbIns_2(ces_0_4_io_lsbIns_2),
- .io_lsbIns_3(ces_0_4_io_lsbIns_3),
- .io_lsbIns_4(ces_0_4_io_lsbIns_4),
- .io_lsbIns_5(ces_0_4_io_lsbIns_5),
- .io_lsbIns_6(ces_0_4_io_lsbIns_6),
- .io_lsbIns_7(ces_0_4_io_lsbIns_7),
- .io_lsbOuts_0(ces_0_4_io_lsbOuts_0),
- .io_lsbOuts_1(ces_0_4_io_lsbOuts_1),
- .io_lsbOuts_2(ces_0_4_io_lsbOuts_2),
- .io_lsbOuts_3(ces_0_4_io_lsbOuts_3),
- .io_lsbOuts_4(ces_0_4_io_lsbOuts_4),
- .io_lsbOuts_5(ces_0_4_io_lsbOuts_5),
- .io_lsbOuts_6(ces_0_4_io_lsbOuts_6),
- .io_lsbOuts_7(ces_0_4_io_lsbOuts_7)
- );
- Element ces_0_5 (
- .clock(ces_0_5_clock),
- .io_ins_down(ces_0_5_io_ins_down),
- .io_ins_right(ces_0_5_io_ins_right),
- .io_ins_up(ces_0_5_io_ins_up),
- .io_ins_left(ces_0_5_io_ins_left),
- .io_outs_down(ces_0_5_io_outs_down),
- .io_outs_right(ces_0_5_io_outs_right),
- .io_outs_up(ces_0_5_io_outs_up),
- .io_outs_left(ces_0_5_io_outs_left),
- .io_lsbIns_1(ces_0_5_io_lsbIns_1),
- .io_lsbIns_2(ces_0_5_io_lsbIns_2),
- .io_lsbIns_3(ces_0_5_io_lsbIns_3),
- .io_lsbIns_4(ces_0_5_io_lsbIns_4),
- .io_lsbIns_5(ces_0_5_io_lsbIns_5),
- .io_lsbIns_6(ces_0_5_io_lsbIns_6),
- .io_lsbIns_7(ces_0_5_io_lsbIns_7),
- .io_lsbOuts_0(ces_0_5_io_lsbOuts_0),
- .io_lsbOuts_1(ces_0_5_io_lsbOuts_1),
- .io_lsbOuts_2(ces_0_5_io_lsbOuts_2),
- .io_lsbOuts_3(ces_0_5_io_lsbOuts_3),
- .io_lsbOuts_4(ces_0_5_io_lsbOuts_4),
- .io_lsbOuts_5(ces_0_5_io_lsbOuts_5),
- .io_lsbOuts_6(ces_0_5_io_lsbOuts_6),
- .io_lsbOuts_7(ces_0_5_io_lsbOuts_7)
- );
- Element ces_0_6 (
- .clock(ces_0_6_clock),
- .io_ins_down(ces_0_6_io_ins_down),
- .io_ins_right(ces_0_6_io_ins_right),
- .io_ins_up(ces_0_6_io_ins_up),
- .io_ins_left(ces_0_6_io_ins_left),
- .io_outs_down(ces_0_6_io_outs_down),
- .io_outs_right(ces_0_6_io_outs_right),
- .io_outs_up(ces_0_6_io_outs_up),
- .io_outs_left(ces_0_6_io_outs_left),
- .io_lsbIns_1(ces_0_6_io_lsbIns_1),
- .io_lsbIns_2(ces_0_6_io_lsbIns_2),
- .io_lsbIns_3(ces_0_6_io_lsbIns_3),
- .io_lsbIns_4(ces_0_6_io_lsbIns_4),
- .io_lsbIns_5(ces_0_6_io_lsbIns_5),
- .io_lsbIns_6(ces_0_6_io_lsbIns_6),
- .io_lsbIns_7(ces_0_6_io_lsbIns_7),
- .io_lsbOuts_0(ces_0_6_io_lsbOuts_0),
- .io_lsbOuts_1(ces_0_6_io_lsbOuts_1),
- .io_lsbOuts_2(ces_0_6_io_lsbOuts_2),
- .io_lsbOuts_3(ces_0_6_io_lsbOuts_3),
- .io_lsbOuts_4(ces_0_6_io_lsbOuts_4),
- .io_lsbOuts_5(ces_0_6_io_lsbOuts_5),
- .io_lsbOuts_6(ces_0_6_io_lsbOuts_6),
- .io_lsbOuts_7(ces_0_6_io_lsbOuts_7)
- );
- Element ces_0_7 (
- .clock(ces_0_7_clock),
- .io_ins_down(ces_0_7_io_ins_down),
- .io_ins_right(ces_0_7_io_ins_right),
- .io_ins_up(ces_0_7_io_ins_up),
- .io_ins_left(ces_0_7_io_ins_left),
- .io_outs_down(ces_0_7_io_outs_down),
- .io_outs_right(ces_0_7_io_outs_right),
- .io_outs_up(ces_0_7_io_outs_up),
- .io_outs_left(ces_0_7_io_outs_left),
- .io_lsbIns_1(ces_0_7_io_lsbIns_1),
- .io_lsbIns_2(ces_0_7_io_lsbIns_2),
- .io_lsbIns_3(ces_0_7_io_lsbIns_3),
- .io_lsbIns_4(ces_0_7_io_lsbIns_4),
- .io_lsbIns_5(ces_0_7_io_lsbIns_5),
- .io_lsbIns_6(ces_0_7_io_lsbIns_6),
- .io_lsbIns_7(ces_0_7_io_lsbIns_7),
- .io_lsbOuts_0(ces_0_7_io_lsbOuts_0),
- .io_lsbOuts_1(ces_0_7_io_lsbOuts_1),
- .io_lsbOuts_2(ces_0_7_io_lsbOuts_2),
- .io_lsbOuts_3(ces_0_7_io_lsbOuts_3),
- .io_lsbOuts_4(ces_0_7_io_lsbOuts_4),
- .io_lsbOuts_5(ces_0_7_io_lsbOuts_5),
- .io_lsbOuts_6(ces_0_7_io_lsbOuts_6),
- .io_lsbOuts_7(ces_0_7_io_lsbOuts_7)
- );
- Element ces_1_0 (
- .clock(ces_1_0_clock),
- .io_ins_down(ces_1_0_io_ins_down),
- .io_ins_right(ces_1_0_io_ins_right),
- .io_ins_up(ces_1_0_io_ins_up),
- .io_ins_left(ces_1_0_io_ins_left),
- .io_outs_down(ces_1_0_io_outs_down),
- .io_outs_right(ces_1_0_io_outs_right),
- .io_outs_up(ces_1_0_io_outs_up),
- .io_outs_left(ces_1_0_io_outs_left),
- .io_lsbIns_1(ces_1_0_io_lsbIns_1),
- .io_lsbIns_2(ces_1_0_io_lsbIns_2),
- .io_lsbIns_3(ces_1_0_io_lsbIns_3),
- .io_lsbIns_4(ces_1_0_io_lsbIns_4),
- .io_lsbIns_5(ces_1_0_io_lsbIns_5),
- .io_lsbIns_6(ces_1_0_io_lsbIns_6),
- .io_lsbIns_7(ces_1_0_io_lsbIns_7),
- .io_lsbOuts_0(ces_1_0_io_lsbOuts_0),
- .io_lsbOuts_1(ces_1_0_io_lsbOuts_1),
- .io_lsbOuts_2(ces_1_0_io_lsbOuts_2),
- .io_lsbOuts_3(ces_1_0_io_lsbOuts_3),
- .io_lsbOuts_4(ces_1_0_io_lsbOuts_4),
- .io_lsbOuts_5(ces_1_0_io_lsbOuts_5),
- .io_lsbOuts_6(ces_1_0_io_lsbOuts_6),
- .io_lsbOuts_7(ces_1_0_io_lsbOuts_7)
- );
- Element ces_1_1 (
- .clock(ces_1_1_clock),
- .io_ins_down(ces_1_1_io_ins_down),
- .io_ins_right(ces_1_1_io_ins_right),
- .io_ins_up(ces_1_1_io_ins_up),
- .io_ins_left(ces_1_1_io_ins_left),
- .io_outs_down(ces_1_1_io_outs_down),
- .io_outs_right(ces_1_1_io_outs_right),
- .io_outs_up(ces_1_1_io_outs_up),
- .io_outs_left(ces_1_1_io_outs_left),
- .io_lsbIns_1(ces_1_1_io_lsbIns_1),
- .io_lsbIns_2(ces_1_1_io_lsbIns_2),
- .io_lsbIns_3(ces_1_1_io_lsbIns_3),
- .io_lsbIns_4(ces_1_1_io_lsbIns_4),
- .io_lsbIns_5(ces_1_1_io_lsbIns_5),
- .io_lsbIns_6(ces_1_1_io_lsbIns_6),
- .io_lsbIns_7(ces_1_1_io_lsbIns_7),
- .io_lsbOuts_0(ces_1_1_io_lsbOuts_0),
- .io_lsbOuts_1(ces_1_1_io_lsbOuts_1),
- .io_lsbOuts_2(ces_1_1_io_lsbOuts_2),
- .io_lsbOuts_3(ces_1_1_io_lsbOuts_3),
- .io_lsbOuts_4(ces_1_1_io_lsbOuts_4),
- .io_lsbOuts_5(ces_1_1_io_lsbOuts_5),
- .io_lsbOuts_6(ces_1_1_io_lsbOuts_6),
- .io_lsbOuts_7(ces_1_1_io_lsbOuts_7)
- );
- Element ces_1_2 (
- .clock(ces_1_2_clock),
- .io_ins_down(ces_1_2_io_ins_down),
- .io_ins_right(ces_1_2_io_ins_right),
- .io_ins_up(ces_1_2_io_ins_up),
- .io_ins_left(ces_1_2_io_ins_left),
- .io_outs_down(ces_1_2_io_outs_down),
- .io_outs_right(ces_1_2_io_outs_right),
- .io_outs_up(ces_1_2_io_outs_up),
- .io_outs_left(ces_1_2_io_outs_left),
- .io_lsbIns_1(ces_1_2_io_lsbIns_1),
- .io_lsbIns_2(ces_1_2_io_lsbIns_2),
- .io_lsbIns_3(ces_1_2_io_lsbIns_3),
- .io_lsbIns_4(ces_1_2_io_lsbIns_4),
- .io_lsbIns_5(ces_1_2_io_lsbIns_5),
- .io_lsbIns_6(ces_1_2_io_lsbIns_6),
- .io_lsbIns_7(ces_1_2_io_lsbIns_7),
- .io_lsbOuts_0(ces_1_2_io_lsbOuts_0),
- .io_lsbOuts_1(ces_1_2_io_lsbOuts_1),
- .io_lsbOuts_2(ces_1_2_io_lsbOuts_2),
- .io_lsbOuts_3(ces_1_2_io_lsbOuts_3),
- .io_lsbOuts_4(ces_1_2_io_lsbOuts_4),
- .io_lsbOuts_5(ces_1_2_io_lsbOuts_5),
- .io_lsbOuts_6(ces_1_2_io_lsbOuts_6),
- .io_lsbOuts_7(ces_1_2_io_lsbOuts_7)
- );
- Element ces_1_3 (
- .clock(ces_1_3_clock),
- .io_ins_down(ces_1_3_io_ins_down),
- .io_ins_right(ces_1_3_io_ins_right),
- .io_ins_up(ces_1_3_io_ins_up),
- .io_ins_left(ces_1_3_io_ins_left),
- .io_outs_down(ces_1_3_io_outs_down),
- .io_outs_right(ces_1_3_io_outs_right),
- .io_outs_up(ces_1_3_io_outs_up),
- .io_outs_left(ces_1_3_io_outs_left),
- .io_lsbIns_1(ces_1_3_io_lsbIns_1),
- .io_lsbIns_2(ces_1_3_io_lsbIns_2),
- .io_lsbIns_3(ces_1_3_io_lsbIns_3),
- .io_lsbIns_4(ces_1_3_io_lsbIns_4),
- .io_lsbIns_5(ces_1_3_io_lsbIns_5),
- .io_lsbIns_6(ces_1_3_io_lsbIns_6),
- .io_lsbIns_7(ces_1_3_io_lsbIns_7),
- .io_lsbOuts_0(ces_1_3_io_lsbOuts_0),
- .io_lsbOuts_1(ces_1_3_io_lsbOuts_1),
- .io_lsbOuts_2(ces_1_3_io_lsbOuts_2),
- .io_lsbOuts_3(ces_1_3_io_lsbOuts_3),
- .io_lsbOuts_4(ces_1_3_io_lsbOuts_4),
- .io_lsbOuts_5(ces_1_3_io_lsbOuts_5),
- .io_lsbOuts_6(ces_1_3_io_lsbOuts_6),
- .io_lsbOuts_7(ces_1_3_io_lsbOuts_7)
- );
- Element ces_1_4 (
- .clock(ces_1_4_clock),
- .io_ins_down(ces_1_4_io_ins_down),
- .io_ins_right(ces_1_4_io_ins_right),
- .io_ins_up(ces_1_4_io_ins_up),
- .io_ins_left(ces_1_4_io_ins_left),
- .io_outs_down(ces_1_4_io_outs_down),
- .io_outs_right(ces_1_4_io_outs_right),
- .io_outs_up(ces_1_4_io_outs_up),
- .io_outs_left(ces_1_4_io_outs_left),
- .io_lsbIns_1(ces_1_4_io_lsbIns_1),
- .io_lsbIns_2(ces_1_4_io_lsbIns_2),
- .io_lsbIns_3(ces_1_4_io_lsbIns_3),
- .io_lsbIns_4(ces_1_4_io_lsbIns_4),
- .io_lsbIns_5(ces_1_4_io_lsbIns_5),
- .io_lsbIns_6(ces_1_4_io_lsbIns_6),
- .io_lsbIns_7(ces_1_4_io_lsbIns_7),
- .io_lsbOuts_0(ces_1_4_io_lsbOuts_0),
- .io_lsbOuts_1(ces_1_4_io_lsbOuts_1),
- .io_lsbOuts_2(ces_1_4_io_lsbOuts_2),
- .io_lsbOuts_3(ces_1_4_io_lsbOuts_3),
- .io_lsbOuts_4(ces_1_4_io_lsbOuts_4),
- .io_lsbOuts_5(ces_1_4_io_lsbOuts_5),
- .io_lsbOuts_6(ces_1_4_io_lsbOuts_6),
- .io_lsbOuts_7(ces_1_4_io_lsbOuts_7)
- );
- Element ces_1_5 (
- .clock(ces_1_5_clock),
- .io_ins_down(ces_1_5_io_ins_down),
- .io_ins_right(ces_1_5_io_ins_right),
- .io_ins_up(ces_1_5_io_ins_up),
- .io_ins_left(ces_1_5_io_ins_left),
- .io_outs_down(ces_1_5_io_outs_down),
- .io_outs_right(ces_1_5_io_outs_right),
- .io_outs_up(ces_1_5_io_outs_up),
- .io_outs_left(ces_1_5_io_outs_left),
- .io_lsbIns_1(ces_1_5_io_lsbIns_1),
- .io_lsbIns_2(ces_1_5_io_lsbIns_2),
- .io_lsbIns_3(ces_1_5_io_lsbIns_3),
- .io_lsbIns_4(ces_1_5_io_lsbIns_4),
- .io_lsbIns_5(ces_1_5_io_lsbIns_5),
- .io_lsbIns_6(ces_1_5_io_lsbIns_6),
- .io_lsbIns_7(ces_1_5_io_lsbIns_7),
- .io_lsbOuts_0(ces_1_5_io_lsbOuts_0),
- .io_lsbOuts_1(ces_1_5_io_lsbOuts_1),
- .io_lsbOuts_2(ces_1_5_io_lsbOuts_2),
- .io_lsbOuts_3(ces_1_5_io_lsbOuts_3),
- .io_lsbOuts_4(ces_1_5_io_lsbOuts_4),
- .io_lsbOuts_5(ces_1_5_io_lsbOuts_5),
- .io_lsbOuts_6(ces_1_5_io_lsbOuts_6),
- .io_lsbOuts_7(ces_1_5_io_lsbOuts_7)
- );
- Element ces_1_6 (
- .clock(ces_1_6_clock),
- .io_ins_down(ces_1_6_io_ins_down),
- .io_ins_right(ces_1_6_io_ins_right),
- .io_ins_up(ces_1_6_io_ins_up),
- .io_ins_left(ces_1_6_io_ins_left),
- .io_outs_down(ces_1_6_io_outs_down),
- .io_outs_right(ces_1_6_io_outs_right),
- .io_outs_up(ces_1_6_io_outs_up),
- .io_outs_left(ces_1_6_io_outs_left),
- .io_lsbIns_1(ces_1_6_io_lsbIns_1),
- .io_lsbIns_2(ces_1_6_io_lsbIns_2),
- .io_lsbIns_3(ces_1_6_io_lsbIns_3),
- .io_lsbIns_4(ces_1_6_io_lsbIns_4),
- .io_lsbIns_5(ces_1_6_io_lsbIns_5),
- .io_lsbIns_6(ces_1_6_io_lsbIns_6),
- .io_lsbIns_7(ces_1_6_io_lsbIns_7),
- .io_lsbOuts_0(ces_1_6_io_lsbOuts_0),
- .io_lsbOuts_1(ces_1_6_io_lsbOuts_1),
- .io_lsbOuts_2(ces_1_6_io_lsbOuts_2),
- .io_lsbOuts_3(ces_1_6_io_lsbOuts_3),
- .io_lsbOuts_4(ces_1_6_io_lsbOuts_4),
- .io_lsbOuts_5(ces_1_6_io_lsbOuts_5),
- .io_lsbOuts_6(ces_1_6_io_lsbOuts_6),
- .io_lsbOuts_7(ces_1_6_io_lsbOuts_7)
- );
- Element ces_1_7 (
- .clock(ces_1_7_clock),
- .io_ins_down(ces_1_7_io_ins_down),
- .io_ins_right(ces_1_7_io_ins_right),
- .io_ins_up(ces_1_7_io_ins_up),
- .io_ins_left(ces_1_7_io_ins_left),
- .io_outs_down(ces_1_7_io_outs_down),
- .io_outs_right(ces_1_7_io_outs_right),
- .io_outs_up(ces_1_7_io_outs_up),
- .io_outs_left(ces_1_7_io_outs_left),
- .io_lsbIns_1(ces_1_7_io_lsbIns_1),
- .io_lsbIns_2(ces_1_7_io_lsbIns_2),
- .io_lsbIns_3(ces_1_7_io_lsbIns_3),
- .io_lsbIns_4(ces_1_7_io_lsbIns_4),
- .io_lsbIns_5(ces_1_7_io_lsbIns_5),
- .io_lsbIns_6(ces_1_7_io_lsbIns_6),
- .io_lsbIns_7(ces_1_7_io_lsbIns_7),
- .io_lsbOuts_0(ces_1_7_io_lsbOuts_0),
- .io_lsbOuts_1(ces_1_7_io_lsbOuts_1),
- .io_lsbOuts_2(ces_1_7_io_lsbOuts_2),
- .io_lsbOuts_3(ces_1_7_io_lsbOuts_3),
- .io_lsbOuts_4(ces_1_7_io_lsbOuts_4),
- .io_lsbOuts_5(ces_1_7_io_lsbOuts_5),
- .io_lsbOuts_6(ces_1_7_io_lsbOuts_6),
- .io_lsbOuts_7(ces_1_7_io_lsbOuts_7)
- );
- Element ces_2_0 (
- .clock(ces_2_0_clock),
- .io_ins_down(ces_2_0_io_ins_down),
- .io_ins_right(ces_2_0_io_ins_right),
- .io_ins_up(ces_2_0_io_ins_up),
- .io_ins_left(ces_2_0_io_ins_left),
- .io_outs_down(ces_2_0_io_outs_down),
- .io_outs_right(ces_2_0_io_outs_right),
- .io_outs_up(ces_2_0_io_outs_up),
- .io_outs_left(ces_2_0_io_outs_left),
- .io_lsbIns_1(ces_2_0_io_lsbIns_1),
- .io_lsbIns_2(ces_2_0_io_lsbIns_2),
- .io_lsbIns_3(ces_2_0_io_lsbIns_3),
- .io_lsbIns_4(ces_2_0_io_lsbIns_4),
- .io_lsbIns_5(ces_2_0_io_lsbIns_5),
- .io_lsbIns_6(ces_2_0_io_lsbIns_6),
- .io_lsbIns_7(ces_2_0_io_lsbIns_7),
- .io_lsbOuts_0(ces_2_0_io_lsbOuts_0),
- .io_lsbOuts_1(ces_2_0_io_lsbOuts_1),
- .io_lsbOuts_2(ces_2_0_io_lsbOuts_2),
- .io_lsbOuts_3(ces_2_0_io_lsbOuts_3),
- .io_lsbOuts_4(ces_2_0_io_lsbOuts_4),
- .io_lsbOuts_5(ces_2_0_io_lsbOuts_5),
- .io_lsbOuts_6(ces_2_0_io_lsbOuts_6),
- .io_lsbOuts_7(ces_2_0_io_lsbOuts_7)
- );
- Element ces_2_1 (
- .clock(ces_2_1_clock),
- .io_ins_down(ces_2_1_io_ins_down),
- .io_ins_right(ces_2_1_io_ins_right),
- .io_ins_up(ces_2_1_io_ins_up),
- .io_ins_left(ces_2_1_io_ins_left),
- .io_outs_down(ces_2_1_io_outs_down),
- .io_outs_right(ces_2_1_io_outs_right),
- .io_outs_up(ces_2_1_io_outs_up),
- .io_outs_left(ces_2_1_io_outs_left),
- .io_lsbIns_1(ces_2_1_io_lsbIns_1),
- .io_lsbIns_2(ces_2_1_io_lsbIns_2),
- .io_lsbIns_3(ces_2_1_io_lsbIns_3),
- .io_lsbIns_4(ces_2_1_io_lsbIns_4),
- .io_lsbIns_5(ces_2_1_io_lsbIns_5),
- .io_lsbIns_6(ces_2_1_io_lsbIns_6),
- .io_lsbIns_7(ces_2_1_io_lsbIns_7),
- .io_lsbOuts_0(ces_2_1_io_lsbOuts_0),
- .io_lsbOuts_1(ces_2_1_io_lsbOuts_1),
- .io_lsbOuts_2(ces_2_1_io_lsbOuts_2),
- .io_lsbOuts_3(ces_2_1_io_lsbOuts_3),
- .io_lsbOuts_4(ces_2_1_io_lsbOuts_4),
- .io_lsbOuts_5(ces_2_1_io_lsbOuts_5),
- .io_lsbOuts_6(ces_2_1_io_lsbOuts_6),
- .io_lsbOuts_7(ces_2_1_io_lsbOuts_7)
- );
- Element ces_2_2 (
- .clock(ces_2_2_clock),
- .io_ins_down(ces_2_2_io_ins_down),
- .io_ins_right(ces_2_2_io_ins_right),
- .io_ins_up(ces_2_2_io_ins_up),
- .io_ins_left(ces_2_2_io_ins_left),
- .io_outs_down(ces_2_2_io_outs_down),
- .io_outs_right(ces_2_2_io_outs_right),
- .io_outs_up(ces_2_2_io_outs_up),
- .io_outs_left(ces_2_2_io_outs_left),
- .io_lsbIns_1(ces_2_2_io_lsbIns_1),
- .io_lsbIns_2(ces_2_2_io_lsbIns_2),
- .io_lsbIns_3(ces_2_2_io_lsbIns_3),
- .io_lsbIns_4(ces_2_2_io_lsbIns_4),
- .io_lsbIns_5(ces_2_2_io_lsbIns_5),
- .io_lsbIns_6(ces_2_2_io_lsbIns_6),
- .io_lsbIns_7(ces_2_2_io_lsbIns_7),
- .io_lsbOuts_0(ces_2_2_io_lsbOuts_0),
- .io_lsbOuts_1(ces_2_2_io_lsbOuts_1),
- .io_lsbOuts_2(ces_2_2_io_lsbOuts_2),
- .io_lsbOuts_3(ces_2_2_io_lsbOuts_3),
- .io_lsbOuts_4(ces_2_2_io_lsbOuts_4),
- .io_lsbOuts_5(ces_2_2_io_lsbOuts_5),
- .io_lsbOuts_6(ces_2_2_io_lsbOuts_6),
- .io_lsbOuts_7(ces_2_2_io_lsbOuts_7)
- );
- Element ces_2_3 (
- .clock(ces_2_3_clock),
- .io_ins_down(ces_2_3_io_ins_down),
- .io_ins_right(ces_2_3_io_ins_right),
- .io_ins_up(ces_2_3_io_ins_up),
- .io_ins_left(ces_2_3_io_ins_left),
- .io_outs_down(ces_2_3_io_outs_down),
- .io_outs_right(ces_2_3_io_outs_right),
- .io_outs_up(ces_2_3_io_outs_up),
- .io_outs_left(ces_2_3_io_outs_left),
- .io_lsbIns_1(ces_2_3_io_lsbIns_1),
- .io_lsbIns_2(ces_2_3_io_lsbIns_2),
- .io_lsbIns_3(ces_2_3_io_lsbIns_3),
- .io_lsbIns_4(ces_2_3_io_lsbIns_4),
- .io_lsbIns_5(ces_2_3_io_lsbIns_5),
- .io_lsbIns_6(ces_2_3_io_lsbIns_6),
- .io_lsbIns_7(ces_2_3_io_lsbIns_7),
- .io_lsbOuts_0(ces_2_3_io_lsbOuts_0),
- .io_lsbOuts_1(ces_2_3_io_lsbOuts_1),
- .io_lsbOuts_2(ces_2_3_io_lsbOuts_2),
- .io_lsbOuts_3(ces_2_3_io_lsbOuts_3),
- .io_lsbOuts_4(ces_2_3_io_lsbOuts_4),
- .io_lsbOuts_5(ces_2_3_io_lsbOuts_5),
- .io_lsbOuts_6(ces_2_3_io_lsbOuts_6),
- .io_lsbOuts_7(ces_2_3_io_lsbOuts_7)
- );
- Element ces_2_4 (
- .clock(ces_2_4_clock),
- .io_ins_down(ces_2_4_io_ins_down),
- .io_ins_right(ces_2_4_io_ins_right),
- .io_ins_up(ces_2_4_io_ins_up),
- .io_ins_left(ces_2_4_io_ins_left),
- .io_outs_down(ces_2_4_io_outs_down),
- .io_outs_right(ces_2_4_io_outs_right),
- .io_outs_up(ces_2_4_io_outs_up),
- .io_outs_left(ces_2_4_io_outs_left),
- .io_lsbIns_1(ces_2_4_io_lsbIns_1),
- .io_lsbIns_2(ces_2_4_io_lsbIns_2),
- .io_lsbIns_3(ces_2_4_io_lsbIns_3),
- .io_lsbIns_4(ces_2_4_io_lsbIns_4),
- .io_lsbIns_5(ces_2_4_io_lsbIns_5),
- .io_lsbIns_6(ces_2_4_io_lsbIns_6),
- .io_lsbIns_7(ces_2_4_io_lsbIns_7),
- .io_lsbOuts_0(ces_2_4_io_lsbOuts_0),
- .io_lsbOuts_1(ces_2_4_io_lsbOuts_1),
- .io_lsbOuts_2(ces_2_4_io_lsbOuts_2),
- .io_lsbOuts_3(ces_2_4_io_lsbOuts_3),
- .io_lsbOuts_4(ces_2_4_io_lsbOuts_4),
- .io_lsbOuts_5(ces_2_4_io_lsbOuts_5),
- .io_lsbOuts_6(ces_2_4_io_lsbOuts_6),
- .io_lsbOuts_7(ces_2_4_io_lsbOuts_7)
- );
- Element ces_2_5 (
- .clock(ces_2_5_clock),
- .io_ins_down(ces_2_5_io_ins_down),
- .io_ins_right(ces_2_5_io_ins_right),
- .io_ins_up(ces_2_5_io_ins_up),
- .io_ins_left(ces_2_5_io_ins_left),
- .io_outs_down(ces_2_5_io_outs_down),
- .io_outs_right(ces_2_5_io_outs_right),
- .io_outs_up(ces_2_5_io_outs_up),
- .io_outs_left(ces_2_5_io_outs_left),
- .io_lsbIns_1(ces_2_5_io_lsbIns_1),
- .io_lsbIns_2(ces_2_5_io_lsbIns_2),
- .io_lsbIns_3(ces_2_5_io_lsbIns_3),
- .io_lsbIns_4(ces_2_5_io_lsbIns_4),
- .io_lsbIns_5(ces_2_5_io_lsbIns_5),
- .io_lsbIns_6(ces_2_5_io_lsbIns_6),
- .io_lsbIns_7(ces_2_5_io_lsbIns_7),
- .io_lsbOuts_0(ces_2_5_io_lsbOuts_0),
- .io_lsbOuts_1(ces_2_5_io_lsbOuts_1),
- .io_lsbOuts_2(ces_2_5_io_lsbOuts_2),
- .io_lsbOuts_3(ces_2_5_io_lsbOuts_3),
- .io_lsbOuts_4(ces_2_5_io_lsbOuts_4),
- .io_lsbOuts_5(ces_2_5_io_lsbOuts_5),
- .io_lsbOuts_6(ces_2_5_io_lsbOuts_6),
- .io_lsbOuts_7(ces_2_5_io_lsbOuts_7)
- );
- Element ces_2_6 (
- .clock(ces_2_6_clock),
- .io_ins_down(ces_2_6_io_ins_down),
- .io_ins_right(ces_2_6_io_ins_right),
- .io_ins_up(ces_2_6_io_ins_up),
- .io_ins_left(ces_2_6_io_ins_left),
- .io_outs_down(ces_2_6_io_outs_down),
- .io_outs_right(ces_2_6_io_outs_right),
- .io_outs_up(ces_2_6_io_outs_up),
- .io_outs_left(ces_2_6_io_outs_left),
- .io_lsbIns_1(ces_2_6_io_lsbIns_1),
- .io_lsbIns_2(ces_2_6_io_lsbIns_2),
- .io_lsbIns_3(ces_2_6_io_lsbIns_3),
- .io_lsbIns_4(ces_2_6_io_lsbIns_4),
- .io_lsbIns_5(ces_2_6_io_lsbIns_5),
- .io_lsbIns_6(ces_2_6_io_lsbIns_6),
- .io_lsbIns_7(ces_2_6_io_lsbIns_7),
- .io_lsbOuts_0(ces_2_6_io_lsbOuts_0),
- .io_lsbOuts_1(ces_2_6_io_lsbOuts_1),
- .io_lsbOuts_2(ces_2_6_io_lsbOuts_2),
- .io_lsbOuts_3(ces_2_6_io_lsbOuts_3),
- .io_lsbOuts_4(ces_2_6_io_lsbOuts_4),
- .io_lsbOuts_5(ces_2_6_io_lsbOuts_5),
- .io_lsbOuts_6(ces_2_6_io_lsbOuts_6),
- .io_lsbOuts_7(ces_2_6_io_lsbOuts_7)
- );
- Element ces_2_7 (
- .clock(ces_2_7_clock),
- .io_ins_down(ces_2_7_io_ins_down),
- .io_ins_right(ces_2_7_io_ins_right),
- .io_ins_up(ces_2_7_io_ins_up),
- .io_ins_left(ces_2_7_io_ins_left),
- .io_outs_down(ces_2_7_io_outs_down),
- .io_outs_right(ces_2_7_io_outs_right),
- .io_outs_up(ces_2_7_io_outs_up),
- .io_outs_left(ces_2_7_io_outs_left),
- .io_lsbIns_1(ces_2_7_io_lsbIns_1),
- .io_lsbIns_2(ces_2_7_io_lsbIns_2),
- .io_lsbIns_3(ces_2_7_io_lsbIns_3),
- .io_lsbIns_4(ces_2_7_io_lsbIns_4),
- .io_lsbIns_5(ces_2_7_io_lsbIns_5),
- .io_lsbIns_6(ces_2_7_io_lsbIns_6),
- .io_lsbIns_7(ces_2_7_io_lsbIns_7),
- .io_lsbOuts_0(ces_2_7_io_lsbOuts_0),
- .io_lsbOuts_1(ces_2_7_io_lsbOuts_1),
- .io_lsbOuts_2(ces_2_7_io_lsbOuts_2),
- .io_lsbOuts_3(ces_2_7_io_lsbOuts_3),
- .io_lsbOuts_4(ces_2_7_io_lsbOuts_4),
- .io_lsbOuts_5(ces_2_7_io_lsbOuts_5),
- .io_lsbOuts_6(ces_2_7_io_lsbOuts_6),
- .io_lsbOuts_7(ces_2_7_io_lsbOuts_7)
- );
- Element ces_3_0 (
- .clock(ces_3_0_clock),
- .io_ins_down(ces_3_0_io_ins_down),
- .io_ins_right(ces_3_0_io_ins_right),
- .io_ins_up(ces_3_0_io_ins_up),
- .io_ins_left(ces_3_0_io_ins_left),
- .io_outs_down(ces_3_0_io_outs_down),
- .io_outs_right(ces_3_0_io_outs_right),
- .io_outs_up(ces_3_0_io_outs_up),
- .io_outs_left(ces_3_0_io_outs_left),
- .io_lsbIns_1(ces_3_0_io_lsbIns_1),
- .io_lsbIns_2(ces_3_0_io_lsbIns_2),
- .io_lsbIns_3(ces_3_0_io_lsbIns_3),
- .io_lsbIns_4(ces_3_0_io_lsbIns_4),
- .io_lsbIns_5(ces_3_0_io_lsbIns_5),
- .io_lsbIns_6(ces_3_0_io_lsbIns_6),
- .io_lsbIns_7(ces_3_0_io_lsbIns_7),
- .io_lsbOuts_0(ces_3_0_io_lsbOuts_0),
- .io_lsbOuts_1(ces_3_0_io_lsbOuts_1),
- .io_lsbOuts_2(ces_3_0_io_lsbOuts_2),
- .io_lsbOuts_3(ces_3_0_io_lsbOuts_3),
- .io_lsbOuts_4(ces_3_0_io_lsbOuts_4),
- .io_lsbOuts_5(ces_3_0_io_lsbOuts_5),
- .io_lsbOuts_6(ces_3_0_io_lsbOuts_6),
- .io_lsbOuts_7(ces_3_0_io_lsbOuts_7)
- );
- Element ces_3_1 (
- .clock(ces_3_1_clock),
- .io_ins_down(ces_3_1_io_ins_down),
- .io_ins_right(ces_3_1_io_ins_right),
- .io_ins_up(ces_3_1_io_ins_up),
- .io_ins_left(ces_3_1_io_ins_left),
- .io_outs_down(ces_3_1_io_outs_down),
- .io_outs_right(ces_3_1_io_outs_right),
- .io_outs_up(ces_3_1_io_outs_up),
- .io_outs_left(ces_3_1_io_outs_left),
- .io_lsbIns_1(ces_3_1_io_lsbIns_1),
- .io_lsbIns_2(ces_3_1_io_lsbIns_2),
- .io_lsbIns_3(ces_3_1_io_lsbIns_3),
- .io_lsbIns_4(ces_3_1_io_lsbIns_4),
- .io_lsbIns_5(ces_3_1_io_lsbIns_5),
- .io_lsbIns_6(ces_3_1_io_lsbIns_6),
- .io_lsbIns_7(ces_3_1_io_lsbIns_7),
- .io_lsbOuts_0(ces_3_1_io_lsbOuts_0),
- .io_lsbOuts_1(ces_3_1_io_lsbOuts_1),
- .io_lsbOuts_2(ces_3_1_io_lsbOuts_2),
- .io_lsbOuts_3(ces_3_1_io_lsbOuts_3),
- .io_lsbOuts_4(ces_3_1_io_lsbOuts_4),
- .io_lsbOuts_5(ces_3_1_io_lsbOuts_5),
- .io_lsbOuts_6(ces_3_1_io_lsbOuts_6),
- .io_lsbOuts_7(ces_3_1_io_lsbOuts_7)
- );
- Element ces_3_2 (
- .clock(ces_3_2_clock),
- .io_ins_down(ces_3_2_io_ins_down),
- .io_ins_right(ces_3_2_io_ins_right),
- .io_ins_up(ces_3_2_io_ins_up),
- .io_ins_left(ces_3_2_io_ins_left),
- .io_outs_down(ces_3_2_io_outs_down),
- .io_outs_right(ces_3_2_io_outs_right),
- .io_outs_up(ces_3_2_io_outs_up),
- .io_outs_left(ces_3_2_io_outs_left),
- .io_lsbIns_1(ces_3_2_io_lsbIns_1),
- .io_lsbIns_2(ces_3_2_io_lsbIns_2),
- .io_lsbIns_3(ces_3_2_io_lsbIns_3),
- .io_lsbIns_4(ces_3_2_io_lsbIns_4),
- .io_lsbIns_5(ces_3_2_io_lsbIns_5),
- .io_lsbIns_6(ces_3_2_io_lsbIns_6),
- .io_lsbIns_7(ces_3_2_io_lsbIns_7),
- .io_lsbOuts_0(ces_3_2_io_lsbOuts_0),
- .io_lsbOuts_1(ces_3_2_io_lsbOuts_1),
- .io_lsbOuts_2(ces_3_2_io_lsbOuts_2),
- .io_lsbOuts_3(ces_3_2_io_lsbOuts_3),
- .io_lsbOuts_4(ces_3_2_io_lsbOuts_4),
- .io_lsbOuts_5(ces_3_2_io_lsbOuts_5),
- .io_lsbOuts_6(ces_3_2_io_lsbOuts_6),
- .io_lsbOuts_7(ces_3_2_io_lsbOuts_7)
- );
- Element ces_3_3 (
- .clock(ces_3_3_clock),
- .io_ins_down(ces_3_3_io_ins_down),
- .io_ins_right(ces_3_3_io_ins_right),
- .io_ins_up(ces_3_3_io_ins_up),
- .io_ins_left(ces_3_3_io_ins_left),
- .io_outs_down(ces_3_3_io_outs_down),
- .io_outs_right(ces_3_3_io_outs_right),
- .io_outs_up(ces_3_3_io_outs_up),
- .io_outs_left(ces_3_3_io_outs_left),
- .io_lsbIns_1(ces_3_3_io_lsbIns_1),
- .io_lsbIns_2(ces_3_3_io_lsbIns_2),
- .io_lsbIns_3(ces_3_3_io_lsbIns_3),
- .io_lsbIns_4(ces_3_3_io_lsbIns_4),
- .io_lsbIns_5(ces_3_3_io_lsbIns_5),
- .io_lsbIns_6(ces_3_3_io_lsbIns_6),
- .io_lsbIns_7(ces_3_3_io_lsbIns_7),
- .io_lsbOuts_0(ces_3_3_io_lsbOuts_0),
- .io_lsbOuts_1(ces_3_3_io_lsbOuts_1),
- .io_lsbOuts_2(ces_3_3_io_lsbOuts_2),
- .io_lsbOuts_3(ces_3_3_io_lsbOuts_3),
- .io_lsbOuts_4(ces_3_3_io_lsbOuts_4),
- .io_lsbOuts_5(ces_3_3_io_lsbOuts_5),
- .io_lsbOuts_6(ces_3_3_io_lsbOuts_6),
- .io_lsbOuts_7(ces_3_3_io_lsbOuts_7)
- );
- Element ces_3_4 (
- .clock(ces_3_4_clock),
- .io_ins_down(ces_3_4_io_ins_down),
- .io_ins_right(ces_3_4_io_ins_right),
- .io_ins_up(ces_3_4_io_ins_up),
- .io_ins_left(ces_3_4_io_ins_left),
- .io_outs_down(ces_3_4_io_outs_down),
- .io_outs_right(ces_3_4_io_outs_right),
- .io_outs_up(ces_3_4_io_outs_up),
- .io_outs_left(ces_3_4_io_outs_left),
- .io_lsbIns_1(ces_3_4_io_lsbIns_1),
- .io_lsbIns_2(ces_3_4_io_lsbIns_2),
- .io_lsbIns_3(ces_3_4_io_lsbIns_3),
- .io_lsbIns_4(ces_3_4_io_lsbIns_4),
- .io_lsbIns_5(ces_3_4_io_lsbIns_5),
- .io_lsbIns_6(ces_3_4_io_lsbIns_6),
- .io_lsbIns_7(ces_3_4_io_lsbIns_7),
- .io_lsbOuts_0(ces_3_4_io_lsbOuts_0),
- .io_lsbOuts_1(ces_3_4_io_lsbOuts_1),
- .io_lsbOuts_2(ces_3_4_io_lsbOuts_2),
- .io_lsbOuts_3(ces_3_4_io_lsbOuts_3),
- .io_lsbOuts_4(ces_3_4_io_lsbOuts_4),
- .io_lsbOuts_5(ces_3_4_io_lsbOuts_5),
- .io_lsbOuts_6(ces_3_4_io_lsbOuts_6),
- .io_lsbOuts_7(ces_3_4_io_lsbOuts_7)
- );
- Element ces_3_5 (
- .clock(ces_3_5_clock),
- .io_ins_down(ces_3_5_io_ins_down),
- .io_ins_right(ces_3_5_io_ins_right),
- .io_ins_up(ces_3_5_io_ins_up),
- .io_ins_left(ces_3_5_io_ins_left),
- .io_outs_down(ces_3_5_io_outs_down),
- .io_outs_right(ces_3_5_io_outs_right),
- .io_outs_up(ces_3_5_io_outs_up),
- .io_outs_left(ces_3_5_io_outs_left),
- .io_lsbIns_1(ces_3_5_io_lsbIns_1),
- .io_lsbIns_2(ces_3_5_io_lsbIns_2),
- .io_lsbIns_3(ces_3_5_io_lsbIns_3),
- .io_lsbIns_4(ces_3_5_io_lsbIns_4),
- .io_lsbIns_5(ces_3_5_io_lsbIns_5),
- .io_lsbIns_6(ces_3_5_io_lsbIns_6),
- .io_lsbIns_7(ces_3_5_io_lsbIns_7),
- .io_lsbOuts_0(ces_3_5_io_lsbOuts_0),
- .io_lsbOuts_1(ces_3_5_io_lsbOuts_1),
- .io_lsbOuts_2(ces_3_5_io_lsbOuts_2),
- .io_lsbOuts_3(ces_3_5_io_lsbOuts_3),
- .io_lsbOuts_4(ces_3_5_io_lsbOuts_4),
- .io_lsbOuts_5(ces_3_5_io_lsbOuts_5),
- .io_lsbOuts_6(ces_3_5_io_lsbOuts_6),
- .io_lsbOuts_7(ces_3_5_io_lsbOuts_7)
- );
- Element ces_3_6 (
- .clock(ces_3_6_clock),
- .io_ins_down(ces_3_6_io_ins_down),
- .io_ins_right(ces_3_6_io_ins_right),
- .io_ins_up(ces_3_6_io_ins_up),
- .io_ins_left(ces_3_6_io_ins_left),
- .io_outs_down(ces_3_6_io_outs_down),
- .io_outs_right(ces_3_6_io_outs_right),
- .io_outs_up(ces_3_6_io_outs_up),
- .io_outs_left(ces_3_6_io_outs_left),
- .io_lsbIns_1(ces_3_6_io_lsbIns_1),
- .io_lsbIns_2(ces_3_6_io_lsbIns_2),
- .io_lsbIns_3(ces_3_6_io_lsbIns_3),
- .io_lsbIns_4(ces_3_6_io_lsbIns_4),
- .io_lsbIns_5(ces_3_6_io_lsbIns_5),
- .io_lsbIns_6(ces_3_6_io_lsbIns_6),
- .io_lsbIns_7(ces_3_6_io_lsbIns_7),
- .io_lsbOuts_0(ces_3_6_io_lsbOuts_0),
- .io_lsbOuts_1(ces_3_6_io_lsbOuts_1),
- .io_lsbOuts_2(ces_3_6_io_lsbOuts_2),
- .io_lsbOuts_3(ces_3_6_io_lsbOuts_3),
- .io_lsbOuts_4(ces_3_6_io_lsbOuts_4),
- .io_lsbOuts_5(ces_3_6_io_lsbOuts_5),
- .io_lsbOuts_6(ces_3_6_io_lsbOuts_6),
- .io_lsbOuts_7(ces_3_6_io_lsbOuts_7)
- );
- Element ces_3_7 (
- .clock(ces_3_7_clock),
- .io_ins_down(ces_3_7_io_ins_down),
- .io_ins_right(ces_3_7_io_ins_right),
- .io_ins_up(ces_3_7_io_ins_up),
- .io_ins_left(ces_3_7_io_ins_left),
- .io_outs_down(ces_3_7_io_outs_down),
- .io_outs_right(ces_3_7_io_outs_right),
- .io_outs_up(ces_3_7_io_outs_up),
- .io_outs_left(ces_3_7_io_outs_left),
- .io_lsbIns_1(ces_3_7_io_lsbIns_1),
- .io_lsbIns_2(ces_3_7_io_lsbIns_2),
- .io_lsbIns_3(ces_3_7_io_lsbIns_3),
- .io_lsbIns_4(ces_3_7_io_lsbIns_4),
- .io_lsbIns_5(ces_3_7_io_lsbIns_5),
- .io_lsbIns_6(ces_3_7_io_lsbIns_6),
- .io_lsbIns_7(ces_3_7_io_lsbIns_7),
- .io_lsbOuts_0(ces_3_7_io_lsbOuts_0),
- .io_lsbOuts_1(ces_3_7_io_lsbOuts_1),
- .io_lsbOuts_2(ces_3_7_io_lsbOuts_2),
- .io_lsbOuts_3(ces_3_7_io_lsbOuts_3),
- .io_lsbOuts_4(ces_3_7_io_lsbOuts_4),
- .io_lsbOuts_5(ces_3_7_io_lsbOuts_5),
- .io_lsbOuts_6(ces_3_7_io_lsbOuts_6),
- .io_lsbOuts_7(ces_3_7_io_lsbOuts_7)
- );
- Element ces_4_0 (
- .clock(ces_4_0_clock),
- .io_ins_down(ces_4_0_io_ins_down),
- .io_ins_right(ces_4_0_io_ins_right),
- .io_ins_up(ces_4_0_io_ins_up),
- .io_ins_left(ces_4_0_io_ins_left),
- .io_outs_down(ces_4_0_io_outs_down),
- .io_outs_right(ces_4_0_io_outs_right),
- .io_outs_up(ces_4_0_io_outs_up),
- .io_outs_left(ces_4_0_io_outs_left),
- .io_lsbIns_1(ces_4_0_io_lsbIns_1),
- .io_lsbIns_2(ces_4_0_io_lsbIns_2),
- .io_lsbIns_3(ces_4_0_io_lsbIns_3),
- .io_lsbIns_4(ces_4_0_io_lsbIns_4),
- .io_lsbIns_5(ces_4_0_io_lsbIns_5),
- .io_lsbIns_6(ces_4_0_io_lsbIns_6),
- .io_lsbIns_7(ces_4_0_io_lsbIns_7),
- .io_lsbOuts_0(ces_4_0_io_lsbOuts_0),
- .io_lsbOuts_1(ces_4_0_io_lsbOuts_1),
- .io_lsbOuts_2(ces_4_0_io_lsbOuts_2),
- .io_lsbOuts_3(ces_4_0_io_lsbOuts_3),
- .io_lsbOuts_4(ces_4_0_io_lsbOuts_4),
- .io_lsbOuts_5(ces_4_0_io_lsbOuts_5),
- .io_lsbOuts_6(ces_4_0_io_lsbOuts_6),
- .io_lsbOuts_7(ces_4_0_io_lsbOuts_7)
- );
- Element ces_4_1 (
- .clock(ces_4_1_clock),
- .io_ins_down(ces_4_1_io_ins_down),
- .io_ins_right(ces_4_1_io_ins_right),
- .io_ins_up(ces_4_1_io_ins_up),
- .io_ins_left(ces_4_1_io_ins_left),
- .io_outs_down(ces_4_1_io_outs_down),
- .io_outs_right(ces_4_1_io_outs_right),
- .io_outs_up(ces_4_1_io_outs_up),
- .io_outs_left(ces_4_1_io_outs_left),
- .io_lsbIns_1(ces_4_1_io_lsbIns_1),
- .io_lsbIns_2(ces_4_1_io_lsbIns_2),
- .io_lsbIns_3(ces_4_1_io_lsbIns_3),
- .io_lsbIns_4(ces_4_1_io_lsbIns_4),
- .io_lsbIns_5(ces_4_1_io_lsbIns_5),
- .io_lsbIns_6(ces_4_1_io_lsbIns_6),
- .io_lsbIns_7(ces_4_1_io_lsbIns_7),
- .io_lsbOuts_0(ces_4_1_io_lsbOuts_0),
- .io_lsbOuts_1(ces_4_1_io_lsbOuts_1),
- .io_lsbOuts_2(ces_4_1_io_lsbOuts_2),
- .io_lsbOuts_3(ces_4_1_io_lsbOuts_3),
- .io_lsbOuts_4(ces_4_1_io_lsbOuts_4),
- .io_lsbOuts_5(ces_4_1_io_lsbOuts_5),
- .io_lsbOuts_6(ces_4_1_io_lsbOuts_6),
- .io_lsbOuts_7(ces_4_1_io_lsbOuts_7)
- );
- Element ces_4_2 (
- .clock(ces_4_2_clock),
- .io_ins_down(ces_4_2_io_ins_down),
- .io_ins_right(ces_4_2_io_ins_right),
- .io_ins_up(ces_4_2_io_ins_up),
- .io_ins_left(ces_4_2_io_ins_left),
- .io_outs_down(ces_4_2_io_outs_down),
- .io_outs_right(ces_4_2_io_outs_right),
- .io_outs_up(ces_4_2_io_outs_up),
- .io_outs_left(ces_4_2_io_outs_left),
- .io_lsbIns_1(ces_4_2_io_lsbIns_1),
- .io_lsbIns_2(ces_4_2_io_lsbIns_2),
- .io_lsbIns_3(ces_4_2_io_lsbIns_3),
- .io_lsbIns_4(ces_4_2_io_lsbIns_4),
- .io_lsbIns_5(ces_4_2_io_lsbIns_5),
- .io_lsbIns_6(ces_4_2_io_lsbIns_6),
- .io_lsbIns_7(ces_4_2_io_lsbIns_7),
- .io_lsbOuts_0(ces_4_2_io_lsbOuts_0),
- .io_lsbOuts_1(ces_4_2_io_lsbOuts_1),
- .io_lsbOuts_2(ces_4_2_io_lsbOuts_2),
- .io_lsbOuts_3(ces_4_2_io_lsbOuts_3),
- .io_lsbOuts_4(ces_4_2_io_lsbOuts_4),
- .io_lsbOuts_5(ces_4_2_io_lsbOuts_5),
- .io_lsbOuts_6(ces_4_2_io_lsbOuts_6),
- .io_lsbOuts_7(ces_4_2_io_lsbOuts_7)
- );
- Element ces_4_3 (
- .clock(ces_4_3_clock),
- .io_ins_down(ces_4_3_io_ins_down),
- .io_ins_right(ces_4_3_io_ins_right),
- .io_ins_up(ces_4_3_io_ins_up),
- .io_ins_left(ces_4_3_io_ins_left),
- .io_outs_down(ces_4_3_io_outs_down),
- .io_outs_right(ces_4_3_io_outs_right),
- .io_outs_up(ces_4_3_io_outs_up),
- .io_outs_left(ces_4_3_io_outs_left),
- .io_lsbIns_1(ces_4_3_io_lsbIns_1),
- .io_lsbIns_2(ces_4_3_io_lsbIns_2),
- .io_lsbIns_3(ces_4_3_io_lsbIns_3),
- .io_lsbIns_4(ces_4_3_io_lsbIns_4),
- .io_lsbIns_5(ces_4_3_io_lsbIns_5),
- .io_lsbIns_6(ces_4_3_io_lsbIns_6),
- .io_lsbIns_7(ces_4_3_io_lsbIns_7),
- .io_lsbOuts_0(ces_4_3_io_lsbOuts_0),
- .io_lsbOuts_1(ces_4_3_io_lsbOuts_1),
- .io_lsbOuts_2(ces_4_3_io_lsbOuts_2),
- .io_lsbOuts_3(ces_4_3_io_lsbOuts_3),
- .io_lsbOuts_4(ces_4_3_io_lsbOuts_4),
- .io_lsbOuts_5(ces_4_3_io_lsbOuts_5),
- .io_lsbOuts_6(ces_4_3_io_lsbOuts_6),
- .io_lsbOuts_7(ces_4_3_io_lsbOuts_7)
- );
- Element ces_4_4 (
- .clock(ces_4_4_clock),
- .io_ins_down(ces_4_4_io_ins_down),
- .io_ins_right(ces_4_4_io_ins_right),
- .io_ins_up(ces_4_4_io_ins_up),
- .io_ins_left(ces_4_4_io_ins_left),
- .io_outs_down(ces_4_4_io_outs_down),
- .io_outs_right(ces_4_4_io_outs_right),
- .io_outs_up(ces_4_4_io_outs_up),
- .io_outs_left(ces_4_4_io_outs_left),
- .io_lsbIns_1(ces_4_4_io_lsbIns_1),
- .io_lsbIns_2(ces_4_4_io_lsbIns_2),
- .io_lsbIns_3(ces_4_4_io_lsbIns_3),
- .io_lsbIns_4(ces_4_4_io_lsbIns_4),
- .io_lsbIns_5(ces_4_4_io_lsbIns_5),
- .io_lsbIns_6(ces_4_4_io_lsbIns_6),
- .io_lsbIns_7(ces_4_4_io_lsbIns_7),
- .io_lsbOuts_0(ces_4_4_io_lsbOuts_0),
- .io_lsbOuts_1(ces_4_4_io_lsbOuts_1),
- .io_lsbOuts_2(ces_4_4_io_lsbOuts_2),
- .io_lsbOuts_3(ces_4_4_io_lsbOuts_3),
- .io_lsbOuts_4(ces_4_4_io_lsbOuts_4),
- .io_lsbOuts_5(ces_4_4_io_lsbOuts_5),
- .io_lsbOuts_6(ces_4_4_io_lsbOuts_6),
- .io_lsbOuts_7(ces_4_4_io_lsbOuts_7)
- );
- Element ces_4_5 (
- .clock(ces_4_5_clock),
- .io_ins_down(ces_4_5_io_ins_down),
- .io_ins_right(ces_4_5_io_ins_right),
- .io_ins_up(ces_4_5_io_ins_up),
- .io_ins_left(ces_4_5_io_ins_left),
- .io_outs_down(ces_4_5_io_outs_down),
- .io_outs_right(ces_4_5_io_outs_right),
- .io_outs_up(ces_4_5_io_outs_up),
- .io_outs_left(ces_4_5_io_outs_left),
- .io_lsbIns_1(ces_4_5_io_lsbIns_1),
- .io_lsbIns_2(ces_4_5_io_lsbIns_2),
- .io_lsbIns_3(ces_4_5_io_lsbIns_3),
- .io_lsbIns_4(ces_4_5_io_lsbIns_4),
- .io_lsbIns_5(ces_4_5_io_lsbIns_5),
- .io_lsbIns_6(ces_4_5_io_lsbIns_6),
- .io_lsbIns_7(ces_4_5_io_lsbIns_7),
- .io_lsbOuts_0(ces_4_5_io_lsbOuts_0),
- .io_lsbOuts_1(ces_4_5_io_lsbOuts_1),
- .io_lsbOuts_2(ces_4_5_io_lsbOuts_2),
- .io_lsbOuts_3(ces_4_5_io_lsbOuts_3),
- .io_lsbOuts_4(ces_4_5_io_lsbOuts_4),
- .io_lsbOuts_5(ces_4_5_io_lsbOuts_5),
- .io_lsbOuts_6(ces_4_5_io_lsbOuts_6),
- .io_lsbOuts_7(ces_4_5_io_lsbOuts_7)
- );
- Element ces_4_6 (
- .clock(ces_4_6_clock),
- .io_ins_down(ces_4_6_io_ins_down),
- .io_ins_right(ces_4_6_io_ins_right),
- .io_ins_up(ces_4_6_io_ins_up),
- .io_ins_left(ces_4_6_io_ins_left),
- .io_outs_down(ces_4_6_io_outs_down),
- .io_outs_right(ces_4_6_io_outs_right),
- .io_outs_up(ces_4_6_io_outs_up),
- .io_outs_left(ces_4_6_io_outs_left),
- .io_lsbIns_1(ces_4_6_io_lsbIns_1),
- .io_lsbIns_2(ces_4_6_io_lsbIns_2),
- .io_lsbIns_3(ces_4_6_io_lsbIns_3),
- .io_lsbIns_4(ces_4_6_io_lsbIns_4),
- .io_lsbIns_5(ces_4_6_io_lsbIns_5),
- .io_lsbIns_6(ces_4_6_io_lsbIns_6),
- .io_lsbIns_7(ces_4_6_io_lsbIns_7),
- .io_lsbOuts_0(ces_4_6_io_lsbOuts_0),
- .io_lsbOuts_1(ces_4_6_io_lsbOuts_1),
- .io_lsbOuts_2(ces_4_6_io_lsbOuts_2),
- .io_lsbOuts_3(ces_4_6_io_lsbOuts_3),
- .io_lsbOuts_4(ces_4_6_io_lsbOuts_4),
- .io_lsbOuts_5(ces_4_6_io_lsbOuts_5),
- .io_lsbOuts_6(ces_4_6_io_lsbOuts_6),
- .io_lsbOuts_7(ces_4_6_io_lsbOuts_7)
- );
- Element ces_4_7 (
- .clock(ces_4_7_clock),
- .io_ins_down(ces_4_7_io_ins_down),
- .io_ins_right(ces_4_7_io_ins_right),
- .io_ins_up(ces_4_7_io_ins_up),
- .io_ins_left(ces_4_7_io_ins_left),
- .io_outs_down(ces_4_7_io_outs_down),
- .io_outs_right(ces_4_7_io_outs_right),
- .io_outs_up(ces_4_7_io_outs_up),
- .io_outs_left(ces_4_7_io_outs_left),
- .io_lsbIns_1(ces_4_7_io_lsbIns_1),
- .io_lsbIns_2(ces_4_7_io_lsbIns_2),
- .io_lsbIns_3(ces_4_7_io_lsbIns_3),
- .io_lsbIns_4(ces_4_7_io_lsbIns_4),
- .io_lsbIns_5(ces_4_7_io_lsbIns_5),
- .io_lsbIns_6(ces_4_7_io_lsbIns_6),
- .io_lsbIns_7(ces_4_7_io_lsbIns_7),
- .io_lsbOuts_0(ces_4_7_io_lsbOuts_0),
- .io_lsbOuts_1(ces_4_7_io_lsbOuts_1),
- .io_lsbOuts_2(ces_4_7_io_lsbOuts_2),
- .io_lsbOuts_3(ces_4_7_io_lsbOuts_3),
- .io_lsbOuts_4(ces_4_7_io_lsbOuts_4),
- .io_lsbOuts_5(ces_4_7_io_lsbOuts_5),
- .io_lsbOuts_6(ces_4_7_io_lsbOuts_6),
- .io_lsbOuts_7(ces_4_7_io_lsbOuts_7)
- );
- Element ces_5_0 (
- .clock(ces_5_0_clock),
- .io_ins_down(ces_5_0_io_ins_down),
- .io_ins_right(ces_5_0_io_ins_right),
- .io_ins_up(ces_5_0_io_ins_up),
- .io_ins_left(ces_5_0_io_ins_left),
- .io_outs_down(ces_5_0_io_outs_down),
- .io_outs_right(ces_5_0_io_outs_right),
- .io_outs_up(ces_5_0_io_outs_up),
- .io_outs_left(ces_5_0_io_outs_left),
- .io_lsbIns_1(ces_5_0_io_lsbIns_1),
- .io_lsbIns_2(ces_5_0_io_lsbIns_2),
- .io_lsbIns_3(ces_5_0_io_lsbIns_3),
- .io_lsbIns_4(ces_5_0_io_lsbIns_4),
- .io_lsbIns_5(ces_5_0_io_lsbIns_5),
- .io_lsbIns_6(ces_5_0_io_lsbIns_6),
- .io_lsbIns_7(ces_5_0_io_lsbIns_7),
- .io_lsbOuts_0(ces_5_0_io_lsbOuts_0),
- .io_lsbOuts_1(ces_5_0_io_lsbOuts_1),
- .io_lsbOuts_2(ces_5_0_io_lsbOuts_2),
- .io_lsbOuts_3(ces_5_0_io_lsbOuts_3),
- .io_lsbOuts_4(ces_5_0_io_lsbOuts_4),
- .io_lsbOuts_5(ces_5_0_io_lsbOuts_5),
- .io_lsbOuts_6(ces_5_0_io_lsbOuts_6),
- .io_lsbOuts_7(ces_5_0_io_lsbOuts_7)
- );
- Element ces_5_1 (
- .clock(ces_5_1_clock),
- .io_ins_down(ces_5_1_io_ins_down),
- .io_ins_right(ces_5_1_io_ins_right),
- .io_ins_up(ces_5_1_io_ins_up),
- .io_ins_left(ces_5_1_io_ins_left),
- .io_outs_down(ces_5_1_io_outs_down),
- .io_outs_right(ces_5_1_io_outs_right),
- .io_outs_up(ces_5_1_io_outs_up),
- .io_outs_left(ces_5_1_io_outs_left),
- .io_lsbIns_1(ces_5_1_io_lsbIns_1),
- .io_lsbIns_2(ces_5_1_io_lsbIns_2),
- .io_lsbIns_3(ces_5_1_io_lsbIns_3),
- .io_lsbIns_4(ces_5_1_io_lsbIns_4),
- .io_lsbIns_5(ces_5_1_io_lsbIns_5),
- .io_lsbIns_6(ces_5_1_io_lsbIns_6),
- .io_lsbIns_7(ces_5_1_io_lsbIns_7),
- .io_lsbOuts_0(ces_5_1_io_lsbOuts_0),
- .io_lsbOuts_1(ces_5_1_io_lsbOuts_1),
- .io_lsbOuts_2(ces_5_1_io_lsbOuts_2),
- .io_lsbOuts_3(ces_5_1_io_lsbOuts_3),
- .io_lsbOuts_4(ces_5_1_io_lsbOuts_4),
- .io_lsbOuts_5(ces_5_1_io_lsbOuts_5),
- .io_lsbOuts_6(ces_5_1_io_lsbOuts_6),
- .io_lsbOuts_7(ces_5_1_io_lsbOuts_7)
- );
- Element ces_5_2 (
- .clock(ces_5_2_clock),
- .io_ins_down(ces_5_2_io_ins_down),
- .io_ins_right(ces_5_2_io_ins_right),
- .io_ins_up(ces_5_2_io_ins_up),
- .io_ins_left(ces_5_2_io_ins_left),
- .io_outs_down(ces_5_2_io_outs_down),
- .io_outs_right(ces_5_2_io_outs_right),
- .io_outs_up(ces_5_2_io_outs_up),
- .io_outs_left(ces_5_2_io_outs_left),
- .io_lsbIns_1(ces_5_2_io_lsbIns_1),
- .io_lsbIns_2(ces_5_2_io_lsbIns_2),
- .io_lsbIns_3(ces_5_2_io_lsbIns_3),
- .io_lsbIns_4(ces_5_2_io_lsbIns_4),
- .io_lsbIns_5(ces_5_2_io_lsbIns_5),
- .io_lsbIns_6(ces_5_2_io_lsbIns_6),
- .io_lsbIns_7(ces_5_2_io_lsbIns_7),
- .io_lsbOuts_0(ces_5_2_io_lsbOuts_0),
- .io_lsbOuts_1(ces_5_2_io_lsbOuts_1),
- .io_lsbOuts_2(ces_5_2_io_lsbOuts_2),
- .io_lsbOuts_3(ces_5_2_io_lsbOuts_3),
- .io_lsbOuts_4(ces_5_2_io_lsbOuts_4),
- .io_lsbOuts_5(ces_5_2_io_lsbOuts_5),
- .io_lsbOuts_6(ces_5_2_io_lsbOuts_6),
- .io_lsbOuts_7(ces_5_2_io_lsbOuts_7)
- );
- Element ces_5_3 (
- .clock(ces_5_3_clock),
- .io_ins_down(ces_5_3_io_ins_down),
- .io_ins_right(ces_5_3_io_ins_right),
- .io_ins_up(ces_5_3_io_ins_up),
- .io_ins_left(ces_5_3_io_ins_left),
- .io_outs_down(ces_5_3_io_outs_down),
- .io_outs_right(ces_5_3_io_outs_right),
- .io_outs_up(ces_5_3_io_outs_up),
- .io_outs_left(ces_5_3_io_outs_left),
- .io_lsbIns_1(ces_5_3_io_lsbIns_1),
- .io_lsbIns_2(ces_5_3_io_lsbIns_2),
- .io_lsbIns_3(ces_5_3_io_lsbIns_3),
- .io_lsbIns_4(ces_5_3_io_lsbIns_4),
- .io_lsbIns_5(ces_5_3_io_lsbIns_5),
- .io_lsbIns_6(ces_5_3_io_lsbIns_6),
- .io_lsbIns_7(ces_5_3_io_lsbIns_7),
- .io_lsbOuts_0(ces_5_3_io_lsbOuts_0),
- .io_lsbOuts_1(ces_5_3_io_lsbOuts_1),
- .io_lsbOuts_2(ces_5_3_io_lsbOuts_2),
- .io_lsbOuts_3(ces_5_3_io_lsbOuts_3),
- .io_lsbOuts_4(ces_5_3_io_lsbOuts_4),
- .io_lsbOuts_5(ces_5_3_io_lsbOuts_5),
- .io_lsbOuts_6(ces_5_3_io_lsbOuts_6),
- .io_lsbOuts_7(ces_5_3_io_lsbOuts_7)
- );
- Element ces_5_4 (
- .clock(ces_5_4_clock),
- .io_ins_down(ces_5_4_io_ins_down),
- .io_ins_right(ces_5_4_io_ins_right),
- .io_ins_up(ces_5_4_io_ins_up),
- .io_ins_left(ces_5_4_io_ins_left),
- .io_outs_down(ces_5_4_io_outs_down),
- .io_outs_right(ces_5_4_io_outs_right),
- .io_outs_up(ces_5_4_io_outs_up),
- .io_outs_left(ces_5_4_io_outs_left),
- .io_lsbIns_1(ces_5_4_io_lsbIns_1),
- .io_lsbIns_2(ces_5_4_io_lsbIns_2),
- .io_lsbIns_3(ces_5_4_io_lsbIns_3),
- .io_lsbIns_4(ces_5_4_io_lsbIns_4),
- .io_lsbIns_5(ces_5_4_io_lsbIns_5),
- .io_lsbIns_6(ces_5_4_io_lsbIns_6),
- .io_lsbIns_7(ces_5_4_io_lsbIns_7),
- .io_lsbOuts_0(ces_5_4_io_lsbOuts_0),
- .io_lsbOuts_1(ces_5_4_io_lsbOuts_1),
- .io_lsbOuts_2(ces_5_4_io_lsbOuts_2),
- .io_lsbOuts_3(ces_5_4_io_lsbOuts_3),
- .io_lsbOuts_4(ces_5_4_io_lsbOuts_4),
- .io_lsbOuts_5(ces_5_4_io_lsbOuts_5),
- .io_lsbOuts_6(ces_5_4_io_lsbOuts_6),
- .io_lsbOuts_7(ces_5_4_io_lsbOuts_7)
- );
- Element ces_5_5 (
- .clock(ces_5_5_clock),
- .io_ins_down(ces_5_5_io_ins_down),
- .io_ins_right(ces_5_5_io_ins_right),
- .io_ins_up(ces_5_5_io_ins_up),
- .io_ins_left(ces_5_5_io_ins_left),
- .io_outs_down(ces_5_5_io_outs_down),
- .io_outs_right(ces_5_5_io_outs_right),
- .io_outs_up(ces_5_5_io_outs_up),
- .io_outs_left(ces_5_5_io_outs_left),
- .io_lsbIns_1(ces_5_5_io_lsbIns_1),
- .io_lsbIns_2(ces_5_5_io_lsbIns_2),
- .io_lsbIns_3(ces_5_5_io_lsbIns_3),
- .io_lsbIns_4(ces_5_5_io_lsbIns_4),
- .io_lsbIns_5(ces_5_5_io_lsbIns_5),
- .io_lsbIns_6(ces_5_5_io_lsbIns_6),
- .io_lsbIns_7(ces_5_5_io_lsbIns_7),
- .io_lsbOuts_0(ces_5_5_io_lsbOuts_0),
- .io_lsbOuts_1(ces_5_5_io_lsbOuts_1),
- .io_lsbOuts_2(ces_5_5_io_lsbOuts_2),
- .io_lsbOuts_3(ces_5_5_io_lsbOuts_3),
- .io_lsbOuts_4(ces_5_5_io_lsbOuts_4),
- .io_lsbOuts_5(ces_5_5_io_lsbOuts_5),
- .io_lsbOuts_6(ces_5_5_io_lsbOuts_6),
- .io_lsbOuts_7(ces_5_5_io_lsbOuts_7)
- );
- Element ces_5_6 (
- .clock(ces_5_6_clock),
- .io_ins_down(ces_5_6_io_ins_down),
- .io_ins_right(ces_5_6_io_ins_right),
- .io_ins_up(ces_5_6_io_ins_up),
- .io_ins_left(ces_5_6_io_ins_left),
- .io_outs_down(ces_5_6_io_outs_down),
- .io_outs_right(ces_5_6_io_outs_right),
- .io_outs_up(ces_5_6_io_outs_up),
- .io_outs_left(ces_5_6_io_outs_left),
- .io_lsbIns_1(ces_5_6_io_lsbIns_1),
- .io_lsbIns_2(ces_5_6_io_lsbIns_2),
- .io_lsbIns_3(ces_5_6_io_lsbIns_3),
- .io_lsbIns_4(ces_5_6_io_lsbIns_4),
- .io_lsbIns_5(ces_5_6_io_lsbIns_5),
- .io_lsbIns_6(ces_5_6_io_lsbIns_6),
- .io_lsbIns_7(ces_5_6_io_lsbIns_7),
- .io_lsbOuts_0(ces_5_6_io_lsbOuts_0),
- .io_lsbOuts_1(ces_5_6_io_lsbOuts_1),
- .io_lsbOuts_2(ces_5_6_io_lsbOuts_2),
- .io_lsbOuts_3(ces_5_6_io_lsbOuts_3),
- .io_lsbOuts_4(ces_5_6_io_lsbOuts_4),
- .io_lsbOuts_5(ces_5_6_io_lsbOuts_5),
- .io_lsbOuts_6(ces_5_6_io_lsbOuts_6),
- .io_lsbOuts_7(ces_5_6_io_lsbOuts_7)
- );
- Element ces_5_7 (
- .clock(ces_5_7_clock),
- .io_ins_down(ces_5_7_io_ins_down),
- .io_ins_right(ces_5_7_io_ins_right),
- .io_ins_up(ces_5_7_io_ins_up),
- .io_ins_left(ces_5_7_io_ins_left),
- .io_outs_down(ces_5_7_io_outs_down),
- .io_outs_right(ces_5_7_io_outs_right),
- .io_outs_up(ces_5_7_io_outs_up),
- .io_outs_left(ces_5_7_io_outs_left),
- .io_lsbIns_1(ces_5_7_io_lsbIns_1),
- .io_lsbIns_2(ces_5_7_io_lsbIns_2),
- .io_lsbIns_3(ces_5_7_io_lsbIns_3),
- .io_lsbIns_4(ces_5_7_io_lsbIns_4),
- .io_lsbIns_5(ces_5_7_io_lsbIns_5),
- .io_lsbIns_6(ces_5_7_io_lsbIns_6),
- .io_lsbIns_7(ces_5_7_io_lsbIns_7),
- .io_lsbOuts_0(ces_5_7_io_lsbOuts_0),
- .io_lsbOuts_1(ces_5_7_io_lsbOuts_1),
- .io_lsbOuts_2(ces_5_7_io_lsbOuts_2),
- .io_lsbOuts_3(ces_5_7_io_lsbOuts_3),
- .io_lsbOuts_4(ces_5_7_io_lsbOuts_4),
- .io_lsbOuts_5(ces_5_7_io_lsbOuts_5),
- .io_lsbOuts_6(ces_5_7_io_lsbOuts_6),
- .io_lsbOuts_7(ces_5_7_io_lsbOuts_7)
- );
- Element ces_6_0 (
- .clock(ces_6_0_clock),
- .io_ins_down(ces_6_0_io_ins_down),
- .io_ins_right(ces_6_0_io_ins_right),
- .io_ins_up(ces_6_0_io_ins_up),
- .io_ins_left(ces_6_0_io_ins_left),
- .io_outs_down(ces_6_0_io_outs_down),
- .io_outs_right(ces_6_0_io_outs_right),
- .io_outs_up(ces_6_0_io_outs_up),
- .io_outs_left(ces_6_0_io_outs_left),
- .io_lsbIns_1(ces_6_0_io_lsbIns_1),
- .io_lsbIns_2(ces_6_0_io_lsbIns_2),
- .io_lsbIns_3(ces_6_0_io_lsbIns_3),
- .io_lsbIns_4(ces_6_0_io_lsbIns_4),
- .io_lsbIns_5(ces_6_0_io_lsbIns_5),
- .io_lsbIns_6(ces_6_0_io_lsbIns_6),
- .io_lsbIns_7(ces_6_0_io_lsbIns_7),
- .io_lsbOuts_0(ces_6_0_io_lsbOuts_0),
- .io_lsbOuts_1(ces_6_0_io_lsbOuts_1),
- .io_lsbOuts_2(ces_6_0_io_lsbOuts_2),
- .io_lsbOuts_3(ces_6_0_io_lsbOuts_3),
- .io_lsbOuts_4(ces_6_0_io_lsbOuts_4),
- .io_lsbOuts_5(ces_6_0_io_lsbOuts_5),
- .io_lsbOuts_6(ces_6_0_io_lsbOuts_6),
- .io_lsbOuts_7(ces_6_0_io_lsbOuts_7)
- );
- Element ces_6_1 (
- .clock(ces_6_1_clock),
- .io_ins_down(ces_6_1_io_ins_down),
- .io_ins_right(ces_6_1_io_ins_right),
- .io_ins_up(ces_6_1_io_ins_up),
- .io_ins_left(ces_6_1_io_ins_left),
- .io_outs_down(ces_6_1_io_outs_down),
- .io_outs_right(ces_6_1_io_outs_right),
- .io_outs_up(ces_6_1_io_outs_up),
- .io_outs_left(ces_6_1_io_outs_left),
- .io_lsbIns_1(ces_6_1_io_lsbIns_1),
- .io_lsbIns_2(ces_6_1_io_lsbIns_2),
- .io_lsbIns_3(ces_6_1_io_lsbIns_3),
- .io_lsbIns_4(ces_6_1_io_lsbIns_4),
- .io_lsbIns_5(ces_6_1_io_lsbIns_5),
- .io_lsbIns_6(ces_6_1_io_lsbIns_6),
- .io_lsbIns_7(ces_6_1_io_lsbIns_7),
- .io_lsbOuts_0(ces_6_1_io_lsbOuts_0),
- .io_lsbOuts_1(ces_6_1_io_lsbOuts_1),
- .io_lsbOuts_2(ces_6_1_io_lsbOuts_2),
- .io_lsbOuts_3(ces_6_1_io_lsbOuts_3),
- .io_lsbOuts_4(ces_6_1_io_lsbOuts_4),
- .io_lsbOuts_5(ces_6_1_io_lsbOuts_5),
- .io_lsbOuts_6(ces_6_1_io_lsbOuts_6),
- .io_lsbOuts_7(ces_6_1_io_lsbOuts_7)
- );
- Element ces_6_2 (
- .clock(ces_6_2_clock),
- .io_ins_down(ces_6_2_io_ins_down),
- .io_ins_right(ces_6_2_io_ins_right),
- .io_ins_up(ces_6_2_io_ins_up),
- .io_ins_left(ces_6_2_io_ins_left),
- .io_outs_down(ces_6_2_io_outs_down),
- .io_outs_right(ces_6_2_io_outs_right),
- .io_outs_up(ces_6_2_io_outs_up),
- .io_outs_left(ces_6_2_io_outs_left),
- .io_lsbIns_1(ces_6_2_io_lsbIns_1),
- .io_lsbIns_2(ces_6_2_io_lsbIns_2),
- .io_lsbIns_3(ces_6_2_io_lsbIns_3),
- .io_lsbIns_4(ces_6_2_io_lsbIns_4),
- .io_lsbIns_5(ces_6_2_io_lsbIns_5),
- .io_lsbIns_6(ces_6_2_io_lsbIns_6),
- .io_lsbIns_7(ces_6_2_io_lsbIns_7),
- .io_lsbOuts_0(ces_6_2_io_lsbOuts_0),
- .io_lsbOuts_1(ces_6_2_io_lsbOuts_1),
- .io_lsbOuts_2(ces_6_2_io_lsbOuts_2),
- .io_lsbOuts_3(ces_6_2_io_lsbOuts_3),
- .io_lsbOuts_4(ces_6_2_io_lsbOuts_4),
- .io_lsbOuts_5(ces_6_2_io_lsbOuts_5),
- .io_lsbOuts_6(ces_6_2_io_lsbOuts_6),
- .io_lsbOuts_7(ces_6_2_io_lsbOuts_7)
- );
- Element ces_6_3 (
- .clock(ces_6_3_clock),
- .io_ins_down(ces_6_3_io_ins_down),
- .io_ins_right(ces_6_3_io_ins_right),
- .io_ins_up(ces_6_3_io_ins_up),
- .io_ins_left(ces_6_3_io_ins_left),
- .io_outs_down(ces_6_3_io_outs_down),
- .io_outs_right(ces_6_3_io_outs_right),
- .io_outs_up(ces_6_3_io_outs_up),
- .io_outs_left(ces_6_3_io_outs_left),
- .io_lsbIns_1(ces_6_3_io_lsbIns_1),
- .io_lsbIns_2(ces_6_3_io_lsbIns_2),
- .io_lsbIns_3(ces_6_3_io_lsbIns_3),
- .io_lsbIns_4(ces_6_3_io_lsbIns_4),
- .io_lsbIns_5(ces_6_3_io_lsbIns_5),
- .io_lsbIns_6(ces_6_3_io_lsbIns_6),
- .io_lsbIns_7(ces_6_3_io_lsbIns_7),
- .io_lsbOuts_0(ces_6_3_io_lsbOuts_0),
- .io_lsbOuts_1(ces_6_3_io_lsbOuts_1),
- .io_lsbOuts_2(ces_6_3_io_lsbOuts_2),
- .io_lsbOuts_3(ces_6_3_io_lsbOuts_3),
- .io_lsbOuts_4(ces_6_3_io_lsbOuts_4),
- .io_lsbOuts_5(ces_6_3_io_lsbOuts_5),
- .io_lsbOuts_6(ces_6_3_io_lsbOuts_6),
- .io_lsbOuts_7(ces_6_3_io_lsbOuts_7)
- );
- Element ces_6_4 (
- .clock(ces_6_4_clock),
- .io_ins_down(ces_6_4_io_ins_down),
- .io_ins_right(ces_6_4_io_ins_right),
- .io_ins_up(ces_6_4_io_ins_up),
- .io_ins_left(ces_6_4_io_ins_left),
- .io_outs_down(ces_6_4_io_outs_down),
- .io_outs_right(ces_6_4_io_outs_right),
- .io_outs_up(ces_6_4_io_outs_up),
- .io_outs_left(ces_6_4_io_outs_left),
- .io_lsbIns_1(ces_6_4_io_lsbIns_1),
- .io_lsbIns_2(ces_6_4_io_lsbIns_2),
- .io_lsbIns_3(ces_6_4_io_lsbIns_3),
- .io_lsbIns_4(ces_6_4_io_lsbIns_4),
- .io_lsbIns_5(ces_6_4_io_lsbIns_5),
- .io_lsbIns_6(ces_6_4_io_lsbIns_6),
- .io_lsbIns_7(ces_6_4_io_lsbIns_7),
- .io_lsbOuts_0(ces_6_4_io_lsbOuts_0),
- .io_lsbOuts_1(ces_6_4_io_lsbOuts_1),
- .io_lsbOuts_2(ces_6_4_io_lsbOuts_2),
- .io_lsbOuts_3(ces_6_4_io_lsbOuts_3),
- .io_lsbOuts_4(ces_6_4_io_lsbOuts_4),
- .io_lsbOuts_5(ces_6_4_io_lsbOuts_5),
- .io_lsbOuts_6(ces_6_4_io_lsbOuts_6),
- .io_lsbOuts_7(ces_6_4_io_lsbOuts_7)
- );
- Element ces_6_5 (
- .clock(ces_6_5_clock),
- .io_ins_down(ces_6_5_io_ins_down),
- .io_ins_right(ces_6_5_io_ins_right),
- .io_ins_up(ces_6_5_io_ins_up),
- .io_ins_left(ces_6_5_io_ins_left),
- .io_outs_down(ces_6_5_io_outs_down),
- .io_outs_right(ces_6_5_io_outs_right),
- .io_outs_up(ces_6_5_io_outs_up),
- .io_outs_left(ces_6_5_io_outs_left),
- .io_lsbIns_1(ces_6_5_io_lsbIns_1),
- .io_lsbIns_2(ces_6_5_io_lsbIns_2),
- .io_lsbIns_3(ces_6_5_io_lsbIns_3),
- .io_lsbIns_4(ces_6_5_io_lsbIns_4),
- .io_lsbIns_5(ces_6_5_io_lsbIns_5),
- .io_lsbIns_6(ces_6_5_io_lsbIns_6),
- .io_lsbIns_7(ces_6_5_io_lsbIns_7),
- .io_lsbOuts_0(ces_6_5_io_lsbOuts_0),
- .io_lsbOuts_1(ces_6_5_io_lsbOuts_1),
- .io_lsbOuts_2(ces_6_5_io_lsbOuts_2),
- .io_lsbOuts_3(ces_6_5_io_lsbOuts_3),
- .io_lsbOuts_4(ces_6_5_io_lsbOuts_4),
- .io_lsbOuts_5(ces_6_5_io_lsbOuts_5),
- .io_lsbOuts_6(ces_6_5_io_lsbOuts_6),
- .io_lsbOuts_7(ces_6_5_io_lsbOuts_7)
- );
- Element ces_6_6 (
- .clock(ces_6_6_clock),
- .io_ins_down(ces_6_6_io_ins_down),
- .io_ins_right(ces_6_6_io_ins_right),
- .io_ins_up(ces_6_6_io_ins_up),
- .io_ins_left(ces_6_6_io_ins_left),
- .io_outs_down(ces_6_6_io_outs_down),
- .io_outs_right(ces_6_6_io_outs_right),
- .io_outs_up(ces_6_6_io_outs_up),
- .io_outs_left(ces_6_6_io_outs_left),
- .io_lsbIns_1(ces_6_6_io_lsbIns_1),
- .io_lsbIns_2(ces_6_6_io_lsbIns_2),
- .io_lsbIns_3(ces_6_6_io_lsbIns_3),
- .io_lsbIns_4(ces_6_6_io_lsbIns_4),
- .io_lsbIns_5(ces_6_6_io_lsbIns_5),
- .io_lsbIns_6(ces_6_6_io_lsbIns_6),
- .io_lsbIns_7(ces_6_6_io_lsbIns_7),
- .io_lsbOuts_0(ces_6_6_io_lsbOuts_0),
- .io_lsbOuts_1(ces_6_6_io_lsbOuts_1),
- .io_lsbOuts_2(ces_6_6_io_lsbOuts_2),
- .io_lsbOuts_3(ces_6_6_io_lsbOuts_3),
- .io_lsbOuts_4(ces_6_6_io_lsbOuts_4),
- .io_lsbOuts_5(ces_6_6_io_lsbOuts_5),
- .io_lsbOuts_6(ces_6_6_io_lsbOuts_6),
- .io_lsbOuts_7(ces_6_6_io_lsbOuts_7)
- );
- Element ces_6_7 (
- .clock(ces_6_7_clock),
- .io_ins_down(ces_6_7_io_ins_down),
- .io_ins_right(ces_6_7_io_ins_right),
- .io_ins_up(ces_6_7_io_ins_up),
- .io_ins_left(ces_6_7_io_ins_left),
- .io_outs_down(ces_6_7_io_outs_down),
- .io_outs_right(ces_6_7_io_outs_right),
- .io_outs_up(ces_6_7_io_outs_up),
- .io_outs_left(ces_6_7_io_outs_left),
- .io_lsbIns_1(ces_6_7_io_lsbIns_1),
- .io_lsbIns_2(ces_6_7_io_lsbIns_2),
- .io_lsbIns_3(ces_6_7_io_lsbIns_3),
- .io_lsbIns_4(ces_6_7_io_lsbIns_4),
- .io_lsbIns_5(ces_6_7_io_lsbIns_5),
- .io_lsbIns_6(ces_6_7_io_lsbIns_6),
- .io_lsbIns_7(ces_6_7_io_lsbIns_7),
- .io_lsbOuts_0(ces_6_7_io_lsbOuts_0),
- .io_lsbOuts_1(ces_6_7_io_lsbOuts_1),
- .io_lsbOuts_2(ces_6_7_io_lsbOuts_2),
- .io_lsbOuts_3(ces_6_7_io_lsbOuts_3),
- .io_lsbOuts_4(ces_6_7_io_lsbOuts_4),
- .io_lsbOuts_5(ces_6_7_io_lsbOuts_5),
- .io_lsbOuts_6(ces_6_7_io_lsbOuts_6),
- .io_lsbOuts_7(ces_6_7_io_lsbOuts_7)
- );
- Element ces_7_0 (
- .clock(ces_7_0_clock),
- .io_ins_down(ces_7_0_io_ins_down),
- .io_ins_right(ces_7_0_io_ins_right),
- .io_ins_up(ces_7_0_io_ins_up),
- .io_ins_left(ces_7_0_io_ins_left),
- .io_outs_down(ces_7_0_io_outs_down),
- .io_outs_right(ces_7_0_io_outs_right),
- .io_outs_up(ces_7_0_io_outs_up),
- .io_outs_left(ces_7_0_io_outs_left),
- .io_lsbIns_1(ces_7_0_io_lsbIns_1),
- .io_lsbIns_2(ces_7_0_io_lsbIns_2),
- .io_lsbIns_3(ces_7_0_io_lsbIns_3),
- .io_lsbIns_4(ces_7_0_io_lsbIns_4),
- .io_lsbIns_5(ces_7_0_io_lsbIns_5),
- .io_lsbIns_6(ces_7_0_io_lsbIns_6),
- .io_lsbIns_7(ces_7_0_io_lsbIns_7),
- .io_lsbOuts_0(ces_7_0_io_lsbOuts_0),
- .io_lsbOuts_1(ces_7_0_io_lsbOuts_1),
- .io_lsbOuts_2(ces_7_0_io_lsbOuts_2),
- .io_lsbOuts_3(ces_7_0_io_lsbOuts_3),
- .io_lsbOuts_4(ces_7_0_io_lsbOuts_4),
- .io_lsbOuts_5(ces_7_0_io_lsbOuts_5),
- .io_lsbOuts_6(ces_7_0_io_lsbOuts_6),
- .io_lsbOuts_7(ces_7_0_io_lsbOuts_7)
- );
- Element ces_7_1 (
- .clock(ces_7_1_clock),
- .io_ins_down(ces_7_1_io_ins_down),
- .io_ins_right(ces_7_1_io_ins_right),
- .io_ins_up(ces_7_1_io_ins_up),
- .io_ins_left(ces_7_1_io_ins_left),
- .io_outs_down(ces_7_1_io_outs_down),
- .io_outs_right(ces_7_1_io_outs_right),
- .io_outs_up(ces_7_1_io_outs_up),
- .io_outs_left(ces_7_1_io_outs_left),
- .io_lsbIns_1(ces_7_1_io_lsbIns_1),
- .io_lsbIns_2(ces_7_1_io_lsbIns_2),
- .io_lsbIns_3(ces_7_1_io_lsbIns_3),
- .io_lsbIns_4(ces_7_1_io_lsbIns_4),
- .io_lsbIns_5(ces_7_1_io_lsbIns_5),
- .io_lsbIns_6(ces_7_1_io_lsbIns_6),
- .io_lsbIns_7(ces_7_1_io_lsbIns_7),
- .io_lsbOuts_0(ces_7_1_io_lsbOuts_0),
- .io_lsbOuts_1(ces_7_1_io_lsbOuts_1),
- .io_lsbOuts_2(ces_7_1_io_lsbOuts_2),
- .io_lsbOuts_3(ces_7_1_io_lsbOuts_3),
- .io_lsbOuts_4(ces_7_1_io_lsbOuts_4),
- .io_lsbOuts_5(ces_7_1_io_lsbOuts_5),
- .io_lsbOuts_6(ces_7_1_io_lsbOuts_6),
- .io_lsbOuts_7(ces_7_1_io_lsbOuts_7)
- );
- Element ces_7_2 (
- .clock(ces_7_2_clock),
- .io_ins_down(ces_7_2_io_ins_down),
- .io_ins_right(ces_7_2_io_ins_right),
- .io_ins_up(ces_7_2_io_ins_up),
- .io_ins_left(ces_7_2_io_ins_left),
- .io_outs_down(ces_7_2_io_outs_down),
- .io_outs_right(ces_7_2_io_outs_right),
- .io_outs_up(ces_7_2_io_outs_up),
- .io_outs_left(ces_7_2_io_outs_left),
- .io_lsbIns_1(ces_7_2_io_lsbIns_1),
- .io_lsbIns_2(ces_7_2_io_lsbIns_2),
- .io_lsbIns_3(ces_7_2_io_lsbIns_3),
- .io_lsbIns_4(ces_7_2_io_lsbIns_4),
- .io_lsbIns_5(ces_7_2_io_lsbIns_5),
- .io_lsbIns_6(ces_7_2_io_lsbIns_6),
- .io_lsbIns_7(ces_7_2_io_lsbIns_7),
- .io_lsbOuts_0(ces_7_2_io_lsbOuts_0),
- .io_lsbOuts_1(ces_7_2_io_lsbOuts_1),
- .io_lsbOuts_2(ces_7_2_io_lsbOuts_2),
- .io_lsbOuts_3(ces_7_2_io_lsbOuts_3),
- .io_lsbOuts_4(ces_7_2_io_lsbOuts_4),
- .io_lsbOuts_5(ces_7_2_io_lsbOuts_5),
- .io_lsbOuts_6(ces_7_2_io_lsbOuts_6),
- .io_lsbOuts_7(ces_7_2_io_lsbOuts_7)
- );
- Element ces_7_3 (
- .clock(ces_7_3_clock),
- .io_ins_down(ces_7_3_io_ins_down),
- .io_ins_right(ces_7_3_io_ins_right),
- .io_ins_up(ces_7_3_io_ins_up),
- .io_ins_left(ces_7_3_io_ins_left),
- .io_outs_down(ces_7_3_io_outs_down),
- .io_outs_right(ces_7_3_io_outs_right),
- .io_outs_up(ces_7_3_io_outs_up),
- .io_outs_left(ces_7_3_io_outs_left),
- .io_lsbIns_1(ces_7_3_io_lsbIns_1),
- .io_lsbIns_2(ces_7_3_io_lsbIns_2),
- .io_lsbIns_3(ces_7_3_io_lsbIns_3),
- .io_lsbIns_4(ces_7_3_io_lsbIns_4),
- .io_lsbIns_5(ces_7_3_io_lsbIns_5),
- .io_lsbIns_6(ces_7_3_io_lsbIns_6),
- .io_lsbIns_7(ces_7_3_io_lsbIns_7),
- .io_lsbOuts_0(ces_7_3_io_lsbOuts_0),
- .io_lsbOuts_1(ces_7_3_io_lsbOuts_1),
- .io_lsbOuts_2(ces_7_3_io_lsbOuts_2),
- .io_lsbOuts_3(ces_7_3_io_lsbOuts_3),
- .io_lsbOuts_4(ces_7_3_io_lsbOuts_4),
- .io_lsbOuts_5(ces_7_3_io_lsbOuts_5),
- .io_lsbOuts_6(ces_7_3_io_lsbOuts_6),
- .io_lsbOuts_7(ces_7_3_io_lsbOuts_7)
- );
- Element ces_7_4 (
- .clock(ces_7_4_clock),
- .io_ins_down(ces_7_4_io_ins_down),
- .io_ins_right(ces_7_4_io_ins_right),
- .io_ins_up(ces_7_4_io_ins_up),
- .io_ins_left(ces_7_4_io_ins_left),
- .io_outs_down(ces_7_4_io_outs_down),
- .io_outs_right(ces_7_4_io_outs_right),
- .io_outs_up(ces_7_4_io_outs_up),
- .io_outs_left(ces_7_4_io_outs_left),
- .io_lsbIns_1(ces_7_4_io_lsbIns_1),
- .io_lsbIns_2(ces_7_4_io_lsbIns_2),
- .io_lsbIns_3(ces_7_4_io_lsbIns_3),
- .io_lsbIns_4(ces_7_4_io_lsbIns_4),
- .io_lsbIns_5(ces_7_4_io_lsbIns_5),
- .io_lsbIns_6(ces_7_4_io_lsbIns_6),
- .io_lsbIns_7(ces_7_4_io_lsbIns_7),
- .io_lsbOuts_0(ces_7_4_io_lsbOuts_0),
- .io_lsbOuts_1(ces_7_4_io_lsbOuts_1),
- .io_lsbOuts_2(ces_7_4_io_lsbOuts_2),
- .io_lsbOuts_3(ces_7_4_io_lsbOuts_3),
- .io_lsbOuts_4(ces_7_4_io_lsbOuts_4),
- .io_lsbOuts_5(ces_7_4_io_lsbOuts_5),
- .io_lsbOuts_6(ces_7_4_io_lsbOuts_6),
- .io_lsbOuts_7(ces_7_4_io_lsbOuts_7)
- );
- Element ces_7_5 (
- .clock(ces_7_5_clock),
- .io_ins_down(ces_7_5_io_ins_down),
- .io_ins_right(ces_7_5_io_ins_right),
- .io_ins_up(ces_7_5_io_ins_up),
- .io_ins_left(ces_7_5_io_ins_left),
- .io_outs_down(ces_7_5_io_outs_down),
- .io_outs_right(ces_7_5_io_outs_right),
- .io_outs_up(ces_7_5_io_outs_up),
- .io_outs_left(ces_7_5_io_outs_left),
- .io_lsbIns_1(ces_7_5_io_lsbIns_1),
- .io_lsbIns_2(ces_7_5_io_lsbIns_2),
- .io_lsbIns_3(ces_7_5_io_lsbIns_3),
- .io_lsbIns_4(ces_7_5_io_lsbIns_4),
- .io_lsbIns_5(ces_7_5_io_lsbIns_5),
- .io_lsbIns_6(ces_7_5_io_lsbIns_6),
- .io_lsbIns_7(ces_7_5_io_lsbIns_7),
- .io_lsbOuts_0(ces_7_5_io_lsbOuts_0),
- .io_lsbOuts_1(ces_7_5_io_lsbOuts_1),
- .io_lsbOuts_2(ces_7_5_io_lsbOuts_2),
- .io_lsbOuts_3(ces_7_5_io_lsbOuts_3),
- .io_lsbOuts_4(ces_7_5_io_lsbOuts_4),
- .io_lsbOuts_5(ces_7_5_io_lsbOuts_5),
- .io_lsbOuts_6(ces_7_5_io_lsbOuts_6),
- .io_lsbOuts_7(ces_7_5_io_lsbOuts_7)
- );
- Element ces_7_6 (
- .clock(ces_7_6_clock),
- .io_ins_down(ces_7_6_io_ins_down),
- .io_ins_right(ces_7_6_io_ins_right),
- .io_ins_up(ces_7_6_io_ins_up),
- .io_ins_left(ces_7_6_io_ins_left),
- .io_outs_down(ces_7_6_io_outs_down),
- .io_outs_right(ces_7_6_io_outs_right),
- .io_outs_up(ces_7_6_io_outs_up),
- .io_outs_left(ces_7_6_io_outs_left),
- .io_lsbIns_1(ces_7_6_io_lsbIns_1),
- .io_lsbIns_2(ces_7_6_io_lsbIns_2),
- .io_lsbIns_3(ces_7_6_io_lsbIns_3),
- .io_lsbIns_4(ces_7_6_io_lsbIns_4),
- .io_lsbIns_5(ces_7_6_io_lsbIns_5),
- .io_lsbIns_6(ces_7_6_io_lsbIns_6),
- .io_lsbIns_7(ces_7_6_io_lsbIns_7),
- .io_lsbOuts_0(ces_7_6_io_lsbOuts_0),
- .io_lsbOuts_1(ces_7_6_io_lsbOuts_1),
- .io_lsbOuts_2(ces_7_6_io_lsbOuts_2),
- .io_lsbOuts_3(ces_7_6_io_lsbOuts_3),
- .io_lsbOuts_4(ces_7_6_io_lsbOuts_4),
- .io_lsbOuts_5(ces_7_6_io_lsbOuts_5),
- .io_lsbOuts_6(ces_7_6_io_lsbOuts_6),
- .io_lsbOuts_7(ces_7_6_io_lsbOuts_7)
- );
- Element ces_7_7 (
- .clock(ces_7_7_clock),
- .io_ins_down(ces_7_7_io_ins_down),
- .io_ins_right(ces_7_7_io_ins_right),
- .io_ins_up(ces_7_7_io_ins_up),
- .io_ins_left(ces_7_7_io_ins_left),
- .io_outs_down(ces_7_7_io_outs_down),
- .io_outs_right(ces_7_7_io_outs_right),
- .io_outs_up(ces_7_7_io_outs_up),
- .io_outs_left(ces_7_7_io_outs_left),
- .io_lsbIns_1(ces_7_7_io_lsbIns_1),
- .io_lsbIns_2(ces_7_7_io_lsbIns_2),
- .io_lsbIns_3(ces_7_7_io_lsbIns_3),
- .io_lsbIns_4(ces_7_7_io_lsbIns_4),
- .io_lsbIns_5(ces_7_7_io_lsbIns_5),
- .io_lsbIns_6(ces_7_7_io_lsbIns_6),
- .io_lsbIns_7(ces_7_7_io_lsbIns_7),
- .io_lsbOuts_0(ces_7_7_io_lsbOuts_0),
- .io_lsbOuts_1(ces_7_7_io_lsbOuts_1),
- .io_lsbOuts_2(ces_7_7_io_lsbOuts_2),
- .io_lsbOuts_3(ces_7_7_io_lsbOuts_3),
- .io_lsbOuts_4(ces_7_7_io_lsbOuts_4),
- .io_lsbOuts_5(ces_7_7_io_lsbOuts_5),
- .io_lsbOuts_6(ces_7_7_io_lsbOuts_6),
- .io_lsbOuts_7(ces_7_7_io_lsbOuts_7)
- );
- assign io_outs_down_0 = ces_0_0_io_outs_down;
- assign io_outs_down_1 = ces_0_1_io_outs_down;
- assign io_outs_down_2 = ces_0_2_io_outs_down;
- assign io_outs_down_3 = ces_0_3_io_outs_down;
- assign io_outs_down_4 = ces_0_4_io_outs_down;
- assign io_outs_down_5 = ces_0_5_io_outs_down;
- assign io_outs_down_6 = ces_0_6_io_outs_down;
- assign io_outs_down_7 = ces_0_7_io_outs_down;
- assign io_outs_up_0 = ces_7_0_io_outs_up;
- assign io_outs_up_1 = ces_7_1_io_outs_up;
- assign io_outs_up_2 = ces_7_2_io_outs_up;
- assign io_outs_up_3 = ces_7_3_io_outs_up;
- assign io_outs_up_4 = ces_7_4_io_outs_up;
- assign io_outs_up_5 = ces_7_5_io_outs_up;
- assign io_outs_up_6 = ces_7_6_io_outs_up;
- assign io_outs_up_7 = ces_7_7_io_outs_up;
- assign io_outs_right_0 = ces_0_7_io_outs_right;
- assign io_outs_right_1 = ces_1_7_io_outs_right;
- assign io_outs_right_2 = ces_2_7_io_outs_right;
- assign io_outs_right_3 = ces_3_7_io_outs_right;
- assign io_outs_right_4 = ces_4_7_io_outs_right;
- assign io_outs_right_5 = ces_5_7_io_outs_right;
- assign io_outs_right_6 = ces_6_7_io_outs_right;
- assign io_outs_right_7 = ces_7_7_io_outs_right;
- assign io_outs_left_0 = ces_0_0_io_outs_left;
- assign io_outs_left_1 = ces_1_0_io_outs_left;
- assign io_outs_left_2 = ces_2_0_io_outs_left;
- assign io_outs_left_3 = ces_3_0_io_outs_left;
- assign io_outs_left_4 = ces_4_0_io_outs_left;
- assign io_outs_left_5 = ces_5_0_io_outs_left;
- assign io_outs_left_6 = ces_6_0_io_outs_left;
- assign io_outs_left_7 = ces_7_0_io_outs_left;
- assign io_lsbs_0 = REG_0;
- assign io_lsbs_1 = REG_1;
- assign io_lsbs_2 = REG_2;
- assign io_lsbs_3 = REG_3;
- assign io_lsbs_4 = REG_4;
- assign io_lsbs_5 = REG_5;
- assign io_lsbs_6 = REG_6;
- assign io_lsbs_7 = REG_7;
- assign io_lsbs_8 = REG_8;
- assign io_lsbs_9 = REG_9;
- assign io_lsbs_10 = REG_10;
- assign io_lsbs_11 = REG_11;
- assign io_lsbs_12 = REG_12;
- assign io_lsbs_13 = REG_13;
- assign io_lsbs_14 = REG_14;
- assign io_lsbs_15 = REG_15;
- assign io_lsbs_16 = REG_16;
- assign io_lsbs_17 = REG_17;
- assign io_lsbs_18 = REG_18;
- assign io_lsbs_19 = REG_19;
- assign io_lsbs_20 = REG_20;
- assign io_lsbs_21 = REG_21;
- assign io_lsbs_22 = REG_22;
- assign io_lsbs_23 = REG_23;
- assign io_lsbs_24 = REG_24;
- assign io_lsbs_25 = REG_25;
- assign io_lsbs_26 = REG_26;
- assign io_lsbs_27 = REG_27;
- assign io_lsbs_28 = REG_28;
- assign io_lsbs_29 = REG_29;
- assign io_lsbs_30 = REG_30;
- assign io_lsbs_31 = REG_31;
- assign io_lsbs_32 = REG_32;
- assign io_lsbs_33 = REG_33;
- assign io_lsbs_34 = REG_34;
- assign io_lsbs_35 = REG_35;
- assign io_lsbs_36 = REG_36;
- assign io_lsbs_37 = REG_37;
- assign io_lsbs_38 = REG_38;
- assign io_lsbs_39 = REG_39;
- assign io_lsbs_40 = REG_40;
- assign io_lsbs_41 = REG_41;
- assign io_lsbs_42 = REG_42;
- assign io_lsbs_43 = REG_43;
- assign io_lsbs_44 = REG_44;
- assign io_lsbs_45 = REG_45;
- assign io_lsbs_46 = REG_46;
- assign io_lsbs_47 = REG_47;
- assign io_lsbs_48 = REG_48;
- assign io_lsbs_49 = REG_49;
- assign io_lsbs_50 = REG_50;
- assign io_lsbs_51 = REG_51;
- assign io_lsbs_52 = REG_52;
- assign io_lsbs_53 = REG_53;
- assign io_lsbs_54 = REG_54;
- assign io_lsbs_55 = REG_55;
- assign io_lsbs_56 = REG_56;
- assign io_lsbs_57 = REG_57;
- assign io_lsbs_58 = REG_58;
- assign io_lsbs_59 = REG_59;
- assign io_lsbs_60 = REG_60;
- assign io_lsbs_61 = REG_61;
- assign io_lsbs_62 = REG_62;
- assign io_lsbs_63 = REG_63;
- assign ces_0_0_clock = clock;
- assign ces_0_0_io_ins_down = ces_1_0_io_outs_down;
- assign ces_0_0_io_ins_right = io_ins_right_0;
- assign ces_0_0_io_ins_up = io_ins_up_0;
- assign ces_0_0_io_ins_left = ces_0_1_io_outs_left;
- assign ces_0_0_io_lsbIns_1 = 1'h0;
- assign ces_0_0_io_lsbIns_2 = 1'h0;
- assign ces_0_0_io_lsbIns_3 = 1'h0;
- assign ces_0_0_io_lsbIns_4 = 1'h0;
- assign ces_0_0_io_lsbIns_5 = 1'h0;
- assign ces_0_0_io_lsbIns_6 = 1'h0;
- assign ces_0_0_io_lsbIns_7 = 1'h0;
- assign ces_0_1_clock = clock;
- assign ces_0_1_io_ins_down = ces_1_1_io_outs_down;
- assign ces_0_1_io_ins_right = ces_0_0_io_outs_right;
- assign ces_0_1_io_ins_up = io_ins_up_1;
- assign ces_0_1_io_ins_left = ces_0_2_io_outs_left;
- assign ces_0_1_io_lsbIns_1 = ces_0_0_io_lsbOuts_1;
- assign ces_0_1_io_lsbIns_2 = ces_0_0_io_lsbOuts_2;
- assign ces_0_1_io_lsbIns_3 = ces_0_0_io_lsbOuts_3;
- assign ces_0_1_io_lsbIns_4 = ces_0_0_io_lsbOuts_4;
- assign ces_0_1_io_lsbIns_5 = ces_0_0_io_lsbOuts_5;
- assign ces_0_1_io_lsbIns_6 = ces_0_0_io_lsbOuts_6;
- assign ces_0_1_io_lsbIns_7 = ces_0_0_io_lsbOuts_7;
- assign ces_0_2_clock = clock;
- assign ces_0_2_io_ins_down = ces_1_2_io_outs_down;
- assign ces_0_2_io_ins_right = ces_0_1_io_outs_right;
- assign ces_0_2_io_ins_up = io_ins_up_2;
- assign ces_0_2_io_ins_left = ces_0_3_io_outs_left;
- assign ces_0_2_io_lsbIns_1 = ces_0_1_io_lsbOuts_1;
- assign ces_0_2_io_lsbIns_2 = ces_0_1_io_lsbOuts_2;
- assign ces_0_2_io_lsbIns_3 = ces_0_1_io_lsbOuts_3;
- assign ces_0_2_io_lsbIns_4 = ces_0_1_io_lsbOuts_4;
- assign ces_0_2_io_lsbIns_5 = ces_0_1_io_lsbOuts_5;
- assign ces_0_2_io_lsbIns_6 = ces_0_1_io_lsbOuts_6;
- assign ces_0_2_io_lsbIns_7 = ces_0_1_io_lsbOuts_7;
- assign ces_0_3_clock = clock;
- assign ces_0_3_io_ins_down = ces_1_3_io_outs_down;
- assign ces_0_3_io_ins_right = ces_0_2_io_outs_right;
- assign ces_0_3_io_ins_up = io_ins_up_3;
- assign ces_0_3_io_ins_left = ces_0_4_io_outs_left;
- assign ces_0_3_io_lsbIns_1 = ces_0_2_io_lsbOuts_1;
- assign ces_0_3_io_lsbIns_2 = ces_0_2_io_lsbOuts_2;
- assign ces_0_3_io_lsbIns_3 = ces_0_2_io_lsbOuts_3;
- assign ces_0_3_io_lsbIns_4 = ces_0_2_io_lsbOuts_4;
- assign ces_0_3_io_lsbIns_5 = ces_0_2_io_lsbOuts_5;
- assign ces_0_3_io_lsbIns_6 = ces_0_2_io_lsbOuts_6;
- assign ces_0_3_io_lsbIns_7 = ces_0_2_io_lsbOuts_7;
- assign ces_0_4_clock = clock;
- assign ces_0_4_io_ins_down = ces_1_4_io_outs_down;
- assign ces_0_4_io_ins_right = ces_0_3_io_outs_right;
- assign ces_0_4_io_ins_up = io_ins_up_4;
- assign ces_0_4_io_ins_left = ces_0_5_io_outs_left;
- assign ces_0_4_io_lsbIns_1 = ces_0_3_io_lsbOuts_1;
- assign ces_0_4_io_lsbIns_2 = ces_0_3_io_lsbOuts_2;
- assign ces_0_4_io_lsbIns_3 = ces_0_3_io_lsbOuts_3;
- assign ces_0_4_io_lsbIns_4 = ces_0_3_io_lsbOuts_4;
- assign ces_0_4_io_lsbIns_5 = ces_0_3_io_lsbOuts_5;
- assign ces_0_4_io_lsbIns_6 = ces_0_3_io_lsbOuts_6;
- assign ces_0_4_io_lsbIns_7 = ces_0_3_io_lsbOuts_7;
- assign ces_0_5_clock = clock;
- assign ces_0_5_io_ins_down = ces_1_5_io_outs_down;
- assign ces_0_5_io_ins_right = ces_0_4_io_outs_right;
- assign ces_0_5_io_ins_up = io_ins_up_5;
- assign ces_0_5_io_ins_left = ces_0_6_io_outs_left;
- assign ces_0_5_io_lsbIns_1 = ces_0_4_io_lsbOuts_1;
- assign ces_0_5_io_lsbIns_2 = ces_0_4_io_lsbOuts_2;
- assign ces_0_5_io_lsbIns_3 = ces_0_4_io_lsbOuts_3;
- assign ces_0_5_io_lsbIns_4 = ces_0_4_io_lsbOuts_4;
- assign ces_0_5_io_lsbIns_5 = ces_0_4_io_lsbOuts_5;
- assign ces_0_5_io_lsbIns_6 = ces_0_4_io_lsbOuts_6;
- assign ces_0_5_io_lsbIns_7 = ces_0_4_io_lsbOuts_7;
- assign ces_0_6_clock = clock;
- assign ces_0_6_io_ins_down = ces_1_6_io_outs_down;
- assign ces_0_6_io_ins_right = ces_0_5_io_outs_right;
- assign ces_0_6_io_ins_up = io_ins_up_6;
- assign ces_0_6_io_ins_left = ces_0_7_io_outs_left;
- assign ces_0_6_io_lsbIns_1 = ces_0_5_io_lsbOuts_1;
- assign ces_0_6_io_lsbIns_2 = ces_0_5_io_lsbOuts_2;
- assign ces_0_6_io_lsbIns_3 = ces_0_5_io_lsbOuts_3;
- assign ces_0_6_io_lsbIns_4 = ces_0_5_io_lsbOuts_4;
- assign ces_0_6_io_lsbIns_5 = ces_0_5_io_lsbOuts_5;
- assign ces_0_6_io_lsbIns_6 = ces_0_5_io_lsbOuts_6;
- assign ces_0_6_io_lsbIns_7 = ces_0_5_io_lsbOuts_7;
- assign ces_0_7_clock = clock;
- assign ces_0_7_io_ins_down = ces_1_7_io_outs_down;
- assign ces_0_7_io_ins_right = ces_0_6_io_outs_right;
- assign ces_0_7_io_ins_up = io_ins_up_7;
- assign ces_0_7_io_ins_left = io_ins_left_0;
- assign ces_0_7_io_lsbIns_1 = ces_0_6_io_lsbOuts_1;
- assign ces_0_7_io_lsbIns_2 = ces_0_6_io_lsbOuts_2;
- assign ces_0_7_io_lsbIns_3 = ces_0_6_io_lsbOuts_3;
- assign ces_0_7_io_lsbIns_4 = ces_0_6_io_lsbOuts_4;
- assign ces_0_7_io_lsbIns_5 = ces_0_6_io_lsbOuts_5;
- assign ces_0_7_io_lsbIns_6 = ces_0_6_io_lsbOuts_6;
- assign ces_0_7_io_lsbIns_7 = ces_0_6_io_lsbOuts_7;
- assign ces_1_0_clock = clock;
- assign ces_1_0_io_ins_down = ces_2_0_io_outs_down;
- assign ces_1_0_io_ins_right = io_ins_right_1;
- assign ces_1_0_io_ins_up = ces_0_0_io_outs_up;
- assign ces_1_0_io_ins_left = ces_1_1_io_outs_left;
- assign ces_1_0_io_lsbIns_1 = 1'h0;
- assign ces_1_0_io_lsbIns_2 = 1'h0;
- assign ces_1_0_io_lsbIns_3 = 1'h0;
- assign ces_1_0_io_lsbIns_4 = 1'h0;
- assign ces_1_0_io_lsbIns_5 = 1'h0;
- assign ces_1_0_io_lsbIns_6 = 1'h0;
- assign ces_1_0_io_lsbIns_7 = 1'h0;
- assign ces_1_1_clock = clock;
- assign ces_1_1_io_ins_down = ces_2_1_io_outs_down;
- assign ces_1_1_io_ins_right = ces_1_0_io_outs_right;
- assign ces_1_1_io_ins_up = ces_0_1_io_outs_up;
- assign ces_1_1_io_ins_left = ces_1_2_io_outs_left;
- assign ces_1_1_io_lsbIns_1 = ces_1_0_io_lsbOuts_1;
- assign ces_1_1_io_lsbIns_2 = ces_1_0_io_lsbOuts_2;
- assign ces_1_1_io_lsbIns_3 = ces_1_0_io_lsbOuts_3;
- assign ces_1_1_io_lsbIns_4 = ces_1_0_io_lsbOuts_4;
- assign ces_1_1_io_lsbIns_5 = ces_1_0_io_lsbOuts_5;
- assign ces_1_1_io_lsbIns_6 = ces_1_0_io_lsbOuts_6;
- assign ces_1_1_io_lsbIns_7 = ces_1_0_io_lsbOuts_7;
- assign ces_1_2_clock = clock;
- assign ces_1_2_io_ins_down = ces_2_2_io_outs_down;
- assign ces_1_2_io_ins_right = ces_1_1_io_outs_right;
- assign ces_1_2_io_ins_up = ces_0_2_io_outs_up;
- assign ces_1_2_io_ins_left = ces_1_3_io_outs_left;
- assign ces_1_2_io_lsbIns_1 = ces_1_1_io_lsbOuts_1;
- assign ces_1_2_io_lsbIns_2 = ces_1_1_io_lsbOuts_2;
- assign ces_1_2_io_lsbIns_3 = ces_1_1_io_lsbOuts_3;
- assign ces_1_2_io_lsbIns_4 = ces_1_1_io_lsbOuts_4;
- assign ces_1_2_io_lsbIns_5 = ces_1_1_io_lsbOuts_5;
- assign ces_1_2_io_lsbIns_6 = ces_1_1_io_lsbOuts_6;
- assign ces_1_2_io_lsbIns_7 = ces_1_1_io_lsbOuts_7;
- assign ces_1_3_clock = clock;
- assign ces_1_3_io_ins_down = ces_2_3_io_outs_down;
- assign ces_1_3_io_ins_right = ces_1_2_io_outs_right;
- assign ces_1_3_io_ins_up = ces_0_3_io_outs_up;
- assign ces_1_3_io_ins_left = ces_1_4_io_outs_left;
- assign ces_1_3_io_lsbIns_1 = ces_1_2_io_lsbOuts_1;
- assign ces_1_3_io_lsbIns_2 = ces_1_2_io_lsbOuts_2;
- assign ces_1_3_io_lsbIns_3 = ces_1_2_io_lsbOuts_3;
- assign ces_1_3_io_lsbIns_4 = ces_1_2_io_lsbOuts_4;
- assign ces_1_3_io_lsbIns_5 = ces_1_2_io_lsbOuts_5;
- assign ces_1_3_io_lsbIns_6 = ces_1_2_io_lsbOuts_6;
- assign ces_1_3_io_lsbIns_7 = ces_1_2_io_lsbOuts_7;
- assign ces_1_4_clock = clock;
- assign ces_1_4_io_ins_down = ces_2_4_io_outs_down;
- assign ces_1_4_io_ins_right = ces_1_3_io_outs_right;
- assign ces_1_4_io_ins_up = ces_0_4_io_outs_up;
- assign ces_1_4_io_ins_left = ces_1_5_io_outs_left;
- assign ces_1_4_io_lsbIns_1 = ces_1_3_io_lsbOuts_1;
- assign ces_1_4_io_lsbIns_2 = ces_1_3_io_lsbOuts_2;
- assign ces_1_4_io_lsbIns_3 = ces_1_3_io_lsbOuts_3;
- assign ces_1_4_io_lsbIns_4 = ces_1_3_io_lsbOuts_4;
- assign ces_1_4_io_lsbIns_5 = ces_1_3_io_lsbOuts_5;
- assign ces_1_4_io_lsbIns_6 = ces_1_3_io_lsbOuts_6;
- assign ces_1_4_io_lsbIns_7 = ces_1_3_io_lsbOuts_7;
- assign ces_1_5_clock = clock;
- assign ces_1_5_io_ins_down = ces_2_5_io_outs_down;
- assign ces_1_5_io_ins_right = ces_1_4_io_outs_right;
- assign ces_1_5_io_ins_up = ces_0_5_io_outs_up;
- assign ces_1_5_io_ins_left = ces_1_6_io_outs_left;
- assign ces_1_5_io_lsbIns_1 = ces_1_4_io_lsbOuts_1;
- assign ces_1_5_io_lsbIns_2 = ces_1_4_io_lsbOuts_2;
- assign ces_1_5_io_lsbIns_3 = ces_1_4_io_lsbOuts_3;
- assign ces_1_5_io_lsbIns_4 = ces_1_4_io_lsbOuts_4;
- assign ces_1_5_io_lsbIns_5 = ces_1_4_io_lsbOuts_5;
- assign ces_1_5_io_lsbIns_6 = ces_1_4_io_lsbOuts_6;
- assign ces_1_5_io_lsbIns_7 = ces_1_4_io_lsbOuts_7;
- assign ces_1_6_clock = clock;
- assign ces_1_6_io_ins_down = ces_2_6_io_outs_down;
- assign ces_1_6_io_ins_right = ces_1_5_io_outs_right;
- assign ces_1_6_io_ins_up = ces_0_6_io_outs_up;
- assign ces_1_6_io_ins_left = ces_1_7_io_outs_left;
- assign ces_1_6_io_lsbIns_1 = ces_1_5_io_lsbOuts_1;
- assign ces_1_6_io_lsbIns_2 = ces_1_5_io_lsbOuts_2;
- assign ces_1_6_io_lsbIns_3 = ces_1_5_io_lsbOuts_3;
- assign ces_1_6_io_lsbIns_4 = ces_1_5_io_lsbOuts_4;
- assign ces_1_6_io_lsbIns_5 = ces_1_5_io_lsbOuts_5;
- assign ces_1_6_io_lsbIns_6 = ces_1_5_io_lsbOuts_6;
- assign ces_1_6_io_lsbIns_7 = ces_1_5_io_lsbOuts_7;
- assign ces_1_7_clock = clock;
- assign ces_1_7_io_ins_down = ces_2_7_io_outs_down;
- assign ces_1_7_io_ins_right = ces_1_6_io_outs_right;
- assign ces_1_7_io_ins_up = ces_0_7_io_outs_up;
- assign ces_1_7_io_ins_left = io_ins_left_1;
- assign ces_1_7_io_lsbIns_1 = ces_1_6_io_lsbOuts_1;
- assign ces_1_7_io_lsbIns_2 = ces_1_6_io_lsbOuts_2;
- assign ces_1_7_io_lsbIns_3 = ces_1_6_io_lsbOuts_3;
- assign ces_1_7_io_lsbIns_4 = ces_1_6_io_lsbOuts_4;
- assign ces_1_7_io_lsbIns_5 = ces_1_6_io_lsbOuts_5;
- assign ces_1_7_io_lsbIns_6 = ces_1_6_io_lsbOuts_6;
- assign ces_1_7_io_lsbIns_7 = ces_1_6_io_lsbOuts_7;
- assign ces_2_0_clock = clock;
- assign ces_2_0_io_ins_down = ces_3_0_io_outs_down;
- assign ces_2_0_io_ins_right = io_ins_right_2;
- assign ces_2_0_io_ins_up = ces_1_0_io_outs_up;
- assign ces_2_0_io_ins_left = ces_2_1_io_outs_left;
- assign ces_2_0_io_lsbIns_1 = 1'h0;
- assign ces_2_0_io_lsbIns_2 = 1'h0;
- assign ces_2_0_io_lsbIns_3 = 1'h0;
- assign ces_2_0_io_lsbIns_4 = 1'h0;
- assign ces_2_0_io_lsbIns_5 = 1'h0;
- assign ces_2_0_io_lsbIns_6 = 1'h0;
- assign ces_2_0_io_lsbIns_7 = 1'h0;
- assign ces_2_1_clock = clock;
- assign ces_2_1_io_ins_down = ces_3_1_io_outs_down;
- assign ces_2_1_io_ins_right = ces_2_0_io_outs_right;
- assign ces_2_1_io_ins_up = ces_1_1_io_outs_up;
- assign ces_2_1_io_ins_left = ces_2_2_io_outs_left;
- assign ces_2_1_io_lsbIns_1 = ces_2_0_io_lsbOuts_1;
- assign ces_2_1_io_lsbIns_2 = ces_2_0_io_lsbOuts_2;
- assign ces_2_1_io_lsbIns_3 = ces_2_0_io_lsbOuts_3;
- assign ces_2_1_io_lsbIns_4 = ces_2_0_io_lsbOuts_4;
- assign ces_2_1_io_lsbIns_5 = ces_2_0_io_lsbOuts_5;
- assign ces_2_1_io_lsbIns_6 = ces_2_0_io_lsbOuts_6;
- assign ces_2_1_io_lsbIns_7 = ces_2_0_io_lsbOuts_7;
- assign ces_2_2_clock = clock;
- assign ces_2_2_io_ins_down = ces_3_2_io_outs_down;
- assign ces_2_2_io_ins_right = ces_2_1_io_outs_right;
- assign ces_2_2_io_ins_up = ces_1_2_io_outs_up;
- assign ces_2_2_io_ins_left = ces_2_3_io_outs_left;
- assign ces_2_2_io_lsbIns_1 = ces_2_1_io_lsbOuts_1;
- assign ces_2_2_io_lsbIns_2 = ces_2_1_io_lsbOuts_2;
- assign ces_2_2_io_lsbIns_3 = ces_2_1_io_lsbOuts_3;
- assign ces_2_2_io_lsbIns_4 = ces_2_1_io_lsbOuts_4;
- assign ces_2_2_io_lsbIns_5 = ces_2_1_io_lsbOuts_5;
- assign ces_2_2_io_lsbIns_6 = ces_2_1_io_lsbOuts_6;
- assign ces_2_2_io_lsbIns_7 = ces_2_1_io_lsbOuts_7;
- assign ces_2_3_clock = clock;
- assign ces_2_3_io_ins_down = ces_3_3_io_outs_down;
- assign ces_2_3_io_ins_right = ces_2_2_io_outs_right;
- assign ces_2_3_io_ins_up = ces_1_3_io_outs_up;
- assign ces_2_3_io_ins_left = ces_2_4_io_outs_left;
- assign ces_2_3_io_lsbIns_1 = ces_2_2_io_lsbOuts_1;
- assign ces_2_3_io_lsbIns_2 = ces_2_2_io_lsbOuts_2;
- assign ces_2_3_io_lsbIns_3 = ces_2_2_io_lsbOuts_3;
- assign ces_2_3_io_lsbIns_4 = ces_2_2_io_lsbOuts_4;
- assign ces_2_3_io_lsbIns_5 = ces_2_2_io_lsbOuts_5;
- assign ces_2_3_io_lsbIns_6 = ces_2_2_io_lsbOuts_6;
- assign ces_2_3_io_lsbIns_7 = ces_2_2_io_lsbOuts_7;
- assign ces_2_4_clock = clock;
- assign ces_2_4_io_ins_down = ces_3_4_io_outs_down;
- assign ces_2_4_io_ins_right = ces_2_3_io_outs_right;
- assign ces_2_4_io_ins_up = ces_1_4_io_outs_up;
- assign ces_2_4_io_ins_left = ces_2_5_io_outs_left;
- assign ces_2_4_io_lsbIns_1 = ces_2_3_io_lsbOuts_1;
- assign ces_2_4_io_lsbIns_2 = ces_2_3_io_lsbOuts_2;
- assign ces_2_4_io_lsbIns_3 = ces_2_3_io_lsbOuts_3;
- assign ces_2_4_io_lsbIns_4 = ces_2_3_io_lsbOuts_4;
- assign ces_2_4_io_lsbIns_5 = ces_2_3_io_lsbOuts_5;
- assign ces_2_4_io_lsbIns_6 = ces_2_3_io_lsbOuts_6;
- assign ces_2_4_io_lsbIns_7 = ces_2_3_io_lsbOuts_7;
- assign ces_2_5_clock = clock;
- assign ces_2_5_io_ins_down = ces_3_5_io_outs_down;
- assign ces_2_5_io_ins_right = ces_2_4_io_outs_right;
- assign ces_2_5_io_ins_up = ces_1_5_io_outs_up;
- assign ces_2_5_io_ins_left = ces_2_6_io_outs_left;
- assign ces_2_5_io_lsbIns_1 = ces_2_4_io_lsbOuts_1;
- assign ces_2_5_io_lsbIns_2 = ces_2_4_io_lsbOuts_2;
- assign ces_2_5_io_lsbIns_3 = ces_2_4_io_lsbOuts_3;
- assign ces_2_5_io_lsbIns_4 = ces_2_4_io_lsbOuts_4;
- assign ces_2_5_io_lsbIns_5 = ces_2_4_io_lsbOuts_5;
- assign ces_2_5_io_lsbIns_6 = ces_2_4_io_lsbOuts_6;
- assign ces_2_5_io_lsbIns_7 = ces_2_4_io_lsbOuts_7;
- assign ces_2_6_clock = clock;
- assign ces_2_6_io_ins_down = ces_3_6_io_outs_down;
- assign ces_2_6_io_ins_right = ces_2_5_io_outs_right;
- assign ces_2_6_io_ins_up = ces_1_6_io_outs_up;
- assign ces_2_6_io_ins_left = ces_2_7_io_outs_left;
- assign ces_2_6_io_lsbIns_1 = ces_2_5_io_lsbOuts_1;
- assign ces_2_6_io_lsbIns_2 = ces_2_5_io_lsbOuts_2;
- assign ces_2_6_io_lsbIns_3 = ces_2_5_io_lsbOuts_3;
- assign ces_2_6_io_lsbIns_4 = ces_2_5_io_lsbOuts_4;
- assign ces_2_6_io_lsbIns_5 = ces_2_5_io_lsbOuts_5;
- assign ces_2_6_io_lsbIns_6 = ces_2_5_io_lsbOuts_6;
- assign ces_2_6_io_lsbIns_7 = ces_2_5_io_lsbOuts_7;
- assign ces_2_7_clock = clock;
- assign ces_2_7_io_ins_down = ces_3_7_io_outs_down;
- assign ces_2_7_io_ins_right = ces_2_6_io_outs_right;
- assign ces_2_7_io_ins_up = ces_1_7_io_outs_up;
- assign ces_2_7_io_ins_left = io_ins_left_2;
- assign ces_2_7_io_lsbIns_1 = ces_2_6_io_lsbOuts_1;
- assign ces_2_7_io_lsbIns_2 = ces_2_6_io_lsbOuts_2;
- assign ces_2_7_io_lsbIns_3 = ces_2_6_io_lsbOuts_3;
- assign ces_2_7_io_lsbIns_4 = ces_2_6_io_lsbOuts_4;
- assign ces_2_7_io_lsbIns_5 = ces_2_6_io_lsbOuts_5;
- assign ces_2_7_io_lsbIns_6 = ces_2_6_io_lsbOuts_6;
- assign ces_2_7_io_lsbIns_7 = ces_2_6_io_lsbOuts_7;
- assign ces_3_0_clock = clock;
- assign ces_3_0_io_ins_down = ces_4_0_io_outs_down;
- assign ces_3_0_io_ins_right = io_ins_right_3;
- assign ces_3_0_io_ins_up = ces_2_0_io_outs_up;
- assign ces_3_0_io_ins_left = ces_3_1_io_outs_left;
- assign ces_3_0_io_lsbIns_1 = 1'h0;
- assign ces_3_0_io_lsbIns_2 = 1'h0;
- assign ces_3_0_io_lsbIns_3 = 1'h0;
- assign ces_3_0_io_lsbIns_4 = 1'h0;
- assign ces_3_0_io_lsbIns_5 = 1'h0;
- assign ces_3_0_io_lsbIns_6 = 1'h0;
- assign ces_3_0_io_lsbIns_7 = 1'h0;
- assign ces_3_1_clock = clock;
- assign ces_3_1_io_ins_down = ces_4_1_io_outs_down;
- assign ces_3_1_io_ins_right = ces_3_0_io_outs_right;
- assign ces_3_1_io_ins_up = ces_2_1_io_outs_up;
- assign ces_3_1_io_ins_left = ces_3_2_io_outs_left;
- assign ces_3_1_io_lsbIns_1 = ces_3_0_io_lsbOuts_1;
- assign ces_3_1_io_lsbIns_2 = ces_3_0_io_lsbOuts_2;
- assign ces_3_1_io_lsbIns_3 = ces_3_0_io_lsbOuts_3;
- assign ces_3_1_io_lsbIns_4 = ces_3_0_io_lsbOuts_4;
- assign ces_3_1_io_lsbIns_5 = ces_3_0_io_lsbOuts_5;
- assign ces_3_1_io_lsbIns_6 = ces_3_0_io_lsbOuts_6;
- assign ces_3_1_io_lsbIns_7 = ces_3_0_io_lsbOuts_7;
- assign ces_3_2_clock = clock;
- assign ces_3_2_io_ins_down = ces_4_2_io_outs_down;
- assign ces_3_2_io_ins_right = ces_3_1_io_outs_right;
- assign ces_3_2_io_ins_up = ces_2_2_io_outs_up;
- assign ces_3_2_io_ins_left = ces_3_3_io_outs_left;
- assign ces_3_2_io_lsbIns_1 = ces_3_1_io_lsbOuts_1;
- assign ces_3_2_io_lsbIns_2 = ces_3_1_io_lsbOuts_2;
- assign ces_3_2_io_lsbIns_3 = ces_3_1_io_lsbOuts_3;
- assign ces_3_2_io_lsbIns_4 = ces_3_1_io_lsbOuts_4;
- assign ces_3_2_io_lsbIns_5 = ces_3_1_io_lsbOuts_5;
- assign ces_3_2_io_lsbIns_6 = ces_3_1_io_lsbOuts_6;
- assign ces_3_2_io_lsbIns_7 = ces_3_1_io_lsbOuts_7;
- assign ces_3_3_clock = clock;
- assign ces_3_3_io_ins_down = ces_4_3_io_outs_down;
- assign ces_3_3_io_ins_right = ces_3_2_io_outs_right;
- assign ces_3_3_io_ins_up = ces_2_3_io_outs_up;
- assign ces_3_3_io_ins_left = ces_3_4_io_outs_left;
- assign ces_3_3_io_lsbIns_1 = ces_3_2_io_lsbOuts_1;
- assign ces_3_3_io_lsbIns_2 = ces_3_2_io_lsbOuts_2;
- assign ces_3_3_io_lsbIns_3 = ces_3_2_io_lsbOuts_3;
- assign ces_3_3_io_lsbIns_4 = ces_3_2_io_lsbOuts_4;
- assign ces_3_3_io_lsbIns_5 = ces_3_2_io_lsbOuts_5;
- assign ces_3_3_io_lsbIns_6 = ces_3_2_io_lsbOuts_6;
- assign ces_3_3_io_lsbIns_7 = ces_3_2_io_lsbOuts_7;
- assign ces_3_4_clock = clock;
- assign ces_3_4_io_ins_down = ces_4_4_io_outs_down;
- assign ces_3_4_io_ins_right = ces_3_3_io_outs_right;
- assign ces_3_4_io_ins_up = ces_2_4_io_outs_up;
- assign ces_3_4_io_ins_left = ces_3_5_io_outs_left;
- assign ces_3_4_io_lsbIns_1 = ces_3_3_io_lsbOuts_1;
- assign ces_3_4_io_lsbIns_2 = ces_3_3_io_lsbOuts_2;
- assign ces_3_4_io_lsbIns_3 = ces_3_3_io_lsbOuts_3;
- assign ces_3_4_io_lsbIns_4 = ces_3_3_io_lsbOuts_4;
- assign ces_3_4_io_lsbIns_5 = ces_3_3_io_lsbOuts_5;
- assign ces_3_4_io_lsbIns_6 = ces_3_3_io_lsbOuts_6;
- assign ces_3_4_io_lsbIns_7 = ces_3_3_io_lsbOuts_7;
- assign ces_3_5_clock = clock;
- assign ces_3_5_io_ins_down = ces_4_5_io_outs_down;
- assign ces_3_5_io_ins_right = ces_3_4_io_outs_right;
- assign ces_3_5_io_ins_up = ces_2_5_io_outs_up;
- assign ces_3_5_io_ins_left = ces_3_6_io_outs_left;
- assign ces_3_5_io_lsbIns_1 = ces_3_4_io_lsbOuts_1;
- assign ces_3_5_io_lsbIns_2 = ces_3_4_io_lsbOuts_2;
- assign ces_3_5_io_lsbIns_3 = ces_3_4_io_lsbOuts_3;
- assign ces_3_5_io_lsbIns_4 = ces_3_4_io_lsbOuts_4;
- assign ces_3_5_io_lsbIns_5 = ces_3_4_io_lsbOuts_5;
- assign ces_3_5_io_lsbIns_6 = ces_3_4_io_lsbOuts_6;
- assign ces_3_5_io_lsbIns_7 = ces_3_4_io_lsbOuts_7;
- assign ces_3_6_clock = clock;
- assign ces_3_6_io_ins_down = ces_4_6_io_outs_down;
- assign ces_3_6_io_ins_right = ces_3_5_io_outs_right;
- assign ces_3_6_io_ins_up = ces_2_6_io_outs_up;
- assign ces_3_6_io_ins_left = ces_3_7_io_outs_left;
- assign ces_3_6_io_lsbIns_1 = ces_3_5_io_lsbOuts_1;
- assign ces_3_6_io_lsbIns_2 = ces_3_5_io_lsbOuts_2;
- assign ces_3_6_io_lsbIns_3 = ces_3_5_io_lsbOuts_3;
- assign ces_3_6_io_lsbIns_4 = ces_3_5_io_lsbOuts_4;
- assign ces_3_6_io_lsbIns_5 = ces_3_5_io_lsbOuts_5;
- assign ces_3_6_io_lsbIns_6 = ces_3_5_io_lsbOuts_6;
- assign ces_3_6_io_lsbIns_7 = ces_3_5_io_lsbOuts_7;
- assign ces_3_7_clock = clock;
- assign ces_3_7_io_ins_down = ces_4_7_io_outs_down;
- assign ces_3_7_io_ins_right = ces_3_6_io_outs_right;
- assign ces_3_7_io_ins_up = ces_2_7_io_outs_up;
- assign ces_3_7_io_ins_left = io_ins_left_3;
- assign ces_3_7_io_lsbIns_1 = ces_3_6_io_lsbOuts_1;
- assign ces_3_7_io_lsbIns_2 = ces_3_6_io_lsbOuts_2;
- assign ces_3_7_io_lsbIns_3 = ces_3_6_io_lsbOuts_3;
- assign ces_3_7_io_lsbIns_4 = ces_3_6_io_lsbOuts_4;
- assign ces_3_7_io_lsbIns_5 = ces_3_6_io_lsbOuts_5;
- assign ces_3_7_io_lsbIns_6 = ces_3_6_io_lsbOuts_6;
- assign ces_3_7_io_lsbIns_7 = ces_3_6_io_lsbOuts_7;
- assign ces_4_0_clock = clock;
- assign ces_4_0_io_ins_down = ces_5_0_io_outs_down;
- assign ces_4_0_io_ins_right = io_ins_right_4;
- assign ces_4_0_io_ins_up = ces_3_0_io_outs_up;
- assign ces_4_0_io_ins_left = ces_4_1_io_outs_left;
- assign ces_4_0_io_lsbIns_1 = 1'h0;
- assign ces_4_0_io_lsbIns_2 = 1'h0;
- assign ces_4_0_io_lsbIns_3 = 1'h0;
- assign ces_4_0_io_lsbIns_4 = 1'h0;
- assign ces_4_0_io_lsbIns_5 = 1'h0;
- assign ces_4_0_io_lsbIns_6 = 1'h0;
- assign ces_4_0_io_lsbIns_7 = 1'h0;
- assign ces_4_1_clock = clock;
- assign ces_4_1_io_ins_down = ces_5_1_io_outs_down;
- assign ces_4_1_io_ins_right = ces_4_0_io_outs_right;
- assign ces_4_1_io_ins_up = ces_3_1_io_outs_up;
- assign ces_4_1_io_ins_left = ces_4_2_io_outs_left;
- assign ces_4_1_io_lsbIns_1 = ces_4_0_io_lsbOuts_1;
- assign ces_4_1_io_lsbIns_2 = ces_4_0_io_lsbOuts_2;
- assign ces_4_1_io_lsbIns_3 = ces_4_0_io_lsbOuts_3;
- assign ces_4_1_io_lsbIns_4 = ces_4_0_io_lsbOuts_4;
- assign ces_4_1_io_lsbIns_5 = ces_4_0_io_lsbOuts_5;
- assign ces_4_1_io_lsbIns_6 = ces_4_0_io_lsbOuts_6;
- assign ces_4_1_io_lsbIns_7 = ces_4_0_io_lsbOuts_7;
- assign ces_4_2_clock = clock;
- assign ces_4_2_io_ins_down = ces_5_2_io_outs_down;
- assign ces_4_2_io_ins_right = ces_4_1_io_outs_right;
- assign ces_4_2_io_ins_up = ces_3_2_io_outs_up;
- assign ces_4_2_io_ins_left = ces_4_3_io_outs_left;
- assign ces_4_2_io_lsbIns_1 = ces_4_1_io_lsbOuts_1;
- assign ces_4_2_io_lsbIns_2 = ces_4_1_io_lsbOuts_2;
- assign ces_4_2_io_lsbIns_3 = ces_4_1_io_lsbOuts_3;
- assign ces_4_2_io_lsbIns_4 = ces_4_1_io_lsbOuts_4;
- assign ces_4_2_io_lsbIns_5 = ces_4_1_io_lsbOuts_5;
- assign ces_4_2_io_lsbIns_6 = ces_4_1_io_lsbOuts_6;
- assign ces_4_2_io_lsbIns_7 = ces_4_1_io_lsbOuts_7;
- assign ces_4_3_clock = clock;
- assign ces_4_3_io_ins_down = ces_5_3_io_outs_down;
- assign ces_4_3_io_ins_right = ces_4_2_io_outs_right;
- assign ces_4_3_io_ins_up = ces_3_3_io_outs_up;
- assign ces_4_3_io_ins_left = ces_4_4_io_outs_left;
- assign ces_4_3_io_lsbIns_1 = ces_4_2_io_lsbOuts_1;
- assign ces_4_3_io_lsbIns_2 = ces_4_2_io_lsbOuts_2;
- assign ces_4_3_io_lsbIns_3 = ces_4_2_io_lsbOuts_3;
- assign ces_4_3_io_lsbIns_4 = ces_4_2_io_lsbOuts_4;
- assign ces_4_3_io_lsbIns_5 = ces_4_2_io_lsbOuts_5;
- assign ces_4_3_io_lsbIns_6 = ces_4_2_io_lsbOuts_6;
- assign ces_4_3_io_lsbIns_7 = ces_4_2_io_lsbOuts_7;
- assign ces_4_4_clock = clock;
- assign ces_4_4_io_ins_down = ces_5_4_io_outs_down;
- assign ces_4_4_io_ins_right = ces_4_3_io_outs_right;
- assign ces_4_4_io_ins_up = ces_3_4_io_outs_up;
- assign ces_4_4_io_ins_left = ces_4_5_io_outs_left;
- assign ces_4_4_io_lsbIns_1 = ces_4_3_io_lsbOuts_1;
- assign ces_4_4_io_lsbIns_2 = ces_4_3_io_lsbOuts_2;
- assign ces_4_4_io_lsbIns_3 = ces_4_3_io_lsbOuts_3;
- assign ces_4_4_io_lsbIns_4 = ces_4_3_io_lsbOuts_4;
- assign ces_4_4_io_lsbIns_5 = ces_4_3_io_lsbOuts_5;
- assign ces_4_4_io_lsbIns_6 = ces_4_3_io_lsbOuts_6;
- assign ces_4_4_io_lsbIns_7 = ces_4_3_io_lsbOuts_7;
- assign ces_4_5_clock = clock;
- assign ces_4_5_io_ins_down = ces_5_5_io_outs_down;
- assign ces_4_5_io_ins_right = ces_4_4_io_outs_right;
- assign ces_4_5_io_ins_up = ces_3_5_io_outs_up;
- assign ces_4_5_io_ins_left = ces_4_6_io_outs_left;
- assign ces_4_5_io_lsbIns_1 = ces_4_4_io_lsbOuts_1;
- assign ces_4_5_io_lsbIns_2 = ces_4_4_io_lsbOuts_2;
- assign ces_4_5_io_lsbIns_3 = ces_4_4_io_lsbOuts_3;
- assign ces_4_5_io_lsbIns_4 = ces_4_4_io_lsbOuts_4;
- assign ces_4_5_io_lsbIns_5 = ces_4_4_io_lsbOuts_5;
- assign ces_4_5_io_lsbIns_6 = ces_4_4_io_lsbOuts_6;
- assign ces_4_5_io_lsbIns_7 = ces_4_4_io_lsbOuts_7;
- assign ces_4_6_clock = clock;
- assign ces_4_6_io_ins_down = ces_5_6_io_outs_down;
- assign ces_4_6_io_ins_right = ces_4_5_io_outs_right;
- assign ces_4_6_io_ins_up = ces_3_6_io_outs_up;
- assign ces_4_6_io_ins_left = ces_4_7_io_outs_left;
- assign ces_4_6_io_lsbIns_1 = ces_4_5_io_lsbOuts_1;
- assign ces_4_6_io_lsbIns_2 = ces_4_5_io_lsbOuts_2;
- assign ces_4_6_io_lsbIns_3 = ces_4_5_io_lsbOuts_3;
- assign ces_4_6_io_lsbIns_4 = ces_4_5_io_lsbOuts_4;
- assign ces_4_6_io_lsbIns_5 = ces_4_5_io_lsbOuts_5;
- assign ces_4_6_io_lsbIns_6 = ces_4_5_io_lsbOuts_6;
- assign ces_4_6_io_lsbIns_7 = ces_4_5_io_lsbOuts_7;
- assign ces_4_7_clock = clock;
- assign ces_4_7_io_ins_down = ces_5_7_io_outs_down;
- assign ces_4_7_io_ins_right = ces_4_6_io_outs_right;
- assign ces_4_7_io_ins_up = ces_3_7_io_outs_up;
- assign ces_4_7_io_ins_left = io_ins_left_4;
- assign ces_4_7_io_lsbIns_1 = ces_4_6_io_lsbOuts_1;
- assign ces_4_7_io_lsbIns_2 = ces_4_6_io_lsbOuts_2;
- assign ces_4_7_io_lsbIns_3 = ces_4_6_io_lsbOuts_3;
- assign ces_4_7_io_lsbIns_4 = ces_4_6_io_lsbOuts_4;
- assign ces_4_7_io_lsbIns_5 = ces_4_6_io_lsbOuts_5;
- assign ces_4_7_io_lsbIns_6 = ces_4_6_io_lsbOuts_6;
- assign ces_4_7_io_lsbIns_7 = ces_4_6_io_lsbOuts_7;
- assign ces_5_0_clock = clock;
- assign ces_5_0_io_ins_down = ces_6_0_io_outs_down;
- assign ces_5_0_io_ins_right = io_ins_right_5;
- assign ces_5_0_io_ins_up = ces_4_0_io_outs_up;
- assign ces_5_0_io_ins_left = ces_5_1_io_outs_left;
- assign ces_5_0_io_lsbIns_1 = 1'h0;
- assign ces_5_0_io_lsbIns_2 = 1'h0;
- assign ces_5_0_io_lsbIns_3 = 1'h0;
- assign ces_5_0_io_lsbIns_4 = 1'h0;
- assign ces_5_0_io_lsbIns_5 = 1'h0;
- assign ces_5_0_io_lsbIns_6 = 1'h0;
- assign ces_5_0_io_lsbIns_7 = 1'h0;
- assign ces_5_1_clock = clock;
- assign ces_5_1_io_ins_down = ces_6_1_io_outs_down;
- assign ces_5_1_io_ins_right = ces_5_0_io_outs_right;
- assign ces_5_1_io_ins_up = ces_4_1_io_outs_up;
- assign ces_5_1_io_ins_left = ces_5_2_io_outs_left;
- assign ces_5_1_io_lsbIns_1 = ces_5_0_io_lsbOuts_1;
- assign ces_5_1_io_lsbIns_2 = ces_5_0_io_lsbOuts_2;
- assign ces_5_1_io_lsbIns_3 = ces_5_0_io_lsbOuts_3;
- assign ces_5_1_io_lsbIns_4 = ces_5_0_io_lsbOuts_4;
- assign ces_5_1_io_lsbIns_5 = ces_5_0_io_lsbOuts_5;
- assign ces_5_1_io_lsbIns_6 = ces_5_0_io_lsbOuts_6;
- assign ces_5_1_io_lsbIns_7 = ces_5_0_io_lsbOuts_7;
- assign ces_5_2_clock = clock;
- assign ces_5_2_io_ins_down = ces_6_2_io_outs_down;
- assign ces_5_2_io_ins_right = ces_5_1_io_outs_right;
- assign ces_5_2_io_ins_up = ces_4_2_io_outs_up;
- assign ces_5_2_io_ins_left = ces_5_3_io_outs_left;
- assign ces_5_2_io_lsbIns_1 = ces_5_1_io_lsbOuts_1;
- assign ces_5_2_io_lsbIns_2 = ces_5_1_io_lsbOuts_2;
- assign ces_5_2_io_lsbIns_3 = ces_5_1_io_lsbOuts_3;
- assign ces_5_2_io_lsbIns_4 = ces_5_1_io_lsbOuts_4;
- assign ces_5_2_io_lsbIns_5 = ces_5_1_io_lsbOuts_5;
- assign ces_5_2_io_lsbIns_6 = ces_5_1_io_lsbOuts_6;
- assign ces_5_2_io_lsbIns_7 = ces_5_1_io_lsbOuts_7;
- assign ces_5_3_clock = clock;
- assign ces_5_3_io_ins_down = ces_6_3_io_outs_down;
- assign ces_5_3_io_ins_right = ces_5_2_io_outs_right;
- assign ces_5_3_io_ins_up = ces_4_3_io_outs_up;
- assign ces_5_3_io_ins_left = ces_5_4_io_outs_left;
- assign ces_5_3_io_lsbIns_1 = ces_5_2_io_lsbOuts_1;
- assign ces_5_3_io_lsbIns_2 = ces_5_2_io_lsbOuts_2;
- assign ces_5_3_io_lsbIns_3 = ces_5_2_io_lsbOuts_3;
- assign ces_5_3_io_lsbIns_4 = ces_5_2_io_lsbOuts_4;
- assign ces_5_3_io_lsbIns_5 = ces_5_2_io_lsbOuts_5;
- assign ces_5_3_io_lsbIns_6 = ces_5_2_io_lsbOuts_6;
- assign ces_5_3_io_lsbIns_7 = ces_5_2_io_lsbOuts_7;
- assign ces_5_4_clock = clock;
- assign ces_5_4_io_ins_down = ces_6_4_io_outs_down;
- assign ces_5_4_io_ins_right = ces_5_3_io_outs_right;
- assign ces_5_4_io_ins_up = ces_4_4_io_outs_up;
- assign ces_5_4_io_ins_left = ces_5_5_io_outs_left;
- assign ces_5_4_io_lsbIns_1 = ces_5_3_io_lsbOuts_1;
- assign ces_5_4_io_lsbIns_2 = ces_5_3_io_lsbOuts_2;
- assign ces_5_4_io_lsbIns_3 = ces_5_3_io_lsbOuts_3;
- assign ces_5_4_io_lsbIns_4 = ces_5_3_io_lsbOuts_4;
- assign ces_5_4_io_lsbIns_5 = ces_5_3_io_lsbOuts_5;
- assign ces_5_4_io_lsbIns_6 = ces_5_3_io_lsbOuts_6;
- assign ces_5_4_io_lsbIns_7 = ces_5_3_io_lsbOuts_7;
- assign ces_5_5_clock = clock;
- assign ces_5_5_io_ins_down = ces_6_5_io_outs_down;
- assign ces_5_5_io_ins_right = ces_5_4_io_outs_right;
- assign ces_5_5_io_ins_up = ces_4_5_io_outs_up;
- assign ces_5_5_io_ins_left = ces_5_6_io_outs_left;
- assign ces_5_5_io_lsbIns_1 = ces_5_4_io_lsbOuts_1;
- assign ces_5_5_io_lsbIns_2 = ces_5_4_io_lsbOuts_2;
- assign ces_5_5_io_lsbIns_3 = ces_5_4_io_lsbOuts_3;
- assign ces_5_5_io_lsbIns_4 = ces_5_4_io_lsbOuts_4;
- assign ces_5_5_io_lsbIns_5 = ces_5_4_io_lsbOuts_5;
- assign ces_5_5_io_lsbIns_6 = ces_5_4_io_lsbOuts_6;
- assign ces_5_5_io_lsbIns_7 = ces_5_4_io_lsbOuts_7;
- assign ces_5_6_clock = clock;
- assign ces_5_6_io_ins_down = ces_6_6_io_outs_down;
- assign ces_5_6_io_ins_right = ces_5_5_io_outs_right;
- assign ces_5_6_io_ins_up = ces_4_6_io_outs_up;
- assign ces_5_6_io_ins_left = ces_5_7_io_outs_left;
- assign ces_5_6_io_lsbIns_1 = ces_5_5_io_lsbOuts_1;
- assign ces_5_6_io_lsbIns_2 = ces_5_5_io_lsbOuts_2;
- assign ces_5_6_io_lsbIns_3 = ces_5_5_io_lsbOuts_3;
- assign ces_5_6_io_lsbIns_4 = ces_5_5_io_lsbOuts_4;
- assign ces_5_6_io_lsbIns_5 = ces_5_5_io_lsbOuts_5;
- assign ces_5_6_io_lsbIns_6 = ces_5_5_io_lsbOuts_6;
- assign ces_5_6_io_lsbIns_7 = ces_5_5_io_lsbOuts_7;
- assign ces_5_7_clock = clock;
- assign ces_5_7_io_ins_down = ces_6_7_io_outs_down;
- assign ces_5_7_io_ins_right = ces_5_6_io_outs_right;
- assign ces_5_7_io_ins_up = ces_4_7_io_outs_up;
- assign ces_5_7_io_ins_left = io_ins_left_5;
- assign ces_5_7_io_lsbIns_1 = ces_5_6_io_lsbOuts_1;
- assign ces_5_7_io_lsbIns_2 = ces_5_6_io_lsbOuts_2;
- assign ces_5_7_io_lsbIns_3 = ces_5_6_io_lsbOuts_3;
- assign ces_5_7_io_lsbIns_4 = ces_5_6_io_lsbOuts_4;
- assign ces_5_7_io_lsbIns_5 = ces_5_6_io_lsbOuts_5;
- assign ces_5_7_io_lsbIns_6 = ces_5_6_io_lsbOuts_6;
- assign ces_5_7_io_lsbIns_7 = ces_5_6_io_lsbOuts_7;
- assign ces_6_0_clock = clock;
- assign ces_6_0_io_ins_down = ces_7_0_io_outs_down;
- assign ces_6_0_io_ins_right = io_ins_right_6;
- assign ces_6_0_io_ins_up = ces_5_0_io_outs_up;
- assign ces_6_0_io_ins_left = ces_6_1_io_outs_left;
- assign ces_6_0_io_lsbIns_1 = 1'h0;
- assign ces_6_0_io_lsbIns_2 = 1'h0;
- assign ces_6_0_io_lsbIns_3 = 1'h0;
- assign ces_6_0_io_lsbIns_4 = 1'h0;
- assign ces_6_0_io_lsbIns_5 = 1'h0;
- assign ces_6_0_io_lsbIns_6 = 1'h0;
- assign ces_6_0_io_lsbIns_7 = 1'h0;
- assign ces_6_1_clock = clock;
- assign ces_6_1_io_ins_down = ces_7_1_io_outs_down;
- assign ces_6_1_io_ins_right = ces_6_0_io_outs_right;
- assign ces_6_1_io_ins_up = ces_5_1_io_outs_up;
- assign ces_6_1_io_ins_left = ces_6_2_io_outs_left;
- assign ces_6_1_io_lsbIns_1 = ces_6_0_io_lsbOuts_1;
- assign ces_6_1_io_lsbIns_2 = ces_6_0_io_lsbOuts_2;
- assign ces_6_1_io_lsbIns_3 = ces_6_0_io_lsbOuts_3;
- assign ces_6_1_io_lsbIns_4 = ces_6_0_io_lsbOuts_4;
- assign ces_6_1_io_lsbIns_5 = ces_6_0_io_lsbOuts_5;
- assign ces_6_1_io_lsbIns_6 = ces_6_0_io_lsbOuts_6;
- assign ces_6_1_io_lsbIns_7 = ces_6_0_io_lsbOuts_7;
- assign ces_6_2_clock = clock;
- assign ces_6_2_io_ins_down = ces_7_2_io_outs_down;
- assign ces_6_2_io_ins_right = ces_6_1_io_outs_right;
- assign ces_6_2_io_ins_up = ces_5_2_io_outs_up;
- assign ces_6_2_io_ins_left = ces_6_3_io_outs_left;
- assign ces_6_2_io_lsbIns_1 = ces_6_1_io_lsbOuts_1;
- assign ces_6_2_io_lsbIns_2 = ces_6_1_io_lsbOuts_2;
- assign ces_6_2_io_lsbIns_3 = ces_6_1_io_lsbOuts_3;
- assign ces_6_2_io_lsbIns_4 = ces_6_1_io_lsbOuts_4;
- assign ces_6_2_io_lsbIns_5 = ces_6_1_io_lsbOuts_5;
- assign ces_6_2_io_lsbIns_6 = ces_6_1_io_lsbOuts_6;
- assign ces_6_2_io_lsbIns_7 = ces_6_1_io_lsbOuts_7;
- assign ces_6_3_clock = clock;
- assign ces_6_3_io_ins_down = ces_7_3_io_outs_down;
- assign ces_6_3_io_ins_right = ces_6_2_io_outs_right;
- assign ces_6_3_io_ins_up = ces_5_3_io_outs_up;
- assign ces_6_3_io_ins_left = ces_6_4_io_outs_left;
- assign ces_6_3_io_lsbIns_1 = ces_6_2_io_lsbOuts_1;
- assign ces_6_3_io_lsbIns_2 = ces_6_2_io_lsbOuts_2;
- assign ces_6_3_io_lsbIns_3 = ces_6_2_io_lsbOuts_3;
- assign ces_6_3_io_lsbIns_4 = ces_6_2_io_lsbOuts_4;
- assign ces_6_3_io_lsbIns_5 = ces_6_2_io_lsbOuts_5;
- assign ces_6_3_io_lsbIns_6 = ces_6_2_io_lsbOuts_6;
- assign ces_6_3_io_lsbIns_7 = ces_6_2_io_lsbOuts_7;
- assign ces_6_4_clock = clock;
- assign ces_6_4_io_ins_down = ces_7_4_io_outs_down;
- assign ces_6_4_io_ins_right = ces_6_3_io_outs_right;
- assign ces_6_4_io_ins_up = ces_5_4_io_outs_up;
- assign ces_6_4_io_ins_left = ces_6_5_io_outs_left;
- assign ces_6_4_io_lsbIns_1 = ces_6_3_io_lsbOuts_1;
- assign ces_6_4_io_lsbIns_2 = ces_6_3_io_lsbOuts_2;
- assign ces_6_4_io_lsbIns_3 = ces_6_3_io_lsbOuts_3;
- assign ces_6_4_io_lsbIns_4 = ces_6_3_io_lsbOuts_4;
- assign ces_6_4_io_lsbIns_5 = ces_6_3_io_lsbOuts_5;
- assign ces_6_4_io_lsbIns_6 = ces_6_3_io_lsbOuts_6;
- assign ces_6_4_io_lsbIns_7 = ces_6_3_io_lsbOuts_7;
- assign ces_6_5_clock = clock;
- assign ces_6_5_io_ins_down = ces_7_5_io_outs_down;
- assign ces_6_5_io_ins_right = ces_6_4_io_outs_right;
- assign ces_6_5_io_ins_up = ces_5_5_io_outs_up;
- assign ces_6_5_io_ins_left = ces_6_6_io_outs_left;
- assign ces_6_5_io_lsbIns_1 = ces_6_4_io_lsbOuts_1;
- assign ces_6_5_io_lsbIns_2 = ces_6_4_io_lsbOuts_2;
- assign ces_6_5_io_lsbIns_3 = ces_6_4_io_lsbOuts_3;
- assign ces_6_5_io_lsbIns_4 = ces_6_4_io_lsbOuts_4;
- assign ces_6_5_io_lsbIns_5 = ces_6_4_io_lsbOuts_5;
- assign ces_6_5_io_lsbIns_6 = ces_6_4_io_lsbOuts_6;
- assign ces_6_5_io_lsbIns_7 = ces_6_4_io_lsbOuts_7;
- assign ces_6_6_clock = clock;
- assign ces_6_6_io_ins_down = ces_7_6_io_outs_down;
- assign ces_6_6_io_ins_right = ces_6_5_io_outs_right;
- assign ces_6_6_io_ins_up = ces_5_6_io_outs_up;
- assign ces_6_6_io_ins_left = ces_6_7_io_outs_left;
- assign ces_6_6_io_lsbIns_1 = ces_6_5_io_lsbOuts_1;
- assign ces_6_6_io_lsbIns_2 = ces_6_5_io_lsbOuts_2;
- assign ces_6_6_io_lsbIns_3 = ces_6_5_io_lsbOuts_3;
- assign ces_6_6_io_lsbIns_4 = ces_6_5_io_lsbOuts_4;
- assign ces_6_6_io_lsbIns_5 = ces_6_5_io_lsbOuts_5;
- assign ces_6_6_io_lsbIns_6 = ces_6_5_io_lsbOuts_6;
- assign ces_6_6_io_lsbIns_7 = ces_6_5_io_lsbOuts_7;
- assign ces_6_7_clock = clock;
- assign ces_6_7_io_ins_down = ces_7_7_io_outs_down;
- assign ces_6_7_io_ins_right = ces_6_6_io_outs_right;
- assign ces_6_7_io_ins_up = ces_5_7_io_outs_up;
- assign ces_6_7_io_ins_left = io_ins_left_6;
- assign ces_6_7_io_lsbIns_1 = ces_6_6_io_lsbOuts_1;
- assign ces_6_7_io_lsbIns_2 = ces_6_6_io_lsbOuts_2;
- assign ces_6_7_io_lsbIns_3 = ces_6_6_io_lsbOuts_3;
- assign ces_6_7_io_lsbIns_4 = ces_6_6_io_lsbOuts_4;
- assign ces_6_7_io_lsbIns_5 = ces_6_6_io_lsbOuts_5;
- assign ces_6_7_io_lsbIns_6 = ces_6_6_io_lsbOuts_6;
- assign ces_6_7_io_lsbIns_7 = ces_6_6_io_lsbOuts_7;
- assign ces_7_0_clock = clock;
- assign ces_7_0_io_ins_down = io_ins_down_0;
- assign ces_7_0_io_ins_right = io_ins_right_7;
- assign ces_7_0_io_ins_up = ces_6_0_io_outs_up;
- assign ces_7_0_io_ins_left = ces_7_1_io_outs_left;
- assign ces_7_0_io_lsbIns_1 = 1'h0;
- assign ces_7_0_io_lsbIns_2 = 1'h0;
- assign ces_7_0_io_lsbIns_3 = 1'h0;
- assign ces_7_0_io_lsbIns_4 = 1'h0;
- assign ces_7_0_io_lsbIns_5 = 1'h0;
- assign ces_7_0_io_lsbIns_6 = 1'h0;
- assign ces_7_0_io_lsbIns_7 = 1'h0;
- assign ces_7_1_clock = clock;
- assign ces_7_1_io_ins_down = io_ins_down_1;
- assign ces_7_1_io_ins_right = ces_7_0_io_outs_right;
- assign ces_7_1_io_ins_up = ces_6_1_io_outs_up;
- assign ces_7_1_io_ins_left = ces_7_2_io_outs_left;
- assign ces_7_1_io_lsbIns_1 = ces_7_0_io_lsbOuts_1;
- assign ces_7_1_io_lsbIns_2 = ces_7_0_io_lsbOuts_2;
- assign ces_7_1_io_lsbIns_3 = ces_7_0_io_lsbOuts_3;
- assign ces_7_1_io_lsbIns_4 = ces_7_0_io_lsbOuts_4;
- assign ces_7_1_io_lsbIns_5 = ces_7_0_io_lsbOuts_5;
- assign ces_7_1_io_lsbIns_6 = ces_7_0_io_lsbOuts_6;
- assign ces_7_1_io_lsbIns_7 = ces_7_0_io_lsbOuts_7;
- assign ces_7_2_clock = clock;
- assign ces_7_2_io_ins_down = io_ins_down_2;
- assign ces_7_2_io_ins_right = ces_7_1_io_outs_right;
- assign ces_7_2_io_ins_up = ces_6_2_io_outs_up;
- assign ces_7_2_io_ins_left = ces_7_3_io_outs_left;
- assign ces_7_2_io_lsbIns_1 = ces_7_1_io_lsbOuts_1;
- assign ces_7_2_io_lsbIns_2 = ces_7_1_io_lsbOuts_2;
- assign ces_7_2_io_lsbIns_3 = ces_7_1_io_lsbOuts_3;
- assign ces_7_2_io_lsbIns_4 = ces_7_1_io_lsbOuts_4;
- assign ces_7_2_io_lsbIns_5 = ces_7_1_io_lsbOuts_5;
- assign ces_7_2_io_lsbIns_6 = ces_7_1_io_lsbOuts_6;
- assign ces_7_2_io_lsbIns_7 = ces_7_1_io_lsbOuts_7;
- assign ces_7_3_clock = clock;
- assign ces_7_3_io_ins_down = io_ins_down_3;
- assign ces_7_3_io_ins_right = ces_7_2_io_outs_right;
- assign ces_7_3_io_ins_up = ces_6_3_io_outs_up;
- assign ces_7_3_io_ins_left = ces_7_4_io_outs_left;
- assign ces_7_3_io_lsbIns_1 = ces_7_2_io_lsbOuts_1;
- assign ces_7_3_io_lsbIns_2 = ces_7_2_io_lsbOuts_2;
- assign ces_7_3_io_lsbIns_3 = ces_7_2_io_lsbOuts_3;
- assign ces_7_3_io_lsbIns_4 = ces_7_2_io_lsbOuts_4;
- assign ces_7_3_io_lsbIns_5 = ces_7_2_io_lsbOuts_5;
- assign ces_7_3_io_lsbIns_6 = ces_7_2_io_lsbOuts_6;
- assign ces_7_3_io_lsbIns_7 = ces_7_2_io_lsbOuts_7;
- assign ces_7_4_clock = clock;
- assign ces_7_4_io_ins_down = io_ins_down_4;
- assign ces_7_4_io_ins_right = ces_7_3_io_outs_right;
- assign ces_7_4_io_ins_up = ces_6_4_io_outs_up;
- assign ces_7_4_io_ins_left = ces_7_5_io_outs_left;
- assign ces_7_4_io_lsbIns_1 = ces_7_3_io_lsbOuts_1;
- assign ces_7_4_io_lsbIns_2 = ces_7_3_io_lsbOuts_2;
- assign ces_7_4_io_lsbIns_3 = ces_7_3_io_lsbOuts_3;
- assign ces_7_4_io_lsbIns_4 = ces_7_3_io_lsbOuts_4;
- assign ces_7_4_io_lsbIns_5 = ces_7_3_io_lsbOuts_5;
- assign ces_7_4_io_lsbIns_6 = ces_7_3_io_lsbOuts_6;
- assign ces_7_4_io_lsbIns_7 = ces_7_3_io_lsbOuts_7;
- assign ces_7_5_clock = clock;
- assign ces_7_5_io_ins_down = io_ins_down_5;
- assign ces_7_5_io_ins_right = ces_7_4_io_outs_right;
- assign ces_7_5_io_ins_up = ces_6_5_io_outs_up;
- assign ces_7_5_io_ins_left = ces_7_6_io_outs_left;
- assign ces_7_5_io_lsbIns_1 = ces_7_4_io_lsbOuts_1;
- assign ces_7_5_io_lsbIns_2 = ces_7_4_io_lsbOuts_2;
- assign ces_7_5_io_lsbIns_3 = ces_7_4_io_lsbOuts_3;
- assign ces_7_5_io_lsbIns_4 = ces_7_4_io_lsbOuts_4;
- assign ces_7_5_io_lsbIns_5 = ces_7_4_io_lsbOuts_5;
- assign ces_7_5_io_lsbIns_6 = ces_7_4_io_lsbOuts_6;
- assign ces_7_5_io_lsbIns_7 = ces_7_4_io_lsbOuts_7;
- assign ces_7_6_clock = clock;
- assign ces_7_6_io_ins_down = io_ins_down_6;
- assign ces_7_6_io_ins_right = ces_7_5_io_outs_right;
- assign ces_7_6_io_ins_up = ces_6_6_io_outs_up;
- assign ces_7_6_io_ins_left = ces_7_7_io_outs_left;
- assign ces_7_6_io_lsbIns_1 = ces_7_5_io_lsbOuts_1;
- assign ces_7_6_io_lsbIns_2 = ces_7_5_io_lsbOuts_2;
- assign ces_7_6_io_lsbIns_3 = ces_7_5_io_lsbOuts_3;
- assign ces_7_6_io_lsbIns_4 = ces_7_5_io_lsbOuts_4;
- assign ces_7_6_io_lsbIns_5 = ces_7_5_io_lsbOuts_5;
- assign ces_7_6_io_lsbIns_6 = ces_7_5_io_lsbOuts_6;
- assign ces_7_6_io_lsbIns_7 = ces_7_5_io_lsbOuts_7;
- assign ces_7_7_clock = clock;
- assign ces_7_7_io_ins_down = io_ins_down_7;
- assign ces_7_7_io_ins_right = ces_7_6_io_outs_right;
- assign ces_7_7_io_ins_up = ces_6_7_io_outs_up;
- assign ces_7_7_io_ins_left = io_ins_left_7;
- assign ces_7_7_io_lsbIns_1 = ces_7_6_io_lsbOuts_1;
- assign ces_7_7_io_lsbIns_2 = ces_7_6_io_lsbOuts_2;
- assign ces_7_7_io_lsbIns_3 = ces_7_6_io_lsbOuts_3;
- assign ces_7_7_io_lsbIns_4 = ces_7_6_io_lsbOuts_4;
- assign ces_7_7_io_lsbIns_5 = ces_7_6_io_lsbOuts_5;
- assign ces_7_7_io_lsbIns_6 = ces_7_6_io_lsbOuts_6;
- assign ces_7_7_io_lsbIns_7 = ces_7_6_io_lsbOuts_7;
- always @(posedge clock) begin
- REG_0 <= ces_0_7_io_lsbOuts_0;
- REG_1 <= ces_0_7_io_lsbOuts_1;
- REG_2 <= ces_0_7_io_lsbOuts_2;
- REG_3 <= ces_0_7_io_lsbOuts_3;
- REG_4 <= ces_0_7_io_lsbOuts_4;
- REG_5 <= ces_0_7_io_lsbOuts_5;
- REG_6 <= ces_0_7_io_lsbOuts_6;
- REG_7 <= ces_0_7_io_lsbOuts_7;
- REG_8 <= ces_1_7_io_lsbOuts_0;
- REG_9 <= ces_1_7_io_lsbOuts_1;
- REG_10 <= ces_1_7_io_lsbOuts_2;
- REG_11 <= ces_1_7_io_lsbOuts_3;
- REG_12 <= ces_1_7_io_lsbOuts_4;
- REG_13 <= ces_1_7_io_lsbOuts_5;
- REG_14 <= ces_1_7_io_lsbOuts_6;
- REG_15 <= ces_1_7_io_lsbOuts_7;
- REG_16 <= ces_2_7_io_lsbOuts_0;
- REG_17 <= ces_2_7_io_lsbOuts_1;
- REG_18 <= ces_2_7_io_lsbOuts_2;
- REG_19 <= ces_2_7_io_lsbOuts_3;
- REG_20 <= ces_2_7_io_lsbOuts_4;
- REG_21 <= ces_2_7_io_lsbOuts_5;
- REG_22 <= ces_2_7_io_lsbOuts_6;
- REG_23 <= ces_2_7_io_lsbOuts_7;
- REG_24 <= ces_3_7_io_lsbOuts_0;
- REG_25 <= ces_3_7_io_lsbOuts_1;
- REG_26 <= ces_3_7_io_lsbOuts_2;
- REG_27 <= ces_3_7_io_lsbOuts_3;
- REG_28 <= ces_3_7_io_lsbOuts_4;
- REG_29 <= ces_3_7_io_lsbOuts_5;
- REG_30 <= ces_3_7_io_lsbOuts_6;
- REG_31 <= ces_3_7_io_lsbOuts_7;
- REG_32 <= ces_4_7_io_lsbOuts_0;
- REG_33 <= ces_4_7_io_lsbOuts_1;
- REG_34 <= ces_4_7_io_lsbOuts_2;
- REG_35 <= ces_4_7_io_lsbOuts_3;
- REG_36 <= ces_4_7_io_lsbOuts_4;
- REG_37 <= ces_4_7_io_lsbOuts_5;
- REG_38 <= ces_4_7_io_lsbOuts_6;
- REG_39 <= ces_4_7_io_lsbOuts_7;
- REG_40 <= ces_5_7_io_lsbOuts_0;
- REG_41 <= ces_5_7_io_lsbOuts_1;
- REG_42 <= ces_5_7_io_lsbOuts_2;
- REG_43 <= ces_5_7_io_lsbOuts_3;
- REG_44 <= ces_5_7_io_lsbOuts_4;
- REG_45 <= ces_5_7_io_lsbOuts_5;
- REG_46 <= ces_5_7_io_lsbOuts_6;
- REG_47 <= ces_5_7_io_lsbOuts_7;
- REG_48 <= ces_6_7_io_lsbOuts_0;
- REG_49 <= ces_6_7_io_lsbOuts_1;
- REG_50 <= ces_6_7_io_lsbOuts_2;
- REG_51 <= ces_6_7_io_lsbOuts_3;
- REG_52 <= ces_6_7_io_lsbOuts_4;
- REG_53 <= ces_6_7_io_lsbOuts_5;
- REG_54 <= ces_6_7_io_lsbOuts_6;
- REG_55 <= ces_6_7_io_lsbOuts_7;
- REG_56 <= ces_7_7_io_lsbOuts_0;
- REG_57 <= ces_7_7_io_lsbOuts_1;
- REG_58 <= ces_7_7_io_lsbOuts_2;
- REG_59 <= ces_7_7_io_lsbOuts_3;
- REG_60 <= ces_7_7_io_lsbOuts_4;
- REG_61 <= ces_7_7_io_lsbOuts_5;
- REG_62 <= ces_7_7_io_lsbOuts_6;
- REG_63 <= ces_7_7_io_lsbOuts_7;
- end
-endmodule
diff --git a/flow/designs/src/mock-array/build.sbt b/flow/designs/src/mock-array/build.sbt
deleted file mode 100644
index 0c01e6f731..0000000000
--- a/flow/designs/src/mock-array/build.sbt
+++ /dev/null
@@ -1,29 +0,0 @@
-import java.nio.file.Paths
-import scala.io.Source
-
-organization := "edu.berkeley.cs"
-
-scalaVersion := "2.13.11"
-
-scalacOptions ++= Seq("-deprecation", "-feature", "-unchecked", "-language:reflectiveCalls")
-
-val defaultVersions = Map(
- "chisel3" -> "3.6.1",
- "chiseltest" -> "0.6.2"
-)
-
-libraryDependencies ++= (Seq("chisel3", "chiseltest").map { dep: String =>
- "edu.berkeley.cs" %% dep % sys.props
- .getOrElse(dep + "Version", defaultVersions(dep)) withSources () withJavadoc ()
-})
-
-addCompilerPlugin("edu.berkeley.cs" % "chisel3-plugin" % "3.6.1" cross CrossVersion.full)
-
-libraryDependencies += "com.github.scopt" %% "scopt" % "4.0.0"
-
-resolvers ++= Seq(
- Resolver.sonatypeRepo("snapshots"),
- Resolver.sonatypeRepo("releases")
-)
-
-resourceDirectory in Compile := baseDirectory.value / "src/main/resources"
diff --git a/flow/designs/src/mock-array/multiplier.v b/flow/designs/src/mock-array/multiplier.v
deleted file mode 100644
index 03c2f06e14..0000000000
--- a/flow/designs/src/mock-array/multiplier.v
+++ /dev/null
@@ -1,24740 +0,0 @@
-/* Generated by Amaranth Yosys 0.40 (PyPI ver 0.40.0.0.post102, git sha1 a1bb0255d) */
-
-module multiplier(b, clk, rst, o, a);
- wire \$1 ;
- wire \$10 ;
- wire \$100 ;
- wire \$101 ;
- wire \$102 ;
- wire \$103 ;
- wire \$104 ;
- wire \$105 ;
- wire \$106 ;
- wire \$107 ;
- wire \$108 ;
- wire \$109 ;
- wire \$11 ;
- wire \$110 ;
- wire \$111 ;
- wire \$112 ;
- wire \$113 ;
- wire \$114 ;
- wire \$115 ;
- wire \$116 ;
- wire \$117 ;
- wire \$12 ;
- wire \$13 ;
- wire \$14 ;
- wire \$15 ;
- wire \$16 ;
- wire \$17 ;
- wire \$18 ;
- wire \$19 ;
- wire \$2 ;
- wire \$20 ;
- wire \$21 ;
- wire \$22 ;
- wire \$23 ;
- wire \$24 ;
- wire \$25 ;
- wire \$26 ;
- wire \$27 ;
- wire \$28 ;
- wire \$29 ;
- wire \$3 ;
- wire \$30 ;
- wire \$31 ;
- wire \$32 ;
- wire \$33 ;
- wire \$34 ;
- wire \$35 ;
- wire \$36 ;
- wire \$37 ;
- wire \$38 ;
- wire \$39 ;
- wire \$4 ;
- wire \$40 ;
- wire \$41 ;
- wire \$42 ;
- wire \$43 ;
- wire \$44 ;
- wire \$45 ;
- wire \$46 ;
- wire \$47 ;
- wire \$48 ;
- wire \$49 ;
- wire \$5 ;
- wire \$50 ;
- wire \$51 ;
- wire \$52 ;
- wire \$53 ;
- wire \$54 ;
- wire \$55 ;
- wire \$56 ;
- wire \$57 ;
- wire \$58 ;
- wire \$59 ;
- wire \$6 ;
- wire \$60 ;
- wire \$61 ;
- wire \$62 ;
- wire \$63 ;
- wire \$64 ;
- wire \$65 ;
- wire \$66 ;
- wire \$67 ;
- wire \$68 ;
- wire \$69 ;
- wire \$7 ;
- wire \$70 ;
- wire \$71 ;
- wire \$72 ;
- wire \$73 ;
- wire \$74 ;
- wire \$75 ;
- wire \$76 ;
- wire \$77 ;
- wire \$78 ;
- wire \$79 ;
- wire \$8 ;
- wire \$80 ;
- wire \$81 ;
- wire \$82 ;
- wire \$83 ;
- wire \$84 ;
- wire \$85 ;
- wire \$86 ;
- wire \$87 ;
- wire \$88 ;
- wire \$89 ;
- wire \$9 ;
- wire \$90 ;
- wire \$91 ;
- wire \$92 ;
- wire \$93 ;
- wire \$94 ;
- wire \$95 ;
- wire \$96 ;
- wire \$97 ;
- wire \$98 ;
- wire \$99 ;
- input [31:0] a;
- wire [31:0] a;
- (* init = 64'h0000000000000000 *)
- wire [63:0] \a$1971 ;
- reg [31:0] a_registered = 32'd0;
- input [31:0] b;
- wire [31:0] b;
- (* init = 64'h0000000000000000 *)
- wire [63:0] \b$1972 ;
- reg [31:0] b_registered = 32'd0;
- wire booth_b0_m0;
- wire booth_b0_m1;
- wire booth_b0_m10;
- wire booth_b0_m11;
- wire booth_b0_m12;
- wire booth_b0_m13;
- wire booth_b0_m14;
- wire booth_b0_m15;
- wire booth_b0_m16;
- wire booth_b0_m17;
- wire booth_b0_m18;
- wire booth_b0_m19;
- wire booth_b0_m2;
- wire booth_b0_m20;
- wire booth_b0_m21;
- wire booth_b0_m22;
- wire booth_b0_m23;
- wire booth_b0_m24;
- wire booth_b0_m25;
- wire booth_b0_m26;
- wire booth_b0_m27;
- wire booth_b0_m28;
- wire booth_b0_m29;
- wire booth_b0_m3;
- wire booth_b0_m30;
- wire booth_b0_m31;
- wire booth_b0_m32;
- wire booth_b0_m4;
- wire booth_b0_m5;
- wire booth_b0_m6;
- wire booth_b0_m7;
- wire booth_b0_m8;
- wire booth_b0_m9;
- wire booth_b10_m0;
- wire booth_b10_m1;
- wire booth_b10_m10;
- wire booth_b10_m11;
- wire booth_b10_m12;
- wire booth_b10_m13;
- wire booth_b10_m14;
- wire booth_b10_m15;
- wire booth_b10_m16;
- wire booth_b10_m17;
- wire booth_b10_m18;
- wire booth_b10_m19;
- wire booth_b10_m2;
- wire booth_b10_m20;
- wire booth_b10_m21;
- wire booth_b10_m22;
- wire booth_b10_m23;
- wire booth_b10_m24;
- wire booth_b10_m25;
- wire booth_b10_m26;
- wire booth_b10_m27;
- wire booth_b10_m28;
- wire booth_b10_m29;
- wire booth_b10_m3;
- wire booth_b10_m30;
- wire booth_b10_m31;
- wire booth_b10_m32;
- wire booth_b10_m4;
- wire booth_b10_m5;
- wire booth_b10_m6;
- wire booth_b10_m7;
- wire booth_b10_m8;
- wire booth_b10_m9;
- wire booth_b12_m0;
- wire booth_b12_m1;
- wire booth_b12_m10;
- wire booth_b12_m11;
- wire booth_b12_m12;
- wire booth_b12_m13;
- wire booth_b12_m14;
- wire booth_b12_m15;
- wire booth_b12_m16;
- wire booth_b12_m17;
- wire booth_b12_m18;
- wire booth_b12_m19;
- wire booth_b12_m2;
- wire booth_b12_m20;
- wire booth_b12_m21;
- wire booth_b12_m22;
- wire booth_b12_m23;
- wire booth_b12_m24;
- wire booth_b12_m25;
- wire booth_b12_m26;
- wire booth_b12_m27;
- wire booth_b12_m28;
- wire booth_b12_m29;
- wire booth_b12_m3;
- wire booth_b12_m30;
- wire booth_b12_m31;
- wire booth_b12_m32;
- wire booth_b12_m4;
- wire booth_b12_m5;
- wire booth_b12_m6;
- wire booth_b12_m7;
- wire booth_b12_m8;
- wire booth_b12_m9;
- wire booth_b14_m0;
- wire booth_b14_m1;
- wire booth_b14_m10;
- wire booth_b14_m11;
- wire booth_b14_m12;
- wire booth_b14_m13;
- wire booth_b14_m14;
- wire booth_b14_m15;
- wire booth_b14_m16;
- wire booth_b14_m17;
- wire booth_b14_m18;
- wire booth_b14_m19;
- wire booth_b14_m2;
- wire booth_b14_m20;
- wire booth_b14_m21;
- wire booth_b14_m22;
- wire booth_b14_m23;
- wire booth_b14_m24;
- wire booth_b14_m25;
- wire booth_b14_m26;
- wire booth_b14_m27;
- wire booth_b14_m28;
- wire booth_b14_m29;
- wire booth_b14_m3;
- wire booth_b14_m30;
- wire booth_b14_m31;
- wire booth_b14_m32;
- wire booth_b14_m4;
- wire booth_b14_m5;
- wire booth_b14_m6;
- wire booth_b14_m7;
- wire booth_b14_m8;
- wire booth_b14_m9;
- wire booth_b16_m0;
- wire booth_b16_m1;
- wire booth_b16_m10;
- wire booth_b16_m11;
- wire booth_b16_m12;
- wire booth_b16_m13;
- wire booth_b16_m14;
- wire booth_b16_m15;
- wire booth_b16_m16;
- wire booth_b16_m17;
- wire booth_b16_m18;
- wire booth_b16_m19;
- wire booth_b16_m2;
- wire booth_b16_m20;
- wire booth_b16_m21;
- wire booth_b16_m22;
- wire booth_b16_m23;
- wire booth_b16_m24;
- wire booth_b16_m25;
- wire booth_b16_m26;
- wire booth_b16_m27;
- wire booth_b16_m28;
- wire booth_b16_m29;
- wire booth_b16_m3;
- wire booth_b16_m30;
- wire booth_b16_m31;
- wire booth_b16_m32;
- wire booth_b16_m4;
- wire booth_b16_m5;
- wire booth_b16_m6;
- wire booth_b16_m7;
- wire booth_b16_m8;
- wire booth_b16_m9;
- wire booth_b18_m0;
- wire booth_b18_m1;
- wire booth_b18_m10;
- wire booth_b18_m11;
- wire booth_b18_m12;
- wire booth_b18_m13;
- wire booth_b18_m14;
- wire booth_b18_m15;
- wire booth_b18_m16;
- wire booth_b18_m17;
- wire booth_b18_m18;
- wire booth_b18_m19;
- wire booth_b18_m2;
- wire booth_b18_m20;
- wire booth_b18_m21;
- wire booth_b18_m22;
- wire booth_b18_m23;
- wire booth_b18_m24;
- wire booth_b18_m25;
- wire booth_b18_m26;
- wire booth_b18_m27;
- wire booth_b18_m28;
- wire booth_b18_m29;
- wire booth_b18_m3;
- wire booth_b18_m30;
- wire booth_b18_m31;
- wire booth_b18_m32;
- wire booth_b18_m4;
- wire booth_b18_m5;
- wire booth_b18_m6;
- wire booth_b18_m7;
- wire booth_b18_m8;
- wire booth_b18_m9;
- wire booth_b20_m0;
- wire booth_b20_m1;
- wire booth_b20_m10;
- wire booth_b20_m11;
- wire booth_b20_m12;
- wire booth_b20_m13;
- wire booth_b20_m14;
- wire booth_b20_m15;
- wire booth_b20_m16;
- wire booth_b20_m17;
- wire booth_b20_m18;
- wire booth_b20_m19;
- wire booth_b20_m2;
- wire booth_b20_m20;
- wire booth_b20_m21;
- wire booth_b20_m22;
- wire booth_b20_m23;
- wire booth_b20_m24;
- wire booth_b20_m25;
- wire booth_b20_m26;
- wire booth_b20_m27;
- wire booth_b20_m28;
- wire booth_b20_m29;
- wire booth_b20_m3;
- wire booth_b20_m30;
- wire booth_b20_m31;
- wire booth_b20_m32;
- wire booth_b20_m4;
- wire booth_b20_m5;
- wire booth_b20_m6;
- wire booth_b20_m7;
- wire booth_b20_m8;
- wire booth_b20_m9;
- wire booth_b22_m0;
- wire booth_b22_m1;
- wire booth_b22_m10;
- wire booth_b22_m11;
- wire booth_b22_m12;
- wire booth_b22_m13;
- wire booth_b22_m14;
- wire booth_b22_m15;
- wire booth_b22_m16;
- wire booth_b22_m17;
- wire booth_b22_m18;
- wire booth_b22_m19;
- wire booth_b22_m2;
- wire booth_b22_m20;
- wire booth_b22_m21;
- wire booth_b22_m22;
- wire booth_b22_m23;
- wire booth_b22_m24;
- wire booth_b22_m25;
- wire booth_b22_m26;
- wire booth_b22_m27;
- wire booth_b22_m28;
- wire booth_b22_m29;
- wire booth_b22_m3;
- wire booth_b22_m30;
- wire booth_b22_m31;
- wire booth_b22_m32;
- wire booth_b22_m4;
- wire booth_b22_m5;
- wire booth_b22_m6;
- wire booth_b22_m7;
- wire booth_b22_m8;
- wire booth_b22_m9;
- wire booth_b24_m0;
- wire booth_b24_m1;
- wire booth_b24_m10;
- wire booth_b24_m11;
- wire booth_b24_m12;
- wire booth_b24_m13;
- wire booth_b24_m14;
- wire booth_b24_m15;
- wire booth_b24_m16;
- wire booth_b24_m17;
- wire booth_b24_m18;
- wire booth_b24_m19;
- wire booth_b24_m2;
- wire booth_b24_m20;
- wire booth_b24_m21;
- wire booth_b24_m22;
- wire booth_b24_m23;
- wire booth_b24_m24;
- wire booth_b24_m25;
- wire booth_b24_m26;
- wire booth_b24_m27;
- wire booth_b24_m28;
- wire booth_b24_m29;
- wire booth_b24_m3;
- wire booth_b24_m30;
- wire booth_b24_m31;
- wire booth_b24_m32;
- wire booth_b24_m4;
- wire booth_b24_m5;
- wire booth_b24_m6;
- wire booth_b24_m7;
- wire booth_b24_m8;
- wire booth_b24_m9;
- wire booth_b26_m0;
- wire booth_b26_m1;
- wire booth_b26_m10;
- wire booth_b26_m11;
- wire booth_b26_m12;
- wire booth_b26_m13;
- wire booth_b26_m14;
- wire booth_b26_m15;
- wire booth_b26_m16;
- wire booth_b26_m17;
- wire booth_b26_m18;
- wire booth_b26_m19;
- wire booth_b26_m2;
- wire booth_b26_m20;
- wire booth_b26_m21;
- wire booth_b26_m22;
- wire booth_b26_m23;
- wire booth_b26_m24;
- wire booth_b26_m25;
- wire booth_b26_m26;
- wire booth_b26_m27;
- wire booth_b26_m28;
- wire booth_b26_m29;
- wire booth_b26_m3;
- wire booth_b26_m30;
- wire booth_b26_m31;
- wire booth_b26_m32;
- wire booth_b26_m4;
- wire booth_b26_m5;
- wire booth_b26_m6;
- wire booth_b26_m7;
- wire booth_b26_m8;
- wire booth_b26_m9;
- wire booth_b28_m0;
- wire booth_b28_m1;
- wire booth_b28_m10;
- wire booth_b28_m11;
- wire booth_b28_m12;
- wire booth_b28_m13;
- wire booth_b28_m14;
- wire booth_b28_m15;
- wire booth_b28_m16;
- wire booth_b28_m17;
- wire booth_b28_m18;
- wire booth_b28_m19;
- wire booth_b28_m2;
- wire booth_b28_m20;
- wire booth_b28_m21;
- wire booth_b28_m22;
- wire booth_b28_m23;
- wire booth_b28_m24;
- wire booth_b28_m25;
- wire booth_b28_m26;
- wire booth_b28_m27;
- wire booth_b28_m28;
- wire booth_b28_m29;
- wire booth_b28_m3;
- wire booth_b28_m30;
- wire booth_b28_m31;
- wire booth_b28_m32;
- wire booth_b28_m4;
- wire booth_b28_m5;
- wire booth_b28_m6;
- wire booth_b28_m7;
- wire booth_b28_m8;
- wire booth_b28_m9;
- wire booth_b2_m0;
- wire booth_b2_m1;
- wire booth_b2_m10;
- wire booth_b2_m11;
- wire booth_b2_m12;
- wire booth_b2_m13;
- wire booth_b2_m14;
- wire booth_b2_m15;
- wire booth_b2_m16;
- wire booth_b2_m17;
- wire booth_b2_m18;
- wire booth_b2_m19;
- wire booth_b2_m2;
- wire booth_b2_m20;
- wire booth_b2_m21;
- wire booth_b2_m22;
- wire booth_b2_m23;
- wire booth_b2_m24;
- wire booth_b2_m25;
- wire booth_b2_m26;
- wire booth_b2_m27;
- wire booth_b2_m28;
- wire booth_b2_m29;
- wire booth_b2_m3;
- wire booth_b2_m30;
- wire booth_b2_m31;
- wire booth_b2_m32;
- wire booth_b2_m4;
- wire booth_b2_m5;
- wire booth_b2_m6;
- wire booth_b2_m7;
- wire booth_b2_m8;
- wire booth_b2_m9;
- wire booth_b30_m0;
- wire booth_b30_m1;
- wire booth_b30_m10;
- wire booth_b30_m11;
- wire booth_b30_m12;
- wire booth_b30_m13;
- wire booth_b30_m14;
- wire booth_b30_m15;
- wire booth_b30_m16;
- wire booth_b30_m17;
- wire booth_b30_m18;
- wire booth_b30_m19;
- wire booth_b30_m2;
- wire booth_b30_m20;
- wire booth_b30_m21;
- wire booth_b30_m22;
- wire booth_b30_m23;
- wire booth_b30_m24;
- wire booth_b30_m25;
- wire booth_b30_m26;
- wire booth_b30_m27;
- wire booth_b30_m28;
- wire booth_b30_m29;
- wire booth_b30_m3;
- wire booth_b30_m30;
- wire booth_b30_m31;
- wire booth_b30_m32;
- wire booth_b30_m4;
- wire booth_b30_m5;
- wire booth_b30_m6;
- wire booth_b30_m7;
- wire booth_b30_m8;
- wire booth_b30_m9;
- wire booth_b32_m0;
- wire booth_b32_m1;
- wire booth_b32_m10;
- wire booth_b32_m11;
- wire booth_b32_m12;
- wire booth_b32_m13;
- wire booth_b32_m14;
- wire booth_b32_m15;
- wire booth_b32_m16;
- wire booth_b32_m17;
- wire booth_b32_m18;
- wire booth_b32_m19;
- wire booth_b32_m2;
- wire booth_b32_m20;
- wire booth_b32_m21;
- wire booth_b32_m22;
- wire booth_b32_m23;
- wire booth_b32_m24;
- wire booth_b32_m25;
- wire booth_b32_m26;
- wire booth_b32_m27;
- wire booth_b32_m28;
- wire booth_b32_m29;
- wire booth_b32_m3;
- wire booth_b32_m30;
- wire booth_b32_m31;
- wire booth_b32_m32;
- wire booth_b32_m4;
- wire booth_b32_m5;
- wire booth_b32_m6;
- wire booth_b32_m7;
- wire booth_b32_m8;
- wire booth_b32_m9;
- wire booth_b4_m0;
- wire booth_b4_m1;
- wire booth_b4_m10;
- wire booth_b4_m11;
- wire booth_b4_m12;
- wire booth_b4_m13;
- wire booth_b4_m14;
- wire booth_b4_m15;
- wire booth_b4_m16;
- wire booth_b4_m17;
- wire booth_b4_m18;
- wire booth_b4_m19;
- wire booth_b4_m2;
- wire booth_b4_m20;
- wire booth_b4_m21;
- wire booth_b4_m22;
- wire booth_b4_m23;
- wire booth_b4_m24;
- wire booth_b4_m25;
- wire booth_b4_m26;
- wire booth_b4_m27;
- wire booth_b4_m28;
- wire booth_b4_m29;
- wire booth_b4_m3;
- wire booth_b4_m30;
- wire booth_b4_m31;
- wire booth_b4_m32;
- wire booth_b4_m4;
- wire booth_b4_m5;
- wire booth_b4_m6;
- wire booth_b4_m7;
- wire booth_b4_m8;
- wire booth_b4_m9;
- wire booth_b6_m0;
- wire booth_b6_m1;
- wire booth_b6_m10;
- wire booth_b6_m11;
- wire booth_b6_m12;
- wire booth_b6_m13;
- wire booth_b6_m14;
- wire booth_b6_m15;
- wire booth_b6_m16;
- wire booth_b6_m17;
- wire booth_b6_m18;
- wire booth_b6_m19;
- wire booth_b6_m2;
- wire booth_b6_m20;
- wire booth_b6_m21;
- wire booth_b6_m22;
- wire booth_b6_m23;
- wire booth_b6_m24;
- wire booth_b6_m25;
- wire booth_b6_m26;
- wire booth_b6_m27;
- wire booth_b6_m28;
- wire booth_b6_m29;
- wire booth_b6_m3;
- wire booth_b6_m30;
- wire booth_b6_m31;
- wire booth_b6_m32;
- wire booth_b6_m4;
- wire booth_b6_m5;
- wire booth_b6_m6;
- wire booth_b6_m7;
- wire booth_b6_m8;
- wire booth_b6_m9;
- wire booth_b8_m0;
- wire booth_b8_m1;
- wire booth_b8_m10;
- wire booth_b8_m11;
- wire booth_b8_m12;
- wire booth_b8_m13;
- wire booth_b8_m14;
- wire booth_b8_m15;
- wire booth_b8_m16;
- wire booth_b8_m17;
- wire booth_b8_m18;
- wire booth_b8_m19;
- wire booth_b8_m2;
- wire booth_b8_m20;
- wire booth_b8_m21;
- wire booth_b8_m22;
- wire booth_b8_m23;
- wire booth_b8_m24;
- wire booth_b8_m25;
- wire booth_b8_m26;
- wire booth_b8_m27;
- wire booth_b8_m28;
- wire booth_b8_m29;
- wire booth_b8_m3;
- wire booth_b8_m30;
- wire booth_b8_m31;
- wire booth_b8_m32;
- wire booth_b8_m4;
- wire booth_b8_m5;
- wire booth_b8_m6;
- wire booth_b8_m7;
- wire booth_b8_m8;
- wire booth_b8_m9;
- wire [2:0] booth_block0;
- wire [1:0] booth_block0_mand0;
- wire [1:0] booth_block0_mand1;
- wire [1:0] booth_block0_mand10;
- wire [1:0] booth_block0_mand11;
- wire [1:0] booth_block0_mand12;
- wire [1:0] booth_block0_mand13;
- wire [1:0] booth_block0_mand14;
- wire [1:0] booth_block0_mand15;
- wire [1:0] booth_block0_mand16;
- wire [1:0] booth_block0_mand17;
- wire [1:0] booth_block0_mand18;
- wire [1:0] booth_block0_mand19;
- wire [1:0] booth_block0_mand2;
- wire [1:0] booth_block0_mand20;
- wire [1:0] booth_block0_mand21;
- wire [1:0] booth_block0_mand22;
- wire [1:0] booth_block0_mand23;
- wire [1:0] booth_block0_mand24;
- wire [1:0] booth_block0_mand25;
- wire [1:0] booth_block0_mand26;
- wire [1:0] booth_block0_mand27;
- wire [1:0] booth_block0_mand28;
- wire [1:0] booth_block0_mand29;
- wire [1:0] booth_block0_mand3;
- wire [1:0] booth_block0_mand30;
- wire [1:0] booth_block0_mand31;
- wire [1:0] booth_block0_mand32;
- wire [1:0] booth_block0_mand4;
- wire [1:0] booth_block0_mand5;
- wire [1:0] booth_block0_mand6;
- wire [1:0] booth_block0_mand7;
- wire [1:0] booth_block0_mand8;
- wire [1:0] booth_block0_mand9;
- wire [1:0] booth_block0_sel;
- wire booth_block0_sign;
- wire [2:0] booth_block10;
- wire [1:0] booth_block10_mand0;
- wire [1:0] booth_block10_mand1;
- wire [1:0] booth_block10_mand10;
- wire [1:0] booth_block10_mand11;
- wire [1:0] booth_block10_mand12;
- wire [1:0] booth_block10_mand13;
- wire [1:0] booth_block10_mand14;
- wire [1:0] booth_block10_mand15;
- wire [1:0] booth_block10_mand16;
- wire [1:0] booth_block10_mand17;
- wire [1:0] booth_block10_mand18;
- wire [1:0] booth_block10_mand19;
- wire [1:0] booth_block10_mand2;
- wire [1:0] booth_block10_mand20;
- wire [1:0] booth_block10_mand21;
- wire [1:0] booth_block10_mand22;
- wire [1:0] booth_block10_mand23;
- wire [1:0] booth_block10_mand24;
- wire [1:0] booth_block10_mand25;
- wire [1:0] booth_block10_mand26;
- wire [1:0] booth_block10_mand27;
- wire [1:0] booth_block10_mand28;
- wire [1:0] booth_block10_mand29;
- wire [1:0] booth_block10_mand3;
- wire [1:0] booth_block10_mand30;
- wire [1:0] booth_block10_mand31;
- wire [1:0] booth_block10_mand32;
- wire [1:0] booth_block10_mand4;
- wire [1:0] booth_block10_mand5;
- wire [1:0] booth_block10_mand6;
- wire [1:0] booth_block10_mand7;
- wire [1:0] booth_block10_mand8;
- wire [1:0] booth_block10_mand9;
- wire [1:0] booth_block10_sel;
- wire booth_block10_sign;
- wire [2:0] booth_block12;
- wire [1:0] booth_block12_mand0;
- wire [1:0] booth_block12_mand1;
- wire [1:0] booth_block12_mand10;
- wire [1:0] booth_block12_mand11;
- wire [1:0] booth_block12_mand12;
- wire [1:0] booth_block12_mand13;
- wire [1:0] booth_block12_mand14;
- wire [1:0] booth_block12_mand15;
- wire [1:0] booth_block12_mand16;
- wire [1:0] booth_block12_mand17;
- wire [1:0] booth_block12_mand18;
- wire [1:0] booth_block12_mand19;
- wire [1:0] booth_block12_mand2;
- wire [1:0] booth_block12_mand20;
- wire [1:0] booth_block12_mand21;
- wire [1:0] booth_block12_mand22;
- wire [1:0] booth_block12_mand23;
- wire [1:0] booth_block12_mand24;
- wire [1:0] booth_block12_mand25;
- wire [1:0] booth_block12_mand26;
- wire [1:0] booth_block12_mand27;
- wire [1:0] booth_block12_mand28;
- wire [1:0] booth_block12_mand29;
- wire [1:0] booth_block12_mand3;
- wire [1:0] booth_block12_mand30;
- wire [1:0] booth_block12_mand31;
- wire [1:0] booth_block12_mand32;
- wire [1:0] booth_block12_mand4;
- wire [1:0] booth_block12_mand5;
- wire [1:0] booth_block12_mand6;
- wire [1:0] booth_block12_mand7;
- wire [1:0] booth_block12_mand8;
- wire [1:0] booth_block12_mand9;
- wire [1:0] booth_block12_sel;
- wire booth_block12_sign;
- wire [2:0] booth_block14;
- wire [1:0] booth_block14_mand0;
- wire [1:0] booth_block14_mand1;
- wire [1:0] booth_block14_mand10;
- wire [1:0] booth_block14_mand11;
- wire [1:0] booth_block14_mand12;
- wire [1:0] booth_block14_mand13;
- wire [1:0] booth_block14_mand14;
- wire [1:0] booth_block14_mand15;
- wire [1:0] booth_block14_mand16;
- wire [1:0] booth_block14_mand17;
- wire [1:0] booth_block14_mand18;
- wire [1:0] booth_block14_mand19;
- wire [1:0] booth_block14_mand2;
- wire [1:0] booth_block14_mand20;
- wire [1:0] booth_block14_mand21;
- wire [1:0] booth_block14_mand22;
- wire [1:0] booth_block14_mand23;
- wire [1:0] booth_block14_mand24;
- wire [1:0] booth_block14_mand25;
- wire [1:0] booth_block14_mand26;
- wire [1:0] booth_block14_mand27;
- wire [1:0] booth_block14_mand28;
- wire [1:0] booth_block14_mand29;
- wire [1:0] booth_block14_mand3;
- wire [1:0] booth_block14_mand30;
- wire [1:0] booth_block14_mand31;
- wire [1:0] booth_block14_mand32;
- wire [1:0] booth_block14_mand4;
- wire [1:0] booth_block14_mand5;
- wire [1:0] booth_block14_mand6;
- wire [1:0] booth_block14_mand7;
- wire [1:0] booth_block14_mand8;
- wire [1:0] booth_block14_mand9;
- wire [1:0] booth_block14_sel;
- wire booth_block14_sign;
- wire [2:0] booth_block16;
- wire [1:0] booth_block16_mand0;
- wire [1:0] booth_block16_mand1;
- wire [1:0] booth_block16_mand10;
- wire [1:0] booth_block16_mand11;
- wire [1:0] booth_block16_mand12;
- wire [1:0] booth_block16_mand13;
- wire [1:0] booth_block16_mand14;
- wire [1:0] booth_block16_mand15;
- wire [1:0] booth_block16_mand16;
- wire [1:0] booth_block16_mand17;
- wire [1:0] booth_block16_mand18;
- wire [1:0] booth_block16_mand19;
- wire [1:0] booth_block16_mand2;
- wire [1:0] booth_block16_mand20;
- wire [1:0] booth_block16_mand21;
- wire [1:0] booth_block16_mand22;
- wire [1:0] booth_block16_mand23;
- wire [1:0] booth_block16_mand24;
- wire [1:0] booth_block16_mand25;
- wire [1:0] booth_block16_mand26;
- wire [1:0] booth_block16_mand27;
- wire [1:0] booth_block16_mand28;
- wire [1:0] booth_block16_mand29;
- wire [1:0] booth_block16_mand3;
- wire [1:0] booth_block16_mand30;
- wire [1:0] booth_block16_mand31;
- wire [1:0] booth_block16_mand32;
- wire [1:0] booth_block16_mand4;
- wire [1:0] booth_block16_mand5;
- wire [1:0] booth_block16_mand6;
- wire [1:0] booth_block16_mand7;
- wire [1:0] booth_block16_mand8;
- wire [1:0] booth_block16_mand9;
- wire [1:0] booth_block16_sel;
- wire booth_block16_sign;
- wire [2:0] booth_block18;
- wire [1:0] booth_block18_mand0;
- wire [1:0] booth_block18_mand1;
- wire [1:0] booth_block18_mand10;
- wire [1:0] booth_block18_mand11;
- wire [1:0] booth_block18_mand12;
- wire [1:0] booth_block18_mand13;
- wire [1:0] booth_block18_mand14;
- wire [1:0] booth_block18_mand15;
- wire [1:0] booth_block18_mand16;
- wire [1:0] booth_block18_mand17;
- wire [1:0] booth_block18_mand18;
- wire [1:0] booth_block18_mand19;
- wire [1:0] booth_block18_mand2;
- wire [1:0] booth_block18_mand20;
- wire [1:0] booth_block18_mand21;
- wire [1:0] booth_block18_mand22;
- wire [1:0] booth_block18_mand23;
- wire [1:0] booth_block18_mand24;
- wire [1:0] booth_block18_mand25;
- wire [1:0] booth_block18_mand26;
- wire [1:0] booth_block18_mand27;
- wire [1:0] booth_block18_mand28;
- wire [1:0] booth_block18_mand29;
- wire [1:0] booth_block18_mand3;
- wire [1:0] booth_block18_mand30;
- wire [1:0] booth_block18_mand31;
- wire [1:0] booth_block18_mand32;
- wire [1:0] booth_block18_mand4;
- wire [1:0] booth_block18_mand5;
- wire [1:0] booth_block18_mand6;
- wire [1:0] booth_block18_mand7;
- wire [1:0] booth_block18_mand8;
- wire [1:0] booth_block18_mand9;
- wire [1:0] booth_block18_sel;
- wire booth_block18_sign;
- wire [2:0] booth_block2;
- wire [2:0] booth_block20;
- wire [1:0] booth_block20_mand0;
- wire [1:0] booth_block20_mand1;
- wire [1:0] booth_block20_mand10;
- wire [1:0] booth_block20_mand11;
- wire [1:0] booth_block20_mand12;
- wire [1:0] booth_block20_mand13;
- wire [1:0] booth_block20_mand14;
- wire [1:0] booth_block20_mand15;
- wire [1:0] booth_block20_mand16;
- wire [1:0] booth_block20_mand17;
- wire [1:0] booth_block20_mand18;
- wire [1:0] booth_block20_mand19;
- wire [1:0] booth_block20_mand2;
- wire [1:0] booth_block20_mand20;
- wire [1:0] booth_block20_mand21;
- wire [1:0] booth_block20_mand22;
- wire [1:0] booth_block20_mand23;
- wire [1:0] booth_block20_mand24;
- wire [1:0] booth_block20_mand25;
- wire [1:0] booth_block20_mand26;
- wire [1:0] booth_block20_mand27;
- wire [1:0] booth_block20_mand28;
- wire [1:0] booth_block20_mand29;
- wire [1:0] booth_block20_mand3;
- wire [1:0] booth_block20_mand30;
- wire [1:0] booth_block20_mand31;
- wire [1:0] booth_block20_mand32;
- wire [1:0] booth_block20_mand4;
- wire [1:0] booth_block20_mand5;
- wire [1:0] booth_block20_mand6;
- wire [1:0] booth_block20_mand7;
- wire [1:0] booth_block20_mand8;
- wire [1:0] booth_block20_mand9;
- wire [1:0] booth_block20_sel;
- wire booth_block20_sign;
- wire [2:0] booth_block22;
- wire [1:0] booth_block22_mand0;
- wire [1:0] booth_block22_mand1;
- wire [1:0] booth_block22_mand10;
- wire [1:0] booth_block22_mand11;
- wire [1:0] booth_block22_mand12;
- wire [1:0] booth_block22_mand13;
- wire [1:0] booth_block22_mand14;
- wire [1:0] booth_block22_mand15;
- wire [1:0] booth_block22_mand16;
- wire [1:0] booth_block22_mand17;
- wire [1:0] booth_block22_mand18;
- wire [1:0] booth_block22_mand19;
- wire [1:0] booth_block22_mand2;
- wire [1:0] booth_block22_mand20;
- wire [1:0] booth_block22_mand21;
- wire [1:0] booth_block22_mand22;
- wire [1:0] booth_block22_mand23;
- wire [1:0] booth_block22_mand24;
- wire [1:0] booth_block22_mand25;
- wire [1:0] booth_block22_mand26;
- wire [1:0] booth_block22_mand27;
- wire [1:0] booth_block22_mand28;
- wire [1:0] booth_block22_mand29;
- wire [1:0] booth_block22_mand3;
- wire [1:0] booth_block22_mand30;
- wire [1:0] booth_block22_mand31;
- wire [1:0] booth_block22_mand32;
- wire [1:0] booth_block22_mand4;
- wire [1:0] booth_block22_mand5;
- wire [1:0] booth_block22_mand6;
- wire [1:0] booth_block22_mand7;
- wire [1:0] booth_block22_mand8;
- wire [1:0] booth_block22_mand9;
- wire [1:0] booth_block22_sel;
- wire booth_block22_sign;
- wire [2:0] booth_block24;
- wire [1:0] booth_block24_mand0;
- wire [1:0] booth_block24_mand1;
- wire [1:0] booth_block24_mand10;
- wire [1:0] booth_block24_mand11;
- wire [1:0] booth_block24_mand12;
- wire [1:0] booth_block24_mand13;
- wire [1:0] booth_block24_mand14;
- wire [1:0] booth_block24_mand15;
- wire [1:0] booth_block24_mand16;
- wire [1:0] booth_block24_mand17;
- wire [1:0] booth_block24_mand18;
- wire [1:0] booth_block24_mand19;
- wire [1:0] booth_block24_mand2;
- wire [1:0] booth_block24_mand20;
- wire [1:0] booth_block24_mand21;
- wire [1:0] booth_block24_mand22;
- wire [1:0] booth_block24_mand23;
- wire [1:0] booth_block24_mand24;
- wire [1:0] booth_block24_mand25;
- wire [1:0] booth_block24_mand26;
- wire [1:0] booth_block24_mand27;
- wire [1:0] booth_block24_mand28;
- wire [1:0] booth_block24_mand29;
- wire [1:0] booth_block24_mand3;
- wire [1:0] booth_block24_mand30;
- wire [1:0] booth_block24_mand31;
- wire [1:0] booth_block24_mand32;
- wire [1:0] booth_block24_mand4;
- wire [1:0] booth_block24_mand5;
- wire [1:0] booth_block24_mand6;
- wire [1:0] booth_block24_mand7;
- wire [1:0] booth_block24_mand8;
- wire [1:0] booth_block24_mand9;
- wire [1:0] booth_block24_sel;
- wire booth_block24_sign;
- wire [2:0] booth_block26;
- wire [1:0] booth_block26_mand0;
- wire [1:0] booth_block26_mand1;
- wire [1:0] booth_block26_mand10;
- wire [1:0] booth_block26_mand11;
- wire [1:0] booth_block26_mand12;
- wire [1:0] booth_block26_mand13;
- wire [1:0] booth_block26_mand14;
- wire [1:0] booth_block26_mand15;
- wire [1:0] booth_block26_mand16;
- wire [1:0] booth_block26_mand17;
- wire [1:0] booth_block26_mand18;
- wire [1:0] booth_block26_mand19;
- wire [1:0] booth_block26_mand2;
- wire [1:0] booth_block26_mand20;
- wire [1:0] booth_block26_mand21;
- wire [1:0] booth_block26_mand22;
- wire [1:0] booth_block26_mand23;
- wire [1:0] booth_block26_mand24;
- wire [1:0] booth_block26_mand25;
- wire [1:0] booth_block26_mand26;
- wire [1:0] booth_block26_mand27;
- wire [1:0] booth_block26_mand28;
- wire [1:0] booth_block26_mand29;
- wire [1:0] booth_block26_mand3;
- wire [1:0] booth_block26_mand30;
- wire [1:0] booth_block26_mand31;
- wire [1:0] booth_block26_mand32;
- wire [1:0] booth_block26_mand4;
- wire [1:0] booth_block26_mand5;
- wire [1:0] booth_block26_mand6;
- wire [1:0] booth_block26_mand7;
- wire [1:0] booth_block26_mand8;
- wire [1:0] booth_block26_mand9;
- wire [1:0] booth_block26_sel;
- wire booth_block26_sign;
- wire [2:0] booth_block28;
- wire [1:0] booth_block28_mand0;
- wire [1:0] booth_block28_mand1;
- wire [1:0] booth_block28_mand10;
- wire [1:0] booth_block28_mand11;
- wire [1:0] booth_block28_mand12;
- wire [1:0] booth_block28_mand13;
- wire [1:0] booth_block28_mand14;
- wire [1:0] booth_block28_mand15;
- wire [1:0] booth_block28_mand16;
- wire [1:0] booth_block28_mand17;
- wire [1:0] booth_block28_mand18;
- wire [1:0] booth_block28_mand19;
- wire [1:0] booth_block28_mand2;
- wire [1:0] booth_block28_mand20;
- wire [1:0] booth_block28_mand21;
- wire [1:0] booth_block28_mand22;
- wire [1:0] booth_block28_mand23;
- wire [1:0] booth_block28_mand24;
- wire [1:0] booth_block28_mand25;
- wire [1:0] booth_block28_mand26;
- wire [1:0] booth_block28_mand27;
- wire [1:0] booth_block28_mand28;
- wire [1:0] booth_block28_mand29;
- wire [1:0] booth_block28_mand3;
- wire [1:0] booth_block28_mand30;
- wire [1:0] booth_block28_mand31;
- wire [1:0] booth_block28_mand32;
- wire [1:0] booth_block28_mand4;
- wire [1:0] booth_block28_mand5;
- wire [1:0] booth_block28_mand6;
- wire [1:0] booth_block28_mand7;
- wire [1:0] booth_block28_mand8;
- wire [1:0] booth_block28_mand9;
- wire [1:0] booth_block28_sel;
- wire booth_block28_sign;
- wire [1:0] booth_block2_mand0;
- wire [1:0] booth_block2_mand1;
- wire [1:0] booth_block2_mand10;
- wire [1:0] booth_block2_mand11;
- wire [1:0] booth_block2_mand12;
- wire [1:0] booth_block2_mand13;
- wire [1:0] booth_block2_mand14;
- wire [1:0] booth_block2_mand15;
- wire [1:0] booth_block2_mand16;
- wire [1:0] booth_block2_mand17;
- wire [1:0] booth_block2_mand18;
- wire [1:0] booth_block2_mand19;
- wire [1:0] booth_block2_mand2;
- wire [1:0] booth_block2_mand20;
- wire [1:0] booth_block2_mand21;
- wire [1:0] booth_block2_mand22;
- wire [1:0] booth_block2_mand23;
- wire [1:0] booth_block2_mand24;
- wire [1:0] booth_block2_mand25;
- wire [1:0] booth_block2_mand26;
- wire [1:0] booth_block2_mand27;
- wire [1:0] booth_block2_mand28;
- wire [1:0] booth_block2_mand29;
- wire [1:0] booth_block2_mand3;
- wire [1:0] booth_block2_mand30;
- wire [1:0] booth_block2_mand31;
- wire [1:0] booth_block2_mand32;
- wire [1:0] booth_block2_mand4;
- wire [1:0] booth_block2_mand5;
- wire [1:0] booth_block2_mand6;
- wire [1:0] booth_block2_mand7;
- wire [1:0] booth_block2_mand8;
- wire [1:0] booth_block2_mand9;
- wire [1:0] booth_block2_sel;
- wire booth_block2_sign;
- wire [2:0] booth_block30;
- wire [1:0] booth_block30_mand0;
- wire [1:0] booth_block30_mand1;
- wire [1:0] booth_block30_mand10;
- wire [1:0] booth_block30_mand11;
- wire [1:0] booth_block30_mand12;
- wire [1:0] booth_block30_mand13;
- wire [1:0] booth_block30_mand14;
- wire [1:0] booth_block30_mand15;
- wire [1:0] booth_block30_mand16;
- wire [1:0] booth_block30_mand17;
- wire [1:0] booth_block30_mand18;
- wire [1:0] booth_block30_mand19;
- wire [1:0] booth_block30_mand2;
- wire [1:0] booth_block30_mand20;
- wire [1:0] booth_block30_mand21;
- wire [1:0] booth_block30_mand22;
- wire [1:0] booth_block30_mand23;
- wire [1:0] booth_block30_mand24;
- wire [1:0] booth_block30_mand25;
- wire [1:0] booth_block30_mand26;
- wire [1:0] booth_block30_mand27;
- wire [1:0] booth_block30_mand28;
- wire [1:0] booth_block30_mand29;
- wire [1:0] booth_block30_mand3;
- wire [1:0] booth_block30_mand30;
- wire [1:0] booth_block30_mand31;
- wire [1:0] booth_block30_mand32;
- wire [1:0] booth_block30_mand4;
- wire [1:0] booth_block30_mand5;
- wire [1:0] booth_block30_mand6;
- wire [1:0] booth_block30_mand7;
- wire [1:0] booth_block30_mand8;
- wire [1:0] booth_block30_mand9;
- wire [1:0] booth_block30_sel;
- wire booth_block30_sign;
- wire [2:0] booth_block32;
- wire [1:0] booth_block32_mand0;
- wire [1:0] booth_block32_mand1;
- wire [1:0] booth_block32_mand10;
- wire [1:0] booth_block32_mand11;
- wire [1:0] booth_block32_mand12;
- wire [1:0] booth_block32_mand13;
- wire [1:0] booth_block32_mand14;
- wire [1:0] booth_block32_mand15;
- wire [1:0] booth_block32_mand16;
- wire [1:0] booth_block32_mand17;
- wire [1:0] booth_block32_mand18;
- wire [1:0] booth_block32_mand19;
- wire [1:0] booth_block32_mand2;
- wire [1:0] booth_block32_mand20;
- wire [1:0] booth_block32_mand21;
- wire [1:0] booth_block32_mand22;
- wire [1:0] booth_block32_mand23;
- wire [1:0] booth_block32_mand24;
- wire [1:0] booth_block32_mand25;
- wire [1:0] booth_block32_mand26;
- wire [1:0] booth_block32_mand27;
- wire [1:0] booth_block32_mand28;
- wire [1:0] booth_block32_mand29;
- wire [1:0] booth_block32_mand3;
- wire [1:0] booth_block32_mand30;
- wire [1:0] booth_block32_mand31;
- wire [1:0] booth_block32_mand32;
- wire [1:0] booth_block32_mand4;
- wire [1:0] booth_block32_mand5;
- wire [1:0] booth_block32_mand6;
- wire [1:0] booth_block32_mand7;
- wire [1:0] booth_block32_mand8;
- wire [1:0] booth_block32_mand9;
- wire [1:0] booth_block32_sel;
- wire booth_block32_sign;
- wire [2:0] booth_block4;
- wire [1:0] booth_block4_mand0;
- wire [1:0] booth_block4_mand1;
- wire [1:0] booth_block4_mand10;
- wire [1:0] booth_block4_mand11;
- wire [1:0] booth_block4_mand12;
- wire [1:0] booth_block4_mand13;
- wire [1:0] booth_block4_mand14;
- wire [1:0] booth_block4_mand15;
- wire [1:0] booth_block4_mand16;
- wire [1:0] booth_block4_mand17;
- wire [1:0] booth_block4_mand18;
- wire [1:0] booth_block4_mand19;
- wire [1:0] booth_block4_mand2;
- wire [1:0] booth_block4_mand20;
- wire [1:0] booth_block4_mand21;
- wire [1:0] booth_block4_mand22;
- wire [1:0] booth_block4_mand23;
- wire [1:0] booth_block4_mand24;
- wire [1:0] booth_block4_mand25;
- wire [1:0] booth_block4_mand26;
- wire [1:0] booth_block4_mand27;
- wire [1:0] booth_block4_mand28;
- wire [1:0] booth_block4_mand29;
- wire [1:0] booth_block4_mand3;
- wire [1:0] booth_block4_mand30;
- wire [1:0] booth_block4_mand31;
- wire [1:0] booth_block4_mand32;
- wire [1:0] booth_block4_mand4;
- wire [1:0] booth_block4_mand5;
- wire [1:0] booth_block4_mand6;
- wire [1:0] booth_block4_mand7;
- wire [1:0] booth_block4_mand8;
- wire [1:0] booth_block4_mand9;
- wire [1:0] booth_block4_sel;
- wire booth_block4_sign;
- wire [2:0] booth_block6;
- wire [1:0] booth_block6_mand0;
- wire [1:0] booth_block6_mand1;
- wire [1:0] booth_block6_mand10;
- wire [1:0] booth_block6_mand11;
- wire [1:0] booth_block6_mand12;
- wire [1:0] booth_block6_mand13;
- wire [1:0] booth_block6_mand14;
- wire [1:0] booth_block6_mand15;
- wire [1:0] booth_block6_mand16;
- wire [1:0] booth_block6_mand17;
- wire [1:0] booth_block6_mand18;
- wire [1:0] booth_block6_mand19;
- wire [1:0] booth_block6_mand2;
- wire [1:0] booth_block6_mand20;
- wire [1:0] booth_block6_mand21;
- wire [1:0] booth_block6_mand22;
- wire [1:0] booth_block6_mand23;
- wire [1:0] booth_block6_mand24;
- wire [1:0] booth_block6_mand25;
- wire [1:0] booth_block6_mand26;
- wire [1:0] booth_block6_mand27;
- wire [1:0] booth_block6_mand28;
- wire [1:0] booth_block6_mand29;
- wire [1:0] booth_block6_mand3;
- wire [1:0] booth_block6_mand30;
- wire [1:0] booth_block6_mand31;
- wire [1:0] booth_block6_mand32;
- wire [1:0] booth_block6_mand4;
- wire [1:0] booth_block6_mand5;
- wire [1:0] booth_block6_mand6;
- wire [1:0] booth_block6_mand7;
- wire [1:0] booth_block6_mand8;
- wire [1:0] booth_block6_mand9;
- wire [1:0] booth_block6_sel;
- wire booth_block6_sign;
- wire [2:0] booth_block8;
- wire [1:0] booth_block8_mand0;
- wire [1:0] booth_block8_mand1;
- wire [1:0] booth_block8_mand10;
- wire [1:0] booth_block8_mand11;
- wire [1:0] booth_block8_mand12;
- wire [1:0] booth_block8_mand13;
- wire [1:0] booth_block8_mand14;
- wire [1:0] booth_block8_mand15;
- wire [1:0] booth_block8_mand16;
- wire [1:0] booth_block8_mand17;
- wire [1:0] booth_block8_mand18;
- wire [1:0] booth_block8_mand19;
- wire [1:0] booth_block8_mand2;
- wire [1:0] booth_block8_mand20;
- wire [1:0] booth_block8_mand21;
- wire [1:0] booth_block8_mand22;
- wire [1:0] booth_block8_mand23;
- wire [1:0] booth_block8_mand24;
- wire [1:0] booth_block8_mand25;
- wire [1:0] booth_block8_mand26;
- wire [1:0] booth_block8_mand27;
- wire [1:0] booth_block8_mand28;
- wire [1:0] booth_block8_mand29;
- wire [1:0] booth_block8_mand3;
- wire [1:0] booth_block8_mand30;
- wire [1:0] booth_block8_mand31;
- wire [1:0] booth_block8_mand32;
- wire [1:0] booth_block8_mand4;
- wire [1:0] booth_block8_mand5;
- wire [1:0] booth_block8_mand6;
- wire [1:0] booth_block8_mand7;
- wire [1:0] booth_block8_mand8;
- wire [1:0] booth_block8_mand9;
- wire [1:0] booth_block8_sel;
- wire booth_block8_sign;
- wire c;
- wire \c$1197 ;
- wire \c$1198 ;
- wire \c$1199 ;
- wire \c$1200 ;
- wire \c$1201 ;
- wire \c$1202 ;
- wire \c$1203 ;
- wire \c$1204 ;
- wire \c$1205 ;
- wire \c$1206 ;
- wire \c$1207 ;
- wire \c$1208 ;
- wire \c$1209 ;
- wire \c$1210 ;
- wire \c$1211 ;
- wire \c$1212 ;
- wire \c$1213 ;
- wire \c$1214 ;
- wire \c$1215 ;
- wire \c$1216 ;
- wire \c$1217 ;
- wire \c$1218 ;
- wire \c$1219 ;
- wire \c$1220 ;
- wire \c$1221 ;
- wire \c$1222 ;
- wire \c$1223 ;
- wire \c$1224 ;
- wire \c$1225 ;
- wire \c$1226 ;
- wire \c$1227 ;
- wire \c$1228 ;
- wire \c$1229 ;
- wire \c$1230 ;
- wire \c$1231 ;
- wire \c$1232 ;
- wire \c$1233 ;
- wire \c$1234 ;
- wire \c$1235 ;
- wire \c$1236 ;
- wire \c$1237 ;
- wire \c$1238 ;
- wire \c$1239 ;
- wire \c$1240 ;
- wire \c$1241 ;
- wire \c$1242 ;
- wire \c$1243 ;
- wire \c$1244 ;
- wire \c$1245 ;
- wire \c$1246 ;
- wire \c$1247 ;
- wire \c$1248 ;
- wire \c$1249 ;
- wire \c$1250 ;
- wire \c$1251 ;
- wire \c$1252 ;
- wire \c$1253 ;
- wire \c$1254 ;
- wire \c$1255 ;
- wire \c$1256 ;
- wire \c$1257 ;
- wire \c$2553 ;
- wire \c$2557 ;
- wire \c$2561 ;
- wire \c$2565 ;
- wire \c$2569 ;
- wire \c$2573 ;
- wire \c$2577 ;
- wire \c$2581 ;
- wire \c$2585 ;
- wire \c$2589 ;
- wire \c$2593 ;
- wire \c$2597 ;
- wire \c$2601 ;
- wire \c$2605 ;
- wire \c$2609 ;
- wire \c$2613 ;
- wire \c$2617 ;
- wire \c$2621 ;
- wire \c$2625 ;
- wire \c$2629 ;
- wire \c$2633 ;
- wire \c$2637 ;
- wire \c$2641 ;
- wire \c$2645 ;
- wire \c$2649 ;
- wire \c$2653 ;
- wire \c$2657 ;
- wire \c$2661 ;
- wire \c$2665 ;
- wire \c$2669 ;
- wire \c$2673 ;
- wire \c$2677 ;
- wire \c$2681 ;
- wire \c$2685 ;
- wire \c$2689 ;
- wire \c$2693 ;
- wire \c$2697 ;
- wire \c$2701 ;
- wire \c$2705 ;
- wire \c$2709 ;
- wire \c$2713 ;
- wire \c$2717 ;
- wire \c$2721 ;
- wire \c$2725 ;
- wire \c$2729 ;
- wire \c$2733 ;
- wire \c$2737 ;
- wire \c$2741 ;
- wire \c$2745 ;
- wire \c$2749 ;
- wire \c$2753 ;
- wire \c$2757 ;
- wire \c$2761 ;
- wire \c$2765 ;
- wire \c$2769 ;
- wire \c$2773 ;
- wire \c$2777 ;
- wire \c$2781 ;
- wire \c$2785 ;
- wire \c$2789 ;
- wire \c$2793 ;
- wire \c$2797 ;
- wire \c$2801 ;
- wire \c$2805 ;
- wire \c$2809 ;
- wire \c$2813 ;
- wire \c$2817 ;
- wire \c$2821 ;
- wire \c$2825 ;
- wire \c$2829 ;
- wire \c$2833 ;
- wire \c$2837 ;
- wire \c$2841 ;
- wire \c$2845 ;
- wire \c$2849 ;
- wire \c$2853 ;
- wire \c$2857 ;
- wire \c$2861 ;
- wire \c$2865 ;
- wire \c$2869 ;
- wire \c$2873 ;
- wire \c$2877 ;
- wire \c$2881 ;
- wire \c$2885 ;
- wire \c$2889 ;
- wire \c$2893 ;
- wire \c$2897 ;
- wire \c$2901 ;
- wire \c$2905 ;
- wire \c$2909 ;
- wire \c$2913 ;
- wire \c$2917 ;
- wire \c$2921 ;
- wire \c$2925 ;
- wire \c$2929 ;
- wire \c$2933 ;
- wire \c$2937 ;
- wire \c$2941 ;
- wire \c$2945 ;
- wire \c$2949 ;
- wire \c$2953 ;
- wire \c$2957 ;
- wire \c$2961 ;
- wire \c$2965 ;
- wire \c$2969 ;
- wire \c$2973 ;
- wire \c$2977 ;
- wire \c$2981 ;
- wire \c$2985 ;
- wire \c$2989 ;
- wire \c$2993 ;
- wire \c$2997 ;
- wire \c$3001 ;
- wire \c$3005 ;
- wire \c$3009 ;
- wire \c$3013 ;
- wire \c$3017 ;
- wire \c$3021 ;
- wire \c$3025 ;
- wire \c$3029 ;
- wire \c$3033 ;
- wire \c$3037 ;
- wire \c$3041 ;
- wire \c$3045 ;
- wire \c$3049 ;
- wire \c$3053 ;
- wire \c$3057 ;
- wire \c$3061 ;
- wire \c$3065 ;
- wire \c$3069 ;
- wire \c$3073 ;
- wire \c$3077 ;
- wire \c$3081 ;
- wire \c$3085 ;
- wire \c$3089 ;
- wire \c$3093 ;
- wire \c$3097 ;
- wire \c$3101 ;
- wire \c$3105 ;
- wire \c$3109 ;
- wire \c$3113 ;
- wire \c$3117 ;
- wire \c$3121 ;
- wire \c$3125 ;
- wire \c$3129 ;
- wire \c$3133 ;
- wire \c$3137 ;
- wire \c$3141 ;
- wire \c$3145 ;
- wire \c$3149 ;
- wire \c$3153 ;
- wire \c$3157 ;
- wire \c$3161 ;
- wire \c$3165 ;
- wire \c$3169 ;
- wire \c$3173 ;
- wire \c$3177 ;
- wire \c$3181 ;
- wire \c$3185 ;
- wire \c$3189 ;
- wire \c$3193 ;
- wire \c$3197 ;
- wire \c$3201 ;
- wire \c$3205 ;
- wire \c$3209 ;
- wire \c$3213 ;
- wire \c$3217 ;
- wire \c$3221 ;
- wire \c$3225 ;
- wire \c$3229 ;
- wire \c$3233 ;
- wire \c$3237 ;
- wire \c$3241 ;
- wire \c$3245 ;
- wire \c$3249 ;
- wire \c$3253 ;
- wire \c$3257 ;
- wire \c$3261 ;
- wire \c$3265 ;
- wire \c$3269 ;
- wire \c$3273 ;
- wire \c$3277 ;
- wire \c$3281 ;
- wire \c$3285 ;
- wire \c$3289 ;
- wire \c$3293 ;
- wire \c$3297 ;
- wire \c$3301 ;
- wire \c$3305 ;
- wire \c$3309 ;
- wire \c$3313 ;
- wire \c$3317 ;
- wire \c$3321 ;
- wire \c$3325 ;
- wire \c$3329 ;
- wire \c$3333 ;
- wire \c$3337 ;
- wire \c$3341 ;
- wire \c$3345 ;
- wire \c$3349 ;
- wire \c$3353 ;
- wire \c$3357 ;
- wire \c$3361 ;
- wire \c$3365 ;
- wire \c$3369 ;
- wire \c$3373 ;
- wire \c$3377 ;
- wire \c$3381 ;
- wire \c$3385 ;
- wire \c$3389 ;
- wire \c$3393 ;
- wire \c$3397 ;
- wire \c$3401 ;
- wire \c$3405 ;
- wire \c$3409 ;
- wire \c$3413 ;
- wire \c$3417 ;
- wire \c$3421 ;
- wire \c$3425 ;
- wire \c$3429 ;
- wire \c$3433 ;
- wire \c$3437 ;
- wire \c$3441 ;
- wire \c$3445 ;
- wire \c$3449 ;
- wire \c$3453 ;
- wire \c$3457 ;
- wire \c$3461 ;
- wire \c$3465 ;
- wire \c$3469 ;
- wire \c$3473 ;
- wire \c$3477 ;
- wire \c$3481 ;
- wire \c$3485 ;
- wire \c$3489 ;
- wire \c$3493 ;
- wire \c$3497 ;
- wire \c$3501 ;
- wire \c$3505 ;
- wire \c$3509 ;
- wire \c$3513 ;
- wire \c$3517 ;
- wire \c$3521 ;
- wire \c$3525 ;
- wire \c$3529 ;
- wire \c$3533 ;
- wire \c$3537 ;
- wire \c$3541 ;
- wire \c$3545 ;
- wire \c$3549 ;
- wire \c$3553 ;
- wire \c$3557 ;
- wire \c$3561 ;
- wire \c$3565 ;
- wire \c$3569 ;
- wire \c$3573 ;
- wire \c$3577 ;
- wire \c$3581 ;
- wire \c$3585 ;
- wire \c$3589 ;
- wire \c$3593 ;
- wire \c$3597 ;
- wire \c$3601 ;
- wire \c$3605 ;
- wire \c$3609 ;
- wire \c$3613 ;
- wire \c$3617 ;
- wire \c$3621 ;
- wire \c$3625 ;
- wire \c$3629 ;
- wire \c$3633 ;
- wire \c$3637 ;
- wire \c$3641 ;
- wire \c$3645 ;
- wire \c$3649 ;
- wire \c$3653 ;
- wire \c$3657 ;
- wire \c$3661 ;
- wire \c$3665 ;
- wire \c$3669 ;
- wire \c$3673 ;
- wire \c$3677 ;
- wire \c$3681 ;
- wire \c$3685 ;
- wire \c$3689 ;
- wire \c$3693 ;
- wire \c$3697 ;
- wire \c$3701 ;
- wire \c$3705 ;
- wire \c$3709 ;
- wire \c$3713 ;
- wire \c$3717 ;
- wire \c$3721 ;
- wire \c$3725 ;
- wire \c$3729 ;
- wire \c$3733 ;
- wire \c$3737 ;
- wire \c$3741 ;
- wire \c$3745 ;
- wire \c$3749 ;
- wire \c$3753 ;
- wire \c$3757 ;
- wire \c$3761 ;
- wire \c$3765 ;
- wire \c$3769 ;
- wire \c$3773 ;
- wire \c$3777 ;
- wire \c$3781 ;
- wire \c$3785 ;
- wire \c$3789 ;
- wire \c$3793 ;
- wire \c$3797 ;
- wire \c$3801 ;
- wire \c$3805 ;
- wire \c$3809 ;
- wire \c$3813 ;
- wire \c$3817 ;
- wire \c$3821 ;
- wire \c$3825 ;
- wire \c$3829 ;
- wire \c$3833 ;
- wire \c$3837 ;
- wire \c$3841 ;
- wire \c$3845 ;
- wire \c$3849 ;
- wire \c$3853 ;
- wire \c$3857 ;
- wire \c$3861 ;
- wire \c$3865 ;
- wire \c$3869 ;
- wire \c$3873 ;
- wire \c$3877 ;
- wire \c$3881 ;
- wire \c$3885 ;
- wire \c$3889 ;
- wire \c$3893 ;
- wire \c$3897 ;
- wire \c$3901 ;
- wire \c$3905 ;
- wire \c$3909 ;
- wire \c$3913 ;
- wire \c$3917 ;
- wire \c$3921 ;
- wire \c$3925 ;
- wire \c$3929 ;
- wire \c$3933 ;
- wire \c$3937 ;
- wire \c$3941 ;
- wire \c$3945 ;
- wire \c$3949 ;
- wire \c$3953 ;
- wire \c$3957 ;
- wire \c$3961 ;
- wire \c$3965 ;
- wire \c$3969 ;
- wire \c$3973 ;
- wire \c$3977 ;
- wire \c$3981 ;
- wire \c$3985 ;
- wire \c$3989 ;
- wire \c$3993 ;
- wire \c$3997 ;
- wire \c$4001 ;
- wire \c$4005 ;
- wire \c$4009 ;
- wire \c$4013 ;
- wire \c$4017 ;
- wire \c$4021 ;
- wire \c$4025 ;
- wire \c$4029 ;
- wire \c$4033 ;
- wire \c$4037 ;
- wire \c$4041 ;
- wire \c$4045 ;
- wire \c$4049 ;
- wire \c$4053 ;
- wire \c$4057 ;
- wire \c$4061 ;
- wire \c$4065 ;
- wire \c$4069 ;
- wire \c$4073 ;
- wire \c$4077 ;
- wire \c$4081 ;
- wire \c$4085 ;
- wire \c$4089 ;
- wire \c$4093 ;
- wire \c$4097 ;
- wire \c$4101 ;
- wire \c$4105 ;
- wire \c$4109 ;
- wire \c$4113 ;
- wire \c$4117 ;
- wire \c$4121 ;
- wire \c$4125 ;
- wire \c$4129 ;
- wire \c$4133 ;
- wire \c$4137 ;
- wire \c$4141 ;
- wire \c$4145 ;
- wire \c$4149 ;
- wire \c$4153 ;
- wire \c$4157 ;
- wire \c$4161 ;
- wire \c$4165 ;
- wire \c$4169 ;
- wire \c$4173 ;
- wire \c$4177 ;
- wire \c$4181 ;
- wire \c$4185 ;
- wire \c$4189 ;
- wire \c$4193 ;
- wire \c$4197 ;
- wire \c$4201 ;
- wire \c$4205 ;
- wire \c$4209 ;
- wire \c$4213 ;
- wire \c$4217 ;
- wire \c$4221 ;
- wire \c$4225 ;
- wire \c$4229 ;
- wire \c$4233 ;
- wire \c$4237 ;
- wire \c$4241 ;
- wire \c$4245 ;
- wire \c$4249 ;
- wire \c$4253 ;
- wire \c$4257 ;
- wire \c$4261 ;
- wire \c$4265 ;
- wire \c$4269 ;
- wire \c$4273 ;
- wire \c$4277 ;
- wire \c$4281 ;
- wire \c$4285 ;
- wire \c$4289 ;
- wire \c$4293 ;
- wire \c$4297 ;
- wire \c$4301 ;
- wire \c$4305 ;
- wire \c$4309 ;
- wire \c$4313 ;
- wire \c$4317 ;
- wire \c$4321 ;
- wire \c$4325 ;
- wire \c$4329 ;
- wire \c$4333 ;
- wire \c$4337 ;
- wire \c$4341 ;
- wire \c$4345 ;
- wire \c$4349 ;
- wire \c$4353 ;
- wire \c$4357 ;
- wire \c$4361 ;
- wire \c$4365 ;
- wire \c$4369 ;
- wire \c$4373 ;
- wire \c$4377 ;
- wire \c$4381 ;
- wire \c$4385 ;
- wire \c$4389 ;
- wire \c$4393 ;
- wire \c$4397 ;
- input clk;
- wire clk;
- wire con;
- wire \con$2556 ;
- wire \con$2560 ;
- wire \con$2564 ;
- wire \con$2568 ;
- wire \con$2572 ;
- wire \con$2576 ;
- wire \con$2580 ;
- wire \con$2584 ;
- wire \con$2588 ;
- wire \con$2592 ;
- wire \con$2596 ;
- wire \con$2600 ;
- wire \con$2604 ;
- wire \con$2608 ;
- wire \con$2612 ;
- wire \con$2616 ;
- wire \con$2620 ;
- wire \con$2624 ;
- wire \con$2628 ;
- wire \con$2632 ;
- wire \con$2636 ;
- wire \con$2640 ;
- wire \con$2644 ;
- wire \con$2648 ;
- wire \con$2652 ;
- wire \con$2656 ;
- wire \con$2660 ;
- wire \con$2664 ;
- wire \con$2668 ;
- wire \con$2672 ;
- wire \con$2676 ;
- wire \con$2680 ;
- wire \con$2684 ;
- wire \con$2688 ;
- wire \con$2692 ;
- wire \con$2696 ;
- wire \con$2700 ;
- wire \con$2704 ;
- wire \con$2708 ;
- wire \con$2712 ;
- wire \con$2716 ;
- wire \con$2720 ;
- wire \con$2724 ;
- wire \con$2728 ;
- wire \con$2732 ;
- wire \con$2736 ;
- wire \con$2740 ;
- wire \con$2744 ;
- wire \con$2748 ;
- wire \con$2752 ;
- wire \con$2756 ;
- wire \con$2760 ;
- wire \con$2764 ;
- wire \con$2768 ;
- wire \con$2772 ;
- wire \con$2776 ;
- wire \con$2780 ;
- wire \con$2784 ;
- wire \con$2788 ;
- wire \con$2792 ;
- wire \con$2796 ;
- wire \con$2800 ;
- wire \con$2804 ;
- wire \con$2808 ;
- wire \con$2812 ;
- wire \con$2816 ;
- wire \con$2820 ;
- wire \con$2824 ;
- wire \con$2828 ;
- wire \con$2832 ;
- wire \con$2836 ;
- wire \con$2840 ;
- wire \con$2844 ;
- wire \con$2848 ;
- wire \con$2852 ;
- wire \con$2856 ;
- wire \con$2860 ;
- wire \con$2864 ;
- wire \con$2868 ;
- wire \con$2872 ;
- wire \con$2876 ;
- wire \con$2880 ;
- wire \con$2884 ;
- wire \con$2888 ;
- wire \con$2892 ;
- wire \con$2896 ;
- wire \con$2900 ;
- wire \con$2904 ;
- wire \con$2908 ;
- wire \con$2912 ;
- wire \con$2916 ;
- wire \con$2920 ;
- wire \con$2924 ;
- wire \con$2928 ;
- wire \con$2932 ;
- wire \con$2936 ;
- wire \con$2940 ;
- wire \con$2944 ;
- wire \con$2948 ;
- wire \con$2952 ;
- wire \con$2956 ;
- wire \con$2960 ;
- wire \con$2964 ;
- wire \con$2968 ;
- wire \con$2972 ;
- wire \con$2976 ;
- wire \con$2980 ;
- wire \con$2984 ;
- wire \con$2988 ;
- wire \con$2992 ;
- wire \con$2996 ;
- wire \con$3000 ;
- wire \con$3004 ;
- wire \con$3008 ;
- wire \con$3012 ;
- wire \con$3016 ;
- wire \con$3020 ;
- wire \con$3024 ;
- wire \con$3028 ;
- wire \con$3032 ;
- wire \con$3036 ;
- wire \con$3040 ;
- wire \con$3044 ;
- wire \con$3048 ;
- wire \con$3052 ;
- wire \con$3056 ;
- wire \con$3060 ;
- wire \con$3064 ;
- wire \con$3068 ;
- wire \con$3072 ;
- wire \con$3076 ;
- wire \con$3080 ;
- wire \con$3084 ;
- wire \con$3088 ;
- wire \con$3092 ;
- wire \con$3096 ;
- wire \con$3100 ;
- wire \con$3104 ;
- wire \con$3108 ;
- wire \con$3112 ;
- wire \con$3116 ;
- wire \con$3120 ;
- wire \con$3124 ;
- wire \con$3128 ;
- wire \con$3132 ;
- wire \con$3136 ;
- wire \con$3140 ;
- wire \con$3144 ;
- wire \con$3148 ;
- wire \con$3152 ;
- wire \con$3156 ;
- wire \con$3160 ;
- wire \con$3164 ;
- wire \con$3168 ;
- wire \con$3172 ;
- wire \con$3176 ;
- wire \con$3180 ;
- wire \con$3184 ;
- wire \con$3188 ;
- wire \con$3192 ;
- wire \con$3196 ;
- wire \con$3200 ;
- wire \con$3204 ;
- wire \con$3208 ;
- wire \con$3212 ;
- wire \con$3216 ;
- wire \con$3220 ;
- wire \con$3224 ;
- wire \con$3228 ;
- wire \con$3232 ;
- wire \con$3236 ;
- wire \con$3240 ;
- wire \con$3244 ;
- wire \con$3248 ;
- wire \con$3252 ;
- wire \con$3256 ;
- wire \con$3260 ;
- wire \con$3264 ;
- wire \con$3268 ;
- wire \con$3272 ;
- wire \con$3276 ;
- wire \con$3280 ;
- wire \con$3284 ;
- wire \con$3288 ;
- wire \con$3292 ;
- wire \con$3296 ;
- wire \con$3300 ;
- wire \con$3304 ;
- wire \con$3308 ;
- wire \con$3312 ;
- wire \con$3316 ;
- wire \con$3320 ;
- wire \con$3324 ;
- wire \con$3328 ;
- wire \con$3332 ;
- wire \con$3336 ;
- wire \con$3340 ;
- wire \con$3344 ;
- wire \con$3348 ;
- wire \con$3352 ;
- wire \con$3356 ;
- wire \con$3360 ;
- wire \con$3364 ;
- wire \con$3368 ;
- wire \con$3372 ;
- wire \con$3376 ;
- wire \con$3380 ;
- wire \con$3384 ;
- wire \con$3388 ;
- wire \con$3392 ;
- wire \con$3396 ;
- wire \con$3400 ;
- wire \con$3404 ;
- wire \con$3408 ;
- wire \con$3412 ;
- wire \con$3416 ;
- wire \con$3420 ;
- wire \con$3424 ;
- wire \con$3428 ;
- wire \con$3432 ;
- wire \con$3436 ;
- wire \con$3440 ;
- wire \con$3444 ;
- wire \con$3448 ;
- wire \con$3452 ;
- wire \con$3456 ;
- wire \con$3460 ;
- wire \con$3464 ;
- wire \con$3468 ;
- wire \con$3472 ;
- wire \con$3476 ;
- wire \con$3480 ;
- wire \con$3484 ;
- wire \con$3488 ;
- wire \con$3492 ;
- wire \con$3496 ;
- wire \con$3500 ;
- wire \con$3504 ;
- wire \con$3508 ;
- wire \con$3512 ;
- wire \con$3516 ;
- wire \con$3520 ;
- wire \con$3524 ;
- wire \con$3528 ;
- wire \con$3532 ;
- wire \con$3536 ;
- wire \con$3540 ;
- wire \con$3544 ;
- wire \con$3548 ;
- wire \con$3552 ;
- wire \con$3556 ;
- wire \con$3560 ;
- wire \con$3564 ;
- wire \con$3568 ;
- wire \con$3572 ;
- wire \con$3576 ;
- wire \con$3580 ;
- wire \con$3584 ;
- wire \con$3588 ;
- wire \con$3592 ;
- wire \con$3596 ;
- wire \con$3600 ;
- wire \con$3604 ;
- wire \con$3608 ;
- wire \con$3612 ;
- wire \con$3616 ;
- wire \con$3620 ;
- wire \con$3624 ;
- wire \con$3628 ;
- wire \con$3632 ;
- wire \con$3636 ;
- wire \con$3640 ;
- wire \con$3644 ;
- wire \con$3648 ;
- wire \con$3652 ;
- wire \con$3656 ;
- wire \con$3660 ;
- wire \con$3664 ;
- wire \con$3668 ;
- wire \con$3672 ;
- wire \con$3676 ;
- wire \con$3680 ;
- wire \con$3684 ;
- wire \con$3688 ;
- wire \con$3692 ;
- wire \con$3696 ;
- wire \con$3700 ;
- wire \con$3704 ;
- wire \con$3708 ;
- wire \con$3712 ;
- wire \con$3716 ;
- wire \con$3720 ;
- wire \con$3724 ;
- wire \con$3728 ;
- wire \con$3732 ;
- wire \con$3736 ;
- wire \con$3740 ;
- wire \con$3744 ;
- wire \con$3748 ;
- wire \con$3752 ;
- wire \con$3756 ;
- wire \con$3760 ;
- wire \con$3764 ;
- wire \con$3768 ;
- wire \con$3772 ;
- wire \con$3776 ;
- wire \con$3780 ;
- wire \con$3784 ;
- wire \con$3788 ;
- wire \con$3792 ;
- wire \con$3796 ;
- wire \con$3800 ;
- wire \con$3804 ;
- wire \con$3808 ;
- wire \con$3812 ;
- wire \con$3816 ;
- wire \con$3820 ;
- wire \con$3824 ;
- wire \con$3828 ;
- wire \con$3832 ;
- wire \con$3836 ;
- wire \con$3840 ;
- wire \con$3844 ;
- wire \con$3848 ;
- wire \con$3852 ;
- wire \con$3856 ;
- wire \con$3860 ;
- wire \con$3864 ;
- wire \con$3868 ;
- wire \con$3872 ;
- wire \con$3876 ;
- wire \con$3880 ;
- wire \con$3884 ;
- wire \con$3888 ;
- wire \con$3892 ;
- wire \con$3896 ;
- wire \con$3900 ;
- wire \con$3904 ;
- wire \con$3908 ;
- wire \con$3912 ;
- wire \con$3916 ;
- wire \con$3920 ;
- wire \con$3924 ;
- wire \con$3928 ;
- wire \con$3932 ;
- wire \con$3936 ;
- wire \con$3940 ;
- wire \con$3944 ;
- wire \con$3948 ;
- wire \con$3952 ;
- wire \con$3956 ;
- wire \con$3960 ;
- wire \con$3964 ;
- wire \con$3968 ;
- wire \con$3972 ;
- wire \con$3976 ;
- wire \con$3980 ;
- wire \con$3984 ;
- wire \con$3988 ;
- wire \con$3992 ;
- wire \con$3996 ;
- wire \con$4000 ;
- wire \con$4004 ;
- wire \con$4008 ;
- wire \con$4012 ;
- wire \con$4016 ;
- wire \con$4020 ;
- wire \con$4024 ;
- wire \con$4028 ;
- wire \con$4032 ;
- wire \con$4036 ;
- wire \con$4040 ;
- wire \con$4044 ;
- wire \con$4048 ;
- wire \con$4052 ;
- wire \con$4056 ;
- wire \con$4060 ;
- wire \con$4064 ;
- wire \con$4068 ;
- wire \con$4072 ;
- wire \con$4076 ;
- wire \con$4080 ;
- wire \con$4084 ;
- wire \con$4088 ;
- wire \con$4092 ;
- wire \con$4096 ;
- wire \con$4100 ;
- wire \con$4104 ;
- wire \con$4108 ;
- wire \con$4112 ;
- wire \con$4116 ;
- wire \con$4120 ;
- wire \con$4124 ;
- wire \con$4128 ;
- wire \con$4132 ;
- wire \con$4136 ;
- wire \con$4140 ;
- wire \con$4144 ;
- wire \con$4148 ;
- wire \con$4152 ;
- wire \con$4156 ;
- wire \con$4160 ;
- wire \con$4164 ;
- wire \con$4168 ;
- wire \con$4172 ;
- wire \con$4176 ;
- wire \con$4180 ;
- wire \con$4184 ;
- wire \con$4188 ;
- wire \con$4192 ;
- wire \con$4196 ;
- wire \con$4200 ;
- wire \con$4204 ;
- wire \con$4208 ;
- wire \con$4212 ;
- wire \con$4216 ;
- wire \con$4220 ;
- wire \con$4224 ;
- wire \con$4228 ;
- wire \con$4232 ;
- wire \con$4236 ;
- wire \con$4240 ;
- wire \con$4244 ;
- wire \con$4248 ;
- wire \con$4252 ;
- wire \con$4256 ;
- wire \con$4260 ;
- wire \con$4264 ;
- wire \con$4268 ;
- wire \con$4272 ;
- wire \con$4276 ;
- wire \con$4280 ;
- wire \con$4284 ;
- wire \con$4288 ;
- wire \con$4292 ;
- wire \con$4296 ;
- wire \con$4300 ;
- wire \con$4304 ;
- wire \con$4308 ;
- wire \con$4312 ;
- wire \con$4316 ;
- wire \con$4320 ;
- wire \con$4324 ;
- wire \con$4328 ;
- wire \con$4332 ;
- wire \con$4336 ;
- wire \con$4340 ;
- wire \con$4344 ;
- wire \con$4348 ;
- wire \con$4352 ;
- wire \con$4356 ;
- wire \con$4360 ;
- wire \con$4364 ;
- wire \con$4368 ;
- wire \con$4372 ;
- wire \con$4376 ;
- wire \con$4380 ;
- wire \con$4384 ;
- wire \con$4388 ;
- wire \con$4392 ;
- wire \con$4396 ;
- wire \con$4400 ;
- wire \con$4402 ;
- wire \con$4404 ;
- wire \con$4406 ;
- wire \con$4408 ;
- wire \con$4410 ;
- wire \con$4412 ;
- wire \con$4414 ;
- wire \con$4416 ;
- wire \con$4418 ;
- wire \con$4420 ;
- wire \con$4422 ;
- wire \con$4424 ;
- wire \con$4426 ;
- wire \con$4428 ;
- wire \con$4430 ;
- wire \con$4432 ;
- wire \con$4434 ;
- wire \con$4436 ;
- wire \con$4438 ;
- wire \con$4440 ;
- wire \con$4442 ;
- wire \con$4444 ;
- wire \con$4446 ;
- wire \con$4448 ;
- wire \con$4450 ;
- wire \con$4452 ;
- wire \con$4454 ;
- wire \con$4456 ;
- wire \con$4458 ;
- wire \con$4460 ;
- wire \con$4462 ;
- wire \con$4464 ;
- wire \con$4466 ;
- wire \con$4468 ;
- wire \con$4470 ;
- wire \con$4472 ;
- wire \con$4474 ;
- wire \con$4476 ;
- wire \con$4478 ;
- wire \con$4480 ;
- wire \con$4482 ;
- wire \con$4484 ;
- wire \con$4486 ;
- wire \con$4488 ;
- wire \con$4490 ;
- wire \con$4492 ;
- wire \con$4494 ;
- wire \con$4496 ;
- wire \con$4498 ;
- wire \con$4500 ;
- wire \con$4502 ;
- wire \con$4504 ;
- wire \con$4506 ;
- wire \con$4508 ;
- wire \con$4510 ;
- wire \con$4512 ;
- wire \con$4514 ;
- wire \con$4516 ;
- wire \con$4518 ;
- wire \con$4520 ;
- wire \con$4522 ;
- wire \con$4524 ;
- reg [63:0] final_a_registered = 64'h0000000000000000;
- reg [63:0] final_b_registered = 64'h0000000000000000;
- wire [33:0] multiplicand;
- wire [34:0] multiplier;
- wire [2:0] notblock;
- wire [2:0] \notblock$2008 ;
- wire [2:0] \notblock$2042 ;
- wire [2:0] \notblock$2076 ;
- wire [2:0] \notblock$2110 ;
- wire [2:0] \notblock$2144 ;
- wire [2:0] \notblock$2178 ;
- wire [2:0] \notblock$2212 ;
- wire [2:0] \notblock$2246 ;
- wire [2:0] \notblock$2280 ;
- wire [2:0] \notblock$2314 ;
- wire [2:0] \notblock$2348 ;
- wire [2:0] \notblock$2382 ;
- wire [2:0] \notblock$2416 ;
- wire [2:0] \notblock$2450 ;
- wire [2:0] \notblock$2484 ;
- wire [2:0] \notblock$2518 ;
- wire notsign;
- wire \notsign$1036 ;
- wire \notsign$1070 ;
- wire \notsign$1100 ;
- wire \notsign$1126 ;
- wire \notsign$1148 ;
- wire \notsign$1166 ;
- wire \notsign$1180 ;
- wire \notsign$1190 ;
- wire \notsign$686 ;
- wire \notsign$748 ;
- wire \notsign$806 ;
- wire \notsign$860 ;
- wire \notsign$910 ;
- wire \notsign$956 ;
- wire \notsign$998 ;
- output [63:0] o;
- reg [63:0] o = 64'h0000000000000000;
- wire [63:0] \o$1973 ;
- reg pp_row0_0 = 1'h0;
- reg pp_row0_1 = 1'h0;
- reg pp_row10_0 = 1'h0;
- reg pp_row10_1 = 1'h0;
- reg pp_row10_2 = 1'h0;
- reg pp_row10_3 = 1'h0;
- reg pp_row10_4 = 1'h0;
- reg pp_row10_5 = 1'h0;
- reg pp_row10_6 = 1'h0;
- reg pp_row11_0 = 1'h0;
- reg pp_row11_1 = 1'h0;
- reg pp_row11_2 = 1'h0;
- reg pp_row11_3 = 1'h0;
- reg pp_row11_4 = 1'h0;
- reg pp_row11_5 = 1'h0;
- reg pp_row12_0 = 1'h0;
- reg pp_row12_1 = 1'h0;
- reg pp_row12_2 = 1'h0;
- reg pp_row12_3 = 1'h0;
- reg pp_row12_4 = 1'h0;
- reg pp_row12_5 = 1'h0;
- reg pp_row12_6 = 1'h0;
- reg pp_row12_7 = 1'h0;
- reg pp_row13_0 = 1'h0;
- reg pp_row13_1 = 1'h0;
- reg pp_row13_2 = 1'h0;
- reg pp_row13_3 = 1'h0;
- reg pp_row13_4 = 1'h0;
- reg pp_row13_5 = 1'h0;
- reg pp_row13_6 = 1'h0;
- reg pp_row14_0 = 1'h0;
- reg pp_row14_1 = 1'h0;
- reg pp_row14_2 = 1'h0;
- reg pp_row14_3 = 1'h0;
- reg pp_row14_4 = 1'h0;
- reg pp_row14_5 = 1'h0;
- reg pp_row14_6 = 1'h0;
- reg pp_row14_7 = 1'h0;
- reg pp_row14_8 = 1'h0;
- reg pp_row15_0 = 1'h0;
- reg pp_row15_1 = 1'h0;
- reg pp_row15_2 = 1'h0;
- reg pp_row15_3 = 1'h0;
- reg pp_row15_4 = 1'h0;
- reg pp_row15_5 = 1'h0;
- reg pp_row15_6 = 1'h0;
- reg pp_row15_7 = 1'h0;
- reg pp_row16_0 = 1'h0;
- reg pp_row16_1 = 1'h0;
- reg pp_row16_2 = 1'h0;
- reg pp_row16_3 = 1'h0;
- reg pp_row16_4 = 1'h0;
- reg pp_row16_5 = 1'h0;
- reg pp_row16_6 = 1'h0;
- reg pp_row16_7 = 1'h0;
- reg pp_row16_8 = 1'h0;
- reg pp_row16_9 = 1'h0;
- reg pp_row17_0 = 1'h0;
- reg pp_row17_1 = 1'h0;
- reg pp_row17_2 = 1'h0;
- reg pp_row17_3 = 1'h0;
- reg pp_row17_4 = 1'h0;
- reg pp_row17_5 = 1'h0;
- reg pp_row17_6 = 1'h0;
- reg pp_row17_7 = 1'h0;
- reg pp_row17_8 = 1'h0;
- reg pp_row18_0 = 1'h0;
- reg pp_row18_1 = 1'h0;
- reg pp_row18_10 = 1'h0;
- reg pp_row18_2 = 1'h0;
- reg pp_row18_3 = 1'h0;
- reg pp_row18_4 = 1'h0;
- reg pp_row18_5 = 1'h0;
- reg pp_row18_6 = 1'h0;
- reg pp_row18_7 = 1'h0;
- reg pp_row18_8 = 1'h0;
- reg pp_row18_9 = 1'h0;
- reg pp_row19_0 = 1'h0;
- reg pp_row19_1 = 1'h0;
- reg pp_row19_2 = 1'h0;
- reg pp_row19_3 = 1'h0;
- reg pp_row19_4 = 1'h0;
- reg pp_row19_5 = 1'h0;
- reg pp_row19_6 = 1'h0;
- reg pp_row19_7 = 1'h0;
- reg pp_row19_8 = 1'h0;
- reg pp_row19_9 = 1'h0;
- reg pp_row1_0 = 1'h0;
- reg pp_row20_0 = 1'h0;
- reg pp_row20_1 = 1'h0;
- reg pp_row20_10 = 1'h0;
- reg pp_row20_11 = 1'h0;
- reg pp_row20_2 = 1'h0;
- reg pp_row20_3 = 1'h0;
- reg pp_row20_4 = 1'h0;
- reg pp_row20_5 = 1'h0;
- reg pp_row20_6 = 1'h0;
- reg pp_row20_7 = 1'h0;
- reg pp_row20_8 = 1'h0;
- reg pp_row20_9 = 1'h0;
- reg pp_row21_0 = 1'h0;
- reg pp_row21_1 = 1'h0;
- reg pp_row21_10 = 1'h0;
- reg pp_row21_2 = 1'h0;
- reg pp_row21_3 = 1'h0;
- reg pp_row21_4 = 1'h0;
- reg pp_row21_5 = 1'h0;
- reg pp_row21_6 = 1'h0;
- reg pp_row21_7 = 1'h0;
- reg pp_row21_8 = 1'h0;
- reg pp_row21_9 = 1'h0;
- reg pp_row22_0 = 1'h0;
- reg pp_row22_1 = 1'h0;
- reg pp_row22_10 = 1'h0;
- reg pp_row22_11 = 1'h0;
- reg pp_row22_12 = 1'h0;
- reg pp_row22_2 = 1'h0;
- reg pp_row22_3 = 1'h0;
- reg pp_row22_4 = 1'h0;
- reg pp_row22_5 = 1'h0;
- reg pp_row22_6 = 1'h0;
- reg pp_row22_7 = 1'h0;
- reg pp_row22_8 = 1'h0;
- reg pp_row22_9 = 1'h0;
- reg pp_row23_0 = 1'h0;
- reg pp_row23_1 = 1'h0;
- reg pp_row23_10 = 1'h0;
- reg pp_row23_11 = 1'h0;
- reg pp_row23_2 = 1'h0;
- reg pp_row23_3 = 1'h0;
- reg pp_row23_4 = 1'h0;
- reg pp_row23_5 = 1'h0;
- reg pp_row23_6 = 1'h0;
- reg pp_row23_7 = 1'h0;
- reg pp_row23_8 = 1'h0;
- reg pp_row23_9 = 1'h0;
- reg pp_row24_0 = 1'h0;
- reg pp_row24_1 = 1'h0;
- reg pp_row24_10 = 1'h0;
- reg pp_row24_11 = 1'h0;
- reg pp_row24_12 = 1'h0;
- reg pp_row24_13 = 1'h0;
- reg pp_row24_2 = 1'h0;
- reg pp_row24_3 = 1'h0;
- reg pp_row24_4 = 1'h0;
- reg pp_row24_5 = 1'h0;
- reg pp_row24_6 = 1'h0;
- reg pp_row24_7 = 1'h0;
- reg pp_row24_8 = 1'h0;
- reg pp_row24_9 = 1'h0;
- reg pp_row25_0 = 1'h0;
- reg pp_row25_1 = 1'h0;
- reg pp_row25_10 = 1'h0;
- reg pp_row25_11 = 1'h0;
- reg pp_row25_12 = 1'h0;
- reg pp_row25_2 = 1'h0;
- reg pp_row25_3 = 1'h0;
- reg pp_row25_4 = 1'h0;
- reg pp_row25_5 = 1'h0;
- reg pp_row25_6 = 1'h0;
- reg pp_row25_7 = 1'h0;
- reg pp_row25_8 = 1'h0;
- reg pp_row25_9 = 1'h0;
- reg pp_row26_0 = 1'h0;
- reg pp_row26_1 = 1'h0;
- reg pp_row26_10 = 1'h0;
- reg pp_row26_11 = 1'h0;
- reg pp_row26_12 = 1'h0;
- reg pp_row26_13 = 1'h0;
- reg pp_row26_14 = 1'h0;
- reg pp_row26_2 = 1'h0;
- reg pp_row26_3 = 1'h0;
- reg pp_row26_4 = 1'h0;
- reg pp_row26_5 = 1'h0;
- reg pp_row26_6 = 1'h0;
- reg pp_row26_7 = 1'h0;
- reg pp_row26_8 = 1'h0;
- reg pp_row26_9 = 1'h0;
- reg pp_row27_0 = 1'h0;
- reg pp_row27_1 = 1'h0;
- reg pp_row27_10 = 1'h0;
- reg pp_row27_11 = 1'h0;
- reg pp_row27_12 = 1'h0;
- reg pp_row27_13 = 1'h0;
- reg pp_row27_2 = 1'h0;
- reg pp_row27_3 = 1'h0;
- reg pp_row27_4 = 1'h0;
- reg pp_row27_5 = 1'h0;
- reg pp_row27_6 = 1'h0;
- reg pp_row27_7 = 1'h0;
- reg pp_row27_8 = 1'h0;
- reg pp_row27_9 = 1'h0;
- reg pp_row28_0 = 1'h0;
- reg pp_row28_1 = 1'h0;
- reg pp_row28_10 = 1'h0;
- reg pp_row28_11 = 1'h0;
- reg pp_row28_12 = 1'h0;
- reg pp_row28_13 = 1'h0;
- reg pp_row28_14 = 1'h0;
- reg pp_row28_15 = 1'h0;
- reg pp_row28_2 = 1'h0;
- reg pp_row28_3 = 1'h0;
- reg pp_row28_4 = 1'h0;
- reg pp_row28_5 = 1'h0;
- reg pp_row28_6 = 1'h0;
- reg pp_row28_7 = 1'h0;
- reg pp_row28_8 = 1'h0;
- reg pp_row28_9 = 1'h0;
- reg pp_row29_0 = 1'h0;
- reg pp_row29_1 = 1'h0;
- reg pp_row29_10 = 1'h0;
- reg pp_row29_11 = 1'h0;
- reg pp_row29_12 = 1'h0;
- reg pp_row29_13 = 1'h0;
- reg pp_row29_14 = 1'h0;
- reg pp_row29_2 = 1'h0;
- reg pp_row29_3 = 1'h0;
- reg pp_row29_4 = 1'h0;
- reg pp_row29_5 = 1'h0;
- reg pp_row29_6 = 1'h0;
- reg pp_row29_7 = 1'h0;
- reg pp_row29_8 = 1'h0;
- reg pp_row29_9 = 1'h0;
- reg pp_row2_0 = 1'h0;
- reg pp_row2_1 = 1'h0;
- reg pp_row2_2 = 1'h0;
- reg pp_row30_0 = 1'h0;
- reg pp_row30_1 = 1'h0;
- reg pp_row30_10 = 1'h0;
- reg pp_row30_11 = 1'h0;
- reg pp_row30_12 = 1'h0;
- reg pp_row30_13 = 1'h0;
- reg pp_row30_14 = 1'h0;
- reg pp_row30_15 = 1'h0;
- reg pp_row30_16 = 1'h0;
- reg pp_row30_2 = 1'h0;
- reg pp_row30_3 = 1'h0;
- reg pp_row30_4 = 1'h0;
- reg pp_row30_5 = 1'h0;
- reg pp_row30_6 = 1'h0;
- reg pp_row30_7 = 1'h0;
- reg pp_row30_8 = 1'h0;
- reg pp_row30_9 = 1'h0;
- reg pp_row31_0 = 1'h0;
- reg pp_row31_1 = 1'h0;
- reg pp_row31_10 = 1'h0;
- reg pp_row31_11 = 1'h0;
- reg pp_row31_12 = 1'h0;
- reg pp_row31_13 = 1'h0;
- reg pp_row31_14 = 1'h0;
- reg pp_row31_15 = 1'h0;
- reg pp_row31_2 = 1'h0;
- reg pp_row31_3 = 1'h0;
- reg pp_row31_4 = 1'h0;
- reg pp_row31_5 = 1'h0;
- reg pp_row31_6 = 1'h0;
- reg pp_row31_7 = 1'h0;
- reg pp_row31_8 = 1'h0;
- reg pp_row31_9 = 1'h0;
- reg pp_row32_0 = 1'h0;
- reg pp_row32_1 = 1'h0;
- reg pp_row32_10 = 1'h0;
- reg pp_row32_11 = 1'h0;
- reg pp_row32_12 = 1'h0;
- reg pp_row32_13 = 1'h0;
- reg pp_row32_14 = 1'h0;
- reg pp_row32_15 = 1'h0;
- reg pp_row32_16 = 1'h0;
- reg pp_row32_2 = 1'h0;
- reg pp_row32_3 = 1'h0;
- reg pp_row32_4 = 1'h0;
- reg pp_row32_5 = 1'h0;
- reg pp_row32_6 = 1'h0;
- reg pp_row32_7 = 1'h0;
- reg pp_row32_8 = 1'h0;
- reg pp_row32_9 = 1'h0;
- reg pp_row33_0 = 1'h0;
- reg pp_row33_1 = 1'h0;
- reg pp_row33_10 = 1'h0;
- reg pp_row33_11 = 1'h0;
- reg pp_row33_12 = 1'h0;
- reg pp_row33_13 = 1'h0;
- reg pp_row33_14 = 1'h0;
- reg pp_row33_15 = 1'h0;
- reg pp_row33_16 = 1'h0;
- reg pp_row33_2 = 1'h0;
- reg pp_row33_3 = 1'h0;
- reg pp_row33_4 = 1'h0;
- reg pp_row33_5 = 1'h0;
- reg pp_row33_6 = 1'h0;
- reg pp_row33_7 = 1'h0;
- reg pp_row33_8 = 1'h0;
- reg pp_row33_9 = 1'h0;
- reg pp_row34_0 = 1'h0;
- reg pp_row34_1 = 1'h0;
- reg pp_row34_10 = 1'h0;
- reg pp_row34_11 = 1'h0;
- reg pp_row34_12 = 1'h0;
- reg pp_row34_13 = 1'h0;
- reg pp_row34_14 = 1'h0;
- reg pp_row34_15 = 1'h0;
- reg pp_row34_16 = 1'h0;
- reg pp_row34_2 = 1'h0;
- reg pp_row34_3 = 1'h0;
- reg pp_row34_4 = 1'h0;
- reg pp_row34_5 = 1'h0;
- reg pp_row34_6 = 1'h0;
- reg pp_row34_7 = 1'h0;
- reg pp_row34_8 = 1'h0;
- reg pp_row34_9 = 1'h0;
- reg pp_row35_0 = 1'h0;
- reg pp_row35_1 = 1'h0;
- reg pp_row35_10 = 1'h0;
- reg pp_row35_11 = 1'h0;
- reg pp_row35_12 = 1'h0;
- reg pp_row35_13 = 1'h0;
- reg pp_row35_14 = 1'h0;
- reg pp_row35_15 = 1'h0;
- reg pp_row35_16 = 1'h0;
- reg pp_row35_2 = 1'h0;
- reg pp_row35_3 = 1'h0;
- reg pp_row35_4 = 1'h0;
- reg pp_row35_5 = 1'h0;
- reg pp_row35_6 = 1'h0;
- reg pp_row35_7 = 1'h0;
- reg pp_row35_8 = 1'h0;
- reg pp_row35_9 = 1'h0;
- wire pp_row36_0;
- reg pp_row36_1 = 1'h0;
- reg pp_row36_10 = 1'h0;
- reg pp_row36_11 = 1'h0;
- reg pp_row36_12 = 1'h0;
- reg pp_row36_13 = 1'h0;
- reg pp_row36_14 = 1'h0;
- reg pp_row36_15 = 1'h0;
- reg pp_row36_2 = 1'h0;
- reg pp_row36_3 = 1'h0;
- reg pp_row36_4 = 1'h0;
- reg pp_row36_5 = 1'h0;
- reg pp_row36_6 = 1'h0;
- reg pp_row36_7 = 1'h0;
- reg pp_row36_8 = 1'h0;
- reg pp_row36_9 = 1'h0;
- reg pp_row37_0 = 1'h0;
- reg pp_row37_1 = 1'h0;
- reg pp_row37_10 = 1'h0;
- reg pp_row37_11 = 1'h0;
- reg pp_row37_12 = 1'h0;
- reg pp_row37_13 = 1'h0;
- reg pp_row37_14 = 1'h0;
- reg pp_row37_2 = 1'h0;
- reg pp_row37_3 = 1'h0;
- reg pp_row37_4 = 1'h0;
- reg pp_row37_5 = 1'h0;
- reg pp_row37_6 = 1'h0;
- reg pp_row37_7 = 1'h0;
- reg pp_row37_8 = 1'h0;
- reg pp_row37_9 = 1'h0;
- wire pp_row38_0;
- reg pp_row38_1 = 1'h0;
- reg pp_row38_10 = 1'h0;
- reg pp_row38_11 = 1'h0;
- reg pp_row38_12 = 1'h0;
- reg pp_row38_13 = 1'h0;
- reg pp_row38_14 = 1'h0;
- reg pp_row38_2 = 1'h0;
- reg pp_row38_3 = 1'h0;
- reg pp_row38_4 = 1'h0;
- reg pp_row38_5 = 1'h0;
- reg pp_row38_6 = 1'h0;
- reg pp_row38_7 = 1'h0;
- reg pp_row38_8 = 1'h0;
- reg pp_row38_9 = 1'h0;
- reg pp_row39_0 = 1'h0;
- reg pp_row39_1 = 1'h0;
- reg pp_row39_10 = 1'h0;
- reg pp_row39_11 = 1'h0;
- reg pp_row39_12 = 1'h0;
- reg pp_row39_13 = 1'h0;
- reg pp_row39_2 = 1'h0;
- reg pp_row39_3 = 1'h0;
- reg pp_row39_4 = 1'h0;
- reg pp_row39_5 = 1'h0;
- reg pp_row39_6 = 1'h0;
- reg pp_row39_7 = 1'h0;
- reg pp_row39_8 = 1'h0;
- reg pp_row39_9 = 1'h0;
- reg pp_row3_0 = 1'h0;
- reg pp_row3_1 = 1'h0;
- wire pp_row40_0;
- reg pp_row40_1 = 1'h0;
- reg pp_row40_10 = 1'h0;
- reg pp_row40_11 = 1'h0;
- reg pp_row40_12 = 1'h0;
- reg pp_row40_13 = 1'h0;
- reg pp_row40_2 = 1'h0;
- reg pp_row40_3 = 1'h0;
- reg pp_row40_4 = 1'h0;
- reg pp_row40_5 = 1'h0;
- reg pp_row40_6 = 1'h0;
- reg pp_row40_7 = 1'h0;
- reg pp_row40_8 = 1'h0;
- reg pp_row40_9 = 1'h0;
- reg pp_row41_0 = 1'h0;
- reg pp_row41_1 = 1'h0;
- reg pp_row41_10 = 1'h0;
- reg pp_row41_11 = 1'h0;
- reg pp_row41_12 = 1'h0;
- reg pp_row41_2 = 1'h0;
- reg pp_row41_3 = 1'h0;
- reg pp_row41_4 = 1'h0;
- reg pp_row41_5 = 1'h0;
- reg pp_row41_6 = 1'h0;
- reg pp_row41_7 = 1'h0;
- reg pp_row41_8 = 1'h0;
- reg pp_row41_9 = 1'h0;
- wire pp_row42_0;
- reg pp_row42_1 = 1'h0;
- reg pp_row42_10 = 1'h0;
- reg pp_row42_11 = 1'h0;
- reg pp_row42_12 = 1'h0;
- reg pp_row42_2 = 1'h0;
- reg pp_row42_3 = 1'h0;
- reg pp_row42_4 = 1'h0;
- reg pp_row42_5 = 1'h0;
- reg pp_row42_6 = 1'h0;
- reg pp_row42_7 = 1'h0;
- reg pp_row42_8 = 1'h0;
- reg pp_row42_9 = 1'h0;
- reg pp_row43_0 = 1'h0;
- reg pp_row43_1 = 1'h0;
- reg pp_row43_10 = 1'h0;
- reg pp_row43_11 = 1'h0;
- reg pp_row43_2 = 1'h0;
- reg pp_row43_3 = 1'h0;
- reg pp_row43_4 = 1'h0;
- reg pp_row43_5 = 1'h0;
- reg pp_row43_6 = 1'h0;
- reg pp_row43_7 = 1'h0;
- reg pp_row43_8 = 1'h0;
- reg pp_row43_9 = 1'h0;
- wire pp_row44_0;
- reg pp_row44_1 = 1'h0;
- reg pp_row44_10 = 1'h0;
- reg pp_row44_11 = 1'h0;
- reg pp_row44_2 = 1'h0;
- reg pp_row44_3 = 1'h0;
- reg pp_row44_4 = 1'h0;
- reg pp_row44_5 = 1'h0;
- reg pp_row44_6 = 1'h0;
- reg pp_row44_7 = 1'h0;
- reg pp_row44_8 = 1'h0;
- reg pp_row44_9 = 1'h0;
- reg pp_row45_0 = 1'h0;
- reg pp_row45_1 = 1'h0;
- reg pp_row45_10 = 1'h0;
- reg pp_row45_2 = 1'h0;
- reg pp_row45_3 = 1'h0;
- reg pp_row45_4 = 1'h0;
- reg pp_row45_5 = 1'h0;
- reg pp_row45_6 = 1'h0;
- reg pp_row45_7 = 1'h0;
- reg pp_row45_8 = 1'h0;
- reg pp_row45_9 = 1'h0;
- wire pp_row46_0;
- reg pp_row46_1 = 1'h0;
- reg pp_row46_10 = 1'h0;
- reg pp_row46_2 = 1'h0;
- reg pp_row46_3 = 1'h0;
- reg pp_row46_4 = 1'h0;
- reg pp_row46_5 = 1'h0;
- reg pp_row46_6 = 1'h0;
- reg pp_row46_7 = 1'h0;
- reg pp_row46_8 = 1'h0;
- reg pp_row46_9 = 1'h0;
- reg pp_row47_0 = 1'h0;
- reg pp_row47_1 = 1'h0;
- reg pp_row47_2 = 1'h0;
- reg pp_row47_3 = 1'h0;
- reg pp_row47_4 = 1'h0;
- reg pp_row47_5 = 1'h0;
- reg pp_row47_6 = 1'h0;
- reg pp_row47_7 = 1'h0;
- reg pp_row47_8 = 1'h0;
- reg pp_row47_9 = 1'h0;
- wire pp_row48_0;
- reg pp_row48_1 = 1'h0;
- reg pp_row48_2 = 1'h0;
- reg pp_row48_3 = 1'h0;
- reg pp_row48_4 = 1'h0;
- reg pp_row48_5 = 1'h0;
- reg pp_row48_6 = 1'h0;
- reg pp_row48_7 = 1'h0;
- reg pp_row48_8 = 1'h0;
- reg pp_row48_9 = 1'h0;
- reg pp_row49_0 = 1'h0;
- reg pp_row49_1 = 1'h0;
- reg pp_row49_2 = 1'h0;
- reg pp_row49_3 = 1'h0;
- reg pp_row49_4 = 1'h0;
- reg pp_row49_5 = 1'h0;
- reg pp_row49_6 = 1'h0;
- reg pp_row49_7 = 1'h0;
- reg pp_row49_8 = 1'h0;
- reg pp_row4_0 = 1'h0;
- reg pp_row4_1 = 1'h0;
- reg pp_row4_2 = 1'h0;
- reg pp_row4_3 = 1'h0;
- wire pp_row50_0;
- reg pp_row50_1 = 1'h0;
- reg pp_row50_2 = 1'h0;
- reg pp_row50_3 = 1'h0;
- reg pp_row50_4 = 1'h0;
- reg pp_row50_5 = 1'h0;
- reg pp_row50_6 = 1'h0;
- reg pp_row50_7 = 1'h0;
- reg pp_row50_8 = 1'h0;
- reg pp_row51_0 = 1'h0;
- reg pp_row51_1 = 1'h0;
- reg pp_row51_2 = 1'h0;
- reg pp_row51_3 = 1'h0;
- reg pp_row51_4 = 1'h0;
- reg pp_row51_5 = 1'h0;
- reg pp_row51_6 = 1'h0;
- reg pp_row51_7 = 1'h0;
- wire pp_row52_0;
- reg pp_row52_1 = 1'h0;
- reg pp_row52_2 = 1'h0;
- reg pp_row52_3 = 1'h0;
- reg pp_row52_4 = 1'h0;
- reg pp_row52_5 = 1'h0;
- reg pp_row52_6 = 1'h0;
- reg pp_row52_7 = 1'h0;
- reg pp_row53_0 = 1'h0;
- reg pp_row53_1 = 1'h0;
- reg pp_row53_2 = 1'h0;
- reg pp_row53_3 = 1'h0;
- reg pp_row53_4 = 1'h0;
- reg pp_row53_5 = 1'h0;
- reg pp_row53_6 = 1'h0;
- wire pp_row54_0;
- reg pp_row54_1 = 1'h0;
- reg pp_row54_2 = 1'h0;
- reg pp_row54_3 = 1'h0;
- reg pp_row54_4 = 1'h0;
- reg pp_row54_5 = 1'h0;
- reg pp_row54_6 = 1'h0;
- reg pp_row55_0 = 1'h0;
- reg pp_row55_1 = 1'h0;
- reg pp_row55_2 = 1'h0;
- reg pp_row55_3 = 1'h0;
- reg pp_row55_4 = 1'h0;
- reg pp_row55_5 = 1'h0;
- wire pp_row56_0;
- reg pp_row56_1 = 1'h0;
- reg pp_row56_2 = 1'h0;
- reg pp_row56_3 = 1'h0;
- reg pp_row56_4 = 1'h0;
- reg pp_row56_5 = 1'h0;
- reg pp_row57_0 = 1'h0;
- reg pp_row57_1 = 1'h0;
- reg pp_row57_2 = 1'h0;
- reg pp_row57_3 = 1'h0;
- reg pp_row57_4 = 1'h0;
- wire pp_row58_0;
- reg pp_row58_1 = 1'h0;
- reg pp_row58_2 = 1'h0;
- reg pp_row58_3 = 1'h0;
- reg pp_row58_4 = 1'h0;
- reg pp_row59_0 = 1'h0;
- reg pp_row59_1 = 1'h0;
- reg pp_row59_2 = 1'h0;
- reg pp_row59_3 = 1'h0;
- reg pp_row5_0 = 1'h0;
- reg pp_row5_1 = 1'h0;
- reg pp_row5_2 = 1'h0;
- wire pp_row60_0;
- reg pp_row60_1 = 1'h0;
- reg pp_row60_2 = 1'h0;
- reg pp_row60_3 = 1'h0;
- reg pp_row61_0 = 1'h0;
- reg pp_row61_1 = 1'h0;
- reg pp_row61_2 = 1'h0;
- wire pp_row62_0;
- reg pp_row62_1 = 1'h0;
- reg pp_row62_2 = 1'h0;
- reg pp_row63_0 = 1'h0;
- reg pp_row63_1 = 1'h0;
- wire pp_row64_0;
- reg pp_row64_1 = 1'h0;
- reg pp_row6_0 = 1'h0;
- reg pp_row6_1 = 1'h0;
- reg pp_row6_2 = 1'h0;
- reg pp_row6_3 = 1'h0;
- reg pp_row6_4 = 1'h0;
- reg pp_row7_0 = 1'h0;
- reg pp_row7_1 = 1'h0;
- reg pp_row7_2 = 1'h0;
- reg pp_row7_3 = 1'h0;
- reg pp_row8_0 = 1'h0;
- reg pp_row8_1 = 1'h0;
- reg pp_row8_2 = 1'h0;
- reg pp_row8_3 = 1'h0;
- reg pp_row8_4 = 1'h0;
- reg pp_row8_5 = 1'h0;
- reg pp_row9_0 = 1'h0;
- reg pp_row9_1 = 1'h0;
- reg pp_row9_2 = 1'h0;
- reg pp_row9_3 = 1'h0;
- reg pp_row9_4 = 1'h0;
- wire [63:0] result;
- (* init = 64'h0000000000000000 *)
- wire [63:0] result_registered;
- input rst;
- wire rst;
- wire s;
- wire \s$1260 ;
- wire \s$1261 ;
- wire \s$1262 ;
- wire \s$1263 ;
- wire \s$1264 ;
- wire \s$1265 ;
- wire \s$1266 ;
- wire \s$1267 ;
- wire \s$1268 ;
- wire \s$1269 ;
- wire \s$1270 ;
- wire \s$1271 ;
- wire \s$1272 ;
- wire \s$1273 ;
- wire \s$1274 ;
- wire \s$1275 ;
- wire \s$1276 ;
- wire \s$1277 ;
- wire \s$1278 ;
- wire \s$1279 ;
- wire \s$1280 ;
- wire \s$1281 ;
- wire \s$1282 ;
- wire \s$1283 ;
- wire \s$1284 ;
- wire \s$1285 ;
- wire \s$1286 ;
- wire \s$1287 ;
- wire \s$1288 ;
- wire \s$1289 ;
- wire \s$1290 ;
- wire \s$1291 ;
- wire \s$1292 ;
- wire \s$1293 ;
- wire \s$1294 ;
- wire \s$1295 ;
- wire \s$1296 ;
- wire \s$1297 ;
- wire \s$1298 ;
- wire \s$1299 ;
- wire \s$1300 ;
- wire \s$1301 ;
- wire \s$1302 ;
- wire \s$1303 ;
- wire \s$1304 ;
- wire \s$1305 ;
- wire \s$1306 ;
- wire \s$1307 ;
- wire \s$1308 ;
- wire \s$1309 ;
- wire \s$1310 ;
- wire \s$1311 ;
- wire \s$1312 ;
- wire \s$1313 ;
- wire \s$1314 ;
- wire \s$1315 ;
- wire \s$1316 ;
- wire \s$1317 ;
- wire \s$1318 ;
- wire \s$1319 ;
- wire \s$1320 ;
- wire \s$1321 ;
- wire \s$2555 ;
- wire \s$2559 ;
- wire \s$2563 ;
- wire \s$2567 ;
- wire \s$2571 ;
- wire \s$2575 ;
- wire \s$2579 ;
- wire \s$2583 ;
- wire \s$2587 ;
- wire \s$2591 ;
- wire \s$2595 ;
- wire \s$2599 ;
- wire \s$2603 ;
- wire \s$2607 ;
- wire \s$2611 ;
- wire \s$2615 ;
- wire \s$2619 ;
- wire \s$2623 ;
- wire \s$2627 ;
- wire \s$2631 ;
- wire \s$2635 ;
- wire \s$2639 ;
- wire \s$2643 ;
- wire \s$2647 ;
- wire \s$2651 ;
- wire \s$2655 ;
- wire \s$2659 ;
- wire \s$2663 ;
- wire \s$2667 ;
- wire \s$2671 ;
- wire \s$2675 ;
- wire \s$2679 ;
- wire \s$2683 ;
- wire \s$2687 ;
- wire \s$2691 ;
- wire \s$2695 ;
- wire \s$2699 ;
- wire \s$2703 ;
- wire \s$2707 ;
- wire \s$2711 ;
- wire \s$2715 ;
- wire \s$2719 ;
- wire \s$2723 ;
- wire \s$2727 ;
- wire \s$2731 ;
- wire \s$2735 ;
- wire \s$2739 ;
- wire \s$2743 ;
- wire \s$2747 ;
- wire \s$2751 ;
- wire \s$2755 ;
- wire \s$2759 ;
- wire \s$2763 ;
- wire \s$2767 ;
- wire \s$2771 ;
- wire \s$2775 ;
- wire \s$2779 ;
- wire \s$2783 ;
- wire \s$2787 ;
- wire \s$2791 ;
- wire \s$2795 ;
- wire \s$2799 ;
- wire \s$2803 ;
- wire \s$2807 ;
- wire \s$2811 ;
- wire \s$2815 ;
- wire \s$2819 ;
- wire \s$2823 ;
- wire \s$2827 ;
- wire \s$2831 ;
- wire \s$2835 ;
- wire \s$2839 ;
- wire \s$2843 ;
- wire \s$2847 ;
- wire \s$2851 ;
- wire \s$2855 ;
- wire \s$2859 ;
- wire \s$2863 ;
- wire \s$2867 ;
- wire \s$2871 ;
- wire \s$2875 ;
- wire \s$2879 ;
- wire \s$2883 ;
- wire \s$2887 ;
- wire \s$2891 ;
- wire \s$2895 ;
- wire \s$2899 ;
- wire \s$2903 ;
- wire \s$2907 ;
- wire \s$2911 ;
- wire \s$2915 ;
- wire \s$2919 ;
- wire \s$2923 ;
- wire \s$2927 ;
- wire \s$2931 ;
- wire \s$2935 ;
- wire \s$2939 ;
- wire \s$2943 ;
- wire \s$2947 ;
- wire \s$2951 ;
- wire \s$2955 ;
- wire \s$2959 ;
- wire \s$2963 ;
- wire \s$2967 ;
- wire \s$2971 ;
- wire \s$2975 ;
- wire \s$2979 ;
- wire \s$2983 ;
- wire \s$2987 ;
- wire \s$2991 ;
- wire \s$2995 ;
- wire \s$2999 ;
- wire \s$3003 ;
- wire \s$3007 ;
- wire \s$3011 ;
- wire \s$3015 ;
- wire \s$3019 ;
- wire \s$3023 ;
- wire \s$3027 ;
- wire \s$3031 ;
- wire \s$3035 ;
- wire \s$3039 ;
- wire \s$3043 ;
- wire \s$3047 ;
- wire \s$3051 ;
- wire \s$3055 ;
- wire \s$3059 ;
- wire \s$3063 ;
- wire \s$3067 ;
- wire \s$3071 ;
- wire \s$3075 ;
- wire \s$3079 ;
- wire \s$3083 ;
- wire \s$3087 ;
- wire \s$3091 ;
- wire \s$3095 ;
- wire \s$3099 ;
- wire \s$3103 ;
- wire \s$3107 ;
- wire \s$3111 ;
- wire \s$3115 ;
- wire \s$3119 ;
- wire \s$3123 ;
- wire \s$3127 ;
- wire \s$3131 ;
- wire \s$3135 ;
- wire \s$3139 ;
- wire \s$3143 ;
- wire \s$3147 ;
- wire \s$3151 ;
- wire \s$3155 ;
- wire \s$3159 ;
- wire \s$3163 ;
- wire \s$3167 ;
- wire \s$3171 ;
- wire \s$3175 ;
- wire \s$3179 ;
- wire \s$3183 ;
- wire \s$3187 ;
- wire \s$3191 ;
- wire \s$3195 ;
- wire \s$3199 ;
- wire \s$3203 ;
- wire \s$3207 ;
- wire \s$3211 ;
- wire \s$3215 ;
- wire \s$3219 ;
- wire \s$3223 ;
- wire \s$3227 ;
- wire \s$3231 ;
- wire \s$3235 ;
- wire \s$3239 ;
- wire \s$3243 ;
- wire \s$3247 ;
- wire \s$3251 ;
- wire \s$3255 ;
- wire \s$3259 ;
- wire \s$3263 ;
- wire \s$3267 ;
- wire \s$3271 ;
- wire \s$3275 ;
- wire \s$3279 ;
- wire \s$3283 ;
- wire \s$3287 ;
- wire \s$3291 ;
- wire \s$3295 ;
- wire \s$3299 ;
- wire \s$3303 ;
- wire \s$3307 ;
- wire \s$3311 ;
- wire \s$3315 ;
- wire \s$3319 ;
- wire \s$3323 ;
- wire \s$3327 ;
- wire \s$3331 ;
- wire \s$3335 ;
- wire \s$3339 ;
- wire \s$3343 ;
- wire \s$3347 ;
- wire \s$3351 ;
- wire \s$3355 ;
- wire \s$3359 ;
- wire \s$3363 ;
- wire \s$3367 ;
- wire \s$3371 ;
- wire \s$3375 ;
- wire \s$3379 ;
- wire \s$3383 ;
- wire \s$3387 ;
- wire \s$3391 ;
- wire \s$3395 ;
- wire \s$3399 ;
- wire \s$3403 ;
- wire \s$3407 ;
- wire \s$3411 ;
- wire \s$3415 ;
- wire \s$3419 ;
- wire \s$3423 ;
- wire \s$3427 ;
- wire \s$3431 ;
- wire \s$3435 ;
- wire \s$3439 ;
- wire \s$3443 ;
- wire \s$3447 ;
- wire \s$3451 ;
- wire \s$3455 ;
- wire \s$3459 ;
- wire \s$3463 ;
- wire \s$3467 ;
- wire \s$3471 ;
- wire \s$3475 ;
- wire \s$3479 ;
- wire \s$3483 ;
- wire \s$3487 ;
- wire \s$3491 ;
- wire \s$3495 ;
- wire \s$3499 ;
- wire \s$3503 ;
- wire \s$3507 ;
- wire \s$3511 ;
- wire \s$3515 ;
- wire \s$3519 ;
- wire \s$3523 ;
- wire \s$3527 ;
- wire \s$3531 ;
- wire \s$3535 ;
- wire \s$3539 ;
- wire \s$3543 ;
- wire \s$3547 ;
- wire \s$3551 ;
- wire \s$3555 ;
- wire \s$3559 ;
- wire \s$3563 ;
- wire \s$3567 ;
- wire \s$3571 ;
- wire \s$3575 ;
- wire \s$3579 ;
- wire \s$3583 ;
- wire \s$3587 ;
- wire \s$3591 ;
- wire \s$3595 ;
- wire \s$3599 ;
- wire \s$3603 ;
- wire \s$3607 ;
- wire \s$3611 ;
- wire \s$3615 ;
- wire \s$3619 ;
- wire \s$3623 ;
- wire \s$3627 ;
- wire \s$3631 ;
- wire \s$3635 ;
- wire \s$3639 ;
- wire \s$3643 ;
- wire \s$3647 ;
- wire \s$3651 ;
- wire \s$3655 ;
- wire \s$3659 ;
- wire \s$3663 ;
- wire \s$3667 ;
- wire \s$3671 ;
- wire \s$3675 ;
- wire \s$3679 ;
- wire \s$3683 ;
- wire \s$3687 ;
- wire \s$3691 ;
- wire \s$3695 ;
- wire \s$3699 ;
- wire \s$3703 ;
- wire \s$3707 ;
- wire \s$3711 ;
- wire \s$3715 ;
- wire \s$3719 ;
- wire \s$3723 ;
- wire \s$3727 ;
- wire \s$3731 ;
- wire \s$3735 ;
- wire \s$3739 ;
- wire \s$3743 ;
- wire \s$3747 ;
- wire \s$3751 ;
- wire \s$3755 ;
- wire \s$3759 ;
- wire \s$3763 ;
- wire \s$3767 ;
- wire \s$3771 ;
- wire \s$3775 ;
- wire \s$3779 ;
- wire \s$3783 ;
- wire \s$3787 ;
- wire \s$3791 ;
- wire \s$3795 ;
- wire \s$3799 ;
- wire \s$3803 ;
- wire \s$3807 ;
- wire \s$3811 ;
- wire \s$3815 ;
- wire \s$3819 ;
- wire \s$3823 ;
- wire \s$3827 ;
- wire \s$3831 ;
- wire \s$3835 ;
- wire \s$3839 ;
- wire \s$3843 ;
- wire \s$3847 ;
- wire \s$3851 ;
- wire \s$3855 ;
- wire \s$3859 ;
- wire \s$3863 ;
- wire \s$3867 ;
- wire \s$3871 ;
- wire \s$3875 ;
- wire \s$3879 ;
- wire \s$3883 ;
- wire \s$3887 ;
- wire \s$3891 ;
- wire \s$3895 ;
- wire \s$3899 ;
- wire \s$3903 ;
- wire \s$3907 ;
- wire \s$3911 ;
- wire \s$3915 ;
- wire \s$3919 ;
- wire \s$3923 ;
- wire \s$3927 ;
- wire \s$3931 ;
- wire \s$3935 ;
- wire \s$3939 ;
- wire \s$3943 ;
- wire \s$3947 ;
- wire \s$3951 ;
- wire \s$3955 ;
- wire \s$3959 ;
- wire \s$3963 ;
- wire \s$3967 ;
- wire \s$3971 ;
- wire \s$3975 ;
- wire \s$3979 ;
- wire \s$3983 ;
- wire \s$3987 ;
- wire \s$3991 ;
- wire \s$3995 ;
- wire \s$3999 ;
- wire \s$4003 ;
- wire \s$4007 ;
- wire \s$4011 ;
- wire \s$4015 ;
- wire \s$4019 ;
- wire \s$4023 ;
- wire \s$4027 ;
- wire \s$4031 ;
- wire \s$4035 ;
- wire \s$4039 ;
- wire \s$4043 ;
- wire \s$4047 ;
- wire \s$4051 ;
- wire \s$4055 ;
- wire \s$4059 ;
- wire \s$4063 ;
- wire \s$4067 ;
- wire \s$4071 ;
- wire \s$4075 ;
- wire \s$4079 ;
- wire \s$4083 ;
- wire \s$4087 ;
- wire \s$4091 ;
- wire \s$4095 ;
- wire \s$4099 ;
- wire \s$4103 ;
- wire \s$4107 ;
- wire \s$4111 ;
- wire \s$4115 ;
- wire \s$4119 ;
- wire \s$4123 ;
- wire \s$4127 ;
- wire \s$4131 ;
- wire \s$4135 ;
- wire \s$4139 ;
- wire \s$4143 ;
- wire \s$4147 ;
- wire \s$4151 ;
- wire \s$4155 ;
- wire \s$4159 ;
- wire \s$4163 ;
- wire \s$4167 ;
- wire \s$4171 ;
- wire \s$4175 ;
- wire \s$4179 ;
- wire \s$4183 ;
- wire \s$4187 ;
- wire \s$4191 ;
- wire \s$4195 ;
- wire \s$4199 ;
- wire \s$4203 ;
- wire \s$4207 ;
- wire \s$4211 ;
- wire \s$4215 ;
- wire \s$4219 ;
- wire \s$4223 ;
- wire \s$4227 ;
- wire \s$4231 ;
- wire \s$4235 ;
- wire \s$4239 ;
- wire \s$4243 ;
- wire \s$4247 ;
- wire \s$4251 ;
- wire \s$4255 ;
- wire \s$4259 ;
- wire \s$4263 ;
- wire \s$4267 ;
- wire \s$4271 ;
- wire \s$4275 ;
- wire \s$4279 ;
- wire \s$4283 ;
- wire \s$4287 ;
- wire \s$4291 ;
- wire \s$4295 ;
- wire \s$4299 ;
- wire \s$4303 ;
- wire \s$4307 ;
- wire \s$4311 ;
- wire \s$4315 ;
- wire \s$4319 ;
- wire \s$4323 ;
- wire \s$4327 ;
- wire \s$4331 ;
- wire \s$4335 ;
- wire \s$4339 ;
- wire \s$4343 ;
- wire \s$4347 ;
- wire \s$4351 ;
- wire \s$4355 ;
- wire \s$4359 ;
- wire \s$4363 ;
- wire \s$4367 ;
- wire \s$4371 ;
- wire \s$4375 ;
- wire \s$4379 ;
- wire \s$4383 ;
- wire \s$4387 ;
- wire \s$4391 ;
- wire \s$4395 ;
- wire \s$4399 ;
- wire sel_0;
- wire \sel_0$1365 ;
- wire \sel_0$1402 ;
- wire \sel_0$1439 ;
- wire \sel_0$1476 ;
- wire \sel_0$1513 ;
- wire \sel_0$1550 ;
- wire \sel_0$1587 ;
- wire \sel_0$1624 ;
- wire \sel_0$1661 ;
- wire \sel_0$1698 ;
- wire \sel_0$1735 ;
- wire \sel_0$1772 ;
- wire \sel_0$1809 ;
- wire \sel_0$1846 ;
- wire \sel_0$1883 ;
- wire \sel_0$1921 ;
- wire sel_1;
- wire \sel_1$1366 ;
- wire \sel_1$1403 ;
- wire \sel_1$1440 ;
- wire \sel_1$1477 ;
- wire \sel_1$1514 ;
- wire \sel_1$1551 ;
- wire \sel_1$1588 ;
- wire \sel_1$1625 ;
- wire \sel_1$1662 ;
- wire \sel_1$1699 ;
- wire \sel_1$1736 ;
- wire \sel_1$1773 ;
- wire \sel_1$1810 ;
- wire \sel_1$1847 ;
- wire \sel_1$1884 ;
- wire \sel_1$1922 ;
- wire sn;
- wire \sn$2558 ;
- wire \sn$2562 ;
- wire \sn$2566 ;
- wire \sn$2570 ;
- wire \sn$2574 ;
- wire \sn$2578 ;
- wire \sn$2582 ;
- wire \sn$2586 ;
- wire \sn$2590 ;
- wire \sn$2594 ;
- wire \sn$2598 ;
- wire \sn$2602 ;
- wire \sn$2606 ;
- wire \sn$2610 ;
- wire \sn$2614 ;
- wire \sn$2618 ;
- wire \sn$2622 ;
- wire \sn$2626 ;
- wire \sn$2630 ;
- wire \sn$2634 ;
- wire \sn$2638 ;
- wire \sn$2642 ;
- wire \sn$2646 ;
- wire \sn$2650 ;
- wire \sn$2654 ;
- wire \sn$2658 ;
- wire \sn$2662 ;
- wire \sn$2666 ;
- wire \sn$2670 ;
- wire \sn$2674 ;
- wire \sn$2678 ;
- wire \sn$2682 ;
- wire \sn$2686 ;
- wire \sn$2690 ;
- wire \sn$2694 ;
- wire \sn$2698 ;
- wire \sn$2702 ;
- wire \sn$2706 ;
- wire \sn$2710 ;
- wire \sn$2714 ;
- wire \sn$2718 ;
- wire \sn$2722 ;
- wire \sn$2726 ;
- wire \sn$2730 ;
- wire \sn$2734 ;
- wire \sn$2738 ;
- wire \sn$2742 ;
- wire \sn$2746 ;
- wire \sn$2750 ;
- wire \sn$2754 ;
- wire \sn$2758 ;
- wire \sn$2762 ;
- wire \sn$2766 ;
- wire \sn$2770 ;
- wire \sn$2774 ;
- wire \sn$2778 ;
- wire \sn$2782 ;
- wire \sn$2786 ;
- wire \sn$2790 ;
- wire \sn$2794 ;
- wire \sn$2798 ;
- wire \sn$2802 ;
- wire \sn$2806 ;
- wire \sn$2810 ;
- wire \sn$2814 ;
- wire \sn$2818 ;
- wire \sn$2822 ;
- wire \sn$2826 ;
- wire \sn$2830 ;
- wire \sn$2834 ;
- wire \sn$2838 ;
- wire \sn$2842 ;
- wire \sn$2846 ;
- wire \sn$2850 ;
- wire \sn$2854 ;
- wire \sn$2858 ;
- wire \sn$2862 ;
- wire \sn$2866 ;
- wire \sn$2870 ;
- wire \sn$2874 ;
- wire \sn$2878 ;
- wire \sn$2882 ;
- wire \sn$2886 ;
- wire \sn$2890 ;
- wire \sn$2894 ;
- wire \sn$2898 ;
- wire \sn$2902 ;
- wire \sn$2906 ;
- wire \sn$2910 ;
- wire \sn$2914 ;
- wire \sn$2918 ;
- wire \sn$2922 ;
- wire \sn$2926 ;
- wire \sn$2930 ;
- wire \sn$2934 ;
- wire \sn$2938 ;
- wire \sn$2942 ;
- wire \sn$2946 ;
- wire \sn$2950 ;
- wire \sn$2954 ;
- wire \sn$2958 ;
- wire \sn$2962 ;
- wire \sn$2966 ;
- wire \sn$2970 ;
- wire \sn$2974 ;
- wire \sn$2978 ;
- wire \sn$2982 ;
- wire \sn$2986 ;
- wire \sn$2990 ;
- wire \sn$2994 ;
- wire \sn$2998 ;
- wire \sn$3002 ;
- wire \sn$3006 ;
- wire \sn$3010 ;
- wire \sn$3014 ;
- wire \sn$3018 ;
- wire \sn$3022 ;
- wire \sn$3026 ;
- wire \sn$3030 ;
- wire \sn$3034 ;
- wire \sn$3038 ;
- wire \sn$3042 ;
- wire \sn$3046 ;
- wire \sn$3050 ;
- wire \sn$3054 ;
- wire \sn$3058 ;
- wire \sn$3062 ;
- wire \sn$3066 ;
- wire \sn$3070 ;
- wire \sn$3074 ;
- wire \sn$3078 ;
- wire \sn$3082 ;
- wire \sn$3086 ;
- wire \sn$3090 ;
- wire \sn$3094 ;
- wire \sn$3098 ;
- wire \sn$3102 ;
- wire \sn$3106 ;
- wire \sn$3110 ;
- wire \sn$3114 ;
- wire \sn$3118 ;
- wire \sn$3122 ;
- wire \sn$3126 ;
- wire \sn$3130 ;
- wire \sn$3134 ;
- wire \sn$3138 ;
- wire \sn$3142 ;
- wire \sn$3146 ;
- wire \sn$3150 ;
- wire \sn$3154 ;
- wire \sn$3158 ;
- wire \sn$3162 ;
- wire \sn$3166 ;
- wire \sn$3170 ;
- wire \sn$3174 ;
- wire \sn$3178 ;
- wire \sn$3182 ;
- wire \sn$3186 ;
- wire \sn$3190 ;
- wire \sn$3194 ;
- wire \sn$3198 ;
- wire \sn$3202 ;
- wire \sn$3206 ;
- wire \sn$3210 ;
- wire \sn$3214 ;
- wire \sn$3218 ;
- wire \sn$3222 ;
- wire \sn$3226 ;
- wire \sn$3230 ;
- wire \sn$3234 ;
- wire \sn$3238 ;
- wire \sn$3242 ;
- wire \sn$3246 ;
- wire \sn$3250 ;
- wire \sn$3254 ;
- wire \sn$3258 ;
- wire \sn$3262 ;
- wire \sn$3266 ;
- wire \sn$3270 ;
- wire \sn$3274 ;
- wire \sn$3278 ;
- wire \sn$3282 ;
- wire \sn$3286 ;
- wire \sn$3290 ;
- wire \sn$3294 ;
- wire \sn$3298 ;
- wire \sn$3302 ;
- wire \sn$3306 ;
- wire \sn$3310 ;
- wire \sn$3314 ;
- wire \sn$3318 ;
- wire \sn$3322 ;
- wire \sn$3326 ;
- wire \sn$3330 ;
- wire \sn$3334 ;
- wire \sn$3338 ;
- wire \sn$3342 ;
- wire \sn$3346 ;
- wire \sn$3350 ;
- wire \sn$3354 ;
- wire \sn$3358 ;
- wire \sn$3362 ;
- wire \sn$3366 ;
- wire \sn$3370 ;
- wire \sn$3374 ;
- wire \sn$3378 ;
- wire \sn$3382 ;
- wire \sn$3386 ;
- wire \sn$3390 ;
- wire \sn$3394 ;
- wire \sn$3398 ;
- wire \sn$3402 ;
- wire \sn$3406 ;
- wire \sn$3410 ;
- wire \sn$3414 ;
- wire \sn$3418 ;
- wire \sn$3422 ;
- wire \sn$3426 ;
- wire \sn$3430 ;
- wire \sn$3434 ;
- wire \sn$3438 ;
- wire \sn$3442 ;
- wire \sn$3446 ;
- wire \sn$3450 ;
- wire \sn$3454 ;
- wire \sn$3458 ;
- wire \sn$3462 ;
- wire \sn$3466 ;
- wire \sn$3470 ;
- wire \sn$3474 ;
- wire \sn$3478 ;
- wire \sn$3482 ;
- wire \sn$3486 ;
- wire \sn$3490 ;
- wire \sn$3494 ;
- wire \sn$3498 ;
- wire \sn$3502 ;
- wire \sn$3506 ;
- wire \sn$3510 ;
- wire \sn$3514 ;
- wire \sn$3518 ;
- wire \sn$3522 ;
- wire \sn$3526 ;
- wire \sn$3530 ;
- wire \sn$3534 ;
- wire \sn$3538 ;
- wire \sn$3542 ;
- wire \sn$3546 ;
- wire \sn$3550 ;
- wire \sn$3554 ;
- wire \sn$3558 ;
- wire \sn$3562 ;
- wire \sn$3566 ;
- wire \sn$3570 ;
- wire \sn$3574 ;
- wire \sn$3578 ;
- wire \sn$3582 ;
- wire \sn$3586 ;
- wire \sn$3590 ;
- wire \sn$3594 ;
- wire \sn$3598 ;
- wire \sn$3602 ;
- wire \sn$3606 ;
- wire \sn$3610 ;
- wire \sn$3614 ;
- wire \sn$3618 ;
- wire \sn$3622 ;
- wire \sn$3626 ;
- wire \sn$3630 ;
- wire \sn$3634 ;
- wire \sn$3638 ;
- wire \sn$3642 ;
- wire \sn$3646 ;
- wire \sn$3650 ;
- wire \sn$3654 ;
- wire \sn$3658 ;
- wire \sn$3662 ;
- wire \sn$3666 ;
- wire \sn$3670 ;
- wire \sn$3674 ;
- wire \sn$3678 ;
- wire \sn$3682 ;
- wire \sn$3686 ;
- wire \sn$3690 ;
- wire \sn$3694 ;
- wire \sn$3698 ;
- wire \sn$3702 ;
- wire \sn$3706 ;
- wire \sn$3710 ;
- wire \sn$3714 ;
- wire \sn$3718 ;
- wire \sn$3722 ;
- wire \sn$3726 ;
- wire \sn$3730 ;
- wire \sn$3734 ;
- wire \sn$3738 ;
- wire \sn$3742 ;
- wire \sn$3746 ;
- wire \sn$3750 ;
- wire \sn$3754 ;
- wire \sn$3758 ;
- wire \sn$3762 ;
- wire \sn$3766 ;
- wire \sn$3770 ;
- wire \sn$3774 ;
- wire \sn$3778 ;
- wire \sn$3782 ;
- wire \sn$3786 ;
- wire \sn$3790 ;
- wire \sn$3794 ;
- wire \sn$3798 ;
- wire \sn$3802 ;
- wire \sn$3806 ;
- wire \sn$3810 ;
- wire \sn$3814 ;
- wire \sn$3818 ;
- wire \sn$3822 ;
- wire \sn$3826 ;
- wire \sn$3830 ;
- wire \sn$3834 ;
- wire \sn$3838 ;
- wire \sn$3842 ;
- wire \sn$3846 ;
- wire \sn$3850 ;
- wire \sn$3854 ;
- wire \sn$3858 ;
- wire \sn$3862 ;
- wire \sn$3866 ;
- wire \sn$3870 ;
- wire \sn$3874 ;
- wire \sn$3878 ;
- wire \sn$3882 ;
- wire \sn$3886 ;
- wire \sn$3890 ;
- wire \sn$3894 ;
- wire \sn$3898 ;
- wire \sn$3902 ;
- wire \sn$3906 ;
- wire \sn$3910 ;
- wire \sn$3914 ;
- wire \sn$3918 ;
- wire \sn$3922 ;
- wire \sn$3926 ;
- wire \sn$3930 ;
- wire \sn$3934 ;
- wire \sn$3938 ;
- wire \sn$3942 ;
- wire \sn$3946 ;
- wire \sn$3950 ;
- wire \sn$3954 ;
- wire \sn$3958 ;
- wire \sn$3962 ;
- wire \sn$3966 ;
- wire \sn$3970 ;
- wire \sn$3974 ;
- wire \sn$3978 ;
- wire \sn$3982 ;
- wire \sn$3986 ;
- wire \sn$3990 ;
- wire \sn$3994 ;
- wire \sn$3998 ;
- wire \sn$4002 ;
- wire \sn$4006 ;
- wire \sn$4010 ;
- wire \sn$4014 ;
- wire \sn$4018 ;
- wire \sn$4022 ;
- wire \sn$4026 ;
- wire \sn$4030 ;
- wire \sn$4034 ;
- wire \sn$4038 ;
- wire \sn$4042 ;
- wire \sn$4046 ;
- wire \sn$4050 ;
- wire \sn$4054 ;
- wire \sn$4058 ;
- wire \sn$4062 ;
- wire \sn$4066 ;
- wire \sn$4070 ;
- wire \sn$4074 ;
- wire \sn$4078 ;
- wire \sn$4082 ;
- wire \sn$4086 ;
- wire \sn$4090 ;
- wire \sn$4094 ;
- wire \sn$4098 ;
- wire \sn$4102 ;
- wire \sn$4106 ;
- wire \sn$4110 ;
- wire \sn$4114 ;
- wire \sn$4118 ;
- wire \sn$4122 ;
- wire \sn$4126 ;
- wire \sn$4130 ;
- wire \sn$4134 ;
- wire \sn$4138 ;
- wire \sn$4142 ;
- wire \sn$4146 ;
- wire \sn$4150 ;
- wire \sn$4154 ;
- wire \sn$4158 ;
- wire \sn$4162 ;
- wire \sn$4166 ;
- wire \sn$4170 ;
- wire \sn$4174 ;
- wire \sn$4178 ;
- wire \sn$4182 ;
- wire \sn$4186 ;
- wire \sn$4190 ;
- wire \sn$4194 ;
- wire \sn$4198 ;
- wire \sn$4202 ;
- wire \sn$4206 ;
- wire \sn$4210 ;
- wire \sn$4214 ;
- wire \sn$4218 ;
- wire \sn$4222 ;
- wire \sn$4226 ;
- wire \sn$4230 ;
- wire \sn$4234 ;
- wire \sn$4238 ;
- wire \sn$4242 ;
- wire \sn$4246 ;
- wire \sn$4250 ;
- wire \sn$4254 ;
- wire \sn$4258 ;
- wire \sn$4262 ;
- wire \sn$4266 ;
- wire \sn$4270 ;
- wire \sn$4274 ;
- wire \sn$4278 ;
- wire \sn$4282 ;
- wire \sn$4286 ;
- wire \sn$4290 ;
- wire \sn$4294 ;
- wire \sn$4298 ;
- wire \sn$4302 ;
- wire \sn$4306 ;
- wire \sn$4310 ;
- wire \sn$4314 ;
- wire \sn$4318 ;
- wire \sn$4322 ;
- wire \sn$4326 ;
- wire \sn$4330 ;
- wire \sn$4334 ;
- wire \sn$4338 ;
- wire \sn$4342 ;
- wire \sn$4346 ;
- wire \sn$4350 ;
- wire \sn$4354 ;
- wire \sn$4358 ;
- wire \sn$4362 ;
- wire \sn$4366 ;
- wire \sn$4370 ;
- wire \sn$4374 ;
- wire \sn$4378 ;
- wire \sn$4382 ;
- wire \sn$4386 ;
- wire \sn$4390 ;
- wire \sn$4394 ;
- wire \sn$4398 ;
- wire \sn$4401 ;
- wire \sn$4403 ;
- wire \sn$4405 ;
- wire \sn$4407 ;
- wire \sn$4409 ;
- wire \sn$4411 ;
- wire \sn$4413 ;
- wire \sn$4415 ;
- wire \sn$4417 ;
- wire \sn$4419 ;
- wire \sn$4421 ;
- wire \sn$4423 ;
- wire \sn$4425 ;
- wire \sn$4427 ;
- wire \sn$4429 ;
- wire \sn$4431 ;
- wire \sn$4433 ;
- wire \sn$4435 ;
- wire \sn$4437 ;
- wire \sn$4439 ;
- wire \sn$4441 ;
- wire \sn$4443 ;
- wire \sn$4445 ;
- wire \sn$4447 ;
- wire \sn$4449 ;
- wire \sn$4451 ;
- wire \sn$4453 ;
- wire \sn$4455 ;
- wire \sn$4457 ;
- wire \sn$4459 ;
- wire \sn$4461 ;
- wire \sn$4463 ;
- wire \sn$4465 ;
- wire \sn$4467 ;
- wire \sn$4469 ;
- wire \sn$4471 ;
- wire \sn$4473 ;
- wire \sn$4475 ;
- wire \sn$4477 ;
- wire \sn$4479 ;
- wire \sn$4481 ;
- wire \sn$4483 ;
- wire \sn$4485 ;
- wire \sn$4487 ;
- wire \sn$4489 ;
- wire \sn$4491 ;
- wire \sn$4493 ;
- wire \sn$4495 ;
- wire \sn$4497 ;
- wire \sn$4499 ;
- wire \sn$4501 ;
- wire \sn$4503 ;
- wire \sn$4505 ;
- wire \sn$4507 ;
- wire \sn$4509 ;
- wire \sn$4511 ;
- wire \sn$4513 ;
- wire \sn$4515 ;
- wire \sn$4517 ;
- wire \sn$4519 ;
- wire \sn$4521 ;
- wire \sn$4523 ;
- wire \sn$4525 ;
- wire t;
- wire \t$1976 ;
- wire \t$1977 ;
- wire \t$1978 ;
- wire \t$1979 ;
- wire \t$1980 ;
- wire \t$1981 ;
- wire \t$1982 ;
- wire \t$1983 ;
- wire \t$1984 ;
- wire \t$1985 ;
- wire \t$1986 ;
- wire \t$1987 ;
- wire \t$1988 ;
- wire \t$1989 ;
- wire \t$1990 ;
- wire \t$1991 ;
- wire \t$1992 ;
- wire \t$1993 ;
- wire \t$1994 ;
- wire \t$1995 ;
- wire \t$1996 ;
- wire \t$1997 ;
- wire \t$1998 ;
- wire \t$1999 ;
- wire \t$2000 ;
- wire \t$2001 ;
- wire \t$2002 ;
- wire \t$2003 ;
- wire \t$2004 ;
- wire \t$2005 ;
- wire \t$2006 ;
- wire \t$2007 ;
- wire \t$2009 ;
- wire \t$2010 ;
- wire \t$2011 ;
- wire \t$2012 ;
- wire \t$2013 ;
- wire \t$2014 ;
- wire \t$2015 ;
- wire \t$2016 ;
- wire \t$2017 ;
- wire \t$2018 ;
- wire \t$2019 ;
- wire \t$2020 ;
- wire \t$2021 ;
- wire \t$2022 ;
- wire \t$2023 ;
- wire \t$2024 ;
- wire \t$2025 ;
- wire \t$2026 ;
- wire \t$2027 ;
- wire \t$2028 ;
- wire \t$2029 ;
- wire \t$2030 ;
- wire \t$2031 ;
- wire \t$2032 ;
- wire \t$2033 ;
- wire \t$2034 ;
- wire \t$2035 ;
- wire \t$2036 ;
- wire \t$2037 ;
- wire \t$2038 ;
- wire \t$2039 ;
- wire \t$2040 ;
- wire \t$2041 ;
- wire \t$2043 ;
- wire \t$2044 ;
- wire \t$2045 ;
- wire \t$2046 ;
- wire \t$2047 ;
- wire \t$2048 ;
- wire \t$2049 ;
- wire \t$2050 ;
- wire \t$2051 ;
- wire \t$2052 ;
- wire \t$2053 ;
- wire \t$2054 ;
- wire \t$2055 ;
- wire \t$2056 ;
- wire \t$2057 ;
- wire \t$2058 ;
- wire \t$2059 ;
- wire \t$2060 ;
- wire \t$2061 ;
- wire \t$2062 ;
- wire \t$2063 ;
- wire \t$2064 ;
- wire \t$2065 ;
- wire \t$2066 ;
- wire \t$2067 ;
- wire \t$2068 ;
- wire \t$2069 ;
- wire \t$2070 ;
- wire \t$2071 ;
- wire \t$2072 ;
- wire \t$2073 ;
- wire \t$2074 ;
- wire \t$2075 ;
- wire \t$2077 ;
- wire \t$2078 ;
- wire \t$2079 ;
- wire \t$2080 ;
- wire \t$2081 ;
- wire \t$2082 ;
- wire \t$2083 ;
- wire \t$2084 ;
- wire \t$2085 ;
- wire \t$2086 ;
- wire \t$2087 ;
- wire \t$2088 ;
- wire \t$2089 ;
- wire \t$2090 ;
- wire \t$2091 ;
- wire \t$2092 ;
- wire \t$2093 ;
- wire \t$2094 ;
- wire \t$2095 ;
- wire \t$2096 ;
- wire \t$2097 ;
- wire \t$2098 ;
- wire \t$2099 ;
- wire \t$2100 ;
- wire \t$2101 ;
- wire \t$2102 ;
- wire \t$2103 ;
- wire \t$2104 ;
- wire \t$2105 ;
- wire \t$2106 ;
- wire \t$2107 ;
- wire \t$2108 ;
- wire \t$2109 ;
- wire \t$2111 ;
- wire \t$2112 ;
- wire \t$2113 ;
- wire \t$2114 ;
- wire \t$2115 ;
- wire \t$2116 ;
- wire \t$2117 ;
- wire \t$2118 ;
- wire \t$2119 ;
- wire \t$2120 ;
- wire \t$2121 ;
- wire \t$2122 ;
- wire \t$2123 ;
- wire \t$2124 ;
- wire \t$2125 ;
- wire \t$2126 ;
- wire \t$2127 ;
- wire \t$2128 ;
- wire \t$2129 ;
- wire \t$2130 ;
- wire \t$2131 ;
- wire \t$2132 ;
- wire \t$2133 ;
- wire \t$2134 ;
- wire \t$2135 ;
- wire \t$2136 ;
- wire \t$2137 ;
- wire \t$2138 ;
- wire \t$2139 ;
- wire \t$2140 ;
- wire \t$2141 ;
- wire \t$2142 ;
- wire \t$2143 ;
- wire \t$2145 ;
- wire \t$2146 ;
- wire \t$2147 ;
- wire \t$2148 ;
- wire \t$2149 ;
- wire \t$2150 ;
- wire \t$2151 ;
- wire \t$2152 ;
- wire \t$2153 ;
- wire \t$2154 ;
- wire \t$2155 ;
- wire \t$2156 ;
- wire \t$2157 ;
- wire \t$2158 ;
- wire \t$2159 ;
- wire \t$2160 ;
- wire \t$2161 ;
- wire \t$2162 ;
- wire \t$2163 ;
- wire \t$2164 ;
- wire \t$2165 ;
- wire \t$2166 ;
- wire \t$2167 ;
- wire \t$2168 ;
- wire \t$2169 ;
- wire \t$2170 ;
- wire \t$2171 ;
- wire \t$2172 ;
- wire \t$2173 ;
- wire \t$2174 ;
- wire \t$2175 ;
- wire \t$2176 ;
- wire \t$2177 ;
- wire \t$2179 ;
- wire \t$2180 ;
- wire \t$2181 ;
- wire \t$2182 ;
- wire \t$2183 ;
- wire \t$2184 ;
- wire \t$2185 ;
- wire \t$2186 ;
- wire \t$2187 ;
- wire \t$2188 ;
- wire \t$2189 ;
- wire \t$2190 ;
- wire \t$2191 ;
- wire \t$2192 ;
- wire \t$2193 ;
- wire \t$2194 ;
- wire \t$2195 ;
- wire \t$2196 ;
- wire \t$2197 ;
- wire \t$2198 ;
- wire \t$2199 ;
- wire \t$2200 ;
- wire \t$2201 ;
- wire \t$2202 ;
- wire \t$2203 ;
- wire \t$2204 ;
- wire \t$2205 ;
- wire \t$2206 ;
- wire \t$2207 ;
- wire \t$2208 ;
- wire \t$2209 ;
- wire \t$2210 ;
- wire \t$2211 ;
- wire \t$2213 ;
- wire \t$2214 ;
- wire \t$2215 ;
- wire \t$2216 ;
- wire \t$2217 ;
- wire \t$2218 ;
- wire \t$2219 ;
- wire \t$2220 ;
- wire \t$2221 ;
- wire \t$2222 ;
- wire \t$2223 ;
- wire \t$2224 ;
- wire \t$2225 ;
- wire \t$2226 ;
- wire \t$2227 ;
- wire \t$2228 ;
- wire \t$2229 ;
- wire \t$2230 ;
- wire \t$2231 ;
- wire \t$2232 ;
- wire \t$2233 ;
- wire \t$2234 ;
- wire \t$2235 ;
- wire \t$2236 ;
- wire \t$2237 ;
- wire \t$2238 ;
- wire \t$2239 ;
- wire \t$2240 ;
- wire \t$2241 ;
- wire \t$2242 ;
- wire \t$2243 ;
- wire \t$2244 ;
- wire \t$2245 ;
- wire \t$2247 ;
- wire \t$2248 ;
- wire \t$2249 ;
- wire \t$2250 ;
- wire \t$2251 ;
- wire \t$2252 ;
- wire \t$2253 ;
- wire \t$2254 ;
- wire \t$2255 ;
- wire \t$2256 ;
- wire \t$2257 ;
- wire \t$2258 ;
- wire \t$2259 ;
- wire \t$2260 ;
- wire \t$2261 ;
- wire \t$2262 ;
- wire \t$2263 ;
- wire \t$2264 ;
- wire \t$2265 ;
- wire \t$2266 ;
- wire \t$2267 ;
- wire \t$2268 ;
- wire \t$2269 ;
- wire \t$2270 ;
- wire \t$2271 ;
- wire \t$2272 ;
- wire \t$2273 ;
- wire \t$2274 ;
- wire \t$2275 ;
- wire \t$2276 ;
- wire \t$2277 ;
- wire \t$2278 ;
- wire \t$2279 ;
- wire \t$2281 ;
- wire \t$2282 ;
- wire \t$2283 ;
- wire \t$2284 ;
- wire \t$2285 ;
- wire \t$2286 ;
- wire \t$2287 ;
- wire \t$2288 ;
- wire \t$2289 ;
- wire \t$2290 ;
- wire \t$2291 ;
- wire \t$2292 ;
- wire \t$2293 ;
- wire \t$2294 ;
- wire \t$2295 ;
- wire \t$2296 ;
- wire \t$2297 ;
- wire \t$2298 ;
- wire \t$2299 ;
- wire \t$2300 ;
- wire \t$2301 ;
- wire \t$2302 ;
- wire \t$2303 ;
- wire \t$2304 ;
- wire \t$2305 ;
- wire \t$2306 ;
- wire \t$2307 ;
- wire \t$2308 ;
- wire \t$2309 ;
- wire \t$2310 ;
- wire \t$2311 ;
- wire \t$2312 ;
- wire \t$2313 ;
- wire \t$2315 ;
- wire \t$2316 ;
- wire \t$2317 ;
- wire \t$2318 ;
- wire \t$2319 ;
- wire \t$2320 ;
- wire \t$2321 ;
- wire \t$2322 ;
- wire \t$2323 ;
- wire \t$2324 ;
- wire \t$2325 ;
- wire \t$2326 ;
- wire \t$2327 ;
- wire \t$2328 ;
- wire \t$2329 ;
- wire \t$2330 ;
- wire \t$2331 ;
- wire \t$2332 ;
- wire \t$2333 ;
- wire \t$2334 ;
- wire \t$2335 ;
- wire \t$2336 ;
- wire \t$2337 ;
- wire \t$2338 ;
- wire \t$2339 ;
- wire \t$2340 ;
- wire \t$2341 ;
- wire \t$2342 ;
- wire \t$2343 ;
- wire \t$2344 ;
- wire \t$2345 ;
- wire \t$2346 ;
- wire \t$2347 ;
- wire \t$2349 ;
- wire \t$2350 ;
- wire \t$2351 ;
- wire \t$2352 ;
- wire \t$2353 ;
- wire \t$2354 ;
- wire \t$2355 ;
- wire \t$2356 ;
- wire \t$2357 ;
- wire \t$2358 ;
- wire \t$2359 ;
- wire \t$2360 ;
- wire \t$2361 ;
- wire \t$2362 ;
- wire \t$2363 ;
- wire \t$2364 ;
- wire \t$2365 ;
- wire \t$2366 ;
- wire \t$2367 ;
- wire \t$2368 ;
- wire \t$2369 ;
- wire \t$2370 ;
- wire \t$2371 ;
- wire \t$2372 ;
- wire \t$2373 ;
- wire \t$2374 ;
- wire \t$2375 ;
- wire \t$2376 ;
- wire \t$2377 ;
- wire \t$2378 ;
- wire \t$2379 ;
- wire \t$2380 ;
- wire \t$2381 ;
- wire \t$2383 ;
- wire \t$2384 ;
- wire \t$2385 ;
- wire \t$2386 ;
- wire \t$2387 ;
- wire \t$2388 ;
- wire \t$2389 ;
- wire \t$2390 ;
- wire \t$2391 ;
- wire \t$2392 ;
- wire \t$2393 ;
- wire \t$2394 ;
- wire \t$2395 ;
- wire \t$2396 ;
- wire \t$2397 ;
- wire \t$2398 ;
- wire \t$2399 ;
- wire \t$2400 ;
- wire \t$2401 ;
- wire \t$2402 ;
- wire \t$2403 ;
- wire \t$2404 ;
- wire \t$2405 ;
- wire \t$2406 ;
- wire \t$2407 ;
- wire \t$2408 ;
- wire \t$2409 ;
- wire \t$2410 ;
- wire \t$2411 ;
- wire \t$2412 ;
- wire \t$2413 ;
- wire \t$2414 ;
- wire \t$2415 ;
- wire \t$2417 ;
- wire \t$2418 ;
- wire \t$2419 ;
- wire \t$2420 ;
- wire \t$2421 ;
- wire \t$2422 ;
- wire \t$2423 ;
- wire \t$2424 ;
- wire \t$2425 ;
- wire \t$2426 ;
- wire \t$2427 ;
- wire \t$2428 ;
- wire \t$2429 ;
- wire \t$2430 ;
- wire \t$2431 ;
- wire \t$2432 ;
- wire \t$2433 ;
- wire \t$2434 ;
- wire \t$2435 ;
- wire \t$2436 ;
- wire \t$2437 ;
- wire \t$2438 ;
- wire \t$2439 ;
- wire \t$2440 ;
- wire \t$2441 ;
- wire \t$2442 ;
- wire \t$2443 ;
- wire \t$2444 ;
- wire \t$2445 ;
- wire \t$2446 ;
- wire \t$2447 ;
- wire \t$2448 ;
- wire \t$2449 ;
- wire \t$2451 ;
- wire \t$2452 ;
- wire \t$2453 ;
- wire \t$2454 ;
- wire \t$2455 ;
- wire \t$2456 ;
- wire \t$2457 ;
- wire \t$2458 ;
- wire \t$2459 ;
- wire \t$2460 ;
- wire \t$2461 ;
- wire \t$2462 ;
- wire \t$2463 ;
- wire \t$2464 ;
- wire \t$2465 ;
- wire \t$2466 ;
- wire \t$2467 ;
- wire \t$2468 ;
- wire \t$2469 ;
- wire \t$2470 ;
- wire \t$2471 ;
- wire \t$2472 ;
- wire \t$2473 ;
- wire \t$2474 ;
- wire \t$2475 ;
- wire \t$2476 ;
- wire \t$2477 ;
- wire \t$2478 ;
- wire \t$2479 ;
- wire \t$2480 ;
- wire \t$2481 ;
- wire \t$2482 ;
- wire \t$2483 ;
- wire \t$2485 ;
- wire \t$2486 ;
- wire \t$2487 ;
- wire \t$2488 ;
- wire \t$2489 ;
- wire \t$2490 ;
- wire \t$2491 ;
- wire \t$2492 ;
- wire \t$2493 ;
- wire \t$2494 ;
- wire \t$2495 ;
- wire \t$2496 ;
- wire \t$2497 ;
- wire \t$2498 ;
- wire \t$2499 ;
- wire \t$2500 ;
- wire \t$2501 ;
- wire \t$2502 ;
- wire \t$2503 ;
- wire \t$2504 ;
- wire \t$2505 ;
- wire \t$2506 ;
- wire \t$2507 ;
- wire \t$2508 ;
- wire \t$2509 ;
- wire \t$2510 ;
- wire \t$2511 ;
- wire \t$2512 ;
- wire \t$2513 ;
- wire \t$2514 ;
- wire \t$2515 ;
- wire \t$2516 ;
- wire \t$2517 ;
- wire \t$2519 ;
- wire \t$2520 ;
- wire \t$2521 ;
- wire \t$2522 ;
- wire \t$2523 ;
- wire \t$2524 ;
- wire \t$2525 ;
- wire \t$2526 ;
- wire \t$2527 ;
- wire \t$2528 ;
- wire \t$2529 ;
- wire \t$2530 ;
- wire \t$2531 ;
- wire \t$2532 ;
- wire \t$2533 ;
- wire \t$2534 ;
- wire \t$2535 ;
- wire \t$2536 ;
- wire \t$2537 ;
- wire \t$2538 ;
- wire \t$2539 ;
- wire \t$2540 ;
- wire \t$2541 ;
- wire \t$2542 ;
- wire \t$2543 ;
- wire \t$2544 ;
- wire \t$2545 ;
- wire \t$2546 ;
- wire \t$2547 ;
- wire \t$2548 ;
- wire \t$2549 ;
- wire \t$2550 ;
- wire \t$2551 ;
- always @(posedge clk)
- a_registered <= a;
- always @(posedge clk)
- b_registered <= b;
- always @(posedge clk)
- pp_row0_0 <= booth_b0_m0;
- always @(posedge clk)
- pp_row0_1 <= a_registered[1];
- always @(posedge clk)
- pp_row1_0 <= booth_b0_m1;
- always @(posedge clk)
- pp_row2_0 <= booth_b0_m2;
- always @(posedge clk)
- pp_row2_1 <= booth_b2_m0;
- always @(posedge clk)
- pp_row2_2 <= a_registered[3];
- always @(posedge clk)
- pp_row3_0 <= booth_b0_m3;
- always @(posedge clk)
- pp_row3_1 <= booth_b2_m1;
- always @(posedge clk)
- pp_row4_0 <= booth_b0_m4;
- always @(posedge clk)
- pp_row4_1 <= booth_b2_m2;
- always @(posedge clk)
- pp_row4_2 <= booth_b4_m0;
- always @(posedge clk)
- pp_row4_3 <= a_registered[5];
- always @(posedge clk)
- pp_row5_0 <= booth_b0_m5;
- always @(posedge clk)
- pp_row5_1 <= booth_b2_m3;
- always @(posedge clk)
- pp_row5_2 <= booth_b4_m1;
- always @(posedge clk)
- pp_row6_0 <= booth_b0_m6;
- always @(posedge clk)
- pp_row6_1 <= booth_b2_m4;
- always @(posedge clk)
- pp_row6_2 <= booth_b4_m2;
- always @(posedge clk)
- pp_row6_3 <= booth_b6_m0;
- always @(posedge clk)
- pp_row6_4 <= a_registered[7];
- always @(posedge clk)
- pp_row7_0 <= booth_b0_m7;
- always @(posedge clk)
- pp_row7_1 <= booth_b2_m5;
- always @(posedge clk)
- pp_row7_2 <= booth_b4_m3;
- always @(posedge clk)
- pp_row7_3 <= booth_b6_m1;
- always @(posedge clk)
- pp_row8_0 <= booth_b0_m8;
- always @(posedge clk)
- pp_row8_1 <= booth_b2_m6;
- always @(posedge clk)
- pp_row8_2 <= booth_b4_m4;
- always @(posedge clk)
- pp_row8_3 <= booth_b6_m2;
- always @(posedge clk)
- pp_row8_4 <= booth_b8_m0;
- always @(posedge clk)
- pp_row8_5 <= a_registered[9];
- always @(posedge clk)
- pp_row9_0 <= booth_b0_m9;
- always @(posedge clk)
- pp_row9_1 <= booth_b2_m7;
- always @(posedge clk)
- pp_row9_2 <= booth_b4_m5;
- always @(posedge clk)
- pp_row9_3 <= booth_b6_m3;
- always @(posedge clk)
- pp_row9_4 <= booth_b8_m1;
- always @(posedge clk)
- pp_row10_0 <= booth_b0_m10;
- always @(posedge clk)
- pp_row10_1 <= booth_b2_m8;
- always @(posedge clk)
- pp_row10_2 <= booth_b4_m6;
- always @(posedge clk)
- pp_row10_3 <= booth_b6_m4;
- always @(posedge clk)
- pp_row10_4 <= booth_b8_m2;
- always @(posedge clk)
- pp_row10_5 <= booth_b10_m0;
- always @(posedge clk)
- pp_row10_6 <= a_registered[11];
- always @(posedge clk)
- pp_row11_0 <= booth_b0_m11;
- always @(posedge clk)
- pp_row11_1 <= booth_b2_m9;
- always @(posedge clk)
- pp_row11_2 <= booth_b4_m7;
- always @(posedge clk)
- pp_row11_3 <= booth_b6_m5;
- always @(posedge clk)
- pp_row11_4 <= booth_b8_m3;
- always @(posedge clk)
- pp_row11_5 <= booth_b10_m1;
- always @(posedge clk)
- pp_row12_0 <= booth_b0_m12;
- always @(posedge clk)
- pp_row12_1 <= booth_b2_m10;
- always @(posedge clk)
- pp_row12_2 <= booth_b4_m8;
- always @(posedge clk)
- pp_row12_3 <= booth_b6_m6;
- always @(posedge clk)
- pp_row12_4 <= booth_b8_m4;
- always @(posedge clk)
- pp_row12_5 <= booth_b10_m2;
- always @(posedge clk)
- pp_row12_6 <= booth_b12_m0;
- always @(posedge clk)
- pp_row12_7 <= a_registered[13];
- always @(posedge clk)
- pp_row13_0 <= booth_b0_m13;
- always @(posedge clk)
- pp_row13_1 <= booth_b2_m11;
- always @(posedge clk)
- pp_row13_2 <= booth_b4_m9;
- always @(posedge clk)
- pp_row13_3 <= booth_b6_m7;
- always @(posedge clk)
- pp_row13_4 <= booth_b8_m5;
- always @(posedge clk)
- pp_row13_5 <= booth_b10_m3;
- always @(posedge clk)
- pp_row13_6 <= booth_b12_m1;
- always @(posedge clk)
- pp_row14_0 <= booth_b0_m14;
- always @(posedge clk)
- pp_row14_1 <= booth_b2_m12;
- always @(posedge clk)
- pp_row14_2 <= booth_b4_m10;
- always @(posedge clk)
- pp_row14_3 <= booth_b6_m8;
- always @(posedge clk)
- pp_row14_4 <= booth_b8_m6;
- always @(posedge clk)
- pp_row14_5 <= booth_b10_m4;
- always @(posedge clk)
- pp_row14_6 <= booth_b12_m2;
- always @(posedge clk)
- pp_row14_7 <= booth_b14_m0;
- always @(posedge clk)
- pp_row14_8 <= a_registered[15];
- always @(posedge clk)
- pp_row15_0 <= booth_b0_m15;
- always @(posedge clk)
- pp_row15_1 <= booth_b2_m13;
- always @(posedge clk)
- pp_row15_2 <= booth_b4_m11;
- always @(posedge clk)
- pp_row15_3 <= booth_b6_m9;
- always @(posedge clk)
- pp_row15_4 <= booth_b8_m7;
- always @(posedge clk)
- pp_row15_5 <= booth_b10_m5;
- always @(posedge clk)
- pp_row15_6 <= booth_b12_m3;
- always @(posedge clk)
- pp_row15_7 <= booth_b14_m1;
- always @(posedge clk)
- pp_row16_0 <= booth_b0_m16;
- always @(posedge clk)
- pp_row16_1 <= booth_b2_m14;
- always @(posedge clk)
- pp_row16_2 <= booth_b4_m12;
- always @(posedge clk)
- pp_row16_3 <= booth_b6_m10;
- always @(posedge clk)
- pp_row16_4 <= booth_b8_m8;
- always @(posedge clk)
- pp_row16_5 <= booth_b10_m6;
- always @(posedge clk)
- pp_row16_6 <= booth_b12_m4;
- always @(posedge clk)
- pp_row16_7 <= booth_b14_m2;
- always @(posedge clk)
- pp_row16_8 <= booth_b16_m0;
- always @(posedge clk)
- pp_row16_9 <= a_registered[17];
- always @(posedge clk)
- pp_row17_0 <= booth_b0_m17;
- always @(posedge clk)
- pp_row17_1 <= booth_b2_m15;
- always @(posedge clk)
- pp_row17_2 <= booth_b4_m13;
- always @(posedge clk)
- pp_row17_3 <= booth_b6_m11;
- always @(posedge clk)
- pp_row17_4 <= booth_b8_m9;
- always @(posedge clk)
- pp_row17_5 <= booth_b10_m7;
- always @(posedge clk)
- pp_row17_6 <= booth_b12_m5;
- always @(posedge clk)
- pp_row17_7 <= booth_b14_m3;
- always @(posedge clk)
- pp_row17_8 <= booth_b16_m1;
- always @(posedge clk)
- pp_row18_0 <= booth_b0_m18;
- always @(posedge clk)
- pp_row18_1 <= booth_b2_m16;
- always @(posedge clk)
- pp_row18_2 <= booth_b4_m14;
- always @(posedge clk)
- pp_row18_3 <= booth_b6_m12;
- always @(posedge clk)
- pp_row18_4 <= booth_b8_m10;
- always @(posedge clk)
- pp_row18_5 <= booth_b10_m8;
- always @(posedge clk)
- pp_row18_6 <= booth_b12_m6;
- always @(posedge clk)
- pp_row18_7 <= booth_b14_m4;
- always @(posedge clk)
- pp_row18_8 <= booth_b16_m2;
- always @(posedge clk)
- pp_row18_9 <= booth_b18_m0;
- always @(posedge clk)
- pp_row18_10 <= a_registered[19];
- always @(posedge clk)
- pp_row19_0 <= booth_b0_m19;
- always @(posedge clk)
- pp_row19_1 <= booth_b2_m17;
- always @(posedge clk)
- pp_row19_2 <= booth_b4_m15;
- always @(posedge clk)
- pp_row19_3 <= booth_b6_m13;
- always @(posedge clk)
- pp_row19_4 <= booth_b8_m11;
- always @(posedge clk)
- pp_row19_5 <= booth_b10_m9;
- always @(posedge clk)
- pp_row19_6 <= booth_b12_m7;
- always @(posedge clk)
- pp_row19_7 <= booth_b14_m5;
- always @(posedge clk)
- pp_row19_8 <= booth_b16_m3;
- always @(posedge clk)
- pp_row19_9 <= booth_b18_m1;
- always @(posedge clk)
- pp_row20_0 <= booth_b0_m20;
- always @(posedge clk)
- pp_row20_1 <= booth_b2_m18;
- always @(posedge clk)
- pp_row20_2 <= booth_b4_m16;
- always @(posedge clk)
- pp_row20_3 <= booth_b6_m14;
- always @(posedge clk)
- pp_row20_4 <= booth_b8_m12;
- always @(posedge clk)
- pp_row20_5 <= booth_b10_m10;
- always @(posedge clk)
- pp_row20_6 <= booth_b12_m8;
- always @(posedge clk)
- pp_row20_7 <= booth_b14_m6;
- always @(posedge clk)
- pp_row20_8 <= booth_b16_m4;
- always @(posedge clk)
- pp_row20_9 <= booth_b18_m2;
- always @(posedge clk)
- pp_row20_10 <= booth_b20_m0;
- always @(posedge clk)
- pp_row20_11 <= a_registered[21];
- always @(posedge clk)
- pp_row21_0 <= booth_b0_m21;
- always @(posedge clk)
- pp_row21_1 <= booth_b2_m19;
- always @(posedge clk)
- pp_row21_2 <= booth_b4_m17;
- always @(posedge clk)
- pp_row21_3 <= booth_b6_m15;
- always @(posedge clk)
- pp_row21_4 <= booth_b8_m13;
- always @(posedge clk)
- pp_row21_5 <= booth_b10_m11;
- always @(posedge clk)
- pp_row21_6 <= booth_b12_m9;
- always @(posedge clk)
- pp_row21_7 <= booth_b14_m7;
- always @(posedge clk)
- pp_row21_8 <= booth_b16_m5;
- always @(posedge clk)
- pp_row21_9 <= booth_b18_m3;
- always @(posedge clk)
- pp_row21_10 <= booth_b20_m1;
- always @(posedge clk)
- pp_row22_0 <= booth_b0_m22;
- always @(posedge clk)
- pp_row22_1 <= booth_b2_m20;
- always @(posedge clk)
- pp_row22_2 <= booth_b4_m18;
- always @(posedge clk)
- pp_row22_3 <= booth_b6_m16;
- always @(posedge clk)
- pp_row22_4 <= booth_b8_m14;
- always @(posedge clk)
- pp_row22_5 <= booth_b10_m12;
- always @(posedge clk)
- pp_row22_6 <= booth_b12_m10;
- always @(posedge clk)
- pp_row22_7 <= booth_b14_m8;
- always @(posedge clk)
- pp_row22_8 <= booth_b16_m6;
- always @(posedge clk)
- pp_row22_9 <= booth_b18_m4;
- always @(posedge clk)
- pp_row22_10 <= booth_b20_m2;
- always @(posedge clk)
- pp_row22_11 <= booth_b22_m0;
- always @(posedge clk)
- pp_row22_12 <= a_registered[23];
- always @(posedge clk)
- pp_row23_0 <= booth_b0_m23;
- always @(posedge clk)
- pp_row23_1 <= booth_b2_m21;
- always @(posedge clk)
- pp_row23_2 <= booth_b4_m19;
- always @(posedge clk)
- pp_row23_3 <= booth_b6_m17;
- always @(posedge clk)
- pp_row23_4 <= booth_b8_m15;
- always @(posedge clk)
- pp_row23_5 <= booth_b10_m13;
- always @(posedge clk)
- pp_row23_6 <= booth_b12_m11;
- always @(posedge clk)
- pp_row23_7 <= booth_b14_m9;
- always @(posedge clk)
- pp_row23_8 <= booth_b16_m7;
- always @(posedge clk)
- pp_row23_9 <= booth_b18_m5;
- always @(posedge clk)
- pp_row23_10 <= booth_b20_m3;
- always @(posedge clk)
- pp_row23_11 <= booth_b22_m1;
- always @(posedge clk)
- pp_row24_0 <= booth_b0_m24;
- always @(posedge clk)
- pp_row24_1 <= booth_b2_m22;
- always @(posedge clk)
- pp_row24_2 <= booth_b4_m20;
- always @(posedge clk)
- pp_row24_3 <= booth_b6_m18;
- always @(posedge clk)
- pp_row24_4 <= booth_b8_m16;
- always @(posedge clk)
- pp_row24_5 <= booth_b10_m14;
- always @(posedge clk)
- pp_row24_6 <= booth_b12_m12;
- always @(posedge clk)
- pp_row24_7 <= booth_b14_m10;
- always @(posedge clk)
- pp_row24_8 <= booth_b16_m8;
- always @(posedge clk)
- pp_row24_9 <= booth_b18_m6;
- always @(posedge clk)
- pp_row24_10 <= booth_b20_m4;
- always @(posedge clk)
- pp_row24_11 <= booth_b22_m2;
- always @(posedge clk)
- pp_row24_12 <= booth_b24_m0;
- always @(posedge clk)
- pp_row24_13 <= a_registered[25];
- always @(posedge clk)
- pp_row25_0 <= booth_b0_m25;
- always @(posedge clk)
- pp_row25_1 <= booth_b2_m23;
- always @(posedge clk)
- pp_row25_2 <= booth_b4_m21;
- always @(posedge clk)
- pp_row25_3 <= booth_b6_m19;
- always @(posedge clk)
- pp_row25_4 <= booth_b8_m17;
- always @(posedge clk)
- pp_row25_5 <= booth_b10_m15;
- always @(posedge clk)
- pp_row25_6 <= booth_b12_m13;
- always @(posedge clk)
- pp_row25_7 <= booth_b14_m11;
- always @(posedge clk)
- pp_row25_8 <= booth_b16_m9;
- always @(posedge clk)
- pp_row25_9 <= booth_b18_m7;
- always @(posedge clk)
- pp_row25_10 <= booth_b20_m5;
- always @(posedge clk)
- pp_row25_11 <= booth_b22_m3;
- always @(posedge clk)
- pp_row25_12 <= booth_b24_m1;
- always @(posedge clk)
- pp_row26_0 <= booth_b0_m26;
- always @(posedge clk)
- pp_row26_1 <= booth_b2_m24;
- always @(posedge clk)
- pp_row26_2 <= booth_b4_m22;
- always @(posedge clk)
- pp_row26_3 <= booth_b6_m20;
- always @(posedge clk)
- pp_row26_4 <= booth_b8_m18;
- always @(posedge clk)
- pp_row26_5 <= booth_b10_m16;
- always @(posedge clk)
- pp_row26_6 <= booth_b12_m14;
- always @(posedge clk)
- pp_row26_7 <= booth_b14_m12;
- always @(posedge clk)
- pp_row26_8 <= booth_b16_m10;
- always @(posedge clk)
- pp_row26_9 <= booth_b18_m8;
- always @(posedge clk)
- pp_row26_10 <= booth_b20_m6;
- always @(posedge clk)
- pp_row26_11 <= booth_b22_m4;
- always @(posedge clk)
- pp_row26_12 <= booth_b24_m2;
- always @(posedge clk)
- pp_row26_13 <= booth_b26_m0;
- always @(posedge clk)
- pp_row26_14 <= a_registered[27];
- always @(posedge clk)
- pp_row27_0 <= booth_b0_m27;
- always @(posedge clk)
- pp_row27_1 <= booth_b2_m25;
- always @(posedge clk)
- pp_row27_2 <= booth_b4_m23;
- always @(posedge clk)
- pp_row27_3 <= booth_b6_m21;
- always @(posedge clk)
- pp_row27_4 <= booth_b8_m19;
- always @(posedge clk)
- pp_row27_5 <= booth_b10_m17;
- always @(posedge clk)
- pp_row27_6 <= booth_b12_m15;
- always @(posedge clk)
- pp_row27_7 <= booth_b14_m13;
- always @(posedge clk)
- pp_row27_8 <= booth_b16_m11;
- always @(posedge clk)
- pp_row27_9 <= booth_b18_m9;
- always @(posedge clk)
- pp_row27_10 <= booth_b20_m7;
- always @(posedge clk)
- pp_row27_11 <= booth_b22_m5;
- always @(posedge clk)
- pp_row27_12 <= booth_b24_m3;
- always @(posedge clk)
- pp_row27_13 <= booth_b26_m1;
- always @(posedge clk)
- pp_row28_0 <= booth_b0_m28;
- always @(posedge clk)
- pp_row28_1 <= booth_b2_m26;
- always @(posedge clk)
- pp_row28_2 <= booth_b4_m24;
- always @(posedge clk)
- pp_row28_3 <= booth_b6_m22;
- always @(posedge clk)
- pp_row28_4 <= booth_b8_m20;
- always @(posedge clk)
- pp_row28_5 <= booth_b10_m18;
- always @(posedge clk)
- pp_row28_6 <= booth_b12_m16;
- always @(posedge clk)
- pp_row28_7 <= booth_b14_m14;
- always @(posedge clk)
- pp_row28_8 <= booth_b16_m12;
- always @(posedge clk)
- pp_row28_9 <= booth_b18_m10;
- always @(posedge clk)
- pp_row28_10 <= booth_b20_m8;
- always @(posedge clk)
- pp_row28_11 <= booth_b22_m6;
- always @(posedge clk)
- pp_row28_12 <= booth_b24_m4;
- always @(posedge clk)
- pp_row28_13 <= booth_b26_m2;
- always @(posedge clk)
- pp_row28_14 <= booth_b28_m0;
- always @(posedge clk)
- pp_row28_15 <= a_registered[29];
- always @(posedge clk)
- pp_row29_0 <= booth_b0_m29;
- always @(posedge clk)
- pp_row29_1 <= booth_b2_m27;
- always @(posedge clk)
- pp_row29_2 <= booth_b4_m25;
- always @(posedge clk)
- pp_row29_3 <= booth_b6_m23;
- always @(posedge clk)
- pp_row29_4 <= booth_b8_m21;
- always @(posedge clk)
- pp_row29_5 <= booth_b10_m19;
- always @(posedge clk)
- pp_row29_6 <= booth_b12_m17;
- always @(posedge clk)
- pp_row29_7 <= booth_b14_m15;
- always @(posedge clk)
- pp_row29_8 <= booth_b16_m13;
- always @(posedge clk)
- pp_row29_9 <= booth_b18_m11;
- always @(posedge clk)
- pp_row29_10 <= booth_b20_m9;
- always @(posedge clk)
- pp_row29_11 <= booth_b22_m7;
- always @(posedge clk)
- pp_row29_12 <= booth_b24_m5;
- always @(posedge clk)
- pp_row29_13 <= booth_b26_m3;
- always @(posedge clk)
- pp_row29_14 <= booth_b28_m1;
- always @(posedge clk)
- pp_row30_0 <= booth_b0_m30;
- always @(posedge clk)
- pp_row30_1 <= booth_b2_m28;
- always @(posedge clk)
- pp_row30_2 <= booth_b4_m26;
- always @(posedge clk)
- pp_row30_3 <= booth_b6_m24;
- always @(posedge clk)
- pp_row30_4 <= booth_b8_m22;
- always @(posedge clk)
- pp_row30_5 <= booth_b10_m20;
- always @(posedge clk)
- pp_row30_6 <= booth_b12_m18;
- always @(posedge clk)
- pp_row30_7 <= booth_b14_m16;
- always @(posedge clk)
- pp_row30_8 <= booth_b16_m14;
- always @(posedge clk)
- pp_row30_9 <= booth_b18_m12;
- always @(posedge clk)
- pp_row30_10 <= booth_b20_m10;
- always @(posedge clk)
- pp_row30_11 <= booth_b22_m8;
- always @(posedge clk)
- pp_row30_12 <= booth_b24_m6;
- always @(posedge clk)
- pp_row30_13 <= booth_b26_m4;
- always @(posedge clk)
- pp_row30_14 <= booth_b28_m2;
- always @(posedge clk)
- pp_row30_15 <= booth_b30_m0;
- always @(posedge clk)
- pp_row30_16 <= a_registered[31];
- always @(posedge clk)
- pp_row31_0 <= booth_b0_m31;
- always @(posedge clk)
- pp_row31_1 <= booth_b2_m29;
- always @(posedge clk)
- pp_row31_2 <= booth_b4_m27;
- always @(posedge clk)
- pp_row31_3 <= booth_b6_m25;
- always @(posedge clk)
- pp_row31_4 <= booth_b8_m23;
- always @(posedge clk)
- pp_row31_5 <= booth_b10_m21;
- always @(posedge clk)
- pp_row31_6 <= booth_b12_m19;
- always @(posedge clk)
- pp_row31_7 <= booth_b14_m17;
- always @(posedge clk)
- pp_row31_8 <= booth_b16_m15;
- always @(posedge clk)
- pp_row31_9 <= booth_b18_m13;
- always @(posedge clk)
- pp_row31_10 <= booth_b20_m11;
- always @(posedge clk)
- pp_row31_11 <= booth_b22_m9;
- always @(posedge clk)
- pp_row31_12 <= booth_b24_m7;
- always @(posedge clk)
- pp_row31_13 <= booth_b26_m5;
- always @(posedge clk)
- pp_row31_14 <= booth_b28_m3;
- always @(posedge clk)
- pp_row31_15 <= booth_b30_m1;
- always @(posedge clk)
- pp_row32_0 <= booth_b0_m32;
- always @(posedge clk)
- pp_row32_1 <= booth_b2_m30;
- always @(posedge clk)
- pp_row32_2 <= booth_b4_m28;
- always @(posedge clk)
- pp_row32_3 <= booth_b6_m26;
- always @(posedge clk)
- pp_row32_4 <= booth_b8_m24;
- always @(posedge clk)
- pp_row32_5 <= booth_b10_m22;
- always @(posedge clk)
- pp_row32_6 <= booth_b12_m20;
- always @(posedge clk)
- pp_row32_7 <= booth_b14_m18;
- always @(posedge clk)
- pp_row32_8 <= booth_b16_m16;
- always @(posedge clk)
- pp_row32_9 <= booth_b18_m14;
- always @(posedge clk)
- pp_row32_10 <= booth_b20_m12;
- always @(posedge clk)
- pp_row32_11 <= booth_b22_m10;
- always @(posedge clk)
- pp_row32_12 <= booth_b24_m8;
- always @(posedge clk)
- pp_row32_13 <= booth_b26_m6;
- always @(posedge clk)
- pp_row32_14 <= booth_b28_m4;
- always @(posedge clk)
- pp_row32_15 <= booth_b30_m2;
- always @(posedge clk)
- pp_row32_16 <= booth_b32_m0;
- always @(posedge clk)
- pp_row33_0 <= a_registered[1];
- always @(posedge clk)
- pp_row33_1 <= booth_b2_m31;
- always @(posedge clk)
- pp_row33_2 <= booth_b4_m29;
- always @(posedge clk)
- pp_row33_3 <= booth_b6_m27;
- always @(posedge clk)
- pp_row33_4 <= booth_b8_m25;
- always @(posedge clk)
- pp_row33_5 <= booth_b10_m23;
- always @(posedge clk)
- pp_row33_6 <= booth_b12_m21;
- always @(posedge clk)
- pp_row33_7 <= booth_b14_m19;
- always @(posedge clk)
- pp_row33_8 <= booth_b16_m17;
- always @(posedge clk)
- pp_row33_9 <= booth_b18_m15;
- always @(posedge clk)
- pp_row33_10 <= booth_b20_m13;
- always @(posedge clk)
- pp_row33_11 <= booth_b22_m11;
- always @(posedge clk)
- pp_row33_12 <= booth_b24_m9;
- always @(posedge clk)
- pp_row33_13 <= booth_b26_m7;
- always @(posedge clk)
- pp_row33_14 <= booth_b28_m5;
- always @(posedge clk)
- pp_row33_15 <= booth_b30_m3;
- always @(posedge clk)
- pp_row33_16 <= booth_b32_m1;
- always @(posedge clk)
- pp_row34_0 <= a_registered[1];
- always @(posedge clk)
- pp_row34_1 <= booth_b2_m32;
- always @(posedge clk)
- pp_row34_2 <= booth_b4_m30;
- always @(posedge clk)
- pp_row34_3 <= booth_b6_m28;
- always @(posedge clk)
- pp_row34_4 <= booth_b8_m26;
- always @(posedge clk)
- pp_row34_5 <= booth_b10_m24;
- always @(posedge clk)
- pp_row34_6 <= booth_b12_m22;
- always @(posedge clk)
- pp_row34_7 <= booth_b14_m20;
- always @(posedge clk)
- pp_row34_8 <= booth_b16_m18;
- always @(posedge clk)
- pp_row34_9 <= booth_b18_m16;
- always @(posedge clk)
- pp_row34_10 <= booth_b20_m14;
- always @(posedge clk)
- pp_row34_11 <= booth_b22_m12;
- always @(posedge clk)
- pp_row34_12 <= booth_b24_m10;
- always @(posedge clk)
- pp_row34_13 <= booth_b26_m8;
- always @(posedge clk)
- pp_row34_14 <= booth_b28_m6;
- always @(posedge clk)
- pp_row34_15 <= booth_b30_m4;
- always @(posedge clk)
- pp_row34_16 <= booth_b32_m2;
- always @(posedge clk)
- pp_row35_0 <= notsign;
- always @(posedge clk)
- pp_row35_1 <= \notsign$686 ;
- always @(posedge clk)
- pp_row35_2 <= booth_b4_m31;
- always @(posedge clk)
- pp_row35_3 <= booth_b6_m29;
- always @(posedge clk)
- pp_row35_4 <= booth_b8_m27;
- always @(posedge clk)
- pp_row35_5 <= booth_b10_m25;
- always @(posedge clk)
- pp_row35_6 <= booth_b12_m23;
- always @(posedge clk)
- pp_row35_7 <= booth_b14_m21;
- always @(posedge clk)
- pp_row35_8 <= booth_b16_m19;
- always @(posedge clk)
- pp_row35_9 <= booth_b18_m17;
- always @(posedge clk)
- pp_row35_10 <= booth_b20_m15;
- always @(posedge clk)
- pp_row35_11 <= booth_b22_m13;
- always @(posedge clk)
- pp_row35_12 <= booth_b24_m11;
- always @(posedge clk)
- pp_row35_13 <= booth_b26_m9;
- always @(posedge clk)
- pp_row35_14 <= booth_b28_m7;
- always @(posedge clk)
- pp_row35_15 <= booth_b30_m5;
- always @(posedge clk)
- pp_row35_16 <= booth_b32_m3;
- always @(posedge clk)
- pp_row36_1 <= booth_b4_m32;
- always @(posedge clk)
- pp_row36_2 <= booth_b6_m30;
- always @(posedge clk)
- pp_row36_3 <= booth_b8_m28;
- always @(posedge clk)
- pp_row36_4 <= booth_b10_m26;
- always @(posedge clk)
- pp_row36_5 <= booth_b12_m24;
- always @(posedge clk)
- pp_row36_6 <= booth_b14_m22;
- always @(posedge clk)
- pp_row36_7 <= booth_b16_m20;
- always @(posedge clk)
- pp_row36_8 <= booth_b18_m18;
- always @(posedge clk)
- pp_row36_9 <= booth_b20_m16;
- always @(posedge clk)
- pp_row36_10 <= booth_b22_m14;
- always @(posedge clk)
- pp_row36_11 <= booth_b24_m12;
- always @(posedge clk)
- pp_row36_12 <= booth_b26_m10;
- always @(posedge clk)
- pp_row36_13 <= booth_b28_m8;
- always @(posedge clk)
- pp_row36_14 <= booth_b30_m6;
- always @(posedge clk)
- pp_row36_15 <= booth_b32_m4;
- always @(posedge clk)
- pp_row37_0 <= \notsign$748 ;
- always @(posedge clk)
- pp_row37_1 <= booth_b6_m31;
- always @(posedge clk)
- pp_row37_2 <= booth_b8_m29;
- always @(posedge clk)
- pp_row37_3 <= booth_b10_m27;
- always @(posedge clk)
- pp_row37_4 <= booth_b12_m25;
- always @(posedge clk)
- pp_row37_5 <= booth_b14_m23;
- always @(posedge clk)
- pp_row37_6 <= booth_b16_m21;
- always @(posedge clk)
- pp_row37_7 <= booth_b18_m19;
- always @(posedge clk)
- pp_row37_8 <= booth_b20_m17;
- always @(posedge clk)
- pp_row37_9 <= booth_b22_m15;
- always @(posedge clk)
- pp_row37_10 <= booth_b24_m13;
- always @(posedge clk)
- pp_row37_11 <= booth_b26_m11;
- always @(posedge clk)
- pp_row37_12 <= booth_b28_m9;
- always @(posedge clk)
- pp_row37_13 <= booth_b30_m7;
- always @(posedge clk)
- pp_row37_14 <= booth_b32_m5;
- always @(posedge clk)
- pp_row38_1 <= booth_b6_m32;
- always @(posedge clk)
- pp_row38_2 <= booth_b8_m30;
- always @(posedge clk)
- pp_row38_3 <= booth_b10_m28;
- always @(posedge clk)
- pp_row38_4 <= booth_b12_m26;
- always @(posedge clk)
- pp_row38_5 <= booth_b14_m24;
- always @(posedge clk)
- pp_row38_6 <= booth_b16_m22;
- always @(posedge clk)
- pp_row38_7 <= booth_b18_m20;
- always @(posedge clk)
- pp_row38_8 <= booth_b20_m18;
- always @(posedge clk)
- pp_row38_9 <= booth_b22_m16;
- always @(posedge clk)
- pp_row38_10 <= booth_b24_m14;
- always @(posedge clk)
- pp_row38_11 <= booth_b26_m12;
- always @(posedge clk)
- pp_row38_12 <= booth_b28_m10;
- always @(posedge clk)
- pp_row38_13 <= booth_b30_m8;
- always @(posedge clk)
- pp_row38_14 <= booth_b32_m6;
- always @(posedge clk)
- pp_row39_0 <= \notsign$806 ;
- always @(posedge clk)
- pp_row39_1 <= booth_b8_m31;
- always @(posedge clk)
- pp_row39_2 <= booth_b10_m29;
- always @(posedge clk)
- pp_row39_3 <= booth_b12_m27;
- always @(posedge clk)
- pp_row39_4 <= booth_b14_m25;
- always @(posedge clk)
- pp_row39_5 <= booth_b16_m23;
- always @(posedge clk)
- pp_row39_6 <= booth_b18_m21;
- always @(posedge clk)
- pp_row39_7 <= booth_b20_m19;
- always @(posedge clk)
- pp_row39_8 <= booth_b22_m17;
- always @(posedge clk)
- pp_row39_9 <= booth_b24_m15;
- always @(posedge clk)
- pp_row39_10 <= booth_b26_m13;
- always @(posedge clk)
- pp_row39_11 <= booth_b28_m11;
- always @(posedge clk)
- pp_row39_12 <= booth_b30_m9;
- always @(posedge clk)
- pp_row39_13 <= booth_b32_m7;
- always @(posedge clk)
- pp_row40_1 <= booth_b8_m32;
- always @(posedge clk)
- pp_row40_2 <= booth_b10_m30;
- always @(posedge clk)
- pp_row40_3 <= booth_b12_m28;
- always @(posedge clk)
- pp_row40_4 <= booth_b14_m26;
- always @(posedge clk)
- pp_row40_5 <= booth_b16_m24;
- always @(posedge clk)
- pp_row40_6 <= booth_b18_m22;
- always @(posedge clk)
- pp_row40_7 <= booth_b20_m20;
- always @(posedge clk)
- pp_row40_8 <= booth_b22_m18;
- always @(posedge clk)
- pp_row40_9 <= booth_b24_m16;
- always @(posedge clk)
- pp_row40_10 <= booth_b26_m14;
- always @(posedge clk)
- pp_row40_11 <= booth_b28_m12;
- always @(posedge clk)
- pp_row40_12 <= booth_b30_m10;
- always @(posedge clk)
- pp_row40_13 <= booth_b32_m8;
- always @(posedge clk)
- pp_row41_0 <= \notsign$860 ;
- always @(posedge clk)
- pp_row41_1 <= booth_b10_m31;
- always @(posedge clk)
- pp_row41_2 <= booth_b12_m29;
- always @(posedge clk)
- pp_row41_3 <= booth_b14_m27;
- always @(posedge clk)
- pp_row41_4 <= booth_b16_m25;
- always @(posedge clk)
- pp_row41_5 <= booth_b18_m23;
- always @(posedge clk)
- pp_row41_6 <= booth_b20_m21;
- always @(posedge clk)
- pp_row41_7 <= booth_b22_m19;
- always @(posedge clk)
- pp_row41_8 <= booth_b24_m17;
- always @(posedge clk)
- pp_row41_9 <= booth_b26_m15;
- always @(posedge clk)
- pp_row41_10 <= booth_b28_m13;
- always @(posedge clk)
- pp_row41_11 <= booth_b30_m11;
- always @(posedge clk)
- pp_row41_12 <= booth_b32_m9;
- always @(posedge clk)
- pp_row42_1 <= booth_b10_m32;
- always @(posedge clk)
- pp_row42_2 <= booth_b12_m30;
- always @(posedge clk)
- pp_row42_3 <= booth_b14_m28;
- always @(posedge clk)
- pp_row42_4 <= booth_b16_m26;
- always @(posedge clk)
- pp_row42_5 <= booth_b18_m24;
- always @(posedge clk)
- pp_row42_6 <= booth_b20_m22;
- always @(posedge clk)
- pp_row42_7 <= booth_b22_m20;
- always @(posedge clk)
- pp_row42_8 <= booth_b24_m18;
- always @(posedge clk)
- pp_row42_9 <= booth_b26_m16;
- always @(posedge clk)
- pp_row42_10 <= booth_b28_m14;
- always @(posedge clk)
- pp_row42_11 <= booth_b30_m12;
- always @(posedge clk)
- pp_row42_12 <= booth_b32_m10;
- always @(posedge clk)
- pp_row43_0 <= \notsign$910 ;
- always @(posedge clk)
- pp_row43_1 <= booth_b12_m31;
- always @(posedge clk)
- pp_row43_2 <= booth_b14_m29;
- always @(posedge clk)
- pp_row43_3 <= booth_b16_m27;
- always @(posedge clk)
- pp_row43_4 <= booth_b18_m25;
- always @(posedge clk)
- pp_row43_5 <= booth_b20_m23;
- always @(posedge clk)
- pp_row43_6 <= booth_b22_m21;
- always @(posedge clk)
- pp_row43_7 <= booth_b24_m19;
- always @(posedge clk)
- pp_row43_8 <= booth_b26_m17;
- always @(posedge clk)
- pp_row43_9 <= booth_b28_m15;
- always @(posedge clk)
- pp_row43_10 <= booth_b30_m13;
- always @(posedge clk)
- pp_row43_11 <= booth_b32_m11;
- always @(posedge clk)
- pp_row44_1 <= booth_b12_m32;
- always @(posedge clk)
- pp_row44_2 <= booth_b14_m30;
- always @(posedge clk)
- pp_row44_3 <= booth_b16_m28;
- always @(posedge clk)
- pp_row44_4 <= booth_b18_m26;
- always @(posedge clk)
- pp_row44_5 <= booth_b20_m24;
- always @(posedge clk)
- pp_row44_6 <= booth_b22_m22;
- always @(posedge clk)
- pp_row44_7 <= booth_b24_m20;
- always @(posedge clk)
- pp_row44_8 <= booth_b26_m18;
- always @(posedge clk)
- pp_row44_9 <= booth_b28_m16;
- always @(posedge clk)
- pp_row44_10 <= booth_b30_m14;
- always @(posedge clk)
- pp_row44_11 <= booth_b32_m12;
- always @(posedge clk)
- pp_row45_0 <= \notsign$956 ;
- always @(posedge clk)
- pp_row45_1 <= booth_b14_m31;
- always @(posedge clk)
- pp_row45_2 <= booth_b16_m29;
- always @(posedge clk)
- pp_row45_3 <= booth_b18_m27;
- always @(posedge clk)
- pp_row45_4 <= booth_b20_m25;
- always @(posedge clk)
- pp_row45_5 <= booth_b22_m23;
- always @(posedge clk)
- pp_row45_6 <= booth_b24_m21;
- always @(posedge clk)
- pp_row45_7 <= booth_b26_m19;
- always @(posedge clk)
- pp_row45_8 <= booth_b28_m17;
- always @(posedge clk)
- pp_row45_9 <= booth_b30_m15;
- always @(posedge clk)
- pp_row45_10 <= booth_b32_m13;
- always @(posedge clk)
- pp_row46_1 <= booth_b14_m32;
- always @(posedge clk)
- pp_row46_2 <= booth_b16_m30;
- always @(posedge clk)
- pp_row46_3 <= booth_b18_m28;
- always @(posedge clk)
- pp_row46_4 <= booth_b20_m26;
- always @(posedge clk)
- pp_row46_5 <= booth_b22_m24;
- always @(posedge clk)
- pp_row46_6 <= booth_b24_m22;
- always @(posedge clk)
- pp_row46_7 <= booth_b26_m20;
- always @(posedge clk)
- pp_row46_8 <= booth_b28_m18;
- always @(posedge clk)
- pp_row46_9 <= booth_b30_m16;
- always @(posedge clk)
- pp_row46_10 <= booth_b32_m14;
- always @(posedge clk)
- pp_row47_0 <= \notsign$998 ;
- always @(posedge clk)
- pp_row47_1 <= booth_b16_m31;
- always @(posedge clk)
- pp_row47_2 <= booth_b18_m29;
- always @(posedge clk)
- pp_row47_3 <= booth_b20_m27;
- always @(posedge clk)
- pp_row47_4 <= booth_b22_m25;
- always @(posedge clk)
- pp_row47_5 <= booth_b24_m23;
- always @(posedge clk)
- pp_row47_6 <= booth_b26_m21;
- always @(posedge clk)
- pp_row47_7 <= booth_b28_m19;
- always @(posedge clk)
- pp_row47_8 <= booth_b30_m17;
- always @(posedge clk)
- pp_row47_9 <= booth_b32_m15;
- always @(posedge clk)
- pp_row48_1 <= booth_b16_m32;
- always @(posedge clk)
- pp_row48_2 <= booth_b18_m30;
- always @(posedge clk)
- pp_row48_3 <= booth_b20_m28;
- always @(posedge clk)
- pp_row48_4 <= booth_b22_m26;
- always @(posedge clk)
- pp_row48_5 <= booth_b24_m24;
- always @(posedge clk)
- pp_row48_6 <= booth_b26_m22;
- always @(posedge clk)
- pp_row48_7 <= booth_b28_m20;
- always @(posedge clk)
- pp_row48_8 <= booth_b30_m18;
- always @(posedge clk)
- pp_row48_9 <= booth_b32_m16;
- always @(posedge clk)
- pp_row49_0 <= \notsign$1036 ;
- always @(posedge clk)
- pp_row49_1 <= booth_b18_m31;
- always @(posedge clk)
- pp_row49_2 <= booth_b20_m29;
- always @(posedge clk)
- pp_row49_3 <= booth_b22_m27;
- always @(posedge clk)
- pp_row49_4 <= booth_b24_m25;
- always @(posedge clk)
- pp_row49_5 <= booth_b26_m23;
- always @(posedge clk)
- pp_row49_6 <= booth_b28_m21;
- always @(posedge clk)
- pp_row49_7 <= booth_b30_m19;
- always @(posedge clk)
- pp_row49_8 <= booth_b32_m17;
- always @(posedge clk)
- pp_row50_1 <= booth_b18_m32;
- always @(posedge clk)
- pp_row50_2 <= booth_b20_m30;
- always @(posedge clk)
- pp_row50_3 <= booth_b22_m28;
- always @(posedge clk)
- pp_row50_4 <= booth_b24_m26;
- always @(posedge clk)
- pp_row50_5 <= booth_b26_m24;
- always @(posedge clk)
- pp_row50_6 <= booth_b28_m22;
- always @(posedge clk)
- pp_row50_7 <= booth_b30_m20;
- always @(posedge clk)
- pp_row50_8 <= booth_b32_m18;
- always @(posedge clk)
- pp_row51_0 <= \notsign$1070 ;
- always @(posedge clk)
- pp_row51_1 <= booth_b20_m31;
- always @(posedge clk)
- pp_row51_2 <= booth_b22_m29;
- always @(posedge clk)
- pp_row51_3 <= booth_b24_m27;
- always @(posedge clk)
- pp_row51_4 <= booth_b26_m25;
- always @(posedge clk)
- pp_row51_5 <= booth_b28_m23;
- always @(posedge clk)
- pp_row51_6 <= booth_b30_m21;
- always @(posedge clk)
- pp_row51_7 <= booth_b32_m19;
- always @(posedge clk)
- pp_row52_1 <= booth_b20_m32;
- always @(posedge clk)
- pp_row52_2 <= booth_b22_m30;
- always @(posedge clk)
- pp_row52_3 <= booth_b24_m28;
- always @(posedge clk)
- pp_row52_4 <= booth_b26_m26;
- always @(posedge clk)
- pp_row52_5 <= booth_b28_m24;
- always @(posedge clk)
- pp_row52_6 <= booth_b30_m22;
- always @(posedge clk)
- pp_row52_7 <= booth_b32_m20;
- always @(posedge clk)
- pp_row53_0 <= \notsign$1100 ;
- always @(posedge clk)
- pp_row53_1 <= booth_b22_m31;
- always @(posedge clk)
- pp_row53_2 <= booth_b24_m29;
- always @(posedge clk)
- pp_row53_3 <= booth_b26_m27;
- always @(posedge clk)
- pp_row53_4 <= booth_b28_m25;
- always @(posedge clk)
- pp_row53_5 <= booth_b30_m23;
- always @(posedge clk)
- pp_row53_6 <= booth_b32_m21;
- always @(posedge clk)
- pp_row54_1 <= booth_b22_m32;
- always @(posedge clk)
- pp_row54_2 <= booth_b24_m30;
- always @(posedge clk)
- pp_row54_3 <= booth_b26_m28;
- always @(posedge clk)
- pp_row54_4 <= booth_b28_m26;
- always @(posedge clk)
- pp_row54_5 <= booth_b30_m24;
- always @(posedge clk)
- pp_row54_6 <= booth_b32_m22;
- always @(posedge clk)
- pp_row55_0 <= \notsign$1126 ;
- always @(posedge clk)
- pp_row55_1 <= booth_b24_m31;
- always @(posedge clk)
- pp_row55_2 <= booth_b26_m29;
- always @(posedge clk)
- pp_row55_3 <= booth_b28_m27;
- always @(posedge clk)
- pp_row55_4 <= booth_b30_m25;
- always @(posedge clk)
- pp_row55_5 <= booth_b32_m23;
- always @(posedge clk)
- pp_row56_1 <= booth_b24_m32;
- always @(posedge clk)
- pp_row56_2 <= booth_b26_m30;
- always @(posedge clk)
- pp_row56_3 <= booth_b28_m28;
- always @(posedge clk)
- pp_row56_4 <= booth_b30_m26;
- always @(posedge clk)
- pp_row56_5 <= booth_b32_m24;
- always @(posedge clk)
- pp_row57_0 <= \notsign$1148 ;
- always @(posedge clk)
- pp_row57_1 <= booth_b26_m31;
- always @(posedge clk)
- pp_row57_2 <= booth_b28_m29;
- always @(posedge clk)
- pp_row57_3 <= booth_b30_m27;
- always @(posedge clk)
- pp_row57_4 <= booth_b32_m25;
- always @(posedge clk)
- pp_row58_1 <= booth_b26_m32;
- always @(posedge clk)
- pp_row58_2 <= booth_b28_m30;
- always @(posedge clk)
- pp_row58_3 <= booth_b30_m28;
- always @(posedge clk)
- pp_row58_4 <= booth_b32_m26;
- always @(posedge clk)
- pp_row59_0 <= \notsign$1166 ;
- always @(posedge clk)
- pp_row59_1 <= booth_b28_m31;
- always @(posedge clk)
- pp_row59_2 <= booth_b30_m29;
- always @(posedge clk)
- pp_row59_3 <= booth_b32_m27;
- always @(posedge clk)
- pp_row60_1 <= booth_b28_m32;
- always @(posedge clk)
- pp_row60_2 <= booth_b30_m30;
- always @(posedge clk)
- pp_row60_3 <= booth_b32_m28;
- always @(posedge clk)
- pp_row61_0 <= \notsign$1180 ;
- always @(posedge clk)
- pp_row61_1 <= booth_b30_m31;
- always @(posedge clk)
- pp_row61_2 <= booth_b32_m29;
- always @(posedge clk)
- pp_row62_1 <= booth_b30_m32;
- always @(posedge clk)
- pp_row62_2 <= booth_b32_m30;
- always @(posedge clk)
- pp_row63_0 <= \notsign$1190 ;
- always @(posedge clk)
- pp_row63_1 <= booth_b32_m31;
- always @(posedge clk)
- pp_row64_1 <= booth_b32_m32;
- always @(posedge clk)
- final_a_registered <= { \c$1256 , \c$1255 , \c$1254 , \c$1253 , \c$1252 , \c$1251 , \c$1250 , \c$1249 , \c$1248 , \c$1247 , \c$1246 , \c$1245 , \c$1244 , \c$1243 , \c$1242 , \c$1241 , \c$1240 , \c$1239 , \c$1238 , \c$1237 , \c$1236 , \c$1235 , \c$1234 , \c$1233 , \c$1232 , \c$1231 , \c$1230 , \c$1229 , \c$1228 , \c$1227 , \c$1226 , \c$1225 , \c$1224 , \c$1223 , \c$1222 , \c$1221 , \c$1220 , \c$1219 , \c$1218 , \c$1217 , \c$1216 , \c$1215 , \c$1214 , \c$1213 , \c$1212 , \c$1211 , \c$1210 , \c$1209 , \c$1208 , \c$1207 , \c$1206 , \c$1205 , \c$1204 , \c$1203 , \c$1202 , \c$1201 , \c$1200 , \c$1199 , \c$1198 , \c$1197 , c, pp_row2_2, pp_row1_0, pp_row0_0 };
- always @(posedge clk)
- final_b_registered <= { \s$1320 , \s$1319 , \s$1318 , \s$1317 , \s$1316 , \s$1315 , \s$1314 , \s$1313 , \s$1312 , \s$1311 , \s$1310 , \s$1309 , \s$1308 , \s$1307 , \s$1306 , \s$1305 , \s$1304 , \s$1303 , \s$1302 , \s$1301 , \s$1300 , \s$1299 , \s$1298 , \s$1297 , \s$1296 , \s$1295 , \s$1294 , \s$1293 , \s$1292 , \s$1291 , \s$1290 , \s$1289 , \s$1288 , \s$1287 , \s$1286 , \s$1285 , \s$1284 , \s$1283 , \s$1282 , \s$1281 , \s$1280 , \s$1279 , \s$1278 , \s$1277 , \s$1276 , \s$1275 , \s$1274 , \s$1273 , \s$1272 , \s$1271 , \s$1270 , \s$1269 , \s$1268 , \s$1267 , \s$1266 , \s$1265 , \s$1264 , \s$1263 , \s$1262 , \s$1261 , \s$1260 , s, 1'h0, pp_row0_1 };
- always @(posedge clk)
- o <= { \$117 , \$116 , \$115 , \$114 , \$113 , \$112 , \$111 , \$110 , \$109 , \$108 , \$107 , \$106 , \$105 , \$104 , \$103 , \$102 , \$101 , \$100 , \$99 , \$98 , \$97 , \$96 , \$95 , \$94 , \$93 , \$92 , \$91 , \$90 , \$89 , \$88 , \$87 , \$86 , \$85 , \$84 , \$83 , \$82 , \$81 , \$80 , \$79 , \$78 , \$77 , \$76 , \$75 , \$74 , \$73 , \$72 , \$71 , \$70 , \$69 , \$68 , \$67 , \$66 , \$65 , \$64 , \$63 , \$62 , \$61 , \$60 , \$59 , \$58 , \$57 , \$56 , \$55 , \$54 };
- XOR2x1_ASAP7_75t_R \U$1000 (
- .A(\t$2197 ),
- .B(a_registered[13]),
- .Y(booth_b12_m18)
- );
- AO22x1_ASAP7_75t_R \U$1001 (
- .A1(b_registered[18]),
- .A2(\sel_0$1550 ),
- .B1(b_registered[19]),
- .B2(\sel_1$1551 ),
- .Y(\t$2198 )
- );
- XOR2x1_ASAP7_75t_R \U$1002 (
- .A(\t$2198 ),
- .B(a_registered[13]),
- .Y(booth_b12_m19)
- );
- AO22x1_ASAP7_75t_R \U$1003 (
- .A1(b_registered[19]),
- .A2(\sel_0$1550 ),
- .B1(b_registered[20]),
- .B2(\sel_1$1551 ),
- .Y(\t$2199 )
- );
- XOR2x1_ASAP7_75t_R \U$1004 (
- .A(\t$2199 ),
- .B(a_registered[13]),
- .Y(booth_b12_m20)
- );
- AO22x1_ASAP7_75t_R \U$1005 (
- .A1(b_registered[20]),
- .A2(\sel_0$1550 ),
- .B1(b_registered[21]),
- .B2(\sel_1$1551 ),
- .Y(\t$2200 )
- );
- XOR2x1_ASAP7_75t_R \U$1006 (
- .A(\t$2200 ),
- .B(a_registered[13]),
- .Y(booth_b12_m21)
- );
- AO22x1_ASAP7_75t_R \U$1007 (
- .A1(b_registered[21]),
- .A2(\sel_0$1550 ),
- .B1(b_registered[22]),
- .B2(\sel_1$1551 ),
- .Y(\t$2201 )
- );
- XOR2x1_ASAP7_75t_R \U$1008 (
- .A(\t$2201 ),
- .B(a_registered[13]),
- .Y(booth_b12_m22)
- );
- AO22x1_ASAP7_75t_R \U$1009 (
- .A1(b_registered[22]),
- .A2(\sel_0$1550 ),
- .B1(b_registered[23]),
- .B2(\sel_1$1551 ),
- .Y(\t$2202 )
- );
- XOR2x1_ASAP7_75t_R \U$1010 (
- .A(\t$2202 ),
- .B(a_registered[13]),
- .Y(booth_b12_m23)
- );
- AO22x1_ASAP7_75t_R \U$1011 (
- .A1(b_registered[23]),
- .A2(\sel_0$1550 ),
- .B1(b_registered[24]),
- .B2(\sel_1$1551 ),
- .Y(\t$2203 )
- );
- XOR2x1_ASAP7_75t_R \U$1012 (
- .A(\t$2203 ),
- .B(a_registered[13]),
- .Y(booth_b12_m24)
- );
- AO22x1_ASAP7_75t_R \U$1013 (
- .A1(b_registered[24]),
- .A2(\sel_0$1550 ),
- .B1(b_registered[25]),
- .B2(\sel_1$1551 ),
- .Y(\t$2204 )
- );
- XOR2x1_ASAP7_75t_R \U$1014 (
- .A(\t$2204 ),
- .B(a_registered[13]),
- .Y(booth_b12_m25)
- );
- AO22x1_ASAP7_75t_R \U$1015 (
- .A1(b_registered[25]),
- .A2(\sel_0$1550 ),
- .B1(b_registered[26]),
- .B2(\sel_1$1551 ),
- .Y(\t$2205 )
- );
- XOR2x1_ASAP7_75t_R \U$1016 (
- .A(\t$2205 ),
- .B(a_registered[13]),
- .Y(booth_b12_m26)
- );
- AO22x1_ASAP7_75t_R \U$1017 (
- .A1(b_registered[26]),
- .A2(\sel_0$1550 ),
- .B1(b_registered[27]),
- .B2(\sel_1$1551 ),
- .Y(\t$2206 )
- );
- XOR2x1_ASAP7_75t_R \U$1018 (
- .A(\t$2206 ),
- .B(a_registered[13]),
- .Y(booth_b12_m27)
- );
- AO22x1_ASAP7_75t_R \U$1019 (
- .A1(b_registered[27]),
- .A2(\sel_0$1550 ),
- .B1(b_registered[28]),
- .B2(\sel_1$1551 ),
- .Y(\t$2207 )
- );
- XOR2x1_ASAP7_75t_R \U$1020 (
- .A(\t$2207 ),
- .B(a_registered[13]),
- .Y(booth_b12_m28)
- );
- AO22x1_ASAP7_75t_R \U$1021 (
- .A1(b_registered[28]),
- .A2(\sel_0$1550 ),
- .B1(b_registered[29]),
- .B2(\sel_1$1551 ),
- .Y(\t$2208 )
- );
- XOR2x1_ASAP7_75t_R \U$1022 (
- .A(\t$2208 ),
- .B(a_registered[13]),
- .Y(booth_b12_m29)
- );
- AO22x1_ASAP7_75t_R \U$1023 (
- .A1(b_registered[29]),
- .A2(\sel_0$1550 ),
- .B1(b_registered[30]),
- .B2(\sel_1$1551 ),
- .Y(\t$2209 )
- );
- XOR2x1_ASAP7_75t_R \U$1024 (
- .A(\t$2209 ),
- .B(a_registered[13]),
- .Y(booth_b12_m30)
- );
- AO22x1_ASAP7_75t_R \U$1025 (
- .A1(b_registered[30]),
- .A2(\sel_0$1550 ),
- .B1(b_registered[31]),
- .B2(\sel_1$1551 ),
- .Y(\t$2210 )
- );
- XOR2x1_ASAP7_75t_R \U$1026 (
- .A(\t$2210 ),
- .B(a_registered[13]),
- .Y(booth_b12_m31)
- );
- AO22x1_ASAP7_75t_R \U$1027 (
- .A1(b_registered[31]),
- .A2(\sel_0$1550 ),
- .B1(1'h0),
- .B2(\sel_1$1551 ),
- .Y(\t$2211 )
- );
- XOR2x1_ASAP7_75t_R \U$1028 (
- .A(\t$2211 ),
- .B(a_registered[13]),
- .Y(booth_b12_m32)
- );
- INVx1_ASAP7_75t_R \U$1029 (
- .A(a_registered[13]),
- .Y(\notsign$956 )
- );
- INVx1_ASAP7_75t_R \U$1030 (
- .A(a_registered[13]),
- .Y(\$22 )
- );
- INVx1_ASAP7_75t_R \U$1031 (
- .A(a_registered[14]),
- .Y(\$23 )
- );
- INVx1_ASAP7_75t_R \U$1032 (
- .A(a_registered[15]),
- .Y(\$24 )
- );
- AO33x2_ASAP7_75t_R \U$1033 (
- .A1(\$24 ),
- .A2(a_registered[14]),
- .A3(a_registered[13]),
- .B1(a_registered[15]),
- .B2(\$23 ),
- .B3(\$22 ),
- .Y(\sel_0$1587 )
- );
- XOR2x1_ASAP7_75t_R \U$1034 (
- .A(a_registered[14]),
- .B(a_registered[13]),
- .Y(\sel_1$1588 )
- );
- AO22x1_ASAP7_75t_R \U$1035 (
- .A1(1'h0),
- .A2(\sel_0$1587 ),
- .B1(b_registered[0]),
- .B2(\sel_1$1588 ),
- .Y(\t$2213 )
- );
- XOR2x1_ASAP7_75t_R \U$1036 (
- .A(\t$2213 ),
- .B(a_registered[15]),
- .Y(booth_b14_m0)
- );
- AO22x1_ASAP7_75t_R \U$1037 (
- .A1(b_registered[0]),
- .A2(\sel_0$1587 ),
- .B1(b_registered[1]),
- .B2(\sel_1$1588 ),
- .Y(\t$2214 )
- );
- XOR2x1_ASAP7_75t_R \U$1038 (
- .A(\t$2214 ),
- .B(a_registered[15]),
- .Y(booth_b14_m1)
- );
- AO22x1_ASAP7_75t_R \U$1039 (
- .A1(b_registered[1]),
- .A2(\sel_0$1587 ),
- .B1(b_registered[2]),
- .B2(\sel_1$1588 ),
- .Y(\t$2215 )
- );
- XOR2x1_ASAP7_75t_R \U$1040 (
- .A(\t$2215 ),
- .B(a_registered[15]),
- .Y(booth_b14_m2)
- );
- AO22x1_ASAP7_75t_R \U$1041 (
- .A1(b_registered[2]),
- .A2(\sel_0$1587 ),
- .B1(b_registered[3]),
- .B2(\sel_1$1588 ),
- .Y(\t$2216 )
- );
- XOR2x1_ASAP7_75t_R \U$1042 (
- .A(\t$2216 ),
- .B(a_registered[15]),
- .Y(booth_b14_m3)
- );
- AO22x1_ASAP7_75t_R \U$1043 (
- .A1(b_registered[3]),
- .A2(\sel_0$1587 ),
- .B1(b_registered[4]),
- .B2(\sel_1$1588 ),
- .Y(\t$2217 )
- );
- XOR2x1_ASAP7_75t_R \U$1044 (
- .A(\t$2217 ),
- .B(a_registered[15]),
- .Y(booth_b14_m4)
- );
- AO22x1_ASAP7_75t_R \U$1045 (
- .A1(b_registered[4]),
- .A2(\sel_0$1587 ),
- .B1(b_registered[5]),
- .B2(\sel_1$1588 ),
- .Y(\t$2218 )
- );
- XOR2x1_ASAP7_75t_R \U$1046 (
- .A(\t$2218 ),
- .B(a_registered[15]),
- .Y(booth_b14_m5)
- );
- AO22x1_ASAP7_75t_R \U$1047 (
- .A1(b_registered[5]),
- .A2(\sel_0$1587 ),
- .B1(b_registered[6]),
- .B2(\sel_1$1588 ),
- .Y(\t$2219 )
- );
- XOR2x1_ASAP7_75t_R \U$1048 (
- .A(\t$2219 ),
- .B(a_registered[15]),
- .Y(booth_b14_m6)
- );
- AO22x1_ASAP7_75t_R \U$1049 (
- .A1(b_registered[6]),
- .A2(\sel_0$1587 ),
- .B1(b_registered[7]),
- .B2(\sel_1$1588 ),
- .Y(\t$2220 )
- );
- XOR2x1_ASAP7_75t_R \U$1050 (
- .A(\t$2220 ),
- .B(a_registered[15]),
- .Y(booth_b14_m7)
- );
- AO22x1_ASAP7_75t_R \U$1051 (
- .A1(b_registered[7]),
- .A2(\sel_0$1587 ),
- .B1(b_registered[8]),
- .B2(\sel_1$1588 ),
- .Y(\t$2221 )
- );
- XOR2x1_ASAP7_75t_R \U$1052 (
- .A(\t$2221 ),
- .B(a_registered[15]),
- .Y(booth_b14_m8)
- );
- AO22x1_ASAP7_75t_R \U$1053 (
- .A1(b_registered[8]),
- .A2(\sel_0$1587 ),
- .B1(b_registered[9]),
- .B2(\sel_1$1588 ),
- .Y(\t$2222 )
- );
- XOR2x1_ASAP7_75t_R \U$1054 (
- .A(\t$2222 ),
- .B(a_registered[15]),
- .Y(booth_b14_m9)
- );
- AO22x1_ASAP7_75t_R \U$1055 (
- .A1(b_registered[9]),
- .A2(\sel_0$1587 ),
- .B1(b_registered[10]),
- .B2(\sel_1$1588 ),
- .Y(\t$2223 )
- );
- XOR2x1_ASAP7_75t_R \U$1056 (
- .A(\t$2223 ),
- .B(a_registered[15]),
- .Y(booth_b14_m10)
- );
- AO22x1_ASAP7_75t_R \U$1057 (
- .A1(b_registered[10]),
- .A2(\sel_0$1587 ),
- .B1(b_registered[11]),
- .B2(\sel_1$1588 ),
- .Y(\t$2224 )
- );
- XOR2x1_ASAP7_75t_R \U$1058 (
- .A(\t$2224 ),
- .B(a_registered[15]),
- .Y(booth_b14_m11)
- );
- AO22x1_ASAP7_75t_R \U$1059 (
- .A1(b_registered[11]),
- .A2(\sel_0$1587 ),
- .B1(b_registered[12]),
- .B2(\sel_1$1588 ),
- .Y(\t$2225 )
- );
- XOR2x1_ASAP7_75t_R \U$1060 (
- .A(\t$2225 ),
- .B(a_registered[15]),
- .Y(booth_b14_m12)
- );
- AO22x1_ASAP7_75t_R \U$1061 (
- .A1(b_registered[12]),
- .A2(\sel_0$1587 ),
- .B1(b_registered[13]),
- .B2(\sel_1$1588 ),
- .Y(\t$2226 )
- );
- XOR2x1_ASAP7_75t_R \U$1062 (
- .A(\t$2226 ),
- .B(a_registered[15]),
- .Y(booth_b14_m13)
- );
- AO22x1_ASAP7_75t_R \U$1063 (
- .A1(b_registered[13]),
- .A2(\sel_0$1587 ),
- .B1(b_registered[14]),
- .B2(\sel_1$1588 ),
- .Y(\t$2227 )
- );
- XOR2x1_ASAP7_75t_R \U$1064 (
- .A(\t$2227 ),
- .B(a_registered[15]),
- .Y(booth_b14_m14)
- );
- AO22x1_ASAP7_75t_R \U$1065 (
- .A1(b_registered[14]),
- .A2(\sel_0$1587 ),
- .B1(b_registered[15]),
- .B2(\sel_1$1588 ),
- .Y(\t$2228 )
- );
- XOR2x1_ASAP7_75t_R \U$1066 (
- .A(\t$2228 ),
- .B(a_registered[15]),
- .Y(booth_b14_m15)
- );
- AO22x1_ASAP7_75t_R \U$1067 (
- .A1(b_registered[15]),
- .A2(\sel_0$1587 ),
- .B1(b_registered[16]),
- .B2(\sel_1$1588 ),
- .Y(\t$2229 )
- );
- XOR2x1_ASAP7_75t_R \U$1068 (
- .A(\t$2229 ),
- .B(a_registered[15]),
- .Y(booth_b14_m16)
- );
- AO22x1_ASAP7_75t_R \U$1069 (
- .A1(b_registered[16]),
- .A2(\sel_0$1587 ),
- .B1(b_registered[17]),
- .B2(\sel_1$1588 ),
- .Y(\t$2230 )
- );
- XOR2x1_ASAP7_75t_R \U$1070 (
- .A(\t$2230 ),
- .B(a_registered[15]),
- .Y(booth_b14_m17)
- );
- AO22x1_ASAP7_75t_R \U$1071 (
- .A1(b_registered[17]),
- .A2(\sel_0$1587 ),
- .B1(b_registered[18]),
- .B2(\sel_1$1588 ),
- .Y(\t$2231 )
- );
- XOR2x1_ASAP7_75t_R \U$1072 (
- .A(\t$2231 ),
- .B(a_registered[15]),
- .Y(booth_b14_m18)
- );
- AO22x1_ASAP7_75t_R \U$1073 (
- .A1(b_registered[18]),
- .A2(\sel_0$1587 ),
- .B1(b_registered[19]),
- .B2(\sel_1$1588 ),
- .Y(\t$2232 )
- );
- XOR2x1_ASAP7_75t_R \U$1074 (
- .A(\t$2232 ),
- .B(a_registered[15]),
- .Y(booth_b14_m19)
- );
- AO22x1_ASAP7_75t_R \U$1075 (
- .A1(b_registered[19]),
- .A2(\sel_0$1587 ),
- .B1(b_registered[20]),
- .B2(\sel_1$1588 ),
- .Y(\t$2233 )
- );
- XOR2x1_ASAP7_75t_R \U$1076 (
- .A(\t$2233 ),
- .B(a_registered[15]),
- .Y(booth_b14_m20)
- );
- AO22x1_ASAP7_75t_R \U$1077 (
- .A1(b_registered[20]),
- .A2(\sel_0$1587 ),
- .B1(b_registered[21]),
- .B2(\sel_1$1588 ),
- .Y(\t$2234 )
- );
- XOR2x1_ASAP7_75t_R \U$1078 (
- .A(\t$2234 ),
- .B(a_registered[15]),
- .Y(booth_b14_m21)
- );
- AO22x1_ASAP7_75t_R \U$1079 (
- .A1(b_registered[21]),
- .A2(\sel_0$1587 ),
- .B1(b_registered[22]),
- .B2(\sel_1$1588 ),
- .Y(\t$2235 )
- );
- XOR2x1_ASAP7_75t_R \U$1080 (
- .A(\t$2235 ),
- .B(a_registered[15]),
- .Y(booth_b14_m22)
- );
- AO22x1_ASAP7_75t_R \U$1081 (
- .A1(b_registered[22]),
- .A2(\sel_0$1587 ),
- .B1(b_registered[23]),
- .B2(\sel_1$1588 ),
- .Y(\t$2236 )
- );
- XOR2x1_ASAP7_75t_R \U$1082 (
- .A(\t$2236 ),
- .B(a_registered[15]),
- .Y(booth_b14_m23)
- );
- AO22x1_ASAP7_75t_R \U$1083 (
- .A1(b_registered[23]),
- .A2(\sel_0$1587 ),
- .B1(b_registered[24]),
- .B2(\sel_1$1588 ),
- .Y(\t$2237 )
- );
- XOR2x1_ASAP7_75t_R \U$1084 (
- .A(\t$2237 ),
- .B(a_registered[15]),
- .Y(booth_b14_m24)
- );
- AO22x1_ASAP7_75t_R \U$1085 (
- .A1(b_registered[24]),
- .A2(\sel_0$1587 ),
- .B1(b_registered[25]),
- .B2(\sel_1$1588 ),
- .Y(\t$2238 )
- );
- XOR2x1_ASAP7_75t_R \U$1086 (
- .A(\t$2238 ),
- .B(a_registered[15]),
- .Y(booth_b14_m25)
- );
- AO22x1_ASAP7_75t_R \U$1087 (
- .A1(b_registered[25]),
- .A2(\sel_0$1587 ),
- .B1(b_registered[26]),
- .B2(\sel_1$1588 ),
- .Y(\t$2239 )
- );
- XOR2x1_ASAP7_75t_R \U$1088 (
- .A(\t$2239 ),
- .B(a_registered[15]),
- .Y(booth_b14_m26)
- );
- AO22x1_ASAP7_75t_R \U$1089 (
- .A1(b_registered[26]),
- .A2(\sel_0$1587 ),
- .B1(b_registered[27]),
- .B2(\sel_1$1588 ),
- .Y(\t$2240 )
- );
- XOR2x1_ASAP7_75t_R \U$1090 (
- .A(\t$2240 ),
- .B(a_registered[15]),
- .Y(booth_b14_m27)
- );
- AO22x1_ASAP7_75t_R \U$1091 (
- .A1(b_registered[27]),
- .A2(\sel_0$1587 ),
- .B1(b_registered[28]),
- .B2(\sel_1$1588 ),
- .Y(\t$2241 )
- );
- XOR2x1_ASAP7_75t_R \U$1092 (
- .A(\t$2241 ),
- .B(a_registered[15]),
- .Y(booth_b14_m28)
- );
- AO22x1_ASAP7_75t_R \U$1093 (
- .A1(b_registered[28]),
- .A2(\sel_0$1587 ),
- .B1(b_registered[29]),
- .B2(\sel_1$1588 ),
- .Y(\t$2242 )
- );
- XOR2x1_ASAP7_75t_R \U$1094 (
- .A(\t$2242 ),
- .B(a_registered[15]),
- .Y(booth_b14_m29)
- );
- AO22x1_ASAP7_75t_R \U$1095 (
- .A1(b_registered[29]),
- .A2(\sel_0$1587 ),
- .B1(b_registered[30]),
- .B2(\sel_1$1588 ),
- .Y(\t$2243 )
- );
- XOR2x1_ASAP7_75t_R \U$1096 (
- .A(\t$2243 ),
- .B(a_registered[15]),
- .Y(booth_b14_m30)
- );
- AO22x1_ASAP7_75t_R \U$1097 (
- .A1(b_registered[30]),
- .A2(\sel_0$1587 ),
- .B1(b_registered[31]),
- .B2(\sel_1$1588 ),
- .Y(\t$2244 )
- );
- XOR2x1_ASAP7_75t_R \U$1098 (
- .A(\t$2244 ),
- .B(a_registered[15]),
- .Y(booth_b14_m31)
- );
- AO22x1_ASAP7_75t_R \U$1099 (
- .A1(b_registered[31]),
- .A2(\sel_0$1587 ),
- .B1(1'h0),
- .B2(\sel_1$1588 ),
- .Y(\t$2245 )
- );
- XOR2x1_ASAP7_75t_R \U$1100 (
- .A(\t$2245 ),
- .B(a_registered[15]),
- .Y(booth_b14_m32)
- );
- INVx1_ASAP7_75t_R \U$1101 (
- .A(a_registered[15]),
- .Y(\notsign$998 )
- );
- INVx1_ASAP7_75t_R \U$1102 (
- .A(a_registered[15]),
- .Y(\$25 )
- );
- INVx1_ASAP7_75t_R \U$1103 (
- .A(a_registered[16]),
- .Y(\$26 )
- );
- INVx1_ASAP7_75t_R \U$1104 (
- .A(a_registered[17]),
- .Y(\$27 )
- );
- AO33x2_ASAP7_75t_R \U$1105 (
- .A1(\$27 ),
- .A2(a_registered[16]),
- .A3(a_registered[15]),
- .B1(a_registered[17]),
- .B2(\$26 ),
- .B3(\$25 ),
- .Y(\sel_0$1624 )
- );
- XOR2x1_ASAP7_75t_R \U$1106 (
- .A(a_registered[16]),
- .B(a_registered[15]),
- .Y(\sel_1$1625 )
- );
- AO22x1_ASAP7_75t_R \U$1107 (
- .A1(1'h0),
- .A2(\sel_0$1624 ),
- .B1(b_registered[0]),
- .B2(\sel_1$1625 ),
- .Y(\t$2247 )
- );
- XOR2x1_ASAP7_75t_R \U$1108 (
- .A(\t$2247 ),
- .B(a_registered[17]),
- .Y(booth_b16_m0)
- );
- AO22x1_ASAP7_75t_R \U$1109 (
- .A1(b_registered[0]),
- .A2(\sel_0$1624 ),
- .B1(b_registered[1]),
- .B2(\sel_1$1625 ),
- .Y(\t$2248 )
- );
- XOR2x1_ASAP7_75t_R \U$1110 (
- .A(\t$2248 ),
- .B(a_registered[17]),
- .Y(booth_b16_m1)
- );
- AO22x1_ASAP7_75t_R \U$1111 (
- .A1(b_registered[1]),
- .A2(\sel_0$1624 ),
- .B1(b_registered[2]),
- .B2(\sel_1$1625 ),
- .Y(\t$2249 )
- );
- XOR2x1_ASAP7_75t_R \U$1112 (
- .A(\t$2249 ),
- .B(a_registered[17]),
- .Y(booth_b16_m2)
- );
- AO22x1_ASAP7_75t_R \U$1113 (
- .A1(b_registered[2]),
- .A2(\sel_0$1624 ),
- .B1(b_registered[3]),
- .B2(\sel_1$1625 ),
- .Y(\t$2250 )
- );
- XOR2x1_ASAP7_75t_R \U$1114 (
- .A(\t$2250 ),
- .B(a_registered[17]),
- .Y(booth_b16_m3)
- );
- AO22x1_ASAP7_75t_R \U$1115 (
- .A1(b_registered[3]),
- .A2(\sel_0$1624 ),
- .B1(b_registered[4]),
- .B2(\sel_1$1625 ),
- .Y(\t$2251 )
- );
- XOR2x1_ASAP7_75t_R \U$1116 (
- .A(\t$2251 ),
- .B(a_registered[17]),
- .Y(booth_b16_m4)
- );
- AO22x1_ASAP7_75t_R \U$1117 (
- .A1(b_registered[4]),
- .A2(\sel_0$1624 ),
- .B1(b_registered[5]),
- .B2(\sel_1$1625 ),
- .Y(\t$2252 )
- );
- XOR2x1_ASAP7_75t_R \U$1118 (
- .A(\t$2252 ),
- .B(a_registered[17]),
- .Y(booth_b16_m5)
- );
- AO22x1_ASAP7_75t_R \U$1119 (
- .A1(b_registered[5]),
- .A2(\sel_0$1624 ),
- .B1(b_registered[6]),
- .B2(\sel_1$1625 ),
- .Y(\t$2253 )
- );
- XOR2x1_ASAP7_75t_R \U$1120 (
- .A(\t$2253 ),
- .B(a_registered[17]),
- .Y(booth_b16_m6)
- );
- AO22x1_ASAP7_75t_R \U$1121 (
- .A1(b_registered[6]),
- .A2(\sel_0$1624 ),
- .B1(b_registered[7]),
- .B2(\sel_1$1625 ),
- .Y(\t$2254 )
- );
- XOR2x1_ASAP7_75t_R \U$1122 (
- .A(\t$2254 ),
- .B(a_registered[17]),
- .Y(booth_b16_m7)
- );
- AO22x1_ASAP7_75t_R \U$1123 (
- .A1(b_registered[7]),
- .A2(\sel_0$1624 ),
- .B1(b_registered[8]),
- .B2(\sel_1$1625 ),
- .Y(\t$2255 )
- );
- XOR2x1_ASAP7_75t_R \U$1124 (
- .A(\t$2255 ),
- .B(a_registered[17]),
- .Y(booth_b16_m8)
- );
- AO22x1_ASAP7_75t_R \U$1125 (
- .A1(b_registered[8]),
- .A2(\sel_0$1624 ),
- .B1(b_registered[9]),
- .B2(\sel_1$1625 ),
- .Y(\t$2256 )
- );
- XOR2x1_ASAP7_75t_R \U$1126 (
- .A(\t$2256 ),
- .B(a_registered[17]),
- .Y(booth_b16_m9)
- );
- AO22x1_ASAP7_75t_R \U$1127 (
- .A1(b_registered[9]),
- .A2(\sel_0$1624 ),
- .B1(b_registered[10]),
- .B2(\sel_1$1625 ),
- .Y(\t$2257 )
- );
- XOR2x1_ASAP7_75t_R \U$1128 (
- .A(\t$2257 ),
- .B(a_registered[17]),
- .Y(booth_b16_m10)
- );
- AO22x1_ASAP7_75t_R \U$1129 (
- .A1(b_registered[10]),
- .A2(\sel_0$1624 ),
- .B1(b_registered[11]),
- .B2(\sel_1$1625 ),
- .Y(\t$2258 )
- );
- XOR2x1_ASAP7_75t_R \U$1130 (
- .A(\t$2258 ),
- .B(a_registered[17]),
- .Y(booth_b16_m11)
- );
- AO22x1_ASAP7_75t_R \U$1131 (
- .A1(b_registered[11]),
- .A2(\sel_0$1624 ),
- .B1(b_registered[12]),
- .B2(\sel_1$1625 ),
- .Y(\t$2259 )
- );
- XOR2x1_ASAP7_75t_R \U$1132 (
- .A(\t$2259 ),
- .B(a_registered[17]),
- .Y(booth_b16_m12)
- );
- AO22x1_ASAP7_75t_R \U$1133 (
- .A1(b_registered[12]),
- .A2(\sel_0$1624 ),
- .B1(b_registered[13]),
- .B2(\sel_1$1625 ),
- .Y(\t$2260 )
- );
- XOR2x1_ASAP7_75t_R \U$1134 (
- .A(\t$2260 ),
- .B(a_registered[17]),
- .Y(booth_b16_m13)
- );
- AO22x1_ASAP7_75t_R \U$1135 (
- .A1(b_registered[13]),
- .A2(\sel_0$1624 ),
- .B1(b_registered[14]),
- .B2(\sel_1$1625 ),
- .Y(\t$2261 )
- );
- XOR2x1_ASAP7_75t_R \U$1136 (
- .A(\t$2261 ),
- .B(a_registered[17]),
- .Y(booth_b16_m14)
- );
- AO22x1_ASAP7_75t_R \U$1137 (
- .A1(b_registered[14]),
- .A2(\sel_0$1624 ),
- .B1(b_registered[15]),
- .B2(\sel_1$1625 ),
- .Y(\t$2262 )
- );
- XOR2x1_ASAP7_75t_R \U$1138 (
- .A(\t$2262 ),
- .B(a_registered[17]),
- .Y(booth_b16_m15)
- );
- AO22x1_ASAP7_75t_R \U$1139 (
- .A1(b_registered[15]),
- .A2(\sel_0$1624 ),
- .B1(b_registered[16]),
- .B2(\sel_1$1625 ),
- .Y(\t$2263 )
- );
- XOR2x1_ASAP7_75t_R \U$1140 (
- .A(\t$2263 ),
- .B(a_registered[17]),
- .Y(booth_b16_m16)
- );
- AO22x1_ASAP7_75t_R \U$1141 (
- .A1(b_registered[16]),
- .A2(\sel_0$1624 ),
- .B1(b_registered[17]),
- .B2(\sel_1$1625 ),
- .Y(\t$2264 )
- );
- XOR2x1_ASAP7_75t_R \U$1142 (
- .A(\t$2264 ),
- .B(a_registered[17]),
- .Y(booth_b16_m17)
- );
- AO22x1_ASAP7_75t_R \U$1143 (
- .A1(b_registered[17]),
- .A2(\sel_0$1624 ),
- .B1(b_registered[18]),
- .B2(\sel_1$1625 ),
- .Y(\t$2265 )
- );
- XOR2x1_ASAP7_75t_R \U$1144 (
- .A(\t$2265 ),
- .B(a_registered[17]),
- .Y(booth_b16_m18)
- );
- AO22x1_ASAP7_75t_R \U$1145 (
- .A1(b_registered[18]),
- .A2(\sel_0$1624 ),
- .B1(b_registered[19]),
- .B2(\sel_1$1625 ),
- .Y(\t$2266 )
- );
- XOR2x1_ASAP7_75t_R \U$1146 (
- .A(\t$2266 ),
- .B(a_registered[17]),
- .Y(booth_b16_m19)
- );
- AO22x1_ASAP7_75t_R \U$1147 (
- .A1(b_registered[19]),
- .A2(\sel_0$1624 ),
- .B1(b_registered[20]),
- .B2(\sel_1$1625 ),
- .Y(\t$2267 )
- );
- XOR2x1_ASAP7_75t_R \U$1148 (
- .A(\t$2267 ),
- .B(a_registered[17]),
- .Y(booth_b16_m20)
- );
- AO22x1_ASAP7_75t_R \U$1149 (
- .A1(b_registered[20]),
- .A2(\sel_0$1624 ),
- .B1(b_registered[21]),
- .B2(\sel_1$1625 ),
- .Y(\t$2268 )
- );
- XOR2x1_ASAP7_75t_R \U$1150 (
- .A(\t$2268 ),
- .B(a_registered[17]),
- .Y(booth_b16_m21)
- );
- AO22x1_ASAP7_75t_R \U$1151 (
- .A1(b_registered[21]),
- .A2(\sel_0$1624 ),
- .B1(b_registered[22]),
- .B2(\sel_1$1625 ),
- .Y(\t$2269 )
- );
- XOR2x1_ASAP7_75t_R \U$1152 (
- .A(\t$2269 ),
- .B(a_registered[17]),
- .Y(booth_b16_m22)
- );
- AO22x1_ASAP7_75t_R \U$1153 (
- .A1(b_registered[22]),
- .A2(\sel_0$1624 ),
- .B1(b_registered[23]),
- .B2(\sel_1$1625 ),
- .Y(\t$2270 )
- );
- XOR2x1_ASAP7_75t_R \U$1154 (
- .A(\t$2270 ),
- .B(a_registered[17]),
- .Y(booth_b16_m23)
- );
- AO22x1_ASAP7_75t_R \U$1155 (
- .A1(b_registered[23]),
- .A2(\sel_0$1624 ),
- .B1(b_registered[24]),
- .B2(\sel_1$1625 ),
- .Y(\t$2271 )
- );
- XOR2x1_ASAP7_75t_R \U$1156 (
- .A(\t$2271 ),
- .B(a_registered[17]),
- .Y(booth_b16_m24)
- );
- AO22x1_ASAP7_75t_R \U$1157 (
- .A1(b_registered[24]),
- .A2(\sel_0$1624 ),
- .B1(b_registered[25]),
- .B2(\sel_1$1625 ),
- .Y(\t$2272 )
- );
- XOR2x1_ASAP7_75t_R \U$1158 (
- .A(\t$2272 ),
- .B(a_registered[17]),
- .Y(booth_b16_m25)
- );
- AO22x1_ASAP7_75t_R \U$1159 (
- .A1(b_registered[25]),
- .A2(\sel_0$1624 ),
- .B1(b_registered[26]),
- .B2(\sel_1$1625 ),
- .Y(\t$2273 )
- );
- XOR2x1_ASAP7_75t_R \U$1160 (
- .A(\t$2273 ),
- .B(a_registered[17]),
- .Y(booth_b16_m26)
- );
- AO22x1_ASAP7_75t_R \U$1161 (
- .A1(b_registered[26]),
- .A2(\sel_0$1624 ),
- .B1(b_registered[27]),
- .B2(\sel_1$1625 ),
- .Y(\t$2274 )
- );
- XOR2x1_ASAP7_75t_R \U$1162 (
- .A(\t$2274 ),
- .B(a_registered[17]),
- .Y(booth_b16_m27)
- );
- AO22x1_ASAP7_75t_R \U$1163 (
- .A1(b_registered[27]),
- .A2(\sel_0$1624 ),
- .B1(b_registered[28]),
- .B2(\sel_1$1625 ),
- .Y(\t$2275 )
- );
- XOR2x1_ASAP7_75t_R \U$1164 (
- .A(\t$2275 ),
- .B(a_registered[17]),
- .Y(booth_b16_m28)
- );
- AO22x1_ASAP7_75t_R \U$1165 (
- .A1(b_registered[28]),
- .A2(\sel_0$1624 ),
- .B1(b_registered[29]),
- .B2(\sel_1$1625 ),
- .Y(\t$2276 )
- );
- XOR2x1_ASAP7_75t_R \U$1166 (
- .A(\t$2276 ),
- .B(a_registered[17]),
- .Y(booth_b16_m29)
- );
- AO22x1_ASAP7_75t_R \U$1167 (
- .A1(b_registered[29]),
- .A2(\sel_0$1624 ),
- .B1(b_registered[30]),
- .B2(\sel_1$1625 ),
- .Y(\t$2277 )
- );
- XOR2x1_ASAP7_75t_R \U$1168 (
- .A(\t$2277 ),
- .B(a_registered[17]),
- .Y(booth_b16_m30)
- );
- AO22x1_ASAP7_75t_R \U$1169 (
- .A1(b_registered[30]),
- .A2(\sel_0$1624 ),
- .B1(b_registered[31]),
- .B2(\sel_1$1625 ),
- .Y(\t$2278 )
- );
- XOR2x1_ASAP7_75t_R \U$1170 (
- .A(\t$2278 ),
- .B(a_registered[17]),
- .Y(booth_b16_m31)
- );
- AO22x1_ASAP7_75t_R \U$1171 (
- .A1(b_registered[31]),
- .A2(\sel_0$1624 ),
- .B1(1'h0),
- .B2(\sel_1$1625 ),
- .Y(\t$2279 )
- );
- XOR2x1_ASAP7_75t_R \U$1172 (
- .A(\t$2279 ),
- .B(a_registered[17]),
- .Y(booth_b16_m32)
- );
- INVx1_ASAP7_75t_R \U$1173 (
- .A(a_registered[17]),
- .Y(\notsign$1036 )
- );
- INVx1_ASAP7_75t_R \U$1174 (
- .A(a_registered[17]),
- .Y(\$28 )
- );
- INVx1_ASAP7_75t_R \U$1175 (
- .A(a_registered[18]),
- .Y(\$29 )
- );
- INVx1_ASAP7_75t_R \U$1176 (
- .A(a_registered[19]),
- .Y(\$30 )
- );
- AO33x2_ASAP7_75t_R \U$1177 (
- .A1(\$30 ),
- .A2(a_registered[18]),
- .A3(a_registered[17]),
- .B1(a_registered[19]),
- .B2(\$29 ),
- .B3(\$28 ),
- .Y(\sel_0$1661 )
- );
- XOR2x1_ASAP7_75t_R \U$1178 (
- .A(a_registered[18]),
- .B(a_registered[17]),
- .Y(\sel_1$1662 )
- );
- AO22x1_ASAP7_75t_R \U$1179 (
- .A1(1'h0),
- .A2(\sel_0$1661 ),
- .B1(b_registered[0]),
- .B2(\sel_1$1662 ),
- .Y(\t$2281 )
- );
- XOR2x1_ASAP7_75t_R \U$1180 (
- .A(\t$2281 ),
- .B(a_registered[19]),
- .Y(booth_b18_m0)
- );
- AO22x1_ASAP7_75t_R \U$1181 (
- .A1(b_registered[0]),
- .A2(\sel_0$1661 ),
- .B1(b_registered[1]),
- .B2(\sel_1$1662 ),
- .Y(\t$2282 )
- );
- XOR2x1_ASAP7_75t_R \U$1182 (
- .A(\t$2282 ),
- .B(a_registered[19]),
- .Y(booth_b18_m1)
- );
- AO22x1_ASAP7_75t_R \U$1183 (
- .A1(b_registered[1]),
- .A2(\sel_0$1661 ),
- .B1(b_registered[2]),
- .B2(\sel_1$1662 ),
- .Y(\t$2283 )
- );
- XOR2x1_ASAP7_75t_R \U$1184 (
- .A(\t$2283 ),
- .B(a_registered[19]),
- .Y(booth_b18_m2)
- );
- AO22x1_ASAP7_75t_R \U$1185 (
- .A1(b_registered[2]),
- .A2(\sel_0$1661 ),
- .B1(b_registered[3]),
- .B2(\sel_1$1662 ),
- .Y(\t$2284 )
- );
- XOR2x1_ASAP7_75t_R \U$1186 (
- .A(\t$2284 ),
- .B(a_registered[19]),
- .Y(booth_b18_m3)
- );
- AO22x1_ASAP7_75t_R \U$1187 (
- .A1(b_registered[3]),
- .A2(\sel_0$1661 ),
- .B1(b_registered[4]),
- .B2(\sel_1$1662 ),
- .Y(\t$2285 )
- );
- XOR2x1_ASAP7_75t_R \U$1188 (
- .A(\t$2285 ),
- .B(a_registered[19]),
- .Y(booth_b18_m4)
- );
- AO22x1_ASAP7_75t_R \U$1189 (
- .A1(b_registered[4]),
- .A2(\sel_0$1661 ),
- .B1(b_registered[5]),
- .B2(\sel_1$1662 ),
- .Y(\t$2286 )
- );
- XOR2x1_ASAP7_75t_R \U$1190 (
- .A(\t$2286 ),
- .B(a_registered[19]),
- .Y(booth_b18_m5)
- );
- AO22x1_ASAP7_75t_R \U$1191 (
- .A1(b_registered[5]),
- .A2(\sel_0$1661 ),
- .B1(b_registered[6]),
- .B2(\sel_1$1662 ),
- .Y(\t$2287 )
- );
- XOR2x1_ASAP7_75t_R \U$1192 (
- .A(\t$2287 ),
- .B(a_registered[19]),
- .Y(booth_b18_m6)
- );
- AO22x1_ASAP7_75t_R \U$1193 (
- .A1(b_registered[6]),
- .A2(\sel_0$1661 ),
- .B1(b_registered[7]),
- .B2(\sel_1$1662 ),
- .Y(\t$2288 )
- );
- XOR2x1_ASAP7_75t_R \U$1194 (
- .A(\t$2288 ),
- .B(a_registered[19]),
- .Y(booth_b18_m7)
- );
- AO22x1_ASAP7_75t_R \U$1195 (
- .A1(b_registered[7]),
- .A2(\sel_0$1661 ),
- .B1(b_registered[8]),
- .B2(\sel_1$1662 ),
- .Y(\t$2289 )
- );
- XOR2x1_ASAP7_75t_R \U$1196 (
- .A(\t$2289 ),
- .B(a_registered[19]),
- .Y(booth_b18_m8)
- );
- AO22x1_ASAP7_75t_R \U$1197 (
- .A1(b_registered[8]),
- .A2(\sel_0$1661 ),
- .B1(b_registered[9]),
- .B2(\sel_1$1662 ),
- .Y(\t$2290 )
- );
- XOR2x1_ASAP7_75t_R \U$1198 (
- .A(\t$2290 ),
- .B(a_registered[19]),
- .Y(booth_b18_m9)
- );
- AO22x1_ASAP7_75t_R \U$1199 (
- .A1(b_registered[9]),
- .A2(\sel_0$1661 ),
- .B1(b_registered[10]),
- .B2(\sel_1$1662 ),
- .Y(\t$2291 )
- );
- XOR2x1_ASAP7_75t_R \U$1200 (
- .A(\t$2291 ),
- .B(a_registered[19]),
- .Y(booth_b18_m10)
- );
- AO22x1_ASAP7_75t_R \U$1201 (
- .A1(b_registered[10]),
- .A2(\sel_0$1661 ),
- .B1(b_registered[11]),
- .B2(\sel_1$1662 ),
- .Y(\t$2292 )
- );
- XOR2x1_ASAP7_75t_R \U$1202 (
- .A(\t$2292 ),
- .B(a_registered[19]),
- .Y(booth_b18_m11)
- );
- AO22x1_ASAP7_75t_R \U$1203 (
- .A1(b_registered[11]),
- .A2(\sel_0$1661 ),
- .B1(b_registered[12]),
- .B2(\sel_1$1662 ),
- .Y(\t$2293 )
- );
- XOR2x1_ASAP7_75t_R \U$1204 (
- .A(\t$2293 ),
- .B(a_registered[19]),
- .Y(booth_b18_m12)
- );
- AO22x1_ASAP7_75t_R \U$1205 (
- .A1(b_registered[12]),
- .A2(\sel_0$1661 ),
- .B1(b_registered[13]),
- .B2(\sel_1$1662 ),
- .Y(\t$2294 )
- );
- XOR2x1_ASAP7_75t_R \U$1206 (
- .A(\t$2294 ),
- .B(a_registered[19]),
- .Y(booth_b18_m13)
- );
- AO22x1_ASAP7_75t_R \U$1207 (
- .A1(b_registered[13]),
- .A2(\sel_0$1661 ),
- .B1(b_registered[14]),
- .B2(\sel_1$1662 ),
- .Y(\t$2295 )
- );
- XOR2x1_ASAP7_75t_R \U$1208 (
- .A(\t$2295 ),
- .B(a_registered[19]),
- .Y(booth_b18_m14)
- );
- AO22x1_ASAP7_75t_R \U$1209 (
- .A1(b_registered[14]),
- .A2(\sel_0$1661 ),
- .B1(b_registered[15]),
- .B2(\sel_1$1662 ),
- .Y(\t$2296 )
- );
- XOR2x1_ASAP7_75t_R \U$1210 (
- .A(\t$2296 ),
- .B(a_registered[19]),
- .Y(booth_b18_m15)
- );
- AO22x1_ASAP7_75t_R \U$1211 (
- .A1(b_registered[15]),
- .A2(\sel_0$1661 ),
- .B1(b_registered[16]),
- .B2(\sel_1$1662 ),
- .Y(\t$2297 )
- );
- XOR2x1_ASAP7_75t_R \U$1212 (
- .A(\t$2297 ),
- .B(a_registered[19]),
- .Y(booth_b18_m16)
- );
- AO22x1_ASAP7_75t_R \U$1213 (
- .A1(b_registered[16]),
- .A2(\sel_0$1661 ),
- .B1(b_registered[17]),
- .B2(\sel_1$1662 ),
- .Y(\t$2298 )
- );
- XOR2x1_ASAP7_75t_R \U$1214 (
- .A(\t$2298 ),
- .B(a_registered[19]),
- .Y(booth_b18_m17)
- );
- AO22x1_ASAP7_75t_R \U$1215 (
- .A1(b_registered[17]),
- .A2(\sel_0$1661 ),
- .B1(b_registered[18]),
- .B2(\sel_1$1662 ),
- .Y(\t$2299 )
- );
- XOR2x1_ASAP7_75t_R \U$1216 (
- .A(\t$2299 ),
- .B(a_registered[19]),
- .Y(booth_b18_m18)
- );
- AO22x1_ASAP7_75t_R \U$1217 (
- .A1(b_registered[18]),
- .A2(\sel_0$1661 ),
- .B1(b_registered[19]),
- .B2(\sel_1$1662 ),
- .Y(\t$2300 )
- );
- XOR2x1_ASAP7_75t_R \U$1218 (
- .A(\t$2300 ),
- .B(a_registered[19]),
- .Y(booth_b18_m19)
- );
- AO22x1_ASAP7_75t_R \U$1219 (
- .A1(b_registered[19]),
- .A2(\sel_0$1661 ),
- .B1(b_registered[20]),
- .B2(\sel_1$1662 ),
- .Y(\t$2301 )
- );
- XOR2x1_ASAP7_75t_R \U$1220 (
- .A(\t$2301 ),
- .B(a_registered[19]),
- .Y(booth_b18_m20)
- );
- AO22x1_ASAP7_75t_R \U$1221 (
- .A1(b_registered[20]),
- .A2(\sel_0$1661 ),
- .B1(b_registered[21]),
- .B2(\sel_1$1662 ),
- .Y(\t$2302 )
- );
- XOR2x1_ASAP7_75t_R \U$1222 (
- .A(\t$2302 ),
- .B(a_registered[19]),
- .Y(booth_b18_m21)
- );
- AO22x1_ASAP7_75t_R \U$1223 (
- .A1(b_registered[21]),
- .A2(\sel_0$1661 ),
- .B1(b_registered[22]),
- .B2(\sel_1$1662 ),
- .Y(\t$2303 )
- );
- XOR2x1_ASAP7_75t_R \U$1224 (
- .A(\t$2303 ),
- .B(a_registered[19]),
- .Y(booth_b18_m22)
- );
- AO22x1_ASAP7_75t_R \U$1225 (
- .A1(b_registered[22]),
- .A2(\sel_0$1661 ),
- .B1(b_registered[23]),
- .B2(\sel_1$1662 ),
- .Y(\t$2304 )
- );
- XOR2x1_ASAP7_75t_R \U$1226 (
- .A(\t$2304 ),
- .B(a_registered[19]),
- .Y(booth_b18_m23)
- );
- AO22x1_ASAP7_75t_R \U$1227 (
- .A1(b_registered[23]),
- .A2(\sel_0$1661 ),
- .B1(b_registered[24]),
- .B2(\sel_1$1662 ),
- .Y(\t$2305 )
- );
- XOR2x1_ASAP7_75t_R \U$1228 (
- .A(\t$2305 ),
- .B(a_registered[19]),
- .Y(booth_b18_m24)
- );
- AO22x1_ASAP7_75t_R \U$1229 (
- .A1(b_registered[24]),
- .A2(\sel_0$1661 ),
- .B1(b_registered[25]),
- .B2(\sel_1$1662 ),
- .Y(\t$2306 )
- );
- XOR2x1_ASAP7_75t_R \U$1230 (
- .A(\t$2306 ),
- .B(a_registered[19]),
- .Y(booth_b18_m25)
- );
- AO22x1_ASAP7_75t_R \U$1231 (
- .A1(b_registered[25]),
- .A2(\sel_0$1661 ),
- .B1(b_registered[26]),
- .B2(\sel_1$1662 ),
- .Y(\t$2307 )
- );
- XOR2x1_ASAP7_75t_R \U$1232 (
- .A(\t$2307 ),
- .B(a_registered[19]),
- .Y(booth_b18_m26)
- );
- AO22x1_ASAP7_75t_R \U$1233 (
- .A1(b_registered[26]),
- .A2(\sel_0$1661 ),
- .B1(b_registered[27]),
- .B2(\sel_1$1662 ),
- .Y(\t$2308 )
- );
- XOR2x1_ASAP7_75t_R \U$1234 (
- .A(\t$2308 ),
- .B(a_registered[19]),
- .Y(booth_b18_m27)
- );
- AO22x1_ASAP7_75t_R \U$1235 (
- .A1(b_registered[27]),
- .A2(\sel_0$1661 ),
- .B1(b_registered[28]),
- .B2(\sel_1$1662 ),
- .Y(\t$2309 )
- );
- XOR2x1_ASAP7_75t_R \U$1236 (
- .A(\t$2309 ),
- .B(a_registered[19]),
- .Y(booth_b18_m28)
- );
- AO22x1_ASAP7_75t_R \U$1237 (
- .A1(b_registered[28]),
- .A2(\sel_0$1661 ),
- .B1(b_registered[29]),
- .B2(\sel_1$1662 ),
- .Y(\t$2310 )
- );
- XOR2x1_ASAP7_75t_R \U$1238 (
- .A(\t$2310 ),
- .B(a_registered[19]),
- .Y(booth_b18_m29)
- );
- AO22x1_ASAP7_75t_R \U$1239 (
- .A1(b_registered[29]),
- .A2(\sel_0$1661 ),
- .B1(b_registered[30]),
- .B2(\sel_1$1662 ),
- .Y(\t$2311 )
- );
- XOR2x1_ASAP7_75t_R \U$1240 (
- .A(\t$2311 ),
- .B(a_registered[19]),
- .Y(booth_b18_m30)
- );
- AO22x1_ASAP7_75t_R \U$1241 (
- .A1(b_registered[30]),
- .A2(\sel_0$1661 ),
- .B1(b_registered[31]),
- .B2(\sel_1$1662 ),
- .Y(\t$2312 )
- );
- XOR2x1_ASAP7_75t_R \U$1242 (
- .A(\t$2312 ),
- .B(a_registered[19]),
- .Y(booth_b18_m31)
- );
- AO22x1_ASAP7_75t_R \U$1243 (
- .A1(b_registered[31]),
- .A2(\sel_0$1661 ),
- .B1(1'h0),
- .B2(\sel_1$1662 ),
- .Y(\t$2313 )
- );
- XOR2x1_ASAP7_75t_R \U$1244 (
- .A(\t$2313 ),
- .B(a_registered[19]),
- .Y(booth_b18_m32)
- );
- INVx1_ASAP7_75t_R \U$1245 (
- .A(a_registered[19]),
- .Y(\notsign$1070 )
- );
- INVx1_ASAP7_75t_R \U$1246 (
- .A(a_registered[19]),
- .Y(\$31 )
- );
- INVx1_ASAP7_75t_R \U$1247 (
- .A(a_registered[20]),
- .Y(\$32 )
- );
- INVx1_ASAP7_75t_R \U$1248 (
- .A(a_registered[21]),
- .Y(\$33 )
- );
- AO33x2_ASAP7_75t_R \U$1249 (
- .A1(\$33 ),
- .A2(a_registered[20]),
- .A3(a_registered[19]),
- .B1(a_registered[21]),
- .B2(\$32 ),
- .B3(\$31 ),
- .Y(\sel_0$1698 )
- );
- XOR2x1_ASAP7_75t_R \U$1250 (
- .A(a_registered[20]),
- .B(a_registered[19]),
- .Y(\sel_1$1699 )
- );
- AO22x1_ASAP7_75t_R \U$1251 (
- .A1(1'h0),
- .A2(\sel_0$1698 ),
- .B1(b_registered[0]),
- .B2(\sel_1$1699 ),
- .Y(\t$2315 )
- );
- XOR2x1_ASAP7_75t_R \U$1252 (
- .A(\t$2315 ),
- .B(a_registered[21]),
- .Y(booth_b20_m0)
- );
- AO22x1_ASAP7_75t_R \U$1253 (
- .A1(b_registered[0]),
- .A2(\sel_0$1698 ),
- .B1(b_registered[1]),
- .B2(\sel_1$1699 ),
- .Y(\t$2316 )
- );
- XOR2x1_ASAP7_75t_R \U$1254 (
- .A(\t$2316 ),
- .B(a_registered[21]),
- .Y(booth_b20_m1)
- );
- AO22x1_ASAP7_75t_R \U$1255 (
- .A1(b_registered[1]),
- .A2(\sel_0$1698 ),
- .B1(b_registered[2]),
- .B2(\sel_1$1699 ),
- .Y(\t$2317 )
- );
- XOR2x1_ASAP7_75t_R \U$1256 (
- .A(\t$2317 ),
- .B(a_registered[21]),
- .Y(booth_b20_m2)
- );
- AO22x1_ASAP7_75t_R \U$1257 (
- .A1(b_registered[2]),
- .A2(\sel_0$1698 ),
- .B1(b_registered[3]),
- .B2(\sel_1$1699 ),
- .Y(\t$2318 )
- );
- XOR2x1_ASAP7_75t_R \U$1258 (
- .A(\t$2318 ),
- .B(a_registered[21]),
- .Y(booth_b20_m3)
- );
- AO22x1_ASAP7_75t_R \U$1259 (
- .A1(b_registered[3]),
- .A2(\sel_0$1698 ),
- .B1(b_registered[4]),
- .B2(\sel_1$1699 ),
- .Y(\t$2319 )
- );
- XOR2x1_ASAP7_75t_R \U$1260 (
- .A(\t$2319 ),
- .B(a_registered[21]),
- .Y(booth_b20_m4)
- );
- AO22x1_ASAP7_75t_R \U$1261 (
- .A1(b_registered[4]),
- .A2(\sel_0$1698 ),
- .B1(b_registered[5]),
- .B2(\sel_1$1699 ),
- .Y(\t$2320 )
- );
- XOR2x1_ASAP7_75t_R \U$1262 (
- .A(\t$2320 ),
- .B(a_registered[21]),
- .Y(booth_b20_m5)
- );
- AO22x1_ASAP7_75t_R \U$1263 (
- .A1(b_registered[5]),
- .A2(\sel_0$1698 ),
- .B1(b_registered[6]),
- .B2(\sel_1$1699 ),
- .Y(\t$2321 )
- );
- XOR2x1_ASAP7_75t_R \U$1264 (
- .A(\t$2321 ),
- .B(a_registered[21]),
- .Y(booth_b20_m6)
- );
- AO22x1_ASAP7_75t_R \U$1265 (
- .A1(b_registered[6]),
- .A2(\sel_0$1698 ),
- .B1(b_registered[7]),
- .B2(\sel_1$1699 ),
- .Y(\t$2322 )
- );
- XOR2x1_ASAP7_75t_R \U$1266 (
- .A(\t$2322 ),
- .B(a_registered[21]),
- .Y(booth_b20_m7)
- );
- AO22x1_ASAP7_75t_R \U$1267 (
- .A1(b_registered[7]),
- .A2(\sel_0$1698 ),
- .B1(b_registered[8]),
- .B2(\sel_1$1699 ),
- .Y(\t$2323 )
- );
- XOR2x1_ASAP7_75t_R \U$1268 (
- .A(\t$2323 ),
- .B(a_registered[21]),
- .Y(booth_b20_m8)
- );
- AO22x1_ASAP7_75t_R \U$1269 (
- .A1(b_registered[8]),
- .A2(\sel_0$1698 ),
- .B1(b_registered[9]),
- .B2(\sel_1$1699 ),
- .Y(\t$2324 )
- );
- XOR2x1_ASAP7_75t_R \U$1270 (
- .A(\t$2324 ),
- .B(a_registered[21]),
- .Y(booth_b20_m9)
- );
- AO22x1_ASAP7_75t_R \U$1271 (
- .A1(b_registered[9]),
- .A2(\sel_0$1698 ),
- .B1(b_registered[10]),
- .B2(\sel_1$1699 ),
- .Y(\t$2325 )
- );
- XOR2x1_ASAP7_75t_R \U$1272 (
- .A(\t$2325 ),
- .B(a_registered[21]),
- .Y(booth_b20_m10)
- );
- AO22x1_ASAP7_75t_R \U$1273 (
- .A1(b_registered[10]),
- .A2(\sel_0$1698 ),
- .B1(b_registered[11]),
- .B2(\sel_1$1699 ),
- .Y(\t$2326 )
- );
- XOR2x1_ASAP7_75t_R \U$1274 (
- .A(\t$2326 ),
- .B(a_registered[21]),
- .Y(booth_b20_m11)
- );
- AO22x1_ASAP7_75t_R \U$1275 (
- .A1(b_registered[11]),
- .A2(\sel_0$1698 ),
- .B1(b_registered[12]),
- .B2(\sel_1$1699 ),
- .Y(\t$2327 )
- );
- XOR2x1_ASAP7_75t_R \U$1276 (
- .A(\t$2327 ),
- .B(a_registered[21]),
- .Y(booth_b20_m12)
- );
- AO22x1_ASAP7_75t_R \U$1277 (
- .A1(b_registered[12]),
- .A2(\sel_0$1698 ),
- .B1(b_registered[13]),
- .B2(\sel_1$1699 ),
- .Y(\t$2328 )
- );
- XOR2x1_ASAP7_75t_R \U$1278 (
- .A(\t$2328 ),
- .B(a_registered[21]),
- .Y(booth_b20_m13)
- );
- AO22x1_ASAP7_75t_R \U$1279 (
- .A1(b_registered[13]),
- .A2(\sel_0$1698 ),
- .B1(b_registered[14]),
- .B2(\sel_1$1699 ),
- .Y(\t$2329 )
- );
- XOR2x1_ASAP7_75t_R \U$1280 (
- .A(\t$2329 ),
- .B(a_registered[21]),
- .Y(booth_b20_m14)
- );
- AO22x1_ASAP7_75t_R \U$1281 (
- .A1(b_registered[14]),
- .A2(\sel_0$1698 ),
- .B1(b_registered[15]),
- .B2(\sel_1$1699 ),
- .Y(\t$2330 )
- );
- XOR2x1_ASAP7_75t_R \U$1282 (
- .A(\t$2330 ),
- .B(a_registered[21]),
- .Y(booth_b20_m15)
- );
- AO22x1_ASAP7_75t_R \U$1283 (
- .A1(b_registered[15]),
- .A2(\sel_0$1698 ),
- .B1(b_registered[16]),
- .B2(\sel_1$1699 ),
- .Y(\t$2331 )
- );
- XOR2x1_ASAP7_75t_R \U$1284 (
- .A(\t$2331 ),
- .B(a_registered[21]),
- .Y(booth_b20_m16)
- );
- AO22x1_ASAP7_75t_R \U$1285 (
- .A1(b_registered[16]),
- .A2(\sel_0$1698 ),
- .B1(b_registered[17]),
- .B2(\sel_1$1699 ),
- .Y(\t$2332 )
- );
- XOR2x1_ASAP7_75t_R \U$1286 (
- .A(\t$2332 ),
- .B(a_registered[21]),
- .Y(booth_b20_m17)
- );
- AO22x1_ASAP7_75t_R \U$1287 (
- .A1(b_registered[17]),
- .A2(\sel_0$1698 ),
- .B1(b_registered[18]),
- .B2(\sel_1$1699 ),
- .Y(\t$2333 )
- );
- XOR2x1_ASAP7_75t_R \U$1288 (
- .A(\t$2333 ),
- .B(a_registered[21]),
- .Y(booth_b20_m18)
- );
- AO22x1_ASAP7_75t_R \U$1289 (
- .A1(b_registered[18]),
- .A2(\sel_0$1698 ),
- .B1(b_registered[19]),
- .B2(\sel_1$1699 ),
- .Y(\t$2334 )
- );
- XOR2x1_ASAP7_75t_R \U$1290 (
- .A(\t$2334 ),
- .B(a_registered[21]),
- .Y(booth_b20_m19)
- );
- AO22x1_ASAP7_75t_R \U$1291 (
- .A1(b_registered[19]),
- .A2(\sel_0$1698 ),
- .B1(b_registered[20]),
- .B2(\sel_1$1699 ),
- .Y(\t$2335 )
- );
- XOR2x1_ASAP7_75t_R \U$1292 (
- .A(\t$2335 ),
- .B(a_registered[21]),
- .Y(booth_b20_m20)
- );
- AO22x1_ASAP7_75t_R \U$1293 (
- .A1(b_registered[20]),
- .A2(\sel_0$1698 ),
- .B1(b_registered[21]),
- .B2(\sel_1$1699 ),
- .Y(\t$2336 )
- );
- XOR2x1_ASAP7_75t_R \U$1294 (
- .A(\t$2336 ),
- .B(a_registered[21]),
- .Y(booth_b20_m21)
- );
- AO22x1_ASAP7_75t_R \U$1295 (
- .A1(b_registered[21]),
- .A2(\sel_0$1698 ),
- .B1(b_registered[22]),
- .B2(\sel_1$1699 ),
- .Y(\t$2337 )
- );
- XOR2x1_ASAP7_75t_R \U$1296 (
- .A(\t$2337 ),
- .B(a_registered[21]),
- .Y(booth_b20_m22)
- );
- AO22x1_ASAP7_75t_R \U$1297 (
- .A1(b_registered[22]),
- .A2(\sel_0$1698 ),
- .B1(b_registered[23]),
- .B2(\sel_1$1699 ),
- .Y(\t$2338 )
- );
- XOR2x1_ASAP7_75t_R \U$1298 (
- .A(\t$2338 ),
- .B(a_registered[21]),
- .Y(booth_b20_m23)
- );
- AO22x1_ASAP7_75t_R \U$1299 (
- .A1(b_registered[23]),
- .A2(\sel_0$1698 ),
- .B1(b_registered[24]),
- .B2(\sel_1$1699 ),
- .Y(\t$2339 )
- );
- XOR2x1_ASAP7_75t_R \U$1300 (
- .A(\t$2339 ),
- .B(a_registered[21]),
- .Y(booth_b20_m24)
- );
- AO22x1_ASAP7_75t_R \U$1301 (
- .A1(b_registered[24]),
- .A2(\sel_0$1698 ),
- .B1(b_registered[25]),
- .B2(\sel_1$1699 ),
- .Y(\t$2340 )
- );
- XOR2x1_ASAP7_75t_R \U$1302 (
- .A(\t$2340 ),
- .B(a_registered[21]),
- .Y(booth_b20_m25)
- );
- AO22x1_ASAP7_75t_R \U$1303 (
- .A1(b_registered[25]),
- .A2(\sel_0$1698 ),
- .B1(b_registered[26]),
- .B2(\sel_1$1699 ),
- .Y(\t$2341 )
- );
- XOR2x1_ASAP7_75t_R \U$1304 (
- .A(\t$2341 ),
- .B(a_registered[21]),
- .Y(booth_b20_m26)
- );
- AO22x1_ASAP7_75t_R \U$1305 (
- .A1(b_registered[26]),
- .A2(\sel_0$1698 ),
- .B1(b_registered[27]),
- .B2(\sel_1$1699 ),
- .Y(\t$2342 )
- );
- XOR2x1_ASAP7_75t_R \U$1306 (
- .A(\t$2342 ),
- .B(a_registered[21]),
- .Y(booth_b20_m27)
- );
- AO22x1_ASAP7_75t_R \U$1307 (
- .A1(b_registered[27]),
- .A2(\sel_0$1698 ),
- .B1(b_registered[28]),
- .B2(\sel_1$1699 ),
- .Y(\t$2343 )
- );
- XOR2x1_ASAP7_75t_R \U$1308 (
- .A(\t$2343 ),
- .B(a_registered[21]),
- .Y(booth_b20_m28)
- );
- AO22x1_ASAP7_75t_R \U$1309 (
- .A1(b_registered[28]),
- .A2(\sel_0$1698 ),
- .B1(b_registered[29]),
- .B2(\sel_1$1699 ),
- .Y(\t$2344 )
- );
- XOR2x1_ASAP7_75t_R \U$1310 (
- .A(\t$2344 ),
- .B(a_registered[21]),
- .Y(booth_b20_m29)
- );
- AO22x1_ASAP7_75t_R \U$1311 (
- .A1(b_registered[29]),
- .A2(\sel_0$1698 ),
- .B1(b_registered[30]),
- .B2(\sel_1$1699 ),
- .Y(\t$2345 )
- );
- XOR2x1_ASAP7_75t_R \U$1312 (
- .A(\t$2345 ),
- .B(a_registered[21]),
- .Y(booth_b20_m30)
- );
- AO22x1_ASAP7_75t_R \U$1313 (
- .A1(b_registered[30]),
- .A2(\sel_0$1698 ),
- .B1(b_registered[31]),
- .B2(\sel_1$1699 ),
- .Y(\t$2346 )
- );
- XOR2x1_ASAP7_75t_R \U$1314 (
- .A(\t$2346 ),
- .B(a_registered[21]),
- .Y(booth_b20_m31)
- );
- AO22x1_ASAP7_75t_R \U$1315 (
- .A1(b_registered[31]),
- .A2(\sel_0$1698 ),
- .B1(1'h0),
- .B2(\sel_1$1699 ),
- .Y(\t$2347 )
- );
- XOR2x1_ASAP7_75t_R \U$1316 (
- .A(\t$2347 ),
- .B(a_registered[21]),
- .Y(booth_b20_m32)
- );
- INVx1_ASAP7_75t_R \U$1317 (
- .A(a_registered[21]),
- .Y(\notsign$1100 )
- );
- INVx1_ASAP7_75t_R \U$1318 (
- .A(a_registered[21]),
- .Y(\$34 )
- );
- INVx1_ASAP7_75t_R \U$1319 (
- .A(a_registered[22]),
- .Y(\$35 )
- );
- INVx1_ASAP7_75t_R \U$1320 (
- .A(a_registered[23]),
- .Y(\$36 )
- );
- AO33x2_ASAP7_75t_R \U$1321 (
- .A1(\$36 ),
- .A2(a_registered[22]),
- .A3(a_registered[21]),
- .B1(a_registered[23]),
- .B2(\$35 ),
- .B3(\$34 ),
- .Y(\sel_0$1735 )
- );
- XOR2x1_ASAP7_75t_R \U$1322 (
- .A(a_registered[22]),
- .B(a_registered[21]),
- .Y(\sel_1$1736 )
- );
- AO22x1_ASAP7_75t_R \U$1323 (
- .A1(1'h0),
- .A2(\sel_0$1735 ),
- .B1(b_registered[0]),
- .B2(\sel_1$1736 ),
- .Y(\t$2349 )
- );
- XOR2x1_ASAP7_75t_R \U$1324 (
- .A(\t$2349 ),
- .B(a_registered[23]),
- .Y(booth_b22_m0)
- );
- AO22x1_ASAP7_75t_R \U$1325 (
- .A1(b_registered[0]),
- .A2(\sel_0$1735 ),
- .B1(b_registered[1]),
- .B2(\sel_1$1736 ),
- .Y(\t$2350 )
- );
- XOR2x1_ASAP7_75t_R \U$1326 (
- .A(\t$2350 ),
- .B(a_registered[23]),
- .Y(booth_b22_m1)
- );
- AO22x1_ASAP7_75t_R \U$1327 (
- .A1(b_registered[1]),
- .A2(\sel_0$1735 ),
- .B1(b_registered[2]),
- .B2(\sel_1$1736 ),
- .Y(\t$2351 )
- );
- XOR2x1_ASAP7_75t_R \U$1328 (
- .A(\t$2351 ),
- .B(a_registered[23]),
- .Y(booth_b22_m2)
- );
- AO22x1_ASAP7_75t_R \U$1329 (
- .A1(b_registered[2]),
- .A2(\sel_0$1735 ),
- .B1(b_registered[3]),
- .B2(\sel_1$1736 ),
- .Y(\t$2352 )
- );
- XOR2x1_ASAP7_75t_R \U$1330 (
- .A(\t$2352 ),
- .B(a_registered[23]),
- .Y(booth_b22_m3)
- );
- AO22x1_ASAP7_75t_R \U$1331 (
- .A1(b_registered[3]),
- .A2(\sel_0$1735 ),
- .B1(b_registered[4]),
- .B2(\sel_1$1736 ),
- .Y(\t$2353 )
- );
- XOR2x1_ASAP7_75t_R \U$1332 (
- .A(\t$2353 ),
- .B(a_registered[23]),
- .Y(booth_b22_m4)
- );
- AO22x1_ASAP7_75t_R \U$1333 (
- .A1(b_registered[4]),
- .A2(\sel_0$1735 ),
- .B1(b_registered[5]),
- .B2(\sel_1$1736 ),
- .Y(\t$2354 )
- );
- XOR2x1_ASAP7_75t_R \U$1334 (
- .A(\t$2354 ),
- .B(a_registered[23]),
- .Y(booth_b22_m5)
- );
- AO22x1_ASAP7_75t_R \U$1335 (
- .A1(b_registered[5]),
- .A2(\sel_0$1735 ),
- .B1(b_registered[6]),
- .B2(\sel_1$1736 ),
- .Y(\t$2355 )
- );
- XOR2x1_ASAP7_75t_R \U$1336 (
- .A(\t$2355 ),
- .B(a_registered[23]),
- .Y(booth_b22_m6)
- );
- AO22x1_ASAP7_75t_R \U$1337 (
- .A1(b_registered[6]),
- .A2(\sel_0$1735 ),
- .B1(b_registered[7]),
- .B2(\sel_1$1736 ),
- .Y(\t$2356 )
- );
- XOR2x1_ASAP7_75t_R \U$1338 (
- .A(\t$2356 ),
- .B(a_registered[23]),
- .Y(booth_b22_m7)
- );
- AO22x1_ASAP7_75t_R \U$1339 (
- .A1(b_registered[7]),
- .A2(\sel_0$1735 ),
- .B1(b_registered[8]),
- .B2(\sel_1$1736 ),
- .Y(\t$2357 )
- );
- XOR2x1_ASAP7_75t_R \U$1340 (
- .A(\t$2357 ),
- .B(a_registered[23]),
- .Y(booth_b22_m8)
- );
- AO22x1_ASAP7_75t_R \U$1341 (
- .A1(b_registered[8]),
- .A2(\sel_0$1735 ),
- .B1(b_registered[9]),
- .B2(\sel_1$1736 ),
- .Y(\t$2358 )
- );
- XOR2x1_ASAP7_75t_R \U$1342 (
- .A(\t$2358 ),
- .B(a_registered[23]),
- .Y(booth_b22_m9)
- );
- AO22x1_ASAP7_75t_R \U$1343 (
- .A1(b_registered[9]),
- .A2(\sel_0$1735 ),
- .B1(b_registered[10]),
- .B2(\sel_1$1736 ),
- .Y(\t$2359 )
- );
- XOR2x1_ASAP7_75t_R \U$1344 (
- .A(\t$2359 ),
- .B(a_registered[23]),
- .Y(booth_b22_m10)
- );
- AO22x1_ASAP7_75t_R \U$1345 (
- .A1(b_registered[10]),
- .A2(\sel_0$1735 ),
- .B1(b_registered[11]),
- .B2(\sel_1$1736 ),
- .Y(\t$2360 )
- );
- XOR2x1_ASAP7_75t_R \U$1346 (
- .A(\t$2360 ),
- .B(a_registered[23]),
- .Y(booth_b22_m11)
- );
- AO22x1_ASAP7_75t_R \U$1347 (
- .A1(b_registered[11]),
- .A2(\sel_0$1735 ),
- .B1(b_registered[12]),
- .B2(\sel_1$1736 ),
- .Y(\t$2361 )
- );
- XOR2x1_ASAP7_75t_R \U$1348 (
- .A(\t$2361 ),
- .B(a_registered[23]),
- .Y(booth_b22_m12)
- );
- AO22x1_ASAP7_75t_R \U$1349 (
- .A1(b_registered[12]),
- .A2(\sel_0$1735 ),
- .B1(b_registered[13]),
- .B2(\sel_1$1736 ),
- .Y(\t$2362 )
- );
- XOR2x1_ASAP7_75t_R \U$1350 (
- .A(\t$2362 ),
- .B(a_registered[23]),
- .Y(booth_b22_m13)
- );
- AO22x1_ASAP7_75t_R \U$1351 (
- .A1(b_registered[13]),
- .A2(\sel_0$1735 ),
- .B1(b_registered[14]),
- .B2(\sel_1$1736 ),
- .Y(\t$2363 )
- );
- XOR2x1_ASAP7_75t_R \U$1352 (
- .A(\t$2363 ),
- .B(a_registered[23]),
- .Y(booth_b22_m14)
- );
- AO22x1_ASAP7_75t_R \U$1353 (
- .A1(b_registered[14]),
- .A2(\sel_0$1735 ),
- .B1(b_registered[15]),
- .B2(\sel_1$1736 ),
- .Y(\t$2364 )
- );
- XOR2x1_ASAP7_75t_R \U$1354 (
- .A(\t$2364 ),
- .B(a_registered[23]),
- .Y(booth_b22_m15)
- );
- AO22x1_ASAP7_75t_R \U$1355 (
- .A1(b_registered[15]),
- .A2(\sel_0$1735 ),
- .B1(b_registered[16]),
- .B2(\sel_1$1736 ),
- .Y(\t$2365 )
- );
- XOR2x1_ASAP7_75t_R \U$1356 (
- .A(\t$2365 ),
- .B(a_registered[23]),
- .Y(booth_b22_m16)
- );
- AO22x1_ASAP7_75t_R \U$1357 (
- .A1(b_registered[16]),
- .A2(\sel_0$1735 ),
- .B1(b_registered[17]),
- .B2(\sel_1$1736 ),
- .Y(\t$2366 )
- );
- XOR2x1_ASAP7_75t_R \U$1358 (
- .A(\t$2366 ),
- .B(a_registered[23]),
- .Y(booth_b22_m17)
- );
- AO22x1_ASAP7_75t_R \U$1359 (
- .A1(b_registered[17]),
- .A2(\sel_0$1735 ),
- .B1(b_registered[18]),
- .B2(\sel_1$1736 ),
- .Y(\t$2367 )
- );
- XOR2x1_ASAP7_75t_R \U$1360 (
- .A(\t$2367 ),
- .B(a_registered[23]),
- .Y(booth_b22_m18)
- );
- AO22x1_ASAP7_75t_R \U$1361 (
- .A1(b_registered[18]),
- .A2(\sel_0$1735 ),
- .B1(b_registered[19]),
- .B2(\sel_1$1736 ),
- .Y(\t$2368 )
- );
- XOR2x1_ASAP7_75t_R \U$1362 (
- .A(\t$2368 ),
- .B(a_registered[23]),
- .Y(booth_b22_m19)
- );
- AO22x1_ASAP7_75t_R \U$1363 (
- .A1(b_registered[19]),
- .A2(\sel_0$1735 ),
- .B1(b_registered[20]),
- .B2(\sel_1$1736 ),
- .Y(\t$2369 )
- );
- XOR2x1_ASAP7_75t_R \U$1364 (
- .A(\t$2369 ),
- .B(a_registered[23]),
- .Y(booth_b22_m20)
- );
- AO22x1_ASAP7_75t_R \U$1365 (
- .A1(b_registered[20]),
- .A2(\sel_0$1735 ),
- .B1(b_registered[21]),
- .B2(\sel_1$1736 ),
- .Y(\t$2370 )
- );
- XOR2x1_ASAP7_75t_R \U$1366 (
- .A(\t$2370 ),
- .B(a_registered[23]),
- .Y(booth_b22_m21)
- );
- AO22x1_ASAP7_75t_R \U$1367 (
- .A1(b_registered[21]),
- .A2(\sel_0$1735 ),
- .B1(b_registered[22]),
- .B2(\sel_1$1736 ),
- .Y(\t$2371 )
- );
- XOR2x1_ASAP7_75t_R \U$1368 (
- .A(\t$2371 ),
- .B(a_registered[23]),
- .Y(booth_b22_m22)
- );
- AO22x1_ASAP7_75t_R \U$1369 (
- .A1(b_registered[22]),
- .A2(\sel_0$1735 ),
- .B1(b_registered[23]),
- .B2(\sel_1$1736 ),
- .Y(\t$2372 )
- );
- XOR2x1_ASAP7_75t_R \U$1370 (
- .A(\t$2372 ),
- .B(a_registered[23]),
- .Y(booth_b22_m23)
- );
- AO22x1_ASAP7_75t_R \U$1371 (
- .A1(b_registered[23]),
- .A2(\sel_0$1735 ),
- .B1(b_registered[24]),
- .B2(\sel_1$1736 ),
- .Y(\t$2373 )
- );
- XOR2x1_ASAP7_75t_R \U$1372 (
- .A(\t$2373 ),
- .B(a_registered[23]),
- .Y(booth_b22_m24)
- );
- AO22x1_ASAP7_75t_R \U$1373 (
- .A1(b_registered[24]),
- .A2(\sel_0$1735 ),
- .B1(b_registered[25]),
- .B2(\sel_1$1736 ),
- .Y(\t$2374 )
- );
- XOR2x1_ASAP7_75t_R \U$1374 (
- .A(\t$2374 ),
- .B(a_registered[23]),
- .Y(booth_b22_m25)
- );
- AO22x1_ASAP7_75t_R \U$1375 (
- .A1(b_registered[25]),
- .A2(\sel_0$1735 ),
- .B1(b_registered[26]),
- .B2(\sel_1$1736 ),
- .Y(\t$2375 )
- );
- XOR2x1_ASAP7_75t_R \U$1376 (
- .A(\t$2375 ),
- .B(a_registered[23]),
- .Y(booth_b22_m26)
- );
- AO22x1_ASAP7_75t_R \U$1377 (
- .A1(b_registered[26]),
- .A2(\sel_0$1735 ),
- .B1(b_registered[27]),
- .B2(\sel_1$1736 ),
- .Y(\t$2376 )
- );
- XOR2x1_ASAP7_75t_R \U$1378 (
- .A(\t$2376 ),
- .B(a_registered[23]),
- .Y(booth_b22_m27)
- );
- AO22x1_ASAP7_75t_R \U$1379 (
- .A1(b_registered[27]),
- .A2(\sel_0$1735 ),
- .B1(b_registered[28]),
- .B2(\sel_1$1736 ),
- .Y(\t$2377 )
- );
- XOR2x1_ASAP7_75t_R \U$1380 (
- .A(\t$2377 ),
- .B(a_registered[23]),
- .Y(booth_b22_m28)
- );
- AO22x1_ASAP7_75t_R \U$1381 (
- .A1(b_registered[28]),
- .A2(\sel_0$1735 ),
- .B1(b_registered[29]),
- .B2(\sel_1$1736 ),
- .Y(\t$2378 )
- );
- XOR2x1_ASAP7_75t_R \U$1382 (
- .A(\t$2378 ),
- .B(a_registered[23]),
- .Y(booth_b22_m29)
- );
- AO22x1_ASAP7_75t_R \U$1383 (
- .A1(b_registered[29]),
- .A2(\sel_0$1735 ),
- .B1(b_registered[30]),
- .B2(\sel_1$1736 ),
- .Y(\t$2379 )
- );
- XOR2x1_ASAP7_75t_R \U$1384 (
- .A(\t$2379 ),
- .B(a_registered[23]),
- .Y(booth_b22_m30)
- );
- AO22x1_ASAP7_75t_R \U$1385 (
- .A1(b_registered[30]),
- .A2(\sel_0$1735 ),
- .B1(b_registered[31]),
- .B2(\sel_1$1736 ),
- .Y(\t$2380 )
- );
- XOR2x1_ASAP7_75t_R \U$1386 (
- .A(\t$2380 ),
- .B(a_registered[23]),
- .Y(booth_b22_m31)
- );
- AO22x1_ASAP7_75t_R \U$1387 (
- .A1(b_registered[31]),
- .A2(\sel_0$1735 ),
- .B1(1'h0),
- .B2(\sel_1$1736 ),
- .Y(\t$2381 )
- );
- XOR2x1_ASAP7_75t_R \U$1388 (
- .A(\t$2381 ),
- .B(a_registered[23]),
- .Y(booth_b22_m32)
- );
- INVx1_ASAP7_75t_R \U$1389 (
- .A(a_registered[23]),
- .Y(\notsign$1126 )
- );
- INVx1_ASAP7_75t_R \U$1390 (
- .A(a_registered[23]),
- .Y(\$37 )
- );
- INVx1_ASAP7_75t_R \U$1391 (
- .A(a_registered[24]),
- .Y(\$38 )
- );
- INVx1_ASAP7_75t_R \U$1392 (
- .A(a_registered[25]),
- .Y(\$39 )
- );
- AO33x2_ASAP7_75t_R \U$1393 (
- .A1(\$39 ),
- .A2(a_registered[24]),
- .A3(a_registered[23]),
- .B1(a_registered[25]),
- .B2(\$38 ),
- .B3(\$37 ),
- .Y(\sel_0$1772 )
- );
- XOR2x1_ASAP7_75t_R \U$1394 (
- .A(a_registered[24]),
- .B(a_registered[23]),
- .Y(\sel_1$1773 )
- );
- AO22x1_ASAP7_75t_R \U$1395 (
- .A1(1'h0),
- .A2(\sel_0$1772 ),
- .B1(b_registered[0]),
- .B2(\sel_1$1773 ),
- .Y(\t$2383 )
- );
- XOR2x1_ASAP7_75t_R \U$1396 (
- .A(\t$2383 ),
- .B(a_registered[25]),
- .Y(booth_b24_m0)
- );
- AO22x1_ASAP7_75t_R \U$1397 (
- .A1(b_registered[0]),
- .A2(\sel_0$1772 ),
- .B1(b_registered[1]),
- .B2(\sel_1$1773 ),
- .Y(\t$2384 )
- );
- XOR2x1_ASAP7_75t_R \U$1398 (
- .A(\t$2384 ),
- .B(a_registered[25]),
- .Y(booth_b24_m1)
- );
- AO22x1_ASAP7_75t_R \U$1399 (
- .A1(b_registered[1]),
- .A2(\sel_0$1772 ),
- .B1(b_registered[2]),
- .B2(\sel_1$1773 ),
- .Y(\t$2385 )
- );
- XOR2x1_ASAP7_75t_R \U$1400 (
- .A(\t$2385 ),
- .B(a_registered[25]),
- .Y(booth_b24_m2)
- );
- AO22x1_ASAP7_75t_R \U$1401 (
- .A1(b_registered[2]),
- .A2(\sel_0$1772 ),
- .B1(b_registered[3]),
- .B2(\sel_1$1773 ),
- .Y(\t$2386 )
- );
- XOR2x1_ASAP7_75t_R \U$1402 (
- .A(\t$2386 ),
- .B(a_registered[25]),
- .Y(booth_b24_m3)
- );
- AO22x1_ASAP7_75t_R \U$1403 (
- .A1(b_registered[3]),
- .A2(\sel_0$1772 ),
- .B1(b_registered[4]),
- .B2(\sel_1$1773 ),
- .Y(\t$2387 )
- );
- XOR2x1_ASAP7_75t_R \U$1404 (
- .A(\t$2387 ),
- .B(a_registered[25]),
- .Y(booth_b24_m4)
- );
- AO22x1_ASAP7_75t_R \U$1405 (
- .A1(b_registered[4]),
- .A2(\sel_0$1772 ),
- .B1(b_registered[5]),
- .B2(\sel_1$1773 ),
- .Y(\t$2388 )
- );
- XOR2x1_ASAP7_75t_R \U$1406 (
- .A(\t$2388 ),
- .B(a_registered[25]),
- .Y(booth_b24_m5)
- );
- AO22x1_ASAP7_75t_R \U$1407 (
- .A1(b_registered[5]),
- .A2(\sel_0$1772 ),
- .B1(b_registered[6]),
- .B2(\sel_1$1773 ),
- .Y(\t$2389 )
- );
- XOR2x1_ASAP7_75t_R \U$1408 (
- .A(\t$2389 ),
- .B(a_registered[25]),
- .Y(booth_b24_m6)
- );
- AO22x1_ASAP7_75t_R \U$1409 (
- .A1(b_registered[6]),
- .A2(\sel_0$1772 ),
- .B1(b_registered[7]),
- .B2(\sel_1$1773 ),
- .Y(\t$2390 )
- );
- XOR2x1_ASAP7_75t_R \U$1410 (
- .A(\t$2390 ),
- .B(a_registered[25]),
- .Y(booth_b24_m7)
- );
- AO22x1_ASAP7_75t_R \U$1411 (
- .A1(b_registered[7]),
- .A2(\sel_0$1772 ),
- .B1(b_registered[8]),
- .B2(\sel_1$1773 ),
- .Y(\t$2391 )
- );
- XOR2x1_ASAP7_75t_R \U$1412 (
- .A(\t$2391 ),
- .B(a_registered[25]),
- .Y(booth_b24_m8)
- );
- AO22x1_ASAP7_75t_R \U$1413 (
- .A1(b_registered[8]),
- .A2(\sel_0$1772 ),
- .B1(b_registered[9]),
- .B2(\sel_1$1773 ),
- .Y(\t$2392 )
- );
- XOR2x1_ASAP7_75t_R \U$1414 (
- .A(\t$2392 ),
- .B(a_registered[25]),
- .Y(booth_b24_m9)
- );
- AO22x1_ASAP7_75t_R \U$1415 (
- .A1(b_registered[9]),
- .A2(\sel_0$1772 ),
- .B1(b_registered[10]),
- .B2(\sel_1$1773 ),
- .Y(\t$2393 )
- );
- XOR2x1_ASAP7_75t_R \U$1416 (
- .A(\t$2393 ),
- .B(a_registered[25]),
- .Y(booth_b24_m10)
- );
- AO22x1_ASAP7_75t_R \U$1417 (
- .A1(b_registered[10]),
- .A2(\sel_0$1772 ),
- .B1(b_registered[11]),
- .B2(\sel_1$1773 ),
- .Y(\t$2394 )
- );
- XOR2x1_ASAP7_75t_R \U$1418 (
- .A(\t$2394 ),
- .B(a_registered[25]),
- .Y(booth_b24_m11)
- );
- AO22x1_ASAP7_75t_R \U$1419 (
- .A1(b_registered[11]),
- .A2(\sel_0$1772 ),
- .B1(b_registered[12]),
- .B2(\sel_1$1773 ),
- .Y(\t$2395 )
- );
- XOR2x1_ASAP7_75t_R \U$1420 (
- .A(\t$2395 ),
- .B(a_registered[25]),
- .Y(booth_b24_m12)
- );
- AO22x1_ASAP7_75t_R \U$1421 (
- .A1(b_registered[12]),
- .A2(\sel_0$1772 ),
- .B1(b_registered[13]),
- .B2(\sel_1$1773 ),
- .Y(\t$2396 )
- );
- XOR2x1_ASAP7_75t_R \U$1422 (
- .A(\t$2396 ),
- .B(a_registered[25]),
- .Y(booth_b24_m13)
- );
- AO22x1_ASAP7_75t_R \U$1423 (
- .A1(b_registered[13]),
- .A2(\sel_0$1772 ),
- .B1(b_registered[14]),
- .B2(\sel_1$1773 ),
- .Y(\t$2397 )
- );
- XOR2x1_ASAP7_75t_R \U$1424 (
- .A(\t$2397 ),
- .B(a_registered[25]),
- .Y(booth_b24_m14)
- );
- AO22x1_ASAP7_75t_R \U$1425 (
- .A1(b_registered[14]),
- .A2(\sel_0$1772 ),
- .B1(b_registered[15]),
- .B2(\sel_1$1773 ),
- .Y(\t$2398 )
- );
- XOR2x1_ASAP7_75t_R \U$1426 (
- .A(\t$2398 ),
- .B(a_registered[25]),
- .Y(booth_b24_m15)
- );
- AO22x1_ASAP7_75t_R \U$1427 (
- .A1(b_registered[15]),
- .A2(\sel_0$1772 ),
- .B1(b_registered[16]),
- .B2(\sel_1$1773 ),
- .Y(\t$2399 )
- );
- XOR2x1_ASAP7_75t_R \U$1428 (
- .A(\t$2399 ),
- .B(a_registered[25]),
- .Y(booth_b24_m16)
- );
- AO22x1_ASAP7_75t_R \U$1429 (
- .A1(b_registered[16]),
- .A2(\sel_0$1772 ),
- .B1(b_registered[17]),
- .B2(\sel_1$1773 ),
- .Y(\t$2400 )
- );
- XOR2x1_ASAP7_75t_R \U$1430 (
- .A(\t$2400 ),
- .B(a_registered[25]),
- .Y(booth_b24_m17)
- );
- AO22x1_ASAP7_75t_R \U$1431 (
- .A1(b_registered[17]),
- .A2(\sel_0$1772 ),
- .B1(b_registered[18]),
- .B2(\sel_1$1773 ),
- .Y(\t$2401 )
- );
- XOR2x1_ASAP7_75t_R \U$1432 (
- .A(\t$2401 ),
- .B(a_registered[25]),
- .Y(booth_b24_m18)
- );
- AO22x1_ASAP7_75t_R \U$1433 (
- .A1(b_registered[18]),
- .A2(\sel_0$1772 ),
- .B1(b_registered[19]),
- .B2(\sel_1$1773 ),
- .Y(\t$2402 )
- );
- XOR2x1_ASAP7_75t_R \U$1434 (
- .A(\t$2402 ),
- .B(a_registered[25]),
- .Y(booth_b24_m19)
- );
- AO22x1_ASAP7_75t_R \U$1435 (
- .A1(b_registered[19]),
- .A2(\sel_0$1772 ),
- .B1(b_registered[20]),
- .B2(\sel_1$1773 ),
- .Y(\t$2403 )
- );
- XOR2x1_ASAP7_75t_R \U$1436 (
- .A(\t$2403 ),
- .B(a_registered[25]),
- .Y(booth_b24_m20)
- );
- AO22x1_ASAP7_75t_R \U$1437 (
- .A1(b_registered[20]),
- .A2(\sel_0$1772 ),
- .B1(b_registered[21]),
- .B2(\sel_1$1773 ),
- .Y(\t$2404 )
- );
- XOR2x1_ASAP7_75t_R \U$1438 (
- .A(\t$2404 ),
- .B(a_registered[25]),
- .Y(booth_b24_m21)
- );
- AO22x1_ASAP7_75t_R \U$1439 (
- .A1(b_registered[21]),
- .A2(\sel_0$1772 ),
- .B1(b_registered[22]),
- .B2(\sel_1$1773 ),
- .Y(\t$2405 )
- );
- XOR2x1_ASAP7_75t_R \U$1440 (
- .A(\t$2405 ),
- .B(a_registered[25]),
- .Y(booth_b24_m22)
- );
- AO22x1_ASAP7_75t_R \U$1441 (
- .A1(b_registered[22]),
- .A2(\sel_0$1772 ),
- .B1(b_registered[23]),
- .B2(\sel_1$1773 ),
- .Y(\t$2406 )
- );
- XOR2x1_ASAP7_75t_R \U$1442 (
- .A(\t$2406 ),
- .B(a_registered[25]),
- .Y(booth_b24_m23)
- );
- AO22x1_ASAP7_75t_R \U$1443 (
- .A1(b_registered[23]),
- .A2(\sel_0$1772 ),
- .B1(b_registered[24]),
- .B2(\sel_1$1773 ),
- .Y(\t$2407 )
- );
- XOR2x1_ASAP7_75t_R \U$1444 (
- .A(\t$2407 ),
- .B(a_registered[25]),
- .Y(booth_b24_m24)
- );
- AO22x1_ASAP7_75t_R \U$1445 (
- .A1(b_registered[24]),
- .A2(\sel_0$1772 ),
- .B1(b_registered[25]),
- .B2(\sel_1$1773 ),
- .Y(\t$2408 )
- );
- XOR2x1_ASAP7_75t_R \U$1446 (
- .A(\t$2408 ),
- .B(a_registered[25]),
- .Y(booth_b24_m25)
- );
- AO22x1_ASAP7_75t_R \U$1447 (
- .A1(b_registered[25]),
- .A2(\sel_0$1772 ),
- .B1(b_registered[26]),
- .B2(\sel_1$1773 ),
- .Y(\t$2409 )
- );
- XOR2x1_ASAP7_75t_R \U$1448 (
- .A(\t$2409 ),
- .B(a_registered[25]),
- .Y(booth_b24_m26)
- );
- AO22x1_ASAP7_75t_R \U$1449 (
- .A1(b_registered[26]),
- .A2(\sel_0$1772 ),
- .B1(b_registered[27]),
- .B2(\sel_1$1773 ),
- .Y(\t$2410 )
- );
- XOR2x1_ASAP7_75t_R \U$1450 (
- .A(\t$2410 ),
- .B(a_registered[25]),
- .Y(booth_b24_m27)
- );
- AO22x1_ASAP7_75t_R \U$1451 (
- .A1(b_registered[27]),
- .A2(\sel_0$1772 ),
- .B1(b_registered[28]),
- .B2(\sel_1$1773 ),
- .Y(\t$2411 )
- );
- XOR2x1_ASAP7_75t_R \U$1452 (
- .A(\t$2411 ),
- .B(a_registered[25]),
- .Y(booth_b24_m28)
- );
- AO22x1_ASAP7_75t_R \U$1453 (
- .A1(b_registered[28]),
- .A2(\sel_0$1772 ),
- .B1(b_registered[29]),
- .B2(\sel_1$1773 ),
- .Y(\t$2412 )
- );
- XOR2x1_ASAP7_75t_R \U$1454 (
- .A(\t$2412 ),
- .B(a_registered[25]),
- .Y(booth_b24_m29)
- );
- AO22x1_ASAP7_75t_R \U$1455 (
- .A1(b_registered[29]),
- .A2(\sel_0$1772 ),
- .B1(b_registered[30]),
- .B2(\sel_1$1773 ),
- .Y(\t$2413 )
- );
- XOR2x1_ASAP7_75t_R \U$1456 (
- .A(\t$2413 ),
- .B(a_registered[25]),
- .Y(booth_b24_m30)
- );
- AO22x1_ASAP7_75t_R \U$1457 (
- .A1(b_registered[30]),
- .A2(\sel_0$1772 ),
- .B1(b_registered[31]),
- .B2(\sel_1$1773 ),
- .Y(\t$2414 )
- );
- XOR2x1_ASAP7_75t_R \U$1458 (
- .A(\t$2414 ),
- .B(a_registered[25]),
- .Y(booth_b24_m31)
- );
- AO22x1_ASAP7_75t_R \U$1459 (
- .A1(b_registered[31]),
- .A2(\sel_0$1772 ),
- .B1(1'h0),
- .B2(\sel_1$1773 ),
- .Y(\t$2415 )
- );
- XOR2x1_ASAP7_75t_R \U$1460 (
- .A(\t$2415 ),
- .B(a_registered[25]),
- .Y(booth_b24_m32)
- );
- INVx1_ASAP7_75t_R \U$1461 (
- .A(a_registered[25]),
- .Y(\notsign$1148 )
- );
- INVx1_ASAP7_75t_R \U$1462 (
- .A(a_registered[25]),
- .Y(\$40 )
- );
- INVx1_ASAP7_75t_R \U$1463 (
- .A(a_registered[26]),
- .Y(\$41 )
- );
- INVx1_ASAP7_75t_R \U$1464 (
- .A(a_registered[27]),
- .Y(\$42 )
- );
- AO33x2_ASAP7_75t_R \U$1465 (
- .A1(\$42 ),
- .A2(a_registered[26]),
- .A3(a_registered[25]),
- .B1(a_registered[27]),
- .B2(\$41 ),
- .B3(\$40 ),
- .Y(\sel_0$1809 )
- );
- XOR2x1_ASAP7_75t_R \U$1466 (
- .A(a_registered[26]),
- .B(a_registered[25]),
- .Y(\sel_1$1810 )
- );
- AO22x1_ASAP7_75t_R \U$1467 (
- .A1(1'h0),
- .A2(\sel_0$1809 ),
- .B1(b_registered[0]),
- .B2(\sel_1$1810 ),
- .Y(\t$2417 )
- );
- XOR2x1_ASAP7_75t_R \U$1468 (
- .A(\t$2417 ),
- .B(a_registered[27]),
- .Y(booth_b26_m0)
- );
- AO22x1_ASAP7_75t_R \U$1469 (
- .A1(b_registered[0]),
- .A2(\sel_0$1809 ),
- .B1(b_registered[1]),
- .B2(\sel_1$1810 ),
- .Y(\t$2418 )
- );
- XOR2x1_ASAP7_75t_R \U$1470 (
- .A(\t$2418 ),
- .B(a_registered[27]),
- .Y(booth_b26_m1)
- );
- AO22x1_ASAP7_75t_R \U$1471 (
- .A1(b_registered[1]),
- .A2(\sel_0$1809 ),
- .B1(b_registered[2]),
- .B2(\sel_1$1810 ),
- .Y(\t$2419 )
- );
- XOR2x1_ASAP7_75t_R \U$1472 (
- .A(\t$2419 ),
- .B(a_registered[27]),
- .Y(booth_b26_m2)
- );
- AO22x1_ASAP7_75t_R \U$1473 (
- .A1(b_registered[2]),
- .A2(\sel_0$1809 ),
- .B1(b_registered[3]),
- .B2(\sel_1$1810 ),
- .Y(\t$2420 )
- );
- XOR2x1_ASAP7_75t_R \U$1474 (
- .A(\t$2420 ),
- .B(a_registered[27]),
- .Y(booth_b26_m3)
- );
- AO22x1_ASAP7_75t_R \U$1475 (
- .A1(b_registered[3]),
- .A2(\sel_0$1809 ),
- .B1(b_registered[4]),
- .B2(\sel_1$1810 ),
- .Y(\t$2421 )
- );
- XOR2x1_ASAP7_75t_R \U$1476 (
- .A(\t$2421 ),
- .B(a_registered[27]),
- .Y(booth_b26_m4)
- );
- AO22x1_ASAP7_75t_R \U$1477 (
- .A1(b_registered[4]),
- .A2(\sel_0$1809 ),
- .B1(b_registered[5]),
- .B2(\sel_1$1810 ),
- .Y(\t$2422 )
- );
- XOR2x1_ASAP7_75t_R \U$1478 (
- .A(\t$2422 ),
- .B(a_registered[27]),
- .Y(booth_b26_m5)
- );
- AO22x1_ASAP7_75t_R \U$1479 (
- .A1(b_registered[5]),
- .A2(\sel_0$1809 ),
- .B1(b_registered[6]),
- .B2(\sel_1$1810 ),
- .Y(\t$2423 )
- );
- XOR2x1_ASAP7_75t_R \U$1480 (
- .A(\t$2423 ),
- .B(a_registered[27]),
- .Y(booth_b26_m6)
- );
- AO22x1_ASAP7_75t_R \U$1481 (
- .A1(b_registered[6]),
- .A2(\sel_0$1809 ),
- .B1(b_registered[7]),
- .B2(\sel_1$1810 ),
- .Y(\t$2424 )
- );
- XOR2x1_ASAP7_75t_R \U$1482 (
- .A(\t$2424 ),
- .B(a_registered[27]),
- .Y(booth_b26_m7)
- );
- AO22x1_ASAP7_75t_R \U$1483 (
- .A1(b_registered[7]),
- .A2(\sel_0$1809 ),
- .B1(b_registered[8]),
- .B2(\sel_1$1810 ),
- .Y(\t$2425 )
- );
- XOR2x1_ASAP7_75t_R \U$1484 (
- .A(\t$2425 ),
- .B(a_registered[27]),
- .Y(booth_b26_m8)
- );
- AO22x1_ASAP7_75t_R \U$1485 (
- .A1(b_registered[8]),
- .A2(\sel_0$1809 ),
- .B1(b_registered[9]),
- .B2(\sel_1$1810 ),
- .Y(\t$2426 )
- );
- XOR2x1_ASAP7_75t_R \U$1486 (
- .A(\t$2426 ),
- .B(a_registered[27]),
- .Y(booth_b26_m9)
- );
- AO22x1_ASAP7_75t_R \U$1487 (
- .A1(b_registered[9]),
- .A2(\sel_0$1809 ),
- .B1(b_registered[10]),
- .B2(\sel_1$1810 ),
- .Y(\t$2427 )
- );
- XOR2x1_ASAP7_75t_R \U$1488 (
- .A(\t$2427 ),
- .B(a_registered[27]),
- .Y(booth_b26_m10)
- );
- AO22x1_ASAP7_75t_R \U$1489 (
- .A1(b_registered[10]),
- .A2(\sel_0$1809 ),
- .B1(b_registered[11]),
- .B2(\sel_1$1810 ),
- .Y(\t$2428 )
- );
- XOR2x1_ASAP7_75t_R \U$1490 (
- .A(\t$2428 ),
- .B(a_registered[27]),
- .Y(booth_b26_m11)
- );
- AO22x1_ASAP7_75t_R \U$1491 (
- .A1(b_registered[11]),
- .A2(\sel_0$1809 ),
- .B1(b_registered[12]),
- .B2(\sel_1$1810 ),
- .Y(\t$2429 )
- );
- XOR2x1_ASAP7_75t_R \U$1492 (
- .A(\t$2429 ),
- .B(a_registered[27]),
- .Y(booth_b26_m12)
- );
- AO22x1_ASAP7_75t_R \U$1493 (
- .A1(b_registered[12]),
- .A2(\sel_0$1809 ),
- .B1(b_registered[13]),
- .B2(\sel_1$1810 ),
- .Y(\t$2430 )
- );
- XOR2x1_ASAP7_75t_R \U$1494 (
- .A(\t$2430 ),
- .B(a_registered[27]),
- .Y(booth_b26_m13)
- );
- AO22x1_ASAP7_75t_R \U$1495 (
- .A1(b_registered[13]),
- .A2(\sel_0$1809 ),
- .B1(b_registered[14]),
- .B2(\sel_1$1810 ),
- .Y(\t$2431 )
- );
- XOR2x1_ASAP7_75t_R \U$1496 (
- .A(\t$2431 ),
- .B(a_registered[27]),
- .Y(booth_b26_m14)
- );
- AO22x1_ASAP7_75t_R \U$1497 (
- .A1(b_registered[14]),
- .A2(\sel_0$1809 ),
- .B1(b_registered[15]),
- .B2(\sel_1$1810 ),
- .Y(\t$2432 )
- );
- XOR2x1_ASAP7_75t_R \U$1498 (
- .A(\t$2432 ),
- .B(a_registered[27]),
- .Y(booth_b26_m15)
- );
- AO22x1_ASAP7_75t_R \U$1499 (
- .A1(b_registered[15]),
- .A2(\sel_0$1809 ),
- .B1(b_registered[16]),
- .B2(\sel_1$1810 ),
- .Y(\t$2433 )
- );
- XOR2x1_ASAP7_75t_R \U$1500 (
- .A(\t$2433 ),
- .B(a_registered[27]),
- .Y(booth_b26_m16)
- );
- AO22x1_ASAP7_75t_R \U$1501 (
- .A1(b_registered[16]),
- .A2(\sel_0$1809 ),
- .B1(b_registered[17]),
- .B2(\sel_1$1810 ),
- .Y(\t$2434 )
- );
- XOR2x1_ASAP7_75t_R \U$1502 (
- .A(\t$2434 ),
- .B(a_registered[27]),
- .Y(booth_b26_m17)
- );
- AO22x1_ASAP7_75t_R \U$1503 (
- .A1(b_registered[17]),
- .A2(\sel_0$1809 ),
- .B1(b_registered[18]),
- .B2(\sel_1$1810 ),
- .Y(\t$2435 )
- );
- XOR2x1_ASAP7_75t_R \U$1504 (
- .A(\t$2435 ),
- .B(a_registered[27]),
- .Y(booth_b26_m18)
- );
- AO22x1_ASAP7_75t_R \U$1505 (
- .A1(b_registered[18]),
- .A2(\sel_0$1809 ),
- .B1(b_registered[19]),
- .B2(\sel_1$1810 ),
- .Y(\t$2436 )
- );
- XOR2x1_ASAP7_75t_R \U$1506 (
- .A(\t$2436 ),
- .B(a_registered[27]),
- .Y(booth_b26_m19)
- );
- AO22x1_ASAP7_75t_R \U$1507 (
- .A1(b_registered[19]),
- .A2(\sel_0$1809 ),
- .B1(b_registered[20]),
- .B2(\sel_1$1810 ),
- .Y(\t$2437 )
- );
- XOR2x1_ASAP7_75t_R \U$1508 (
- .A(\t$2437 ),
- .B(a_registered[27]),
- .Y(booth_b26_m20)
- );
- AO22x1_ASAP7_75t_R \U$1509 (
- .A1(b_registered[20]),
- .A2(\sel_0$1809 ),
- .B1(b_registered[21]),
- .B2(\sel_1$1810 ),
- .Y(\t$2438 )
- );
- XOR2x1_ASAP7_75t_R \U$1510 (
- .A(\t$2438 ),
- .B(a_registered[27]),
- .Y(booth_b26_m21)
- );
- AO22x1_ASAP7_75t_R \U$1511 (
- .A1(b_registered[21]),
- .A2(\sel_0$1809 ),
- .B1(b_registered[22]),
- .B2(\sel_1$1810 ),
- .Y(\t$2439 )
- );
- XOR2x1_ASAP7_75t_R \U$1512 (
- .A(\t$2439 ),
- .B(a_registered[27]),
- .Y(booth_b26_m22)
- );
- AO22x1_ASAP7_75t_R \U$1513 (
- .A1(b_registered[22]),
- .A2(\sel_0$1809 ),
- .B1(b_registered[23]),
- .B2(\sel_1$1810 ),
- .Y(\t$2440 )
- );
- XOR2x1_ASAP7_75t_R \U$1514 (
- .A(\t$2440 ),
- .B(a_registered[27]),
- .Y(booth_b26_m23)
- );
- AO22x1_ASAP7_75t_R \U$1515 (
- .A1(b_registered[23]),
- .A2(\sel_0$1809 ),
- .B1(b_registered[24]),
- .B2(\sel_1$1810 ),
- .Y(\t$2441 )
- );
- XOR2x1_ASAP7_75t_R \U$1516 (
- .A(\t$2441 ),
- .B(a_registered[27]),
- .Y(booth_b26_m24)
- );
- AO22x1_ASAP7_75t_R \U$1517 (
- .A1(b_registered[24]),
- .A2(\sel_0$1809 ),
- .B1(b_registered[25]),
- .B2(\sel_1$1810 ),
- .Y(\t$2442 )
- );
- XOR2x1_ASAP7_75t_R \U$1518 (
- .A(\t$2442 ),
- .B(a_registered[27]),
- .Y(booth_b26_m25)
- );
- AO22x1_ASAP7_75t_R \U$1519 (
- .A1(b_registered[25]),
- .A2(\sel_0$1809 ),
- .B1(b_registered[26]),
- .B2(\sel_1$1810 ),
- .Y(\t$2443 )
- );
- XOR2x1_ASAP7_75t_R \U$1520 (
- .A(\t$2443 ),
- .B(a_registered[27]),
- .Y(booth_b26_m26)
- );
- AO22x1_ASAP7_75t_R \U$1521 (
- .A1(b_registered[26]),
- .A2(\sel_0$1809 ),
- .B1(b_registered[27]),
- .B2(\sel_1$1810 ),
- .Y(\t$2444 )
- );
- XOR2x1_ASAP7_75t_R \U$1522 (
- .A(\t$2444 ),
- .B(a_registered[27]),
- .Y(booth_b26_m27)
- );
- AO22x1_ASAP7_75t_R \U$1523 (
- .A1(b_registered[27]),
- .A2(\sel_0$1809 ),
- .B1(b_registered[28]),
- .B2(\sel_1$1810 ),
- .Y(\t$2445 )
- );
- XOR2x1_ASAP7_75t_R \U$1524 (
- .A(\t$2445 ),
- .B(a_registered[27]),
- .Y(booth_b26_m28)
- );
- AO22x1_ASAP7_75t_R \U$1525 (
- .A1(b_registered[28]),
- .A2(\sel_0$1809 ),
- .B1(b_registered[29]),
- .B2(\sel_1$1810 ),
- .Y(\t$2446 )
- );
- XOR2x1_ASAP7_75t_R \U$1526 (
- .A(\t$2446 ),
- .B(a_registered[27]),
- .Y(booth_b26_m29)
- );
- AO22x1_ASAP7_75t_R \U$1527 (
- .A1(b_registered[29]),
- .A2(\sel_0$1809 ),
- .B1(b_registered[30]),
- .B2(\sel_1$1810 ),
- .Y(\t$2447 )
- );
- XOR2x1_ASAP7_75t_R \U$1528 (
- .A(\t$2447 ),
- .B(a_registered[27]),
- .Y(booth_b26_m30)
- );
- AO22x1_ASAP7_75t_R \U$1529 (
- .A1(b_registered[30]),
- .A2(\sel_0$1809 ),
- .B1(b_registered[31]),
- .B2(\sel_1$1810 ),
- .Y(\t$2448 )
- );
- XOR2x1_ASAP7_75t_R \U$1530 (
- .A(\t$2448 ),
- .B(a_registered[27]),
- .Y(booth_b26_m31)
- );
- AO22x1_ASAP7_75t_R \U$1531 (
- .A1(b_registered[31]),
- .A2(\sel_0$1809 ),
- .B1(1'h0),
- .B2(\sel_1$1810 ),
- .Y(\t$2449 )
- );
- XOR2x1_ASAP7_75t_R \U$1532 (
- .A(\t$2449 ),
- .B(a_registered[27]),
- .Y(booth_b26_m32)
- );
- INVx1_ASAP7_75t_R \U$1533 (
- .A(a_registered[27]),
- .Y(\notsign$1166 )
- );
- INVx1_ASAP7_75t_R \U$1534 (
- .A(a_registered[27]),
- .Y(\$43 )
- );
- INVx1_ASAP7_75t_R \U$1535 (
- .A(a_registered[28]),
- .Y(\$44 )
- );
- INVx1_ASAP7_75t_R \U$1536 (
- .A(a_registered[29]),
- .Y(\$45 )
- );
- AO33x2_ASAP7_75t_R \U$1537 (
- .A1(\$45 ),
- .A2(a_registered[28]),
- .A3(a_registered[27]),
- .B1(a_registered[29]),
- .B2(\$44 ),
- .B3(\$43 ),
- .Y(\sel_0$1846 )
- );
- XOR2x1_ASAP7_75t_R \U$1538 (
- .A(a_registered[28]),
- .B(a_registered[27]),
- .Y(\sel_1$1847 )
- );
- AO22x1_ASAP7_75t_R \U$1539 (
- .A1(1'h0),
- .A2(\sel_0$1846 ),
- .B1(b_registered[0]),
- .B2(\sel_1$1847 ),
- .Y(\t$2451 )
- );
- XOR2x1_ASAP7_75t_R \U$1540 (
- .A(\t$2451 ),
- .B(a_registered[29]),
- .Y(booth_b28_m0)
- );
- AO22x1_ASAP7_75t_R \U$1541 (
- .A1(b_registered[0]),
- .A2(\sel_0$1846 ),
- .B1(b_registered[1]),
- .B2(\sel_1$1847 ),
- .Y(\t$2452 )
- );
- XOR2x1_ASAP7_75t_R \U$1542 (
- .A(\t$2452 ),
- .B(a_registered[29]),
- .Y(booth_b28_m1)
- );
- AO22x1_ASAP7_75t_R \U$1543 (
- .A1(b_registered[1]),
- .A2(\sel_0$1846 ),
- .B1(b_registered[2]),
- .B2(\sel_1$1847 ),
- .Y(\t$2453 )
- );
- XOR2x1_ASAP7_75t_R \U$1544 (
- .A(\t$2453 ),
- .B(a_registered[29]),
- .Y(booth_b28_m2)
- );
- AO22x1_ASAP7_75t_R \U$1545 (
- .A1(b_registered[2]),
- .A2(\sel_0$1846 ),
- .B1(b_registered[3]),
- .B2(\sel_1$1847 ),
- .Y(\t$2454 )
- );
- XOR2x1_ASAP7_75t_R \U$1546 (
- .A(\t$2454 ),
- .B(a_registered[29]),
- .Y(booth_b28_m3)
- );
- AO22x1_ASAP7_75t_R \U$1547 (
- .A1(b_registered[3]),
- .A2(\sel_0$1846 ),
- .B1(b_registered[4]),
- .B2(\sel_1$1847 ),
- .Y(\t$2455 )
- );
- XOR2x1_ASAP7_75t_R \U$1548 (
- .A(\t$2455 ),
- .B(a_registered[29]),
- .Y(booth_b28_m4)
- );
- AO22x1_ASAP7_75t_R \U$1549 (
- .A1(b_registered[4]),
- .A2(\sel_0$1846 ),
- .B1(b_registered[5]),
- .B2(\sel_1$1847 ),
- .Y(\t$2456 )
- );
- XOR2x1_ASAP7_75t_R \U$1550 (
- .A(\t$2456 ),
- .B(a_registered[29]),
- .Y(booth_b28_m5)
- );
- AO22x1_ASAP7_75t_R \U$1551 (
- .A1(b_registered[5]),
- .A2(\sel_0$1846 ),
- .B1(b_registered[6]),
- .B2(\sel_1$1847 ),
- .Y(\t$2457 )
- );
- XOR2x1_ASAP7_75t_R \U$1552 (
- .A(\t$2457 ),
- .B(a_registered[29]),
- .Y(booth_b28_m6)
- );
- AO22x1_ASAP7_75t_R \U$1553 (
- .A1(b_registered[6]),
- .A2(\sel_0$1846 ),
- .B1(b_registered[7]),
- .B2(\sel_1$1847 ),
- .Y(\t$2458 )
- );
- XOR2x1_ASAP7_75t_R \U$1554 (
- .A(\t$2458 ),
- .B(a_registered[29]),
- .Y(booth_b28_m7)
- );
- AO22x1_ASAP7_75t_R \U$1555 (
- .A1(b_registered[7]),
- .A2(\sel_0$1846 ),
- .B1(b_registered[8]),
- .B2(\sel_1$1847 ),
- .Y(\t$2459 )
- );
- XOR2x1_ASAP7_75t_R \U$1556 (
- .A(\t$2459 ),
- .B(a_registered[29]),
- .Y(booth_b28_m8)
- );
- AO22x1_ASAP7_75t_R \U$1557 (
- .A1(b_registered[8]),
- .A2(\sel_0$1846 ),
- .B1(b_registered[9]),
- .B2(\sel_1$1847 ),
- .Y(\t$2460 )
- );
- XOR2x1_ASAP7_75t_R \U$1558 (
- .A(\t$2460 ),
- .B(a_registered[29]),
- .Y(booth_b28_m9)
- );
- AO22x1_ASAP7_75t_R \U$1559 (
- .A1(b_registered[9]),
- .A2(\sel_0$1846 ),
- .B1(b_registered[10]),
- .B2(\sel_1$1847 ),
- .Y(\t$2461 )
- );
- XOR2x1_ASAP7_75t_R \U$1560 (
- .A(\t$2461 ),
- .B(a_registered[29]),
- .Y(booth_b28_m10)
- );
- AO22x1_ASAP7_75t_R \U$1561 (
- .A1(b_registered[10]),
- .A2(\sel_0$1846 ),
- .B1(b_registered[11]),
- .B2(\sel_1$1847 ),
- .Y(\t$2462 )
- );
- XOR2x1_ASAP7_75t_R \U$1562 (
- .A(\t$2462 ),
- .B(a_registered[29]),
- .Y(booth_b28_m11)
- );
- AO22x1_ASAP7_75t_R \U$1563 (
- .A1(b_registered[11]),
- .A2(\sel_0$1846 ),
- .B1(b_registered[12]),
- .B2(\sel_1$1847 ),
- .Y(\t$2463 )
- );
- XOR2x1_ASAP7_75t_R \U$1564 (
- .A(\t$2463 ),
- .B(a_registered[29]),
- .Y(booth_b28_m12)
- );
- AO22x1_ASAP7_75t_R \U$1565 (
- .A1(b_registered[12]),
- .A2(\sel_0$1846 ),
- .B1(b_registered[13]),
- .B2(\sel_1$1847 ),
- .Y(\t$2464 )
- );
- XOR2x1_ASAP7_75t_R \U$1566 (
- .A(\t$2464 ),
- .B(a_registered[29]),
- .Y(booth_b28_m13)
- );
- AO22x1_ASAP7_75t_R \U$1567 (
- .A1(b_registered[13]),
- .A2(\sel_0$1846 ),
- .B1(b_registered[14]),
- .B2(\sel_1$1847 ),
- .Y(\t$2465 )
- );
- XOR2x1_ASAP7_75t_R \U$1568 (
- .A(\t$2465 ),
- .B(a_registered[29]),
- .Y(booth_b28_m14)
- );
- AO22x1_ASAP7_75t_R \U$1569 (
- .A1(b_registered[14]),
- .A2(\sel_0$1846 ),
- .B1(b_registered[15]),
- .B2(\sel_1$1847 ),
- .Y(\t$2466 )
- );
- XOR2x1_ASAP7_75t_R \U$1570 (
- .A(\t$2466 ),
- .B(a_registered[29]),
- .Y(booth_b28_m15)
- );
- AO22x1_ASAP7_75t_R \U$1571 (
- .A1(b_registered[15]),
- .A2(\sel_0$1846 ),
- .B1(b_registered[16]),
- .B2(\sel_1$1847 ),
- .Y(\t$2467 )
- );
- XOR2x1_ASAP7_75t_R \U$1572 (
- .A(\t$2467 ),
- .B(a_registered[29]),
- .Y(booth_b28_m16)
- );
- AO22x1_ASAP7_75t_R \U$1573 (
- .A1(b_registered[16]),
- .A2(\sel_0$1846 ),
- .B1(b_registered[17]),
- .B2(\sel_1$1847 ),
- .Y(\t$2468 )
- );
- XOR2x1_ASAP7_75t_R \U$1574 (
- .A(\t$2468 ),
- .B(a_registered[29]),
- .Y(booth_b28_m17)
- );
- AO22x1_ASAP7_75t_R \U$1575 (
- .A1(b_registered[17]),
- .A2(\sel_0$1846 ),
- .B1(b_registered[18]),
- .B2(\sel_1$1847 ),
- .Y(\t$2469 )
- );
- XOR2x1_ASAP7_75t_R \U$1576 (
- .A(\t$2469 ),
- .B(a_registered[29]),
- .Y(booth_b28_m18)
- );
- AO22x1_ASAP7_75t_R \U$1577 (
- .A1(b_registered[18]),
- .A2(\sel_0$1846 ),
- .B1(b_registered[19]),
- .B2(\sel_1$1847 ),
- .Y(\t$2470 )
- );
- XOR2x1_ASAP7_75t_R \U$1578 (
- .A(\t$2470 ),
- .B(a_registered[29]),
- .Y(booth_b28_m19)
- );
- AO22x1_ASAP7_75t_R \U$1579 (
- .A1(b_registered[19]),
- .A2(\sel_0$1846 ),
- .B1(b_registered[20]),
- .B2(\sel_1$1847 ),
- .Y(\t$2471 )
- );
- XOR2x1_ASAP7_75t_R \U$1580 (
- .A(\t$2471 ),
- .B(a_registered[29]),
- .Y(booth_b28_m20)
- );
- AO22x1_ASAP7_75t_R \U$1581 (
- .A1(b_registered[20]),
- .A2(\sel_0$1846 ),
- .B1(b_registered[21]),
- .B2(\sel_1$1847 ),
- .Y(\t$2472 )
- );
- XOR2x1_ASAP7_75t_R \U$1582 (
- .A(\t$2472 ),
- .B(a_registered[29]),
- .Y(booth_b28_m21)
- );
- AO22x1_ASAP7_75t_R \U$1583 (
- .A1(b_registered[21]),
- .A2(\sel_0$1846 ),
- .B1(b_registered[22]),
- .B2(\sel_1$1847 ),
- .Y(\t$2473 )
- );
- XOR2x1_ASAP7_75t_R \U$1584 (
- .A(\t$2473 ),
- .B(a_registered[29]),
- .Y(booth_b28_m22)
- );
- AO22x1_ASAP7_75t_R \U$1585 (
- .A1(b_registered[22]),
- .A2(\sel_0$1846 ),
- .B1(b_registered[23]),
- .B2(\sel_1$1847 ),
- .Y(\t$2474 )
- );
- XOR2x1_ASAP7_75t_R \U$1586 (
- .A(\t$2474 ),
- .B(a_registered[29]),
- .Y(booth_b28_m23)
- );
- AO22x1_ASAP7_75t_R \U$1587 (
- .A1(b_registered[23]),
- .A2(\sel_0$1846 ),
- .B1(b_registered[24]),
- .B2(\sel_1$1847 ),
- .Y(\t$2475 )
- );
- XOR2x1_ASAP7_75t_R \U$1588 (
- .A(\t$2475 ),
- .B(a_registered[29]),
- .Y(booth_b28_m24)
- );
- AO22x1_ASAP7_75t_R \U$1589 (
- .A1(b_registered[24]),
- .A2(\sel_0$1846 ),
- .B1(b_registered[25]),
- .B2(\sel_1$1847 ),
- .Y(\t$2476 )
- );
- XOR2x1_ASAP7_75t_R \U$1590 (
- .A(\t$2476 ),
- .B(a_registered[29]),
- .Y(booth_b28_m25)
- );
- AO22x1_ASAP7_75t_R \U$1591 (
- .A1(b_registered[25]),
- .A2(\sel_0$1846 ),
- .B1(b_registered[26]),
- .B2(\sel_1$1847 ),
- .Y(\t$2477 )
- );
- XOR2x1_ASAP7_75t_R \U$1592 (
- .A(\t$2477 ),
- .B(a_registered[29]),
- .Y(booth_b28_m26)
- );
- AO22x1_ASAP7_75t_R \U$1593 (
- .A1(b_registered[26]),
- .A2(\sel_0$1846 ),
- .B1(b_registered[27]),
- .B2(\sel_1$1847 ),
- .Y(\t$2478 )
- );
- XOR2x1_ASAP7_75t_R \U$1594 (
- .A(\t$2478 ),
- .B(a_registered[29]),
- .Y(booth_b28_m27)
- );
- AO22x1_ASAP7_75t_R \U$1595 (
- .A1(b_registered[27]),
- .A2(\sel_0$1846 ),
- .B1(b_registered[28]),
- .B2(\sel_1$1847 ),
- .Y(\t$2479 )
- );
- XOR2x1_ASAP7_75t_R \U$1596 (
- .A(\t$2479 ),
- .B(a_registered[29]),
- .Y(booth_b28_m28)
- );
- AO22x1_ASAP7_75t_R \U$1597 (
- .A1(b_registered[28]),
- .A2(\sel_0$1846 ),
- .B1(b_registered[29]),
- .B2(\sel_1$1847 ),
- .Y(\t$2480 )
- );
- XOR2x1_ASAP7_75t_R \U$1598 (
- .A(\t$2480 ),
- .B(a_registered[29]),
- .Y(booth_b28_m29)
- );
- AO22x1_ASAP7_75t_R \U$1599 (
- .A1(b_registered[29]),
- .A2(\sel_0$1846 ),
- .B1(b_registered[30]),
- .B2(\sel_1$1847 ),
- .Y(\t$2481 )
- );
- XOR2x1_ASAP7_75t_R \U$1600 (
- .A(\t$2481 ),
- .B(a_registered[29]),
- .Y(booth_b28_m30)
- );
- AO22x1_ASAP7_75t_R \U$1601 (
- .A1(b_registered[30]),
- .A2(\sel_0$1846 ),
- .B1(b_registered[31]),
- .B2(\sel_1$1847 ),
- .Y(\t$2482 )
- );
- XOR2x1_ASAP7_75t_R \U$1602 (
- .A(\t$2482 ),
- .B(a_registered[29]),
- .Y(booth_b28_m31)
- );
- AO22x1_ASAP7_75t_R \U$1603 (
- .A1(b_registered[31]),
- .A2(\sel_0$1846 ),
- .B1(1'h0),
- .B2(\sel_1$1847 ),
- .Y(\t$2483 )
- );
- XOR2x1_ASAP7_75t_R \U$1604 (
- .A(\t$2483 ),
- .B(a_registered[29]),
- .Y(booth_b28_m32)
- );
- INVx1_ASAP7_75t_R \U$1605 (
- .A(a_registered[29]),
- .Y(\notsign$1180 )
- );
- INVx1_ASAP7_75t_R \U$1606 (
- .A(a_registered[29]),
- .Y(\$46 )
- );
- INVx1_ASAP7_75t_R \U$1607 (
- .A(a_registered[30]),
- .Y(\$47 )
- );
- INVx1_ASAP7_75t_R \U$1608 (
- .A(a_registered[31]),
- .Y(\$48 )
- );
- AO33x2_ASAP7_75t_R \U$1609 (
- .A1(\$48 ),
- .A2(a_registered[30]),
- .A3(a_registered[29]),
- .B1(a_registered[31]),
- .B2(\$47 ),
- .B3(\$46 ),
- .Y(\sel_0$1883 )
- );
- XOR2x1_ASAP7_75t_R \U$1610 (
- .A(a_registered[30]),
- .B(a_registered[29]),
- .Y(\sel_1$1884 )
- );
- AO22x1_ASAP7_75t_R \U$1611 (
- .A1(1'h0),
- .A2(\sel_0$1883 ),
- .B1(b_registered[0]),
- .B2(\sel_1$1884 ),
- .Y(\t$2485 )
- );
- XOR2x1_ASAP7_75t_R \U$1612 (
- .A(\t$2485 ),
- .B(a_registered[31]),
- .Y(booth_b30_m0)
- );
- AO22x1_ASAP7_75t_R \U$1613 (
- .A1(b_registered[0]),
- .A2(\sel_0$1883 ),
- .B1(b_registered[1]),
- .B2(\sel_1$1884 ),
- .Y(\t$2486 )
- );
- XOR2x1_ASAP7_75t_R \U$1614 (
- .A(\t$2486 ),
- .B(a_registered[31]),
- .Y(booth_b30_m1)
- );
- AO22x1_ASAP7_75t_R \U$1615 (
- .A1(b_registered[1]),
- .A2(\sel_0$1883 ),
- .B1(b_registered[2]),
- .B2(\sel_1$1884 ),
- .Y(\t$2487 )
- );
- XOR2x1_ASAP7_75t_R \U$1616 (
- .A(\t$2487 ),
- .B(a_registered[31]),
- .Y(booth_b30_m2)
- );
- AO22x1_ASAP7_75t_R \U$1617 (
- .A1(b_registered[2]),
- .A2(\sel_0$1883 ),
- .B1(b_registered[3]),
- .B2(\sel_1$1884 ),
- .Y(\t$2488 )
- );
- XOR2x1_ASAP7_75t_R \U$1618 (
- .A(\t$2488 ),
- .B(a_registered[31]),
- .Y(booth_b30_m3)
- );
- AO22x1_ASAP7_75t_R \U$1619 (
- .A1(b_registered[3]),
- .A2(\sel_0$1883 ),
- .B1(b_registered[4]),
- .B2(\sel_1$1884 ),
- .Y(\t$2489 )
- );
- XOR2x1_ASAP7_75t_R \U$1620 (
- .A(\t$2489 ),
- .B(a_registered[31]),
- .Y(booth_b30_m4)
- );
- AO22x1_ASAP7_75t_R \U$1621 (
- .A1(b_registered[4]),
- .A2(\sel_0$1883 ),
- .B1(b_registered[5]),
- .B2(\sel_1$1884 ),
- .Y(\t$2490 )
- );
- XOR2x1_ASAP7_75t_R \U$1622 (
- .A(\t$2490 ),
- .B(a_registered[31]),
- .Y(booth_b30_m5)
- );
- AO22x1_ASAP7_75t_R \U$1623 (
- .A1(b_registered[5]),
- .A2(\sel_0$1883 ),
- .B1(b_registered[6]),
- .B2(\sel_1$1884 ),
- .Y(\t$2491 )
- );
- XOR2x1_ASAP7_75t_R \U$1624 (
- .A(\t$2491 ),
- .B(a_registered[31]),
- .Y(booth_b30_m6)
- );
- AO22x1_ASAP7_75t_R \U$1625 (
- .A1(b_registered[6]),
- .A2(\sel_0$1883 ),
- .B1(b_registered[7]),
- .B2(\sel_1$1884 ),
- .Y(\t$2492 )
- );
- XOR2x1_ASAP7_75t_R \U$1626 (
- .A(\t$2492 ),
- .B(a_registered[31]),
- .Y(booth_b30_m7)
- );
- AO22x1_ASAP7_75t_R \U$1627 (
- .A1(b_registered[7]),
- .A2(\sel_0$1883 ),
- .B1(b_registered[8]),
- .B2(\sel_1$1884 ),
- .Y(\t$2493 )
- );
- XOR2x1_ASAP7_75t_R \U$1628 (
- .A(\t$2493 ),
- .B(a_registered[31]),
- .Y(booth_b30_m8)
- );
- AO22x1_ASAP7_75t_R \U$1629 (
- .A1(b_registered[8]),
- .A2(\sel_0$1883 ),
- .B1(b_registered[9]),
- .B2(\sel_1$1884 ),
- .Y(\t$2494 )
- );
- XOR2x1_ASAP7_75t_R \U$1630 (
- .A(\t$2494 ),
- .B(a_registered[31]),
- .Y(booth_b30_m9)
- );
- AO22x1_ASAP7_75t_R \U$1631 (
- .A1(b_registered[9]),
- .A2(\sel_0$1883 ),
- .B1(b_registered[10]),
- .B2(\sel_1$1884 ),
- .Y(\t$2495 )
- );
- XOR2x1_ASAP7_75t_R \U$1632 (
- .A(\t$2495 ),
- .B(a_registered[31]),
- .Y(booth_b30_m10)
- );
- AO22x1_ASAP7_75t_R \U$1633 (
- .A1(b_registered[10]),
- .A2(\sel_0$1883 ),
- .B1(b_registered[11]),
- .B2(\sel_1$1884 ),
- .Y(\t$2496 )
- );
- XOR2x1_ASAP7_75t_R \U$1634 (
- .A(\t$2496 ),
- .B(a_registered[31]),
- .Y(booth_b30_m11)
- );
- AO22x1_ASAP7_75t_R \U$1635 (
- .A1(b_registered[11]),
- .A2(\sel_0$1883 ),
- .B1(b_registered[12]),
- .B2(\sel_1$1884 ),
- .Y(\t$2497 )
- );
- XOR2x1_ASAP7_75t_R \U$1636 (
- .A(\t$2497 ),
- .B(a_registered[31]),
- .Y(booth_b30_m12)
- );
- AO22x1_ASAP7_75t_R \U$1637 (
- .A1(b_registered[12]),
- .A2(\sel_0$1883 ),
- .B1(b_registered[13]),
- .B2(\sel_1$1884 ),
- .Y(\t$2498 )
- );
- XOR2x1_ASAP7_75t_R \U$1638 (
- .A(\t$2498 ),
- .B(a_registered[31]),
- .Y(booth_b30_m13)
- );
- AO22x1_ASAP7_75t_R \U$1639 (
- .A1(b_registered[13]),
- .A2(\sel_0$1883 ),
- .B1(b_registered[14]),
- .B2(\sel_1$1884 ),
- .Y(\t$2499 )
- );
- XOR2x1_ASAP7_75t_R \U$1640 (
- .A(\t$2499 ),
- .B(a_registered[31]),
- .Y(booth_b30_m14)
- );
- AO22x1_ASAP7_75t_R \U$1641 (
- .A1(b_registered[14]),
- .A2(\sel_0$1883 ),
- .B1(b_registered[15]),
- .B2(\sel_1$1884 ),
- .Y(\t$2500 )
- );
- XOR2x1_ASAP7_75t_R \U$1642 (
- .A(\t$2500 ),
- .B(a_registered[31]),
- .Y(booth_b30_m15)
- );
- AO22x1_ASAP7_75t_R \U$1643 (
- .A1(b_registered[15]),
- .A2(\sel_0$1883 ),
- .B1(b_registered[16]),
- .B2(\sel_1$1884 ),
- .Y(\t$2501 )
- );
- XOR2x1_ASAP7_75t_R \U$1644 (
- .A(\t$2501 ),
- .B(a_registered[31]),
- .Y(booth_b30_m16)
- );
- AO22x1_ASAP7_75t_R \U$1645 (
- .A1(b_registered[16]),
- .A2(\sel_0$1883 ),
- .B1(b_registered[17]),
- .B2(\sel_1$1884 ),
- .Y(\t$2502 )
- );
- XOR2x1_ASAP7_75t_R \U$1646 (
- .A(\t$2502 ),
- .B(a_registered[31]),
- .Y(booth_b30_m17)
- );
- AO22x1_ASAP7_75t_R \U$1647 (
- .A1(b_registered[17]),
- .A2(\sel_0$1883 ),
- .B1(b_registered[18]),
- .B2(\sel_1$1884 ),
- .Y(\t$2503 )
- );
- XOR2x1_ASAP7_75t_R \U$1648 (
- .A(\t$2503 ),
- .B(a_registered[31]),
- .Y(booth_b30_m18)
- );
- AO22x1_ASAP7_75t_R \U$1649 (
- .A1(b_registered[18]),
- .A2(\sel_0$1883 ),
- .B1(b_registered[19]),
- .B2(\sel_1$1884 ),
- .Y(\t$2504 )
- );
- XOR2x1_ASAP7_75t_R \U$1650 (
- .A(\t$2504 ),
- .B(a_registered[31]),
- .Y(booth_b30_m19)
- );
- AO22x1_ASAP7_75t_R \U$1651 (
- .A1(b_registered[19]),
- .A2(\sel_0$1883 ),
- .B1(b_registered[20]),
- .B2(\sel_1$1884 ),
- .Y(\t$2505 )
- );
- XOR2x1_ASAP7_75t_R \U$1652 (
- .A(\t$2505 ),
- .B(a_registered[31]),
- .Y(booth_b30_m20)
- );
- AO22x1_ASAP7_75t_R \U$1653 (
- .A1(b_registered[20]),
- .A2(\sel_0$1883 ),
- .B1(b_registered[21]),
- .B2(\sel_1$1884 ),
- .Y(\t$2506 )
- );
- XOR2x1_ASAP7_75t_R \U$1654 (
- .A(\t$2506 ),
- .B(a_registered[31]),
- .Y(booth_b30_m21)
- );
- AO22x1_ASAP7_75t_R \U$1655 (
- .A1(b_registered[21]),
- .A2(\sel_0$1883 ),
- .B1(b_registered[22]),
- .B2(\sel_1$1884 ),
- .Y(\t$2507 )
- );
- XOR2x1_ASAP7_75t_R \U$1656 (
- .A(\t$2507 ),
- .B(a_registered[31]),
- .Y(booth_b30_m22)
- );
- AO22x1_ASAP7_75t_R \U$1657 (
- .A1(b_registered[22]),
- .A2(\sel_0$1883 ),
- .B1(b_registered[23]),
- .B2(\sel_1$1884 ),
- .Y(\t$2508 )
- );
- XOR2x1_ASAP7_75t_R \U$1658 (
- .A(\t$2508 ),
- .B(a_registered[31]),
- .Y(booth_b30_m23)
- );
- AO22x1_ASAP7_75t_R \U$1659 (
- .A1(b_registered[23]),
- .A2(\sel_0$1883 ),
- .B1(b_registered[24]),
- .B2(\sel_1$1884 ),
- .Y(\t$2509 )
- );
- XOR2x1_ASAP7_75t_R \U$1660 (
- .A(\t$2509 ),
- .B(a_registered[31]),
- .Y(booth_b30_m24)
- );
- AO22x1_ASAP7_75t_R \U$1661 (
- .A1(b_registered[24]),
- .A2(\sel_0$1883 ),
- .B1(b_registered[25]),
- .B2(\sel_1$1884 ),
- .Y(\t$2510 )
- );
- XOR2x1_ASAP7_75t_R \U$1662 (
- .A(\t$2510 ),
- .B(a_registered[31]),
- .Y(booth_b30_m25)
- );
- AO22x1_ASAP7_75t_R \U$1663 (
- .A1(b_registered[25]),
- .A2(\sel_0$1883 ),
- .B1(b_registered[26]),
- .B2(\sel_1$1884 ),
- .Y(\t$2511 )
- );
- XOR2x1_ASAP7_75t_R \U$1664 (
- .A(\t$2511 ),
- .B(a_registered[31]),
- .Y(booth_b30_m26)
- );
- AO22x1_ASAP7_75t_R \U$1665 (
- .A1(b_registered[26]),
- .A2(\sel_0$1883 ),
- .B1(b_registered[27]),
- .B2(\sel_1$1884 ),
- .Y(\t$2512 )
- );
- XOR2x1_ASAP7_75t_R \U$1666 (
- .A(\t$2512 ),
- .B(a_registered[31]),
- .Y(booth_b30_m27)
- );
- AO22x1_ASAP7_75t_R \U$1667 (
- .A1(b_registered[27]),
- .A2(\sel_0$1883 ),
- .B1(b_registered[28]),
- .B2(\sel_1$1884 ),
- .Y(\t$2513 )
- );
- XOR2x1_ASAP7_75t_R \U$1668 (
- .A(\t$2513 ),
- .B(a_registered[31]),
- .Y(booth_b30_m28)
- );
- AO22x1_ASAP7_75t_R \U$1669 (
- .A1(b_registered[28]),
- .A2(\sel_0$1883 ),
- .B1(b_registered[29]),
- .B2(\sel_1$1884 ),
- .Y(\t$2514 )
- );
- XOR2x1_ASAP7_75t_R \U$1670 (
- .A(\t$2514 ),
- .B(a_registered[31]),
- .Y(booth_b30_m29)
- );
- AO22x1_ASAP7_75t_R \U$1671 (
- .A1(b_registered[29]),
- .A2(\sel_0$1883 ),
- .B1(b_registered[30]),
- .B2(\sel_1$1884 ),
- .Y(\t$2515 )
- );
- XOR2x1_ASAP7_75t_R \U$1672 (
- .A(\t$2515 ),
- .B(a_registered[31]),
- .Y(booth_b30_m30)
- );
- AO22x1_ASAP7_75t_R \U$1673 (
- .A1(b_registered[30]),
- .A2(\sel_0$1883 ),
- .B1(b_registered[31]),
- .B2(\sel_1$1884 ),
- .Y(\t$2516 )
- );
- XOR2x1_ASAP7_75t_R \U$1674 (
- .A(\t$2516 ),
- .B(a_registered[31]),
- .Y(booth_b30_m31)
- );
- AO22x1_ASAP7_75t_R \U$1675 (
- .A1(b_registered[31]),
- .A2(\sel_0$1883 ),
- .B1(1'h0),
- .B2(\sel_1$1884 ),
- .Y(\t$2517 )
- );
- XOR2x1_ASAP7_75t_R \U$1676 (
- .A(\t$2517 ),
- .B(a_registered[31]),
- .Y(booth_b30_m32)
- );
- INVx1_ASAP7_75t_R \U$1677 (
- .A(a_registered[31]),
- .Y(\notsign$1190 )
- );
- INVx1_ASAP7_75t_R \U$1678 (
- .A(a_registered[31]),
- .Y(\$49 )
- );
- INVx1_ASAP7_75t_R \U$1679 (
- .A(1'h0),
- .Y(\$50 )
- );
- INVx1_ASAP7_75t_R \U$1680 (
- .A(1'h0),
- .Y(\$51 )
- );
- AO33x2_ASAP7_75t_R \U$1681 (
- .A1(\$51 ),
- .A2(1'h0),
- .A3(a_registered[31]),
- .B1(1'h0),
- .B2(\$50 ),
- .B3(\$49 ),
- .Y(\sel_0$1921 )
- );
- XOR2x1_ASAP7_75t_R \U$1682 (
- .A(1'h0),
- .B(a_registered[31]),
- .Y(\sel_1$1922 )
- );
- AO22x1_ASAP7_75t_R \U$1683 (
- .A1(1'h0),
- .A2(\sel_0$1921 ),
- .B1(b_registered[0]),
- .B2(\sel_1$1922 ),
- .Y(\t$2519 )
- );
- XOR2x1_ASAP7_75t_R \U$1684 (
- .A(\t$2519 ),
- .B(1'h0),
- .Y(booth_b32_m0)
- );
- AO22x1_ASAP7_75t_R \U$1685 (
- .A1(b_registered[0]),
- .A2(\sel_0$1921 ),
- .B1(b_registered[1]),
- .B2(\sel_1$1922 ),
- .Y(\t$2520 )
- );
- XOR2x1_ASAP7_75t_R \U$1686 (
- .A(\t$2520 ),
- .B(1'h0),
- .Y(booth_b32_m1)
- );
- AO22x1_ASAP7_75t_R \U$1687 (
- .A1(b_registered[1]),
- .A2(\sel_0$1921 ),
- .B1(b_registered[2]),
- .B2(\sel_1$1922 ),
- .Y(\t$2521 )
- );
- XOR2x1_ASAP7_75t_R \U$1688 (
- .A(\t$2521 ),
- .B(1'h0),
- .Y(booth_b32_m2)
- );
- AO22x1_ASAP7_75t_R \U$1689 (
- .A1(b_registered[2]),
- .A2(\sel_0$1921 ),
- .B1(b_registered[3]),
- .B2(\sel_1$1922 ),
- .Y(\t$2522 )
- );
- XOR2x1_ASAP7_75t_R \U$1690 (
- .A(\t$2522 ),
- .B(1'h0),
- .Y(booth_b32_m3)
- );
- AO22x1_ASAP7_75t_R \U$1691 (
- .A1(b_registered[3]),
- .A2(\sel_0$1921 ),
- .B1(b_registered[4]),
- .B2(\sel_1$1922 ),
- .Y(\t$2523 )
- );
- XOR2x1_ASAP7_75t_R \U$1692 (
- .A(\t$2523 ),
- .B(1'h0),
- .Y(booth_b32_m4)
- );
- AO22x1_ASAP7_75t_R \U$1693 (
- .A1(b_registered[4]),
- .A2(\sel_0$1921 ),
- .B1(b_registered[5]),
- .B2(\sel_1$1922 ),
- .Y(\t$2524 )
- );
- XOR2x1_ASAP7_75t_R \U$1694 (
- .A(\t$2524 ),
- .B(1'h0),
- .Y(booth_b32_m5)
- );
- AO22x1_ASAP7_75t_R \U$1695 (
- .A1(b_registered[5]),
- .A2(\sel_0$1921 ),
- .B1(b_registered[6]),
- .B2(\sel_1$1922 ),
- .Y(\t$2525 )
- );
- XOR2x1_ASAP7_75t_R \U$1696 (
- .A(\t$2525 ),
- .B(1'h0),
- .Y(booth_b32_m6)
- );
- AO22x1_ASAP7_75t_R \U$1697 (
- .A1(b_registered[6]),
- .A2(\sel_0$1921 ),
- .B1(b_registered[7]),
- .B2(\sel_1$1922 ),
- .Y(\t$2526 )
- );
- XOR2x1_ASAP7_75t_R \U$1698 (
- .A(\t$2526 ),
- .B(1'h0),
- .Y(booth_b32_m7)
- );
- AO22x1_ASAP7_75t_R \U$1699 (
- .A1(b_registered[7]),
- .A2(\sel_0$1921 ),
- .B1(b_registered[8]),
- .B2(\sel_1$1922 ),
- .Y(\t$2527 )
- );
- XOR2x1_ASAP7_75t_R \U$1700 (
- .A(\t$2527 ),
- .B(1'h0),
- .Y(booth_b32_m8)
- );
- AO22x1_ASAP7_75t_R \U$1701 (
- .A1(b_registered[8]),
- .A2(\sel_0$1921 ),
- .B1(b_registered[9]),
- .B2(\sel_1$1922 ),
- .Y(\t$2528 )
- );
- XOR2x1_ASAP7_75t_R \U$1702 (
- .A(\t$2528 ),
- .B(1'h0),
- .Y(booth_b32_m9)
- );
- AO22x1_ASAP7_75t_R \U$1703 (
- .A1(b_registered[9]),
- .A2(\sel_0$1921 ),
- .B1(b_registered[10]),
- .B2(\sel_1$1922 ),
- .Y(\t$2529 )
- );
- XOR2x1_ASAP7_75t_R \U$1704 (
- .A(\t$2529 ),
- .B(1'h0),
- .Y(booth_b32_m10)
- );
- AO22x1_ASAP7_75t_R \U$1705 (
- .A1(b_registered[10]),
- .A2(\sel_0$1921 ),
- .B1(b_registered[11]),
- .B2(\sel_1$1922 ),
- .Y(\t$2530 )
- );
- XOR2x1_ASAP7_75t_R \U$1706 (
- .A(\t$2530 ),
- .B(1'h0),
- .Y(booth_b32_m11)
- );
- AO22x1_ASAP7_75t_R \U$1707 (
- .A1(b_registered[11]),
- .A2(\sel_0$1921 ),
- .B1(b_registered[12]),
- .B2(\sel_1$1922 ),
- .Y(\t$2531 )
- );
- XOR2x1_ASAP7_75t_R \U$1708 (
- .A(\t$2531 ),
- .B(1'h0),
- .Y(booth_b32_m12)
- );
- AO22x1_ASAP7_75t_R \U$1709 (
- .A1(b_registered[12]),
- .A2(\sel_0$1921 ),
- .B1(b_registered[13]),
- .B2(\sel_1$1922 ),
- .Y(\t$2532 )
- );
- XOR2x1_ASAP7_75t_R \U$1710 (
- .A(\t$2532 ),
- .B(1'h0),
- .Y(booth_b32_m13)
- );
- AO22x1_ASAP7_75t_R \U$1711 (
- .A1(b_registered[13]),
- .A2(\sel_0$1921 ),
- .B1(b_registered[14]),
- .B2(\sel_1$1922 ),
- .Y(\t$2533 )
- );
- XOR2x1_ASAP7_75t_R \U$1712 (
- .A(\t$2533 ),
- .B(1'h0),
- .Y(booth_b32_m14)
- );
- AO22x1_ASAP7_75t_R \U$1713 (
- .A1(b_registered[14]),
- .A2(\sel_0$1921 ),
- .B1(b_registered[15]),
- .B2(\sel_1$1922 ),
- .Y(\t$2534 )
- );
- XOR2x1_ASAP7_75t_R \U$1714 (
- .A(\t$2534 ),
- .B(1'h0),
- .Y(booth_b32_m15)
- );
- AO22x1_ASAP7_75t_R \U$1715 (
- .A1(b_registered[15]),
- .A2(\sel_0$1921 ),
- .B1(b_registered[16]),
- .B2(\sel_1$1922 ),
- .Y(\t$2535 )
- );
- XOR2x1_ASAP7_75t_R \U$1716 (
- .A(\t$2535 ),
- .B(1'h0),
- .Y(booth_b32_m16)
- );
- AO22x1_ASAP7_75t_R \U$1717 (
- .A1(b_registered[16]),
- .A2(\sel_0$1921 ),
- .B1(b_registered[17]),
- .B2(\sel_1$1922 ),
- .Y(\t$2536 )
- );
- XOR2x1_ASAP7_75t_R \U$1718 (
- .A(\t$2536 ),
- .B(1'h0),
- .Y(booth_b32_m17)
- );
- AO22x1_ASAP7_75t_R \U$1719 (
- .A1(b_registered[17]),
- .A2(\sel_0$1921 ),
- .B1(b_registered[18]),
- .B2(\sel_1$1922 ),
- .Y(\t$2537 )
- );
- XOR2x1_ASAP7_75t_R \U$1720 (
- .A(\t$2537 ),
- .B(1'h0),
- .Y(booth_b32_m18)
- );
- AO22x1_ASAP7_75t_R \U$1721 (
- .A1(b_registered[18]),
- .A2(\sel_0$1921 ),
- .B1(b_registered[19]),
- .B2(\sel_1$1922 ),
- .Y(\t$2538 )
- );
- XOR2x1_ASAP7_75t_R \U$1722 (
- .A(\t$2538 ),
- .B(1'h0),
- .Y(booth_b32_m19)
- );
- AO22x1_ASAP7_75t_R \U$1723 (
- .A1(b_registered[19]),
- .A2(\sel_0$1921 ),
- .B1(b_registered[20]),
- .B2(\sel_1$1922 ),
- .Y(\t$2539 )
- );
- XOR2x1_ASAP7_75t_R \U$1724 (
- .A(\t$2539 ),
- .B(1'h0),
- .Y(booth_b32_m20)
- );
- AO22x1_ASAP7_75t_R \U$1725 (
- .A1(b_registered[20]),
- .A2(\sel_0$1921 ),
- .B1(b_registered[21]),
- .B2(\sel_1$1922 ),
- .Y(\t$2540 )
- );
- XOR2x1_ASAP7_75t_R \U$1726 (
- .A(\t$2540 ),
- .B(1'h0),
- .Y(booth_b32_m21)
- );
- AO22x1_ASAP7_75t_R \U$1727 (
- .A1(b_registered[21]),
- .A2(\sel_0$1921 ),
- .B1(b_registered[22]),
- .B2(\sel_1$1922 ),
- .Y(\t$2541 )
- );
- XOR2x1_ASAP7_75t_R \U$1728 (
- .A(\t$2541 ),
- .B(1'h0),
- .Y(booth_b32_m22)
- );
- AO22x1_ASAP7_75t_R \U$1729 (
- .A1(b_registered[22]),
- .A2(\sel_0$1921 ),
- .B1(b_registered[23]),
- .B2(\sel_1$1922 ),
- .Y(\t$2542 )
- );
- XOR2x1_ASAP7_75t_R \U$1730 (
- .A(\t$2542 ),
- .B(1'h0),
- .Y(booth_b32_m23)
- );
- AO22x1_ASAP7_75t_R \U$1731 (
- .A1(b_registered[23]),
- .A2(\sel_0$1921 ),
- .B1(b_registered[24]),
- .B2(\sel_1$1922 ),
- .Y(\t$2543 )
- );
- XOR2x1_ASAP7_75t_R \U$1732 (
- .A(\t$2543 ),
- .B(1'h0),
- .Y(booth_b32_m24)
- );
- AO22x1_ASAP7_75t_R \U$1733 (
- .A1(b_registered[24]),
- .A2(\sel_0$1921 ),
- .B1(b_registered[25]),
- .B2(\sel_1$1922 ),
- .Y(\t$2544 )
- );
- XOR2x1_ASAP7_75t_R \U$1734 (
- .A(\t$2544 ),
- .B(1'h0),
- .Y(booth_b32_m25)
- );
- AO22x1_ASAP7_75t_R \U$1735 (
- .A1(b_registered[25]),
- .A2(\sel_0$1921 ),
- .B1(b_registered[26]),
- .B2(\sel_1$1922 ),
- .Y(\t$2545 )
- );
- XOR2x1_ASAP7_75t_R \U$1736 (
- .A(\t$2545 ),
- .B(1'h0),
- .Y(booth_b32_m26)
- );
- AO22x1_ASAP7_75t_R \U$1737 (
- .A1(b_registered[26]),
- .A2(\sel_0$1921 ),
- .B1(b_registered[27]),
- .B2(\sel_1$1922 ),
- .Y(\t$2546 )
- );
- XOR2x1_ASAP7_75t_R \U$1738 (
- .A(\t$2546 ),
- .B(1'h0),
- .Y(booth_b32_m27)
- );
- AO22x1_ASAP7_75t_R \U$1739 (
- .A1(b_registered[27]),
- .A2(\sel_0$1921 ),
- .B1(b_registered[28]),
- .B2(\sel_1$1922 ),
- .Y(\t$2547 )
- );
- XOR2x1_ASAP7_75t_R \U$1740 (
- .A(\t$2547 ),
- .B(1'h0),
- .Y(booth_b32_m28)
- );
- AO22x1_ASAP7_75t_R \U$1741 (
- .A1(b_registered[28]),
- .A2(\sel_0$1921 ),
- .B1(b_registered[29]),
- .B2(\sel_1$1922 ),
- .Y(\t$2548 )
- );
- XOR2x1_ASAP7_75t_R \U$1742 (
- .A(\t$2548 ),
- .B(1'h0),
- .Y(booth_b32_m29)
- );
- AO22x1_ASAP7_75t_R \U$1743 (
- .A1(b_registered[29]),
- .A2(\sel_0$1921 ),
- .B1(b_registered[30]),
- .B2(\sel_1$1922 ),
- .Y(\t$2549 )
- );
- XOR2x1_ASAP7_75t_R \U$1744 (
- .A(\t$2549 ),
- .B(1'h0),
- .Y(booth_b32_m30)
- );
- AO22x1_ASAP7_75t_R \U$1745 (
- .A1(b_registered[30]),
- .A2(\sel_0$1921 ),
- .B1(b_registered[31]),
- .B2(\sel_1$1922 ),
- .Y(\t$2550 )
- );
- XOR2x1_ASAP7_75t_R \U$1746 (
- .A(\t$2550 ),
- .B(1'h0),
- .Y(booth_b32_m31)
- );
- AO22x1_ASAP7_75t_R \U$1747 (
- .A1(b_registered[31]),
- .A2(\sel_0$1921 ),
- .B1(1'h0),
- .B2(\sel_1$1922 ),
- .Y(\t$2551 )
- );
- XOR2x1_ASAP7_75t_R \U$1748 (
- .A(\t$2551 ),
- .B(1'h0),
- .Y(booth_b32_m32)
- );
- INVx1_ASAP7_75t_R \U$1749 (
- .A(1'h0),
- .Y(\$52 )
- );
- INVx1_ASAP7_75t_R \U$1750 (
- .A(con),
- .Y(\c$2553 )
- );
- INVx1_ASAP7_75t_R \U$1751 (
- .A(sn),
- .Y(\s$2555 )
- );
- INVx1_ASAP7_75t_R \U$1752 (
- .A(\con$2556 ),
- .Y(\c$2557 )
- );
- INVx1_ASAP7_75t_R \U$1753 (
- .A(\sn$2558 ),
- .Y(\s$2559 )
- );
- INVx1_ASAP7_75t_R \U$1754 (
- .A(\con$2560 ),
- .Y(\c$2561 )
- );
- INVx1_ASAP7_75t_R \U$1755 (
- .A(\sn$2562 ),
- .Y(\s$2563 )
- );
- INVx1_ASAP7_75t_R \U$1756 (
- .A(\con$2564 ),
- .Y(\c$2565 )
- );
- INVx1_ASAP7_75t_R \U$1757 (
- .A(\sn$2566 ),
- .Y(\s$2567 )
- );
- INVx1_ASAP7_75t_R \U$1758 (
- .A(\con$2568 ),
- .Y(\c$2569 )
- );
- INVx1_ASAP7_75t_R \U$1759 (
- .A(\sn$2570 ),
- .Y(\s$2571 )
- );
- INVx1_ASAP7_75t_R \U$1760 (
- .A(\con$2572 ),
- .Y(\c$2573 )
- );
- INVx1_ASAP7_75t_R \U$1761 (
- .A(\sn$2574 ),
- .Y(\s$2575 )
- );
- INVx1_ASAP7_75t_R \U$1762 (
- .A(\con$2576 ),
- .Y(\c$2577 )
- );
- INVx1_ASAP7_75t_R \U$1763 (
- .A(\sn$2578 ),
- .Y(\s$2579 )
- );
- INVx1_ASAP7_75t_R \U$1764 (
- .A(\con$2580 ),
- .Y(\c$2581 )
- );
- INVx1_ASAP7_75t_R \U$1765 (
- .A(\sn$2582 ),
- .Y(\s$2583 )
- );
- INVx1_ASAP7_75t_R \U$1766 (
- .A(\con$2584 ),
- .Y(\c$2585 )
- );
- INVx1_ASAP7_75t_R \U$1767 (
- .A(\sn$2586 ),
- .Y(\s$2587 )
- );
- INVx1_ASAP7_75t_R \U$1768 (
- .A(\con$2588 ),
- .Y(\c$2589 )
- );
- INVx1_ASAP7_75t_R \U$1769 (
- .A(\sn$2590 ),
- .Y(\s$2591 )
- );
- INVx1_ASAP7_75t_R \U$1770 (
- .A(\con$2592 ),
- .Y(\c$2593 )
- );
- INVx1_ASAP7_75t_R \U$1771 (
- .A(\sn$2594 ),
- .Y(\s$2595 )
- );
- INVx1_ASAP7_75t_R \U$1772 (
- .A(\con$2596 ),
- .Y(\c$2597 )
- );
- INVx1_ASAP7_75t_R \U$1773 (
- .A(\sn$2598 ),
- .Y(\s$2599 )
- );
- INVx1_ASAP7_75t_R \U$1774 (
- .A(\con$2600 ),
- .Y(\c$2601 )
- );
- INVx1_ASAP7_75t_R \U$1775 (
- .A(\sn$2602 ),
- .Y(\s$2603 )
- );
- INVx1_ASAP7_75t_R \U$1776 (
- .A(\con$2604 ),
- .Y(\c$2605 )
- );
- INVx1_ASAP7_75t_R \U$1777 (
- .A(\sn$2606 ),
- .Y(\s$2607 )
- );
- INVx1_ASAP7_75t_R \U$1778 (
- .A(\con$2608 ),
- .Y(\c$2609 )
- );
- INVx1_ASAP7_75t_R \U$1779 (
- .A(\sn$2610 ),
- .Y(\s$2611 )
- );
- INVx1_ASAP7_75t_R \U$1780 (
- .A(\con$2612 ),
- .Y(\c$2613 )
- );
- INVx1_ASAP7_75t_R \U$1781 (
- .A(\sn$2614 ),
- .Y(\s$2615 )
- );
- INVx1_ASAP7_75t_R \U$1782 (
- .A(\con$2616 ),
- .Y(\c$2617 )
- );
- INVx1_ASAP7_75t_R \U$1783 (
- .A(\sn$2618 ),
- .Y(\s$2619 )
- );
- INVx1_ASAP7_75t_R \U$1784 (
- .A(\con$2620 ),
- .Y(\c$2621 )
- );
- INVx1_ASAP7_75t_R \U$1785 (
- .A(\sn$2622 ),
- .Y(\s$2623 )
- );
- INVx1_ASAP7_75t_R \U$1786 (
- .A(\con$2624 ),
- .Y(\c$2625 )
- );
- INVx1_ASAP7_75t_R \U$1787 (
- .A(\sn$2626 ),
- .Y(\s$2627 )
- );
- INVx1_ASAP7_75t_R \U$1788 (
- .A(\con$2628 ),
- .Y(\c$2629 )
- );
- INVx1_ASAP7_75t_R \U$1789 (
- .A(\sn$2630 ),
- .Y(\s$2631 )
- );
- INVx1_ASAP7_75t_R \U$1790 (
- .A(\con$2632 ),
- .Y(\c$2633 )
- );
- INVx1_ASAP7_75t_R \U$1791 (
- .A(\sn$2634 ),
- .Y(\s$2635 )
- );
- INVx1_ASAP7_75t_R \U$1792 (
- .A(\con$2636 ),
- .Y(\c$2637 )
- );
- INVx1_ASAP7_75t_R \U$1793 (
- .A(\sn$2638 ),
- .Y(\s$2639 )
- );
- INVx1_ASAP7_75t_R \U$1794 (
- .A(\con$2640 ),
- .Y(\c$2641 )
- );
- INVx1_ASAP7_75t_R \U$1795 (
- .A(\sn$2642 ),
- .Y(\s$2643 )
- );
- INVx1_ASAP7_75t_R \U$1796 (
- .A(\con$2644 ),
- .Y(\c$2645 )
- );
- INVx1_ASAP7_75t_R \U$1797 (
- .A(\sn$2646 ),
- .Y(\s$2647 )
- );
- INVx1_ASAP7_75t_R \U$1798 (
- .A(\con$2648 ),
- .Y(\c$2649 )
- );
- INVx1_ASAP7_75t_R \U$1799 (
- .A(\sn$2650 ),
- .Y(\s$2651 )
- );
- INVx1_ASAP7_75t_R \U$1800 (
- .A(\con$2652 ),
- .Y(\c$2653 )
- );
- INVx1_ASAP7_75t_R \U$1801 (
- .A(\sn$2654 ),
- .Y(\s$2655 )
- );
- INVx1_ASAP7_75t_R \U$1802 (
- .A(\con$2656 ),
- .Y(\c$2657 )
- );
- INVx1_ASAP7_75t_R \U$1803 (
- .A(\sn$2658 ),
- .Y(\s$2659 )
- );
- INVx1_ASAP7_75t_R \U$1804 (
- .A(\con$2660 ),
- .Y(\c$2661 )
- );
- INVx1_ASAP7_75t_R \U$1805 (
- .A(\sn$2662 ),
- .Y(\s$2663 )
- );
- INVx1_ASAP7_75t_R \U$1806 (
- .A(\con$2664 ),
- .Y(\c$2665 )
- );
- INVx1_ASAP7_75t_R \U$1807 (
- .A(\sn$2666 ),
- .Y(\s$2667 )
- );
- INVx1_ASAP7_75t_R \U$1808 (
- .A(\con$2668 ),
- .Y(\c$2669 )
- );
- INVx1_ASAP7_75t_R \U$1809 (
- .A(\sn$2670 ),
- .Y(\s$2671 )
- );
- INVx1_ASAP7_75t_R \U$1810 (
- .A(\con$2672 ),
- .Y(\c$2673 )
- );
- INVx1_ASAP7_75t_R \U$1811 (
- .A(\sn$2674 ),
- .Y(\s$2675 )
- );
- INVx1_ASAP7_75t_R \U$1812 (
- .A(\con$2676 ),
- .Y(\c$2677 )
- );
- INVx1_ASAP7_75t_R \U$1813 (
- .A(\sn$2678 ),
- .Y(\s$2679 )
- );
- INVx1_ASAP7_75t_R \U$1814 (
- .A(\con$2680 ),
- .Y(\c$2681 )
- );
- INVx1_ASAP7_75t_R \U$1815 (
- .A(\sn$2682 ),
- .Y(\s$2683 )
- );
- INVx1_ASAP7_75t_R \U$1816 (
- .A(\con$2684 ),
- .Y(\c$2685 )
- );
- INVx1_ASAP7_75t_R \U$1817 (
- .A(\sn$2686 ),
- .Y(\s$2687 )
- );
- INVx1_ASAP7_75t_R \U$1818 (
- .A(\con$2688 ),
- .Y(\c$2689 )
- );
- INVx1_ASAP7_75t_R \U$1819 (
- .A(\sn$2690 ),
- .Y(\s$2691 )
- );
- INVx1_ASAP7_75t_R \U$1820 (
- .A(\con$2692 ),
- .Y(\c$2693 )
- );
- INVx1_ASAP7_75t_R \U$1821 (
- .A(\sn$2694 ),
- .Y(\s$2695 )
- );
- INVx1_ASAP7_75t_R \U$1822 (
- .A(\con$2696 ),
- .Y(\c$2697 )
- );
- INVx1_ASAP7_75t_R \U$1823 (
- .A(\sn$2698 ),
- .Y(\s$2699 )
- );
- INVx1_ASAP7_75t_R \U$1824 (
- .A(\con$2700 ),
- .Y(\c$2701 )
- );
- INVx1_ASAP7_75t_R \U$1825 (
- .A(\sn$2702 ),
- .Y(\s$2703 )
- );
- INVx1_ASAP7_75t_R \U$1826 (
- .A(\con$2704 ),
- .Y(\c$2705 )
- );
- INVx1_ASAP7_75t_R \U$1827 (
- .A(\sn$2706 ),
- .Y(\s$2707 )
- );
- INVx1_ASAP7_75t_R \U$1828 (
- .A(\con$2708 ),
- .Y(\c$2709 )
- );
- INVx1_ASAP7_75t_R \U$1829 (
- .A(\sn$2710 ),
- .Y(\s$2711 )
- );
- INVx1_ASAP7_75t_R \U$1830 (
- .A(\con$2712 ),
- .Y(\c$2713 )
- );
- INVx1_ASAP7_75t_R \U$1831 (
- .A(\sn$2714 ),
- .Y(\s$2715 )
- );
- INVx1_ASAP7_75t_R \U$1832 (
- .A(\con$2716 ),
- .Y(\c$2717 )
- );
- INVx1_ASAP7_75t_R \U$1833 (
- .A(\sn$2718 ),
- .Y(\s$2719 )
- );
- INVx1_ASAP7_75t_R \U$1834 (
- .A(\con$2720 ),
- .Y(\c$2721 )
- );
- INVx1_ASAP7_75t_R \U$1835 (
- .A(\sn$2722 ),
- .Y(\s$2723 )
- );
- INVx1_ASAP7_75t_R \U$1836 (
- .A(\con$2724 ),
- .Y(\c$2725 )
- );
- INVx1_ASAP7_75t_R \U$1837 (
- .A(\sn$2726 ),
- .Y(\s$2727 )
- );
- INVx1_ASAP7_75t_R \U$1838 (
- .A(\con$2728 ),
- .Y(\c$2729 )
- );
- INVx1_ASAP7_75t_R \U$1839 (
- .A(\sn$2730 ),
- .Y(\s$2731 )
- );
- INVx1_ASAP7_75t_R \U$1840 (
- .A(\con$2732 ),
- .Y(\c$2733 )
- );
- INVx1_ASAP7_75t_R \U$1841 (
- .A(\sn$2734 ),
- .Y(\s$2735 )
- );
- INVx1_ASAP7_75t_R \U$1842 (
- .A(\con$2736 ),
- .Y(\c$2737 )
- );
- INVx1_ASAP7_75t_R \U$1843 (
- .A(\sn$2738 ),
- .Y(\s$2739 )
- );
- INVx1_ASAP7_75t_R \U$1844 (
- .A(\con$2740 ),
- .Y(\c$2741 )
- );
- INVx1_ASAP7_75t_R \U$1845 (
- .A(\sn$2742 ),
- .Y(\s$2743 )
- );
- INVx1_ASAP7_75t_R \U$1846 (
- .A(\con$2744 ),
- .Y(\c$2745 )
- );
- INVx1_ASAP7_75t_R \U$1847 (
- .A(\sn$2746 ),
- .Y(\s$2747 )
- );
- INVx1_ASAP7_75t_R \U$1848 (
- .A(\con$2748 ),
- .Y(\c$2749 )
- );
- INVx1_ASAP7_75t_R \U$1849 (
- .A(\sn$2750 ),
- .Y(\s$2751 )
- );
- INVx1_ASAP7_75t_R \U$1850 (
- .A(\con$2752 ),
- .Y(\c$2753 )
- );
- INVx1_ASAP7_75t_R \U$1851 (
- .A(\sn$2754 ),
- .Y(\s$2755 )
- );
- INVx1_ASAP7_75t_R \U$1852 (
- .A(\con$2756 ),
- .Y(\c$2757 )
- );
- INVx1_ASAP7_75t_R \U$1853 (
- .A(\sn$2758 ),
- .Y(\s$2759 )
- );
- INVx1_ASAP7_75t_R \U$1854 (
- .A(\con$2760 ),
- .Y(\c$2761 )
- );
- INVx1_ASAP7_75t_R \U$1855 (
- .A(\sn$2762 ),
- .Y(\s$2763 )
- );
- INVx1_ASAP7_75t_R \U$1856 (
- .A(\con$2764 ),
- .Y(\c$2765 )
- );
- INVx1_ASAP7_75t_R \U$1857 (
- .A(\sn$2766 ),
- .Y(\s$2767 )
- );
- INVx1_ASAP7_75t_R \U$1858 (
- .A(\con$2768 ),
- .Y(\c$2769 )
- );
- INVx1_ASAP7_75t_R \U$1859 (
- .A(\sn$2770 ),
- .Y(\s$2771 )
- );
- INVx1_ASAP7_75t_R \U$1860 (
- .A(\con$2772 ),
- .Y(\c$2773 )
- );
- INVx1_ASAP7_75t_R \U$1861 (
- .A(\sn$2774 ),
- .Y(\s$2775 )
- );
- INVx1_ASAP7_75t_R \U$1862 (
- .A(\con$2776 ),
- .Y(\c$2777 )
- );
- INVx1_ASAP7_75t_R \U$1863 (
- .A(\sn$2778 ),
- .Y(\s$2779 )
- );
- INVx1_ASAP7_75t_R \U$1864 (
- .A(\con$2780 ),
- .Y(\c$2781 )
- );
- INVx1_ASAP7_75t_R \U$1865 (
- .A(\sn$2782 ),
- .Y(\s$2783 )
- );
- INVx1_ASAP7_75t_R \U$1866 (
- .A(\con$2784 ),
- .Y(\c$2785 )
- );
- INVx1_ASAP7_75t_R \U$1867 (
- .A(\sn$2786 ),
- .Y(\s$2787 )
- );
- INVx1_ASAP7_75t_R \U$1868 (
- .A(\con$2788 ),
- .Y(\c$2789 )
- );
- INVx1_ASAP7_75t_R \U$1869 (
- .A(\sn$2790 ),
- .Y(\s$2791 )
- );
- INVx1_ASAP7_75t_R \U$1870 (
- .A(\con$2792 ),
- .Y(\c$2793 )
- );
- INVx1_ASAP7_75t_R \U$1871 (
- .A(\sn$2794 ),
- .Y(\s$2795 )
- );
- INVx1_ASAP7_75t_R \U$1872 (
- .A(\con$2796 ),
- .Y(\c$2797 )
- );
- INVx1_ASAP7_75t_R \U$1873 (
- .A(\sn$2798 ),
- .Y(\s$2799 )
- );
- INVx1_ASAP7_75t_R \U$1874 (
- .A(\con$2800 ),
- .Y(\c$2801 )
- );
- INVx1_ASAP7_75t_R \U$1875 (
- .A(\sn$2802 ),
- .Y(\s$2803 )
- );
- INVx1_ASAP7_75t_R \U$1876 (
- .A(\con$2804 ),
- .Y(\c$2805 )
- );
- INVx1_ASAP7_75t_R \U$1877 (
- .A(\sn$2806 ),
- .Y(\s$2807 )
- );
- INVx1_ASAP7_75t_R \U$1878 (
- .A(\con$2808 ),
- .Y(\c$2809 )
- );
- INVx1_ASAP7_75t_R \U$1879 (
- .A(\sn$2810 ),
- .Y(\s$2811 )
- );
- INVx1_ASAP7_75t_R \U$1880 (
- .A(\con$2812 ),
- .Y(\c$2813 )
- );
- INVx1_ASAP7_75t_R \U$1881 (
- .A(\sn$2814 ),
- .Y(\s$2815 )
- );
- INVx1_ASAP7_75t_R \U$1882 (
- .A(\con$2816 ),
- .Y(\c$2817 )
- );
- INVx1_ASAP7_75t_R \U$1883 (
- .A(\sn$2818 ),
- .Y(\s$2819 )
- );
- INVx1_ASAP7_75t_R \U$1884 (
- .A(\con$2820 ),
- .Y(\c$2821 )
- );
- INVx1_ASAP7_75t_R \U$1885 (
- .A(\sn$2822 ),
- .Y(\s$2823 )
- );
- INVx1_ASAP7_75t_R \U$1886 (
- .A(\con$2824 ),
- .Y(\c$2825 )
- );
- INVx1_ASAP7_75t_R \U$1887 (
- .A(\sn$2826 ),
- .Y(\s$2827 )
- );
- INVx1_ASAP7_75t_R \U$1888 (
- .A(\con$2828 ),
- .Y(\c$2829 )
- );
- INVx1_ASAP7_75t_R \U$1889 (
- .A(\sn$2830 ),
- .Y(\s$2831 )
- );
- INVx1_ASAP7_75t_R \U$1890 (
- .A(\con$2832 ),
- .Y(\c$2833 )
- );
- INVx1_ASAP7_75t_R \U$1891 (
- .A(\sn$2834 ),
- .Y(\s$2835 )
- );
- INVx1_ASAP7_75t_R \U$1892 (
- .A(\con$2836 ),
- .Y(\c$2837 )
- );
- INVx1_ASAP7_75t_R \U$1893 (
- .A(\sn$2838 ),
- .Y(\s$2839 )
- );
- INVx1_ASAP7_75t_R \U$1894 (
- .A(\con$2840 ),
- .Y(\c$2841 )
- );
- INVx1_ASAP7_75t_R \U$1895 (
- .A(\sn$2842 ),
- .Y(\s$2843 )
- );
- INVx1_ASAP7_75t_R \U$1896 (
- .A(\con$2844 ),
- .Y(\c$2845 )
- );
- INVx1_ASAP7_75t_R \U$1897 (
- .A(\sn$2846 ),
- .Y(\s$2847 )
- );
- INVx1_ASAP7_75t_R \U$1898 (
- .A(\con$2848 ),
- .Y(\c$2849 )
- );
- INVx1_ASAP7_75t_R \U$1899 (
- .A(\sn$2850 ),
- .Y(\s$2851 )
- );
- INVx1_ASAP7_75t_R \U$1900 (
- .A(\con$2852 ),
- .Y(\c$2853 )
- );
- INVx1_ASAP7_75t_R \U$1901 (
- .A(\sn$2854 ),
- .Y(\s$2855 )
- );
- INVx1_ASAP7_75t_R \U$1902 (
- .A(\con$2856 ),
- .Y(\c$2857 )
- );
- INVx1_ASAP7_75t_R \U$1903 (
- .A(\sn$2858 ),
- .Y(\s$2859 )
- );
- INVx1_ASAP7_75t_R \U$1904 (
- .A(\con$2860 ),
- .Y(\c$2861 )
- );
- INVx1_ASAP7_75t_R \U$1905 (
- .A(\sn$2862 ),
- .Y(\s$2863 )
- );
- INVx1_ASAP7_75t_R \U$1906 (
- .A(\con$2864 ),
- .Y(\c$2865 )
- );
- INVx1_ASAP7_75t_R \U$1907 (
- .A(\sn$2866 ),
- .Y(\s$2867 )
- );
- INVx1_ASAP7_75t_R \U$1908 (
- .A(\con$2868 ),
- .Y(\c$2869 )
- );
- INVx1_ASAP7_75t_R \U$1909 (
- .A(\sn$2870 ),
- .Y(\s$2871 )
- );
- INVx1_ASAP7_75t_R \U$1910 (
- .A(\con$2872 ),
- .Y(\c$2873 )
- );
- INVx1_ASAP7_75t_R \U$1911 (
- .A(\sn$2874 ),
- .Y(\s$2875 )
- );
- INVx1_ASAP7_75t_R \U$1912 (
- .A(\con$2876 ),
- .Y(\c$2877 )
- );
- INVx1_ASAP7_75t_R \U$1913 (
- .A(\sn$2878 ),
- .Y(\s$2879 )
- );
- INVx1_ASAP7_75t_R \U$1914 (
- .A(\con$2880 ),
- .Y(\c$2881 )
- );
- INVx1_ASAP7_75t_R \U$1915 (
- .A(\sn$2882 ),
- .Y(\s$2883 )
- );
- INVx1_ASAP7_75t_R \U$1916 (
- .A(\con$2884 ),
- .Y(\c$2885 )
- );
- INVx1_ASAP7_75t_R \U$1917 (
- .A(\sn$2886 ),
- .Y(\s$2887 )
- );
- INVx1_ASAP7_75t_R \U$1918 (
- .A(\con$2888 ),
- .Y(\c$2889 )
- );
- INVx1_ASAP7_75t_R \U$1919 (
- .A(\sn$2890 ),
- .Y(\s$2891 )
- );
- INVx1_ASAP7_75t_R \U$1920 (
- .A(\con$2892 ),
- .Y(\c$2893 )
- );
- INVx1_ASAP7_75t_R \U$1921 (
- .A(\sn$2894 ),
- .Y(\s$2895 )
- );
- INVx1_ASAP7_75t_R \U$1922 (
- .A(\con$2896 ),
- .Y(\c$2897 )
- );
- INVx1_ASAP7_75t_R \U$1923 (
- .A(\sn$2898 ),
- .Y(\s$2899 )
- );
- INVx1_ASAP7_75t_R \U$1924 (
- .A(\con$2900 ),
- .Y(\c$2901 )
- );
- INVx1_ASAP7_75t_R \U$1925 (
- .A(\sn$2902 ),
- .Y(\s$2903 )
- );
- INVx1_ASAP7_75t_R \U$1926 (
- .A(\con$2904 ),
- .Y(\c$2905 )
- );
- INVx1_ASAP7_75t_R \U$1927 (
- .A(\sn$2906 ),
- .Y(\s$2907 )
- );
- INVx1_ASAP7_75t_R \U$1928 (
- .A(\con$2908 ),
- .Y(\c$2909 )
- );
- INVx1_ASAP7_75t_R \U$1929 (
- .A(\sn$2910 ),
- .Y(\s$2911 )
- );
- INVx1_ASAP7_75t_R \U$1930 (
- .A(\con$2912 ),
- .Y(\c$2913 )
- );
- INVx1_ASAP7_75t_R \U$1931 (
- .A(\sn$2914 ),
- .Y(\s$2915 )
- );
- INVx1_ASAP7_75t_R \U$1932 (
- .A(\con$2916 ),
- .Y(\c$2917 )
- );
- INVx1_ASAP7_75t_R \U$1933 (
- .A(\sn$2918 ),
- .Y(\s$2919 )
- );
- INVx1_ASAP7_75t_R \U$1934 (
- .A(\con$2920 ),
- .Y(\c$2921 )
- );
- INVx1_ASAP7_75t_R \U$1935 (
- .A(\sn$2922 ),
- .Y(\s$2923 )
- );
- INVx1_ASAP7_75t_R \U$1936 (
- .A(\con$2924 ),
- .Y(\c$2925 )
- );
- INVx1_ASAP7_75t_R \U$1937 (
- .A(\sn$2926 ),
- .Y(\s$2927 )
- );
- INVx1_ASAP7_75t_R \U$1938 (
- .A(\con$2928 ),
- .Y(\c$2929 )
- );
- INVx1_ASAP7_75t_R \U$1939 (
- .A(\sn$2930 ),
- .Y(\s$2931 )
- );
- INVx1_ASAP7_75t_R \U$1940 (
- .A(\con$2932 ),
- .Y(\c$2933 )
- );
- INVx1_ASAP7_75t_R \U$1941 (
- .A(\sn$2934 ),
- .Y(\s$2935 )
- );
- INVx1_ASAP7_75t_R \U$1942 (
- .A(\con$2936 ),
- .Y(\c$2937 )
- );
- INVx1_ASAP7_75t_R \U$1943 (
- .A(\sn$2938 ),
- .Y(\s$2939 )
- );
- INVx1_ASAP7_75t_R \U$1944 (
- .A(\con$2940 ),
- .Y(\c$2941 )
- );
- INVx1_ASAP7_75t_R \U$1945 (
- .A(\sn$2942 ),
- .Y(\s$2943 )
- );
- INVx1_ASAP7_75t_R \U$1946 (
- .A(\con$2944 ),
- .Y(\c$2945 )
- );
- INVx1_ASAP7_75t_R \U$1947 (
- .A(\sn$2946 ),
- .Y(\s$2947 )
- );
- INVx1_ASAP7_75t_R \U$1948 (
- .A(\con$2948 ),
- .Y(\c$2949 )
- );
- INVx1_ASAP7_75t_R \U$1949 (
- .A(\sn$2950 ),
- .Y(\s$2951 )
- );
- INVx1_ASAP7_75t_R \U$1950 (
- .A(\con$2952 ),
- .Y(\c$2953 )
- );
- INVx1_ASAP7_75t_R \U$1951 (
- .A(\sn$2954 ),
- .Y(\s$2955 )
- );
- INVx1_ASAP7_75t_R \U$1952 (
- .A(\con$2956 ),
- .Y(\c$2957 )
- );
- INVx1_ASAP7_75t_R \U$1953 (
- .A(\sn$2958 ),
- .Y(\s$2959 )
- );
- INVx1_ASAP7_75t_R \U$1954 (
- .A(\con$2960 ),
- .Y(\c$2961 )
- );
- INVx1_ASAP7_75t_R \U$1955 (
- .A(\sn$2962 ),
- .Y(\s$2963 )
- );
- INVx1_ASAP7_75t_R \U$1956 (
- .A(\con$2964 ),
- .Y(\c$2965 )
- );
- INVx1_ASAP7_75t_R \U$1957 (
- .A(\sn$2966 ),
- .Y(\s$2967 )
- );
- INVx1_ASAP7_75t_R \U$1958 (
- .A(\con$2968 ),
- .Y(\c$2969 )
- );
- INVx1_ASAP7_75t_R \U$1959 (
- .A(\sn$2970 ),
- .Y(\s$2971 )
- );
- INVx1_ASAP7_75t_R \U$1960 (
- .A(\con$2972 ),
- .Y(\c$2973 )
- );
- INVx1_ASAP7_75t_R \U$1961 (
- .A(\sn$2974 ),
- .Y(\s$2975 )
- );
- INVx1_ASAP7_75t_R \U$1962 (
- .A(\con$2976 ),
- .Y(\c$2977 )
- );
- INVx1_ASAP7_75t_R \U$1963 (
- .A(\sn$2978 ),
- .Y(\s$2979 )
- );
- INVx1_ASAP7_75t_R \U$1964 (
- .A(\con$2980 ),
- .Y(\c$2981 )
- );
- INVx1_ASAP7_75t_R \U$1965 (
- .A(\sn$2982 ),
- .Y(\s$2983 )
- );
- INVx1_ASAP7_75t_R \U$1966 (
- .A(\con$2984 ),
- .Y(\c$2985 )
- );
- INVx1_ASAP7_75t_R \U$1967 (
- .A(\sn$2986 ),
- .Y(\s$2987 )
- );
- INVx1_ASAP7_75t_R \U$1968 (
- .A(\con$2988 ),
- .Y(\c$2989 )
- );
- INVx1_ASAP7_75t_R \U$1969 (
- .A(\sn$2990 ),
- .Y(\s$2991 )
- );
- INVx1_ASAP7_75t_R \U$1970 (
- .A(\con$2992 ),
- .Y(\c$2993 )
- );
- INVx1_ASAP7_75t_R \U$1971 (
- .A(\sn$2994 ),
- .Y(\s$2995 )
- );
- INVx1_ASAP7_75t_R \U$1972 (
- .A(\con$2996 ),
- .Y(\c$2997 )
- );
- INVx1_ASAP7_75t_R \U$1973 (
- .A(\sn$2998 ),
- .Y(\s$2999 )
- );
- INVx1_ASAP7_75t_R \U$1974 (
- .A(\con$3000 ),
- .Y(\c$3001 )
- );
- INVx1_ASAP7_75t_R \U$1975 (
- .A(\sn$3002 ),
- .Y(\s$3003 )
- );
- INVx1_ASAP7_75t_R \U$1976 (
- .A(\con$3004 ),
- .Y(\c$3005 )
- );
- INVx1_ASAP7_75t_R \U$1977 (
- .A(\sn$3006 ),
- .Y(\s$3007 )
- );
- INVx1_ASAP7_75t_R \U$1978 (
- .A(\con$3008 ),
- .Y(\c$3009 )
- );
- INVx1_ASAP7_75t_R \U$1979 (
- .A(\sn$3010 ),
- .Y(\s$3011 )
- );
- INVx1_ASAP7_75t_R \U$1980 (
- .A(\con$3012 ),
- .Y(\c$3013 )
- );
- INVx1_ASAP7_75t_R \U$1981 (
- .A(\sn$3014 ),
- .Y(\s$3015 )
- );
- INVx1_ASAP7_75t_R \U$1982 (
- .A(\con$3016 ),
- .Y(\c$3017 )
- );
- INVx1_ASAP7_75t_R \U$1983 (
- .A(\sn$3018 ),
- .Y(\s$3019 )
- );
- INVx1_ASAP7_75t_R \U$1984 (
- .A(\con$3020 ),
- .Y(\c$3021 )
- );
- INVx1_ASAP7_75t_R \U$1985 (
- .A(\sn$3022 ),
- .Y(\s$3023 )
- );
- INVx1_ASAP7_75t_R \U$1986 (
- .A(\con$3024 ),
- .Y(\c$3025 )
- );
- INVx1_ASAP7_75t_R \U$1987 (
- .A(\sn$3026 ),
- .Y(\s$3027 )
- );
- INVx1_ASAP7_75t_R \U$1988 (
- .A(\con$3028 ),
- .Y(\c$3029 )
- );
- INVx1_ASAP7_75t_R \U$1989 (
- .A(\sn$3030 ),
- .Y(\s$3031 )
- );
- INVx1_ASAP7_75t_R \U$1990 (
- .A(\con$3032 ),
- .Y(\c$3033 )
- );
- INVx1_ASAP7_75t_R \U$1991 (
- .A(\sn$3034 ),
- .Y(\s$3035 )
- );
- INVx1_ASAP7_75t_R \U$1992 (
- .A(\con$3036 ),
- .Y(\c$3037 )
- );
- INVx1_ASAP7_75t_R \U$1993 (
- .A(\sn$3038 ),
- .Y(\s$3039 )
- );
- INVx1_ASAP7_75t_R \U$1994 (
- .A(\con$3040 ),
- .Y(\c$3041 )
- );
- INVx1_ASAP7_75t_R \U$1995 (
- .A(\sn$3042 ),
- .Y(\s$3043 )
- );
- INVx1_ASAP7_75t_R \U$1996 (
- .A(\con$3044 ),
- .Y(\c$3045 )
- );
- INVx1_ASAP7_75t_R \U$1997 (
- .A(\sn$3046 ),
- .Y(\s$3047 )
- );
- INVx1_ASAP7_75t_R \U$1998 (
- .A(\con$3048 ),
- .Y(\c$3049 )
- );
- INVx1_ASAP7_75t_R \U$1999 (
- .A(\sn$3050 ),
- .Y(\s$3051 )
- );
- INVx1_ASAP7_75t_R \U$2000 (
- .A(\con$3052 ),
- .Y(\c$3053 )
- );
- INVx1_ASAP7_75t_R \U$2001 (
- .A(\sn$3054 ),
- .Y(\s$3055 )
- );
- INVx1_ASAP7_75t_R \U$2002 (
- .A(\con$3056 ),
- .Y(\c$3057 )
- );
- INVx1_ASAP7_75t_R \U$2003 (
- .A(\sn$3058 ),
- .Y(\s$3059 )
- );
- INVx1_ASAP7_75t_R \U$2004 (
- .A(\con$3060 ),
- .Y(\c$3061 )
- );
- INVx1_ASAP7_75t_R \U$2005 (
- .A(\sn$3062 ),
- .Y(\s$3063 )
- );
- INVx1_ASAP7_75t_R \U$2006 (
- .A(\con$3064 ),
- .Y(\c$3065 )
- );
- INVx1_ASAP7_75t_R \U$2007 (
- .A(\sn$3066 ),
- .Y(\s$3067 )
- );
- INVx1_ASAP7_75t_R \U$2008 (
- .A(\con$3068 ),
- .Y(\c$3069 )
- );
- INVx1_ASAP7_75t_R \U$2009 (
- .A(\sn$3070 ),
- .Y(\s$3071 )
- );
- INVx1_ASAP7_75t_R \U$2010 (
- .A(\con$3072 ),
- .Y(\c$3073 )
- );
- INVx1_ASAP7_75t_R \U$2011 (
- .A(\sn$3074 ),
- .Y(\s$3075 )
- );
- INVx1_ASAP7_75t_R \U$2012 (
- .A(\con$3076 ),
- .Y(\c$3077 )
- );
- INVx1_ASAP7_75t_R \U$2013 (
- .A(\sn$3078 ),
- .Y(\s$3079 )
- );
- INVx1_ASAP7_75t_R \U$2014 (
- .A(\con$3080 ),
- .Y(\c$3081 )
- );
- INVx1_ASAP7_75t_R \U$2015 (
- .A(\sn$3082 ),
- .Y(\s$3083 )
- );
- INVx1_ASAP7_75t_R \U$2016 (
- .A(\con$3084 ),
- .Y(\c$3085 )
- );
- INVx1_ASAP7_75t_R \U$2017 (
- .A(\sn$3086 ),
- .Y(\s$3087 )
- );
- INVx1_ASAP7_75t_R \U$2018 (
- .A(\con$3088 ),
- .Y(\c$3089 )
- );
- INVx1_ASAP7_75t_R \U$2019 (
- .A(\sn$3090 ),
- .Y(\s$3091 )
- );
- INVx1_ASAP7_75t_R \U$2020 (
- .A(\con$3092 ),
- .Y(\c$3093 )
- );
- INVx1_ASAP7_75t_R \U$2021 (
- .A(\sn$3094 ),
- .Y(\s$3095 )
- );
- INVx1_ASAP7_75t_R \U$2022 (
- .A(\con$3096 ),
- .Y(\c$3097 )
- );
- INVx1_ASAP7_75t_R \U$2023 (
- .A(\sn$3098 ),
- .Y(\s$3099 )
- );
- INVx1_ASAP7_75t_R \U$2024 (
- .A(\con$3100 ),
- .Y(\c$3101 )
- );
- INVx1_ASAP7_75t_R \U$2025 (
- .A(\sn$3102 ),
- .Y(\s$3103 )
- );
- INVx1_ASAP7_75t_R \U$2026 (
- .A(\con$3104 ),
- .Y(\c$3105 )
- );
- INVx1_ASAP7_75t_R \U$2027 (
- .A(\sn$3106 ),
- .Y(\s$3107 )
- );
- INVx1_ASAP7_75t_R \U$2028 (
- .A(\con$3108 ),
- .Y(\c$3109 )
- );
- INVx1_ASAP7_75t_R \U$2029 (
- .A(\sn$3110 ),
- .Y(\s$3111 )
- );
- INVx1_ASAP7_75t_R \U$2030 (
- .A(\con$3112 ),
- .Y(\c$3113 )
- );
- INVx1_ASAP7_75t_R \U$2031 (
- .A(\sn$3114 ),
- .Y(\s$3115 )
- );
- INVx1_ASAP7_75t_R \U$2032 (
- .A(\con$3116 ),
- .Y(\c$3117 )
- );
- INVx1_ASAP7_75t_R \U$2033 (
- .A(\sn$3118 ),
- .Y(\s$3119 )
- );
- INVx1_ASAP7_75t_R \U$2034 (
- .A(\con$3120 ),
- .Y(\c$3121 )
- );
- INVx1_ASAP7_75t_R \U$2035 (
- .A(\sn$3122 ),
- .Y(\s$3123 )
- );
- INVx1_ASAP7_75t_R \U$2036 (
- .A(\con$3124 ),
- .Y(\c$3125 )
- );
- INVx1_ASAP7_75t_R \U$2037 (
- .A(\sn$3126 ),
- .Y(\s$3127 )
- );
- INVx1_ASAP7_75t_R \U$2038 (
- .A(\con$3128 ),
- .Y(\c$3129 )
- );
- INVx1_ASAP7_75t_R \U$2039 (
- .A(\sn$3130 ),
- .Y(\s$3131 )
- );
- INVx1_ASAP7_75t_R \U$2040 (
- .A(\con$3132 ),
- .Y(\c$3133 )
- );
- INVx1_ASAP7_75t_R \U$2041 (
- .A(\sn$3134 ),
- .Y(\s$3135 )
- );
- INVx1_ASAP7_75t_R \U$2042 (
- .A(\con$3136 ),
- .Y(\c$3137 )
- );
- INVx1_ASAP7_75t_R \U$2043 (
- .A(\sn$3138 ),
- .Y(\s$3139 )
- );
- INVx1_ASAP7_75t_R \U$2044 (
- .A(\con$3140 ),
- .Y(\c$3141 )
- );
- INVx1_ASAP7_75t_R \U$2045 (
- .A(\sn$3142 ),
- .Y(\s$3143 )
- );
- INVx1_ASAP7_75t_R \U$2046 (
- .A(\con$3144 ),
- .Y(\c$3145 )
- );
- INVx1_ASAP7_75t_R \U$2047 (
- .A(\sn$3146 ),
- .Y(\s$3147 )
- );
- INVx1_ASAP7_75t_R \U$2048 (
- .A(\con$3148 ),
- .Y(\c$3149 )
- );
- INVx1_ASAP7_75t_R \U$2049 (
- .A(\sn$3150 ),
- .Y(\s$3151 )
- );
- INVx1_ASAP7_75t_R \U$2050 (
- .A(\con$3152 ),
- .Y(\c$3153 )
- );
- INVx1_ASAP7_75t_R \U$2051 (
- .A(\sn$3154 ),
- .Y(\s$3155 )
- );
- INVx1_ASAP7_75t_R \U$2052 (
- .A(\con$3156 ),
- .Y(\c$3157 )
- );
- INVx1_ASAP7_75t_R \U$2053 (
- .A(\sn$3158 ),
- .Y(\s$3159 )
- );
- INVx1_ASAP7_75t_R \U$2054 (
- .A(\con$3160 ),
- .Y(\c$3161 )
- );
- INVx1_ASAP7_75t_R \U$2055 (
- .A(\sn$3162 ),
- .Y(\s$3163 )
- );
- INVx1_ASAP7_75t_R \U$2056 (
- .A(\con$3164 ),
- .Y(\c$3165 )
- );
- INVx1_ASAP7_75t_R \U$2057 (
- .A(\sn$3166 ),
- .Y(\s$3167 )
- );
- INVx1_ASAP7_75t_R \U$2058 (
- .A(\con$3168 ),
- .Y(\c$3169 )
- );
- INVx1_ASAP7_75t_R \U$2059 (
- .A(\sn$3170 ),
- .Y(\s$3171 )
- );
- INVx1_ASAP7_75t_R \U$2060 (
- .A(\con$3172 ),
- .Y(\c$3173 )
- );
- INVx1_ASAP7_75t_R \U$2061 (
- .A(\sn$3174 ),
- .Y(\s$3175 )
- );
- INVx1_ASAP7_75t_R \U$2062 (
- .A(\con$3176 ),
- .Y(\c$3177 )
- );
- INVx1_ASAP7_75t_R \U$2063 (
- .A(\sn$3178 ),
- .Y(\s$3179 )
- );
- INVx1_ASAP7_75t_R \U$2064 (
- .A(\con$3180 ),
- .Y(\c$3181 )
- );
- INVx1_ASAP7_75t_R \U$2065 (
- .A(\sn$3182 ),
- .Y(\s$3183 )
- );
- INVx1_ASAP7_75t_R \U$2066 (
- .A(\con$3184 ),
- .Y(\c$3185 )
- );
- INVx1_ASAP7_75t_R \U$2067 (
- .A(\sn$3186 ),
- .Y(\s$3187 )
- );
- INVx1_ASAP7_75t_R \U$2068 (
- .A(\con$3188 ),
- .Y(\c$3189 )
- );
- INVx1_ASAP7_75t_R \U$2069 (
- .A(\sn$3190 ),
- .Y(\s$3191 )
- );
- INVx1_ASAP7_75t_R \U$2070 (
- .A(\con$3192 ),
- .Y(\c$3193 )
- );
- INVx1_ASAP7_75t_R \U$2071 (
- .A(\sn$3194 ),
- .Y(\s$3195 )
- );
- INVx1_ASAP7_75t_R \U$2072 (
- .A(\con$3196 ),
- .Y(\c$3197 )
- );
- INVx1_ASAP7_75t_R \U$2073 (
- .A(\sn$3198 ),
- .Y(\s$3199 )
- );
- INVx1_ASAP7_75t_R \U$2074 (
- .A(\con$3200 ),
- .Y(\c$3201 )
- );
- INVx1_ASAP7_75t_R \U$2075 (
- .A(\sn$3202 ),
- .Y(\s$3203 )
- );
- INVx1_ASAP7_75t_R \U$2076 (
- .A(\con$3204 ),
- .Y(\c$3205 )
- );
- INVx1_ASAP7_75t_R \U$2077 (
- .A(\sn$3206 ),
- .Y(\s$3207 )
- );
- INVx1_ASAP7_75t_R \U$2078 (
- .A(\con$3208 ),
- .Y(\c$3209 )
- );
- INVx1_ASAP7_75t_R \U$2079 (
- .A(\sn$3210 ),
- .Y(\s$3211 )
- );
- INVx1_ASAP7_75t_R \U$2080 (
- .A(\con$3212 ),
- .Y(\c$3213 )
- );
- INVx1_ASAP7_75t_R \U$2081 (
- .A(\sn$3214 ),
- .Y(\s$3215 )
- );
- INVx1_ASAP7_75t_R \U$2082 (
- .A(\con$3216 ),
- .Y(\c$3217 )
- );
- INVx1_ASAP7_75t_R \U$2083 (
- .A(\sn$3218 ),
- .Y(\s$3219 )
- );
- INVx1_ASAP7_75t_R \U$2084 (
- .A(\con$3220 ),
- .Y(\c$3221 )
- );
- INVx1_ASAP7_75t_R \U$2085 (
- .A(\sn$3222 ),
- .Y(\s$3223 )
- );
- INVx1_ASAP7_75t_R \U$2086 (
- .A(\con$3224 ),
- .Y(\c$3225 )
- );
- INVx1_ASAP7_75t_R \U$2087 (
- .A(\sn$3226 ),
- .Y(\s$3227 )
- );
- INVx1_ASAP7_75t_R \U$2088 (
- .A(\con$3228 ),
- .Y(\c$3229 )
- );
- INVx1_ASAP7_75t_R \U$2089 (
- .A(\sn$3230 ),
- .Y(\s$3231 )
- );
- INVx1_ASAP7_75t_R \U$2090 (
- .A(\con$3232 ),
- .Y(\c$3233 )
- );
- INVx1_ASAP7_75t_R \U$2091 (
- .A(\sn$3234 ),
- .Y(\s$3235 )
- );
- INVx1_ASAP7_75t_R \U$2092 (
- .A(\con$3236 ),
- .Y(\c$3237 )
- );
- INVx1_ASAP7_75t_R \U$2093 (
- .A(\sn$3238 ),
- .Y(\s$3239 )
- );
- INVx1_ASAP7_75t_R \U$2094 (
- .A(\con$3240 ),
- .Y(\c$3241 )
- );
- INVx1_ASAP7_75t_R \U$2095 (
- .A(\sn$3242 ),
- .Y(\s$3243 )
- );
- INVx1_ASAP7_75t_R \U$2096 (
- .A(\con$3244 ),
- .Y(\c$3245 )
- );
- INVx1_ASAP7_75t_R \U$2097 (
- .A(\sn$3246 ),
- .Y(\s$3247 )
- );
- INVx1_ASAP7_75t_R \U$2098 (
- .A(\con$3248 ),
- .Y(\c$3249 )
- );
- INVx1_ASAP7_75t_R \U$2099 (
- .A(\sn$3250 ),
- .Y(\s$3251 )
- );
- INVx1_ASAP7_75t_R \U$2100 (
- .A(\con$3252 ),
- .Y(\c$3253 )
- );
- INVx1_ASAP7_75t_R \U$2101 (
- .A(\sn$3254 ),
- .Y(\s$3255 )
- );
- INVx1_ASAP7_75t_R \U$2102 (
- .A(\con$3256 ),
- .Y(\c$3257 )
- );
- INVx1_ASAP7_75t_R \U$2103 (
- .A(\sn$3258 ),
- .Y(\s$3259 )
- );
- INVx1_ASAP7_75t_R \U$2104 (
- .A(\con$3260 ),
- .Y(\c$3261 )
- );
- INVx1_ASAP7_75t_R \U$2105 (
- .A(\sn$3262 ),
- .Y(\s$3263 )
- );
- INVx1_ASAP7_75t_R \U$2106 (
- .A(\con$3264 ),
- .Y(\c$3265 )
- );
- INVx1_ASAP7_75t_R \U$2107 (
- .A(\sn$3266 ),
- .Y(\s$3267 )
- );
- INVx1_ASAP7_75t_R \U$2108 (
- .A(\con$3268 ),
- .Y(\c$3269 )
- );
- INVx1_ASAP7_75t_R \U$2109 (
- .A(\sn$3270 ),
- .Y(\s$3271 )
- );
- INVx1_ASAP7_75t_R \U$2110 (
- .A(\con$3272 ),
- .Y(\c$3273 )
- );
- INVx1_ASAP7_75t_R \U$2111 (
- .A(\sn$3274 ),
- .Y(\s$3275 )
- );
- INVx1_ASAP7_75t_R \U$2112 (
- .A(\con$3276 ),
- .Y(\c$3277 )
- );
- INVx1_ASAP7_75t_R \U$2113 (
- .A(\sn$3278 ),
- .Y(\s$3279 )
- );
- INVx1_ASAP7_75t_R \U$2114 (
- .A(\con$3280 ),
- .Y(\c$3281 )
- );
- INVx1_ASAP7_75t_R \U$2115 (
- .A(\sn$3282 ),
- .Y(\s$3283 )
- );
- INVx1_ASAP7_75t_R \U$2116 (
- .A(\con$3284 ),
- .Y(\c$3285 )
- );
- INVx1_ASAP7_75t_R \U$2117 (
- .A(\sn$3286 ),
- .Y(\s$3287 )
- );
- INVx1_ASAP7_75t_R \U$2118 (
- .A(\con$3288 ),
- .Y(\c$3289 )
- );
- INVx1_ASAP7_75t_R \U$2119 (
- .A(\sn$3290 ),
- .Y(\s$3291 )
- );
- INVx1_ASAP7_75t_R \U$2120 (
- .A(\con$3292 ),
- .Y(\c$3293 )
- );
- INVx1_ASAP7_75t_R \U$2121 (
- .A(\sn$3294 ),
- .Y(\s$3295 )
- );
- INVx1_ASAP7_75t_R \U$2122 (
- .A(\con$3296 ),
- .Y(\c$3297 )
- );
- INVx1_ASAP7_75t_R \U$2123 (
- .A(\sn$3298 ),
- .Y(\s$3299 )
- );
- INVx1_ASAP7_75t_R \U$2124 (
- .A(\con$3300 ),
- .Y(\c$3301 )
- );
- INVx1_ASAP7_75t_R \U$2125 (
- .A(\sn$3302 ),
- .Y(\s$3303 )
- );
- INVx1_ASAP7_75t_R \U$2126 (
- .A(\con$3304 ),
- .Y(\c$3305 )
- );
- INVx1_ASAP7_75t_R \U$2127 (
- .A(\sn$3306 ),
- .Y(\s$3307 )
- );
- INVx1_ASAP7_75t_R \U$2128 (
- .A(\con$3308 ),
- .Y(\c$3309 )
- );
- INVx1_ASAP7_75t_R \U$2129 (
- .A(\sn$3310 ),
- .Y(\s$3311 )
- );
- INVx1_ASAP7_75t_R \U$2130 (
- .A(\con$3312 ),
- .Y(\c$3313 )
- );
- INVx1_ASAP7_75t_R \U$2131 (
- .A(\sn$3314 ),
- .Y(\s$3315 )
- );
- INVx1_ASAP7_75t_R \U$2132 (
- .A(\con$3316 ),
- .Y(\c$3317 )
- );
- INVx1_ASAP7_75t_R \U$2133 (
- .A(\sn$3318 ),
- .Y(\s$3319 )
- );
- INVx1_ASAP7_75t_R \U$2134 (
- .A(\con$3320 ),
- .Y(\c$3321 )
- );
- INVx1_ASAP7_75t_R \U$2135 (
- .A(\sn$3322 ),
- .Y(\s$3323 )
- );
- INVx1_ASAP7_75t_R \U$2136 (
- .A(\con$3324 ),
- .Y(\c$3325 )
- );
- INVx1_ASAP7_75t_R \U$2137 (
- .A(\sn$3326 ),
- .Y(\s$3327 )
- );
- INVx1_ASAP7_75t_R \U$2138 (
- .A(\con$3328 ),
- .Y(\c$3329 )
- );
- INVx1_ASAP7_75t_R \U$2139 (
- .A(\sn$3330 ),
- .Y(\s$3331 )
- );
- INVx1_ASAP7_75t_R \U$2140 (
- .A(\con$3332 ),
- .Y(\c$3333 )
- );
- INVx1_ASAP7_75t_R \U$2141 (
- .A(\sn$3334 ),
- .Y(\s$3335 )
- );
- INVx1_ASAP7_75t_R \U$2142 (
- .A(\con$3336 ),
- .Y(\c$3337 )
- );
- INVx1_ASAP7_75t_R \U$2143 (
- .A(\sn$3338 ),
- .Y(\s$3339 )
- );
- INVx1_ASAP7_75t_R \U$2144 (
- .A(\con$3340 ),
- .Y(\c$3341 )
- );
- INVx1_ASAP7_75t_R \U$2145 (
- .A(\sn$3342 ),
- .Y(\s$3343 )
- );
- INVx1_ASAP7_75t_R \U$2146 (
- .A(\con$3344 ),
- .Y(\c$3345 )
- );
- INVx1_ASAP7_75t_R \U$2147 (
- .A(\sn$3346 ),
- .Y(\s$3347 )
- );
- INVx1_ASAP7_75t_R \U$2148 (
- .A(\con$3348 ),
- .Y(\c$3349 )
- );
- INVx1_ASAP7_75t_R \U$2149 (
- .A(\sn$3350 ),
- .Y(\s$3351 )
- );
- INVx1_ASAP7_75t_R \U$2150 (
- .A(\con$3352 ),
- .Y(\c$3353 )
- );
- INVx1_ASAP7_75t_R \U$2151 (
- .A(\sn$3354 ),
- .Y(\s$3355 )
- );
- INVx1_ASAP7_75t_R \U$2152 (
- .A(\con$3356 ),
- .Y(\c$3357 )
- );
- INVx1_ASAP7_75t_R \U$2153 (
- .A(\sn$3358 ),
- .Y(\s$3359 )
- );
- INVx1_ASAP7_75t_R \U$2154 (
- .A(\con$3360 ),
- .Y(\c$3361 )
- );
- INVx1_ASAP7_75t_R \U$2155 (
- .A(\sn$3362 ),
- .Y(\s$3363 )
- );
- INVx1_ASAP7_75t_R \U$2156 (
- .A(\con$3364 ),
- .Y(\c$3365 )
- );
- INVx1_ASAP7_75t_R \U$2157 (
- .A(\sn$3366 ),
- .Y(\s$3367 )
- );
- INVx1_ASAP7_75t_R \U$2158 (
- .A(\con$3368 ),
- .Y(\c$3369 )
- );
- INVx1_ASAP7_75t_R \U$2159 (
- .A(\sn$3370 ),
- .Y(\s$3371 )
- );
- INVx1_ASAP7_75t_R \U$2160 (
- .A(\con$3372 ),
- .Y(\c$3373 )
- );
- INVx1_ASAP7_75t_R \U$2161 (
- .A(\sn$3374 ),
- .Y(\s$3375 )
- );
- INVx1_ASAP7_75t_R \U$2162 (
- .A(\con$3376 ),
- .Y(\c$3377 )
- );
- INVx1_ASAP7_75t_R \U$2163 (
- .A(\sn$3378 ),
- .Y(\s$3379 )
- );
- INVx1_ASAP7_75t_R \U$2164 (
- .A(\con$3380 ),
- .Y(\c$3381 )
- );
- INVx1_ASAP7_75t_R \U$2165 (
- .A(\sn$3382 ),
- .Y(\s$3383 )
- );
- INVx1_ASAP7_75t_R \U$2166 (
- .A(\con$3384 ),
- .Y(\c$3385 )
- );
- INVx1_ASAP7_75t_R \U$2167 (
- .A(\sn$3386 ),
- .Y(\s$3387 )
- );
- INVx1_ASAP7_75t_R \U$2168 (
- .A(\con$3388 ),
- .Y(\c$3389 )
- );
- INVx1_ASAP7_75t_R \U$2169 (
- .A(\sn$3390 ),
- .Y(\s$3391 )
- );
- INVx1_ASAP7_75t_R \U$2170 (
- .A(\con$3392 ),
- .Y(\c$3393 )
- );
- INVx1_ASAP7_75t_R \U$2171 (
- .A(\sn$3394 ),
- .Y(\s$3395 )
- );
- INVx1_ASAP7_75t_R \U$2172 (
- .A(\con$3396 ),
- .Y(\c$3397 )
- );
- INVx1_ASAP7_75t_R \U$2173 (
- .A(\sn$3398 ),
- .Y(\s$3399 )
- );
- INVx1_ASAP7_75t_R \U$2174 (
- .A(\con$3400 ),
- .Y(\c$3401 )
- );
- INVx1_ASAP7_75t_R \U$2175 (
- .A(\sn$3402 ),
- .Y(\s$3403 )
- );
- INVx1_ASAP7_75t_R \U$2176 (
- .A(\con$3404 ),
- .Y(\c$3405 )
- );
- INVx1_ASAP7_75t_R \U$2177 (
- .A(\sn$3406 ),
- .Y(\s$3407 )
- );
- INVx1_ASAP7_75t_R \U$2178 (
- .A(\con$3408 ),
- .Y(\c$3409 )
- );
- INVx1_ASAP7_75t_R \U$2179 (
- .A(\sn$3410 ),
- .Y(\s$3411 )
- );
- INVx1_ASAP7_75t_R \U$2180 (
- .A(\con$3412 ),
- .Y(\c$3413 )
- );
- INVx1_ASAP7_75t_R \U$2181 (
- .A(\sn$3414 ),
- .Y(\s$3415 )
- );
- INVx1_ASAP7_75t_R \U$2182 (
- .A(\con$3416 ),
- .Y(\c$3417 )
- );
- INVx1_ASAP7_75t_R \U$2183 (
- .A(\sn$3418 ),
- .Y(\s$3419 )
- );
- INVx1_ASAP7_75t_R \U$2184 (
- .A(\con$3420 ),
- .Y(\c$3421 )
- );
- INVx1_ASAP7_75t_R \U$2185 (
- .A(\sn$3422 ),
- .Y(\s$3423 )
- );
- INVx1_ASAP7_75t_R \U$2186 (
- .A(\con$3424 ),
- .Y(\c$3425 )
- );
- INVx1_ASAP7_75t_R \U$2187 (
- .A(\sn$3426 ),
- .Y(\s$3427 )
- );
- INVx1_ASAP7_75t_R \U$2188 (
- .A(\con$3428 ),
- .Y(\c$3429 )
- );
- INVx1_ASAP7_75t_R \U$2189 (
- .A(\sn$3430 ),
- .Y(\s$3431 )
- );
- INVx1_ASAP7_75t_R \U$2190 (
- .A(\con$3432 ),
- .Y(\c$3433 )
- );
- INVx1_ASAP7_75t_R \U$2191 (
- .A(\sn$3434 ),
- .Y(\s$3435 )
- );
- INVx1_ASAP7_75t_R \U$2192 (
- .A(\con$3436 ),
- .Y(\c$3437 )
- );
- INVx1_ASAP7_75t_R \U$2193 (
- .A(\sn$3438 ),
- .Y(\s$3439 )
- );
- INVx1_ASAP7_75t_R \U$2194 (
- .A(\con$3440 ),
- .Y(\c$3441 )
- );
- INVx1_ASAP7_75t_R \U$2195 (
- .A(\sn$3442 ),
- .Y(\s$3443 )
- );
- INVx1_ASAP7_75t_R \U$2196 (
- .A(\con$3444 ),
- .Y(\c$3445 )
- );
- INVx1_ASAP7_75t_R \U$2197 (
- .A(\sn$3446 ),
- .Y(\s$3447 )
- );
- INVx1_ASAP7_75t_R \U$2198 (
- .A(\con$3448 ),
- .Y(\c$3449 )
- );
- INVx1_ASAP7_75t_R \U$2199 (
- .A(\sn$3450 ),
- .Y(\s$3451 )
- );
- INVx1_ASAP7_75t_R \U$2200 (
- .A(\con$3452 ),
- .Y(\c$3453 )
- );
- INVx1_ASAP7_75t_R \U$2201 (
- .A(\sn$3454 ),
- .Y(\s$3455 )
- );
- INVx1_ASAP7_75t_R \U$2202 (
- .A(\con$3456 ),
- .Y(\c$3457 )
- );
- INVx1_ASAP7_75t_R \U$2203 (
- .A(\sn$3458 ),
- .Y(\s$3459 )
- );
- INVx1_ASAP7_75t_R \U$2204 (
- .A(\con$3460 ),
- .Y(\c$3461 )
- );
- INVx1_ASAP7_75t_R \U$2205 (
- .A(\sn$3462 ),
- .Y(\s$3463 )
- );
- INVx1_ASAP7_75t_R \U$2206 (
- .A(\con$3464 ),
- .Y(\c$3465 )
- );
- INVx1_ASAP7_75t_R \U$2207 (
- .A(\sn$3466 ),
- .Y(\s$3467 )
- );
- INVx1_ASAP7_75t_R \U$2208 (
- .A(\con$3468 ),
- .Y(\c$3469 )
- );
- INVx1_ASAP7_75t_R \U$2209 (
- .A(\sn$3470 ),
- .Y(\s$3471 )
- );
- INVx1_ASAP7_75t_R \U$2210 (
- .A(\con$3472 ),
- .Y(\c$3473 )
- );
- INVx1_ASAP7_75t_R \U$2211 (
- .A(\sn$3474 ),
- .Y(\s$3475 )
- );
- INVx1_ASAP7_75t_R \U$2212 (
- .A(\con$3476 ),
- .Y(\c$3477 )
- );
- INVx1_ASAP7_75t_R \U$2213 (
- .A(\sn$3478 ),
- .Y(\s$3479 )
- );
- INVx1_ASAP7_75t_R \U$2214 (
- .A(\con$3480 ),
- .Y(\c$3481 )
- );
- INVx1_ASAP7_75t_R \U$2215 (
- .A(\sn$3482 ),
- .Y(\s$3483 )
- );
- INVx1_ASAP7_75t_R \U$2216 (
- .A(\con$3484 ),
- .Y(\c$3485 )
- );
- INVx1_ASAP7_75t_R \U$2217 (
- .A(\sn$3486 ),
- .Y(\s$3487 )
- );
- INVx1_ASAP7_75t_R \U$2218 (
- .A(\con$3488 ),
- .Y(\c$3489 )
- );
- INVx1_ASAP7_75t_R \U$2219 (
- .A(\sn$3490 ),
- .Y(\s$3491 )
- );
- INVx1_ASAP7_75t_R \U$2220 (
- .A(\con$3492 ),
- .Y(\c$3493 )
- );
- INVx1_ASAP7_75t_R \U$2221 (
- .A(\sn$3494 ),
- .Y(\s$3495 )
- );
- INVx1_ASAP7_75t_R \U$2222 (
- .A(\con$3496 ),
- .Y(\c$3497 )
- );
- INVx1_ASAP7_75t_R \U$2223 (
- .A(\sn$3498 ),
- .Y(\s$3499 )
- );
- INVx1_ASAP7_75t_R \U$2224 (
- .A(\con$3500 ),
- .Y(\c$3501 )
- );
- INVx1_ASAP7_75t_R \U$2225 (
- .A(\sn$3502 ),
- .Y(\s$3503 )
- );
- INVx1_ASAP7_75t_R \U$2226 (
- .A(\con$3504 ),
- .Y(\c$3505 )
- );
- INVx1_ASAP7_75t_R \U$2227 (
- .A(\sn$3506 ),
- .Y(\s$3507 )
- );
- INVx1_ASAP7_75t_R \U$2228 (
- .A(\con$3508 ),
- .Y(\c$3509 )
- );
- INVx1_ASAP7_75t_R \U$2229 (
- .A(\sn$3510 ),
- .Y(\s$3511 )
- );
- INVx1_ASAP7_75t_R \U$2230 (
- .A(\con$3512 ),
- .Y(\c$3513 )
- );
- INVx1_ASAP7_75t_R \U$2231 (
- .A(\sn$3514 ),
- .Y(\s$3515 )
- );
- INVx1_ASAP7_75t_R \U$2232 (
- .A(\con$3516 ),
- .Y(\c$3517 )
- );
- INVx1_ASAP7_75t_R \U$2233 (
- .A(\sn$3518 ),
- .Y(\s$3519 )
- );
- INVx1_ASAP7_75t_R \U$2234 (
- .A(\con$3520 ),
- .Y(\c$3521 )
- );
- INVx1_ASAP7_75t_R \U$2235 (
- .A(\sn$3522 ),
- .Y(\s$3523 )
- );
- INVx1_ASAP7_75t_R \U$2236 (
- .A(\con$3524 ),
- .Y(\c$3525 )
- );
- INVx1_ASAP7_75t_R \U$2237 (
- .A(\sn$3526 ),
- .Y(\s$3527 )
- );
- INVx1_ASAP7_75t_R \U$2238 (
- .A(\con$3528 ),
- .Y(\c$3529 )
- );
- INVx1_ASAP7_75t_R \U$2239 (
- .A(\sn$3530 ),
- .Y(\s$3531 )
- );
- INVx1_ASAP7_75t_R \U$2240 (
- .A(\con$3532 ),
- .Y(\c$3533 )
- );
- INVx1_ASAP7_75t_R \U$2241 (
- .A(\sn$3534 ),
- .Y(\s$3535 )
- );
- INVx1_ASAP7_75t_R \U$2242 (
- .A(\con$3536 ),
- .Y(\c$3537 )
- );
- INVx1_ASAP7_75t_R \U$2243 (
- .A(\sn$3538 ),
- .Y(\s$3539 )
- );
- INVx1_ASAP7_75t_R \U$2244 (
- .A(\con$3540 ),
- .Y(\c$3541 )
- );
- INVx1_ASAP7_75t_R \U$2245 (
- .A(\sn$3542 ),
- .Y(\s$3543 )
- );
- INVx1_ASAP7_75t_R \U$2246 (
- .A(\con$3544 ),
- .Y(\c$3545 )
- );
- INVx1_ASAP7_75t_R \U$2247 (
- .A(\sn$3546 ),
- .Y(\s$3547 )
- );
- INVx1_ASAP7_75t_R \U$2248 (
- .A(\con$3548 ),
- .Y(\c$3549 )
- );
- INVx1_ASAP7_75t_R \U$2249 (
- .A(\sn$3550 ),
- .Y(\s$3551 )
- );
- INVx1_ASAP7_75t_R \U$2250 (
- .A(\con$3552 ),
- .Y(\c$3553 )
- );
- INVx1_ASAP7_75t_R \U$2251 (
- .A(\sn$3554 ),
- .Y(\s$3555 )
- );
- INVx1_ASAP7_75t_R \U$2252 (
- .A(\con$3556 ),
- .Y(\c$3557 )
- );
- INVx1_ASAP7_75t_R \U$2253 (
- .A(\sn$3558 ),
- .Y(\s$3559 )
- );
- INVx1_ASAP7_75t_R \U$2254 (
- .A(\con$3560 ),
- .Y(\c$3561 )
- );
- INVx1_ASAP7_75t_R \U$2255 (
- .A(\sn$3562 ),
- .Y(\s$3563 )
- );
- INVx1_ASAP7_75t_R \U$2256 (
- .A(\con$3564 ),
- .Y(\c$3565 )
- );
- INVx1_ASAP7_75t_R \U$2257 (
- .A(\sn$3566 ),
- .Y(\s$3567 )
- );
- INVx1_ASAP7_75t_R \U$2258 (
- .A(\con$3568 ),
- .Y(\c$3569 )
- );
- INVx1_ASAP7_75t_R \U$2259 (
- .A(\sn$3570 ),
- .Y(\s$3571 )
- );
- INVx1_ASAP7_75t_R \U$2260 (
- .A(\con$3572 ),
- .Y(\c$3573 )
- );
- INVx1_ASAP7_75t_R \U$2261 (
- .A(\sn$3574 ),
- .Y(\s$3575 )
- );
- INVx1_ASAP7_75t_R \U$2262 (
- .A(\con$3576 ),
- .Y(\c$3577 )
- );
- INVx1_ASAP7_75t_R \U$2263 (
- .A(\sn$3578 ),
- .Y(\s$3579 )
- );
- INVx1_ASAP7_75t_R \U$2264 (
- .A(\con$3580 ),
- .Y(\c$3581 )
- );
- INVx1_ASAP7_75t_R \U$2265 (
- .A(\sn$3582 ),
- .Y(\s$3583 )
- );
- INVx1_ASAP7_75t_R \U$2266 (
- .A(\con$3584 ),
- .Y(\c$3585 )
- );
- INVx1_ASAP7_75t_R \U$2267 (
- .A(\sn$3586 ),
- .Y(\s$3587 )
- );
- INVx1_ASAP7_75t_R \U$2268 (
- .A(\con$3588 ),
- .Y(\c$3589 )
- );
- INVx1_ASAP7_75t_R \U$2269 (
- .A(\sn$3590 ),
- .Y(\s$3591 )
- );
- INVx1_ASAP7_75t_R \U$2270 (
- .A(\con$3592 ),
- .Y(\c$3593 )
- );
- INVx1_ASAP7_75t_R \U$2271 (
- .A(\sn$3594 ),
- .Y(\s$3595 )
- );
- INVx1_ASAP7_75t_R \U$2272 (
- .A(\con$3596 ),
- .Y(\c$3597 )
- );
- INVx1_ASAP7_75t_R \U$2273 (
- .A(\sn$3598 ),
- .Y(\s$3599 )
- );
- INVx1_ASAP7_75t_R \U$2274 (
- .A(\con$3600 ),
- .Y(\c$3601 )
- );
- INVx1_ASAP7_75t_R \U$2275 (
- .A(\sn$3602 ),
- .Y(\s$3603 )
- );
- INVx1_ASAP7_75t_R \U$2276 (
- .A(\con$3604 ),
- .Y(\c$3605 )
- );
- INVx1_ASAP7_75t_R \U$2277 (
- .A(\sn$3606 ),
- .Y(\s$3607 )
- );
- INVx1_ASAP7_75t_R \U$2278 (
- .A(\con$3608 ),
- .Y(\c$3609 )
- );
- INVx1_ASAP7_75t_R \U$2279 (
- .A(\sn$3610 ),
- .Y(\s$3611 )
- );
- INVx1_ASAP7_75t_R \U$2280 (
- .A(\con$3612 ),
- .Y(\c$3613 )
- );
- INVx1_ASAP7_75t_R \U$2281 (
- .A(\sn$3614 ),
- .Y(\s$3615 )
- );
- INVx1_ASAP7_75t_R \U$2282 (
- .A(\con$3616 ),
- .Y(\c$3617 )
- );
- INVx1_ASAP7_75t_R \U$2283 (
- .A(\sn$3618 ),
- .Y(\s$3619 )
- );
- INVx1_ASAP7_75t_R \U$2284 (
- .A(\con$3620 ),
- .Y(\c$3621 )
- );
- INVx1_ASAP7_75t_R \U$2285 (
- .A(\sn$3622 ),
- .Y(\s$3623 )
- );
- INVx1_ASAP7_75t_R \U$2286 (
- .A(\con$3624 ),
- .Y(\c$3625 )
- );
- INVx1_ASAP7_75t_R \U$2287 (
- .A(\sn$3626 ),
- .Y(\s$3627 )
- );
- INVx1_ASAP7_75t_R \U$2288 (
- .A(\con$3628 ),
- .Y(\c$3629 )
- );
- INVx1_ASAP7_75t_R \U$2289 (
- .A(\sn$3630 ),
- .Y(\s$3631 )
- );
- INVx1_ASAP7_75t_R \U$2290 (
- .A(\con$3632 ),
- .Y(\c$3633 )
- );
- INVx1_ASAP7_75t_R \U$2291 (
- .A(\sn$3634 ),
- .Y(\s$3635 )
- );
- INVx1_ASAP7_75t_R \U$2292 (
- .A(\con$3636 ),
- .Y(\c$3637 )
- );
- INVx1_ASAP7_75t_R \U$2293 (
- .A(\sn$3638 ),
- .Y(\s$3639 )
- );
- INVx1_ASAP7_75t_R \U$2294 (
- .A(\con$3640 ),
- .Y(\c$3641 )
- );
- INVx1_ASAP7_75t_R \U$2295 (
- .A(\sn$3642 ),
- .Y(\s$3643 )
- );
- INVx1_ASAP7_75t_R \U$2296 (
- .A(\con$3644 ),
- .Y(\c$3645 )
- );
- INVx1_ASAP7_75t_R \U$2297 (
- .A(\sn$3646 ),
- .Y(\s$3647 )
- );
- INVx1_ASAP7_75t_R \U$2298 (
- .A(\con$3648 ),
- .Y(\c$3649 )
- );
- INVx1_ASAP7_75t_R \U$2299 (
- .A(\sn$3650 ),
- .Y(\s$3651 )
- );
- INVx1_ASAP7_75t_R \U$2300 (
- .A(\con$3652 ),
- .Y(\c$3653 )
- );
- INVx1_ASAP7_75t_R \U$2301 (
- .A(\sn$3654 ),
- .Y(\s$3655 )
- );
- INVx1_ASAP7_75t_R \U$2302 (
- .A(\con$3656 ),
- .Y(\c$3657 )
- );
- INVx1_ASAP7_75t_R \U$2303 (
- .A(\sn$3658 ),
- .Y(\s$3659 )
- );
- INVx1_ASAP7_75t_R \U$2304 (
- .A(\con$3660 ),
- .Y(\c$3661 )
- );
- INVx1_ASAP7_75t_R \U$2305 (
- .A(\sn$3662 ),
- .Y(\s$3663 )
- );
- INVx1_ASAP7_75t_R \U$2306 (
- .A(\con$3664 ),
- .Y(\c$3665 )
- );
- INVx1_ASAP7_75t_R \U$2307 (
- .A(\sn$3666 ),
- .Y(\s$3667 )
- );
- INVx1_ASAP7_75t_R \U$2308 (
- .A(\con$3668 ),
- .Y(\c$3669 )
- );
- INVx1_ASAP7_75t_R \U$2309 (
- .A(\sn$3670 ),
- .Y(\s$3671 )
- );
- INVx1_ASAP7_75t_R \U$2310 (
- .A(\con$3672 ),
- .Y(\c$3673 )
- );
- INVx1_ASAP7_75t_R \U$2311 (
- .A(\sn$3674 ),
- .Y(\s$3675 )
- );
- INVx1_ASAP7_75t_R \U$2312 (
- .A(\con$3676 ),
- .Y(\c$3677 )
- );
- INVx1_ASAP7_75t_R \U$2313 (
- .A(\sn$3678 ),
- .Y(\s$3679 )
- );
- INVx1_ASAP7_75t_R \U$2314 (
- .A(\con$3680 ),
- .Y(\c$3681 )
- );
- INVx1_ASAP7_75t_R \U$2315 (
- .A(\sn$3682 ),
- .Y(\s$3683 )
- );
- INVx1_ASAP7_75t_R \U$2316 (
- .A(\con$3684 ),
- .Y(\c$3685 )
- );
- INVx1_ASAP7_75t_R \U$2317 (
- .A(\sn$3686 ),
- .Y(\s$3687 )
- );
- INVx1_ASAP7_75t_R \U$2318 (
- .A(\con$3688 ),
- .Y(\c$3689 )
- );
- INVx1_ASAP7_75t_R \U$2319 (
- .A(\sn$3690 ),
- .Y(\s$3691 )
- );
- INVx1_ASAP7_75t_R \U$2320 (
- .A(\con$3692 ),
- .Y(\c$3693 )
- );
- INVx1_ASAP7_75t_R \U$2321 (
- .A(\sn$3694 ),
- .Y(\s$3695 )
- );
- INVx1_ASAP7_75t_R \U$2322 (
- .A(\con$3696 ),
- .Y(\c$3697 )
- );
- INVx1_ASAP7_75t_R \U$2323 (
- .A(\sn$3698 ),
- .Y(\s$3699 )
- );
- INVx1_ASAP7_75t_R \U$2324 (
- .A(\con$3700 ),
- .Y(\c$3701 )
- );
- INVx1_ASAP7_75t_R \U$2325 (
- .A(\sn$3702 ),
- .Y(\s$3703 )
- );
- INVx1_ASAP7_75t_R \U$2326 (
- .A(\con$3704 ),
- .Y(\c$3705 )
- );
- INVx1_ASAP7_75t_R \U$2327 (
- .A(\sn$3706 ),
- .Y(\s$3707 )
- );
- INVx1_ASAP7_75t_R \U$2328 (
- .A(\con$3708 ),
- .Y(\c$3709 )
- );
- INVx1_ASAP7_75t_R \U$2329 (
- .A(\sn$3710 ),
- .Y(\s$3711 )
- );
- INVx1_ASAP7_75t_R \U$2330 (
- .A(\con$3712 ),
- .Y(\c$3713 )
- );
- INVx1_ASAP7_75t_R \U$2331 (
- .A(\sn$3714 ),
- .Y(\s$3715 )
- );
- INVx1_ASAP7_75t_R \U$2332 (
- .A(\con$3716 ),
- .Y(\c$3717 )
- );
- INVx1_ASAP7_75t_R \U$2333 (
- .A(\sn$3718 ),
- .Y(\s$3719 )
- );
- INVx1_ASAP7_75t_R \U$2334 (
- .A(\con$3720 ),
- .Y(\c$3721 )
- );
- INVx1_ASAP7_75t_R \U$2335 (
- .A(\sn$3722 ),
- .Y(\s$3723 )
- );
- INVx1_ASAP7_75t_R \U$2336 (
- .A(\con$3724 ),
- .Y(\c$3725 )
- );
- INVx1_ASAP7_75t_R \U$2337 (
- .A(\sn$3726 ),
- .Y(\s$3727 )
- );
- INVx1_ASAP7_75t_R \U$2338 (
- .A(\con$3728 ),
- .Y(\c$3729 )
- );
- INVx1_ASAP7_75t_R \U$2339 (
- .A(\sn$3730 ),
- .Y(\s$3731 )
- );
- INVx1_ASAP7_75t_R \U$2340 (
- .A(\con$3732 ),
- .Y(\c$3733 )
- );
- INVx1_ASAP7_75t_R \U$2341 (
- .A(\sn$3734 ),
- .Y(\s$3735 )
- );
- INVx1_ASAP7_75t_R \U$2342 (
- .A(\con$3736 ),
- .Y(\c$3737 )
- );
- INVx1_ASAP7_75t_R \U$2343 (
- .A(\sn$3738 ),
- .Y(\s$3739 )
- );
- INVx1_ASAP7_75t_R \U$2344 (
- .A(\con$3740 ),
- .Y(\c$3741 )
- );
- INVx1_ASAP7_75t_R \U$2345 (
- .A(\sn$3742 ),
- .Y(\s$3743 )
- );
- INVx1_ASAP7_75t_R \U$2346 (
- .A(\con$3744 ),
- .Y(\c$3745 )
- );
- INVx1_ASAP7_75t_R \U$2347 (
- .A(\sn$3746 ),
- .Y(\s$3747 )
- );
- INVx1_ASAP7_75t_R \U$2348 (
- .A(\con$3748 ),
- .Y(\c$3749 )
- );
- INVx1_ASAP7_75t_R \U$2349 (
- .A(\sn$3750 ),
- .Y(\s$3751 )
- );
- INVx1_ASAP7_75t_R \U$2350 (
- .A(\con$3752 ),
- .Y(\c$3753 )
- );
- INVx1_ASAP7_75t_R \U$2351 (
- .A(\sn$3754 ),
- .Y(\s$3755 )
- );
- INVx1_ASAP7_75t_R \U$2352 (
- .A(\con$3756 ),
- .Y(\c$3757 )
- );
- INVx1_ASAP7_75t_R \U$2353 (
- .A(\sn$3758 ),
- .Y(\s$3759 )
- );
- INVx1_ASAP7_75t_R \U$2354 (
- .A(\con$3760 ),
- .Y(\c$3761 )
- );
- INVx1_ASAP7_75t_R \U$2355 (
- .A(\sn$3762 ),
- .Y(\s$3763 )
- );
- INVx1_ASAP7_75t_R \U$2356 (
- .A(\con$3764 ),
- .Y(\c$3765 )
- );
- INVx1_ASAP7_75t_R \U$2357 (
- .A(\sn$3766 ),
- .Y(\s$3767 )
- );
- INVx1_ASAP7_75t_R \U$2358 (
- .A(\con$3768 ),
- .Y(\c$3769 )
- );
- INVx1_ASAP7_75t_R \U$2359 (
- .A(\sn$3770 ),
- .Y(\s$3771 )
- );
- INVx1_ASAP7_75t_R \U$2360 (
- .A(\con$3772 ),
- .Y(\c$3773 )
- );
- INVx1_ASAP7_75t_R \U$2361 (
- .A(\sn$3774 ),
- .Y(\s$3775 )
- );
- INVx1_ASAP7_75t_R \U$2362 (
- .A(\con$3776 ),
- .Y(\c$3777 )
- );
- INVx1_ASAP7_75t_R \U$2363 (
- .A(\sn$3778 ),
- .Y(\s$3779 )
- );
- INVx1_ASAP7_75t_R \U$2364 (
- .A(\con$3780 ),
- .Y(\c$3781 )
- );
- INVx1_ASAP7_75t_R \U$2365 (
- .A(\sn$3782 ),
- .Y(\s$3783 )
- );
- INVx1_ASAP7_75t_R \U$2366 (
- .A(\con$3784 ),
- .Y(\c$3785 )
- );
- INVx1_ASAP7_75t_R \U$2367 (
- .A(\sn$3786 ),
- .Y(\s$3787 )
- );
- INVx1_ASAP7_75t_R \U$2368 (
- .A(\con$3788 ),
- .Y(\c$3789 )
- );
- INVx1_ASAP7_75t_R \U$2369 (
- .A(\sn$3790 ),
- .Y(\s$3791 )
- );
- INVx1_ASAP7_75t_R \U$2370 (
- .A(\con$3792 ),
- .Y(\c$3793 )
- );
- INVx1_ASAP7_75t_R \U$2371 (
- .A(\sn$3794 ),
- .Y(\s$3795 )
- );
- INVx1_ASAP7_75t_R \U$2372 (
- .A(\con$3796 ),
- .Y(\c$3797 )
- );
- INVx1_ASAP7_75t_R \U$2373 (
- .A(\sn$3798 ),
- .Y(\s$3799 )
- );
- INVx1_ASAP7_75t_R \U$2374 (
- .A(\con$3800 ),
- .Y(\c$3801 )
- );
- INVx1_ASAP7_75t_R \U$2375 (
- .A(\sn$3802 ),
- .Y(\s$3803 )
- );
- INVx1_ASAP7_75t_R \U$2376 (
- .A(\con$3804 ),
- .Y(\c$3805 )
- );
- INVx1_ASAP7_75t_R \U$2377 (
- .A(\sn$3806 ),
- .Y(\s$3807 )
- );
- INVx1_ASAP7_75t_R \U$2378 (
- .A(\con$3808 ),
- .Y(\c$3809 )
- );
- INVx1_ASAP7_75t_R \U$2379 (
- .A(\sn$3810 ),
- .Y(\s$3811 )
- );
- INVx1_ASAP7_75t_R \U$2380 (
- .A(\con$3812 ),
- .Y(\c$3813 )
- );
- INVx1_ASAP7_75t_R \U$2381 (
- .A(\sn$3814 ),
- .Y(\s$3815 )
- );
- INVx1_ASAP7_75t_R \U$2382 (
- .A(\con$3816 ),
- .Y(\c$3817 )
- );
- INVx1_ASAP7_75t_R \U$2383 (
- .A(\sn$3818 ),
- .Y(\s$3819 )
- );
- INVx1_ASAP7_75t_R \U$2384 (
- .A(\con$3820 ),
- .Y(\c$3821 )
- );
- INVx1_ASAP7_75t_R \U$2385 (
- .A(\sn$3822 ),
- .Y(\s$3823 )
- );
- INVx1_ASAP7_75t_R \U$2386 (
- .A(\con$3824 ),
- .Y(\c$3825 )
- );
- INVx1_ASAP7_75t_R \U$2387 (
- .A(\sn$3826 ),
- .Y(\s$3827 )
- );
- INVx1_ASAP7_75t_R \U$2388 (
- .A(\con$3828 ),
- .Y(\c$3829 )
- );
- INVx1_ASAP7_75t_R \U$2389 (
- .A(\sn$3830 ),
- .Y(\s$3831 )
- );
- INVx1_ASAP7_75t_R \U$2390 (
- .A(\con$3832 ),
- .Y(\c$3833 )
- );
- INVx1_ASAP7_75t_R \U$2391 (
- .A(\sn$3834 ),
- .Y(\s$3835 )
- );
- INVx1_ASAP7_75t_R \U$2392 (
- .A(\con$3836 ),
- .Y(\c$3837 )
- );
- INVx1_ASAP7_75t_R \U$2393 (
- .A(\sn$3838 ),
- .Y(\s$3839 )
- );
- INVx1_ASAP7_75t_R \U$2394 (
- .A(\con$3840 ),
- .Y(\c$3841 )
- );
- INVx1_ASAP7_75t_R \U$2395 (
- .A(\sn$3842 ),
- .Y(\s$3843 )
- );
- INVx1_ASAP7_75t_R \U$2396 (
- .A(\con$3844 ),
- .Y(\c$3845 )
- );
- INVx1_ASAP7_75t_R \U$2397 (
- .A(\sn$3846 ),
- .Y(\s$3847 )
- );
- INVx1_ASAP7_75t_R \U$2398 (
- .A(\con$3848 ),
- .Y(\c$3849 )
- );
- INVx1_ASAP7_75t_R \U$2399 (
- .A(\sn$3850 ),
- .Y(\s$3851 )
- );
- INVx1_ASAP7_75t_R \U$2400 (
- .A(\con$3852 ),
- .Y(\c$3853 )
- );
- INVx1_ASAP7_75t_R \U$2401 (
- .A(\sn$3854 ),
- .Y(\s$3855 )
- );
- INVx1_ASAP7_75t_R \U$2402 (
- .A(\con$3856 ),
- .Y(\c$3857 )
- );
- INVx1_ASAP7_75t_R \U$2403 (
- .A(\sn$3858 ),
- .Y(\s$3859 )
- );
- INVx1_ASAP7_75t_R \U$2404 (
- .A(\con$3860 ),
- .Y(\c$3861 )
- );
- INVx1_ASAP7_75t_R \U$2405 (
- .A(\sn$3862 ),
- .Y(\s$3863 )
- );
- INVx1_ASAP7_75t_R \U$2406 (
- .A(\con$3864 ),
- .Y(\c$3865 )
- );
- INVx1_ASAP7_75t_R \U$2407 (
- .A(\sn$3866 ),
- .Y(\s$3867 )
- );
- INVx1_ASAP7_75t_R \U$2408 (
- .A(\con$3868 ),
- .Y(\c$3869 )
- );
- INVx1_ASAP7_75t_R \U$2409 (
- .A(\sn$3870 ),
- .Y(\s$3871 )
- );
- INVx1_ASAP7_75t_R \U$2410 (
- .A(\con$3872 ),
- .Y(\c$3873 )
- );
- INVx1_ASAP7_75t_R \U$2411 (
- .A(\sn$3874 ),
- .Y(\s$3875 )
- );
- INVx1_ASAP7_75t_R \U$2412 (
- .A(\con$3876 ),
- .Y(\c$3877 )
- );
- INVx1_ASAP7_75t_R \U$2413 (
- .A(\sn$3878 ),
- .Y(\s$3879 )
- );
- INVx1_ASAP7_75t_R \U$2414 (
- .A(\con$3880 ),
- .Y(\c$3881 )
- );
- INVx1_ASAP7_75t_R \U$2415 (
- .A(\sn$3882 ),
- .Y(\s$3883 )
- );
- INVx1_ASAP7_75t_R \U$2416 (
- .A(\con$3884 ),
- .Y(\c$3885 )
- );
- INVx1_ASAP7_75t_R \U$2417 (
- .A(\sn$3886 ),
- .Y(\s$3887 )
- );
- INVx1_ASAP7_75t_R \U$2418 (
- .A(\con$3888 ),
- .Y(\c$3889 )
- );
- INVx1_ASAP7_75t_R \U$2419 (
- .A(\sn$3890 ),
- .Y(\s$3891 )
- );
- INVx1_ASAP7_75t_R \U$2420 (
- .A(\con$3892 ),
- .Y(\c$3893 )
- );
- INVx1_ASAP7_75t_R \U$2421 (
- .A(\sn$3894 ),
- .Y(\s$3895 )
- );
- INVx1_ASAP7_75t_R \U$2422 (
- .A(\con$3896 ),
- .Y(\c$3897 )
- );
- INVx1_ASAP7_75t_R \U$2423 (
- .A(\sn$3898 ),
- .Y(\s$3899 )
- );
- INVx1_ASAP7_75t_R \U$2424 (
- .A(\con$3900 ),
- .Y(\c$3901 )
- );
- INVx1_ASAP7_75t_R \U$2425 (
- .A(\sn$3902 ),
- .Y(\s$3903 )
- );
- INVx1_ASAP7_75t_R \U$2426 (
- .A(\con$3904 ),
- .Y(\c$3905 )
- );
- INVx1_ASAP7_75t_R \U$2427 (
- .A(\sn$3906 ),
- .Y(\s$3907 )
- );
- INVx1_ASAP7_75t_R \U$2428 (
- .A(\con$3908 ),
- .Y(\c$3909 )
- );
- INVx1_ASAP7_75t_R \U$2429 (
- .A(\sn$3910 ),
- .Y(\s$3911 )
- );
- INVx1_ASAP7_75t_R \U$2430 (
- .A(\con$3912 ),
- .Y(\c$3913 )
- );
- INVx1_ASAP7_75t_R \U$2431 (
- .A(\sn$3914 ),
- .Y(\s$3915 )
- );
- INVx1_ASAP7_75t_R \U$2432 (
- .A(\con$3916 ),
- .Y(\c$3917 )
- );
- INVx1_ASAP7_75t_R \U$2433 (
- .A(\sn$3918 ),
- .Y(\s$3919 )
- );
- INVx1_ASAP7_75t_R \U$2434 (
- .A(\con$3920 ),
- .Y(\c$3921 )
- );
- INVx1_ASAP7_75t_R \U$2435 (
- .A(\sn$3922 ),
- .Y(\s$3923 )
- );
- INVx1_ASAP7_75t_R \U$2436 (
- .A(\con$3924 ),
- .Y(\c$3925 )
- );
- INVx1_ASAP7_75t_R \U$2437 (
- .A(\sn$3926 ),
- .Y(\s$3927 )
- );
- INVx1_ASAP7_75t_R \U$2438 (
- .A(\con$3928 ),
- .Y(\c$3929 )
- );
- INVx1_ASAP7_75t_R \U$2439 (
- .A(\sn$3930 ),
- .Y(\s$3931 )
- );
- INVx1_ASAP7_75t_R \U$2440 (
- .A(\con$3932 ),
- .Y(\c$3933 )
- );
- INVx1_ASAP7_75t_R \U$2441 (
- .A(\sn$3934 ),
- .Y(\s$3935 )
- );
- INVx1_ASAP7_75t_R \U$2442 (
- .A(\con$3936 ),
- .Y(\c$3937 )
- );
- INVx1_ASAP7_75t_R \U$2443 (
- .A(\sn$3938 ),
- .Y(\s$3939 )
- );
- INVx1_ASAP7_75t_R \U$2444 (
- .A(\con$3940 ),
- .Y(\c$3941 )
- );
- INVx1_ASAP7_75t_R \U$2445 (
- .A(\sn$3942 ),
- .Y(\s$3943 )
- );
- INVx1_ASAP7_75t_R \U$2446 (
- .A(\con$3944 ),
- .Y(\c$3945 )
- );
- INVx1_ASAP7_75t_R \U$2447 (
- .A(\sn$3946 ),
- .Y(\s$3947 )
- );
- INVx1_ASAP7_75t_R \U$2448 (
- .A(\con$3948 ),
- .Y(\c$3949 )
- );
- INVx1_ASAP7_75t_R \U$2449 (
- .A(\sn$3950 ),
- .Y(\s$3951 )
- );
- INVx1_ASAP7_75t_R \U$2450 (
- .A(\con$3952 ),
- .Y(\c$3953 )
- );
- INVx1_ASAP7_75t_R \U$2451 (
- .A(\sn$3954 ),
- .Y(\s$3955 )
- );
- INVx1_ASAP7_75t_R \U$2452 (
- .A(\con$3956 ),
- .Y(\c$3957 )
- );
- INVx1_ASAP7_75t_R \U$2453 (
- .A(\sn$3958 ),
- .Y(\s$3959 )
- );
- INVx1_ASAP7_75t_R \U$2454 (
- .A(\con$3960 ),
- .Y(\c$3961 )
- );
- INVx1_ASAP7_75t_R \U$2455 (
- .A(\sn$3962 ),
- .Y(\s$3963 )
- );
- INVx1_ASAP7_75t_R \U$2456 (
- .A(\con$3964 ),
- .Y(\c$3965 )
- );
- INVx1_ASAP7_75t_R \U$2457 (
- .A(\sn$3966 ),
- .Y(\s$3967 )
- );
- INVx1_ASAP7_75t_R \U$2458 (
- .A(\con$3968 ),
- .Y(\c$3969 )
- );
- INVx1_ASAP7_75t_R \U$2459 (
- .A(\sn$3970 ),
- .Y(\s$3971 )
- );
- INVx1_ASAP7_75t_R \U$2460 (
- .A(\con$3972 ),
- .Y(\c$3973 )
- );
- INVx1_ASAP7_75t_R \U$2461 (
- .A(\sn$3974 ),
- .Y(\s$3975 )
- );
- INVx1_ASAP7_75t_R \U$2462 (
- .A(\con$3976 ),
- .Y(\c$3977 )
- );
- INVx1_ASAP7_75t_R \U$2463 (
- .A(\sn$3978 ),
- .Y(\s$3979 )
- );
- INVx1_ASAP7_75t_R \U$2464 (
- .A(\con$3980 ),
- .Y(\c$3981 )
- );
- INVx1_ASAP7_75t_R \U$2465 (
- .A(\sn$3982 ),
- .Y(\s$3983 )
- );
- INVx1_ASAP7_75t_R \U$2466 (
- .A(\con$3984 ),
- .Y(\c$3985 )
- );
- INVx1_ASAP7_75t_R \U$2467 (
- .A(\sn$3986 ),
- .Y(\s$3987 )
- );
- INVx1_ASAP7_75t_R \U$2468 (
- .A(\con$3988 ),
- .Y(\c$3989 )
- );
- INVx1_ASAP7_75t_R \U$2469 (
- .A(\sn$3990 ),
- .Y(\s$3991 )
- );
- INVx1_ASAP7_75t_R \U$2470 (
- .A(\con$3992 ),
- .Y(\c$3993 )
- );
- INVx1_ASAP7_75t_R \U$2471 (
- .A(\sn$3994 ),
- .Y(\s$3995 )
- );
- INVx1_ASAP7_75t_R \U$2472 (
- .A(\con$3996 ),
- .Y(\c$3997 )
- );
- INVx1_ASAP7_75t_R \U$2473 (
- .A(\sn$3998 ),
- .Y(\s$3999 )
- );
- INVx1_ASAP7_75t_R \U$2474 (
- .A(\con$4000 ),
- .Y(\c$4001 )
- );
- INVx1_ASAP7_75t_R \U$2475 (
- .A(\sn$4002 ),
- .Y(\s$4003 )
- );
- INVx1_ASAP7_75t_R \U$2476 (
- .A(\con$4004 ),
- .Y(\c$4005 )
- );
- INVx1_ASAP7_75t_R \U$2477 (
- .A(\sn$4006 ),
- .Y(\s$4007 )
- );
- INVx1_ASAP7_75t_R \U$2478 (
- .A(\con$4008 ),
- .Y(\c$4009 )
- );
- INVx1_ASAP7_75t_R \U$2479 (
- .A(\sn$4010 ),
- .Y(\s$4011 )
- );
- INVx1_ASAP7_75t_R \U$2480 (
- .A(\con$4012 ),
- .Y(\c$4013 )
- );
- INVx1_ASAP7_75t_R \U$2481 (
- .A(\sn$4014 ),
- .Y(\s$4015 )
- );
- INVx1_ASAP7_75t_R \U$2482 (
- .A(\con$4016 ),
- .Y(\c$4017 )
- );
- INVx1_ASAP7_75t_R \U$2483 (
- .A(\sn$4018 ),
- .Y(\s$4019 )
- );
- INVx1_ASAP7_75t_R \U$2484 (
- .A(\con$4020 ),
- .Y(\c$4021 )
- );
- INVx1_ASAP7_75t_R \U$2485 (
- .A(\sn$4022 ),
- .Y(\s$4023 )
- );
- INVx1_ASAP7_75t_R \U$2486 (
- .A(\con$4024 ),
- .Y(\c$4025 )
- );
- INVx1_ASAP7_75t_R \U$2487 (
- .A(\sn$4026 ),
- .Y(\s$4027 )
- );
- INVx1_ASAP7_75t_R \U$2488 (
- .A(\con$4028 ),
- .Y(\c$4029 )
- );
- INVx1_ASAP7_75t_R \U$2489 (
- .A(\sn$4030 ),
- .Y(\s$4031 )
- );
- INVx1_ASAP7_75t_R \U$2490 (
- .A(\con$4032 ),
- .Y(\c$4033 )
- );
- INVx1_ASAP7_75t_R \U$2491 (
- .A(\sn$4034 ),
- .Y(\s$4035 )
- );
- INVx1_ASAP7_75t_R \U$2492 (
- .A(\con$4036 ),
- .Y(\c$4037 )
- );
- INVx1_ASAP7_75t_R \U$2493 (
- .A(\sn$4038 ),
- .Y(\s$4039 )
- );
- INVx1_ASAP7_75t_R \U$2494 (
- .A(\con$4040 ),
- .Y(\c$4041 )
- );
- INVx1_ASAP7_75t_R \U$2495 (
- .A(\sn$4042 ),
- .Y(\s$4043 )
- );
- INVx1_ASAP7_75t_R \U$2496 (
- .A(\con$4044 ),
- .Y(\c$4045 )
- );
- INVx1_ASAP7_75t_R \U$2497 (
- .A(\sn$4046 ),
- .Y(\s$4047 )
- );
- INVx1_ASAP7_75t_R \U$2498 (
- .A(\con$4048 ),
- .Y(\c$4049 )
- );
- INVx1_ASAP7_75t_R \U$2499 (
- .A(\sn$4050 ),
- .Y(\s$4051 )
- );
- INVx1_ASAP7_75t_R \U$2500 (
- .A(\con$4052 ),
- .Y(\c$4053 )
- );
- INVx1_ASAP7_75t_R \U$2501 (
- .A(\sn$4054 ),
- .Y(\s$4055 )
- );
- INVx1_ASAP7_75t_R \U$2502 (
- .A(\con$4056 ),
- .Y(\c$4057 )
- );
- INVx1_ASAP7_75t_R \U$2503 (
- .A(\sn$4058 ),
- .Y(\s$4059 )
- );
- INVx1_ASAP7_75t_R \U$2504 (
- .A(\con$4060 ),
- .Y(\c$4061 )
- );
- INVx1_ASAP7_75t_R \U$2505 (
- .A(\sn$4062 ),
- .Y(\s$4063 )
- );
- INVx1_ASAP7_75t_R \U$2506 (
- .A(\con$4064 ),
- .Y(\c$4065 )
- );
- INVx1_ASAP7_75t_R \U$2507 (
- .A(\sn$4066 ),
- .Y(\s$4067 )
- );
- INVx1_ASAP7_75t_R \U$2508 (
- .A(\con$4068 ),
- .Y(\c$4069 )
- );
- INVx1_ASAP7_75t_R \U$2509 (
- .A(\sn$4070 ),
- .Y(\s$4071 )
- );
- INVx1_ASAP7_75t_R \U$2510 (
- .A(\con$4072 ),
- .Y(\c$4073 )
- );
- INVx1_ASAP7_75t_R \U$2511 (
- .A(\sn$4074 ),
- .Y(\s$4075 )
- );
- INVx1_ASAP7_75t_R \U$2512 (
- .A(\con$4076 ),
- .Y(\c$4077 )
- );
- INVx1_ASAP7_75t_R \U$2513 (
- .A(\sn$4078 ),
- .Y(\s$4079 )
- );
- INVx1_ASAP7_75t_R \U$2514 (
- .A(\con$4080 ),
- .Y(\c$4081 )
- );
- INVx1_ASAP7_75t_R \U$2515 (
- .A(\sn$4082 ),
- .Y(\s$4083 )
- );
- INVx1_ASAP7_75t_R \U$2516 (
- .A(\con$4084 ),
- .Y(\c$4085 )
- );
- INVx1_ASAP7_75t_R \U$2517 (
- .A(\sn$4086 ),
- .Y(\s$4087 )
- );
- INVx1_ASAP7_75t_R \U$2518 (
- .A(\con$4088 ),
- .Y(\c$4089 )
- );
- INVx1_ASAP7_75t_R \U$2519 (
- .A(\sn$4090 ),
- .Y(\s$4091 )
- );
- INVx1_ASAP7_75t_R \U$2520 (
- .A(\con$4092 ),
- .Y(\c$4093 )
- );
- INVx1_ASAP7_75t_R \U$2521 (
- .A(\sn$4094 ),
- .Y(\s$4095 )
- );
- INVx1_ASAP7_75t_R \U$2522 (
- .A(\con$4096 ),
- .Y(\c$4097 )
- );
- INVx1_ASAP7_75t_R \U$2523 (
- .A(\sn$4098 ),
- .Y(\s$4099 )
- );
- INVx1_ASAP7_75t_R \U$2524 (
- .A(\con$4100 ),
- .Y(\c$4101 )
- );
- INVx1_ASAP7_75t_R \U$2525 (
- .A(\sn$4102 ),
- .Y(\s$4103 )
- );
- INVx1_ASAP7_75t_R \U$2526 (
- .A(\con$4104 ),
- .Y(\c$4105 )
- );
- INVx1_ASAP7_75t_R \U$2527 (
- .A(\sn$4106 ),
- .Y(\s$4107 )
- );
- INVx1_ASAP7_75t_R \U$2528 (
- .A(\con$4108 ),
- .Y(\c$4109 )
- );
- INVx1_ASAP7_75t_R \U$2529 (
- .A(\sn$4110 ),
- .Y(\s$4111 )
- );
- INVx1_ASAP7_75t_R \U$2530 (
- .A(\con$4112 ),
- .Y(\c$4113 )
- );
- INVx1_ASAP7_75t_R \U$2531 (
- .A(\sn$4114 ),
- .Y(\s$4115 )
- );
- INVx1_ASAP7_75t_R \U$2532 (
- .A(\con$4116 ),
- .Y(\c$4117 )
- );
- INVx1_ASAP7_75t_R \U$2533 (
- .A(\sn$4118 ),
- .Y(\s$4119 )
- );
- INVx1_ASAP7_75t_R \U$2534 (
- .A(\con$4120 ),
- .Y(\c$4121 )
- );
- INVx1_ASAP7_75t_R \U$2535 (
- .A(\sn$4122 ),
- .Y(\s$4123 )
- );
- INVx1_ASAP7_75t_R \U$2536 (
- .A(\con$4124 ),
- .Y(\c$4125 )
- );
- INVx1_ASAP7_75t_R \U$2537 (
- .A(\sn$4126 ),
- .Y(\s$4127 )
- );
- INVx1_ASAP7_75t_R \U$2538 (
- .A(\con$4128 ),
- .Y(\c$4129 )
- );
- INVx1_ASAP7_75t_R \U$2539 (
- .A(\sn$4130 ),
- .Y(\s$4131 )
- );
- INVx1_ASAP7_75t_R \U$2540 (
- .A(\con$4132 ),
- .Y(\c$4133 )
- );
- INVx1_ASAP7_75t_R \U$2541 (
- .A(\sn$4134 ),
- .Y(\s$4135 )
- );
- INVx1_ASAP7_75t_R \U$2542 (
- .A(\con$4136 ),
- .Y(\c$4137 )
- );
- INVx1_ASAP7_75t_R \U$2543 (
- .A(\sn$4138 ),
- .Y(\s$4139 )
- );
- INVx1_ASAP7_75t_R \U$2544 (
- .A(\con$4140 ),
- .Y(\c$4141 )
- );
- INVx1_ASAP7_75t_R \U$2545 (
- .A(\sn$4142 ),
- .Y(\s$4143 )
- );
- INVx1_ASAP7_75t_R \U$2546 (
- .A(\con$4144 ),
- .Y(\c$4145 )
- );
- INVx1_ASAP7_75t_R \U$2547 (
- .A(\sn$4146 ),
- .Y(\s$4147 )
- );
- INVx1_ASAP7_75t_R \U$2548 (
- .A(\con$4148 ),
- .Y(\c$4149 )
- );
- INVx1_ASAP7_75t_R \U$2549 (
- .A(\sn$4150 ),
- .Y(\s$4151 )
- );
- INVx1_ASAP7_75t_R \U$2550 (
- .A(\con$4152 ),
- .Y(\c$4153 )
- );
- INVx1_ASAP7_75t_R \U$2551 (
- .A(\sn$4154 ),
- .Y(\s$4155 )
- );
- INVx1_ASAP7_75t_R \U$2552 (
- .A(\con$4156 ),
- .Y(\c$4157 )
- );
- INVx1_ASAP7_75t_R \U$2553 (
- .A(\sn$4158 ),
- .Y(\s$4159 )
- );
- INVx1_ASAP7_75t_R \U$2554 (
- .A(\con$4160 ),
- .Y(\c$4161 )
- );
- INVx1_ASAP7_75t_R \U$2555 (
- .A(\sn$4162 ),
- .Y(\s$4163 )
- );
- INVx1_ASAP7_75t_R \U$2556 (
- .A(\con$4164 ),
- .Y(\c$4165 )
- );
- INVx1_ASAP7_75t_R \U$2557 (
- .A(\sn$4166 ),
- .Y(\s$4167 )
- );
- INVx1_ASAP7_75t_R \U$2558 (
- .A(\con$4168 ),
- .Y(\c$4169 )
- );
- INVx1_ASAP7_75t_R \U$2559 (
- .A(\sn$4170 ),
- .Y(\s$4171 )
- );
- INVx1_ASAP7_75t_R \U$2560 (
- .A(\con$4172 ),
- .Y(\c$4173 )
- );
- INVx1_ASAP7_75t_R \U$2561 (
- .A(\sn$4174 ),
- .Y(\s$4175 )
- );
- INVx1_ASAP7_75t_R \U$2562 (
- .A(\con$4176 ),
- .Y(\c$4177 )
- );
- INVx1_ASAP7_75t_R \U$2563 (
- .A(\sn$4178 ),
- .Y(\s$4179 )
- );
- INVx1_ASAP7_75t_R \U$2564 (
- .A(\con$4180 ),
- .Y(\c$4181 )
- );
- INVx1_ASAP7_75t_R \U$2565 (
- .A(\sn$4182 ),
- .Y(\s$4183 )
- );
- INVx1_ASAP7_75t_R \U$2566 (
- .A(\con$4184 ),
- .Y(\c$4185 )
- );
- INVx1_ASAP7_75t_R \U$2567 (
- .A(\sn$4186 ),
- .Y(\s$4187 )
- );
- INVx1_ASAP7_75t_R \U$2568 (
- .A(\con$4188 ),
- .Y(\c$4189 )
- );
- INVx1_ASAP7_75t_R \U$2569 (
- .A(\sn$4190 ),
- .Y(\s$4191 )
- );
- INVx1_ASAP7_75t_R \U$2570 (
- .A(\con$4192 ),
- .Y(\c$4193 )
- );
- INVx1_ASAP7_75t_R \U$2571 (
- .A(\sn$4194 ),
- .Y(\s$4195 )
- );
- INVx1_ASAP7_75t_R \U$2572 (
- .A(\con$4196 ),
- .Y(\c$4197 )
- );
- INVx1_ASAP7_75t_R \U$2573 (
- .A(\sn$4198 ),
- .Y(\s$4199 )
- );
- INVx1_ASAP7_75t_R \U$2574 (
- .A(\con$4200 ),
- .Y(\c$4201 )
- );
- INVx1_ASAP7_75t_R \U$2575 (
- .A(\sn$4202 ),
- .Y(\s$4203 )
- );
- INVx1_ASAP7_75t_R \U$2576 (
- .A(\con$4204 ),
- .Y(\c$4205 )
- );
- INVx1_ASAP7_75t_R \U$2577 (
- .A(\sn$4206 ),
- .Y(\s$4207 )
- );
- INVx1_ASAP7_75t_R \U$2578 (
- .A(\con$4208 ),
- .Y(\c$4209 )
- );
- INVx1_ASAP7_75t_R \U$2579 (
- .A(\sn$4210 ),
- .Y(\s$4211 )
- );
- INVx1_ASAP7_75t_R \U$2580 (
- .A(\con$4212 ),
- .Y(\c$4213 )
- );
- INVx1_ASAP7_75t_R \U$2581 (
- .A(\sn$4214 ),
- .Y(\s$4215 )
- );
- INVx1_ASAP7_75t_R \U$2582 (
- .A(\con$4216 ),
- .Y(\c$4217 )
- );
- INVx1_ASAP7_75t_R \U$2583 (
- .A(\sn$4218 ),
- .Y(\s$4219 )
- );
- INVx1_ASAP7_75t_R \U$2584 (
- .A(\con$4220 ),
- .Y(\c$4221 )
- );
- INVx1_ASAP7_75t_R \U$2585 (
- .A(\sn$4222 ),
- .Y(\s$4223 )
- );
- INVx1_ASAP7_75t_R \U$2586 (
- .A(\con$4224 ),
- .Y(\c$4225 )
- );
- INVx1_ASAP7_75t_R \U$2587 (
- .A(\sn$4226 ),
- .Y(\s$4227 )
- );
- INVx1_ASAP7_75t_R \U$2588 (
- .A(\con$4228 ),
- .Y(\c$4229 )
- );
- INVx1_ASAP7_75t_R \U$2589 (
- .A(\sn$4230 ),
- .Y(\s$4231 )
- );
- INVx1_ASAP7_75t_R \U$2590 (
- .A(\con$4232 ),
- .Y(\c$4233 )
- );
- INVx1_ASAP7_75t_R \U$2591 (
- .A(\sn$4234 ),
- .Y(\s$4235 )
- );
- INVx1_ASAP7_75t_R \U$2592 (
- .A(\con$4236 ),
- .Y(\c$4237 )
- );
- INVx1_ASAP7_75t_R \U$2593 (
- .A(\sn$4238 ),
- .Y(\s$4239 )
- );
- INVx1_ASAP7_75t_R \U$2594 (
- .A(\con$4240 ),
- .Y(\c$4241 )
- );
- INVx1_ASAP7_75t_R \U$2595 (
- .A(\sn$4242 ),
- .Y(\s$4243 )
- );
- INVx1_ASAP7_75t_R \U$2596 (
- .A(\con$4244 ),
- .Y(\c$4245 )
- );
- INVx1_ASAP7_75t_R \U$2597 (
- .A(\sn$4246 ),
- .Y(\s$4247 )
- );
- INVx1_ASAP7_75t_R \U$2598 (
- .A(\con$4248 ),
- .Y(\c$4249 )
- );
- INVx1_ASAP7_75t_R \U$2599 (
- .A(\sn$4250 ),
- .Y(\s$4251 )
- );
- INVx1_ASAP7_75t_R \U$2600 (
- .A(\con$4252 ),
- .Y(\c$4253 )
- );
- INVx1_ASAP7_75t_R \U$2601 (
- .A(\sn$4254 ),
- .Y(\s$4255 )
- );
- INVx1_ASAP7_75t_R \U$2602 (
- .A(\con$4256 ),
- .Y(\c$4257 )
- );
- INVx1_ASAP7_75t_R \U$2603 (
- .A(\sn$4258 ),
- .Y(\s$4259 )
- );
- INVx1_ASAP7_75t_R \U$2604 (
- .A(\con$4260 ),
- .Y(\c$4261 )
- );
- INVx1_ASAP7_75t_R \U$2605 (
- .A(\sn$4262 ),
- .Y(\s$4263 )
- );
- INVx1_ASAP7_75t_R \U$2606 (
- .A(\con$4264 ),
- .Y(\c$4265 )
- );
- INVx1_ASAP7_75t_R \U$2607 (
- .A(\sn$4266 ),
- .Y(\s$4267 )
- );
- INVx1_ASAP7_75t_R \U$2608 (
- .A(\con$4268 ),
- .Y(\c$4269 )
- );
- INVx1_ASAP7_75t_R \U$2609 (
- .A(\sn$4270 ),
- .Y(\s$4271 )
- );
- INVx1_ASAP7_75t_R \U$2610 (
- .A(\con$4272 ),
- .Y(\c$4273 )
- );
- INVx1_ASAP7_75t_R \U$2611 (
- .A(\sn$4274 ),
- .Y(\s$4275 )
- );
- INVx1_ASAP7_75t_R \U$2612 (
- .A(\con$4276 ),
- .Y(\c$4277 )
- );
- INVx1_ASAP7_75t_R \U$2613 (
- .A(\sn$4278 ),
- .Y(\s$4279 )
- );
- INVx1_ASAP7_75t_R \U$2614 (
- .A(\con$4280 ),
- .Y(\c$4281 )
- );
- INVx1_ASAP7_75t_R \U$2615 (
- .A(\sn$4282 ),
- .Y(\s$4283 )
- );
- INVx1_ASAP7_75t_R \U$2616 (
- .A(\con$4284 ),
- .Y(\c$4285 )
- );
- INVx1_ASAP7_75t_R \U$2617 (
- .A(\sn$4286 ),
- .Y(\s$4287 )
- );
- INVx1_ASAP7_75t_R \U$2618 (
- .A(\con$4288 ),
- .Y(\c$4289 )
- );
- INVx1_ASAP7_75t_R \U$2619 (
- .A(\sn$4290 ),
- .Y(\s$4291 )
- );
- INVx1_ASAP7_75t_R \U$2620 (
- .A(\con$4292 ),
- .Y(\c$4293 )
- );
- INVx1_ASAP7_75t_R \U$2621 (
- .A(\sn$4294 ),
- .Y(\s$4295 )
- );
- INVx1_ASAP7_75t_R \U$2622 (
- .A(\con$4296 ),
- .Y(\c$4297 )
- );
- INVx1_ASAP7_75t_R \U$2623 (
- .A(\sn$4298 ),
- .Y(\s$4299 )
- );
- INVx1_ASAP7_75t_R \U$2624 (
- .A(\con$4300 ),
- .Y(\c$4301 )
- );
- INVx1_ASAP7_75t_R \U$2625 (
- .A(\sn$4302 ),
- .Y(\s$4303 )
- );
- INVx1_ASAP7_75t_R \U$2626 (
- .A(\con$4304 ),
- .Y(\c$4305 )
- );
- INVx1_ASAP7_75t_R \U$2627 (
- .A(\sn$4306 ),
- .Y(\s$4307 )
- );
- INVx1_ASAP7_75t_R \U$2628 (
- .A(\con$4308 ),
- .Y(\c$4309 )
- );
- INVx1_ASAP7_75t_R \U$2629 (
- .A(\sn$4310 ),
- .Y(\s$4311 )
- );
- INVx1_ASAP7_75t_R \U$2630 (
- .A(\con$4312 ),
- .Y(\c$4313 )
- );
- INVx1_ASAP7_75t_R \U$2631 (
- .A(\sn$4314 ),
- .Y(\s$4315 )
- );
- INVx1_ASAP7_75t_R \U$2632 (
- .A(\con$4316 ),
- .Y(\c$4317 )
- );
- INVx1_ASAP7_75t_R \U$2633 (
- .A(\sn$4318 ),
- .Y(\s$4319 )
- );
- INVx1_ASAP7_75t_R \U$2634 (
- .A(\con$4320 ),
- .Y(\c$4321 )
- );
- INVx1_ASAP7_75t_R \U$2635 (
- .A(\sn$4322 ),
- .Y(\s$4323 )
- );
- INVx1_ASAP7_75t_R \U$2636 (
- .A(\con$4324 ),
- .Y(\c$4325 )
- );
- INVx1_ASAP7_75t_R \U$2637 (
- .A(\sn$4326 ),
- .Y(\s$4327 )
- );
- INVx1_ASAP7_75t_R \U$2638 (
- .A(\con$4328 ),
- .Y(\c$4329 )
- );
- INVx1_ASAP7_75t_R \U$2639 (
- .A(\sn$4330 ),
- .Y(\s$4331 )
- );
- INVx1_ASAP7_75t_R \U$2640 (
- .A(\con$4332 ),
- .Y(\c$4333 )
- );
- INVx1_ASAP7_75t_R \U$2641 (
- .A(\sn$4334 ),
- .Y(\s$4335 )
- );
- INVx1_ASAP7_75t_R \U$2642 (
- .A(\con$4336 ),
- .Y(\c$4337 )
- );
- INVx1_ASAP7_75t_R \U$2643 (
- .A(\sn$4338 ),
- .Y(\s$4339 )
- );
- INVx1_ASAP7_75t_R \U$2644 (
- .A(\con$4340 ),
- .Y(\c$4341 )
- );
- INVx1_ASAP7_75t_R \U$2645 (
- .A(\sn$4342 ),
- .Y(\s$4343 )
- );
- INVx1_ASAP7_75t_R \U$2646 (
- .A(\con$4344 ),
- .Y(\c$4345 )
- );
- INVx1_ASAP7_75t_R \U$2647 (
- .A(\sn$4346 ),
- .Y(\s$4347 )
- );
- INVx1_ASAP7_75t_R \U$2648 (
- .A(\con$4348 ),
- .Y(\c$4349 )
- );
- INVx1_ASAP7_75t_R \U$2649 (
- .A(\sn$4350 ),
- .Y(\s$4351 )
- );
- INVx1_ASAP7_75t_R \U$2650 (
- .A(\con$4352 ),
- .Y(\c$4353 )
- );
- INVx1_ASAP7_75t_R \U$2651 (
- .A(\sn$4354 ),
- .Y(\s$4355 )
- );
- INVx1_ASAP7_75t_R \U$2652 (
- .A(\con$4356 ),
- .Y(\c$4357 )
- );
- INVx1_ASAP7_75t_R \U$2653 (
- .A(\sn$4358 ),
- .Y(\s$4359 )
- );
- INVx1_ASAP7_75t_R \U$2654 (
- .A(\con$4360 ),
- .Y(\c$4361 )
- );
- INVx1_ASAP7_75t_R \U$2655 (
- .A(\sn$4362 ),
- .Y(\s$4363 )
- );
- INVx1_ASAP7_75t_R \U$2656 (
- .A(\con$4364 ),
- .Y(\c$4365 )
- );
- INVx1_ASAP7_75t_R \U$2657 (
- .A(\sn$4366 ),
- .Y(\s$4367 )
- );
- INVx1_ASAP7_75t_R \U$2658 (
- .A(\con$4368 ),
- .Y(\c$4369 )
- );
- INVx1_ASAP7_75t_R \U$2659 (
- .A(\sn$4370 ),
- .Y(\s$4371 )
- );
- INVx1_ASAP7_75t_R \U$2660 (
- .A(\con$4372 ),
- .Y(\c$4373 )
- );
- INVx1_ASAP7_75t_R \U$2661 (
- .A(\sn$4374 ),
- .Y(\s$4375 )
- );
- INVx1_ASAP7_75t_R \U$2662 (
- .A(\con$4376 ),
- .Y(\c$4377 )
- );
- INVx1_ASAP7_75t_R \U$2663 (
- .A(\sn$4378 ),
- .Y(\s$4379 )
- );
- INVx1_ASAP7_75t_R \U$2664 (
- .A(\con$4380 ),
- .Y(\c$4381 )
- );
- INVx1_ASAP7_75t_R \U$2665 (
- .A(\sn$4382 ),
- .Y(\s$4383 )
- );
- INVx1_ASAP7_75t_R \U$2666 (
- .A(\con$4384 ),
- .Y(\c$4385 )
- );
- INVx1_ASAP7_75t_R \U$2667 (
- .A(\sn$4386 ),
- .Y(\s$4387 )
- );
- INVx1_ASAP7_75t_R \U$2668 (
- .A(\con$4388 ),
- .Y(\c$4389 )
- );
- INVx1_ASAP7_75t_R \U$2669 (
- .A(\sn$4390 ),
- .Y(\s$4391 )
- );
- INVx1_ASAP7_75t_R \U$2670 (
- .A(\con$4392 ),
- .Y(\c$4393 )
- );
- INVx1_ASAP7_75t_R \U$2671 (
- .A(\sn$4394 ),
- .Y(\s$4395 )
- );
- INVx1_ASAP7_75t_R \U$2672 (
- .A(\con$4396 ),
- .Y(\c$4397 )
- );
- INVx1_ASAP7_75t_R \U$2673 (
- .A(\sn$4398 ),
- .Y(\s$4399 )
- );
- INVx1_ASAP7_75t_R \U$2674 (
- .A(\con$4400 ),
- .Y(c)
- );
- INVx1_ASAP7_75t_R \U$2675 (
- .A(\sn$4401 ),
- .Y(s)
- );
- INVx1_ASAP7_75t_R \U$2676 (
- .A(\con$4402 ),
- .Y(\c$1197 )
- );
- INVx1_ASAP7_75t_R \U$2677 (
- .A(\sn$4403 ),
- .Y(\s$1260 )
- );
- INVx1_ASAP7_75t_R \U$2678 (
- .A(\con$4404 ),
- .Y(\c$1198 )
- );
- INVx1_ASAP7_75t_R \U$2679 (
- .A(\sn$4405 ),
- .Y(\s$1261 )
- );
- INVx1_ASAP7_75t_R \U$2680 (
- .A(\con$4406 ),
- .Y(\c$1199 )
- );
- INVx1_ASAP7_75t_R \U$2681 (
- .A(\sn$4407 ),
- .Y(\s$1262 )
- );
- INVx1_ASAP7_75t_R \U$2682 (
- .A(\con$4408 ),
- .Y(\c$1200 )
- );
- INVx1_ASAP7_75t_R \U$2683 (
- .A(\sn$4409 ),
- .Y(\s$1263 )
- );
- INVx1_ASAP7_75t_R \U$2684 (
- .A(\con$4410 ),
- .Y(\c$1201 )
- );
- INVx1_ASAP7_75t_R \U$2685 (
- .A(\sn$4411 ),
- .Y(\s$1264 )
- );
- INVx1_ASAP7_75t_R \U$2686 (
- .A(\con$4412 ),
- .Y(\c$1202 )
- );
- INVx1_ASAP7_75t_R \U$2687 (
- .A(\sn$4413 ),
- .Y(\s$1265 )
- );
- INVx1_ASAP7_75t_R \U$2688 (
- .A(\con$4414 ),
- .Y(\c$1203 )
- );
- INVx1_ASAP7_75t_R \U$2689 (
- .A(\sn$4415 ),
- .Y(\s$1266 )
- );
- INVx1_ASAP7_75t_R \U$2690 (
- .A(\con$4416 ),
- .Y(\c$1204 )
- );
- INVx1_ASAP7_75t_R \U$2691 (
- .A(\sn$4417 ),
- .Y(\s$1267 )
- );
- INVx1_ASAP7_75t_R \U$2692 (
- .A(\con$4418 ),
- .Y(\c$1205 )
- );
- INVx1_ASAP7_75t_R \U$2693 (
- .A(\sn$4419 ),
- .Y(\s$1268 )
- );
- INVx1_ASAP7_75t_R \U$2694 (
- .A(\con$4420 ),
- .Y(\c$1206 )
- );
- INVx1_ASAP7_75t_R \U$2695 (
- .A(\sn$4421 ),
- .Y(\s$1269 )
- );
- INVx1_ASAP7_75t_R \U$2696 (
- .A(\con$4422 ),
- .Y(\c$1207 )
- );
- INVx1_ASAP7_75t_R \U$2697 (
- .A(\sn$4423 ),
- .Y(\s$1270 )
- );
- INVx1_ASAP7_75t_R \U$2698 (
- .A(\con$4424 ),
- .Y(\c$1208 )
- );
- INVx1_ASAP7_75t_R \U$2699 (
- .A(\sn$4425 ),
- .Y(\s$1271 )
- );
- INVx1_ASAP7_75t_R \U$2700 (
- .A(\con$4426 ),
- .Y(\c$1209 )
- );
- INVx1_ASAP7_75t_R \U$2701 (
- .A(\sn$4427 ),
- .Y(\s$1272 )
- );
- INVx1_ASAP7_75t_R \U$2702 (
- .A(\con$4428 ),
- .Y(\c$1210 )
- );
- INVx1_ASAP7_75t_R \U$2703 (
- .A(\sn$4429 ),
- .Y(\s$1273 )
- );
- INVx1_ASAP7_75t_R \U$2704 (
- .A(\con$4430 ),
- .Y(\c$1211 )
- );
- INVx1_ASAP7_75t_R \U$2705 (
- .A(\sn$4431 ),
- .Y(\s$1274 )
- );
- INVx1_ASAP7_75t_R \U$2706 (
- .A(\con$4432 ),
- .Y(\c$1212 )
- );
- INVx1_ASAP7_75t_R \U$2707 (
- .A(\sn$4433 ),
- .Y(\s$1275 )
- );
- INVx1_ASAP7_75t_R \U$2708 (
- .A(\con$4434 ),
- .Y(\c$1213 )
- );
- INVx1_ASAP7_75t_R \U$2709 (
- .A(\sn$4435 ),
- .Y(\s$1276 )
- );
- INVx1_ASAP7_75t_R \U$2710 (
- .A(\con$4436 ),
- .Y(\c$1214 )
- );
- INVx1_ASAP7_75t_R \U$2711 (
- .A(\sn$4437 ),
- .Y(\s$1277 )
- );
- INVx1_ASAP7_75t_R \U$2712 (
- .A(\con$4438 ),
- .Y(\c$1215 )
- );
- INVx1_ASAP7_75t_R \U$2713 (
- .A(\sn$4439 ),
- .Y(\s$1278 )
- );
- INVx1_ASAP7_75t_R \U$2714 (
- .A(\con$4440 ),
- .Y(\c$1216 )
- );
- INVx1_ASAP7_75t_R \U$2715 (
- .A(\sn$4441 ),
- .Y(\s$1279 )
- );
- INVx1_ASAP7_75t_R \U$2716 (
- .A(\con$4442 ),
- .Y(\c$1217 )
- );
- INVx1_ASAP7_75t_R \U$2717 (
- .A(\sn$4443 ),
- .Y(\s$1280 )
- );
- INVx1_ASAP7_75t_R \U$2718 (
- .A(\con$4444 ),
- .Y(\c$1218 )
- );
- INVx1_ASAP7_75t_R \U$2719 (
- .A(\sn$4445 ),
- .Y(\s$1281 )
- );
- INVx1_ASAP7_75t_R \U$2720 (
- .A(\con$4446 ),
- .Y(\c$1219 )
- );
- INVx1_ASAP7_75t_R \U$2721 (
- .A(\sn$4447 ),
- .Y(\s$1282 )
- );
- INVx1_ASAP7_75t_R \U$2722 (
- .A(\con$4448 ),
- .Y(\c$1220 )
- );
- INVx1_ASAP7_75t_R \U$2723 (
- .A(\sn$4449 ),
- .Y(\s$1283 )
- );
- INVx1_ASAP7_75t_R \U$2724 (
- .A(\con$4450 ),
- .Y(\c$1221 )
- );
- INVx1_ASAP7_75t_R \U$2725 (
- .A(\sn$4451 ),
- .Y(\s$1284 )
- );
- INVx1_ASAP7_75t_R \U$2726 (
- .A(\con$4452 ),
- .Y(\c$1222 )
- );
- INVx1_ASAP7_75t_R \U$2727 (
- .A(\sn$4453 ),
- .Y(\s$1285 )
- );
- INVx1_ASAP7_75t_R \U$2728 (
- .A(\con$4454 ),
- .Y(\c$1223 )
- );
- INVx1_ASAP7_75t_R \U$2729 (
- .A(\sn$4455 ),
- .Y(\s$1286 )
- );
- INVx1_ASAP7_75t_R \U$2730 (
- .A(\con$4456 ),
- .Y(\c$1224 )
- );
- INVx1_ASAP7_75t_R \U$2731 (
- .A(\sn$4457 ),
- .Y(\s$1287 )
- );
- INVx1_ASAP7_75t_R \U$2732 (
- .A(\con$4458 ),
- .Y(\c$1225 )
- );
- INVx1_ASAP7_75t_R \U$2733 (
- .A(\sn$4459 ),
- .Y(\s$1288 )
- );
- INVx1_ASAP7_75t_R \U$2734 (
- .A(\con$4460 ),
- .Y(\c$1226 )
- );
- INVx1_ASAP7_75t_R \U$2735 (
- .A(\sn$4461 ),
- .Y(\s$1289 )
- );
- INVx1_ASAP7_75t_R \U$2736 (
- .A(\con$4462 ),
- .Y(\c$1227 )
- );
- INVx1_ASAP7_75t_R \U$2737 (
- .A(\sn$4463 ),
- .Y(\s$1290 )
- );
- INVx1_ASAP7_75t_R \U$2738 (
- .A(\con$4464 ),
- .Y(\c$1228 )
- );
- INVx1_ASAP7_75t_R \U$2739 (
- .A(\sn$4465 ),
- .Y(\s$1291 )
- );
- INVx1_ASAP7_75t_R \U$2740 (
- .A(\con$4466 ),
- .Y(\c$1229 )
- );
- INVx1_ASAP7_75t_R \U$2741 (
- .A(\sn$4467 ),
- .Y(\s$1292 )
- );
- INVx1_ASAP7_75t_R \U$2742 (
- .A(\con$4468 ),
- .Y(\c$1230 )
- );
- INVx1_ASAP7_75t_R \U$2743 (
- .A(\sn$4469 ),
- .Y(\s$1293 )
- );
- INVx1_ASAP7_75t_R \U$2744 (
- .A(\con$4470 ),
- .Y(\c$1231 )
- );
- INVx1_ASAP7_75t_R \U$2745 (
- .A(\sn$4471 ),
- .Y(\s$1294 )
- );
- INVx1_ASAP7_75t_R \U$2746 (
- .A(\con$4472 ),
- .Y(\c$1232 )
- );
- INVx1_ASAP7_75t_R \U$2747 (
- .A(\sn$4473 ),
- .Y(\s$1295 )
- );
- INVx1_ASAP7_75t_R \U$2748 (
- .A(\con$4474 ),
- .Y(\c$1233 )
- );
- INVx1_ASAP7_75t_R \U$2749 (
- .A(\sn$4475 ),
- .Y(\s$1296 )
- );
- INVx1_ASAP7_75t_R \U$2750 (
- .A(\con$4476 ),
- .Y(\c$1234 )
- );
- INVx1_ASAP7_75t_R \U$2751 (
- .A(\sn$4477 ),
- .Y(\s$1297 )
- );
- INVx1_ASAP7_75t_R \U$2752 (
- .A(\con$4478 ),
- .Y(\c$1235 )
- );
- INVx1_ASAP7_75t_R \U$2753 (
- .A(\sn$4479 ),
- .Y(\s$1298 )
- );
- INVx1_ASAP7_75t_R \U$2754 (
- .A(\con$4480 ),
- .Y(\c$1236 )
- );
- INVx1_ASAP7_75t_R \U$2755 (
- .A(\sn$4481 ),
- .Y(\s$1299 )
- );
- INVx1_ASAP7_75t_R \U$2756 (
- .A(\con$4482 ),
- .Y(\c$1237 )
- );
- INVx1_ASAP7_75t_R \U$2757 (
- .A(\sn$4483 ),
- .Y(\s$1300 )
- );
- INVx1_ASAP7_75t_R \U$2758 (
- .A(\con$4484 ),
- .Y(\c$1238 )
- );
- INVx1_ASAP7_75t_R \U$2759 (
- .A(\sn$4485 ),
- .Y(\s$1301 )
- );
- INVx1_ASAP7_75t_R \U$2760 (
- .A(\con$4486 ),
- .Y(\c$1239 )
- );
- INVx1_ASAP7_75t_R \U$2761 (
- .A(\sn$4487 ),
- .Y(\s$1302 )
- );
- INVx1_ASAP7_75t_R \U$2762 (
- .A(\con$4488 ),
- .Y(\c$1240 )
- );
- INVx1_ASAP7_75t_R \U$2763 (
- .A(\sn$4489 ),
- .Y(\s$1303 )
- );
- INVx1_ASAP7_75t_R \U$2764 (
- .A(\con$4490 ),
- .Y(\c$1241 )
- );
- INVx1_ASAP7_75t_R \U$2765 (
- .A(\sn$4491 ),
- .Y(\s$1304 )
- );
- INVx1_ASAP7_75t_R \U$2766 (
- .A(\con$4492 ),
- .Y(\c$1242 )
- );
- INVx1_ASAP7_75t_R \U$2767 (
- .A(\sn$4493 ),
- .Y(\s$1305 )
- );
- INVx1_ASAP7_75t_R \U$2768 (
- .A(\con$4494 ),
- .Y(\c$1243 )
- );
- INVx1_ASAP7_75t_R \U$2769 (
- .A(\sn$4495 ),
- .Y(\s$1306 )
- );
- INVx1_ASAP7_75t_R \U$2770 (
- .A(\con$4496 ),
- .Y(\c$1244 )
- );
- INVx1_ASAP7_75t_R \U$2771 (
- .A(\sn$4497 ),
- .Y(\s$1307 )
- );
- INVx1_ASAP7_75t_R \U$2772 (
- .A(\con$4498 ),
- .Y(\c$1245 )
- );
- INVx1_ASAP7_75t_R \U$2773 (
- .A(\sn$4499 ),
- .Y(\s$1308 )
- );
- INVx1_ASAP7_75t_R \U$2774 (
- .A(\con$4500 ),
- .Y(\c$1246 )
- );
- INVx1_ASAP7_75t_R \U$2775 (
- .A(\sn$4501 ),
- .Y(\s$1309 )
- );
- INVx1_ASAP7_75t_R \U$2776 (
- .A(\con$4502 ),
- .Y(\c$1247 )
- );
- INVx1_ASAP7_75t_R \U$2777 (
- .A(\sn$4503 ),
- .Y(\s$1310 )
- );
- INVx1_ASAP7_75t_R \U$2778 (
- .A(\con$4504 ),
- .Y(\c$1248 )
- );
- INVx1_ASAP7_75t_R \U$2779 (
- .A(\sn$4505 ),
- .Y(\s$1311 )
- );
- INVx1_ASAP7_75t_R \U$2780 (
- .A(\con$4506 ),
- .Y(\c$1249 )
- );
- INVx1_ASAP7_75t_R \U$2781 (
- .A(\sn$4507 ),
- .Y(\s$1312 )
- );
- INVx1_ASAP7_75t_R \U$2782 (
- .A(\con$4508 ),
- .Y(\c$1250 )
- );
- INVx1_ASAP7_75t_R \U$2783 (
- .A(\sn$4509 ),
- .Y(\s$1313 )
- );
- INVx1_ASAP7_75t_R \U$2784 (
- .A(\con$4510 ),
- .Y(\c$1251 )
- );
- INVx1_ASAP7_75t_R \U$2785 (
- .A(\sn$4511 ),
- .Y(\s$1314 )
- );
- INVx1_ASAP7_75t_R \U$2786 (
- .A(\con$4512 ),
- .Y(\c$1252 )
- );
- INVx1_ASAP7_75t_R \U$2787 (
- .A(\sn$4513 ),
- .Y(\s$1315 )
- );
- INVx1_ASAP7_75t_R \U$2788 (
- .A(\con$4514 ),
- .Y(\c$1253 )
- );
- INVx1_ASAP7_75t_R \U$2789 (
- .A(\sn$4515 ),
- .Y(\s$1316 )
- );
- INVx1_ASAP7_75t_R \U$2790 (
- .A(\con$4516 ),
- .Y(\c$1254 )
- );
- INVx1_ASAP7_75t_R \U$2791 (
- .A(\sn$4517 ),
- .Y(\s$1317 )
- );
- INVx1_ASAP7_75t_R \U$2792 (
- .A(\con$4518 ),
- .Y(\c$1255 )
- );
- INVx1_ASAP7_75t_R \U$2793 (
- .A(\sn$4519 ),
- .Y(\s$1318 )
- );
- INVx1_ASAP7_75t_R \U$2794 (
- .A(\con$4520 ),
- .Y(\c$1256 )
- );
- INVx1_ASAP7_75t_R \U$2795 (
- .A(\sn$4521 ),
- .Y(\s$1319 )
- );
- INVx1_ASAP7_75t_R \U$2796 (
- .A(\con$4522 ),
- .Y(\c$1257 )
- );
- INVx1_ASAP7_75t_R \U$2797 (
- .A(\sn$4523 ),
- .Y(\s$1320 )
- );
- INVx1_ASAP7_75t_R \U$2798 (
- .A(\con$4524 ),
- .Y(\$53 )
- );
- INVx1_ASAP7_75t_R \U$2799 (
- .A(\sn$4525 ),
- .Y(\s$1321 )
- );
- INVx1_ASAP7_75t_R \U$526 (
- .A(1'h0),
- .Y(\$1 )
- );
- INVx1_ASAP7_75t_R \U$527 (
- .A(a_registered[0]),
- .Y(\$2 )
- );
- INVx1_ASAP7_75t_R \U$528 (
- .A(a_registered[1]),
- .Y(\$3 )
- );
- AO33x2_ASAP7_75t_R \U$529 (
- .A1(\$3 ),
- .A2(a_registered[0]),
- .A3(1'h0),
- .B1(a_registered[1]),
- .B2(\$2 ),
- .B3(\$1 ),
- .Y(sel_0)
- );
- XOR2x1_ASAP7_75t_R \U$530 (
- .A(a_registered[0]),
- .B(1'h0),
- .Y(sel_1)
- );
- AO22x1_ASAP7_75t_R \U$531 (
- .A1(1'h0),
- .A2(sel_0),
- .B1(b_registered[0]),
- .B2(sel_1),
- .Y(t)
- );
- XOR2x1_ASAP7_75t_R \U$532 (
- .A(t),
- .B(a_registered[1]),
- .Y(booth_b0_m0)
- );
- AO22x1_ASAP7_75t_R \U$533 (
- .A1(b_registered[0]),
- .A2(sel_0),
- .B1(b_registered[1]),
- .B2(sel_1),
- .Y(\t$1976 )
- );
- XOR2x1_ASAP7_75t_R \U$534 (
- .A(\t$1976 ),
- .B(a_registered[1]),
- .Y(booth_b0_m1)
- );
- AO22x1_ASAP7_75t_R \U$535 (
- .A1(b_registered[1]),
- .A2(sel_0),
- .B1(b_registered[2]),
- .B2(sel_1),
- .Y(\t$1977 )
- );
- XOR2x1_ASAP7_75t_R \U$536 (
- .A(\t$1977 ),
- .B(a_registered[1]),
- .Y(booth_b0_m2)
- );
- AO22x1_ASAP7_75t_R \U$537 (
- .A1(b_registered[2]),
- .A2(sel_0),
- .B1(b_registered[3]),
- .B2(sel_1),
- .Y(\t$1978 )
- );
- XOR2x1_ASAP7_75t_R \U$538 (
- .A(\t$1978 ),
- .B(a_registered[1]),
- .Y(booth_b0_m3)
- );
- AO22x1_ASAP7_75t_R \U$539 (
- .A1(b_registered[3]),
- .A2(sel_0),
- .B1(b_registered[4]),
- .B2(sel_1),
- .Y(\t$1979 )
- );
- XOR2x1_ASAP7_75t_R \U$540 (
- .A(\t$1979 ),
- .B(a_registered[1]),
- .Y(booth_b0_m4)
- );
- AO22x1_ASAP7_75t_R \U$541 (
- .A1(b_registered[4]),
- .A2(sel_0),
- .B1(b_registered[5]),
- .B2(sel_1),
- .Y(\t$1980 )
- );
- XOR2x1_ASAP7_75t_R \U$542 (
- .A(\t$1980 ),
- .B(a_registered[1]),
- .Y(booth_b0_m5)
- );
- AO22x1_ASAP7_75t_R \U$543 (
- .A1(b_registered[5]),
- .A2(sel_0),
- .B1(b_registered[6]),
- .B2(sel_1),
- .Y(\t$1981 )
- );
- XOR2x1_ASAP7_75t_R \U$544 (
- .A(\t$1981 ),
- .B(a_registered[1]),
- .Y(booth_b0_m6)
- );
- AO22x1_ASAP7_75t_R \U$545 (
- .A1(b_registered[6]),
- .A2(sel_0),
- .B1(b_registered[7]),
- .B2(sel_1),
- .Y(\t$1982 )
- );
- XOR2x1_ASAP7_75t_R \U$546 (
- .A(\t$1982 ),
- .B(a_registered[1]),
- .Y(booth_b0_m7)
- );
- AO22x1_ASAP7_75t_R \U$547 (
- .A1(b_registered[7]),
- .A2(sel_0),
- .B1(b_registered[8]),
- .B2(sel_1),
- .Y(\t$1983 )
- );
- XOR2x1_ASAP7_75t_R \U$548 (
- .A(\t$1983 ),
- .B(a_registered[1]),
- .Y(booth_b0_m8)
- );
- AO22x1_ASAP7_75t_R \U$549 (
- .A1(b_registered[8]),
- .A2(sel_0),
- .B1(b_registered[9]),
- .B2(sel_1),
- .Y(\t$1984 )
- );
- XOR2x1_ASAP7_75t_R \U$550 (
- .A(\t$1984 ),
- .B(a_registered[1]),
- .Y(booth_b0_m9)
- );
- AO22x1_ASAP7_75t_R \U$551 (
- .A1(b_registered[9]),
- .A2(sel_0),
- .B1(b_registered[10]),
- .B2(sel_1),
- .Y(\t$1985 )
- );
- XOR2x1_ASAP7_75t_R \U$552 (
- .A(\t$1985 ),
- .B(a_registered[1]),
- .Y(booth_b0_m10)
- );
- AO22x1_ASAP7_75t_R \U$553 (
- .A1(b_registered[10]),
- .A2(sel_0),
- .B1(b_registered[11]),
- .B2(sel_1),
- .Y(\t$1986 )
- );
- XOR2x1_ASAP7_75t_R \U$554 (
- .A(\t$1986 ),
- .B(a_registered[1]),
- .Y(booth_b0_m11)
- );
- AO22x1_ASAP7_75t_R \U$555 (
- .A1(b_registered[11]),
- .A2(sel_0),
- .B1(b_registered[12]),
- .B2(sel_1),
- .Y(\t$1987 )
- );
- XOR2x1_ASAP7_75t_R \U$556 (
- .A(\t$1987 ),
- .B(a_registered[1]),
- .Y(booth_b0_m12)
- );
- AO22x1_ASAP7_75t_R \U$557 (
- .A1(b_registered[12]),
- .A2(sel_0),
- .B1(b_registered[13]),
- .B2(sel_1),
- .Y(\t$1988 )
- );
- XOR2x1_ASAP7_75t_R \U$558 (
- .A(\t$1988 ),
- .B(a_registered[1]),
- .Y(booth_b0_m13)
- );
- AO22x1_ASAP7_75t_R \U$559 (
- .A1(b_registered[13]),
- .A2(sel_0),
- .B1(b_registered[14]),
- .B2(sel_1),
- .Y(\t$1989 )
- );
- XOR2x1_ASAP7_75t_R \U$560 (
- .A(\t$1989 ),
- .B(a_registered[1]),
- .Y(booth_b0_m14)
- );
- AO22x1_ASAP7_75t_R \U$561 (
- .A1(b_registered[14]),
- .A2(sel_0),
- .B1(b_registered[15]),
- .B2(sel_1),
- .Y(\t$1990 )
- );
- XOR2x1_ASAP7_75t_R \U$562 (
- .A(\t$1990 ),
- .B(a_registered[1]),
- .Y(booth_b0_m15)
- );
- AO22x1_ASAP7_75t_R \U$563 (
- .A1(b_registered[15]),
- .A2(sel_0),
- .B1(b_registered[16]),
- .B2(sel_1),
- .Y(\t$1991 )
- );
- XOR2x1_ASAP7_75t_R \U$564 (
- .A(\t$1991 ),
- .B(a_registered[1]),
- .Y(booth_b0_m16)
- );
- AO22x1_ASAP7_75t_R \U$565 (
- .A1(b_registered[16]),
- .A2(sel_0),
- .B1(b_registered[17]),
- .B2(sel_1),
- .Y(\t$1992 )
- );
- XOR2x1_ASAP7_75t_R \U$566 (
- .A(\t$1992 ),
- .B(a_registered[1]),
- .Y(booth_b0_m17)
- );
- AO22x1_ASAP7_75t_R \U$567 (
- .A1(b_registered[17]),
- .A2(sel_0),
- .B1(b_registered[18]),
- .B2(sel_1),
- .Y(\t$1993 )
- );
- XOR2x1_ASAP7_75t_R \U$568 (
- .A(\t$1993 ),
- .B(a_registered[1]),
- .Y(booth_b0_m18)
- );
- AO22x1_ASAP7_75t_R \U$569 (
- .A1(b_registered[18]),
- .A2(sel_0),
- .B1(b_registered[19]),
- .B2(sel_1),
- .Y(\t$1994 )
- );
- XOR2x1_ASAP7_75t_R \U$570 (
- .A(\t$1994 ),
- .B(a_registered[1]),
- .Y(booth_b0_m19)
- );
- AO22x1_ASAP7_75t_R \U$571 (
- .A1(b_registered[19]),
- .A2(sel_0),
- .B1(b_registered[20]),
- .B2(sel_1),
- .Y(\t$1995 )
- );
- XOR2x1_ASAP7_75t_R \U$572 (
- .A(\t$1995 ),
- .B(a_registered[1]),
- .Y(booth_b0_m20)
- );
- AO22x1_ASAP7_75t_R \U$573 (
- .A1(b_registered[20]),
- .A2(sel_0),
- .B1(b_registered[21]),
- .B2(sel_1),
- .Y(\t$1996 )
- );
- XOR2x1_ASAP7_75t_R \U$574 (
- .A(\t$1996 ),
- .B(a_registered[1]),
- .Y(booth_b0_m21)
- );
- AO22x1_ASAP7_75t_R \U$575 (
- .A1(b_registered[21]),
- .A2(sel_0),
- .B1(b_registered[22]),
- .B2(sel_1),
- .Y(\t$1997 )
- );
- XOR2x1_ASAP7_75t_R \U$576 (
- .A(\t$1997 ),
- .B(a_registered[1]),
- .Y(booth_b0_m22)
- );
- AO22x1_ASAP7_75t_R \U$577 (
- .A1(b_registered[22]),
- .A2(sel_0),
- .B1(b_registered[23]),
- .B2(sel_1),
- .Y(\t$1998 )
- );
- XOR2x1_ASAP7_75t_R \U$578 (
- .A(\t$1998 ),
- .B(a_registered[1]),
- .Y(booth_b0_m23)
- );
- AO22x1_ASAP7_75t_R \U$579 (
- .A1(b_registered[23]),
- .A2(sel_0),
- .B1(b_registered[24]),
- .B2(sel_1),
- .Y(\t$1999 )
- );
- XOR2x1_ASAP7_75t_R \U$580 (
- .A(\t$1999 ),
- .B(a_registered[1]),
- .Y(booth_b0_m24)
- );
- AO22x1_ASAP7_75t_R \U$581 (
- .A1(b_registered[24]),
- .A2(sel_0),
- .B1(b_registered[25]),
- .B2(sel_1),
- .Y(\t$2000 )
- );
- XOR2x1_ASAP7_75t_R \U$582 (
- .A(\t$2000 ),
- .B(a_registered[1]),
- .Y(booth_b0_m25)
- );
- AO22x1_ASAP7_75t_R \U$583 (
- .A1(b_registered[25]),
- .A2(sel_0),
- .B1(b_registered[26]),
- .B2(sel_1),
- .Y(\t$2001 )
- );
- XOR2x1_ASAP7_75t_R \U$584 (
- .A(\t$2001 ),
- .B(a_registered[1]),
- .Y(booth_b0_m26)
- );
- AO22x1_ASAP7_75t_R \U$585 (
- .A1(b_registered[26]),
- .A2(sel_0),
- .B1(b_registered[27]),
- .B2(sel_1),
- .Y(\t$2002 )
- );
- XOR2x1_ASAP7_75t_R \U$586 (
- .A(\t$2002 ),
- .B(a_registered[1]),
- .Y(booth_b0_m27)
- );
- AO22x1_ASAP7_75t_R \U$587 (
- .A1(b_registered[27]),
- .A2(sel_0),
- .B1(b_registered[28]),
- .B2(sel_1),
- .Y(\t$2003 )
- );
- XOR2x1_ASAP7_75t_R \U$588 (
- .A(\t$2003 ),
- .B(a_registered[1]),
- .Y(booth_b0_m28)
- );
- AO22x1_ASAP7_75t_R \U$589 (
- .A1(b_registered[28]),
- .A2(sel_0),
- .B1(b_registered[29]),
- .B2(sel_1),
- .Y(\t$2004 )
- );
- XOR2x1_ASAP7_75t_R \U$590 (
- .A(\t$2004 ),
- .B(a_registered[1]),
- .Y(booth_b0_m29)
- );
- AO22x1_ASAP7_75t_R \U$591 (
- .A1(b_registered[29]),
- .A2(sel_0),
- .B1(b_registered[30]),
- .B2(sel_1),
- .Y(\t$2005 )
- );
- XOR2x1_ASAP7_75t_R \U$592 (
- .A(\t$2005 ),
- .B(a_registered[1]),
- .Y(booth_b0_m30)
- );
- AO22x1_ASAP7_75t_R \U$593 (
- .A1(b_registered[30]),
- .A2(sel_0),
- .B1(b_registered[31]),
- .B2(sel_1),
- .Y(\t$2006 )
- );
- XOR2x1_ASAP7_75t_R \U$594 (
- .A(\t$2006 ),
- .B(a_registered[1]),
- .Y(booth_b0_m31)
- );
- AO22x1_ASAP7_75t_R \U$595 (
- .A1(b_registered[31]),
- .A2(sel_0),
- .B1(1'h0),
- .B2(sel_1),
- .Y(\t$2007 )
- );
- XOR2x1_ASAP7_75t_R \U$596 (
- .A(\t$2007 ),
- .B(a_registered[1]),
- .Y(booth_b0_m32)
- );
- INVx1_ASAP7_75t_R \U$597 (
- .A(a_registered[1]),
- .Y(notsign)
- );
- INVx1_ASAP7_75t_R \U$598 (
- .A(a_registered[1]),
- .Y(\$4 )
- );
- INVx1_ASAP7_75t_R \U$599 (
- .A(a_registered[2]),
- .Y(\$5 )
- );
- INVx1_ASAP7_75t_R \U$600 (
- .A(a_registered[3]),
- .Y(\$6 )
- );
- AO33x2_ASAP7_75t_R \U$601 (
- .A1(\$6 ),
- .A2(a_registered[2]),
- .A3(a_registered[1]),
- .B1(a_registered[3]),
- .B2(\$5 ),
- .B3(\$4 ),
- .Y(\sel_0$1365 )
- );
- XOR2x1_ASAP7_75t_R \U$602 (
- .A(a_registered[2]),
- .B(a_registered[1]),
- .Y(\sel_1$1366 )
- );
- AO22x1_ASAP7_75t_R \U$603 (
- .A1(1'h0),
- .A2(\sel_0$1365 ),
- .B1(b_registered[0]),
- .B2(\sel_1$1366 ),
- .Y(\t$2009 )
- );
- XOR2x1_ASAP7_75t_R \U$604 (
- .A(\t$2009 ),
- .B(a_registered[3]),
- .Y(booth_b2_m0)
- );
- AO22x1_ASAP7_75t_R \U$605 (
- .A1(b_registered[0]),
- .A2(\sel_0$1365 ),
- .B1(b_registered[1]),
- .B2(\sel_1$1366 ),
- .Y(\t$2010 )
- );
- XOR2x1_ASAP7_75t_R \U$606 (
- .A(\t$2010 ),
- .B(a_registered[3]),
- .Y(booth_b2_m1)
- );
- AO22x1_ASAP7_75t_R \U$607 (
- .A1(b_registered[1]),
- .A2(\sel_0$1365 ),
- .B1(b_registered[2]),
- .B2(\sel_1$1366 ),
- .Y(\t$2011 )
- );
- XOR2x1_ASAP7_75t_R \U$608 (
- .A(\t$2011 ),
- .B(a_registered[3]),
- .Y(booth_b2_m2)
- );
- AO22x1_ASAP7_75t_R \U$609 (
- .A1(b_registered[2]),
- .A2(\sel_0$1365 ),
- .B1(b_registered[3]),
- .B2(\sel_1$1366 ),
- .Y(\t$2012 )
- );
- XOR2x1_ASAP7_75t_R \U$610 (
- .A(\t$2012 ),
- .B(a_registered[3]),
- .Y(booth_b2_m3)
- );
- AO22x1_ASAP7_75t_R \U$611 (
- .A1(b_registered[3]),
- .A2(\sel_0$1365 ),
- .B1(b_registered[4]),
- .B2(\sel_1$1366 ),
- .Y(\t$2013 )
- );
- XOR2x1_ASAP7_75t_R \U$612 (
- .A(\t$2013 ),
- .B(a_registered[3]),
- .Y(booth_b2_m4)
- );
- AO22x1_ASAP7_75t_R \U$613 (
- .A1(b_registered[4]),
- .A2(\sel_0$1365 ),
- .B1(b_registered[5]),
- .B2(\sel_1$1366 ),
- .Y(\t$2014 )
- );
- XOR2x1_ASAP7_75t_R \U$614 (
- .A(\t$2014 ),
- .B(a_registered[3]),
- .Y(booth_b2_m5)
- );
- AO22x1_ASAP7_75t_R \U$615 (
- .A1(b_registered[5]),
- .A2(\sel_0$1365 ),
- .B1(b_registered[6]),
- .B2(\sel_1$1366 ),
- .Y(\t$2015 )
- );
- XOR2x1_ASAP7_75t_R \U$616 (
- .A(\t$2015 ),
- .B(a_registered[3]),
- .Y(booth_b2_m6)
- );
- AO22x1_ASAP7_75t_R \U$617 (
- .A1(b_registered[6]),
- .A2(\sel_0$1365 ),
- .B1(b_registered[7]),
- .B2(\sel_1$1366 ),
- .Y(\t$2016 )
- );
- XOR2x1_ASAP7_75t_R \U$618 (
- .A(\t$2016 ),
- .B(a_registered[3]),
- .Y(booth_b2_m7)
- );
- AO22x1_ASAP7_75t_R \U$619 (
- .A1(b_registered[7]),
- .A2(\sel_0$1365 ),
- .B1(b_registered[8]),
- .B2(\sel_1$1366 ),
- .Y(\t$2017 )
- );
- XOR2x1_ASAP7_75t_R \U$620 (
- .A(\t$2017 ),
- .B(a_registered[3]),
- .Y(booth_b2_m8)
- );
- AO22x1_ASAP7_75t_R \U$621 (
- .A1(b_registered[8]),
- .A2(\sel_0$1365 ),
- .B1(b_registered[9]),
- .B2(\sel_1$1366 ),
- .Y(\t$2018 )
- );
- XOR2x1_ASAP7_75t_R \U$622 (
- .A(\t$2018 ),
- .B(a_registered[3]),
- .Y(booth_b2_m9)
- );
- AO22x1_ASAP7_75t_R \U$623 (
- .A1(b_registered[9]),
- .A2(\sel_0$1365 ),
- .B1(b_registered[10]),
- .B2(\sel_1$1366 ),
- .Y(\t$2019 )
- );
- XOR2x1_ASAP7_75t_R \U$624 (
- .A(\t$2019 ),
- .B(a_registered[3]),
- .Y(booth_b2_m10)
- );
- AO22x1_ASAP7_75t_R \U$625 (
- .A1(b_registered[10]),
- .A2(\sel_0$1365 ),
- .B1(b_registered[11]),
- .B2(\sel_1$1366 ),
- .Y(\t$2020 )
- );
- XOR2x1_ASAP7_75t_R \U$626 (
- .A(\t$2020 ),
- .B(a_registered[3]),
- .Y(booth_b2_m11)
- );
- AO22x1_ASAP7_75t_R \U$627 (
- .A1(b_registered[11]),
- .A2(\sel_0$1365 ),
- .B1(b_registered[12]),
- .B2(\sel_1$1366 ),
- .Y(\t$2021 )
- );
- XOR2x1_ASAP7_75t_R \U$628 (
- .A(\t$2021 ),
- .B(a_registered[3]),
- .Y(booth_b2_m12)
- );
- AO22x1_ASAP7_75t_R \U$629 (
- .A1(b_registered[12]),
- .A2(\sel_0$1365 ),
- .B1(b_registered[13]),
- .B2(\sel_1$1366 ),
- .Y(\t$2022 )
- );
- XOR2x1_ASAP7_75t_R \U$630 (
- .A(\t$2022 ),
- .B(a_registered[3]),
- .Y(booth_b2_m13)
- );
- AO22x1_ASAP7_75t_R \U$631 (
- .A1(b_registered[13]),
- .A2(\sel_0$1365 ),
- .B1(b_registered[14]),
- .B2(\sel_1$1366 ),
- .Y(\t$2023 )
- );
- XOR2x1_ASAP7_75t_R \U$632 (
- .A(\t$2023 ),
- .B(a_registered[3]),
- .Y(booth_b2_m14)
- );
- AO22x1_ASAP7_75t_R \U$633 (
- .A1(b_registered[14]),
- .A2(\sel_0$1365 ),
- .B1(b_registered[15]),
- .B2(\sel_1$1366 ),
- .Y(\t$2024 )
- );
- XOR2x1_ASAP7_75t_R \U$634 (
- .A(\t$2024 ),
- .B(a_registered[3]),
- .Y(booth_b2_m15)
- );
- AO22x1_ASAP7_75t_R \U$635 (
- .A1(b_registered[15]),
- .A2(\sel_0$1365 ),
- .B1(b_registered[16]),
- .B2(\sel_1$1366 ),
- .Y(\t$2025 )
- );
- XOR2x1_ASAP7_75t_R \U$636 (
- .A(\t$2025 ),
- .B(a_registered[3]),
- .Y(booth_b2_m16)
- );
- AO22x1_ASAP7_75t_R \U$637 (
- .A1(b_registered[16]),
- .A2(\sel_0$1365 ),
- .B1(b_registered[17]),
- .B2(\sel_1$1366 ),
- .Y(\t$2026 )
- );
- XOR2x1_ASAP7_75t_R \U$638 (
- .A(\t$2026 ),
- .B(a_registered[3]),
- .Y(booth_b2_m17)
- );
- AO22x1_ASAP7_75t_R \U$639 (
- .A1(b_registered[17]),
- .A2(\sel_0$1365 ),
- .B1(b_registered[18]),
- .B2(\sel_1$1366 ),
- .Y(\t$2027 )
- );
- XOR2x1_ASAP7_75t_R \U$640 (
- .A(\t$2027 ),
- .B(a_registered[3]),
- .Y(booth_b2_m18)
- );
- AO22x1_ASAP7_75t_R \U$641 (
- .A1(b_registered[18]),
- .A2(\sel_0$1365 ),
- .B1(b_registered[19]),
- .B2(\sel_1$1366 ),
- .Y(\t$2028 )
- );
- XOR2x1_ASAP7_75t_R \U$642 (
- .A(\t$2028 ),
- .B(a_registered[3]),
- .Y(booth_b2_m19)
- );
- AO22x1_ASAP7_75t_R \U$643 (
- .A1(b_registered[19]),
- .A2(\sel_0$1365 ),
- .B1(b_registered[20]),
- .B2(\sel_1$1366 ),
- .Y(\t$2029 )
- );
- XOR2x1_ASAP7_75t_R \U$644 (
- .A(\t$2029 ),
- .B(a_registered[3]),
- .Y(booth_b2_m20)
- );
- AO22x1_ASAP7_75t_R \U$645 (
- .A1(b_registered[20]),
- .A2(\sel_0$1365 ),
- .B1(b_registered[21]),
- .B2(\sel_1$1366 ),
- .Y(\t$2030 )
- );
- XOR2x1_ASAP7_75t_R \U$646 (
- .A(\t$2030 ),
- .B(a_registered[3]),
- .Y(booth_b2_m21)
- );
- AO22x1_ASAP7_75t_R \U$647 (
- .A1(b_registered[21]),
- .A2(\sel_0$1365 ),
- .B1(b_registered[22]),
- .B2(\sel_1$1366 ),
- .Y(\t$2031 )
- );
- XOR2x1_ASAP7_75t_R \U$648 (
- .A(\t$2031 ),
- .B(a_registered[3]),
- .Y(booth_b2_m22)
- );
- AO22x1_ASAP7_75t_R \U$649 (
- .A1(b_registered[22]),
- .A2(\sel_0$1365 ),
- .B1(b_registered[23]),
- .B2(\sel_1$1366 ),
- .Y(\t$2032 )
- );
- XOR2x1_ASAP7_75t_R \U$650 (
- .A(\t$2032 ),
- .B(a_registered[3]),
- .Y(booth_b2_m23)
- );
- AO22x1_ASAP7_75t_R \U$651 (
- .A1(b_registered[23]),
- .A2(\sel_0$1365 ),
- .B1(b_registered[24]),
- .B2(\sel_1$1366 ),
- .Y(\t$2033 )
- );
- XOR2x1_ASAP7_75t_R \U$652 (
- .A(\t$2033 ),
- .B(a_registered[3]),
- .Y(booth_b2_m24)
- );
- AO22x1_ASAP7_75t_R \U$653 (
- .A1(b_registered[24]),
- .A2(\sel_0$1365 ),
- .B1(b_registered[25]),
- .B2(\sel_1$1366 ),
- .Y(\t$2034 )
- );
- XOR2x1_ASAP7_75t_R \U$654 (
- .A(\t$2034 ),
- .B(a_registered[3]),
- .Y(booth_b2_m25)
- );
- AO22x1_ASAP7_75t_R \U$655 (
- .A1(b_registered[25]),
- .A2(\sel_0$1365 ),
- .B1(b_registered[26]),
- .B2(\sel_1$1366 ),
- .Y(\t$2035 )
- );
- XOR2x1_ASAP7_75t_R \U$656 (
- .A(\t$2035 ),
- .B(a_registered[3]),
- .Y(booth_b2_m26)
- );
- AO22x1_ASAP7_75t_R \U$657 (
- .A1(b_registered[26]),
- .A2(\sel_0$1365 ),
- .B1(b_registered[27]),
- .B2(\sel_1$1366 ),
- .Y(\t$2036 )
- );
- XOR2x1_ASAP7_75t_R \U$658 (
- .A(\t$2036 ),
- .B(a_registered[3]),
- .Y(booth_b2_m27)
- );
- AO22x1_ASAP7_75t_R \U$659 (
- .A1(b_registered[27]),
- .A2(\sel_0$1365 ),
- .B1(b_registered[28]),
- .B2(\sel_1$1366 ),
- .Y(\t$2037 )
- );
- XOR2x1_ASAP7_75t_R \U$660 (
- .A(\t$2037 ),
- .B(a_registered[3]),
- .Y(booth_b2_m28)
- );
- AO22x1_ASAP7_75t_R \U$661 (
- .A1(b_registered[28]),
- .A2(\sel_0$1365 ),
- .B1(b_registered[29]),
- .B2(\sel_1$1366 ),
- .Y(\t$2038 )
- );
- XOR2x1_ASAP7_75t_R \U$662 (
- .A(\t$2038 ),
- .B(a_registered[3]),
- .Y(booth_b2_m29)
- );
- AO22x1_ASAP7_75t_R \U$663 (
- .A1(b_registered[29]),
- .A2(\sel_0$1365 ),
- .B1(b_registered[30]),
- .B2(\sel_1$1366 ),
- .Y(\t$2039 )
- );
- XOR2x1_ASAP7_75t_R \U$664 (
- .A(\t$2039 ),
- .B(a_registered[3]),
- .Y(booth_b2_m30)
- );
- AO22x1_ASAP7_75t_R \U$665 (
- .A1(b_registered[30]),
- .A2(\sel_0$1365 ),
- .B1(b_registered[31]),
- .B2(\sel_1$1366 ),
- .Y(\t$2040 )
- );
- XOR2x1_ASAP7_75t_R \U$666 (
- .A(\t$2040 ),
- .B(a_registered[3]),
- .Y(booth_b2_m31)
- );
- AO22x1_ASAP7_75t_R \U$667 (
- .A1(b_registered[31]),
- .A2(\sel_0$1365 ),
- .B1(1'h0),
- .B2(\sel_1$1366 ),
- .Y(\t$2041 )
- );
- XOR2x1_ASAP7_75t_R \U$668 (
- .A(\t$2041 ),
- .B(a_registered[3]),
- .Y(booth_b2_m32)
- );
- INVx1_ASAP7_75t_R \U$669 (
- .A(a_registered[3]),
- .Y(\notsign$686 )
- );
- INVx1_ASAP7_75t_R \U$670 (
- .A(a_registered[3]),
- .Y(\$7 )
- );
- INVx1_ASAP7_75t_R \U$671 (
- .A(a_registered[4]),
- .Y(\$8 )
- );
- INVx1_ASAP7_75t_R \U$672 (
- .A(a_registered[5]),
- .Y(\$9 )
- );
- AO33x2_ASAP7_75t_R \U$673 (
- .A1(\$9 ),
- .A2(a_registered[4]),
- .A3(a_registered[3]),
- .B1(a_registered[5]),
- .B2(\$8 ),
- .B3(\$7 ),
- .Y(\sel_0$1402 )
- );
- XOR2x1_ASAP7_75t_R \U$674 (
- .A(a_registered[4]),
- .B(a_registered[3]),
- .Y(\sel_1$1403 )
- );
- AO22x1_ASAP7_75t_R \U$675 (
- .A1(1'h0),
- .A2(\sel_0$1402 ),
- .B1(b_registered[0]),
- .B2(\sel_1$1403 ),
- .Y(\t$2043 )
- );
- XOR2x1_ASAP7_75t_R \U$676 (
- .A(\t$2043 ),
- .B(a_registered[5]),
- .Y(booth_b4_m0)
- );
- AO22x1_ASAP7_75t_R \U$677 (
- .A1(b_registered[0]),
- .A2(\sel_0$1402 ),
- .B1(b_registered[1]),
- .B2(\sel_1$1403 ),
- .Y(\t$2044 )
- );
- XOR2x1_ASAP7_75t_R \U$678 (
- .A(\t$2044 ),
- .B(a_registered[5]),
- .Y(booth_b4_m1)
- );
- AO22x1_ASAP7_75t_R \U$679 (
- .A1(b_registered[1]),
- .A2(\sel_0$1402 ),
- .B1(b_registered[2]),
- .B2(\sel_1$1403 ),
- .Y(\t$2045 )
- );
- XOR2x1_ASAP7_75t_R \U$680 (
- .A(\t$2045 ),
- .B(a_registered[5]),
- .Y(booth_b4_m2)
- );
- AO22x1_ASAP7_75t_R \U$681 (
- .A1(b_registered[2]),
- .A2(\sel_0$1402 ),
- .B1(b_registered[3]),
- .B2(\sel_1$1403 ),
- .Y(\t$2046 )
- );
- XOR2x1_ASAP7_75t_R \U$682 (
- .A(\t$2046 ),
- .B(a_registered[5]),
- .Y(booth_b4_m3)
- );
- AO22x1_ASAP7_75t_R \U$683 (
- .A1(b_registered[3]),
- .A2(\sel_0$1402 ),
- .B1(b_registered[4]),
- .B2(\sel_1$1403 ),
- .Y(\t$2047 )
- );
- XOR2x1_ASAP7_75t_R \U$684 (
- .A(\t$2047 ),
- .B(a_registered[5]),
- .Y(booth_b4_m4)
- );
- AO22x1_ASAP7_75t_R \U$685 (
- .A1(b_registered[4]),
- .A2(\sel_0$1402 ),
- .B1(b_registered[5]),
- .B2(\sel_1$1403 ),
- .Y(\t$2048 )
- );
- XOR2x1_ASAP7_75t_R \U$686 (
- .A(\t$2048 ),
- .B(a_registered[5]),
- .Y(booth_b4_m5)
- );
- AO22x1_ASAP7_75t_R \U$687 (
- .A1(b_registered[5]),
- .A2(\sel_0$1402 ),
- .B1(b_registered[6]),
- .B2(\sel_1$1403 ),
- .Y(\t$2049 )
- );
- XOR2x1_ASAP7_75t_R \U$688 (
- .A(\t$2049 ),
- .B(a_registered[5]),
- .Y(booth_b4_m6)
- );
- AO22x1_ASAP7_75t_R \U$689 (
- .A1(b_registered[6]),
- .A2(\sel_0$1402 ),
- .B1(b_registered[7]),
- .B2(\sel_1$1403 ),
- .Y(\t$2050 )
- );
- XOR2x1_ASAP7_75t_R \U$690 (
- .A(\t$2050 ),
- .B(a_registered[5]),
- .Y(booth_b4_m7)
- );
- AO22x1_ASAP7_75t_R \U$691 (
- .A1(b_registered[7]),
- .A2(\sel_0$1402 ),
- .B1(b_registered[8]),
- .B2(\sel_1$1403 ),
- .Y(\t$2051 )
- );
- XOR2x1_ASAP7_75t_R \U$692 (
- .A(\t$2051 ),
- .B(a_registered[5]),
- .Y(booth_b4_m8)
- );
- AO22x1_ASAP7_75t_R \U$693 (
- .A1(b_registered[8]),
- .A2(\sel_0$1402 ),
- .B1(b_registered[9]),
- .B2(\sel_1$1403 ),
- .Y(\t$2052 )
- );
- XOR2x1_ASAP7_75t_R \U$694 (
- .A(\t$2052 ),
- .B(a_registered[5]),
- .Y(booth_b4_m9)
- );
- AO22x1_ASAP7_75t_R \U$695 (
- .A1(b_registered[9]),
- .A2(\sel_0$1402 ),
- .B1(b_registered[10]),
- .B2(\sel_1$1403 ),
- .Y(\t$2053 )
- );
- XOR2x1_ASAP7_75t_R \U$696 (
- .A(\t$2053 ),
- .B(a_registered[5]),
- .Y(booth_b4_m10)
- );
- AO22x1_ASAP7_75t_R \U$697 (
- .A1(b_registered[10]),
- .A2(\sel_0$1402 ),
- .B1(b_registered[11]),
- .B2(\sel_1$1403 ),
- .Y(\t$2054 )
- );
- XOR2x1_ASAP7_75t_R \U$698 (
- .A(\t$2054 ),
- .B(a_registered[5]),
- .Y(booth_b4_m11)
- );
- AO22x1_ASAP7_75t_R \U$699 (
- .A1(b_registered[11]),
- .A2(\sel_0$1402 ),
- .B1(b_registered[12]),
- .B2(\sel_1$1403 ),
- .Y(\t$2055 )
- );
- XOR2x1_ASAP7_75t_R \U$700 (
- .A(\t$2055 ),
- .B(a_registered[5]),
- .Y(booth_b4_m12)
- );
- AO22x1_ASAP7_75t_R \U$701 (
- .A1(b_registered[12]),
- .A2(\sel_0$1402 ),
- .B1(b_registered[13]),
- .B2(\sel_1$1403 ),
- .Y(\t$2056 )
- );
- XOR2x1_ASAP7_75t_R \U$702 (
- .A(\t$2056 ),
- .B(a_registered[5]),
- .Y(booth_b4_m13)
- );
- AO22x1_ASAP7_75t_R \U$703 (
- .A1(b_registered[13]),
- .A2(\sel_0$1402 ),
- .B1(b_registered[14]),
- .B2(\sel_1$1403 ),
- .Y(\t$2057 )
- );
- XOR2x1_ASAP7_75t_R \U$704 (
- .A(\t$2057 ),
- .B(a_registered[5]),
- .Y(booth_b4_m14)
- );
- AO22x1_ASAP7_75t_R \U$705 (
- .A1(b_registered[14]),
- .A2(\sel_0$1402 ),
- .B1(b_registered[15]),
- .B2(\sel_1$1403 ),
- .Y(\t$2058 )
- );
- XOR2x1_ASAP7_75t_R \U$706 (
- .A(\t$2058 ),
- .B(a_registered[5]),
- .Y(booth_b4_m15)
- );
- AO22x1_ASAP7_75t_R \U$707 (
- .A1(b_registered[15]),
- .A2(\sel_0$1402 ),
- .B1(b_registered[16]),
- .B2(\sel_1$1403 ),
- .Y(\t$2059 )
- );
- XOR2x1_ASAP7_75t_R \U$708 (
- .A(\t$2059 ),
- .B(a_registered[5]),
- .Y(booth_b4_m16)
- );
- AO22x1_ASAP7_75t_R \U$709 (
- .A1(b_registered[16]),
- .A2(\sel_0$1402 ),
- .B1(b_registered[17]),
- .B2(\sel_1$1403 ),
- .Y(\t$2060 )
- );
- XOR2x1_ASAP7_75t_R \U$710 (
- .A(\t$2060 ),
- .B(a_registered[5]),
- .Y(booth_b4_m17)
- );
- AO22x1_ASAP7_75t_R \U$711 (
- .A1(b_registered[17]),
- .A2(\sel_0$1402 ),
- .B1(b_registered[18]),
- .B2(\sel_1$1403 ),
- .Y(\t$2061 )
- );
- XOR2x1_ASAP7_75t_R \U$712 (
- .A(\t$2061 ),
- .B(a_registered[5]),
- .Y(booth_b4_m18)
- );
- AO22x1_ASAP7_75t_R \U$713 (
- .A1(b_registered[18]),
- .A2(\sel_0$1402 ),
- .B1(b_registered[19]),
- .B2(\sel_1$1403 ),
- .Y(\t$2062 )
- );
- XOR2x1_ASAP7_75t_R \U$714 (
- .A(\t$2062 ),
- .B(a_registered[5]),
- .Y(booth_b4_m19)
- );
- AO22x1_ASAP7_75t_R \U$715 (
- .A1(b_registered[19]),
- .A2(\sel_0$1402 ),
- .B1(b_registered[20]),
- .B2(\sel_1$1403 ),
- .Y(\t$2063 )
- );
- XOR2x1_ASAP7_75t_R \U$716 (
- .A(\t$2063 ),
- .B(a_registered[5]),
- .Y(booth_b4_m20)
- );
- AO22x1_ASAP7_75t_R \U$717 (
- .A1(b_registered[20]),
- .A2(\sel_0$1402 ),
- .B1(b_registered[21]),
- .B2(\sel_1$1403 ),
- .Y(\t$2064 )
- );
- XOR2x1_ASAP7_75t_R \U$718 (
- .A(\t$2064 ),
- .B(a_registered[5]),
- .Y(booth_b4_m21)
- );
- AO22x1_ASAP7_75t_R \U$719 (
- .A1(b_registered[21]),
- .A2(\sel_0$1402 ),
- .B1(b_registered[22]),
- .B2(\sel_1$1403 ),
- .Y(\t$2065 )
- );
- XOR2x1_ASAP7_75t_R \U$720 (
- .A(\t$2065 ),
- .B(a_registered[5]),
- .Y(booth_b4_m22)
- );
- AO22x1_ASAP7_75t_R \U$721 (
- .A1(b_registered[22]),
- .A2(\sel_0$1402 ),
- .B1(b_registered[23]),
- .B2(\sel_1$1403 ),
- .Y(\t$2066 )
- );
- XOR2x1_ASAP7_75t_R \U$722 (
- .A(\t$2066 ),
- .B(a_registered[5]),
- .Y(booth_b4_m23)
- );
- AO22x1_ASAP7_75t_R \U$723 (
- .A1(b_registered[23]),
- .A2(\sel_0$1402 ),
- .B1(b_registered[24]),
- .B2(\sel_1$1403 ),
- .Y(\t$2067 )
- );
- XOR2x1_ASAP7_75t_R \U$724 (
- .A(\t$2067 ),
- .B(a_registered[5]),
- .Y(booth_b4_m24)
- );
- AO22x1_ASAP7_75t_R \U$725 (
- .A1(b_registered[24]),
- .A2(\sel_0$1402 ),
- .B1(b_registered[25]),
- .B2(\sel_1$1403 ),
- .Y(\t$2068 )
- );
- XOR2x1_ASAP7_75t_R \U$726 (
- .A(\t$2068 ),
- .B(a_registered[5]),
- .Y(booth_b4_m25)
- );
- AO22x1_ASAP7_75t_R \U$727 (
- .A1(b_registered[25]),
- .A2(\sel_0$1402 ),
- .B1(b_registered[26]),
- .B2(\sel_1$1403 ),
- .Y(\t$2069 )
- );
- XOR2x1_ASAP7_75t_R \U$728 (
- .A(\t$2069 ),
- .B(a_registered[5]),
- .Y(booth_b4_m26)
- );
- AO22x1_ASAP7_75t_R \U$729 (
- .A1(b_registered[26]),
- .A2(\sel_0$1402 ),
- .B1(b_registered[27]),
- .B2(\sel_1$1403 ),
- .Y(\t$2070 )
- );
- XOR2x1_ASAP7_75t_R \U$730 (
- .A(\t$2070 ),
- .B(a_registered[5]),
- .Y(booth_b4_m27)
- );
- AO22x1_ASAP7_75t_R \U$731 (
- .A1(b_registered[27]),
- .A2(\sel_0$1402 ),
- .B1(b_registered[28]),
- .B2(\sel_1$1403 ),
- .Y(\t$2071 )
- );
- XOR2x1_ASAP7_75t_R \U$732 (
- .A(\t$2071 ),
- .B(a_registered[5]),
- .Y(booth_b4_m28)
- );
- AO22x1_ASAP7_75t_R \U$733 (
- .A1(b_registered[28]),
- .A2(\sel_0$1402 ),
- .B1(b_registered[29]),
- .B2(\sel_1$1403 ),
- .Y(\t$2072 )
- );
- XOR2x1_ASAP7_75t_R \U$734 (
- .A(\t$2072 ),
- .B(a_registered[5]),
- .Y(booth_b4_m29)
- );
- AO22x1_ASAP7_75t_R \U$735 (
- .A1(b_registered[29]),
- .A2(\sel_0$1402 ),
- .B1(b_registered[30]),
- .B2(\sel_1$1403 ),
- .Y(\t$2073 )
- );
- XOR2x1_ASAP7_75t_R \U$736 (
- .A(\t$2073 ),
- .B(a_registered[5]),
- .Y(booth_b4_m30)
- );
- AO22x1_ASAP7_75t_R \U$737 (
- .A1(b_registered[30]),
- .A2(\sel_0$1402 ),
- .B1(b_registered[31]),
- .B2(\sel_1$1403 ),
- .Y(\t$2074 )
- );
- XOR2x1_ASAP7_75t_R \U$738 (
- .A(\t$2074 ),
- .B(a_registered[5]),
- .Y(booth_b4_m31)
- );
- AO22x1_ASAP7_75t_R \U$739 (
- .A1(b_registered[31]),
- .A2(\sel_0$1402 ),
- .B1(1'h0),
- .B2(\sel_1$1403 ),
- .Y(\t$2075 )
- );
- XOR2x1_ASAP7_75t_R \U$740 (
- .A(\t$2075 ),
- .B(a_registered[5]),
- .Y(booth_b4_m32)
- );
- INVx1_ASAP7_75t_R \U$741 (
- .A(a_registered[5]),
- .Y(\notsign$748 )
- );
- INVx1_ASAP7_75t_R \U$742 (
- .A(a_registered[5]),
- .Y(\$10 )
- );
- INVx1_ASAP7_75t_R \U$743 (
- .A(a_registered[6]),
- .Y(\$11 )
- );
- INVx1_ASAP7_75t_R \U$744 (
- .A(a_registered[7]),
- .Y(\$12 )
- );
- AO33x2_ASAP7_75t_R \U$745 (
- .A1(\$12 ),
- .A2(a_registered[6]),
- .A3(a_registered[5]),
- .B1(a_registered[7]),
- .B2(\$11 ),
- .B3(\$10 ),
- .Y(\sel_0$1439 )
- );
- XOR2x1_ASAP7_75t_R \U$746 (
- .A(a_registered[6]),
- .B(a_registered[5]),
- .Y(\sel_1$1440 )
- );
- AO22x1_ASAP7_75t_R \U$747 (
- .A1(1'h0),
- .A2(\sel_0$1439 ),
- .B1(b_registered[0]),
- .B2(\sel_1$1440 ),
- .Y(\t$2077 )
- );
- XOR2x1_ASAP7_75t_R \U$748 (
- .A(\t$2077 ),
- .B(a_registered[7]),
- .Y(booth_b6_m0)
- );
- AO22x1_ASAP7_75t_R \U$749 (
- .A1(b_registered[0]),
- .A2(\sel_0$1439 ),
- .B1(b_registered[1]),
- .B2(\sel_1$1440 ),
- .Y(\t$2078 )
- );
- XOR2x1_ASAP7_75t_R \U$750 (
- .A(\t$2078 ),
- .B(a_registered[7]),
- .Y(booth_b6_m1)
- );
- AO22x1_ASAP7_75t_R \U$751 (
- .A1(b_registered[1]),
- .A2(\sel_0$1439 ),
- .B1(b_registered[2]),
- .B2(\sel_1$1440 ),
- .Y(\t$2079 )
- );
- XOR2x1_ASAP7_75t_R \U$752 (
- .A(\t$2079 ),
- .B(a_registered[7]),
- .Y(booth_b6_m2)
- );
- AO22x1_ASAP7_75t_R \U$753 (
- .A1(b_registered[2]),
- .A2(\sel_0$1439 ),
- .B1(b_registered[3]),
- .B2(\sel_1$1440 ),
- .Y(\t$2080 )
- );
- XOR2x1_ASAP7_75t_R \U$754 (
- .A(\t$2080 ),
- .B(a_registered[7]),
- .Y(booth_b6_m3)
- );
- AO22x1_ASAP7_75t_R \U$755 (
- .A1(b_registered[3]),
- .A2(\sel_0$1439 ),
- .B1(b_registered[4]),
- .B2(\sel_1$1440 ),
- .Y(\t$2081 )
- );
- XOR2x1_ASAP7_75t_R \U$756 (
- .A(\t$2081 ),
- .B(a_registered[7]),
- .Y(booth_b6_m4)
- );
- AO22x1_ASAP7_75t_R \U$757 (
- .A1(b_registered[4]),
- .A2(\sel_0$1439 ),
- .B1(b_registered[5]),
- .B2(\sel_1$1440 ),
- .Y(\t$2082 )
- );
- XOR2x1_ASAP7_75t_R \U$758 (
- .A(\t$2082 ),
- .B(a_registered[7]),
- .Y(booth_b6_m5)
- );
- AO22x1_ASAP7_75t_R \U$759 (
- .A1(b_registered[5]),
- .A2(\sel_0$1439 ),
- .B1(b_registered[6]),
- .B2(\sel_1$1440 ),
- .Y(\t$2083 )
- );
- XOR2x1_ASAP7_75t_R \U$760 (
- .A(\t$2083 ),
- .B(a_registered[7]),
- .Y(booth_b6_m6)
- );
- AO22x1_ASAP7_75t_R \U$761 (
- .A1(b_registered[6]),
- .A2(\sel_0$1439 ),
- .B1(b_registered[7]),
- .B2(\sel_1$1440 ),
- .Y(\t$2084 )
- );
- XOR2x1_ASAP7_75t_R \U$762 (
- .A(\t$2084 ),
- .B(a_registered[7]),
- .Y(booth_b6_m7)
- );
- AO22x1_ASAP7_75t_R \U$763 (
- .A1(b_registered[7]),
- .A2(\sel_0$1439 ),
- .B1(b_registered[8]),
- .B2(\sel_1$1440 ),
- .Y(\t$2085 )
- );
- XOR2x1_ASAP7_75t_R \U$764 (
- .A(\t$2085 ),
- .B(a_registered[7]),
- .Y(booth_b6_m8)
- );
- AO22x1_ASAP7_75t_R \U$765 (
- .A1(b_registered[8]),
- .A2(\sel_0$1439 ),
- .B1(b_registered[9]),
- .B2(\sel_1$1440 ),
- .Y(\t$2086 )
- );
- XOR2x1_ASAP7_75t_R \U$766 (
- .A(\t$2086 ),
- .B(a_registered[7]),
- .Y(booth_b6_m9)
- );
- AO22x1_ASAP7_75t_R \U$767 (
- .A1(b_registered[9]),
- .A2(\sel_0$1439 ),
- .B1(b_registered[10]),
- .B2(\sel_1$1440 ),
- .Y(\t$2087 )
- );
- XOR2x1_ASAP7_75t_R \U$768 (
- .A(\t$2087 ),
- .B(a_registered[7]),
- .Y(booth_b6_m10)
- );
- AO22x1_ASAP7_75t_R \U$769 (
- .A1(b_registered[10]),
- .A2(\sel_0$1439 ),
- .B1(b_registered[11]),
- .B2(\sel_1$1440 ),
- .Y(\t$2088 )
- );
- XOR2x1_ASAP7_75t_R \U$770 (
- .A(\t$2088 ),
- .B(a_registered[7]),
- .Y(booth_b6_m11)
- );
- AO22x1_ASAP7_75t_R \U$771 (
- .A1(b_registered[11]),
- .A2(\sel_0$1439 ),
- .B1(b_registered[12]),
- .B2(\sel_1$1440 ),
- .Y(\t$2089 )
- );
- XOR2x1_ASAP7_75t_R \U$772 (
- .A(\t$2089 ),
- .B(a_registered[7]),
- .Y(booth_b6_m12)
- );
- AO22x1_ASAP7_75t_R \U$773 (
- .A1(b_registered[12]),
- .A2(\sel_0$1439 ),
- .B1(b_registered[13]),
- .B2(\sel_1$1440 ),
- .Y(\t$2090 )
- );
- XOR2x1_ASAP7_75t_R \U$774 (
- .A(\t$2090 ),
- .B(a_registered[7]),
- .Y(booth_b6_m13)
- );
- AO22x1_ASAP7_75t_R \U$775 (
- .A1(b_registered[13]),
- .A2(\sel_0$1439 ),
- .B1(b_registered[14]),
- .B2(\sel_1$1440 ),
- .Y(\t$2091 )
- );
- XOR2x1_ASAP7_75t_R \U$776 (
- .A(\t$2091 ),
- .B(a_registered[7]),
- .Y(booth_b6_m14)
- );
- AO22x1_ASAP7_75t_R \U$777 (
- .A1(b_registered[14]),
- .A2(\sel_0$1439 ),
- .B1(b_registered[15]),
- .B2(\sel_1$1440 ),
- .Y(\t$2092 )
- );
- XOR2x1_ASAP7_75t_R \U$778 (
- .A(\t$2092 ),
- .B(a_registered[7]),
- .Y(booth_b6_m15)
- );
- AO22x1_ASAP7_75t_R \U$779 (
- .A1(b_registered[15]),
- .A2(\sel_0$1439 ),
- .B1(b_registered[16]),
- .B2(\sel_1$1440 ),
- .Y(\t$2093 )
- );
- XOR2x1_ASAP7_75t_R \U$780 (
- .A(\t$2093 ),
- .B(a_registered[7]),
- .Y(booth_b6_m16)
- );
- AO22x1_ASAP7_75t_R \U$781 (
- .A1(b_registered[16]),
- .A2(\sel_0$1439 ),
- .B1(b_registered[17]),
- .B2(\sel_1$1440 ),
- .Y(\t$2094 )
- );
- XOR2x1_ASAP7_75t_R \U$782 (
- .A(\t$2094 ),
- .B(a_registered[7]),
- .Y(booth_b6_m17)
- );
- AO22x1_ASAP7_75t_R \U$783 (
- .A1(b_registered[17]),
- .A2(\sel_0$1439 ),
- .B1(b_registered[18]),
- .B2(\sel_1$1440 ),
- .Y(\t$2095 )
- );
- XOR2x1_ASAP7_75t_R \U$784 (
- .A(\t$2095 ),
- .B(a_registered[7]),
- .Y(booth_b6_m18)
- );
- AO22x1_ASAP7_75t_R \U$785 (
- .A1(b_registered[18]),
- .A2(\sel_0$1439 ),
- .B1(b_registered[19]),
- .B2(\sel_1$1440 ),
- .Y(\t$2096 )
- );
- XOR2x1_ASAP7_75t_R \U$786 (
- .A(\t$2096 ),
- .B(a_registered[7]),
- .Y(booth_b6_m19)
- );
- AO22x1_ASAP7_75t_R \U$787 (
- .A1(b_registered[19]),
- .A2(\sel_0$1439 ),
- .B1(b_registered[20]),
- .B2(\sel_1$1440 ),
- .Y(\t$2097 )
- );
- XOR2x1_ASAP7_75t_R \U$788 (
- .A(\t$2097 ),
- .B(a_registered[7]),
- .Y(booth_b6_m20)
- );
- AO22x1_ASAP7_75t_R \U$789 (
- .A1(b_registered[20]),
- .A2(\sel_0$1439 ),
- .B1(b_registered[21]),
- .B2(\sel_1$1440 ),
- .Y(\t$2098 )
- );
- XOR2x1_ASAP7_75t_R \U$790 (
- .A(\t$2098 ),
- .B(a_registered[7]),
- .Y(booth_b6_m21)
- );
- AO22x1_ASAP7_75t_R \U$791 (
- .A1(b_registered[21]),
- .A2(\sel_0$1439 ),
- .B1(b_registered[22]),
- .B2(\sel_1$1440 ),
- .Y(\t$2099 )
- );
- XOR2x1_ASAP7_75t_R \U$792 (
- .A(\t$2099 ),
- .B(a_registered[7]),
- .Y(booth_b6_m22)
- );
- AO22x1_ASAP7_75t_R \U$793 (
- .A1(b_registered[22]),
- .A2(\sel_0$1439 ),
- .B1(b_registered[23]),
- .B2(\sel_1$1440 ),
- .Y(\t$2100 )
- );
- XOR2x1_ASAP7_75t_R \U$794 (
- .A(\t$2100 ),
- .B(a_registered[7]),
- .Y(booth_b6_m23)
- );
- AO22x1_ASAP7_75t_R \U$795 (
- .A1(b_registered[23]),
- .A2(\sel_0$1439 ),
- .B1(b_registered[24]),
- .B2(\sel_1$1440 ),
- .Y(\t$2101 )
- );
- XOR2x1_ASAP7_75t_R \U$796 (
- .A(\t$2101 ),
- .B(a_registered[7]),
- .Y(booth_b6_m24)
- );
- AO22x1_ASAP7_75t_R \U$797 (
- .A1(b_registered[24]),
- .A2(\sel_0$1439 ),
- .B1(b_registered[25]),
- .B2(\sel_1$1440 ),
- .Y(\t$2102 )
- );
- XOR2x1_ASAP7_75t_R \U$798 (
- .A(\t$2102 ),
- .B(a_registered[7]),
- .Y(booth_b6_m25)
- );
- AO22x1_ASAP7_75t_R \U$799 (
- .A1(b_registered[25]),
- .A2(\sel_0$1439 ),
- .B1(b_registered[26]),
- .B2(\sel_1$1440 ),
- .Y(\t$2103 )
- );
- XOR2x1_ASAP7_75t_R \U$800 (
- .A(\t$2103 ),
- .B(a_registered[7]),
- .Y(booth_b6_m26)
- );
- AO22x1_ASAP7_75t_R \U$801 (
- .A1(b_registered[26]),
- .A2(\sel_0$1439 ),
- .B1(b_registered[27]),
- .B2(\sel_1$1440 ),
- .Y(\t$2104 )
- );
- XOR2x1_ASAP7_75t_R \U$802 (
- .A(\t$2104 ),
- .B(a_registered[7]),
- .Y(booth_b6_m27)
- );
- AO22x1_ASAP7_75t_R \U$803 (
- .A1(b_registered[27]),
- .A2(\sel_0$1439 ),
- .B1(b_registered[28]),
- .B2(\sel_1$1440 ),
- .Y(\t$2105 )
- );
- XOR2x1_ASAP7_75t_R \U$804 (
- .A(\t$2105 ),
- .B(a_registered[7]),
- .Y(booth_b6_m28)
- );
- AO22x1_ASAP7_75t_R \U$805 (
- .A1(b_registered[28]),
- .A2(\sel_0$1439 ),
- .B1(b_registered[29]),
- .B2(\sel_1$1440 ),
- .Y(\t$2106 )
- );
- XOR2x1_ASAP7_75t_R \U$806 (
- .A(\t$2106 ),
- .B(a_registered[7]),
- .Y(booth_b6_m29)
- );
- AO22x1_ASAP7_75t_R \U$807 (
- .A1(b_registered[29]),
- .A2(\sel_0$1439 ),
- .B1(b_registered[30]),
- .B2(\sel_1$1440 ),
- .Y(\t$2107 )
- );
- XOR2x1_ASAP7_75t_R \U$808 (
- .A(\t$2107 ),
- .B(a_registered[7]),
- .Y(booth_b6_m30)
- );
- AO22x1_ASAP7_75t_R \U$809 (
- .A1(b_registered[30]),
- .A2(\sel_0$1439 ),
- .B1(b_registered[31]),
- .B2(\sel_1$1440 ),
- .Y(\t$2108 )
- );
- XOR2x1_ASAP7_75t_R \U$810 (
- .A(\t$2108 ),
- .B(a_registered[7]),
- .Y(booth_b6_m31)
- );
- AO22x1_ASAP7_75t_R \U$811 (
- .A1(b_registered[31]),
- .A2(\sel_0$1439 ),
- .B1(1'h0),
- .B2(\sel_1$1440 ),
- .Y(\t$2109 )
- );
- XOR2x1_ASAP7_75t_R \U$812 (
- .A(\t$2109 ),
- .B(a_registered[7]),
- .Y(booth_b6_m32)
- );
- INVx1_ASAP7_75t_R \U$813 (
- .A(a_registered[7]),
- .Y(\notsign$806 )
- );
- INVx1_ASAP7_75t_R \U$814 (
- .A(a_registered[7]),
- .Y(\$13 )
- );
- INVx1_ASAP7_75t_R \U$815 (
- .A(a_registered[8]),
- .Y(\$14 )
- );
- INVx1_ASAP7_75t_R \U$816 (
- .A(a_registered[9]),
- .Y(\$15 )
- );
- AO33x2_ASAP7_75t_R \U$817 (
- .A1(\$15 ),
- .A2(a_registered[8]),
- .A3(a_registered[7]),
- .B1(a_registered[9]),
- .B2(\$14 ),
- .B3(\$13 ),
- .Y(\sel_0$1476 )
- );
- XOR2x1_ASAP7_75t_R \U$818 (
- .A(a_registered[8]),
- .B(a_registered[7]),
- .Y(\sel_1$1477 )
- );
- AO22x1_ASAP7_75t_R \U$819 (
- .A1(1'h0),
- .A2(\sel_0$1476 ),
- .B1(b_registered[0]),
- .B2(\sel_1$1477 ),
- .Y(\t$2111 )
- );
- XOR2x1_ASAP7_75t_R \U$820 (
- .A(\t$2111 ),
- .B(a_registered[9]),
- .Y(booth_b8_m0)
- );
- AO22x1_ASAP7_75t_R \U$821 (
- .A1(b_registered[0]),
- .A2(\sel_0$1476 ),
- .B1(b_registered[1]),
- .B2(\sel_1$1477 ),
- .Y(\t$2112 )
- );
- XOR2x1_ASAP7_75t_R \U$822 (
- .A(\t$2112 ),
- .B(a_registered[9]),
- .Y(booth_b8_m1)
- );
- AO22x1_ASAP7_75t_R \U$823 (
- .A1(b_registered[1]),
- .A2(\sel_0$1476 ),
- .B1(b_registered[2]),
- .B2(\sel_1$1477 ),
- .Y(\t$2113 )
- );
- XOR2x1_ASAP7_75t_R \U$824 (
- .A(\t$2113 ),
- .B(a_registered[9]),
- .Y(booth_b8_m2)
- );
- AO22x1_ASAP7_75t_R \U$825 (
- .A1(b_registered[2]),
- .A2(\sel_0$1476 ),
- .B1(b_registered[3]),
- .B2(\sel_1$1477 ),
- .Y(\t$2114 )
- );
- XOR2x1_ASAP7_75t_R \U$826 (
- .A(\t$2114 ),
- .B(a_registered[9]),
- .Y(booth_b8_m3)
- );
- AO22x1_ASAP7_75t_R \U$827 (
- .A1(b_registered[3]),
- .A2(\sel_0$1476 ),
- .B1(b_registered[4]),
- .B2(\sel_1$1477 ),
- .Y(\t$2115 )
- );
- XOR2x1_ASAP7_75t_R \U$828 (
- .A(\t$2115 ),
- .B(a_registered[9]),
- .Y(booth_b8_m4)
- );
- AO22x1_ASAP7_75t_R \U$829 (
- .A1(b_registered[4]),
- .A2(\sel_0$1476 ),
- .B1(b_registered[5]),
- .B2(\sel_1$1477 ),
- .Y(\t$2116 )
- );
- XOR2x1_ASAP7_75t_R \U$830 (
- .A(\t$2116 ),
- .B(a_registered[9]),
- .Y(booth_b8_m5)
- );
- AO22x1_ASAP7_75t_R \U$831 (
- .A1(b_registered[5]),
- .A2(\sel_0$1476 ),
- .B1(b_registered[6]),
- .B2(\sel_1$1477 ),
- .Y(\t$2117 )
- );
- XOR2x1_ASAP7_75t_R \U$832 (
- .A(\t$2117 ),
- .B(a_registered[9]),
- .Y(booth_b8_m6)
- );
- AO22x1_ASAP7_75t_R \U$833 (
- .A1(b_registered[6]),
- .A2(\sel_0$1476 ),
- .B1(b_registered[7]),
- .B2(\sel_1$1477 ),
- .Y(\t$2118 )
- );
- XOR2x1_ASAP7_75t_R \U$834 (
- .A(\t$2118 ),
- .B(a_registered[9]),
- .Y(booth_b8_m7)
- );
- AO22x1_ASAP7_75t_R \U$835 (
- .A1(b_registered[7]),
- .A2(\sel_0$1476 ),
- .B1(b_registered[8]),
- .B2(\sel_1$1477 ),
- .Y(\t$2119 )
- );
- XOR2x1_ASAP7_75t_R \U$836 (
- .A(\t$2119 ),
- .B(a_registered[9]),
- .Y(booth_b8_m8)
- );
- AO22x1_ASAP7_75t_R \U$837 (
- .A1(b_registered[8]),
- .A2(\sel_0$1476 ),
- .B1(b_registered[9]),
- .B2(\sel_1$1477 ),
- .Y(\t$2120 )
- );
- XOR2x1_ASAP7_75t_R \U$838 (
- .A(\t$2120 ),
- .B(a_registered[9]),
- .Y(booth_b8_m9)
- );
- AO22x1_ASAP7_75t_R \U$839 (
- .A1(b_registered[9]),
- .A2(\sel_0$1476 ),
- .B1(b_registered[10]),
- .B2(\sel_1$1477 ),
- .Y(\t$2121 )
- );
- XOR2x1_ASAP7_75t_R \U$840 (
- .A(\t$2121 ),
- .B(a_registered[9]),
- .Y(booth_b8_m10)
- );
- AO22x1_ASAP7_75t_R \U$841 (
- .A1(b_registered[10]),
- .A2(\sel_0$1476 ),
- .B1(b_registered[11]),
- .B2(\sel_1$1477 ),
- .Y(\t$2122 )
- );
- XOR2x1_ASAP7_75t_R \U$842 (
- .A(\t$2122 ),
- .B(a_registered[9]),
- .Y(booth_b8_m11)
- );
- AO22x1_ASAP7_75t_R \U$843 (
- .A1(b_registered[11]),
- .A2(\sel_0$1476 ),
- .B1(b_registered[12]),
- .B2(\sel_1$1477 ),
- .Y(\t$2123 )
- );
- XOR2x1_ASAP7_75t_R \U$844 (
- .A(\t$2123 ),
- .B(a_registered[9]),
- .Y(booth_b8_m12)
- );
- AO22x1_ASAP7_75t_R \U$845 (
- .A1(b_registered[12]),
- .A2(\sel_0$1476 ),
- .B1(b_registered[13]),
- .B2(\sel_1$1477 ),
- .Y(\t$2124 )
- );
- XOR2x1_ASAP7_75t_R \U$846 (
- .A(\t$2124 ),
- .B(a_registered[9]),
- .Y(booth_b8_m13)
- );
- AO22x1_ASAP7_75t_R \U$847 (
- .A1(b_registered[13]),
- .A2(\sel_0$1476 ),
- .B1(b_registered[14]),
- .B2(\sel_1$1477 ),
- .Y(\t$2125 )
- );
- XOR2x1_ASAP7_75t_R \U$848 (
- .A(\t$2125 ),
- .B(a_registered[9]),
- .Y(booth_b8_m14)
- );
- AO22x1_ASAP7_75t_R \U$849 (
- .A1(b_registered[14]),
- .A2(\sel_0$1476 ),
- .B1(b_registered[15]),
- .B2(\sel_1$1477 ),
- .Y(\t$2126 )
- );
- XOR2x1_ASAP7_75t_R \U$850 (
- .A(\t$2126 ),
- .B(a_registered[9]),
- .Y(booth_b8_m15)
- );
- AO22x1_ASAP7_75t_R \U$851 (
- .A1(b_registered[15]),
- .A2(\sel_0$1476 ),
- .B1(b_registered[16]),
- .B2(\sel_1$1477 ),
- .Y(\t$2127 )
- );
- XOR2x1_ASAP7_75t_R \U$852 (
- .A(\t$2127 ),
- .B(a_registered[9]),
- .Y(booth_b8_m16)
- );
- AO22x1_ASAP7_75t_R \U$853 (
- .A1(b_registered[16]),
- .A2(\sel_0$1476 ),
- .B1(b_registered[17]),
- .B2(\sel_1$1477 ),
- .Y(\t$2128 )
- );
- XOR2x1_ASAP7_75t_R \U$854 (
- .A(\t$2128 ),
- .B(a_registered[9]),
- .Y(booth_b8_m17)
- );
- AO22x1_ASAP7_75t_R \U$855 (
- .A1(b_registered[17]),
- .A2(\sel_0$1476 ),
- .B1(b_registered[18]),
- .B2(\sel_1$1477 ),
- .Y(\t$2129 )
- );
- XOR2x1_ASAP7_75t_R \U$856 (
- .A(\t$2129 ),
- .B(a_registered[9]),
- .Y(booth_b8_m18)
- );
- AO22x1_ASAP7_75t_R \U$857 (
- .A1(b_registered[18]),
- .A2(\sel_0$1476 ),
- .B1(b_registered[19]),
- .B2(\sel_1$1477 ),
- .Y(\t$2130 )
- );
- XOR2x1_ASAP7_75t_R \U$858 (
- .A(\t$2130 ),
- .B(a_registered[9]),
- .Y(booth_b8_m19)
- );
- AO22x1_ASAP7_75t_R \U$859 (
- .A1(b_registered[19]),
- .A2(\sel_0$1476 ),
- .B1(b_registered[20]),
- .B2(\sel_1$1477 ),
- .Y(\t$2131 )
- );
- XOR2x1_ASAP7_75t_R \U$860 (
- .A(\t$2131 ),
- .B(a_registered[9]),
- .Y(booth_b8_m20)
- );
- AO22x1_ASAP7_75t_R \U$861 (
- .A1(b_registered[20]),
- .A2(\sel_0$1476 ),
- .B1(b_registered[21]),
- .B2(\sel_1$1477 ),
- .Y(\t$2132 )
- );
- XOR2x1_ASAP7_75t_R \U$862 (
- .A(\t$2132 ),
- .B(a_registered[9]),
- .Y(booth_b8_m21)
- );
- AO22x1_ASAP7_75t_R \U$863 (
- .A1(b_registered[21]),
- .A2(\sel_0$1476 ),
- .B1(b_registered[22]),
- .B2(\sel_1$1477 ),
- .Y(\t$2133 )
- );
- XOR2x1_ASAP7_75t_R \U$864 (
- .A(\t$2133 ),
- .B(a_registered[9]),
- .Y(booth_b8_m22)
- );
- AO22x1_ASAP7_75t_R \U$865 (
- .A1(b_registered[22]),
- .A2(\sel_0$1476 ),
- .B1(b_registered[23]),
- .B2(\sel_1$1477 ),
- .Y(\t$2134 )
- );
- XOR2x1_ASAP7_75t_R \U$866 (
- .A(\t$2134 ),
- .B(a_registered[9]),
- .Y(booth_b8_m23)
- );
- AO22x1_ASAP7_75t_R \U$867 (
- .A1(b_registered[23]),
- .A2(\sel_0$1476 ),
- .B1(b_registered[24]),
- .B2(\sel_1$1477 ),
- .Y(\t$2135 )
- );
- XOR2x1_ASAP7_75t_R \U$868 (
- .A(\t$2135 ),
- .B(a_registered[9]),
- .Y(booth_b8_m24)
- );
- AO22x1_ASAP7_75t_R \U$869 (
- .A1(b_registered[24]),
- .A2(\sel_0$1476 ),
- .B1(b_registered[25]),
- .B2(\sel_1$1477 ),
- .Y(\t$2136 )
- );
- XOR2x1_ASAP7_75t_R \U$870 (
- .A(\t$2136 ),
- .B(a_registered[9]),
- .Y(booth_b8_m25)
- );
- AO22x1_ASAP7_75t_R \U$871 (
- .A1(b_registered[25]),
- .A2(\sel_0$1476 ),
- .B1(b_registered[26]),
- .B2(\sel_1$1477 ),
- .Y(\t$2137 )
- );
- XOR2x1_ASAP7_75t_R \U$872 (
- .A(\t$2137 ),
- .B(a_registered[9]),
- .Y(booth_b8_m26)
- );
- AO22x1_ASAP7_75t_R \U$873 (
- .A1(b_registered[26]),
- .A2(\sel_0$1476 ),
- .B1(b_registered[27]),
- .B2(\sel_1$1477 ),
- .Y(\t$2138 )
- );
- XOR2x1_ASAP7_75t_R \U$874 (
- .A(\t$2138 ),
- .B(a_registered[9]),
- .Y(booth_b8_m27)
- );
- AO22x1_ASAP7_75t_R \U$875 (
- .A1(b_registered[27]),
- .A2(\sel_0$1476 ),
- .B1(b_registered[28]),
- .B2(\sel_1$1477 ),
- .Y(\t$2139 )
- );
- XOR2x1_ASAP7_75t_R \U$876 (
- .A(\t$2139 ),
- .B(a_registered[9]),
- .Y(booth_b8_m28)
- );
- AO22x1_ASAP7_75t_R \U$877 (
- .A1(b_registered[28]),
- .A2(\sel_0$1476 ),
- .B1(b_registered[29]),
- .B2(\sel_1$1477 ),
- .Y(\t$2140 )
- );
- XOR2x1_ASAP7_75t_R \U$878 (
- .A(\t$2140 ),
- .B(a_registered[9]),
- .Y(booth_b8_m29)
- );
- AO22x1_ASAP7_75t_R \U$879 (
- .A1(b_registered[29]),
- .A2(\sel_0$1476 ),
- .B1(b_registered[30]),
- .B2(\sel_1$1477 ),
- .Y(\t$2141 )
- );
- XOR2x1_ASAP7_75t_R \U$880 (
- .A(\t$2141 ),
- .B(a_registered[9]),
- .Y(booth_b8_m30)
- );
- AO22x1_ASAP7_75t_R \U$881 (
- .A1(b_registered[30]),
- .A2(\sel_0$1476 ),
- .B1(b_registered[31]),
- .B2(\sel_1$1477 ),
- .Y(\t$2142 )
- );
- XOR2x1_ASAP7_75t_R \U$882 (
- .A(\t$2142 ),
- .B(a_registered[9]),
- .Y(booth_b8_m31)
- );
- AO22x1_ASAP7_75t_R \U$883 (
- .A1(b_registered[31]),
- .A2(\sel_0$1476 ),
- .B1(1'h0),
- .B2(\sel_1$1477 ),
- .Y(\t$2143 )
- );
- XOR2x1_ASAP7_75t_R \U$884 (
- .A(\t$2143 ),
- .B(a_registered[9]),
- .Y(booth_b8_m32)
- );
- INVx1_ASAP7_75t_R \U$885 (
- .A(a_registered[9]),
- .Y(\notsign$860 )
- );
- INVx1_ASAP7_75t_R \U$886 (
- .A(a_registered[9]),
- .Y(\$16 )
- );
- INVx1_ASAP7_75t_R \U$887 (
- .A(a_registered[10]),
- .Y(\$17 )
- );
- INVx1_ASAP7_75t_R \U$888 (
- .A(a_registered[11]),
- .Y(\$18 )
- );
- AO33x2_ASAP7_75t_R \U$889 (
- .A1(\$18 ),
- .A2(a_registered[10]),
- .A3(a_registered[9]),
- .B1(a_registered[11]),
- .B2(\$17 ),
- .B3(\$16 ),
- .Y(\sel_0$1513 )
- );
- XOR2x1_ASAP7_75t_R \U$890 (
- .A(a_registered[10]),
- .B(a_registered[9]),
- .Y(\sel_1$1514 )
- );
- AO22x1_ASAP7_75t_R \U$891 (
- .A1(1'h0),
- .A2(\sel_0$1513 ),
- .B1(b_registered[0]),
- .B2(\sel_1$1514 ),
- .Y(\t$2145 )
- );
- XOR2x1_ASAP7_75t_R \U$892 (
- .A(\t$2145 ),
- .B(a_registered[11]),
- .Y(booth_b10_m0)
- );
- AO22x1_ASAP7_75t_R \U$893 (
- .A1(b_registered[0]),
- .A2(\sel_0$1513 ),
- .B1(b_registered[1]),
- .B2(\sel_1$1514 ),
- .Y(\t$2146 )
- );
- XOR2x1_ASAP7_75t_R \U$894 (
- .A(\t$2146 ),
- .B(a_registered[11]),
- .Y(booth_b10_m1)
- );
- AO22x1_ASAP7_75t_R \U$895 (
- .A1(b_registered[1]),
- .A2(\sel_0$1513 ),
- .B1(b_registered[2]),
- .B2(\sel_1$1514 ),
- .Y(\t$2147 )
- );
- XOR2x1_ASAP7_75t_R \U$896 (
- .A(\t$2147 ),
- .B(a_registered[11]),
- .Y(booth_b10_m2)
- );
- AO22x1_ASAP7_75t_R \U$897 (
- .A1(b_registered[2]),
- .A2(\sel_0$1513 ),
- .B1(b_registered[3]),
- .B2(\sel_1$1514 ),
- .Y(\t$2148 )
- );
- XOR2x1_ASAP7_75t_R \U$898 (
- .A(\t$2148 ),
- .B(a_registered[11]),
- .Y(booth_b10_m3)
- );
- AO22x1_ASAP7_75t_R \U$899 (
- .A1(b_registered[3]),
- .A2(\sel_0$1513 ),
- .B1(b_registered[4]),
- .B2(\sel_1$1514 ),
- .Y(\t$2149 )
- );
- XOR2x1_ASAP7_75t_R \U$900 (
- .A(\t$2149 ),
- .B(a_registered[11]),
- .Y(booth_b10_m4)
- );
- AO22x1_ASAP7_75t_R \U$901 (
- .A1(b_registered[4]),
- .A2(\sel_0$1513 ),
- .B1(b_registered[5]),
- .B2(\sel_1$1514 ),
- .Y(\t$2150 )
- );
- XOR2x1_ASAP7_75t_R \U$902 (
- .A(\t$2150 ),
- .B(a_registered[11]),
- .Y(booth_b10_m5)
- );
- AO22x1_ASAP7_75t_R \U$903 (
- .A1(b_registered[5]),
- .A2(\sel_0$1513 ),
- .B1(b_registered[6]),
- .B2(\sel_1$1514 ),
- .Y(\t$2151 )
- );
- XOR2x1_ASAP7_75t_R \U$904 (
- .A(\t$2151 ),
- .B(a_registered[11]),
- .Y(booth_b10_m6)
- );
- AO22x1_ASAP7_75t_R \U$905 (
- .A1(b_registered[6]),
- .A2(\sel_0$1513 ),
- .B1(b_registered[7]),
- .B2(\sel_1$1514 ),
- .Y(\t$2152 )
- );
- XOR2x1_ASAP7_75t_R \U$906 (
- .A(\t$2152 ),
- .B(a_registered[11]),
- .Y(booth_b10_m7)
- );
- AO22x1_ASAP7_75t_R \U$907 (
- .A1(b_registered[7]),
- .A2(\sel_0$1513 ),
- .B1(b_registered[8]),
- .B2(\sel_1$1514 ),
- .Y(\t$2153 )
- );
- XOR2x1_ASAP7_75t_R \U$908 (
- .A(\t$2153 ),
- .B(a_registered[11]),
- .Y(booth_b10_m8)
- );
- AO22x1_ASAP7_75t_R \U$909 (
- .A1(b_registered[8]),
- .A2(\sel_0$1513 ),
- .B1(b_registered[9]),
- .B2(\sel_1$1514 ),
- .Y(\t$2154 )
- );
- XOR2x1_ASAP7_75t_R \U$910 (
- .A(\t$2154 ),
- .B(a_registered[11]),
- .Y(booth_b10_m9)
- );
- AO22x1_ASAP7_75t_R \U$911 (
- .A1(b_registered[9]),
- .A2(\sel_0$1513 ),
- .B1(b_registered[10]),
- .B2(\sel_1$1514 ),
- .Y(\t$2155 )
- );
- XOR2x1_ASAP7_75t_R \U$912 (
- .A(\t$2155 ),
- .B(a_registered[11]),
- .Y(booth_b10_m10)
- );
- AO22x1_ASAP7_75t_R \U$913 (
- .A1(b_registered[10]),
- .A2(\sel_0$1513 ),
- .B1(b_registered[11]),
- .B2(\sel_1$1514 ),
- .Y(\t$2156 )
- );
- XOR2x1_ASAP7_75t_R \U$914 (
- .A(\t$2156 ),
- .B(a_registered[11]),
- .Y(booth_b10_m11)
- );
- AO22x1_ASAP7_75t_R \U$915 (
- .A1(b_registered[11]),
- .A2(\sel_0$1513 ),
- .B1(b_registered[12]),
- .B2(\sel_1$1514 ),
- .Y(\t$2157 )
- );
- XOR2x1_ASAP7_75t_R \U$916 (
- .A(\t$2157 ),
- .B(a_registered[11]),
- .Y(booth_b10_m12)
- );
- AO22x1_ASAP7_75t_R \U$917 (
- .A1(b_registered[12]),
- .A2(\sel_0$1513 ),
- .B1(b_registered[13]),
- .B2(\sel_1$1514 ),
- .Y(\t$2158 )
- );
- XOR2x1_ASAP7_75t_R \U$918 (
- .A(\t$2158 ),
- .B(a_registered[11]),
- .Y(booth_b10_m13)
- );
- AO22x1_ASAP7_75t_R \U$919 (
- .A1(b_registered[13]),
- .A2(\sel_0$1513 ),
- .B1(b_registered[14]),
- .B2(\sel_1$1514 ),
- .Y(\t$2159 )
- );
- XOR2x1_ASAP7_75t_R \U$920 (
- .A(\t$2159 ),
- .B(a_registered[11]),
- .Y(booth_b10_m14)
- );
- AO22x1_ASAP7_75t_R \U$921 (
- .A1(b_registered[14]),
- .A2(\sel_0$1513 ),
- .B1(b_registered[15]),
- .B2(\sel_1$1514 ),
- .Y(\t$2160 )
- );
- XOR2x1_ASAP7_75t_R \U$922 (
- .A(\t$2160 ),
- .B(a_registered[11]),
- .Y(booth_b10_m15)
- );
- AO22x1_ASAP7_75t_R \U$923 (
- .A1(b_registered[15]),
- .A2(\sel_0$1513 ),
- .B1(b_registered[16]),
- .B2(\sel_1$1514 ),
- .Y(\t$2161 )
- );
- XOR2x1_ASAP7_75t_R \U$924 (
- .A(\t$2161 ),
- .B(a_registered[11]),
- .Y(booth_b10_m16)
- );
- AO22x1_ASAP7_75t_R \U$925 (
- .A1(b_registered[16]),
- .A2(\sel_0$1513 ),
- .B1(b_registered[17]),
- .B2(\sel_1$1514 ),
- .Y(\t$2162 )
- );
- XOR2x1_ASAP7_75t_R \U$926 (
- .A(\t$2162 ),
- .B(a_registered[11]),
- .Y(booth_b10_m17)
- );
- AO22x1_ASAP7_75t_R \U$927 (
- .A1(b_registered[17]),
- .A2(\sel_0$1513 ),
- .B1(b_registered[18]),
- .B2(\sel_1$1514 ),
- .Y(\t$2163 )
- );
- XOR2x1_ASAP7_75t_R \U$928 (
- .A(\t$2163 ),
- .B(a_registered[11]),
- .Y(booth_b10_m18)
- );
- AO22x1_ASAP7_75t_R \U$929 (
- .A1(b_registered[18]),
- .A2(\sel_0$1513 ),
- .B1(b_registered[19]),
- .B2(\sel_1$1514 ),
- .Y(\t$2164 )
- );
- XOR2x1_ASAP7_75t_R \U$930 (
- .A(\t$2164 ),
- .B(a_registered[11]),
- .Y(booth_b10_m19)
- );
- AO22x1_ASAP7_75t_R \U$931 (
- .A1(b_registered[19]),
- .A2(\sel_0$1513 ),
- .B1(b_registered[20]),
- .B2(\sel_1$1514 ),
- .Y(\t$2165 )
- );
- XOR2x1_ASAP7_75t_R \U$932 (
- .A(\t$2165 ),
- .B(a_registered[11]),
- .Y(booth_b10_m20)
- );
- AO22x1_ASAP7_75t_R \U$933 (
- .A1(b_registered[20]),
- .A2(\sel_0$1513 ),
- .B1(b_registered[21]),
- .B2(\sel_1$1514 ),
- .Y(\t$2166 )
- );
- XOR2x1_ASAP7_75t_R \U$934 (
- .A(\t$2166 ),
- .B(a_registered[11]),
- .Y(booth_b10_m21)
- );
- AO22x1_ASAP7_75t_R \U$935 (
- .A1(b_registered[21]),
- .A2(\sel_0$1513 ),
- .B1(b_registered[22]),
- .B2(\sel_1$1514 ),
- .Y(\t$2167 )
- );
- XOR2x1_ASAP7_75t_R \U$936 (
- .A(\t$2167 ),
- .B(a_registered[11]),
- .Y(booth_b10_m22)
- );
- AO22x1_ASAP7_75t_R \U$937 (
- .A1(b_registered[22]),
- .A2(\sel_0$1513 ),
- .B1(b_registered[23]),
- .B2(\sel_1$1514 ),
- .Y(\t$2168 )
- );
- XOR2x1_ASAP7_75t_R \U$938 (
- .A(\t$2168 ),
- .B(a_registered[11]),
- .Y(booth_b10_m23)
- );
- AO22x1_ASAP7_75t_R \U$939 (
- .A1(b_registered[23]),
- .A2(\sel_0$1513 ),
- .B1(b_registered[24]),
- .B2(\sel_1$1514 ),
- .Y(\t$2169 )
- );
- XOR2x1_ASAP7_75t_R \U$940 (
- .A(\t$2169 ),
- .B(a_registered[11]),
- .Y(booth_b10_m24)
- );
- AO22x1_ASAP7_75t_R \U$941 (
- .A1(b_registered[24]),
- .A2(\sel_0$1513 ),
- .B1(b_registered[25]),
- .B2(\sel_1$1514 ),
- .Y(\t$2170 )
- );
- XOR2x1_ASAP7_75t_R \U$942 (
- .A(\t$2170 ),
- .B(a_registered[11]),
- .Y(booth_b10_m25)
- );
- AO22x1_ASAP7_75t_R \U$943 (
- .A1(b_registered[25]),
- .A2(\sel_0$1513 ),
- .B1(b_registered[26]),
- .B2(\sel_1$1514 ),
- .Y(\t$2171 )
- );
- XOR2x1_ASAP7_75t_R \U$944 (
- .A(\t$2171 ),
- .B(a_registered[11]),
- .Y(booth_b10_m26)
- );
- AO22x1_ASAP7_75t_R \U$945 (
- .A1(b_registered[26]),
- .A2(\sel_0$1513 ),
- .B1(b_registered[27]),
- .B2(\sel_1$1514 ),
- .Y(\t$2172 )
- );
- XOR2x1_ASAP7_75t_R \U$946 (
- .A(\t$2172 ),
- .B(a_registered[11]),
- .Y(booth_b10_m27)
- );
- AO22x1_ASAP7_75t_R \U$947 (
- .A1(b_registered[27]),
- .A2(\sel_0$1513 ),
- .B1(b_registered[28]),
- .B2(\sel_1$1514 ),
- .Y(\t$2173 )
- );
- XOR2x1_ASAP7_75t_R \U$948 (
- .A(\t$2173 ),
- .B(a_registered[11]),
- .Y(booth_b10_m28)
- );
- AO22x1_ASAP7_75t_R \U$949 (
- .A1(b_registered[28]),
- .A2(\sel_0$1513 ),
- .B1(b_registered[29]),
- .B2(\sel_1$1514 ),
- .Y(\t$2174 )
- );
- XOR2x1_ASAP7_75t_R \U$950 (
- .A(\t$2174 ),
- .B(a_registered[11]),
- .Y(booth_b10_m29)
- );
- AO22x1_ASAP7_75t_R \U$951 (
- .A1(b_registered[29]),
- .A2(\sel_0$1513 ),
- .B1(b_registered[30]),
- .B2(\sel_1$1514 ),
- .Y(\t$2175 )
- );
- XOR2x1_ASAP7_75t_R \U$952 (
- .A(\t$2175 ),
- .B(a_registered[11]),
- .Y(booth_b10_m30)
- );
- AO22x1_ASAP7_75t_R \U$953 (
- .A1(b_registered[30]),
- .A2(\sel_0$1513 ),
- .B1(b_registered[31]),
- .B2(\sel_1$1514 ),
- .Y(\t$2176 )
- );
- XOR2x1_ASAP7_75t_R \U$954 (
- .A(\t$2176 ),
- .B(a_registered[11]),
- .Y(booth_b10_m31)
- );
- AO22x1_ASAP7_75t_R \U$955 (
- .A1(b_registered[31]),
- .A2(\sel_0$1513 ),
- .B1(1'h0),
- .B2(\sel_1$1514 ),
- .Y(\t$2177 )
- );
- XOR2x1_ASAP7_75t_R \U$956 (
- .A(\t$2177 ),
- .B(a_registered[11]),
- .Y(booth_b10_m32)
- );
- INVx1_ASAP7_75t_R \U$957 (
- .A(a_registered[11]),
- .Y(\notsign$910 )
- );
- INVx1_ASAP7_75t_R \U$958 (
- .A(a_registered[11]),
- .Y(\$19 )
- );
- INVx1_ASAP7_75t_R \U$959 (
- .A(a_registered[12]),
- .Y(\$20 )
- );
- INVx1_ASAP7_75t_R \U$960 (
- .A(a_registered[13]),
- .Y(\$21 )
- );
- AO33x2_ASAP7_75t_R \U$961 (
- .A1(\$21 ),
- .A2(a_registered[12]),
- .A3(a_registered[11]),
- .B1(a_registered[13]),
- .B2(\$20 ),
- .B3(\$19 ),
- .Y(\sel_0$1550 )
- );
- XOR2x1_ASAP7_75t_R \U$962 (
- .A(a_registered[12]),
- .B(a_registered[11]),
- .Y(\sel_1$1551 )
- );
- AO22x1_ASAP7_75t_R \U$963 (
- .A1(1'h0),
- .A2(\sel_0$1550 ),
- .B1(b_registered[0]),
- .B2(\sel_1$1551 ),
- .Y(\t$2179 )
- );
- XOR2x1_ASAP7_75t_R \U$964 (
- .A(\t$2179 ),
- .B(a_registered[13]),
- .Y(booth_b12_m0)
- );
- AO22x1_ASAP7_75t_R \U$965 (
- .A1(b_registered[0]),
- .A2(\sel_0$1550 ),
- .B1(b_registered[1]),
- .B2(\sel_1$1551 ),
- .Y(\t$2180 )
- );
- XOR2x1_ASAP7_75t_R \U$966 (
- .A(\t$2180 ),
- .B(a_registered[13]),
- .Y(booth_b12_m1)
- );
- AO22x1_ASAP7_75t_R \U$967 (
- .A1(b_registered[1]),
- .A2(\sel_0$1550 ),
- .B1(b_registered[2]),
- .B2(\sel_1$1551 ),
- .Y(\t$2181 )
- );
- XOR2x1_ASAP7_75t_R \U$968 (
- .A(\t$2181 ),
- .B(a_registered[13]),
- .Y(booth_b12_m2)
- );
- AO22x1_ASAP7_75t_R \U$969 (
- .A1(b_registered[2]),
- .A2(\sel_0$1550 ),
- .B1(b_registered[3]),
- .B2(\sel_1$1551 ),
- .Y(\t$2182 )
- );
- XOR2x1_ASAP7_75t_R \U$970 (
- .A(\t$2182 ),
- .B(a_registered[13]),
- .Y(booth_b12_m3)
- );
- AO22x1_ASAP7_75t_R \U$971 (
- .A1(b_registered[3]),
- .A2(\sel_0$1550 ),
- .B1(b_registered[4]),
- .B2(\sel_1$1551 ),
- .Y(\t$2183 )
- );
- XOR2x1_ASAP7_75t_R \U$972 (
- .A(\t$2183 ),
- .B(a_registered[13]),
- .Y(booth_b12_m4)
- );
- AO22x1_ASAP7_75t_R \U$973 (
- .A1(b_registered[4]),
- .A2(\sel_0$1550 ),
- .B1(b_registered[5]),
- .B2(\sel_1$1551 ),
- .Y(\t$2184 )
- );
- XOR2x1_ASAP7_75t_R \U$974 (
- .A(\t$2184 ),
- .B(a_registered[13]),
- .Y(booth_b12_m5)
- );
- AO22x1_ASAP7_75t_R \U$975 (
- .A1(b_registered[5]),
- .A2(\sel_0$1550 ),
- .B1(b_registered[6]),
- .B2(\sel_1$1551 ),
- .Y(\t$2185 )
- );
- XOR2x1_ASAP7_75t_R \U$976 (
- .A(\t$2185 ),
- .B(a_registered[13]),
- .Y(booth_b12_m6)
- );
- AO22x1_ASAP7_75t_R \U$977 (
- .A1(b_registered[6]),
- .A2(\sel_0$1550 ),
- .B1(b_registered[7]),
- .B2(\sel_1$1551 ),
- .Y(\t$2186 )
- );
- XOR2x1_ASAP7_75t_R \U$978 (
- .A(\t$2186 ),
- .B(a_registered[13]),
- .Y(booth_b12_m7)
- );
- AO22x1_ASAP7_75t_R \U$979 (
- .A1(b_registered[7]),
- .A2(\sel_0$1550 ),
- .B1(b_registered[8]),
- .B2(\sel_1$1551 ),
- .Y(\t$2187 )
- );
- XOR2x1_ASAP7_75t_R \U$980 (
- .A(\t$2187 ),
- .B(a_registered[13]),
- .Y(booth_b12_m8)
- );
- AO22x1_ASAP7_75t_R \U$981 (
- .A1(b_registered[8]),
- .A2(\sel_0$1550 ),
- .B1(b_registered[9]),
- .B2(\sel_1$1551 ),
- .Y(\t$2188 )
- );
- XOR2x1_ASAP7_75t_R \U$982 (
- .A(\t$2188 ),
- .B(a_registered[13]),
- .Y(booth_b12_m9)
- );
- AO22x1_ASAP7_75t_R \U$983 (
- .A1(b_registered[9]),
- .A2(\sel_0$1550 ),
- .B1(b_registered[10]),
- .B2(\sel_1$1551 ),
- .Y(\t$2189 )
- );
- XOR2x1_ASAP7_75t_R \U$984 (
- .A(\t$2189 ),
- .B(a_registered[13]),
- .Y(booth_b12_m10)
- );
- AO22x1_ASAP7_75t_R \U$985 (
- .A1(b_registered[10]),
- .A2(\sel_0$1550 ),
- .B1(b_registered[11]),
- .B2(\sel_1$1551 ),
- .Y(\t$2190 )
- );
- XOR2x1_ASAP7_75t_R \U$986 (
- .A(\t$2190 ),
- .B(a_registered[13]),
- .Y(booth_b12_m11)
- );
- AO22x1_ASAP7_75t_R \U$987 (
- .A1(b_registered[11]),
- .A2(\sel_0$1550 ),
- .B1(b_registered[12]),
- .B2(\sel_1$1551 ),
- .Y(\t$2191 )
- );
- XOR2x1_ASAP7_75t_R \U$988 (
- .A(\t$2191 ),
- .B(a_registered[13]),
- .Y(booth_b12_m12)
- );
- AO22x1_ASAP7_75t_R \U$989 (
- .A1(b_registered[12]),
- .A2(\sel_0$1550 ),
- .B1(b_registered[13]),
- .B2(\sel_1$1551 ),
- .Y(\t$2192 )
- );
- XOR2x1_ASAP7_75t_R \U$990 (
- .A(\t$2192 ),
- .B(a_registered[13]),
- .Y(booth_b12_m13)
- );
- AO22x1_ASAP7_75t_R \U$991 (
- .A1(b_registered[13]),
- .A2(\sel_0$1550 ),
- .B1(b_registered[14]),
- .B2(\sel_1$1551 ),
- .Y(\t$2193 )
- );
- XOR2x1_ASAP7_75t_R \U$992 (
- .A(\t$2193 ),
- .B(a_registered[13]),
- .Y(booth_b12_m14)
- );
- AO22x1_ASAP7_75t_R \U$993 (
- .A1(b_registered[14]),
- .A2(\sel_0$1550 ),
- .B1(b_registered[15]),
- .B2(\sel_1$1551 ),
- .Y(\t$2194 )
- );
- XOR2x1_ASAP7_75t_R \U$994 (
- .A(\t$2194 ),
- .B(a_registered[13]),
- .Y(booth_b12_m15)
- );
- AO22x1_ASAP7_75t_R \U$995 (
- .A1(b_registered[15]),
- .A2(\sel_0$1550 ),
- .B1(b_registered[16]),
- .B2(\sel_1$1551 ),
- .Y(\t$2195 )
- );
- XOR2x1_ASAP7_75t_R \U$996 (
- .A(\t$2195 ),
- .B(a_registered[13]),
- .Y(booth_b12_m16)
- );
- AO22x1_ASAP7_75t_R \U$997 (
- .A1(b_registered[16]),
- .A2(\sel_0$1550 ),
- .B1(b_registered[17]),
- .B2(\sel_1$1551 ),
- .Y(\t$2196 )
- );
- XOR2x1_ASAP7_75t_R \U$998 (
- .A(\t$2196 ),
- .B(a_registered[13]),
- .Y(booth_b12_m17)
- );
- AO22x1_ASAP7_75t_R \U$999 (
- .A1(b_registered[17]),
- .A2(\sel_0$1550 ),
- .B1(b_registered[18]),
- .B2(\sel_1$1551 ),
- .Y(\t$2197 )
- );
- FAx1_ASAP7_75t_R dadda_fa_0_26_0 (
- .A(pp_row26_0),
- .B(pp_row26_1),
- .CI(pp_row26_2),
- .CON(\con$2560 ),
- .SN(\sn$2562 )
- );
- FAx1_ASAP7_75t_R dadda_fa_0_27_0 (
- .A(pp_row27_0),
- .B(pp_row27_1),
- .CI(pp_row27_2),
- .CON(\con$2568 ),
- .SN(\sn$2570 )
- );
- FAx1_ASAP7_75t_R dadda_fa_0_28_0 (
- .A(pp_row28_0),
- .B(pp_row28_1),
- .CI(pp_row28_2),
- .CON(\con$2576 ),
- .SN(\sn$2578 )
- );
- FAx1_ASAP7_75t_R dadda_fa_0_28_1 (
- .A(pp_row28_3),
- .B(pp_row28_4),
- .CI(pp_row28_5),
- .CON(\con$2580 ),
- .SN(\sn$2582 )
- );
- FAx1_ASAP7_75t_R dadda_fa_0_29_0 (
- .A(pp_row29_0),
- .B(pp_row29_1),
- .CI(pp_row29_2),
- .CON(\con$2588 ),
- .SN(\sn$2590 )
- );
- FAx1_ASAP7_75t_R dadda_fa_0_29_1 (
- .A(pp_row29_3),
- .B(pp_row29_4),
- .CI(pp_row29_5),
- .CON(\con$2592 ),
- .SN(\sn$2594 )
- );
- FAx1_ASAP7_75t_R dadda_fa_0_30_0 (
- .A(pp_row30_0),
- .B(pp_row30_1),
- .CI(pp_row30_2),
- .CON(\con$2600 ),
- .SN(\sn$2602 )
- );
- FAx1_ASAP7_75t_R dadda_fa_0_30_1 (
- .A(pp_row30_3),
- .B(pp_row30_4),
- .CI(pp_row30_5),
- .CON(\con$2604 ),
- .SN(\sn$2606 )
- );
- FAx1_ASAP7_75t_R dadda_fa_0_30_2 (
- .A(pp_row30_6),
- .B(pp_row30_7),
- .CI(pp_row30_8),
- .CON(\con$2608 ),
- .SN(\sn$2610 )
- );
- FAx1_ASAP7_75t_R dadda_fa_0_31_0 (
- .A(pp_row31_0),
- .B(pp_row31_1),
- .CI(pp_row31_2),
- .CON(\con$2616 ),
- .SN(\sn$2618 )
- );
- FAx1_ASAP7_75t_R dadda_fa_0_31_1 (
- .A(pp_row31_3),
- .B(pp_row31_4),
- .CI(pp_row31_5),
- .CON(\con$2620 ),
- .SN(\sn$2622 )
- );
- FAx1_ASAP7_75t_R dadda_fa_0_31_2 (
- .A(pp_row31_6),
- .B(pp_row31_7),
- .CI(pp_row31_8),
- .CON(\con$2624 ),
- .SN(\sn$2626 )
- );
- FAx1_ASAP7_75t_R dadda_fa_0_32_0 (
- .A(pp_row32_0),
- .B(pp_row32_1),
- .CI(pp_row32_2),
- .CON(\con$2632 ),
- .SN(\sn$2634 )
- );
- FAx1_ASAP7_75t_R dadda_fa_0_32_1 (
- .A(pp_row32_3),
- .B(pp_row32_4),
- .CI(pp_row32_5),
- .CON(\con$2636 ),
- .SN(\sn$2638 )
- );
- FAx1_ASAP7_75t_R dadda_fa_0_32_2 (
- .A(pp_row32_6),
- .B(pp_row32_7),
- .CI(pp_row32_8),
- .CON(\con$2640 ),
- .SN(\sn$2642 )
- );
- FAx1_ASAP7_75t_R dadda_fa_0_32_3 (
- .A(pp_row32_9),
- .B(pp_row32_10),
- .CI(pp_row32_11),
- .CON(\con$2644 ),
- .SN(\sn$2646 )
- );
- FAx1_ASAP7_75t_R dadda_fa_0_33_0 (
- .A(pp_row33_0),
- .B(pp_row33_1),
- .CI(pp_row33_2),
- .CON(\con$2648 ),
- .SN(\sn$2650 )
- );
- FAx1_ASAP7_75t_R dadda_fa_0_33_1 (
- .A(pp_row33_3),
- .B(pp_row33_4),
- .CI(pp_row33_5),
- .CON(\con$2652 ),
- .SN(\sn$2654 )
- );
- FAx1_ASAP7_75t_R dadda_fa_0_33_2 (
- .A(pp_row33_6),
- .B(pp_row33_7),
- .CI(pp_row33_8),
- .CON(\con$2656 ),
- .SN(\sn$2658 )
- );
- FAx1_ASAP7_75t_R dadda_fa_0_33_3 (
- .A(pp_row33_9),
- .B(pp_row33_10),
- .CI(pp_row33_11),
- .CON(\con$2660 ),
- .SN(\sn$2662 )
- );
- FAx1_ASAP7_75t_R dadda_fa_0_34_0 (
- .A(pp_row34_0),
- .B(pp_row34_1),
- .CI(pp_row34_2),
- .CON(\con$2664 ),
- .SN(\sn$2666 )
- );
- FAx1_ASAP7_75t_R dadda_fa_0_34_1 (
- .A(pp_row34_3),
- .B(pp_row34_4),
- .CI(pp_row34_5),
- .CON(\con$2668 ),
- .SN(\sn$2670 )
- );
- FAx1_ASAP7_75t_R dadda_fa_0_34_2 (
- .A(pp_row34_6),
- .B(pp_row34_7),
- .CI(pp_row34_8),
- .CON(\con$2672 ),
- .SN(\sn$2674 )
- );
- FAx1_ASAP7_75t_R dadda_fa_0_34_3 (
- .A(pp_row34_9),
- .B(pp_row34_10),
- .CI(pp_row34_11),
- .CON(\con$2676 ),
- .SN(\sn$2678 )
- );
- FAx1_ASAP7_75t_R dadda_fa_0_35_0 (
- .A(pp_row35_0),
- .B(pp_row35_1),
- .CI(pp_row35_2),
- .CON(\con$2680 ),
- .SN(\sn$2682 )
- );
- FAx1_ASAP7_75t_R dadda_fa_0_35_1 (
- .A(pp_row35_3),
- .B(pp_row35_4),
- .CI(pp_row35_5),
- .CON(\con$2684 ),
- .SN(\sn$2686 )
- );
- FAx1_ASAP7_75t_R dadda_fa_0_35_2 (
- .A(pp_row35_6),
- .B(pp_row35_7),
- .CI(pp_row35_8),
- .CON(\con$2688 ),
- .SN(\sn$2690 )
- );
- FAx1_ASAP7_75t_R dadda_fa_0_35_3 (
- .A(pp_row35_9),
- .B(pp_row35_10),
- .CI(pp_row35_11),
- .CON(\con$2692 ),
- .SN(\sn$2694 )
- );
- FAx1_ASAP7_75t_R dadda_fa_0_36_0 (
- .A(1'h1),
- .B(pp_row36_1),
- .CI(pp_row36_2),
- .CON(\con$2696 ),
- .SN(\sn$2698 )
- );
- FAx1_ASAP7_75t_R dadda_fa_0_36_1 (
- .A(pp_row36_3),
- .B(pp_row36_4),
- .CI(pp_row36_5),
- .CON(\con$2700 ),
- .SN(\sn$2702 )
- );
- FAx1_ASAP7_75t_R dadda_fa_0_36_2 (
- .A(pp_row36_6),
- .B(pp_row36_7),
- .CI(pp_row36_8),
- .CON(\con$2704 ),
- .SN(\sn$2706 )
- );
- FAx1_ASAP7_75t_R dadda_fa_0_37_0 (
- .A(pp_row37_0),
- .B(pp_row37_1),
- .CI(pp_row37_2),
- .CON(\con$2712 ),
- .SN(\sn$2714 )
- );
- FAx1_ASAP7_75t_R dadda_fa_0_37_1 (
- .A(pp_row37_3),
- .B(pp_row37_4),
- .CI(pp_row37_5),
- .CON(\con$2716 ),
- .SN(\sn$2718 )
- );
- FAx1_ASAP7_75t_R dadda_fa_0_37_2 (
- .A(pp_row37_6),
- .B(pp_row37_7),
- .CI(pp_row37_8),
- .CON(\con$2720 ),
- .SN(\sn$2722 )
- );
- FAx1_ASAP7_75t_R dadda_fa_0_38_0 (
- .A(1'h1),
- .B(pp_row38_1),
- .CI(pp_row38_2),
- .CON(\con$2724 ),
- .SN(\sn$2726 )
- );
- FAx1_ASAP7_75t_R dadda_fa_0_38_1 (
- .A(pp_row38_3),
- .B(pp_row38_4),
- .CI(pp_row38_5),
- .CON(\con$2728 ),
- .SN(\sn$2730 )
- );
- FAx1_ASAP7_75t_R dadda_fa_0_39_0 (
- .A(pp_row39_0),
- .B(pp_row39_1),
- .CI(pp_row39_2),
- .CON(\con$2736 ),
- .SN(\sn$2738 )
- );
- FAx1_ASAP7_75t_R dadda_fa_0_39_1 (
- .A(pp_row39_3),
- .B(pp_row39_4),
- .CI(pp_row39_5),
- .CON(\con$2740 ),
- .SN(\sn$2742 )
- );
- FAx1_ASAP7_75t_R dadda_fa_0_40_0 (
- .A(1'h1),
- .B(pp_row40_1),
- .CI(pp_row40_2),
- .CON(\con$2744 ),
- .SN(\sn$2746 )
- );
- FAx1_ASAP7_75t_R dadda_fa_0_41_0 (
- .A(pp_row41_0),
- .B(pp_row41_1),
- .CI(pp_row41_2),
- .CON(\con$2752 ),
- .SN(\sn$2754 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_18_0 (
- .A(pp_row18_0),
- .B(pp_row18_1),
- .CI(pp_row18_2),
- .CON(\con$2768 ),
- .SN(\sn$2770 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_19_0 (
- .A(pp_row19_0),
- .B(pp_row19_1),
- .CI(pp_row19_2),
- .CON(\con$2776 ),
- .SN(\sn$2778 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_20_0 (
- .A(pp_row20_0),
- .B(pp_row20_1),
- .CI(pp_row20_2),
- .CON(\con$2784 ),
- .SN(\sn$2786 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_20_1 (
- .A(pp_row20_3),
- .B(pp_row20_4),
- .CI(pp_row20_5),
- .CON(\con$2788 ),
- .SN(\sn$2790 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_21_0 (
- .A(pp_row21_0),
- .B(pp_row21_1),
- .CI(pp_row21_2),
- .CON(\con$2796 ),
- .SN(\sn$2798 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_21_1 (
- .A(pp_row21_3),
- .B(pp_row21_4),
- .CI(pp_row21_5),
- .CON(\con$2800 ),
- .SN(\sn$2802 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_22_0 (
- .A(pp_row22_0),
- .B(pp_row22_1),
- .CI(pp_row22_2),
- .CON(\con$2808 ),
- .SN(\sn$2810 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_22_1 (
- .A(pp_row22_3),
- .B(pp_row22_4),
- .CI(pp_row22_5),
- .CON(\con$2812 ),
- .SN(\sn$2814 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_22_2 (
- .A(pp_row22_6),
- .B(pp_row22_7),
- .CI(pp_row22_8),
- .CON(\con$2816 ),
- .SN(\sn$2818 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_23_0 (
- .A(pp_row23_0),
- .B(pp_row23_1),
- .CI(pp_row23_2),
- .CON(\con$2824 ),
- .SN(\sn$2826 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_23_1 (
- .A(pp_row23_3),
- .B(pp_row23_4),
- .CI(pp_row23_5),
- .CON(\con$2828 ),
- .SN(\sn$2830 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_23_2 (
- .A(pp_row23_6),
- .B(pp_row23_7),
- .CI(pp_row23_8),
- .CON(\con$2832 ),
- .SN(\sn$2834 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_24_0 (
- .A(pp_row24_2),
- .B(pp_row24_3),
- .CI(pp_row24_4),
- .CON(\con$2840 ),
- .SN(\sn$2842 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_24_1 (
- .A(pp_row24_5),
- .B(pp_row24_6),
- .CI(pp_row24_7),
- .CON(\con$2844 ),
- .SN(\sn$2846 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_24_2 (
- .A(pp_row24_8),
- .B(pp_row24_9),
- .CI(pp_row24_10),
- .CON(\con$2848 ),
- .SN(\sn$2850 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_24_3 (
- .A(pp_row24_11),
- .B(pp_row24_12),
- .CI(pp_row24_13),
- .CON(\con$2852 ),
- .SN(\sn$2854 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_25_0 (
- .A(pp_row25_2),
- .B(pp_row25_3),
- .CI(pp_row25_4),
- .CON(\con$2856 ),
- .SN(\sn$2858 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_25_1 (
- .A(pp_row25_5),
- .B(pp_row25_6),
- .CI(pp_row25_7),
- .CON(\con$2860 ),
- .SN(\sn$2862 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_25_2 (
- .A(pp_row25_8),
- .B(pp_row25_9),
- .CI(pp_row25_10),
- .CON(\con$2864 ),
- .SN(\sn$2866 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_25_3 (
- .A(pp_row25_11),
- .B(pp_row25_12),
- .CI(\c$2553 ),
- .CON(\con$2868 ),
- .SN(\sn$2870 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_26_0 (
- .A(pp_row26_5),
- .B(pp_row26_6),
- .CI(pp_row26_7),
- .CON(\con$2872 ),
- .SN(\sn$2874 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_26_1 (
- .A(pp_row26_8),
- .B(pp_row26_9),
- .CI(pp_row26_10),
- .CON(\con$2876 ),
- .SN(\sn$2878 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_26_2 (
- .A(pp_row26_11),
- .B(pp_row26_12),
- .CI(pp_row26_13),
- .CON(\con$2880 ),
- .SN(\sn$2882 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_26_3 (
- .A(pp_row26_14),
- .B(\c$2557 ),
- .CI(\s$2563 ),
- .CON(\con$2884 ),
- .SN(\sn$2886 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_27_0 (
- .A(pp_row27_5),
- .B(pp_row27_6),
- .CI(pp_row27_7),
- .CON(\con$2888 ),
- .SN(\sn$2890 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_27_1 (
- .A(pp_row27_8),
- .B(pp_row27_9),
- .CI(pp_row27_10),
- .CON(\con$2892 ),
- .SN(\sn$2894 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_27_2 (
- .A(pp_row27_11),
- .B(pp_row27_12),
- .CI(pp_row27_13),
- .CON(\con$2896 ),
- .SN(\sn$2898 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_27_3 (
- .A(\c$2561 ),
- .B(\c$2565 ),
- .CI(\s$2571 ),
- .CON(\con$2900 ),
- .SN(\sn$2902 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_28_0 (
- .A(pp_row28_8),
- .B(pp_row28_9),
- .CI(pp_row28_10),
- .CON(\con$2904 ),
- .SN(\sn$2906 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_28_1 (
- .A(pp_row28_11),
- .B(pp_row28_12),
- .CI(pp_row28_13),
- .CON(\con$2908 ),
- .SN(\sn$2910 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_28_2 (
- .A(pp_row28_14),
- .B(pp_row28_15),
- .CI(\c$2569 ),
- .CON(\con$2912 ),
- .SN(\sn$2914 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_28_3 (
- .A(\c$2573 ),
- .B(\s$2579 ),
- .CI(\s$2583 ),
- .CON(\con$2916 ),
- .SN(\sn$2918 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_29_0 (
- .A(pp_row29_8),
- .B(pp_row29_9),
- .CI(pp_row29_10),
- .CON(\con$2920 ),
- .SN(\sn$2922 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_29_1 (
- .A(pp_row29_11),
- .B(pp_row29_12),
- .CI(pp_row29_13),
- .CON(\con$2924 ),
- .SN(\sn$2926 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_29_2 (
- .A(pp_row29_14),
- .B(\c$2577 ),
- .CI(\c$2581 ),
- .CON(\con$2928 ),
- .SN(\sn$2930 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_29_3 (
- .A(\c$2585 ),
- .B(\s$2591 ),
- .CI(\s$2595 ),
- .CON(\con$2932 ),
- .SN(\sn$2934 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_30_0 (
- .A(pp_row30_11),
- .B(pp_row30_12),
- .CI(pp_row30_13),
- .CON(\con$2936 ),
- .SN(\sn$2938 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_30_1 (
- .A(pp_row30_14),
- .B(pp_row30_15),
- .CI(pp_row30_16),
- .CON(\con$2940 ),
- .SN(\sn$2942 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_30_2 (
- .A(\c$2589 ),
- .B(\c$2593 ),
- .CI(\c$2597 ),
- .CON(\con$2944 ),
- .SN(\sn$2946 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_30_3 (
- .A(\s$2603 ),
- .B(\s$2607 ),
- .CI(\s$2611 ),
- .CON(\con$2948 ),
- .SN(\sn$2950 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_31_0 (
- .A(pp_row31_11),
- .B(pp_row31_12),
- .CI(pp_row31_13),
- .CON(\con$2952 ),
- .SN(\sn$2954 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_31_1 (
- .A(pp_row31_14),
- .B(pp_row31_15),
- .CI(\c$2601 ),
- .CON(\con$2956 ),
- .SN(\sn$2958 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_31_2 (
- .A(\c$2605 ),
- .B(\c$2609 ),
- .CI(\c$2613 ),
- .CON(\con$2960 ),
- .SN(\sn$2962 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_31_3 (
- .A(\s$2619 ),
- .B(\s$2623 ),
- .CI(\s$2627 ),
- .CON(\con$2964 ),
- .SN(\sn$2966 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_32_0 (
- .A(pp_row32_12),
- .B(pp_row32_13),
- .CI(pp_row32_14),
- .CON(\con$2968 ),
- .SN(\sn$2970 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_32_1 (
- .A(pp_row32_15),
- .B(pp_row32_16),
- .CI(\c$2617 ),
- .CON(\con$2972 ),
- .SN(\sn$2974 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_32_2 (
- .A(\c$2621 ),
- .B(\c$2625 ),
- .CI(\c$2629 ),
- .CON(\con$2976 ),
- .SN(\sn$2978 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_32_3 (
- .A(\s$2635 ),
- .B(\s$2639 ),
- .CI(\s$2643 ),
- .CON(\con$2980 ),
- .SN(\sn$2982 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_33_0 (
- .A(pp_row33_12),
- .B(pp_row33_13),
- .CI(pp_row33_14),
- .CON(\con$2984 ),
- .SN(\sn$2986 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_33_1 (
- .A(pp_row33_15),
- .B(pp_row33_16),
- .CI(\c$2633 ),
- .CON(\con$2988 ),
- .SN(\sn$2990 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_33_2 (
- .A(\c$2637 ),
- .B(\c$2641 ),
- .CI(\c$2645 ),
- .CON(\con$2992 ),
- .SN(\sn$2994 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_33_3 (
- .A(\s$2651 ),
- .B(\s$2655 ),
- .CI(\s$2659 ),
- .CON(\con$2996 ),
- .SN(\sn$2998 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_34_0 (
- .A(pp_row34_12),
- .B(pp_row34_13),
- .CI(pp_row34_14),
- .CON(\con$3000 ),
- .SN(\sn$3002 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_34_1 (
- .A(pp_row34_15),
- .B(pp_row34_16),
- .CI(\c$2649 ),
- .CON(\con$3004 ),
- .SN(\sn$3006 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_34_2 (
- .A(\c$2653 ),
- .B(\c$2657 ),
- .CI(\c$2661 ),
- .CON(\con$3008 ),
- .SN(\sn$3010 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_34_3 (
- .A(\s$2667 ),
- .B(\s$2671 ),
- .CI(\s$2675 ),
- .CON(\con$3012 ),
- .SN(\sn$3014 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_35_0 (
- .A(pp_row35_12),
- .B(pp_row35_13),
- .CI(pp_row35_14),
- .CON(\con$3016 ),
- .SN(\sn$3018 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_35_1 (
- .A(pp_row35_15),
- .B(pp_row35_16),
- .CI(\c$2665 ),
- .CON(\con$3020 ),
- .SN(\sn$3022 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_35_2 (
- .A(\c$2669 ),
- .B(\c$2673 ),
- .CI(\c$2677 ),
- .CON(\con$3024 ),
- .SN(\sn$3026 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_35_3 (
- .A(\s$2683 ),
- .B(\s$2687 ),
- .CI(\s$2691 ),
- .CON(\con$3028 ),
- .SN(\sn$3030 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_36_0 (
- .A(pp_row36_11),
- .B(pp_row36_12),
- .CI(pp_row36_13),
- .CON(\con$3032 ),
- .SN(\sn$3034 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_36_1 (
- .A(pp_row36_14),
- .B(pp_row36_15),
- .CI(\c$2681 ),
- .CON(\con$3036 ),
- .SN(\sn$3038 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_36_2 (
- .A(\c$2685 ),
- .B(\c$2689 ),
- .CI(\c$2693 ),
- .CON(\con$3040 ),
- .SN(\sn$3042 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_36_3 (
- .A(\s$2699 ),
- .B(\s$2703 ),
- .CI(\s$2707 ),
- .CON(\con$3044 ),
- .SN(\sn$3046 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_37_0 (
- .A(pp_row37_9),
- .B(pp_row37_10),
- .CI(pp_row37_11),
- .CON(\con$3048 ),
- .SN(\sn$3050 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_37_1 (
- .A(pp_row37_12),
- .B(pp_row37_13),
- .CI(pp_row37_14),
- .CON(\con$3052 ),
- .SN(\sn$3054 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_37_2 (
- .A(\c$2697 ),
- .B(\c$2701 ),
- .CI(\c$2705 ),
- .CON(\con$3056 ),
- .SN(\sn$3058 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_37_3 (
- .A(\c$2709 ),
- .B(\s$2715 ),
- .CI(\s$2719 ),
- .CON(\con$3060 ),
- .SN(\sn$3062 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_38_0 (
- .A(pp_row38_8),
- .B(pp_row38_9),
- .CI(pp_row38_10),
- .CON(\con$3064 ),
- .SN(\sn$3066 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_38_1 (
- .A(pp_row38_11),
- .B(pp_row38_12),
- .CI(pp_row38_13),
- .CON(\con$3068 ),
- .SN(\sn$3070 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_38_2 (
- .A(pp_row38_14),
- .B(\c$2713 ),
- .CI(\c$2717 ),
- .CON(\con$3072 ),
- .SN(\sn$3074 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_38_3 (
- .A(\c$2721 ),
- .B(\s$2727 ),
- .CI(\s$2731 ),
- .CON(\con$3076 ),
- .SN(\sn$3078 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_39_0 (
- .A(pp_row39_6),
- .B(pp_row39_7),
- .CI(pp_row39_8),
- .CON(\con$3080 ),
- .SN(\sn$3082 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_39_1 (
- .A(pp_row39_9),
- .B(pp_row39_10),
- .CI(pp_row39_11),
- .CON(\con$3084 ),
- .SN(\sn$3086 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_39_2 (
- .A(pp_row39_12),
- .B(pp_row39_13),
- .CI(\c$2725 ),
- .CON(\con$3088 ),
- .SN(\sn$3090 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_39_3 (
- .A(\c$2729 ),
- .B(\c$2733 ),
- .CI(\s$2739 ),
- .CON(\con$3092 ),
- .SN(\sn$3094 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_40_0 (
- .A(pp_row40_5),
- .B(pp_row40_6),
- .CI(pp_row40_7),
- .CON(\con$3096 ),
- .SN(\sn$3098 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_40_1 (
- .A(pp_row40_8),
- .B(pp_row40_9),
- .CI(pp_row40_10),
- .CON(\con$3100 ),
- .SN(\sn$3102 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_40_2 (
- .A(pp_row40_11),
- .B(pp_row40_12),
- .CI(pp_row40_13),
- .CON(\con$3104 ),
- .SN(\sn$3106 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_40_3 (
- .A(\c$2737 ),
- .B(\c$2741 ),
- .CI(\s$2747 ),
- .CON(\con$3108 ),
- .SN(\sn$3110 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_41_0 (
- .A(pp_row41_3),
- .B(pp_row41_4),
- .CI(pp_row41_5),
- .CON(\con$3112 ),
- .SN(\sn$3114 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_41_1 (
- .A(pp_row41_6),
- .B(pp_row41_7),
- .CI(pp_row41_8),
- .CON(\con$3116 ),
- .SN(\sn$3118 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_41_2 (
- .A(pp_row41_9),
- .B(pp_row41_10),
- .CI(pp_row41_11),
- .CON(\con$3120 ),
- .SN(\sn$3122 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_41_3 (
- .A(pp_row41_12),
- .B(\c$2745 ),
- .CI(\c$2749 ),
- .CON(\con$3124 ),
- .SN(\sn$3126 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_42_0 (
- .A(pp_row42_2),
- .B(pp_row42_3),
- .CI(pp_row42_4),
- .CON(\con$3128 ),
- .SN(\sn$3130 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_42_1 (
- .A(pp_row42_5),
- .B(pp_row42_6),
- .CI(pp_row42_7),
- .CON(\con$3132 ),
- .SN(\sn$3134 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_42_2 (
- .A(pp_row42_8),
- .B(pp_row42_9),
- .CI(pp_row42_10),
- .CON(\con$3136 ),
- .SN(\sn$3138 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_42_3 (
- .A(pp_row42_11),
- .B(pp_row42_12),
- .CI(\c$2753 ),
- .CON(\con$3140 ),
- .SN(\sn$3142 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_43_0 (
- .A(pp_row43_0),
- .B(pp_row43_1),
- .CI(pp_row43_2),
- .CON(\con$3144 ),
- .SN(\sn$3146 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_43_1 (
- .A(pp_row43_3),
- .B(pp_row43_4),
- .CI(pp_row43_5),
- .CON(\con$3148 ),
- .SN(\sn$3150 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_43_2 (
- .A(pp_row43_6),
- .B(pp_row43_7),
- .CI(pp_row43_8),
- .CON(\con$3152 ),
- .SN(\sn$3154 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_43_3 (
- .A(pp_row43_9),
- .B(pp_row43_10),
- .CI(pp_row43_11),
- .CON(\con$3156 ),
- .SN(\sn$3158 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_44_0 (
- .A(1'h1),
- .B(pp_row44_1),
- .CI(pp_row44_2),
- .CON(\con$3160 ),
- .SN(\sn$3162 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_44_1 (
- .A(pp_row44_3),
- .B(pp_row44_4),
- .CI(pp_row44_5),
- .CON(\con$3164 ),
- .SN(\sn$3166 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_44_2 (
- .A(pp_row44_6),
- .B(pp_row44_7),
- .CI(pp_row44_8),
- .CON(\con$3168 ),
- .SN(\sn$3170 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_45_0 (
- .A(pp_row45_0),
- .B(pp_row45_1),
- .CI(pp_row45_2),
- .CON(\con$3176 ),
- .SN(\sn$3178 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_45_1 (
- .A(pp_row45_3),
- .B(pp_row45_4),
- .CI(pp_row45_5),
- .CON(\con$3180 ),
- .SN(\sn$3182 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_45_2 (
- .A(pp_row45_6),
- .B(pp_row45_7),
- .CI(pp_row45_8),
- .CON(\con$3184 ),
- .SN(\sn$3186 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_46_0 (
- .A(1'h1),
- .B(pp_row46_1),
- .CI(pp_row46_2),
- .CON(\con$3188 ),
- .SN(\sn$3190 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_46_1 (
- .A(pp_row46_3),
- .B(pp_row46_4),
- .CI(pp_row46_5),
- .CON(\con$3192 ),
- .SN(\sn$3194 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_47_0 (
- .A(pp_row47_0),
- .B(pp_row47_1),
- .CI(pp_row47_2),
- .CON(\con$3200 ),
- .SN(\sn$3202 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_47_1 (
- .A(pp_row47_3),
- .B(pp_row47_4),
- .CI(pp_row47_5),
- .CON(\con$3204 ),
- .SN(\sn$3206 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_48_0 (
- .A(1'h1),
- .B(pp_row48_1),
- .CI(pp_row48_2),
- .CON(\con$3208 ),
- .SN(\sn$3210 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_49_0 (
- .A(pp_row49_0),
- .B(pp_row49_1),
- .CI(pp_row49_2),
- .CON(\con$3216 ),
- .SN(\sn$3218 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_12_0 (
- .A(pp_row12_0),
- .B(pp_row12_1),
- .CI(pp_row12_2),
- .CON(\con$3232 ),
- .SN(\sn$3234 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_13_0 (
- .A(pp_row13_0),
- .B(pp_row13_1),
- .CI(pp_row13_2),
- .CON(\con$3240 ),
- .SN(\sn$3242 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_14_0 (
- .A(pp_row14_0),
- .B(pp_row14_1),
- .CI(pp_row14_2),
- .CON(\con$3248 ),
- .SN(\sn$3250 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_14_1 (
- .A(pp_row14_3),
- .B(pp_row14_4),
- .CI(pp_row14_5),
- .CON(\con$3252 ),
- .SN(\sn$3254 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_15_0 (
- .A(pp_row15_0),
- .B(pp_row15_1),
- .CI(pp_row15_2),
- .CON(\con$3260 ),
- .SN(\sn$3262 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_15_1 (
- .A(pp_row15_3),
- .B(pp_row15_4),
- .CI(pp_row15_5),
- .CON(\con$3264 ),
- .SN(\sn$3266 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_16_0 (
- .A(pp_row16_2),
- .B(pp_row16_3),
- .CI(pp_row16_4),
- .CON(\con$3272 ),
- .SN(\sn$3274 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_16_1 (
- .A(pp_row16_5),
- .B(pp_row16_6),
- .CI(pp_row16_7),
- .CON(\con$3276 ),
- .SN(\sn$3278 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_16_2 (
- .A(pp_row16_8),
- .B(pp_row16_9),
- .CI(\s$2763 ),
- .CON(\con$3280 ),
- .SN(\sn$3282 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_17_0 (
- .A(pp_row17_2),
- .B(pp_row17_3),
- .CI(pp_row17_4),
- .CON(\con$3284 ),
- .SN(\sn$3286 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_17_1 (
- .A(pp_row17_5),
- .B(pp_row17_6),
- .CI(pp_row17_7),
- .CON(\con$3288 ),
- .SN(\sn$3290 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_17_2 (
- .A(pp_row17_8),
- .B(\c$2761 ),
- .CI(\s$2767 ),
- .CON(\con$3292 ),
- .SN(\sn$3294 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_18_0 (
- .A(pp_row18_5),
- .B(pp_row18_6),
- .CI(pp_row18_7),
- .CON(\con$3296 ),
- .SN(\sn$3298 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_18_1 (
- .A(pp_row18_8),
- .B(pp_row18_9),
- .CI(pp_row18_10),
- .CON(\con$3300 ),
- .SN(\sn$3302 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_18_2 (
- .A(\c$2765 ),
- .B(\s$2771 ),
- .CI(\s$2775 ),
- .CON(\con$3304 ),
- .SN(\sn$3306 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_19_0 (
- .A(pp_row19_5),
- .B(pp_row19_6),
- .CI(pp_row19_7),
- .CON(\con$3308 ),
- .SN(\sn$3310 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_19_1 (
- .A(pp_row19_8),
- .B(pp_row19_9),
- .CI(\c$2769 ),
- .CON(\con$3312 ),
- .SN(\sn$3314 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_19_2 (
- .A(\c$2773 ),
- .B(\s$2779 ),
- .CI(\s$2783 ),
- .CON(\con$3316 ),
- .SN(\sn$3318 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_20_0 (
- .A(pp_row20_8),
- .B(pp_row20_9),
- .CI(pp_row20_10),
- .CON(\con$3320 ),
- .SN(\sn$3322 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_20_1 (
- .A(pp_row20_11),
- .B(\c$2777 ),
- .CI(\c$2781 ),
- .CON(\con$3324 ),
- .SN(\sn$3326 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_20_2 (
- .A(\s$2787 ),
- .B(\s$2791 ),
- .CI(\s$2795 ),
- .CON(\con$3328 ),
- .SN(\sn$3330 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_21_0 (
- .A(pp_row21_8),
- .B(pp_row21_9),
- .CI(pp_row21_10),
- .CON(\con$3332 ),
- .SN(\sn$3334 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_21_1 (
- .A(\c$2785 ),
- .B(\c$2789 ),
- .CI(\c$2793 ),
- .CON(\con$3336 ),
- .SN(\sn$3338 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_21_2 (
- .A(\s$2799 ),
- .B(\s$2803 ),
- .CI(\s$2807 ),
- .CON(\con$3340 ),
- .SN(\sn$3342 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_22_0 (
- .A(pp_row22_11),
- .B(pp_row22_12),
- .CI(\c$2797 ),
- .CON(\con$3344 ),
- .SN(\sn$3346 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_22_1 (
- .A(\c$2801 ),
- .B(\c$2805 ),
- .CI(\s$2811 ),
- .CON(\con$3348 ),
- .SN(\sn$3350 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_22_2 (
- .A(\s$2815 ),
- .B(\s$2819 ),
- .CI(\s$2823 ),
- .CON(\con$3352 ),
- .SN(\sn$3354 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_23_0 (
- .A(pp_row23_11),
- .B(\c$2809 ),
- .CI(\c$2813 ),
- .CON(\con$3356 ),
- .SN(\sn$3358 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_23_1 (
- .A(\c$2817 ),
- .B(\c$2821 ),
- .CI(\s$2827 ),
- .CON(\con$3360 ),
- .SN(\sn$3362 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_23_2 (
- .A(\s$2831 ),
- .B(\s$2835 ),
- .CI(\s$2839 ),
- .CON(\con$3364 ),
- .SN(\sn$3366 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_24_0 (
- .A(\s$2555 ),
- .B(\c$2825 ),
- .CI(\c$2829 ),
- .CON(\con$3368 ),
- .SN(\sn$3370 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_24_1 (
- .A(\c$2833 ),
- .B(\c$2837 ),
- .CI(\s$2843 ),
- .CON(\con$3372 ),
- .SN(\sn$3374 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_24_2 (
- .A(\s$2847 ),
- .B(\s$2851 ),
- .CI(\s$2855 ),
- .CON(\con$3376 ),
- .SN(\sn$3378 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_25_0 (
- .A(\s$2559 ),
- .B(\c$2841 ),
- .CI(\c$2845 ),
- .CON(\con$3380 ),
- .SN(\sn$3382 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_25_1 (
- .A(\c$2849 ),
- .B(\c$2853 ),
- .CI(\s$2859 ),
- .CON(\con$3384 ),
- .SN(\sn$3386 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_25_2 (
- .A(\s$2863 ),
- .B(\s$2867 ),
- .CI(\s$2871 ),
- .CON(\con$3388 ),
- .SN(\sn$3390 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_26_0 (
- .A(\s$2567 ),
- .B(\c$2857 ),
- .CI(\c$2861 ),
- .CON(\con$3392 ),
- .SN(\sn$3394 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_26_1 (
- .A(\c$2865 ),
- .B(\c$2869 ),
- .CI(\s$2875 ),
- .CON(\con$3396 ),
- .SN(\sn$3398 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_26_2 (
- .A(\s$2879 ),
- .B(\s$2883 ),
- .CI(\s$2887 ),
- .CON(\con$3400 ),
- .SN(\sn$3402 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_27_0 (
- .A(\s$2575 ),
- .B(\c$2873 ),
- .CI(\c$2877 ),
- .CON(\con$3404 ),
- .SN(\sn$3406 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_27_1 (
- .A(\c$2881 ),
- .B(\c$2885 ),
- .CI(\s$2891 ),
- .CON(\con$3408 ),
- .SN(\sn$3410 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_27_2 (
- .A(\s$2895 ),
- .B(\s$2899 ),
- .CI(\s$2903 ),
- .CON(\con$3412 ),
- .SN(\sn$3414 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_28_0 (
- .A(\s$2587 ),
- .B(\c$2889 ),
- .CI(\c$2893 ),
- .CON(\con$3416 ),
- .SN(\sn$3418 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_28_1 (
- .A(\c$2897 ),
- .B(\c$2901 ),
- .CI(\s$2907 ),
- .CON(\con$3420 ),
- .SN(\sn$3422 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_28_2 (
- .A(\s$2911 ),
- .B(\s$2915 ),
- .CI(\s$2919 ),
- .CON(\con$3424 ),
- .SN(\sn$3426 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_29_0 (
- .A(\s$2599 ),
- .B(\c$2905 ),
- .CI(\c$2909 ),
- .CON(\con$3428 ),
- .SN(\sn$3430 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_29_1 (
- .A(\c$2913 ),
- .B(\c$2917 ),
- .CI(\s$2923 ),
- .CON(\con$3432 ),
- .SN(\sn$3434 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_29_2 (
- .A(\s$2927 ),
- .B(\s$2931 ),
- .CI(\s$2935 ),
- .CON(\con$3436 ),
- .SN(\sn$3438 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_30_0 (
- .A(\s$2615 ),
- .B(\c$2921 ),
- .CI(\c$2925 ),
- .CON(\con$3440 ),
- .SN(\sn$3442 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_30_1 (
- .A(\c$2929 ),
- .B(\c$2933 ),
- .CI(\s$2939 ),
- .CON(\con$3444 ),
- .SN(\sn$3446 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_30_2 (
- .A(\s$2943 ),
- .B(\s$2947 ),
- .CI(\s$2951 ),
- .CON(\con$3448 ),
- .SN(\sn$3450 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_31_0 (
- .A(\s$2631 ),
- .B(\c$2937 ),
- .CI(\c$2941 ),
- .CON(\con$3452 ),
- .SN(\sn$3454 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_31_1 (
- .A(\c$2945 ),
- .B(\c$2949 ),
- .CI(\s$2955 ),
- .CON(\con$3456 ),
- .SN(\sn$3458 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_31_2 (
- .A(\s$2959 ),
- .B(\s$2963 ),
- .CI(\s$2967 ),
- .CON(\con$3460 ),
- .SN(\sn$3462 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_32_0 (
- .A(\s$2647 ),
- .B(\c$2953 ),
- .CI(\c$2957 ),
- .CON(\con$3464 ),
- .SN(\sn$3466 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_32_1 (
- .A(\c$2961 ),
- .B(\c$2965 ),
- .CI(\s$2971 ),
- .CON(\con$3468 ),
- .SN(\sn$3470 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_32_2 (
- .A(\s$2975 ),
- .B(\s$2979 ),
- .CI(\s$2983 ),
- .CON(\con$3472 ),
- .SN(\sn$3474 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_33_0 (
- .A(\s$2663 ),
- .B(\c$2969 ),
- .CI(\c$2973 ),
- .CON(\con$3476 ),
- .SN(\sn$3478 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_33_1 (
- .A(\c$2977 ),
- .B(\c$2981 ),
- .CI(\s$2987 ),
- .CON(\con$3480 ),
- .SN(\sn$3482 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_33_2 (
- .A(\s$2991 ),
- .B(\s$2995 ),
- .CI(\s$2999 ),
- .CON(\con$3484 ),
- .SN(\sn$3486 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_34_0 (
- .A(\s$2679 ),
- .B(\c$2985 ),
- .CI(\c$2989 ),
- .CON(\con$3488 ),
- .SN(\sn$3490 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_34_1 (
- .A(\c$2993 ),
- .B(\c$2997 ),
- .CI(\s$3003 ),
- .CON(\con$3492 ),
- .SN(\sn$3494 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_34_2 (
- .A(\s$3007 ),
- .B(\s$3011 ),
- .CI(\s$3015 ),
- .CON(\con$3496 ),
- .SN(\sn$3498 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_35_0 (
- .A(\s$2695 ),
- .B(\c$3001 ),
- .CI(\c$3005 ),
- .CON(\con$3500 ),
- .SN(\sn$3502 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_35_1 (
- .A(\c$3009 ),
- .B(\c$3013 ),
- .CI(\s$3019 ),
- .CON(\con$3504 ),
- .SN(\sn$3506 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_35_2 (
- .A(\s$3023 ),
- .B(\s$3027 ),
- .CI(\s$3031 ),
- .CON(\con$3508 ),
- .SN(\sn$3510 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_36_0 (
- .A(\s$2711 ),
- .B(\c$3017 ),
- .CI(\c$3021 ),
- .CON(\con$3512 ),
- .SN(\sn$3514 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_36_1 (
- .A(\c$3025 ),
- .B(\c$3029 ),
- .CI(\s$3035 ),
- .CON(\con$3516 ),
- .SN(\sn$3518 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_36_2 (
- .A(\s$3039 ),
- .B(\s$3043 ),
- .CI(\s$3047 ),
- .CON(\con$3520 ),
- .SN(\sn$3522 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_37_0 (
- .A(\s$2723 ),
- .B(\c$3033 ),
- .CI(\c$3037 ),
- .CON(\con$3524 ),
- .SN(\sn$3526 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_37_1 (
- .A(\c$3041 ),
- .B(\c$3045 ),
- .CI(\s$3051 ),
- .CON(\con$3528 ),
- .SN(\sn$3530 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_37_2 (
- .A(\s$3055 ),
- .B(\s$3059 ),
- .CI(\s$3063 ),
- .CON(\con$3532 ),
- .SN(\sn$3534 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_38_0 (
- .A(\s$2735 ),
- .B(\c$3049 ),
- .CI(\c$3053 ),
- .CON(\con$3536 ),
- .SN(\sn$3538 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_38_1 (
- .A(\c$3057 ),
- .B(\c$3061 ),
- .CI(\s$3067 ),
- .CON(\con$3540 ),
- .SN(\sn$3542 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_38_2 (
- .A(\s$3071 ),
- .B(\s$3075 ),
- .CI(\s$3079 ),
- .CON(\con$3544 ),
- .SN(\sn$3546 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_39_0 (
- .A(\s$2743 ),
- .B(\c$3065 ),
- .CI(\c$3069 ),
- .CON(\con$3548 ),
- .SN(\sn$3550 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_39_1 (
- .A(\c$3073 ),
- .B(\c$3077 ),
- .CI(\s$3083 ),
- .CON(\con$3552 ),
- .SN(\sn$3554 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_39_2 (
- .A(\s$3087 ),
- .B(\s$3091 ),
- .CI(\s$3095 ),
- .CON(\con$3556 ),
- .SN(\sn$3558 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_40_0 (
- .A(\s$2751 ),
- .B(\c$3081 ),
- .CI(\c$3085 ),
- .CON(\con$3560 ),
- .SN(\sn$3562 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_40_1 (
- .A(\c$3089 ),
- .B(\c$3093 ),
- .CI(\s$3099 ),
- .CON(\con$3564 ),
- .SN(\sn$3566 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_40_2 (
- .A(\s$3103 ),
- .B(\s$3107 ),
- .CI(\s$3111 ),
- .CON(\con$3568 ),
- .SN(\sn$3570 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_41_0 (
- .A(\s$2755 ),
- .B(\c$3097 ),
- .CI(\c$3101 ),
- .CON(\con$3572 ),
- .SN(\sn$3574 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_41_1 (
- .A(\c$3105 ),
- .B(\c$3109 ),
- .CI(\s$3115 ),
- .CON(\con$3576 ),
- .SN(\sn$3578 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_41_2 (
- .A(\s$3119 ),
- .B(\s$3123 ),
- .CI(\s$3127 ),
- .CON(\con$3580 ),
- .SN(\sn$3582 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_42_0 (
- .A(\s$2759 ),
- .B(\c$3113 ),
- .CI(\c$3117 ),
- .CON(\con$3584 ),
- .SN(\sn$3586 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_42_1 (
- .A(\c$3121 ),
- .B(\c$3125 ),
- .CI(\s$3131 ),
- .CON(\con$3588 ),
- .SN(\sn$3590 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_42_2 (
- .A(\s$3135 ),
- .B(\s$3139 ),
- .CI(\s$3143 ),
- .CON(\con$3592 ),
- .SN(\sn$3594 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_43_0 (
- .A(\c$2757 ),
- .B(\c$3129 ),
- .CI(\c$3133 ),
- .CON(\con$3596 ),
- .SN(\sn$3598 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_43_1 (
- .A(\c$3137 ),
- .B(\c$3141 ),
- .CI(\s$3147 ),
- .CON(\con$3600 ),
- .SN(\sn$3602 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_43_2 (
- .A(\s$3151 ),
- .B(\s$3155 ),
- .CI(\s$3159 ),
- .CON(\con$3604 ),
- .SN(\sn$3606 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_44_0 (
- .A(pp_row44_11),
- .B(\c$3145 ),
- .CI(\c$3149 ),
- .CON(\con$3608 ),
- .SN(\sn$3610 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_44_1 (
- .A(\c$3153 ),
- .B(\c$3157 ),
- .CI(\s$3163 ),
- .CON(\con$3612 ),
- .SN(\sn$3614 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_44_2 (
- .A(\s$3167 ),
- .B(\s$3171 ),
- .CI(\s$3175 ),
- .CON(\con$3616 ),
- .SN(\sn$3618 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_45_0 (
- .A(pp_row45_9),
- .B(pp_row45_10),
- .CI(\c$3161 ),
- .CON(\con$3620 ),
- .SN(\sn$3622 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_45_1 (
- .A(\c$3165 ),
- .B(\c$3169 ),
- .CI(\c$3173 ),
- .CON(\con$3624 ),
- .SN(\sn$3626 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_45_2 (
- .A(\s$3179 ),
- .B(\s$3183 ),
- .CI(\s$3187 ),
- .CON(\con$3628 ),
- .SN(\sn$3630 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_46_0 (
- .A(pp_row46_8),
- .B(pp_row46_9),
- .CI(pp_row46_10),
- .CON(\con$3632 ),
- .SN(\sn$3634 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_46_1 (
- .A(\c$3177 ),
- .B(\c$3181 ),
- .CI(\c$3185 ),
- .CON(\con$3636 ),
- .SN(\sn$3638 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_46_2 (
- .A(\s$3191 ),
- .B(\s$3195 ),
- .CI(\s$3199 ),
- .CON(\con$3640 ),
- .SN(\sn$3642 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_47_0 (
- .A(pp_row47_6),
- .B(pp_row47_7),
- .CI(pp_row47_8),
- .CON(\con$3644 ),
- .SN(\sn$3646 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_47_1 (
- .A(pp_row47_9),
- .B(\c$3189 ),
- .CI(\c$3193 ),
- .CON(\con$3648 ),
- .SN(\sn$3650 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_47_2 (
- .A(\c$3197 ),
- .B(\s$3203 ),
- .CI(\s$3207 ),
- .CON(\con$3652 ),
- .SN(\sn$3654 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_48_0 (
- .A(pp_row48_5),
- .B(pp_row48_6),
- .CI(pp_row48_7),
- .CON(\con$3656 ),
- .SN(\sn$3658 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_48_1 (
- .A(pp_row48_8),
- .B(pp_row48_9),
- .CI(\c$3201 ),
- .CON(\con$3660 ),
- .SN(\sn$3662 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_48_2 (
- .A(\c$3205 ),
- .B(\s$3211 ),
- .CI(\s$3215 ),
- .CON(\con$3664 ),
- .SN(\sn$3666 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_49_0 (
- .A(pp_row49_3),
- .B(pp_row49_4),
- .CI(pp_row49_5),
- .CON(\con$3668 ),
- .SN(\sn$3670 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_49_1 (
- .A(pp_row49_6),
- .B(pp_row49_7),
- .CI(pp_row49_8),
- .CON(\con$3672 ),
- .SN(\sn$3674 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_49_2 (
- .A(\c$3209 ),
- .B(\c$3213 ),
- .CI(\s$3219 ),
- .CON(\con$3676 ),
- .SN(\sn$3678 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_50_0 (
- .A(pp_row50_2),
- .B(pp_row50_3),
- .CI(pp_row50_4),
- .CON(\con$3680 ),
- .SN(\sn$3682 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_50_1 (
- .A(pp_row50_5),
- .B(pp_row50_6),
- .CI(pp_row50_7),
- .CON(\con$3684 ),
- .SN(\sn$3686 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_50_2 (
- .A(pp_row50_8),
- .B(\c$3217 ),
- .CI(\s$3223 ),
- .CON(\con$3688 ),
- .SN(\sn$3690 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_51_0 (
- .A(pp_row51_0),
- .B(pp_row51_1),
- .CI(pp_row51_2),
- .CON(\con$3692 ),
- .SN(\sn$3694 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_51_1 (
- .A(pp_row51_3),
- .B(pp_row51_4),
- .CI(pp_row51_5),
- .CON(\con$3696 ),
- .SN(\sn$3698 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_51_2 (
- .A(pp_row51_6),
- .B(pp_row51_7),
- .CI(\c$3221 ),
- .CON(\con$3700 ),
- .SN(\sn$3702 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_52_0 (
- .A(1'h1),
- .B(pp_row52_1),
- .CI(pp_row52_2),
- .CON(\con$3704 ),
- .SN(\sn$3706 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_52_1 (
- .A(pp_row52_3),
- .B(pp_row52_4),
- .CI(pp_row52_5),
- .CON(\con$3708 ),
- .SN(\sn$3710 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_53_0 (
- .A(pp_row53_0),
- .B(pp_row53_1),
- .CI(pp_row53_2),
- .CON(\con$3716 ),
- .SN(\sn$3718 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_53_1 (
- .A(pp_row53_3),
- .B(pp_row53_4),
- .CI(pp_row53_5),
- .CON(\con$3720 ),
- .SN(\sn$3722 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_54_0 (
- .A(1'h1),
- .B(pp_row54_1),
- .CI(pp_row54_2),
- .CON(\con$3724 ),
- .SN(\sn$3726 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_55_0 (
- .A(pp_row55_0),
- .B(pp_row55_1),
- .CI(pp_row55_2),
- .CON(\con$3732 ),
- .SN(\sn$3734 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_10_0 (
- .A(pp_row10_2),
- .B(pp_row10_3),
- .CI(pp_row10_4),
- .CON(\con$3764 ),
- .SN(\sn$3766 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_10_1 (
- .A(pp_row10_5),
- .B(pp_row10_6),
- .CI(\s$3227 ),
- .CON(\con$3768 ),
- .SN(\sn$3770 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_11_0 (
- .A(pp_row11_2),
- .B(pp_row11_3),
- .CI(pp_row11_4),
- .CON(\con$3772 ),
- .SN(\sn$3774 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_11_1 (
- .A(pp_row11_5),
- .B(\c$3225 ),
- .CI(\s$3231 ),
- .CON(\con$3776 ),
- .SN(\sn$3778 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_12_0 (
- .A(pp_row12_5),
- .B(pp_row12_6),
- .CI(pp_row12_7),
- .CON(\con$3780 ),
- .SN(\sn$3782 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_12_1 (
- .A(\c$3229 ),
- .B(\s$3235 ),
- .CI(\s$3239 ),
- .CON(\con$3784 ),
- .SN(\sn$3786 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_13_0 (
- .A(pp_row13_5),
- .B(pp_row13_6),
- .CI(\c$3233 ),
- .CON(\con$3788 ),
- .SN(\sn$3790 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_13_1 (
- .A(\c$3237 ),
- .B(\s$3243 ),
- .CI(\s$3247 ),
- .CON(\con$3792 ),
- .SN(\sn$3794 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_14_0 (
- .A(pp_row14_8),
- .B(\c$3241 ),
- .CI(\c$3245 ),
- .CON(\con$3796 ),
- .SN(\sn$3798 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_14_1 (
- .A(\s$3251 ),
- .B(\s$3255 ),
- .CI(\s$3259 ),
- .CON(\con$3800 ),
- .SN(\sn$3802 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_15_0 (
- .A(\c$3249 ),
- .B(\c$3253 ),
- .CI(\c$3257 ),
- .CON(\con$3804 ),
- .SN(\sn$3806 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_15_1 (
- .A(\s$3263 ),
- .B(\s$3267 ),
- .CI(\s$3271 ),
- .CON(\con$3808 ),
- .SN(\sn$3810 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_16_0 (
- .A(\c$3261 ),
- .B(\c$3265 ),
- .CI(\c$3269 ),
- .CON(\con$3812 ),
- .SN(\sn$3814 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_16_1 (
- .A(\s$3275 ),
- .B(\s$3279 ),
- .CI(\s$3283 ),
- .CON(\con$3816 ),
- .SN(\sn$3818 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_17_0 (
- .A(\c$3273 ),
- .B(\c$3277 ),
- .CI(\c$3281 ),
- .CON(\con$3820 ),
- .SN(\sn$3822 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_17_1 (
- .A(\s$3287 ),
- .B(\s$3291 ),
- .CI(\s$3295 ),
- .CON(\con$3824 ),
- .SN(\sn$3826 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_18_0 (
- .A(\c$3285 ),
- .B(\c$3289 ),
- .CI(\c$3293 ),
- .CON(\con$3828 ),
- .SN(\sn$3830 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_18_1 (
- .A(\s$3299 ),
- .B(\s$3303 ),
- .CI(\s$3307 ),
- .CON(\con$3832 ),
- .SN(\sn$3834 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_19_0 (
- .A(\c$3297 ),
- .B(\c$3301 ),
- .CI(\c$3305 ),
- .CON(\con$3836 ),
- .SN(\sn$3838 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_19_1 (
- .A(\s$3311 ),
- .B(\s$3315 ),
- .CI(\s$3319 ),
- .CON(\con$3840 ),
- .SN(\sn$3842 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_20_0 (
- .A(\c$3309 ),
- .B(\c$3313 ),
- .CI(\c$3317 ),
- .CON(\con$3844 ),
- .SN(\sn$3846 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_20_1 (
- .A(\s$3323 ),
- .B(\s$3327 ),
- .CI(\s$3331 ),
- .CON(\con$3848 ),
- .SN(\sn$3850 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_21_0 (
- .A(\c$3321 ),
- .B(\c$3325 ),
- .CI(\c$3329 ),
- .CON(\con$3852 ),
- .SN(\sn$3854 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_21_1 (
- .A(\s$3335 ),
- .B(\s$3339 ),
- .CI(\s$3343 ),
- .CON(\con$3856 ),
- .SN(\sn$3858 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_22_0 (
- .A(\c$3333 ),
- .B(\c$3337 ),
- .CI(\c$3341 ),
- .CON(\con$3860 ),
- .SN(\sn$3862 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_22_1 (
- .A(\s$3347 ),
- .B(\s$3351 ),
- .CI(\s$3355 ),
- .CON(\con$3864 ),
- .SN(\sn$3866 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_23_0 (
- .A(\c$3345 ),
- .B(\c$3349 ),
- .CI(\c$3353 ),
- .CON(\con$3868 ),
- .SN(\sn$3870 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_23_1 (
- .A(\s$3359 ),
- .B(\s$3363 ),
- .CI(\s$3367 ),
- .CON(\con$3872 ),
- .SN(\sn$3874 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_24_0 (
- .A(\c$3357 ),
- .B(\c$3361 ),
- .CI(\c$3365 ),
- .CON(\con$3876 ),
- .SN(\sn$3878 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_24_1 (
- .A(\s$3371 ),
- .B(\s$3375 ),
- .CI(\s$3379 ),
- .CON(\con$3880 ),
- .SN(\sn$3882 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_25_0 (
- .A(\c$3369 ),
- .B(\c$3373 ),
- .CI(\c$3377 ),
- .CON(\con$3884 ),
- .SN(\sn$3886 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_25_1 (
- .A(\s$3383 ),
- .B(\s$3387 ),
- .CI(\s$3391 ),
- .CON(\con$3888 ),
- .SN(\sn$3890 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_26_0 (
- .A(\c$3381 ),
- .B(\c$3385 ),
- .CI(\c$3389 ),
- .CON(\con$3892 ),
- .SN(\sn$3894 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_26_1 (
- .A(\s$3395 ),
- .B(\s$3399 ),
- .CI(\s$3403 ),
- .CON(\con$3896 ),
- .SN(\sn$3898 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_27_0 (
- .A(\c$3393 ),
- .B(\c$3397 ),
- .CI(\c$3401 ),
- .CON(\con$3900 ),
- .SN(\sn$3902 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_27_1 (
- .A(\s$3407 ),
- .B(\s$3411 ),
- .CI(\s$3415 ),
- .CON(\con$3904 ),
- .SN(\sn$3906 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_28_0 (
- .A(\c$3405 ),
- .B(\c$3409 ),
- .CI(\c$3413 ),
- .CON(\con$3908 ),
- .SN(\sn$3910 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_28_1 (
- .A(\s$3419 ),
- .B(\s$3423 ),
- .CI(\s$3427 ),
- .CON(\con$3912 ),
- .SN(\sn$3914 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_29_0 (
- .A(\c$3417 ),
- .B(\c$3421 ),
- .CI(\c$3425 ),
- .CON(\con$3916 ),
- .SN(\sn$3918 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_29_1 (
- .A(\s$3431 ),
- .B(\s$3435 ),
- .CI(\s$3439 ),
- .CON(\con$3920 ),
- .SN(\sn$3922 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_30_0 (
- .A(\c$3429 ),
- .B(\c$3433 ),
- .CI(\c$3437 ),
- .CON(\con$3924 ),
- .SN(\sn$3926 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_30_1 (
- .A(\s$3443 ),
- .B(\s$3447 ),
- .CI(\s$3451 ),
- .CON(\con$3928 ),
- .SN(\sn$3930 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_31_0 (
- .A(\c$3441 ),
- .B(\c$3445 ),
- .CI(\c$3449 ),
- .CON(\con$3932 ),
- .SN(\sn$3934 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_31_1 (
- .A(\s$3455 ),
- .B(\s$3459 ),
- .CI(\s$3463 ),
- .CON(\con$3936 ),
- .SN(\sn$3938 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_32_0 (
- .A(\c$3453 ),
- .B(\c$3457 ),
- .CI(\c$3461 ),
- .CON(\con$3940 ),
- .SN(\sn$3942 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_32_1 (
- .A(\s$3467 ),
- .B(\s$3471 ),
- .CI(\s$3475 ),
- .CON(\con$3944 ),
- .SN(\sn$3946 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_33_0 (
- .A(\c$3465 ),
- .B(\c$3469 ),
- .CI(\c$3473 ),
- .CON(\con$3948 ),
- .SN(\sn$3950 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_33_1 (
- .A(\s$3479 ),
- .B(\s$3483 ),
- .CI(\s$3487 ),
- .CON(\con$3952 ),
- .SN(\sn$3954 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_34_0 (
- .A(\c$3477 ),
- .B(\c$3481 ),
- .CI(\c$3485 ),
- .CON(\con$3956 ),
- .SN(\sn$3958 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_34_1 (
- .A(\s$3491 ),
- .B(\s$3495 ),
- .CI(\s$3499 ),
- .CON(\con$3960 ),
- .SN(\sn$3962 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_35_0 (
- .A(\c$3489 ),
- .B(\c$3493 ),
- .CI(\c$3497 ),
- .CON(\con$3964 ),
- .SN(\sn$3966 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_35_1 (
- .A(\s$3503 ),
- .B(\s$3507 ),
- .CI(\s$3511 ),
- .CON(\con$3968 ),
- .SN(\sn$3970 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_36_0 (
- .A(\c$3501 ),
- .B(\c$3505 ),
- .CI(\c$3509 ),
- .CON(\con$3972 ),
- .SN(\sn$3974 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_36_1 (
- .A(\s$3515 ),
- .B(\s$3519 ),
- .CI(\s$3523 ),
- .CON(\con$3976 ),
- .SN(\sn$3978 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_37_0 (
- .A(\c$3513 ),
- .B(\c$3517 ),
- .CI(\c$3521 ),
- .CON(\con$3980 ),
- .SN(\sn$3982 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_37_1 (
- .A(\s$3527 ),
- .B(\s$3531 ),
- .CI(\s$3535 ),
- .CON(\con$3984 ),
- .SN(\sn$3986 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_38_0 (
- .A(\c$3525 ),
- .B(\c$3529 ),
- .CI(\c$3533 ),
- .CON(\con$3988 ),
- .SN(\sn$3990 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_38_1 (
- .A(\s$3539 ),
- .B(\s$3543 ),
- .CI(\s$3547 ),
- .CON(\con$3992 ),
- .SN(\sn$3994 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_39_0 (
- .A(\c$3537 ),
- .B(\c$3541 ),
- .CI(\c$3545 ),
- .CON(\con$3996 ),
- .SN(\sn$3998 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_39_1 (
- .A(\s$3551 ),
- .B(\s$3555 ),
- .CI(\s$3559 ),
- .CON(\con$4000 ),
- .SN(\sn$4002 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_40_0 (
- .A(\c$3549 ),
- .B(\c$3553 ),
- .CI(\c$3557 ),
- .CON(\con$4004 ),
- .SN(\sn$4006 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_40_1 (
- .A(\s$3563 ),
- .B(\s$3567 ),
- .CI(\s$3571 ),
- .CON(\con$4008 ),
- .SN(\sn$4010 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_41_0 (
- .A(\c$3561 ),
- .B(\c$3565 ),
- .CI(\c$3569 ),
- .CON(\con$4012 ),
- .SN(\sn$4014 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_41_1 (
- .A(\s$3575 ),
- .B(\s$3579 ),
- .CI(\s$3583 ),
- .CON(\con$4016 ),
- .SN(\sn$4018 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_42_0 (
- .A(\c$3573 ),
- .B(\c$3577 ),
- .CI(\c$3581 ),
- .CON(\con$4020 ),
- .SN(\sn$4022 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_42_1 (
- .A(\s$3587 ),
- .B(\s$3591 ),
- .CI(\s$3595 ),
- .CON(\con$4024 ),
- .SN(\sn$4026 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_43_0 (
- .A(\c$3585 ),
- .B(\c$3589 ),
- .CI(\c$3593 ),
- .CON(\con$4028 ),
- .SN(\sn$4030 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_43_1 (
- .A(\s$3599 ),
- .B(\s$3603 ),
- .CI(\s$3607 ),
- .CON(\con$4032 ),
- .SN(\sn$4034 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_44_0 (
- .A(\c$3597 ),
- .B(\c$3601 ),
- .CI(\c$3605 ),
- .CON(\con$4036 ),
- .SN(\sn$4038 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_44_1 (
- .A(\s$3611 ),
- .B(\s$3615 ),
- .CI(\s$3619 ),
- .CON(\con$4040 ),
- .SN(\sn$4042 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_45_0 (
- .A(\c$3609 ),
- .B(\c$3613 ),
- .CI(\c$3617 ),
- .CON(\con$4044 ),
- .SN(\sn$4046 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_45_1 (
- .A(\s$3623 ),
- .B(\s$3627 ),
- .CI(\s$3631 ),
- .CON(\con$4048 ),
- .SN(\sn$4050 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_46_0 (
- .A(\c$3621 ),
- .B(\c$3625 ),
- .CI(\c$3629 ),
- .CON(\con$4052 ),
- .SN(\sn$4054 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_46_1 (
- .A(\s$3635 ),
- .B(\s$3639 ),
- .CI(\s$3643 ),
- .CON(\con$4056 ),
- .SN(\sn$4058 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_47_0 (
- .A(\c$3633 ),
- .B(\c$3637 ),
- .CI(\c$3641 ),
- .CON(\con$4060 ),
- .SN(\sn$4062 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_47_1 (
- .A(\s$3647 ),
- .B(\s$3651 ),
- .CI(\s$3655 ),
- .CON(\con$4064 ),
- .SN(\sn$4066 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_48_0 (
- .A(\c$3645 ),
- .B(\c$3649 ),
- .CI(\c$3653 ),
- .CON(\con$4068 ),
- .SN(\sn$4070 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_48_1 (
- .A(\s$3659 ),
- .B(\s$3663 ),
- .CI(\s$3667 ),
- .CON(\con$4072 ),
- .SN(\sn$4074 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_49_0 (
- .A(\c$3657 ),
- .B(\c$3661 ),
- .CI(\c$3665 ),
- .CON(\con$4076 ),
- .SN(\sn$4078 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_49_1 (
- .A(\s$3671 ),
- .B(\s$3675 ),
- .CI(\s$3679 ),
- .CON(\con$4080 ),
- .SN(\sn$4082 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_50_0 (
- .A(\c$3669 ),
- .B(\c$3673 ),
- .CI(\c$3677 ),
- .CON(\con$4084 ),
- .SN(\sn$4086 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_50_1 (
- .A(\s$3683 ),
- .B(\s$3687 ),
- .CI(\s$3691 ),
- .CON(\con$4088 ),
- .SN(\sn$4090 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_51_0 (
- .A(\c$3681 ),
- .B(\c$3685 ),
- .CI(\c$3689 ),
- .CON(\con$4092 ),
- .SN(\sn$4094 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_51_1 (
- .A(\s$3695 ),
- .B(\s$3699 ),
- .CI(\s$3703 ),
- .CON(\con$4096 ),
- .SN(\sn$4098 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_52_0 (
- .A(\c$3693 ),
- .B(\c$3697 ),
- .CI(\c$3701 ),
- .CON(\con$4100 ),
- .SN(\sn$4102 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_52_1 (
- .A(\s$3707 ),
- .B(\s$3711 ),
- .CI(\s$3715 ),
- .CON(\con$4104 ),
- .SN(\sn$4106 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_53_0 (
- .A(pp_row53_6),
- .B(\c$3705 ),
- .CI(\c$3709 ),
- .CON(\con$4108 ),
- .SN(\sn$4110 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_53_1 (
- .A(\c$3713 ),
- .B(\s$3719 ),
- .CI(\s$3723 ),
- .CON(\con$4112 ),
- .SN(\sn$4114 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_54_0 (
- .A(pp_row54_5),
- .B(pp_row54_6),
- .CI(\c$3717 ),
- .CON(\con$4116 ),
- .SN(\sn$4118 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_54_1 (
- .A(\c$3721 ),
- .B(\s$3727 ),
- .CI(\s$3731 ),
- .CON(\con$4120 ),
- .SN(\sn$4122 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_55_0 (
- .A(pp_row55_3),
- .B(pp_row55_4),
- .CI(pp_row55_5),
- .CON(\con$4124 ),
- .SN(\sn$4126 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_55_1 (
- .A(\c$3725 ),
- .B(\c$3729 ),
- .CI(\s$3735 ),
- .CON(\con$4128 ),
- .SN(\sn$4130 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_56_0 (
- .A(pp_row56_2),
- .B(pp_row56_3),
- .CI(pp_row56_4),
- .CON(\con$4132 ),
- .SN(\sn$4134 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_56_1 (
- .A(pp_row56_5),
- .B(\c$3733 ),
- .CI(\s$3739 ),
- .CON(\con$4136 ),
- .SN(\sn$4138 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_57_0 (
- .A(pp_row57_0),
- .B(pp_row57_1),
- .CI(pp_row57_2),
- .CON(\con$4140 ),
- .SN(\sn$4142 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_57_1 (
- .A(pp_row57_3),
- .B(pp_row57_4),
- .CI(\c$3737 ),
- .CON(\con$4144 ),
- .SN(\sn$4146 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_58_0 (
- .A(1'h1),
- .B(pp_row58_1),
- .CI(pp_row58_2),
- .CON(\con$4148 ),
- .SN(\sn$4150 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_59_0 (
- .A(pp_row59_0),
- .B(pp_row59_1),
- .CI(pp_row59_2),
- .CON(\con$4156 ),
- .SN(\sn$4158 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_8_0 (
- .A(pp_row8_0),
- .B(pp_row8_1),
- .CI(pp_row8_2),
- .CON(\con$3748 ),
- .SN(\sn$3750 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_9_0 (
- .A(pp_row9_0),
- .B(pp_row9_1),
- .CI(pp_row9_2),
- .CON(\con$3756 ),
- .SN(\sn$3758 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_10_0 (
- .A(\c$3757 ),
- .B(\c$3761 ),
- .CI(\s$3767 ),
- .CON(\con$4188 ),
- .SN(\sn$4190 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_11_0 (
- .A(\c$3765 ),
- .B(\c$3769 ),
- .CI(\s$3775 ),
- .CON(\con$4192 ),
- .SN(\sn$4194 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_12_0 (
- .A(\c$3773 ),
- .B(\c$3777 ),
- .CI(\s$3783 ),
- .CON(\con$4196 ),
- .SN(\sn$4198 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_13_0 (
- .A(\c$3781 ),
- .B(\c$3785 ),
- .CI(\s$3791 ),
- .CON(\con$4200 ),
- .SN(\sn$4202 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_14_0 (
- .A(\c$3789 ),
- .B(\c$3793 ),
- .CI(\s$3799 ),
- .CON(\con$4204 ),
- .SN(\sn$4206 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_15_0 (
- .A(\c$3797 ),
- .B(\c$3801 ),
- .CI(\s$3807 ),
- .CON(\con$4208 ),
- .SN(\sn$4210 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_16_0 (
- .A(\c$3805 ),
- .B(\c$3809 ),
- .CI(\s$3815 ),
- .CON(\con$4212 ),
- .SN(\sn$4214 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_17_0 (
- .A(\c$3813 ),
- .B(\c$3817 ),
- .CI(\s$3823 ),
- .CON(\con$4216 ),
- .SN(\sn$4218 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_18_0 (
- .A(\c$3821 ),
- .B(\c$3825 ),
- .CI(\s$3831 ),
- .CON(\con$4220 ),
- .SN(\sn$4222 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_19_0 (
- .A(\c$3829 ),
- .B(\c$3833 ),
- .CI(\s$3839 ),
- .CON(\con$4224 ),
- .SN(\sn$4226 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_20_0 (
- .A(\c$3837 ),
- .B(\c$3841 ),
- .CI(\s$3847 ),
- .CON(\con$4228 ),
- .SN(\sn$4230 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_21_0 (
- .A(\c$3845 ),
- .B(\c$3849 ),
- .CI(\s$3855 ),
- .CON(\con$4232 ),
- .SN(\sn$4234 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_22_0 (
- .A(\c$3853 ),
- .B(\c$3857 ),
- .CI(\s$3863 ),
- .CON(\con$4236 ),
- .SN(\sn$4238 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_23_0 (
- .A(\c$3861 ),
- .B(\c$3865 ),
- .CI(\s$3871 ),
- .CON(\con$4240 ),
- .SN(\sn$4242 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_24_0 (
- .A(\c$3869 ),
- .B(\c$3873 ),
- .CI(\s$3879 ),
- .CON(\con$4244 ),
- .SN(\sn$4246 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_25_0 (
- .A(\c$3877 ),
- .B(\c$3881 ),
- .CI(\s$3887 ),
- .CON(\con$4248 ),
- .SN(\sn$4250 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_26_0 (
- .A(\c$3885 ),
- .B(\c$3889 ),
- .CI(\s$3895 ),
- .CON(\con$4252 ),
- .SN(\sn$4254 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_27_0 (
- .A(\c$3893 ),
- .B(\c$3897 ),
- .CI(\s$3903 ),
- .CON(\con$4256 ),
- .SN(\sn$4258 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_28_0 (
- .A(\c$3901 ),
- .B(\c$3905 ),
- .CI(\s$3911 ),
- .CON(\con$4260 ),
- .SN(\sn$4262 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_29_0 (
- .A(\c$3909 ),
- .B(\c$3913 ),
- .CI(\s$3919 ),
- .CON(\con$4264 ),
- .SN(\sn$4266 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_30_0 (
- .A(\c$3917 ),
- .B(\c$3921 ),
- .CI(\s$3927 ),
- .CON(\con$4268 ),
- .SN(\sn$4270 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_31_0 (
- .A(\c$3925 ),
- .B(\c$3929 ),
- .CI(\s$3935 ),
- .CON(\con$4272 ),
- .SN(\sn$4274 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_32_0 (
- .A(\c$3933 ),
- .B(\c$3937 ),
- .CI(\s$3943 ),
- .CON(\con$4276 ),
- .SN(\sn$4278 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_33_0 (
- .A(\c$3941 ),
- .B(\c$3945 ),
- .CI(\s$3951 ),
- .CON(\con$4280 ),
- .SN(\sn$4282 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_34_0 (
- .A(\c$3949 ),
- .B(\c$3953 ),
- .CI(\s$3959 ),
- .CON(\con$4284 ),
- .SN(\sn$4286 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_35_0 (
- .A(\c$3957 ),
- .B(\c$3961 ),
- .CI(\s$3967 ),
- .CON(\con$4288 ),
- .SN(\sn$4290 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_36_0 (
- .A(\c$3965 ),
- .B(\c$3969 ),
- .CI(\s$3975 ),
- .CON(\con$4292 ),
- .SN(\sn$4294 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_37_0 (
- .A(\c$3973 ),
- .B(\c$3977 ),
- .CI(\s$3983 ),
- .CON(\con$4296 ),
- .SN(\sn$4298 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_38_0 (
- .A(\c$3981 ),
- .B(\c$3985 ),
- .CI(\s$3991 ),
- .CON(\con$4300 ),
- .SN(\sn$4302 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_39_0 (
- .A(\c$3989 ),
- .B(\c$3993 ),
- .CI(\s$3999 ),
- .CON(\con$4304 ),
- .SN(\sn$4306 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_40_0 (
- .A(\c$3997 ),
- .B(\c$4001 ),
- .CI(\s$4007 ),
- .CON(\con$4308 ),
- .SN(\sn$4310 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_41_0 (
- .A(\c$4005 ),
- .B(\c$4009 ),
- .CI(\s$4015 ),
- .CON(\con$4312 ),
- .SN(\sn$4314 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_42_0 (
- .A(\c$4013 ),
- .B(\c$4017 ),
- .CI(\s$4023 ),
- .CON(\con$4316 ),
- .SN(\sn$4318 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_43_0 (
- .A(\c$4021 ),
- .B(\c$4025 ),
- .CI(\s$4031 ),
- .CON(\con$4320 ),
- .SN(\sn$4322 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_44_0 (
- .A(\c$4029 ),
- .B(\c$4033 ),
- .CI(\s$4039 ),
- .CON(\con$4324 ),
- .SN(\sn$4326 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_45_0 (
- .A(\c$4037 ),
- .B(\c$4041 ),
- .CI(\s$4047 ),
- .CON(\con$4328 ),
- .SN(\sn$4330 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_46_0 (
- .A(\c$4045 ),
- .B(\c$4049 ),
- .CI(\s$4055 ),
- .CON(\con$4332 ),
- .SN(\sn$4334 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_47_0 (
- .A(\c$4053 ),
- .B(\c$4057 ),
- .CI(\s$4063 ),
- .CON(\con$4336 ),
- .SN(\sn$4338 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_48_0 (
- .A(\c$4061 ),
- .B(\c$4065 ),
- .CI(\s$4071 ),
- .CON(\con$4340 ),
- .SN(\sn$4342 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_49_0 (
- .A(\c$4069 ),
- .B(\c$4073 ),
- .CI(\s$4079 ),
- .CON(\con$4344 ),
- .SN(\sn$4346 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_50_0 (
- .A(\c$4077 ),
- .B(\c$4081 ),
- .CI(\s$4087 ),
- .CON(\con$4348 ),
- .SN(\sn$4350 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_51_0 (
- .A(\c$4085 ),
- .B(\c$4089 ),
- .CI(\s$4095 ),
- .CON(\con$4352 ),
- .SN(\sn$4354 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_52_0 (
- .A(\c$4093 ),
- .B(\c$4097 ),
- .CI(\s$4103 ),
- .CON(\con$4356 ),
- .SN(\sn$4358 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_53_0 (
- .A(\c$4101 ),
- .B(\c$4105 ),
- .CI(\s$4111 ),
- .CON(\con$4360 ),
- .SN(\sn$4362 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_54_0 (
- .A(\c$4109 ),
- .B(\c$4113 ),
- .CI(\s$4119 ),
- .CON(\con$4364 ),
- .SN(\sn$4366 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_55_0 (
- .A(\c$4117 ),
- .B(\c$4121 ),
- .CI(\s$4127 ),
- .CON(\con$4368 ),
- .SN(\sn$4370 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_56_0 (
- .A(\c$4125 ),
- .B(\c$4129 ),
- .CI(\s$4135 ),
- .CON(\con$4372 ),
- .SN(\sn$4374 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_57_0 (
- .A(\c$4133 ),
- .B(\c$4137 ),
- .CI(\s$4143 ),
- .CON(\con$4376 ),
- .SN(\sn$4378 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_58_0 (
- .A(\c$4141 ),
- .B(\c$4145 ),
- .CI(\s$4151 ),
- .CON(\con$4380 ),
- .SN(\sn$4382 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_59_0 (
- .A(pp_row59_3),
- .B(\c$4149 ),
- .CI(\c$4153 ),
- .CON(\con$4384 ),
- .SN(\sn$4386 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_60_0 (
- .A(pp_row60_2),
- .B(pp_row60_3),
- .CI(\c$4157 ),
- .CON(\con$4388 ),
- .SN(\sn$4390 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_61_0 (
- .A(pp_row61_0),
- .B(pp_row61_1),
- .CI(pp_row61_2),
- .CON(\con$4392 ),
- .SN(\sn$4394 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_6_0 (
- .A(pp_row6_2),
- .B(pp_row6_3),
- .CI(pp_row6_4),
- .CON(\con$4172 ),
- .SN(\sn$4174 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_7_0 (
- .A(pp_row7_2),
- .B(pp_row7_3),
- .CI(\c$3741 ),
- .CON(\con$4176 ),
- .SN(\sn$4178 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_8_0 (
- .A(pp_row8_5),
- .B(\c$3745 ),
- .CI(\s$3751 ),
- .CON(\con$4180 ),
- .SN(\sn$4182 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_9_0 (
- .A(\c$3749 ),
- .B(\c$3753 ),
- .CI(\s$3759 ),
- .CON(\con$4184 ),
- .SN(\sn$4186 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_10_0 (
- .A(\s$3771 ),
- .B(\c$4185 ),
- .CI(\s$4191 ),
- .CON(\con$4416 ),
- .SN(\sn$4417 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_11_0 (
- .A(\s$3779 ),
- .B(\c$4189 ),
- .CI(\s$4195 ),
- .CON(\con$4418 ),
- .SN(\sn$4419 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_12_0 (
- .A(\s$3787 ),
- .B(\c$4193 ),
- .CI(\s$4199 ),
- .CON(\con$4420 ),
- .SN(\sn$4421 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_13_0 (
- .A(\s$3795 ),
- .B(\c$4197 ),
- .CI(\s$4203 ),
- .CON(\con$4422 ),
- .SN(\sn$4423 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_14_0 (
- .A(\s$3803 ),
- .B(\c$4201 ),
- .CI(\s$4207 ),
- .CON(\con$4424 ),
- .SN(\sn$4425 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_15_0 (
- .A(\s$3811 ),
- .B(\c$4205 ),
- .CI(\s$4211 ),
- .CON(\con$4426 ),
- .SN(\sn$4427 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_16_0 (
- .A(\s$3819 ),
- .B(\c$4209 ),
- .CI(\s$4215 ),
- .CON(\con$4428 ),
- .SN(\sn$4429 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_17_0 (
- .A(\s$3827 ),
- .B(\c$4213 ),
- .CI(\s$4219 ),
- .CON(\con$4430 ),
- .SN(\sn$4431 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_18_0 (
- .A(\s$3835 ),
- .B(\c$4217 ),
- .CI(\s$4223 ),
- .CON(\con$4432 ),
- .SN(\sn$4433 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_19_0 (
- .A(\s$3843 ),
- .B(\c$4221 ),
- .CI(\s$4227 ),
- .CON(\con$4434 ),
- .SN(\sn$4435 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_20_0 (
- .A(\s$3851 ),
- .B(\c$4225 ),
- .CI(\s$4231 ),
- .CON(\con$4436 ),
- .SN(\sn$4437 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_21_0 (
- .A(\s$3859 ),
- .B(\c$4229 ),
- .CI(\s$4235 ),
- .CON(\con$4438 ),
- .SN(\sn$4439 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_22_0 (
- .A(\s$3867 ),
- .B(\c$4233 ),
- .CI(\s$4239 ),
- .CON(\con$4440 ),
- .SN(\sn$4441 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_23_0 (
- .A(\s$3875 ),
- .B(\c$4237 ),
- .CI(\s$4243 ),
- .CON(\con$4442 ),
- .SN(\sn$4443 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_24_0 (
- .A(\s$3883 ),
- .B(\c$4241 ),
- .CI(\s$4247 ),
- .CON(\con$4444 ),
- .SN(\sn$4445 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_25_0 (
- .A(\s$3891 ),
- .B(\c$4245 ),
- .CI(\s$4251 ),
- .CON(\con$4446 ),
- .SN(\sn$4447 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_26_0 (
- .A(\s$3899 ),
- .B(\c$4249 ),
- .CI(\s$4255 ),
- .CON(\con$4448 ),
- .SN(\sn$4449 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_27_0 (
- .A(\s$3907 ),
- .B(\c$4253 ),
- .CI(\s$4259 ),
- .CON(\con$4450 ),
- .SN(\sn$4451 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_28_0 (
- .A(\s$3915 ),
- .B(\c$4257 ),
- .CI(\s$4263 ),
- .CON(\con$4452 ),
- .SN(\sn$4453 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_29_0 (
- .A(\s$3923 ),
- .B(\c$4261 ),
- .CI(\s$4267 ),
- .CON(\con$4454 ),
- .SN(\sn$4455 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_30_0 (
- .A(\s$3931 ),
- .B(\c$4265 ),
- .CI(\s$4271 ),
- .CON(\con$4456 ),
- .SN(\sn$4457 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_31_0 (
- .A(\s$3939 ),
- .B(\c$4269 ),
- .CI(\s$4275 ),
- .CON(\con$4458 ),
- .SN(\sn$4459 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_32_0 (
- .A(\s$3947 ),
- .B(\c$4273 ),
- .CI(\s$4279 ),
- .CON(\con$4460 ),
- .SN(\sn$4461 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_33_0 (
- .A(\s$3955 ),
- .B(\c$4277 ),
- .CI(\s$4283 ),
- .CON(\con$4462 ),
- .SN(\sn$4463 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_34_0 (
- .A(\s$3963 ),
- .B(\c$4281 ),
- .CI(\s$4287 ),
- .CON(\con$4464 ),
- .SN(\sn$4465 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_35_0 (
- .A(\s$3971 ),
- .B(\c$4285 ),
- .CI(\s$4291 ),
- .CON(\con$4466 ),
- .SN(\sn$4467 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_36_0 (
- .A(\s$3979 ),
- .B(\c$4289 ),
- .CI(\s$4295 ),
- .CON(\con$4468 ),
- .SN(\sn$4469 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_37_0 (
- .A(\s$3987 ),
- .B(\c$4293 ),
- .CI(\s$4299 ),
- .CON(\con$4470 ),
- .SN(\sn$4471 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_38_0 (
- .A(\s$3995 ),
- .B(\c$4297 ),
- .CI(\s$4303 ),
- .CON(\con$4472 ),
- .SN(\sn$4473 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_39_0 (
- .A(\s$4003 ),
- .B(\c$4301 ),
- .CI(\s$4307 ),
- .CON(\con$4474 ),
- .SN(\sn$4475 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_40_0 (
- .A(\s$4011 ),
- .B(\c$4305 ),
- .CI(\s$4311 ),
- .CON(\con$4476 ),
- .SN(\sn$4477 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_41_0 (
- .A(\s$4019 ),
- .B(\c$4309 ),
- .CI(\s$4315 ),
- .CON(\con$4478 ),
- .SN(\sn$4479 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_42_0 (
- .A(\s$4027 ),
- .B(\c$4313 ),
- .CI(\s$4319 ),
- .CON(\con$4480 ),
- .SN(\sn$4481 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_43_0 (
- .A(\s$4035 ),
- .B(\c$4317 ),
- .CI(\s$4323 ),
- .CON(\con$4482 ),
- .SN(\sn$4483 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_44_0 (
- .A(\s$4043 ),
- .B(\c$4321 ),
- .CI(\s$4327 ),
- .CON(\con$4484 ),
- .SN(\sn$4485 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_45_0 (
- .A(\s$4051 ),
- .B(\c$4325 ),
- .CI(\s$4331 ),
- .CON(\con$4486 ),
- .SN(\sn$4487 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_46_0 (
- .A(\s$4059 ),
- .B(\c$4329 ),
- .CI(\s$4335 ),
- .CON(\con$4488 ),
- .SN(\sn$4489 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_47_0 (
- .A(\s$4067 ),
- .B(\c$4333 ),
- .CI(\s$4339 ),
- .CON(\con$4490 ),
- .SN(\sn$4491 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_48_0 (
- .A(\s$4075 ),
- .B(\c$4337 ),
- .CI(\s$4343 ),
- .CON(\con$4492 ),
- .SN(\sn$4493 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_49_0 (
- .A(\s$4083 ),
- .B(\c$4341 ),
- .CI(\s$4347 ),
- .CON(\con$4494 ),
- .SN(\sn$4495 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_4_0 (
- .A(pp_row4_2),
- .B(pp_row4_3),
- .CI(\s$4167 ),
- .CON(\con$4404 ),
- .SN(\sn$4405 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_50_0 (
- .A(\s$4091 ),
- .B(\c$4345 ),
- .CI(\s$4351 ),
- .CON(\con$4496 ),
- .SN(\sn$4497 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_51_0 (
- .A(\s$4099 ),
- .B(\c$4349 ),
- .CI(\s$4355 ),
- .CON(\con$4498 ),
- .SN(\sn$4499 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_52_0 (
- .A(\s$4107 ),
- .B(\c$4353 ),
- .CI(\s$4359 ),
- .CON(\con$4500 ),
- .SN(\sn$4501 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_53_0 (
- .A(\s$4115 ),
- .B(\c$4357 ),
- .CI(\s$4363 ),
- .CON(\con$4502 ),
- .SN(\sn$4503 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_54_0 (
- .A(\s$4123 ),
- .B(\c$4361 ),
- .CI(\s$4367 ),
- .CON(\con$4504 ),
- .SN(\sn$4505 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_55_0 (
- .A(\s$4131 ),
- .B(\c$4365 ),
- .CI(\s$4371 ),
- .CON(\con$4506 ),
- .SN(\sn$4507 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_56_0 (
- .A(\s$4139 ),
- .B(\c$4369 ),
- .CI(\s$4375 ),
- .CON(\con$4508 ),
- .SN(\sn$4509 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_57_0 (
- .A(\s$4147 ),
- .B(\c$4373 ),
- .CI(\s$4379 ),
- .CON(\con$4510 ),
- .SN(\sn$4511 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_58_0 (
- .A(\s$4155 ),
- .B(\c$4377 ),
- .CI(\s$4383 ),
- .CON(\con$4512 ),
- .SN(\sn$4513 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_59_0 (
- .A(\s$4159 ),
- .B(\c$4381 ),
- .CI(\s$4387 ),
- .CON(\con$4514 ),
- .SN(\sn$4515 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_5_0 (
- .A(pp_row5_2),
- .B(\c$4165 ),
- .CI(\s$4171 ),
- .CON(\con$4406 ),
- .SN(\sn$4407 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_60_0 (
- .A(\s$4163 ),
- .B(\c$4385 ),
- .CI(\s$4391 ),
- .CON(\con$4516 ),
- .SN(\sn$4517 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_61_0 (
- .A(\c$4161 ),
- .B(\c$4389 ),
- .CI(\s$4395 ),
- .CON(\con$4518 ),
- .SN(\sn$4519 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_62_0 (
- .A(pp_row62_2),
- .B(\c$4393 ),
- .CI(\s$4399 ),
- .CON(\con$4520 ),
- .SN(\sn$4521 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_63_0 (
- .A(pp_row63_0),
- .B(pp_row63_1),
- .CI(\c$4397 ),
- .CON(\con$4522 ),
- .SN(\sn$4523 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_6_0 (
- .A(\s$3743 ),
- .B(\c$4169 ),
- .CI(\s$4175 ),
- .CON(\con$4408 ),
- .SN(\sn$4409 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_7_0 (
- .A(\s$3747 ),
- .B(\c$4173 ),
- .CI(\s$4179 ),
- .CON(\con$4410 ),
- .SN(\sn$4411 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_8_0 (
- .A(\s$3755 ),
- .B(\c$4177 ),
- .CI(\s$4183 ),
- .CON(\con$4412 ),
- .SN(\sn$4413 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_9_0 (
- .A(\s$3763 ),
- .B(\c$4181 ),
- .CI(\s$4187 ),
- .CON(\con$4414 ),
- .SN(\sn$4415 )
- );
- HAxp5_ASAP7_75t_R dadda_ha_0_24_0 (
- .A(pp_row24_0),
- .B(pp_row24_1),
- .CON(con),
- .SN(sn)
- );
- HAxp5_ASAP7_75t_R dadda_ha_0_25_0 (
- .A(pp_row25_0),
- .B(pp_row25_1),
- .CON(\con$2556 ),
- .SN(\sn$2558 )
- );
- HAxp5_ASAP7_75t_R dadda_ha_0_26_1 (
- .A(pp_row26_3),
- .B(pp_row26_4),
- .CON(\con$2564 ),
- .SN(\sn$2566 )
- );
- HAxp5_ASAP7_75t_R dadda_ha_0_27_1 (
- .A(pp_row27_3),
- .B(pp_row27_4),
- .CON(\con$2572 ),
- .SN(\sn$2574 )
- );
- HAxp5_ASAP7_75t_R dadda_ha_0_28_2 (
- .A(pp_row28_6),
- .B(pp_row28_7),
- .CON(\con$2584 ),
- .SN(\sn$2586 )
- );
- HAxp5_ASAP7_75t_R dadda_ha_0_29_2 (
- .A(pp_row29_6),
- .B(pp_row29_7),
- .CON(\con$2596 ),
- .SN(\sn$2598 )
- );
- HAxp5_ASAP7_75t_R dadda_ha_0_30_3 (
- .A(pp_row30_9),
- .B(pp_row30_10),
- .CON(\con$2612 ),
- .SN(\sn$2614 )
- );
- HAxp5_ASAP7_75t_R dadda_ha_0_31_3 (
- .A(pp_row31_9),
- .B(pp_row31_10),
- .CON(\con$2628 ),
- .SN(\sn$2630 )
- );
- HAxp5_ASAP7_75t_R dadda_ha_0_36_3 (
- .A(pp_row36_9),
- .B(pp_row36_10),
- .CON(\con$2708 ),
- .SN(\sn$2710 )
- );
- HAxp5_ASAP7_75t_R dadda_ha_0_38_2 (
- .A(pp_row38_6),
- .B(pp_row38_7),
- .CON(\con$2732 ),
- .SN(\sn$2734 )
- );
- HAxp5_ASAP7_75t_R dadda_ha_0_40_1 (
- .A(pp_row40_3),
- .B(pp_row40_4),
- .CON(\con$2748 ),
- .SN(\sn$2750 )
- );
- HAxp5_ASAP7_75t_R dadda_ha_0_42_0 (
- .A(1'h1),
- .B(pp_row42_1),
- .CON(\con$2756 ),
- .SN(\sn$2758 )
- );
- HAxp5_ASAP7_75t_R dadda_ha_1_16_0 (
- .A(pp_row16_0),
- .B(pp_row16_1),
- .CON(\con$2760 ),
- .SN(\sn$2762 )
- );
- HAxp5_ASAP7_75t_R dadda_ha_1_17_0 (
- .A(pp_row17_0),
- .B(pp_row17_1),
- .CON(\con$2764 ),
- .SN(\sn$2766 )
- );
- HAxp5_ASAP7_75t_R dadda_ha_1_18_1 (
- .A(pp_row18_3),
- .B(pp_row18_4),
- .CON(\con$2772 ),
- .SN(\sn$2774 )
- );
- HAxp5_ASAP7_75t_R dadda_ha_1_19_1 (
- .A(pp_row19_3),
- .B(pp_row19_4),
- .CON(\con$2780 ),
- .SN(\sn$2782 )
- );
- HAxp5_ASAP7_75t_R dadda_ha_1_20_2 (
- .A(pp_row20_6),
- .B(pp_row20_7),
- .CON(\con$2792 ),
- .SN(\sn$2794 )
- );
- HAxp5_ASAP7_75t_R dadda_ha_1_21_2 (
- .A(pp_row21_6),
- .B(pp_row21_7),
- .CON(\con$2804 ),
- .SN(\sn$2806 )
- );
- HAxp5_ASAP7_75t_R dadda_ha_1_22_3 (
- .A(pp_row22_9),
- .B(pp_row22_10),
- .CON(\con$2820 ),
- .SN(\sn$2822 )
- );
- HAxp5_ASAP7_75t_R dadda_ha_1_23_3 (
- .A(pp_row23_9),
- .B(pp_row23_10),
- .CON(\con$2836 ),
- .SN(\sn$2838 )
- );
- HAxp5_ASAP7_75t_R dadda_ha_1_44_3 (
- .A(pp_row44_9),
- .B(pp_row44_10),
- .CON(\con$3172 ),
- .SN(\sn$3174 )
- );
- HAxp5_ASAP7_75t_R dadda_ha_1_46_2 (
- .A(pp_row46_6),
- .B(pp_row46_7),
- .CON(\con$3196 ),
- .SN(\sn$3198 )
- );
- HAxp5_ASAP7_75t_R dadda_ha_1_48_1 (
- .A(pp_row48_3),
- .B(pp_row48_4),
- .CON(\con$3212 ),
- .SN(\sn$3214 )
- );
- HAxp5_ASAP7_75t_R dadda_ha_1_50_0 (
- .A(1'h1),
- .B(pp_row50_1),
- .CON(\con$3220 ),
- .SN(\sn$3222 )
- );
- HAxp5_ASAP7_75t_R dadda_ha_2_10_0 (
- .A(pp_row10_0),
- .B(pp_row10_1),
- .CON(\con$3224 ),
- .SN(\sn$3226 )
- );
- HAxp5_ASAP7_75t_R dadda_ha_2_11_0 (
- .A(pp_row11_0),
- .B(pp_row11_1),
- .CON(\con$3228 ),
- .SN(\sn$3230 )
- );
- HAxp5_ASAP7_75t_R dadda_ha_2_12_1 (
- .A(pp_row12_3),
- .B(pp_row12_4),
- .CON(\con$3236 ),
- .SN(\sn$3238 )
- );
- HAxp5_ASAP7_75t_R dadda_ha_2_13_1 (
- .A(pp_row13_3),
- .B(pp_row13_4),
- .CON(\con$3244 ),
- .SN(\sn$3246 )
- );
- HAxp5_ASAP7_75t_R dadda_ha_2_14_2 (
- .A(pp_row14_6),
- .B(pp_row14_7),
- .CON(\con$3256 ),
- .SN(\sn$3258 )
- );
- HAxp5_ASAP7_75t_R dadda_ha_2_15_2 (
- .A(pp_row15_6),
- .B(pp_row15_7),
- .CON(\con$3268 ),
- .SN(\sn$3270 )
- );
- HAxp5_ASAP7_75t_R dadda_ha_2_52_2 (
- .A(pp_row52_6),
- .B(pp_row52_7),
- .CON(\con$3712 ),
- .SN(\sn$3714 )
- );
- HAxp5_ASAP7_75t_R dadda_ha_2_54_1 (
- .A(pp_row54_3),
- .B(pp_row54_4),
- .CON(\con$3728 ),
- .SN(\sn$3730 )
- );
- HAxp5_ASAP7_75t_R dadda_ha_2_56_0 (
- .A(1'h1),
- .B(pp_row56_1),
- .CON(\con$3736 ),
- .SN(\sn$3738 )
- );
- HAxp5_ASAP7_75t_R dadda_ha_3_58_1 (
- .A(pp_row58_3),
- .B(pp_row58_4),
- .CON(\con$4152 ),
- .SN(\sn$4154 )
- );
- HAxp5_ASAP7_75t_R dadda_ha_3_60_0 (
- .A(1'h1),
- .B(pp_row60_1),
- .CON(\con$4160 ),
- .SN(\sn$4162 )
- );
- HAxp5_ASAP7_75t_R dadda_ha_3_6_0 (
- .A(pp_row6_0),
- .B(pp_row6_1),
- .CON(\con$3740 ),
- .SN(\sn$3742 )
- );
- HAxp5_ASAP7_75t_R dadda_ha_3_7_0 (
- .A(pp_row7_0),
- .B(pp_row7_1),
- .CON(\con$3744 ),
- .SN(\sn$3746 )
- );
- HAxp5_ASAP7_75t_R dadda_ha_3_8_1 (
- .A(pp_row8_3),
- .B(pp_row8_4),
- .CON(\con$3752 ),
- .SN(\sn$3754 )
- );
- HAxp5_ASAP7_75t_R dadda_ha_3_9_1 (
- .A(pp_row9_3),
- .B(pp_row9_4),
- .CON(\con$3760 ),
- .SN(\sn$3762 )
- );
- HAxp5_ASAP7_75t_R dadda_ha_4_4_0 (
- .A(pp_row4_0),
- .B(pp_row4_1),
- .CON(\con$4164 ),
- .SN(\sn$4166 )
- );
- HAxp5_ASAP7_75t_R dadda_ha_4_5_0 (
- .A(pp_row5_0),
- .B(pp_row5_1),
- .CON(\con$4168 ),
- .SN(\sn$4170 )
- );
- HAxp5_ASAP7_75t_R dadda_ha_4_62_0 (
- .A(1'h1),
- .B(pp_row62_1),
- .CON(\con$4396 ),
- .SN(\sn$4398 )
- );
- HAxp5_ASAP7_75t_R dadda_ha_5_2_0 (
- .A(pp_row2_0),
- .B(pp_row2_1),
- .CON(\con$4400 ),
- .SN(\sn$4401 )
- );
- HAxp5_ASAP7_75t_R dadda_ha_5_3_0 (
- .A(pp_row3_0),
- .B(pp_row3_1),
- .CON(\con$4402 ),
- .SN(\sn$4403 )
- );
- HAxp5_ASAP7_75t_R dadda_ha_5_64_0 (
- .A(1'h1),
- .B(pp_row64_1),
- .CON(\con$4524 ),
- .SN(\sn$4525 )
- );
- \multiplier.final_adder final_adder (
- .a(final_a_registered),
- .b(final_b_registered),
- .\port$901$0 (\$54 ),
- .\port$902$0 (\$55 ),
- .\port$903$0 (\$56 ),
- .\port$904$0 (\$57 ),
- .\port$905$0 (\$58 ),
- .\port$906$0 (\$59 ),
- .\port$907$0 (\$60 ),
- .\port$908$0 (\$61 ),
- .\port$909$0 (\$62 ),
- .\port$910$0 (\$63 ),
- .\port$911$0 (\$64 ),
- .\port$912$0 (\$65 ),
- .\port$913$0 (\$66 ),
- .\port$914$0 (\$67 ),
- .\port$915$0 (\$68 ),
- .\port$916$0 (\$69 ),
- .\port$917$0 (\$70 ),
- .\port$918$0 (\$71 ),
- .\port$919$0 (\$72 ),
- .\port$920$0 (\$73 ),
- .\port$921$0 (\$74 ),
- .\port$922$0 (\$75 ),
- .\port$923$0 (\$76 ),
- .\port$924$0 (\$77 ),
- .\port$925$0 (\$78 ),
- .\port$926$0 (\$79 ),
- .\port$927$0 (\$80 ),
- .\port$928$0 (\$81 ),
- .\port$929$0 (\$82 ),
- .\port$930$0 (\$83 ),
- .\port$931$0 (\$84 ),
- .\port$932$0 (\$85 ),
- .\port$933$0 (\$86 ),
- .\port$934$0 (\$87 ),
- .\port$935$0 (\$88 ),
- .\port$936$0 (\$89 ),
- .\port$937$0 (\$90 ),
- .\port$938$0 (\$91 ),
- .\port$939$0 (\$92 ),
- .\port$940$0 (\$93 ),
- .\port$941$0 (\$94 ),
- .\port$942$0 (\$95 ),
- .\port$943$0 (\$96 ),
- .\port$944$0 (\$97 ),
- .\port$945$0 (\$98 ),
- .\port$946$0 (\$99 ),
- .\port$947$0 (\$100 ),
- .\port$948$0 (\$101 ),
- .\port$949$0 (\$102 ),
- .\port$950$0 (\$103 ),
- .\port$951$0 (\$104 ),
- .\port$952$0 (\$105 ),
- .\port$953$0 (\$106 ),
- .\port$954$0 (\$107 ),
- .\port$955$0 (\$108 ),
- .\port$956$0 (\$109 ),
- .\port$957$0 (\$110 ),
- .\port$958$0 (\$111 ),
- .\port$959$0 (\$112 ),
- .\port$960$0 (\$113 ),
- .\port$961$0 (\$114 ),
- .\port$962$0 (\$115 ),
- .\port$963$0 (\$116 ),
- .\port$964$0 (\$117 )
- );
- assign booth_block0_sign = a_registered[1];
- assign booth_block2_sign = a_registered[3];
- assign booth_block4_sign = a_registered[5];
- assign booth_block6_sign = a_registered[7];
- assign booth_block8_sign = a_registered[9];
- assign booth_block10_sign = a_registered[11];
- assign booth_block12_sign = a_registered[13];
- assign booth_block14_sign = a_registered[15];
- assign booth_block16_sign = a_registered[17];
- assign booth_block18_sign = a_registered[19];
- assign booth_block20_sign = a_registered[21];
- assign booth_block22_sign = a_registered[23];
- assign booth_block24_sign = a_registered[25];
- assign booth_block26_sign = a_registered[27];
- assign booth_block28_sign = a_registered[29];
- assign booth_block30_sign = a_registered[31];
- assign result_registered = o;
- assign result = { \$117 , \$116 , \$115 , \$114 , \$113 , \$112 , \$111 , \$110 , \$109 , \$108 , \$107 , \$106 , \$105 , \$104 , \$103 , \$102 , \$101 , \$100 , \$99 , \$98 , \$97 , \$96 , \$95 , \$94 , \$93 , \$92 , \$91 , \$90 , \$89 , \$88 , \$87 , \$86 , \$85 , \$84 , \$83 , \$82 , \$81 , \$80 , \$79 , \$78 , \$77 , \$76 , \$75 , \$74 , \$73 , \$72 , \$71 , \$70 , \$69 , \$68 , \$67 , \$66 , \$65 , \$64 , \$63 , \$62 , \$61 , \$60 , \$59 , \$58 , \$57 , \$56 , \$55 , \$54 };
- assign multiplier = { 2'h0, a_registered, 1'h0 };
- assign multiplicand = { 1'h0, b_registered, 1'h0 };
- assign booth_block0 = { a_registered[1:0], 1'h0 };
- assign booth_block0_sel = { sel_1, sel_0 };
- assign booth_block0_mand0 = { b_registered[0], 1'h0 };
- assign booth_block0_mand1 = b_registered[1:0];
- assign booth_block0_mand2 = b_registered[2:1];
- assign booth_block0_mand3 = b_registered[3:2];
- assign booth_block0_mand4 = b_registered[4:3];
- assign booth_block0_mand5 = b_registered[5:4];
- assign booth_block0_mand6 = b_registered[6:5];
- assign booth_block0_mand7 = b_registered[7:6];
- assign booth_block0_mand8 = b_registered[8:7];
- assign booth_block0_mand9 = b_registered[9:8];
- assign booth_block0_mand10 = b_registered[10:9];
- assign booth_block0_mand11 = b_registered[11:10];
- assign booth_block0_mand12 = b_registered[12:11];
- assign booth_block0_mand13 = b_registered[13:12];
- assign booth_block0_mand14 = b_registered[14:13];
- assign booth_block0_mand15 = b_registered[15:14];
- assign booth_block0_mand16 = b_registered[16:15];
- assign booth_block0_mand17 = b_registered[17:16];
- assign booth_block0_mand18 = b_registered[18:17];
- assign booth_block0_mand19 = b_registered[19:18];
- assign booth_block0_mand20 = b_registered[20:19];
- assign booth_block0_mand21 = b_registered[21:20];
- assign booth_block0_mand22 = b_registered[22:21];
- assign booth_block0_mand23 = b_registered[23:22];
- assign booth_block0_mand24 = b_registered[24:23];
- assign booth_block0_mand25 = b_registered[25:24];
- assign booth_block0_mand26 = b_registered[26:25];
- assign booth_block0_mand27 = b_registered[27:26];
- assign booth_block0_mand28 = b_registered[28:27];
- assign booth_block0_mand29 = b_registered[29:28];
- assign booth_block0_mand30 = b_registered[30:29];
- assign booth_block0_mand31 = b_registered[31:30];
- assign booth_block0_mand32 = { 1'h0, b_registered[31] };
- assign booth_block2 = a_registered[3:1];
- assign booth_block2_sel = { \sel_1$1366 , \sel_0$1365 };
- assign booth_block2_mand0 = { b_registered[0], 1'h0 };
- assign booth_block2_mand1 = b_registered[1:0];
- assign booth_block2_mand2 = b_registered[2:1];
- assign booth_block2_mand3 = b_registered[3:2];
- assign booth_block2_mand4 = b_registered[4:3];
- assign booth_block2_mand5 = b_registered[5:4];
- assign booth_block2_mand6 = b_registered[6:5];
- assign booth_block2_mand7 = b_registered[7:6];
- assign booth_block2_mand8 = b_registered[8:7];
- assign booth_block2_mand9 = b_registered[9:8];
- assign booth_block2_mand10 = b_registered[10:9];
- assign booth_block2_mand11 = b_registered[11:10];
- assign booth_block2_mand12 = b_registered[12:11];
- assign booth_block2_mand13 = b_registered[13:12];
- assign booth_block2_mand14 = b_registered[14:13];
- assign booth_block2_mand15 = b_registered[15:14];
- assign booth_block2_mand16 = b_registered[16:15];
- assign booth_block2_mand17 = b_registered[17:16];
- assign booth_block2_mand18 = b_registered[18:17];
- assign booth_block2_mand19 = b_registered[19:18];
- assign booth_block2_mand20 = b_registered[20:19];
- assign booth_block2_mand21 = b_registered[21:20];
- assign booth_block2_mand22 = b_registered[22:21];
- assign booth_block2_mand23 = b_registered[23:22];
- assign booth_block2_mand24 = b_registered[24:23];
- assign booth_block2_mand25 = b_registered[25:24];
- assign booth_block2_mand26 = b_registered[26:25];
- assign booth_block2_mand27 = b_registered[27:26];
- assign booth_block2_mand28 = b_registered[28:27];
- assign booth_block2_mand29 = b_registered[29:28];
- assign booth_block2_mand30 = b_registered[30:29];
- assign booth_block2_mand31 = b_registered[31:30];
- assign booth_block2_mand32 = { 1'h0, b_registered[31] };
- assign booth_block4 = a_registered[5:3];
- assign booth_block4_sel = { \sel_1$1403 , \sel_0$1402 };
- assign booth_block4_mand0 = { b_registered[0], 1'h0 };
- assign booth_block4_mand1 = b_registered[1:0];
- assign booth_block4_mand2 = b_registered[2:1];
- assign booth_block4_mand3 = b_registered[3:2];
- assign booth_block4_mand4 = b_registered[4:3];
- assign booth_block4_mand5 = b_registered[5:4];
- assign booth_block4_mand6 = b_registered[6:5];
- assign booth_block4_mand7 = b_registered[7:6];
- assign booth_block4_mand8 = b_registered[8:7];
- assign booth_block4_mand9 = b_registered[9:8];
- assign booth_block4_mand10 = b_registered[10:9];
- assign booth_block4_mand11 = b_registered[11:10];
- assign booth_block4_mand12 = b_registered[12:11];
- assign booth_block4_mand13 = b_registered[13:12];
- assign booth_block4_mand14 = b_registered[14:13];
- assign booth_block4_mand15 = b_registered[15:14];
- assign booth_block4_mand16 = b_registered[16:15];
- assign booth_block4_mand17 = b_registered[17:16];
- assign booth_block4_mand18 = b_registered[18:17];
- assign booth_block4_mand19 = b_registered[19:18];
- assign booth_block4_mand20 = b_registered[20:19];
- assign booth_block4_mand21 = b_registered[21:20];
- assign booth_block4_mand22 = b_registered[22:21];
- assign booth_block4_mand23 = b_registered[23:22];
- assign booth_block4_mand24 = b_registered[24:23];
- assign booth_block4_mand25 = b_registered[25:24];
- assign booth_block4_mand26 = b_registered[26:25];
- assign booth_block4_mand27 = b_registered[27:26];
- assign booth_block4_mand28 = b_registered[28:27];
- assign booth_block4_mand29 = b_registered[29:28];
- assign booth_block4_mand30 = b_registered[30:29];
- assign booth_block4_mand31 = b_registered[31:30];
- assign booth_block4_mand32 = { 1'h0, b_registered[31] };
- assign booth_block6 = a_registered[7:5];
- assign booth_block6_sel = { \sel_1$1440 , \sel_0$1439 };
- assign booth_block6_mand0 = { b_registered[0], 1'h0 };
- assign booth_block6_mand1 = b_registered[1:0];
- assign booth_block6_mand2 = b_registered[2:1];
- assign booth_block6_mand3 = b_registered[3:2];
- assign booth_block6_mand4 = b_registered[4:3];
- assign booth_block6_mand5 = b_registered[5:4];
- assign booth_block6_mand6 = b_registered[6:5];
- assign booth_block6_mand7 = b_registered[7:6];
- assign booth_block6_mand8 = b_registered[8:7];
- assign booth_block6_mand9 = b_registered[9:8];
- assign booth_block6_mand10 = b_registered[10:9];
- assign booth_block6_mand11 = b_registered[11:10];
- assign booth_block6_mand12 = b_registered[12:11];
- assign booth_block6_mand13 = b_registered[13:12];
- assign booth_block6_mand14 = b_registered[14:13];
- assign booth_block6_mand15 = b_registered[15:14];
- assign booth_block6_mand16 = b_registered[16:15];
- assign booth_block6_mand17 = b_registered[17:16];
- assign booth_block6_mand18 = b_registered[18:17];
- assign booth_block6_mand19 = b_registered[19:18];
- assign booth_block6_mand20 = b_registered[20:19];
- assign booth_block6_mand21 = b_registered[21:20];
- assign booth_block6_mand22 = b_registered[22:21];
- assign booth_block6_mand23 = b_registered[23:22];
- assign booth_block6_mand24 = b_registered[24:23];
- assign booth_block6_mand25 = b_registered[25:24];
- assign booth_block6_mand26 = b_registered[26:25];
- assign booth_block6_mand27 = b_registered[27:26];
- assign booth_block6_mand28 = b_registered[28:27];
- assign booth_block6_mand29 = b_registered[29:28];
- assign booth_block6_mand30 = b_registered[30:29];
- assign booth_block6_mand31 = b_registered[31:30];
- assign booth_block6_mand32 = { 1'h0, b_registered[31] };
- assign booth_block8 = a_registered[9:7];
- assign booth_block8_sel = { \sel_1$1477 , \sel_0$1476 };
- assign booth_block8_mand0 = { b_registered[0], 1'h0 };
- assign booth_block8_mand1 = b_registered[1:0];
- assign booth_block8_mand2 = b_registered[2:1];
- assign booth_block8_mand3 = b_registered[3:2];
- assign booth_block8_mand4 = b_registered[4:3];
- assign booth_block8_mand5 = b_registered[5:4];
- assign booth_block8_mand6 = b_registered[6:5];
- assign booth_block8_mand7 = b_registered[7:6];
- assign booth_block8_mand8 = b_registered[8:7];
- assign booth_block8_mand9 = b_registered[9:8];
- assign booth_block8_mand10 = b_registered[10:9];
- assign booth_block8_mand11 = b_registered[11:10];
- assign booth_block8_mand12 = b_registered[12:11];
- assign booth_block8_mand13 = b_registered[13:12];
- assign booth_block8_mand14 = b_registered[14:13];
- assign booth_block8_mand15 = b_registered[15:14];
- assign booth_block8_mand16 = b_registered[16:15];
- assign booth_block8_mand17 = b_registered[17:16];
- assign booth_block8_mand18 = b_registered[18:17];
- assign booth_block8_mand19 = b_registered[19:18];
- assign booth_block8_mand20 = b_registered[20:19];
- assign booth_block8_mand21 = b_registered[21:20];
- assign booth_block8_mand22 = b_registered[22:21];
- assign booth_block8_mand23 = b_registered[23:22];
- assign booth_block8_mand24 = b_registered[24:23];
- assign booth_block8_mand25 = b_registered[25:24];
- assign booth_block8_mand26 = b_registered[26:25];
- assign booth_block8_mand27 = b_registered[27:26];
- assign booth_block8_mand28 = b_registered[28:27];
- assign booth_block8_mand29 = b_registered[29:28];
- assign booth_block8_mand30 = b_registered[30:29];
- assign booth_block8_mand31 = b_registered[31:30];
- assign booth_block8_mand32 = { 1'h0, b_registered[31] };
- assign booth_block10 = a_registered[11:9];
- assign booth_block10_sel = { \sel_1$1514 , \sel_0$1513 };
- assign booth_block10_mand0 = { b_registered[0], 1'h0 };
- assign booth_block10_mand1 = b_registered[1:0];
- assign booth_block10_mand2 = b_registered[2:1];
- assign booth_block10_mand3 = b_registered[3:2];
- assign booth_block10_mand4 = b_registered[4:3];
- assign booth_block10_mand5 = b_registered[5:4];
- assign booth_block10_mand6 = b_registered[6:5];
- assign booth_block10_mand7 = b_registered[7:6];
- assign booth_block10_mand8 = b_registered[8:7];
- assign booth_block10_mand9 = b_registered[9:8];
- assign booth_block10_mand10 = b_registered[10:9];
- assign booth_block10_mand11 = b_registered[11:10];
- assign booth_block10_mand12 = b_registered[12:11];
- assign booth_block10_mand13 = b_registered[13:12];
- assign booth_block10_mand14 = b_registered[14:13];
- assign booth_block10_mand15 = b_registered[15:14];
- assign booth_block10_mand16 = b_registered[16:15];
- assign booth_block10_mand17 = b_registered[17:16];
- assign booth_block10_mand18 = b_registered[18:17];
- assign booth_block10_mand19 = b_registered[19:18];
- assign booth_block10_mand20 = b_registered[20:19];
- assign booth_block10_mand21 = b_registered[21:20];
- assign booth_block10_mand22 = b_registered[22:21];
- assign booth_block10_mand23 = b_registered[23:22];
- assign booth_block10_mand24 = b_registered[24:23];
- assign booth_block10_mand25 = b_registered[25:24];
- assign booth_block10_mand26 = b_registered[26:25];
- assign booth_block10_mand27 = b_registered[27:26];
- assign booth_block10_mand28 = b_registered[28:27];
- assign booth_block10_mand29 = b_registered[29:28];
- assign booth_block10_mand30 = b_registered[30:29];
- assign booth_block10_mand31 = b_registered[31:30];
- assign booth_block10_mand32 = { 1'h0, b_registered[31] };
- assign booth_block12 = a_registered[13:11];
- assign booth_block12_sel = { \sel_1$1551 , \sel_0$1550 };
- assign booth_block12_mand0 = { b_registered[0], 1'h0 };
- assign booth_block12_mand1 = b_registered[1:0];
- assign booth_block12_mand2 = b_registered[2:1];
- assign booth_block12_mand3 = b_registered[3:2];
- assign booth_block12_mand4 = b_registered[4:3];
- assign booth_block12_mand5 = b_registered[5:4];
- assign booth_block12_mand6 = b_registered[6:5];
- assign booth_block12_mand7 = b_registered[7:6];
- assign booth_block12_mand8 = b_registered[8:7];
- assign booth_block12_mand9 = b_registered[9:8];
- assign booth_block12_mand10 = b_registered[10:9];
- assign booth_block12_mand11 = b_registered[11:10];
- assign booth_block12_mand12 = b_registered[12:11];
- assign booth_block12_mand13 = b_registered[13:12];
- assign booth_block12_mand14 = b_registered[14:13];
- assign booth_block12_mand15 = b_registered[15:14];
- assign booth_block12_mand16 = b_registered[16:15];
- assign booth_block12_mand17 = b_registered[17:16];
- assign booth_block12_mand18 = b_registered[18:17];
- assign booth_block12_mand19 = b_registered[19:18];
- assign booth_block12_mand20 = b_registered[20:19];
- assign booth_block12_mand21 = b_registered[21:20];
- assign booth_block12_mand22 = b_registered[22:21];
- assign booth_block12_mand23 = b_registered[23:22];
- assign booth_block12_mand24 = b_registered[24:23];
- assign booth_block12_mand25 = b_registered[25:24];
- assign booth_block12_mand26 = b_registered[26:25];
- assign booth_block12_mand27 = b_registered[27:26];
- assign booth_block12_mand28 = b_registered[28:27];
- assign booth_block12_mand29 = b_registered[29:28];
- assign booth_block12_mand30 = b_registered[30:29];
- assign booth_block12_mand31 = b_registered[31:30];
- assign booth_block12_mand32 = { 1'h0, b_registered[31] };
- assign booth_block14 = a_registered[15:13];
- assign booth_block14_sel = { \sel_1$1588 , \sel_0$1587 };
- assign booth_block14_mand0 = { b_registered[0], 1'h0 };
- assign booth_block14_mand1 = b_registered[1:0];
- assign booth_block14_mand2 = b_registered[2:1];
- assign booth_block14_mand3 = b_registered[3:2];
- assign booth_block14_mand4 = b_registered[4:3];
- assign booth_block14_mand5 = b_registered[5:4];
- assign booth_block14_mand6 = b_registered[6:5];
- assign booth_block14_mand7 = b_registered[7:6];
- assign booth_block14_mand8 = b_registered[8:7];
- assign booth_block14_mand9 = b_registered[9:8];
- assign booth_block14_mand10 = b_registered[10:9];
- assign booth_block14_mand11 = b_registered[11:10];
- assign booth_block14_mand12 = b_registered[12:11];
- assign booth_block14_mand13 = b_registered[13:12];
- assign booth_block14_mand14 = b_registered[14:13];
- assign booth_block14_mand15 = b_registered[15:14];
- assign booth_block14_mand16 = b_registered[16:15];
- assign booth_block14_mand17 = b_registered[17:16];
- assign booth_block14_mand18 = b_registered[18:17];
- assign booth_block14_mand19 = b_registered[19:18];
- assign booth_block14_mand20 = b_registered[20:19];
- assign booth_block14_mand21 = b_registered[21:20];
- assign booth_block14_mand22 = b_registered[22:21];
- assign booth_block14_mand23 = b_registered[23:22];
- assign booth_block14_mand24 = b_registered[24:23];
- assign booth_block14_mand25 = b_registered[25:24];
- assign booth_block14_mand26 = b_registered[26:25];
- assign booth_block14_mand27 = b_registered[27:26];
- assign booth_block14_mand28 = b_registered[28:27];
- assign booth_block14_mand29 = b_registered[29:28];
- assign booth_block14_mand30 = b_registered[30:29];
- assign booth_block14_mand31 = b_registered[31:30];
- assign booth_block14_mand32 = { 1'h0, b_registered[31] };
- assign booth_block16 = a_registered[17:15];
- assign booth_block16_sel = { \sel_1$1625 , \sel_0$1624 };
- assign booth_block16_mand0 = { b_registered[0], 1'h0 };
- assign booth_block16_mand1 = b_registered[1:0];
- assign booth_block16_mand2 = b_registered[2:1];
- assign booth_block16_mand3 = b_registered[3:2];
- assign booth_block16_mand4 = b_registered[4:3];
- assign booth_block16_mand5 = b_registered[5:4];
- assign booth_block16_mand6 = b_registered[6:5];
- assign booth_block16_mand7 = b_registered[7:6];
- assign booth_block16_mand8 = b_registered[8:7];
- assign booth_block16_mand9 = b_registered[9:8];
- assign booth_block16_mand10 = b_registered[10:9];
- assign booth_block16_mand11 = b_registered[11:10];
- assign booth_block16_mand12 = b_registered[12:11];
- assign booth_block16_mand13 = b_registered[13:12];
- assign booth_block16_mand14 = b_registered[14:13];
- assign booth_block16_mand15 = b_registered[15:14];
- assign booth_block16_mand16 = b_registered[16:15];
- assign booth_block16_mand17 = b_registered[17:16];
- assign booth_block16_mand18 = b_registered[18:17];
- assign booth_block16_mand19 = b_registered[19:18];
- assign booth_block16_mand20 = b_registered[20:19];
- assign booth_block16_mand21 = b_registered[21:20];
- assign booth_block16_mand22 = b_registered[22:21];
- assign booth_block16_mand23 = b_registered[23:22];
- assign booth_block16_mand24 = b_registered[24:23];
- assign booth_block16_mand25 = b_registered[25:24];
- assign booth_block16_mand26 = b_registered[26:25];
- assign booth_block16_mand27 = b_registered[27:26];
- assign booth_block16_mand28 = b_registered[28:27];
- assign booth_block16_mand29 = b_registered[29:28];
- assign booth_block16_mand30 = b_registered[30:29];
- assign booth_block16_mand31 = b_registered[31:30];
- assign booth_block16_mand32 = { 1'h0, b_registered[31] };
- assign booth_block18 = a_registered[19:17];
- assign booth_block18_sel = { \sel_1$1662 , \sel_0$1661 };
- assign booth_block18_mand0 = { b_registered[0], 1'h0 };
- assign booth_block18_mand1 = b_registered[1:0];
- assign booth_block18_mand2 = b_registered[2:1];
- assign booth_block18_mand3 = b_registered[3:2];
- assign booth_block18_mand4 = b_registered[4:3];
- assign booth_block18_mand5 = b_registered[5:4];
- assign booth_block18_mand6 = b_registered[6:5];
- assign booth_block18_mand7 = b_registered[7:6];
- assign booth_block18_mand8 = b_registered[8:7];
- assign booth_block18_mand9 = b_registered[9:8];
- assign booth_block18_mand10 = b_registered[10:9];
- assign booth_block18_mand11 = b_registered[11:10];
- assign booth_block18_mand12 = b_registered[12:11];
- assign booth_block18_mand13 = b_registered[13:12];
- assign booth_block18_mand14 = b_registered[14:13];
- assign booth_block18_mand15 = b_registered[15:14];
- assign booth_block18_mand16 = b_registered[16:15];
- assign booth_block18_mand17 = b_registered[17:16];
- assign booth_block18_mand18 = b_registered[18:17];
- assign booth_block18_mand19 = b_registered[19:18];
- assign booth_block18_mand20 = b_registered[20:19];
- assign booth_block18_mand21 = b_registered[21:20];
- assign booth_block18_mand22 = b_registered[22:21];
- assign booth_block18_mand23 = b_registered[23:22];
- assign booth_block18_mand24 = b_registered[24:23];
- assign booth_block18_mand25 = b_registered[25:24];
- assign booth_block18_mand26 = b_registered[26:25];
- assign booth_block18_mand27 = b_registered[27:26];
- assign booth_block18_mand28 = b_registered[28:27];
- assign booth_block18_mand29 = b_registered[29:28];
- assign booth_block18_mand30 = b_registered[30:29];
- assign booth_block18_mand31 = b_registered[31:30];
- assign booth_block18_mand32 = { 1'h0, b_registered[31] };
- assign booth_block20 = a_registered[21:19];
- assign booth_block20_sel = { \sel_1$1699 , \sel_0$1698 };
- assign booth_block20_mand0 = { b_registered[0], 1'h0 };
- assign booth_block20_mand1 = b_registered[1:0];
- assign booth_block20_mand2 = b_registered[2:1];
- assign booth_block20_mand3 = b_registered[3:2];
- assign booth_block20_mand4 = b_registered[4:3];
- assign booth_block20_mand5 = b_registered[5:4];
- assign booth_block20_mand6 = b_registered[6:5];
- assign booth_block20_mand7 = b_registered[7:6];
- assign booth_block20_mand8 = b_registered[8:7];
- assign booth_block20_mand9 = b_registered[9:8];
- assign booth_block20_mand10 = b_registered[10:9];
- assign booth_block20_mand11 = b_registered[11:10];
- assign booth_block20_mand12 = b_registered[12:11];
- assign booth_block20_mand13 = b_registered[13:12];
- assign booth_block20_mand14 = b_registered[14:13];
- assign booth_block20_mand15 = b_registered[15:14];
- assign booth_block20_mand16 = b_registered[16:15];
- assign booth_block20_mand17 = b_registered[17:16];
- assign booth_block20_mand18 = b_registered[18:17];
- assign booth_block20_mand19 = b_registered[19:18];
- assign booth_block20_mand20 = b_registered[20:19];
- assign booth_block20_mand21 = b_registered[21:20];
- assign booth_block20_mand22 = b_registered[22:21];
- assign booth_block20_mand23 = b_registered[23:22];
- assign booth_block20_mand24 = b_registered[24:23];
- assign booth_block20_mand25 = b_registered[25:24];
- assign booth_block20_mand26 = b_registered[26:25];
- assign booth_block20_mand27 = b_registered[27:26];
- assign booth_block20_mand28 = b_registered[28:27];
- assign booth_block20_mand29 = b_registered[29:28];
- assign booth_block20_mand30 = b_registered[30:29];
- assign booth_block20_mand31 = b_registered[31:30];
- assign booth_block20_mand32 = { 1'h0, b_registered[31] };
- assign booth_block22 = a_registered[23:21];
- assign booth_block22_sel = { \sel_1$1736 , \sel_0$1735 };
- assign booth_block22_mand0 = { b_registered[0], 1'h0 };
- assign booth_block22_mand1 = b_registered[1:0];
- assign booth_block22_mand2 = b_registered[2:1];
- assign booth_block22_mand3 = b_registered[3:2];
- assign booth_block22_mand4 = b_registered[4:3];
- assign booth_block22_mand5 = b_registered[5:4];
- assign booth_block22_mand6 = b_registered[6:5];
- assign booth_block22_mand7 = b_registered[7:6];
- assign booth_block22_mand8 = b_registered[8:7];
- assign booth_block22_mand9 = b_registered[9:8];
- assign booth_block22_mand10 = b_registered[10:9];
- assign booth_block22_mand11 = b_registered[11:10];
- assign booth_block22_mand12 = b_registered[12:11];
- assign booth_block22_mand13 = b_registered[13:12];
- assign booth_block22_mand14 = b_registered[14:13];
- assign booth_block22_mand15 = b_registered[15:14];
- assign booth_block22_mand16 = b_registered[16:15];
- assign booth_block22_mand17 = b_registered[17:16];
- assign booth_block22_mand18 = b_registered[18:17];
- assign booth_block22_mand19 = b_registered[19:18];
- assign booth_block22_mand20 = b_registered[20:19];
- assign booth_block22_mand21 = b_registered[21:20];
- assign booth_block22_mand22 = b_registered[22:21];
- assign booth_block22_mand23 = b_registered[23:22];
- assign booth_block22_mand24 = b_registered[24:23];
- assign booth_block22_mand25 = b_registered[25:24];
- assign booth_block22_mand26 = b_registered[26:25];
- assign booth_block22_mand27 = b_registered[27:26];
- assign booth_block22_mand28 = b_registered[28:27];
- assign booth_block22_mand29 = b_registered[29:28];
- assign booth_block22_mand30 = b_registered[30:29];
- assign booth_block22_mand31 = b_registered[31:30];
- assign booth_block22_mand32 = { 1'h0, b_registered[31] };
- assign booth_block24 = a_registered[25:23];
- assign booth_block24_sel = { \sel_1$1773 , \sel_0$1772 };
- assign booth_block24_mand0 = { b_registered[0], 1'h0 };
- assign booth_block24_mand1 = b_registered[1:0];
- assign booth_block24_mand2 = b_registered[2:1];
- assign booth_block24_mand3 = b_registered[3:2];
- assign booth_block24_mand4 = b_registered[4:3];
- assign booth_block24_mand5 = b_registered[5:4];
- assign booth_block24_mand6 = b_registered[6:5];
- assign booth_block24_mand7 = b_registered[7:6];
- assign booth_block24_mand8 = b_registered[8:7];
- assign booth_block24_mand9 = b_registered[9:8];
- assign booth_block24_mand10 = b_registered[10:9];
- assign booth_block24_mand11 = b_registered[11:10];
- assign booth_block24_mand12 = b_registered[12:11];
- assign booth_block24_mand13 = b_registered[13:12];
- assign booth_block24_mand14 = b_registered[14:13];
- assign booth_block24_mand15 = b_registered[15:14];
- assign booth_block24_mand16 = b_registered[16:15];
- assign booth_block24_mand17 = b_registered[17:16];
- assign booth_block24_mand18 = b_registered[18:17];
- assign booth_block24_mand19 = b_registered[19:18];
- assign booth_block24_mand20 = b_registered[20:19];
- assign booth_block24_mand21 = b_registered[21:20];
- assign booth_block24_mand22 = b_registered[22:21];
- assign booth_block24_mand23 = b_registered[23:22];
- assign booth_block24_mand24 = b_registered[24:23];
- assign booth_block24_mand25 = b_registered[25:24];
- assign booth_block24_mand26 = b_registered[26:25];
- assign booth_block24_mand27 = b_registered[27:26];
- assign booth_block24_mand28 = b_registered[28:27];
- assign booth_block24_mand29 = b_registered[29:28];
- assign booth_block24_mand30 = b_registered[30:29];
- assign booth_block24_mand31 = b_registered[31:30];
- assign booth_block24_mand32 = { 1'h0, b_registered[31] };
- assign booth_block26 = a_registered[27:25];
- assign booth_block26_sel = { \sel_1$1810 , \sel_0$1809 };
- assign booth_block26_mand0 = { b_registered[0], 1'h0 };
- assign booth_block26_mand1 = b_registered[1:0];
- assign booth_block26_mand2 = b_registered[2:1];
- assign booth_block26_mand3 = b_registered[3:2];
- assign booth_block26_mand4 = b_registered[4:3];
- assign booth_block26_mand5 = b_registered[5:4];
- assign booth_block26_mand6 = b_registered[6:5];
- assign booth_block26_mand7 = b_registered[7:6];
- assign booth_block26_mand8 = b_registered[8:7];
- assign booth_block26_mand9 = b_registered[9:8];
- assign booth_block26_mand10 = b_registered[10:9];
- assign booth_block26_mand11 = b_registered[11:10];
- assign booth_block26_mand12 = b_registered[12:11];
- assign booth_block26_mand13 = b_registered[13:12];
- assign booth_block26_mand14 = b_registered[14:13];
- assign booth_block26_mand15 = b_registered[15:14];
- assign booth_block26_mand16 = b_registered[16:15];
- assign booth_block26_mand17 = b_registered[17:16];
- assign booth_block26_mand18 = b_registered[18:17];
- assign booth_block26_mand19 = b_registered[19:18];
- assign booth_block26_mand20 = b_registered[20:19];
- assign booth_block26_mand21 = b_registered[21:20];
- assign booth_block26_mand22 = b_registered[22:21];
- assign booth_block26_mand23 = b_registered[23:22];
- assign booth_block26_mand24 = b_registered[24:23];
- assign booth_block26_mand25 = b_registered[25:24];
- assign booth_block26_mand26 = b_registered[26:25];
- assign booth_block26_mand27 = b_registered[27:26];
- assign booth_block26_mand28 = b_registered[28:27];
- assign booth_block26_mand29 = b_registered[29:28];
- assign booth_block26_mand30 = b_registered[30:29];
- assign booth_block26_mand31 = b_registered[31:30];
- assign booth_block26_mand32 = { 1'h0, b_registered[31] };
- assign booth_block28 = a_registered[29:27];
- assign booth_block28_sel = { \sel_1$1847 , \sel_0$1846 };
- assign booth_block28_mand0 = { b_registered[0], 1'h0 };
- assign booth_block28_mand1 = b_registered[1:0];
- assign booth_block28_mand2 = b_registered[2:1];
- assign booth_block28_mand3 = b_registered[3:2];
- assign booth_block28_mand4 = b_registered[4:3];
- assign booth_block28_mand5 = b_registered[5:4];
- assign booth_block28_mand6 = b_registered[6:5];
- assign booth_block28_mand7 = b_registered[7:6];
- assign booth_block28_mand8 = b_registered[8:7];
- assign booth_block28_mand9 = b_registered[9:8];
- assign booth_block28_mand10 = b_registered[10:9];
- assign booth_block28_mand11 = b_registered[11:10];
- assign booth_block28_mand12 = b_registered[12:11];
- assign booth_block28_mand13 = b_registered[13:12];
- assign booth_block28_mand14 = b_registered[14:13];
- assign booth_block28_mand15 = b_registered[15:14];
- assign booth_block28_mand16 = b_registered[16:15];
- assign booth_block28_mand17 = b_registered[17:16];
- assign booth_block28_mand18 = b_registered[18:17];
- assign booth_block28_mand19 = b_registered[19:18];
- assign booth_block28_mand20 = b_registered[20:19];
- assign booth_block28_mand21 = b_registered[21:20];
- assign booth_block28_mand22 = b_registered[22:21];
- assign booth_block28_mand23 = b_registered[23:22];
- assign booth_block28_mand24 = b_registered[24:23];
- assign booth_block28_mand25 = b_registered[25:24];
- assign booth_block28_mand26 = b_registered[26:25];
- assign booth_block28_mand27 = b_registered[27:26];
- assign booth_block28_mand28 = b_registered[28:27];
- assign booth_block28_mand29 = b_registered[29:28];
- assign booth_block28_mand30 = b_registered[30:29];
- assign booth_block28_mand31 = b_registered[31:30];
- assign booth_block28_mand32 = { 1'h0, b_registered[31] };
- assign booth_block30 = a_registered[31:29];
- assign booth_block30_sel = { \sel_1$1884 , \sel_0$1883 };
- assign booth_block30_mand0 = { b_registered[0], 1'h0 };
- assign booth_block30_mand1 = b_registered[1:0];
- assign booth_block30_mand2 = b_registered[2:1];
- assign booth_block30_mand3 = b_registered[3:2];
- assign booth_block30_mand4 = b_registered[4:3];
- assign booth_block30_mand5 = b_registered[5:4];
- assign booth_block30_mand6 = b_registered[6:5];
- assign booth_block30_mand7 = b_registered[7:6];
- assign booth_block30_mand8 = b_registered[8:7];
- assign booth_block30_mand9 = b_registered[9:8];
- assign booth_block30_mand10 = b_registered[10:9];
- assign booth_block30_mand11 = b_registered[11:10];
- assign booth_block30_mand12 = b_registered[12:11];
- assign booth_block30_mand13 = b_registered[13:12];
- assign booth_block30_mand14 = b_registered[14:13];
- assign booth_block30_mand15 = b_registered[15:14];
- assign booth_block30_mand16 = b_registered[16:15];
- assign booth_block30_mand17 = b_registered[17:16];
- assign booth_block30_mand18 = b_registered[18:17];
- assign booth_block30_mand19 = b_registered[19:18];
- assign booth_block30_mand20 = b_registered[20:19];
- assign booth_block30_mand21 = b_registered[21:20];
- assign booth_block30_mand22 = b_registered[22:21];
- assign booth_block30_mand23 = b_registered[23:22];
- assign booth_block30_mand24 = b_registered[24:23];
- assign booth_block30_mand25 = b_registered[25:24];
- assign booth_block30_mand26 = b_registered[26:25];
- assign booth_block30_mand27 = b_registered[27:26];
- assign booth_block30_mand28 = b_registered[28:27];
- assign booth_block30_mand29 = b_registered[29:28];
- assign booth_block30_mand30 = b_registered[30:29];
- assign booth_block30_mand31 = b_registered[31:30];
- assign booth_block30_mand32 = { 1'h0, b_registered[31] };
- assign booth_block32 = { 2'h0, a_registered[31] };
- assign booth_block32_sign = 1'h0;
- assign booth_block32_sel = { \sel_1$1922 , \sel_0$1921 };
- assign booth_block32_mand0 = { b_registered[0], 1'h0 };
- assign booth_block32_mand1 = b_registered[1:0];
- assign booth_block32_mand2 = b_registered[2:1];
- assign booth_block32_mand3 = b_registered[3:2];
- assign booth_block32_mand4 = b_registered[4:3];
- assign booth_block32_mand5 = b_registered[5:4];
- assign booth_block32_mand6 = b_registered[6:5];
- assign booth_block32_mand7 = b_registered[7:6];
- assign booth_block32_mand8 = b_registered[8:7];
- assign booth_block32_mand9 = b_registered[9:8];
- assign booth_block32_mand10 = b_registered[10:9];
- assign booth_block32_mand11 = b_registered[11:10];
- assign booth_block32_mand12 = b_registered[12:11];
- assign booth_block32_mand13 = b_registered[13:12];
- assign booth_block32_mand14 = b_registered[14:13];
- assign booth_block32_mand15 = b_registered[15:14];
- assign booth_block32_mand16 = b_registered[16:15];
- assign booth_block32_mand17 = b_registered[17:16];
- assign booth_block32_mand18 = b_registered[18:17];
- assign booth_block32_mand19 = b_registered[19:18];
- assign booth_block32_mand20 = b_registered[20:19];
- assign booth_block32_mand21 = b_registered[21:20];
- assign booth_block32_mand22 = b_registered[22:21];
- assign booth_block32_mand23 = b_registered[23:22];
- assign booth_block32_mand24 = b_registered[24:23];
- assign booth_block32_mand25 = b_registered[25:24];
- assign booth_block32_mand26 = b_registered[26:25];
- assign booth_block32_mand27 = b_registered[27:26];
- assign booth_block32_mand28 = b_registered[28:27];
- assign booth_block32_mand29 = b_registered[29:28];
- assign booth_block32_mand30 = b_registered[30:29];
- assign booth_block32_mand31 = b_registered[31:30];
- assign booth_block32_mand32 = { 1'h0, b_registered[31] };
- assign pp_row36_0 = 1'h1;
- assign pp_row38_0 = 1'h1;
- assign pp_row40_0 = 1'h1;
- assign pp_row42_0 = 1'h1;
- assign pp_row44_0 = 1'h1;
- assign pp_row46_0 = 1'h1;
- assign pp_row48_0 = 1'h1;
- assign pp_row50_0 = 1'h1;
- assign pp_row52_0 = 1'h1;
- assign pp_row54_0 = 1'h1;
- assign pp_row56_0 = 1'h1;
- assign pp_row58_0 = 1'h1;
- assign pp_row60_0 = 1'h1;
- assign pp_row62_0 = 1'h1;
- assign pp_row64_0 = 1'h1;
- assign \a$1971 = final_a_registered;
- assign \b$1972 = final_b_registered;
- assign \o$1973 = { \$117 , \$116 , \$115 , \$114 , \$113 , \$112 , \$111 , \$110 , \$109 , \$108 , \$107 , \$106 , \$105 , \$104 , \$103 , \$102 , \$101 , \$100 , \$99 , \$98 , \$97 , \$96 , \$95 , \$94 , \$93 , \$92 , \$91 , \$90 , \$89 , \$88 , \$87 , \$86 , \$85 , \$84 , \$83 , \$82 , \$81 , \$80 , \$79 , \$78 , \$77 , \$76 , \$75 , \$74 , \$73 , \$72 , \$71 , \$70 , \$69 , \$68 , \$67 , \$66 , \$65 , \$64 , \$63 , \$62 , \$61 , \$60 , \$59 , \$58 , \$57 , \$56 , \$55 , \$54 };
- assign notblock = { \$3 , \$2 , \$1 };
- assign \notblock$2008 = { \$6 , \$5 , \$4 };
- assign \notblock$2042 = { \$9 , \$8 , \$7 };
- assign \notblock$2076 = { \$12 , \$11 , \$10 };
- assign \notblock$2110 = { \$15 , \$14 , \$13 };
- assign \notblock$2144 = { \$18 , \$17 , \$16 };
- assign \notblock$2178 = { \$21 , \$20 , \$19 };
- assign \notblock$2212 = { \$24 , \$23 , \$22 };
- assign \notblock$2246 = { \$27 , \$26 , \$25 };
- assign \notblock$2280 = { \$30 , \$29 , \$28 };
- assign \notblock$2314 = { \$33 , \$32 , \$31 };
- assign \notblock$2348 = { \$36 , \$35 , \$34 };
- assign \notblock$2382 = { \$39 , \$38 , \$37 };
- assign \notblock$2416 = { \$42 , \$41 , \$40 };
- assign \notblock$2450 = { \$45 , \$44 , \$43 };
- assign \notblock$2484 = { \$48 , \$47 , \$46 };
- assign \notblock$2518 = { \$51 , \$50 , \$49 };
-endmodule
-
-module \multiplier.final_adder (\port$902$0 , \port$903$0 , \port$904$0 , \port$905$0 , \port$906$0 , \port$907$0 , \port$908$0 , \port$909$0 , \port$910$0 , \port$911$0 , \port$912$0 , \port$913$0 , \port$914$0 , \port$915$0 , \port$916$0 , \port$917$0 , \port$918$0 , \port$919$0 , \port$920$0 , \port$921$0 , \port$922$0
-, \port$923$0 , \port$924$0 , \port$925$0 , \port$926$0 , \port$927$0 , \port$928$0 , \port$929$0 , \port$930$0 , \port$931$0 , \port$932$0 , \port$933$0 , \port$934$0 , \port$935$0 , \port$936$0 , \port$937$0 , \port$938$0 , \port$939$0 , \port$940$0 , \port$941$0 , \port$942$0 , \port$943$0
-, \port$944$0 , \port$945$0 , \port$946$0 , \port$947$0 , \port$948$0 , \port$949$0 , \port$950$0 , \port$951$0 , \port$952$0 , \port$953$0 , \port$954$0 , \port$955$0 , \port$956$0 , \port$957$0 , \port$958$0 , \port$959$0 , \port$960$0 , \port$961$0 , \port$962$0 , \port$963$0 , \port$964$0
-, a, b, \port$901$0 );
- wire \$1 ;
- wire \$10 ;
- wire \$11 ;
- wire \$12 ;
- wire \$13 ;
- wire \$14 ;
- wire \$15 ;
- wire \$16 ;
- wire \$17 ;
- wire \$18 ;
- wire \$19 ;
- wire \$2 ;
- wire \$20 ;
- wire \$21 ;
- wire \$22 ;
- wire \$23 ;
- wire \$24 ;
- wire \$25 ;
- wire \$26 ;
- wire \$27 ;
- wire \$28 ;
- wire \$29 ;
- wire \$3 ;
- wire \$30 ;
- wire \$31 ;
- wire \$32 ;
- wire \$33 ;
- wire \$34 ;
- wire \$35 ;
- wire \$36 ;
- wire \$37 ;
- wire \$38 ;
- wire \$39 ;
- wire \$4 ;
- wire \$40 ;
- wire \$41 ;
- wire \$42 ;
- wire \$43 ;
- wire \$44 ;
- wire \$45 ;
- wire \$46 ;
- wire \$47 ;
- wire \$48 ;
- wire \$49 ;
- wire \$5 ;
- wire \$50 ;
- wire \$51 ;
- wire \$52 ;
- wire \$53 ;
- wire \$54 ;
- wire \$55 ;
- wire \$56 ;
- wire \$57 ;
- wire \$58 ;
- wire \$59 ;
- wire \$6 ;
- wire \$60 ;
- wire \$61 ;
- wire \$62 ;
- wire \$63 ;
- wire \$64 ;
- wire \$65 ;
- wire \$66 ;
- wire \$7 ;
- wire \$8 ;
- wire \$9 ;
- wire \$signal ;
- wire \$signal$10 ;
- wire \$signal$100 ;
- wire \$signal$101 ;
- wire \$signal$102 ;
- wire \$signal$103 ;
- wire \$signal$104 ;
- wire \$signal$105 ;
- wire \$signal$106 ;
- wire \$signal$107 ;
- wire \$signal$108 ;
- wire \$signal$109 ;
- wire \$signal$11 ;
- wire \$signal$110 ;
- wire \$signal$111 ;
- wire \$signal$112 ;
- wire \$signal$113 ;
- wire \$signal$114 ;
- wire \$signal$115 ;
- wire \$signal$116 ;
- wire \$signal$117 ;
- wire \$signal$118 ;
- wire \$signal$119 ;
- wire \$signal$12 ;
- wire \$signal$120 ;
- wire \$signal$121 ;
- wire \$signal$122 ;
- wire \$signal$123 ;
- wire \$signal$124 ;
- wire \$signal$125 ;
- wire \$signal$126 ;
- wire \$signal$127 ;
- wire \$signal$128 ;
- wire \$signal$129 ;
- wire \$signal$13 ;
- wire \$signal$130 ;
- wire \$signal$131 ;
- wire \$signal$14 ;
- wire \$signal$15 ;
- wire \$signal$16 ;
- wire \$signal$17 ;
- wire \$signal$18 ;
- wire \$signal$19 ;
- wire \$signal$20 ;
- wire \$signal$21 ;
- wire \$signal$22 ;
- wire \$signal$23 ;
- wire \$signal$24 ;
- wire \$signal$25 ;
- wire \$signal$26 ;
- wire \$signal$263 ;
- wire \$signal$264 ;
- wire \$signal$265 ;
- wire \$signal$266 ;
- wire \$signal$267 ;
- wire \$signal$268 ;
- wire \$signal$269 ;
- wire \$signal$27 ;
- wire \$signal$270 ;
- wire \$signal$271 ;
- wire \$signal$272 ;
- wire \$signal$273 ;
- wire \$signal$274 ;
- wire \$signal$275 ;
- wire \$signal$276 ;
- wire \$signal$277 ;
- wire \$signal$278 ;
- wire \$signal$279 ;
- wire \$signal$28 ;
- wire \$signal$280 ;
- wire \$signal$281 ;
- wire \$signal$282 ;
- wire \$signal$283 ;
- wire \$signal$284 ;
- wire \$signal$285 ;
- wire \$signal$286 ;
- wire \$signal$287 ;
- wire \$signal$288 ;
- wire \$signal$289 ;
- wire \$signal$29 ;
- wire \$signal$290 ;
- wire \$signal$291 ;
- wire \$signal$292 ;
- wire \$signal$293 ;
- wire \$signal$294 ;
- wire \$signal$295 ;
- wire \$signal$296 ;
- wire \$signal$297 ;
- wire \$signal$298 ;
- wire \$signal$299 ;
- wire \$signal$30 ;
- wire \$signal$300 ;
- wire \$signal$301 ;
- wire \$signal$302 ;
- wire \$signal$303 ;
- wire \$signal$304 ;
- wire \$signal$305 ;
- wire \$signal$306 ;
- wire \$signal$307 ;
- wire \$signal$308 ;
- wire \$signal$309 ;
- wire \$signal$31 ;
- wire \$signal$310 ;
- wire \$signal$311 ;
- wire \$signal$312 ;
- wire \$signal$313 ;
- wire \$signal$314 ;
- wire \$signal$315 ;
- wire \$signal$316 ;
- wire \$signal$317 ;
- wire \$signal$318 ;
- wire \$signal$319 ;
- wire \$signal$32 ;
- wire \$signal$320 ;
- wire \$signal$321 ;
- wire \$signal$322 ;
- wire \$signal$323 ;
- wire \$signal$324 ;
- wire \$signal$325 ;
- wire \$signal$326 ;
- wire \$signal$33 ;
- wire \$signal$34 ;
- wire \$signal$35 ;
- wire \$signal$36 ;
- wire \$signal$37 ;
- wire \$signal$38 ;
- wire \$signal$39 ;
- wire \$signal$40 ;
- wire \$signal$41 ;
- wire \$signal$42 ;
- wire \$signal$43 ;
- wire \$signal$44 ;
- wire \$signal$45 ;
- wire \$signal$46 ;
- wire \$signal$47 ;
- wire \$signal$48 ;
- wire \$signal$49 ;
- wire \$signal$5 ;
- wire \$signal$50 ;
- wire \$signal$51 ;
- wire \$signal$52 ;
- wire \$signal$53 ;
- wire \$signal$54 ;
- wire \$signal$55 ;
- wire \$signal$56 ;
- wire \$signal$57 ;
- wire \$signal$58 ;
- wire \$signal$59 ;
- wire \$signal$6 ;
- wire \$signal$60 ;
- wire \$signal$61 ;
- wire \$signal$62 ;
- wire \$signal$63 ;
- wire \$signal$64 ;
- wire \$signal$65 ;
- wire \$signal$66 ;
- wire \$signal$67 ;
- wire \$signal$68 ;
- wire \$signal$69 ;
- wire \$signal$7 ;
- wire \$signal$70 ;
- wire \$signal$71 ;
- wire \$signal$72 ;
- wire \$signal$73 ;
- wire \$signal$74 ;
- wire \$signal$75 ;
- wire \$signal$76 ;
- wire \$signal$77 ;
- wire \$signal$78 ;
- wire \$signal$79 ;
- wire \$signal$8 ;
- wire \$signal$80 ;
- wire \$signal$81 ;
- wire \$signal$82 ;
- wire \$signal$83 ;
- wire \$signal$84 ;
- wire \$signal$85 ;
- wire \$signal$86 ;
- wire \$signal$87 ;
- wire \$signal$88 ;
- wire \$signal$89 ;
- wire \$signal$9 ;
- wire \$signal$90 ;
- wire \$signal$91 ;
- wire \$signal$92 ;
- wire \$signal$93 ;
- wire \$signal$94 ;
- wire \$signal$95 ;
- wire \$signal$96 ;
- wire \$signal$97 ;
- wire \$signal$98 ;
- wire \$signal$99 ;
- input [63:0] a;
- wire [63:0] a;
- wire [63:0] \a$1 ;
- input [63:0] b;
- wire [63:0] b;
- wire [63:0] \b$3 ;
- wire con;
- wire \con$137 ;
- wire \con$139 ;
- wire \con$141 ;
- wire \con$143 ;
- wire \con$145 ;
- wire \con$147 ;
- wire \con$149 ;
- wire \con$151 ;
- wire \con$153 ;
- wire \con$155 ;
- wire \con$157 ;
- wire \con$159 ;
- wire \con$161 ;
- wire \con$163 ;
- wire \con$165 ;
- wire \con$167 ;
- wire \con$169 ;
- wire \con$171 ;
- wire \con$173 ;
- wire \con$175 ;
- wire \con$177 ;
- wire \con$179 ;
- wire \con$181 ;
- wire \con$183 ;
- wire \con$185 ;
- wire \con$187 ;
- wire \con$189 ;
- wire \con$191 ;
- wire \con$193 ;
- wire \con$195 ;
- wire \con$197 ;
- wire \con$199 ;
- wire \con$201 ;
- wire \con$203 ;
- wire \con$205 ;
- wire \con$207 ;
- wire \con$209 ;
- wire \con$211 ;
- wire \con$213 ;
- wire \con$215 ;
- wire \con$217 ;
- wire \con$219 ;
- wire \con$221 ;
- wire \con$223 ;
- wire \con$225 ;
- wire \con$227 ;
- wire \con$229 ;
- wire \con$231 ;
- wire \con$233 ;
- wire \con$235 ;
- wire \con$237 ;
- wire \con$239 ;
- wire \con$241 ;
- wire \con$243 ;
- wire \con$245 ;
- wire \con$247 ;
- wire \con$249 ;
- wire \con$251 ;
- wire \con$253 ;
- wire \con$255 ;
- wire \con$257 ;
- wire \con$259 ;
- wire \con$261 ;
- wire g_new;
- wire \g_new$330 ;
- wire \g_new$333 ;
- wire \g_new$334 ;
- wire \g_new$337 ;
- wire \g_new$338 ;
- wire \g_new$341 ;
- wire \g_new$342 ;
- wire \g_new$345 ;
- wire \g_new$346 ;
- wire \g_new$349 ;
- wire \g_new$350 ;
- wire \g_new$353 ;
- wire \g_new$354 ;
- wire \g_new$357 ;
- wire \g_new$358 ;
- wire \g_new$361 ;
- wire \g_new$362 ;
- wire \g_new$365 ;
- wire \g_new$366 ;
- wire \g_new$369 ;
- wire \g_new$370 ;
- wire \g_new$373 ;
- wire \g_new$374 ;
- wire \g_new$377 ;
- wire \g_new$378 ;
- wire \g_new$381 ;
- wire \g_new$382 ;
- wire \g_new$385 ;
- wire \g_new$386 ;
- wire \g_new$389 ;
- wire \g_new$390 ;
- wire \g_new$393 ;
- wire \g_new$394 ;
- wire \g_new$397 ;
- wire \g_new$398 ;
- wire \g_new$401 ;
- wire \g_new$402 ;
- wire \g_new$405 ;
- wire \g_new$406 ;
- wire \g_new$409 ;
- wire \g_new$410 ;
- wire \g_new$413 ;
- wire \g_new$414 ;
- wire \g_new$417 ;
- wire \g_new$418 ;
- wire \g_new$421 ;
- wire \g_new$422 ;
- wire \g_new$425 ;
- wire \g_new$426 ;
- wire \g_new$429 ;
- wire \g_new$430 ;
- wire \g_new$433 ;
- wire \g_new$434 ;
- wire \g_new$437 ;
- wire \g_new$438 ;
- wire \g_new$441 ;
- wire \g_new$442 ;
- wire \g_new$445 ;
- wire \g_new$446 ;
- wire \g_new$449 ;
- wire \g_new$450 ;
- wire \g_new$451 ;
- wire \g_new$452 ;
- wire \g_new$453 ;
- wire \g_new$454 ;
- wire \g_new$455 ;
- wire \g_new$456 ;
- wire \g_new$457 ;
- wire \g_new$458 ;
- wire \g_new$459 ;
- wire \g_new$460 ;
- wire \g_new$461 ;
- wire \g_new$462 ;
- wire \g_new$463 ;
- wire \g_new$464 ;
- wire \g_new$465 ;
- wire \g_new$466 ;
- wire \g_new$467 ;
- wire \g_new$468 ;
- wire \g_new$469 ;
- wire \g_new$470 ;
- wire \g_new$471 ;
- wire \g_new$472 ;
- wire \g_new$473 ;
- wire \g_new$474 ;
- wire \g_new$475 ;
- wire \g_new$476 ;
- wire \g_new$477 ;
- wire \g_new$478 ;
- wire \g_new$479 ;
- wire \g_new$480 ;
- wire \g_new$481 ;
- wire \g_new$482 ;
- wire \g_new$483 ;
- wire \g_new$484 ;
- wire \g_new$485 ;
- wire \g_new$486 ;
- wire \g_new$487 ;
- wire \g_new$488 ;
- wire \g_new$489 ;
- wire \g_new$490 ;
- wire \g_new$491 ;
- wire \g_new$492 ;
- wire \g_new$493 ;
- wire \g_new$494 ;
- wire \g_new$495 ;
- wire \g_new$496 ;
- wire \g_new$497 ;
- wire \g_new$498 ;
- wire \g_new$499 ;
- wire \g_new$500 ;
- wire \g_new$501 ;
- wire \g_new$502 ;
- wire \g_new$503 ;
- wire \g_new$504 ;
- wire \g_new$505 ;
- wire \g_new$506 ;
- wire \g_new$507 ;
- wire [63:0] o;
- wire [63:0] \o$134 ;
- wire [63:0] o2;
- wire p_new;
- wire \p_new$328 ;
- wire \p_new$331 ;
- wire \p_new$332 ;
- wire \p_new$335 ;
- wire \p_new$336 ;
- wire \p_new$339 ;
- wire \p_new$340 ;
- wire \p_new$343 ;
- wire \p_new$344 ;
- wire \p_new$347 ;
- wire \p_new$348 ;
- wire \p_new$351 ;
- wire \p_new$352 ;
- wire \p_new$355 ;
- wire \p_new$356 ;
- wire \p_new$359 ;
- wire \p_new$360 ;
- wire \p_new$363 ;
- wire \p_new$364 ;
- wire \p_new$367 ;
- wire \p_new$368 ;
- wire \p_new$371 ;
- wire \p_new$372 ;
- wire \p_new$375 ;
- wire \p_new$376 ;
- wire \p_new$379 ;
- wire \p_new$380 ;
- wire \p_new$383 ;
- wire \p_new$384 ;
- wire \p_new$387 ;
- wire \p_new$388 ;
- wire \p_new$391 ;
- wire \p_new$392 ;
- wire \p_new$395 ;
- wire \p_new$396 ;
- wire \p_new$399 ;
- wire \p_new$400 ;
- wire \p_new$403 ;
- wire \p_new$404 ;
- wire \p_new$407 ;
- wire \p_new$408 ;
- wire \p_new$411 ;
- wire \p_new$412 ;
- wire \p_new$415 ;
- wire \p_new$416 ;
- wire \p_new$419 ;
- wire \p_new$420 ;
- wire \p_new$423 ;
- wire \p_new$424 ;
- wire \p_new$427 ;
- wire \p_new$428 ;
- wire \p_new$431 ;
- wire \p_new$432 ;
- wire \p_new$435 ;
- wire \p_new$436 ;
- wire \p_new$439 ;
- wire \p_new$440 ;
- wire \p_new$443 ;
- wire \p_new$444 ;
- wire \p_new$447 ;
- wire \p_new$448 ;
- output \port$901$0 ;
- wire \port$901$0 ;
- output \port$902$0 ;
- wire \port$902$0 ;
- output \port$903$0 ;
- wire \port$903$0 ;
- output \port$904$0 ;
- wire \port$904$0 ;
- output \port$905$0 ;
- wire \port$905$0 ;
- output \port$906$0 ;
- wire \port$906$0 ;
- output \port$907$0 ;
- wire \port$907$0 ;
- output \port$908$0 ;
- wire \port$908$0 ;
- output \port$909$0 ;
- wire \port$909$0 ;
- output \port$910$0 ;
- wire \port$910$0 ;
- output \port$911$0 ;
- wire \port$911$0 ;
- output \port$912$0 ;
- wire \port$912$0 ;
- output \port$913$0 ;
- wire \port$913$0 ;
- output \port$914$0 ;
- wire \port$914$0 ;
- output \port$915$0 ;
- wire \port$915$0 ;
- output \port$916$0 ;
- wire \port$916$0 ;
- output \port$917$0 ;
- wire \port$917$0 ;
- output \port$918$0 ;
- wire \port$918$0 ;
- output \port$919$0 ;
- wire \port$919$0 ;
- output \port$920$0 ;
- wire \port$920$0 ;
- output \port$921$0 ;
- wire \port$921$0 ;
- output \port$922$0 ;
- wire \port$922$0 ;
- output \port$923$0 ;
- wire \port$923$0 ;
- output \port$924$0 ;
- wire \port$924$0 ;
- output \port$925$0 ;
- wire \port$925$0 ;
- output \port$926$0 ;
- wire \port$926$0 ;
- output \port$927$0 ;
- wire \port$927$0 ;
- output \port$928$0 ;
- wire \port$928$0 ;
- output \port$929$0 ;
- wire \port$929$0 ;
- output \port$930$0 ;
- wire \port$930$0 ;
- output \port$931$0 ;
- wire \port$931$0 ;
- output \port$932$0 ;
- wire \port$932$0 ;
- output \port$933$0 ;
- wire \port$933$0 ;
- output \port$934$0 ;
- wire \port$934$0 ;
- output \port$935$0 ;
- wire \port$935$0 ;
- output \port$936$0 ;
- wire \port$936$0 ;
- output \port$937$0 ;
- wire \port$937$0 ;
- output \port$938$0 ;
- wire \port$938$0 ;
- output \port$939$0 ;
- wire \port$939$0 ;
- output \port$940$0 ;
- wire \port$940$0 ;
- output \port$941$0 ;
- wire \port$941$0 ;
- output \port$942$0 ;
- wire \port$942$0 ;
- output \port$943$0 ;
- wire \port$943$0 ;
- output \port$944$0 ;
- wire \port$944$0 ;
- output \port$945$0 ;
- wire \port$945$0 ;
- output \port$946$0 ;
- wire \port$946$0 ;
- output \port$947$0 ;
- wire \port$947$0 ;
- output \port$948$0 ;
- wire \port$948$0 ;
- output \port$949$0 ;
- wire \port$949$0 ;
- output \port$950$0 ;
- wire \port$950$0 ;
- output \port$951$0 ;
- wire \port$951$0 ;
- output \port$952$0 ;
- wire \port$952$0 ;
- output \port$953$0 ;
- wire \port$953$0 ;
- output \port$954$0 ;
- wire \port$954$0 ;
- output \port$955$0 ;
- wire \port$955$0 ;
- output \port$956$0 ;
- wire \port$956$0 ;
- output \port$957$0 ;
- wire \port$957$0 ;
- output \port$958$0 ;
- wire \port$958$0 ;
- output \port$959$0 ;
- wire \port$959$0 ;
- output \port$960$0 ;
- wire \port$960$0 ;
- output \port$961$0 ;
- wire \port$961$0 ;
- output \port$962$0 ;
- wire \port$962$0 ;
- output \port$963$0 ;
- wire \port$963$0 ;
- output \port$964$0 ;
- wire \port$964$0 ;
- wire sn;
- wire \sn$138 ;
- wire \sn$140 ;
- wire \sn$142 ;
- wire \sn$144 ;
- wire \sn$146 ;
- wire \sn$148 ;
- wire \sn$150 ;
- wire \sn$152 ;
- wire \sn$154 ;
- wire \sn$156 ;
- wire \sn$158 ;
- wire \sn$160 ;
- wire \sn$162 ;
- wire \sn$164 ;
- wire \sn$166 ;
- wire \sn$168 ;
- wire \sn$170 ;
- wire \sn$172 ;
- wire \sn$174 ;
- wire \sn$176 ;
- wire \sn$178 ;
- wire \sn$180 ;
- wire \sn$182 ;
- wire \sn$184 ;
- wire \sn$186 ;
- wire \sn$188 ;
- wire \sn$190 ;
- wire \sn$192 ;
- wire \sn$194 ;
- wire \sn$196 ;
- wire \sn$198 ;
- wire \sn$200 ;
- wire \sn$202 ;
- wire \sn$204 ;
- wire \sn$206 ;
- wire \sn$208 ;
- wire \sn$210 ;
- wire \sn$212 ;
- wire \sn$214 ;
- wire \sn$216 ;
- wire \sn$218 ;
- wire \sn$220 ;
- wire \sn$222 ;
- wire \sn$224 ;
- wire \sn$226 ;
- wire \sn$228 ;
- wire \sn$230 ;
- wire \sn$232 ;
- wire \sn$234 ;
- wire \sn$236 ;
- wire \sn$238 ;
- wire \sn$240 ;
- wire \sn$242 ;
- wire \sn$244 ;
- wire \sn$246 ;
- wire \sn$248 ;
- wire \sn$250 ;
- wire \sn$252 ;
- wire \sn$254 ;
- wire \sn$256 ;
- wire \sn$258 ;
- wire \sn$260 ;
- wire \sn$262 ;
- HAxp5_ASAP7_75t_R \U$0 (
- .A(a[0]),
- .B(b[0]),
- .CON(con),
- .SN(sn)
- );
- INVx1_ASAP7_75t_R \U$1 (
- .A(con),
- .Y(\$signal$263 )
- );
- INVx1_ASAP7_75t_R \U$10 (
- .A(\con$141 ),
- .Y(\$signal$266 )
- );
- INVx1_ASAP7_75t_R \U$100 (
- .A(\con$201 ),
- .Y(\$signal$296 )
- );
- INVx1_ASAP7_75t_R \U$101 (
- .A(\sn$202 ),
- .Y(\$signal$70 )
- );
- HAxp5_ASAP7_75t_R \U$102 (
- .A(a[34]),
- .B(b[34]),
- .CON(\con$203 ),
- .SN(\sn$204 )
- );
- INVx1_ASAP7_75t_R \U$103 (
- .A(\con$203 ),
- .Y(\$signal$297 )
- );
- INVx1_ASAP7_75t_R \U$104 (
- .A(\sn$204 ),
- .Y(\$signal$72 )
- );
- HAxp5_ASAP7_75t_R \U$105 (
- .A(a[35]),
- .B(b[35]),
- .CON(\con$205 ),
- .SN(\sn$206 )
- );
- INVx1_ASAP7_75t_R \U$106 (
- .A(\con$205 ),
- .Y(\$signal$298 )
- );
- INVx1_ASAP7_75t_R \U$107 (
- .A(\sn$206 ),
- .Y(\$signal$74 )
- );
- HAxp5_ASAP7_75t_R \U$108 (
- .A(a[36]),
- .B(b[36]),
- .CON(\con$207 ),
- .SN(\sn$208 )
- );
- INVx1_ASAP7_75t_R \U$109 (
- .A(\con$207 ),
- .Y(\$signal$299 )
- );
- INVx1_ASAP7_75t_R \U$11 (
- .A(\sn$142 ),
- .Y(\$signal$10 )
- );
- INVx1_ASAP7_75t_R \U$110 (
- .A(\sn$208 ),
- .Y(\$signal$76 )
- );
- HAxp5_ASAP7_75t_R \U$111 (
- .A(a[37]),
- .B(b[37]),
- .CON(\con$209 ),
- .SN(\sn$210 )
- );
- INVx1_ASAP7_75t_R \U$112 (
- .A(\con$209 ),
- .Y(\$signal$300 )
- );
- INVx1_ASAP7_75t_R \U$113 (
- .A(\sn$210 ),
- .Y(\$signal$78 )
- );
- HAxp5_ASAP7_75t_R \U$114 (
- .A(a[38]),
- .B(b[38]),
- .CON(\con$211 ),
- .SN(\sn$212 )
- );
- INVx1_ASAP7_75t_R \U$115 (
- .A(\con$211 ),
- .Y(\$signal$301 )
- );
- INVx1_ASAP7_75t_R \U$116 (
- .A(\sn$212 ),
- .Y(\$signal$80 )
- );
- HAxp5_ASAP7_75t_R \U$117 (
- .A(a[39]),
- .B(b[39]),
- .CON(\con$213 ),
- .SN(\sn$214 )
- );
- INVx1_ASAP7_75t_R \U$118 (
- .A(\con$213 ),
- .Y(\$signal$302 )
- );
- INVx1_ASAP7_75t_R \U$119 (
- .A(\sn$214 ),
- .Y(\$signal$82 )
- );
- HAxp5_ASAP7_75t_R \U$12 (
- .A(a[4]),
- .B(b[4]),
- .CON(\con$143 ),
- .SN(\sn$144 )
- );
- HAxp5_ASAP7_75t_R \U$120 (
- .A(a[40]),
- .B(b[40]),
- .CON(\con$215 ),
- .SN(\sn$216 )
- );
- INVx1_ASAP7_75t_R \U$121 (
- .A(\con$215 ),
- .Y(\$signal$303 )
- );
- INVx1_ASAP7_75t_R \U$122 (
- .A(\sn$216 ),
- .Y(\$signal$84 )
- );
- HAxp5_ASAP7_75t_R \U$123 (
- .A(a[41]),
- .B(b[41]),
- .CON(\con$217 ),
- .SN(\sn$218 )
- );
- INVx1_ASAP7_75t_R \U$124 (
- .A(\con$217 ),
- .Y(\$signal$304 )
- );
- INVx1_ASAP7_75t_R \U$125 (
- .A(\sn$218 ),
- .Y(\$signal$86 )
- );
- HAxp5_ASAP7_75t_R \U$126 (
- .A(a[42]),
- .B(b[42]),
- .CON(\con$219 ),
- .SN(\sn$220 )
- );
- INVx1_ASAP7_75t_R \U$127 (
- .A(\con$219 ),
- .Y(\$signal$305 )
- );
- INVx1_ASAP7_75t_R \U$128 (
- .A(\sn$220 ),
- .Y(\$signal$88 )
- );
- HAxp5_ASAP7_75t_R \U$129 (
- .A(a[43]),
- .B(b[43]),
- .CON(\con$221 ),
- .SN(\sn$222 )
- );
- INVx1_ASAP7_75t_R \U$13 (
- .A(\con$143 ),
- .Y(\$signal$267 )
- );
- INVx1_ASAP7_75t_R \U$130 (
- .A(\con$221 ),
- .Y(\$signal$306 )
- );
- INVx1_ASAP7_75t_R \U$131 (
- .A(\sn$222 ),
- .Y(\$signal$90 )
- );
- HAxp5_ASAP7_75t_R \U$132 (
- .A(a[44]),
- .B(b[44]),
- .CON(\con$223 ),
- .SN(\sn$224 )
- );
- INVx1_ASAP7_75t_R \U$133 (
- .A(\con$223 ),
- .Y(\$signal$307 )
- );
- INVx1_ASAP7_75t_R \U$134 (
- .A(\sn$224 ),
- .Y(\$signal$92 )
- );
- HAxp5_ASAP7_75t_R \U$135 (
- .A(a[45]),
- .B(b[45]),
- .CON(\con$225 ),
- .SN(\sn$226 )
- );
- INVx1_ASAP7_75t_R \U$136 (
- .A(\con$225 ),
- .Y(\$signal$308 )
- );
- INVx1_ASAP7_75t_R \U$137 (
- .A(\sn$226 ),
- .Y(\$signal$94 )
- );
- HAxp5_ASAP7_75t_R \U$138 (
- .A(a[46]),
- .B(b[46]),
- .CON(\con$227 ),
- .SN(\sn$228 )
- );
- INVx1_ASAP7_75t_R \U$139 (
- .A(\con$227 ),
- .Y(\$signal$309 )
- );
- INVx1_ASAP7_75t_R \U$14 (
- .A(\sn$144 ),
- .Y(\$signal$12 )
- );
- INVx1_ASAP7_75t_R \U$140 (
- .A(\sn$228 ),
- .Y(\$signal$96 )
- );
- HAxp5_ASAP7_75t_R \U$141 (
- .A(a[47]),
- .B(b[47]),
- .CON(\con$229 ),
- .SN(\sn$230 )
- );
- INVx1_ASAP7_75t_R \U$142 (
- .A(\con$229 ),
- .Y(\$signal$310 )
- );
- INVx1_ASAP7_75t_R \U$143 (
- .A(\sn$230 ),
- .Y(\$signal$98 )
- );
- HAxp5_ASAP7_75t_R \U$144 (
- .A(a[48]),
- .B(b[48]),
- .CON(\con$231 ),
- .SN(\sn$232 )
- );
- INVx1_ASAP7_75t_R \U$145 (
- .A(\con$231 ),
- .Y(\$signal$311 )
- );
- INVx1_ASAP7_75t_R \U$146 (
- .A(\sn$232 ),
- .Y(\$signal$100 )
- );
- HAxp5_ASAP7_75t_R \U$147 (
- .A(a[49]),
- .B(b[49]),
- .CON(\con$233 ),
- .SN(\sn$234 )
- );
- INVx1_ASAP7_75t_R \U$148 (
- .A(\con$233 ),
- .Y(\$signal$312 )
- );
- INVx1_ASAP7_75t_R \U$149 (
- .A(\sn$234 ),
- .Y(\$signal$102 )
- );
- HAxp5_ASAP7_75t_R \U$15 (
- .A(a[5]),
- .B(b[5]),
- .CON(\con$145 ),
- .SN(\sn$146 )
- );
- HAxp5_ASAP7_75t_R \U$150 (
- .A(a[50]),
- .B(b[50]),
- .CON(\con$235 ),
- .SN(\sn$236 )
- );
- INVx1_ASAP7_75t_R \U$151 (
- .A(\con$235 ),
- .Y(\$signal$313 )
- );
- INVx1_ASAP7_75t_R \U$152 (
- .A(\sn$236 ),
- .Y(\$signal$104 )
- );
- HAxp5_ASAP7_75t_R \U$153 (
- .A(a[51]),
- .B(b[51]),
- .CON(\con$237 ),
- .SN(\sn$238 )
- );
- INVx1_ASAP7_75t_R \U$154 (
- .A(\con$237 ),
- .Y(\$signal$314 )
- );
- INVx1_ASAP7_75t_R \U$155 (
- .A(\sn$238 ),
- .Y(\$signal$106 )
- );
- HAxp5_ASAP7_75t_R \U$156 (
- .A(a[52]),
- .B(b[52]),
- .CON(\con$239 ),
- .SN(\sn$240 )
- );
- INVx1_ASAP7_75t_R \U$157 (
- .A(\con$239 ),
- .Y(\$signal$315 )
- );
- INVx1_ASAP7_75t_R \U$158 (
- .A(\sn$240 ),
- .Y(\$signal$108 )
- );
- HAxp5_ASAP7_75t_R \U$159 (
- .A(a[53]),
- .B(b[53]),
- .CON(\con$241 ),
- .SN(\sn$242 )
- );
- INVx1_ASAP7_75t_R \U$16 (
- .A(\con$145 ),
- .Y(\$signal$268 )
- );
- INVx1_ASAP7_75t_R \U$160 (
- .A(\con$241 ),
- .Y(\$signal$316 )
- );
- INVx1_ASAP7_75t_R \U$161 (
- .A(\sn$242 ),
- .Y(\$signal$110 )
- );
- HAxp5_ASAP7_75t_R \U$162 (
- .A(a[54]),
- .B(b[54]),
- .CON(\con$243 ),
- .SN(\sn$244 )
- );
- INVx1_ASAP7_75t_R \U$163 (
- .A(\con$243 ),
- .Y(\$signal$317 )
- );
- INVx1_ASAP7_75t_R \U$164 (
- .A(\sn$244 ),
- .Y(\$signal$112 )
- );
- HAxp5_ASAP7_75t_R \U$165 (
- .A(a[55]),
- .B(b[55]),
- .CON(\con$245 ),
- .SN(\sn$246 )
- );
- INVx1_ASAP7_75t_R \U$166 (
- .A(\con$245 ),
- .Y(\$signal$318 )
- );
- INVx1_ASAP7_75t_R \U$167 (
- .A(\sn$246 ),
- .Y(\$signal$114 )
- );
- HAxp5_ASAP7_75t_R \U$168 (
- .A(a[56]),
- .B(b[56]),
- .CON(\con$247 ),
- .SN(\sn$248 )
- );
- INVx1_ASAP7_75t_R \U$169 (
- .A(\con$247 ),
- .Y(\$signal$319 )
- );
- INVx1_ASAP7_75t_R \U$17 (
- .A(\sn$146 ),
- .Y(\$signal$14 )
- );
- INVx1_ASAP7_75t_R \U$170 (
- .A(\sn$248 ),
- .Y(\$signal$116 )
- );
- HAxp5_ASAP7_75t_R \U$171 (
- .A(a[57]),
- .B(b[57]),
- .CON(\con$249 ),
- .SN(\sn$250 )
- );
- INVx1_ASAP7_75t_R \U$172 (
- .A(\con$249 ),
- .Y(\$signal$320 )
- );
- INVx1_ASAP7_75t_R \U$173 (
- .A(\sn$250 ),
- .Y(\$signal$118 )
- );
- HAxp5_ASAP7_75t_R \U$174 (
- .A(a[58]),
- .B(b[58]),
- .CON(\con$251 ),
- .SN(\sn$252 )
- );
- INVx1_ASAP7_75t_R \U$175 (
- .A(\con$251 ),
- .Y(\$signal$321 )
- );
- INVx1_ASAP7_75t_R \U$176 (
- .A(\sn$252 ),
- .Y(\$signal$120 )
- );
- HAxp5_ASAP7_75t_R \U$177 (
- .A(a[59]),
- .B(b[59]),
- .CON(\con$253 ),
- .SN(\sn$254 )
- );
- INVx1_ASAP7_75t_R \U$178 (
- .A(\con$253 ),
- .Y(\$signal$322 )
- );
- INVx1_ASAP7_75t_R \U$179 (
- .A(\sn$254 ),
- .Y(\$signal$122 )
- );
- HAxp5_ASAP7_75t_R \U$18 (
- .A(a[6]),
- .B(b[6]),
- .CON(\con$147 ),
- .SN(\sn$148 )
- );
- HAxp5_ASAP7_75t_R \U$180 (
- .A(a[60]),
- .B(b[60]),
- .CON(\con$255 ),
- .SN(\sn$256 )
- );
- INVx1_ASAP7_75t_R \U$181 (
- .A(\con$255 ),
- .Y(\$signal$323 )
- );
- INVx1_ASAP7_75t_R \U$182 (
- .A(\sn$256 ),
- .Y(\$signal$124 )
- );
- HAxp5_ASAP7_75t_R \U$183 (
- .A(a[61]),
- .B(b[61]),
- .CON(\con$257 ),
- .SN(\sn$258 )
- );
- INVx1_ASAP7_75t_R \U$184 (
- .A(\con$257 ),
- .Y(\$signal$324 )
- );
- INVx1_ASAP7_75t_R \U$185 (
- .A(\sn$258 ),
- .Y(\$signal$126 )
- );
- HAxp5_ASAP7_75t_R \U$186 (
- .A(a[62]),
- .B(b[62]),
- .CON(\con$259 ),
- .SN(\sn$260 )
- );
- INVx1_ASAP7_75t_R \U$187 (
- .A(\con$259 ),
- .Y(\$signal$325 )
- );
- INVx1_ASAP7_75t_R \U$188 (
- .A(\sn$260 ),
- .Y(\$signal$128 )
- );
- HAxp5_ASAP7_75t_R \U$189 (
- .A(a[63]),
- .B(b[63]),
- .CON(\con$261 ),
- .SN(\sn$262 )
- );
- INVx1_ASAP7_75t_R \U$19 (
- .A(\con$147 ),
- .Y(\$signal$269 )
- );
- INVx1_ASAP7_75t_R \U$190 (
- .A(\con$261 ),
- .Y(\$signal$326 )
- );
- INVx1_ASAP7_75t_R \U$191 (
- .A(\sn$262 ),
- .Y(\$signal$130 )
- );
- AND2x2_ASAP7_75t_R \U$192 (
- .A(\$signal$6 ),
- .B(\$signal ),
- .Y(\p_new$328 )
- );
- AO21x1_ASAP7_75t_R \U$193 (
- .A1(\$signal$6 ),
- .A2(\$signal$263 ),
- .B(\$signal$264 ),
- .Y(g_new)
- );
- AND2x2_ASAP7_75t_R \U$194 (
- .A(\$signal$10 ),
- .B(\$signal$8 ),
- .Y(p_new)
- );
- AO21x1_ASAP7_75t_R \U$195 (
- .A1(\$signal$10 ),
- .A2(\$signal$265 ),
- .B(\$signal$266 ),
- .Y(\g_new$330 )
- );
- AND2x2_ASAP7_75t_R \U$196 (
- .A(\$signal$14 ),
- .B(\$signal$12 ),
- .Y(\p_new$332 )
- );
- AO21x1_ASAP7_75t_R \U$197 (
- .A1(\$signal$14 ),
- .A2(\$signal$267 ),
- .B(\$signal$268 ),
- .Y(\g_new$333 )
- );
- AND2x2_ASAP7_75t_R \U$198 (
- .A(\$signal$18 ),
- .B(\$signal$16 ),
- .Y(\p_new$331 )
- );
- AO21x1_ASAP7_75t_R \U$199 (
- .A1(\$signal$18 ),
- .A2(\$signal$269 ),
- .B(\$signal$270 ),
- .Y(\g_new$334 )
- );
- INVx1_ASAP7_75t_R \U$2 (
- .A(sn),
- .Y(\$signal )
- );
- INVx1_ASAP7_75t_R \U$20 (
- .A(\sn$148 ),
- .Y(\$signal$16 )
- );
- AND2x2_ASAP7_75t_R \U$200 (
- .A(\$signal$22 ),
- .B(\$signal$20 ),
- .Y(\p_new$336 )
- );
- AO21x1_ASAP7_75t_R \U$201 (
- .A1(\$signal$22 ),
- .A2(\$signal$271 ),
- .B(\$signal$272 ),
- .Y(\g_new$337 )
- );
- AND2x2_ASAP7_75t_R \U$202 (
- .A(\$signal$26 ),
- .B(\$signal$24 ),
- .Y(\p_new$335 )
- );
- AO21x1_ASAP7_75t_R \U$203 (
- .A1(\$signal$26 ),
- .A2(\$signal$273 ),
- .B(\$signal$274 ),
- .Y(\g_new$338 )
- );
- AND2x2_ASAP7_75t_R \U$204 (
- .A(\$signal$30 ),
- .B(\$signal$28 ),
- .Y(\p_new$340 )
- );
- AO21x1_ASAP7_75t_R \U$205 (
- .A1(\$signal$30 ),
- .A2(\$signal$275 ),
- .B(\$signal$276 ),
- .Y(\g_new$341 )
- );
- AND2x2_ASAP7_75t_R \U$206 (
- .A(\$signal$34 ),
- .B(\$signal$32 ),
- .Y(\p_new$339 )
- );
- AO21x1_ASAP7_75t_R \U$207 (
- .A1(\$signal$34 ),
- .A2(\$signal$277 ),
- .B(\$signal$278 ),
- .Y(\g_new$342 )
- );
- AND2x2_ASAP7_75t_R \U$208 (
- .A(\$signal$38 ),
- .B(\$signal$36 ),
- .Y(\p_new$344 )
- );
- AO21x1_ASAP7_75t_R \U$209 (
- .A1(\$signal$38 ),
- .A2(\$signal$279 ),
- .B(\$signal$280 ),
- .Y(\g_new$345 )
- );
- HAxp5_ASAP7_75t_R \U$21 (
- .A(a[7]),
- .B(b[7]),
- .CON(\con$149 ),
- .SN(\sn$150 )
- );
- AND2x2_ASAP7_75t_R \U$210 (
- .A(\$signal$42 ),
- .B(\$signal$40 ),
- .Y(\p_new$343 )
- );
- AO21x1_ASAP7_75t_R \U$211 (
- .A1(\$signal$42 ),
- .A2(\$signal$281 ),
- .B(\$signal$282 ),
- .Y(\g_new$346 )
- );
- AND2x2_ASAP7_75t_R \U$212 (
- .A(\$signal$46 ),
- .B(\$signal$44 ),
- .Y(\p_new$348 )
- );
- AO21x1_ASAP7_75t_R \U$213 (
- .A1(\$signal$46 ),
- .A2(\$signal$283 ),
- .B(\$signal$284 ),
- .Y(\g_new$349 )
- );
- AND2x2_ASAP7_75t_R \U$214 (
- .A(\$signal$50 ),
- .B(\$signal$48 ),
- .Y(\p_new$347 )
- );
- AO21x1_ASAP7_75t_R \U$215 (
- .A1(\$signal$50 ),
- .A2(\$signal$285 ),
- .B(\$signal$286 ),
- .Y(\g_new$350 )
- );
- AND2x2_ASAP7_75t_R \U$216 (
- .A(\$signal$54 ),
- .B(\$signal$52 ),
- .Y(\p_new$352 )
- );
- AO21x1_ASAP7_75t_R \U$217 (
- .A1(\$signal$54 ),
- .A2(\$signal$287 ),
- .B(\$signal$288 ),
- .Y(\g_new$353 )
- );
- AND2x2_ASAP7_75t_R \U$218 (
- .A(\$signal$58 ),
- .B(\$signal$56 ),
- .Y(\p_new$351 )
- );
- AO21x1_ASAP7_75t_R \U$219 (
- .A1(\$signal$58 ),
- .A2(\$signal$289 ),
- .B(\$signal$290 ),
- .Y(\g_new$354 )
- );
- INVx1_ASAP7_75t_R \U$22 (
- .A(\con$149 ),
- .Y(\$signal$270 )
- );
- AND2x2_ASAP7_75t_R \U$220 (
- .A(\$signal$62 ),
- .B(\$signal$60 ),
- .Y(\p_new$356 )
- );
- AO21x1_ASAP7_75t_R \U$221 (
- .A1(\$signal$62 ),
- .A2(\$signal$291 ),
- .B(\$signal$292 ),
- .Y(\g_new$357 )
- );
- AND2x2_ASAP7_75t_R \U$222 (
- .A(\$signal$66 ),
- .B(\$signal$64 ),
- .Y(\p_new$355 )
- );
- AO21x1_ASAP7_75t_R \U$223 (
- .A1(\$signal$66 ),
- .A2(\$signal$293 ),
- .B(\$signal$294 ),
- .Y(\g_new$358 )
- );
- AND2x2_ASAP7_75t_R \U$224 (
- .A(\$signal$70 ),
- .B(\$signal$68 ),
- .Y(\p_new$360 )
- );
- AO21x1_ASAP7_75t_R \U$225 (
- .A1(\$signal$70 ),
- .A2(\$signal$295 ),
- .B(\$signal$296 ),
- .Y(\g_new$361 )
- );
- AND2x2_ASAP7_75t_R \U$226 (
- .A(\$signal$74 ),
- .B(\$signal$72 ),
- .Y(\p_new$359 )
- );
- AO21x1_ASAP7_75t_R \U$227 (
- .A1(\$signal$74 ),
- .A2(\$signal$297 ),
- .B(\$signal$298 ),
- .Y(\g_new$362 )
- );
- AND2x2_ASAP7_75t_R \U$228 (
- .A(\$signal$78 ),
- .B(\$signal$76 ),
- .Y(\p_new$364 )
- );
- AO21x1_ASAP7_75t_R \U$229 (
- .A1(\$signal$78 ),
- .A2(\$signal$299 ),
- .B(\$signal$300 ),
- .Y(\g_new$365 )
- );
- INVx1_ASAP7_75t_R \U$23 (
- .A(\sn$150 ),
- .Y(\$signal$18 )
- );
- AND2x2_ASAP7_75t_R \U$230 (
- .A(\$signal$82 ),
- .B(\$signal$80 ),
- .Y(\p_new$363 )
- );
- AO21x1_ASAP7_75t_R \U$231 (
- .A1(\$signal$82 ),
- .A2(\$signal$301 ),
- .B(\$signal$302 ),
- .Y(\g_new$366 )
- );
- AND2x2_ASAP7_75t_R \U$232 (
- .A(\$signal$86 ),
- .B(\$signal$84 ),
- .Y(\p_new$368 )
- );
- AO21x1_ASAP7_75t_R \U$233 (
- .A1(\$signal$86 ),
- .A2(\$signal$303 ),
- .B(\$signal$304 ),
- .Y(\g_new$369 )
- );
- AND2x2_ASAP7_75t_R \U$234 (
- .A(\$signal$90 ),
- .B(\$signal$88 ),
- .Y(\p_new$367 )
- );
- AO21x1_ASAP7_75t_R \U$235 (
- .A1(\$signal$90 ),
- .A2(\$signal$305 ),
- .B(\$signal$306 ),
- .Y(\g_new$370 )
- );
- AND2x2_ASAP7_75t_R \U$236 (
- .A(\$signal$94 ),
- .B(\$signal$92 ),
- .Y(\p_new$372 )
- );
- AO21x1_ASAP7_75t_R \U$237 (
- .A1(\$signal$94 ),
- .A2(\$signal$307 ),
- .B(\$signal$308 ),
- .Y(\g_new$373 )
- );
- AND2x2_ASAP7_75t_R \U$238 (
- .A(\$signal$98 ),
- .B(\$signal$96 ),
- .Y(\p_new$371 )
- );
- AO21x1_ASAP7_75t_R \U$239 (
- .A1(\$signal$98 ),
- .A2(\$signal$309 ),
- .B(\$signal$310 ),
- .Y(\g_new$374 )
- );
- HAxp5_ASAP7_75t_R \U$24 (
- .A(a[8]),
- .B(b[8]),
- .CON(\con$151 ),
- .SN(\sn$152 )
- );
- AND2x2_ASAP7_75t_R \U$240 (
- .A(\$signal$102 ),
- .B(\$signal$100 ),
- .Y(\p_new$376 )
- );
- AO21x1_ASAP7_75t_R \U$241 (
- .A1(\$signal$102 ),
- .A2(\$signal$311 ),
- .B(\$signal$312 ),
- .Y(\g_new$377 )
- );
- AND2x2_ASAP7_75t_R \U$242 (
- .A(\$signal$106 ),
- .B(\$signal$104 ),
- .Y(\p_new$375 )
- );
- AO21x1_ASAP7_75t_R \U$243 (
- .A1(\$signal$106 ),
- .A2(\$signal$313 ),
- .B(\$signal$314 ),
- .Y(\g_new$378 )
- );
- AND2x2_ASAP7_75t_R \U$244 (
- .A(\$signal$110 ),
- .B(\$signal$108 ),
- .Y(\p_new$380 )
- );
- AO21x1_ASAP7_75t_R \U$245 (
- .A1(\$signal$110 ),
- .A2(\$signal$315 ),
- .B(\$signal$316 ),
- .Y(\g_new$381 )
- );
- AND2x2_ASAP7_75t_R \U$246 (
- .A(\$signal$114 ),
- .B(\$signal$112 ),
- .Y(\p_new$379 )
- );
- AO21x1_ASAP7_75t_R \U$247 (
- .A1(\$signal$114 ),
- .A2(\$signal$317 ),
- .B(\$signal$318 ),
- .Y(\g_new$382 )
- );
- AND2x2_ASAP7_75t_R \U$248 (
- .A(\$signal$118 ),
- .B(\$signal$116 ),
- .Y(\p_new$384 )
- );
- AO21x1_ASAP7_75t_R \U$249 (
- .A1(\$signal$118 ),
- .A2(\$signal$319 ),
- .B(\$signal$320 ),
- .Y(\g_new$385 )
- );
- INVx1_ASAP7_75t_R \U$25 (
- .A(\con$151 ),
- .Y(\$signal$271 )
- );
- AND2x2_ASAP7_75t_R \U$250 (
- .A(\$signal$122 ),
- .B(\$signal$120 ),
- .Y(\p_new$383 )
- );
- AO21x1_ASAP7_75t_R \U$251 (
- .A1(\$signal$122 ),
- .A2(\$signal$321 ),
- .B(\$signal$322 ),
- .Y(\g_new$386 )
- );
- AND2x2_ASAP7_75t_R \U$252 (
- .A(\$signal$126 ),
- .B(\$signal$124 ),
- .Y(\p_new$388 )
- );
- AO21x1_ASAP7_75t_R \U$253 (
- .A1(\$signal$126 ),
- .A2(\$signal$323 ),
- .B(\$signal$324 ),
- .Y(\g_new$389 )
- );
- AND2x2_ASAP7_75t_R \U$254 (
- .A(\$signal$130 ),
- .B(\$signal$128 ),
- .Y(\p_new$387 )
- );
- AO21x1_ASAP7_75t_R \U$255 (
- .A1(\$signal$130 ),
- .A2(\$signal$325 ),
- .B(\$signal$326 ),
- .Y(\g_new$390 )
- );
- AND2x2_ASAP7_75t_R \U$256 (
- .A(p_new),
- .B(\p_new$328 ),
- .Y(\p_new$392 )
- );
- AO21x1_ASAP7_75t_R \U$257 (
- .A1(p_new),
- .A2(g_new),
- .B(\g_new$330 ),
- .Y(\g_new$393 )
- );
- AND2x2_ASAP7_75t_R \U$258 (
- .A(\p_new$331 ),
- .B(\p_new$332 ),
- .Y(\p_new$391 )
- );
- AO21x1_ASAP7_75t_R \U$259 (
- .A1(\p_new$331 ),
- .A2(\g_new$333 ),
- .B(\g_new$334 ),
- .Y(\g_new$394 )
- );
- INVx1_ASAP7_75t_R \U$26 (
- .A(\sn$152 ),
- .Y(\$signal$20 )
- );
- AND2x2_ASAP7_75t_R \U$260 (
- .A(\p_new$335 ),
- .B(\p_new$336 ),
- .Y(\p_new$396 )
- );
- AO21x1_ASAP7_75t_R \U$261 (
- .A1(\p_new$335 ),
- .A2(\g_new$337 ),
- .B(\g_new$338 ),
- .Y(\g_new$397 )
- );
- AND2x2_ASAP7_75t_R \U$262 (
- .A(\p_new$339 ),
- .B(\p_new$340 ),
- .Y(\p_new$395 )
- );
- AO21x1_ASAP7_75t_R \U$263 (
- .A1(\p_new$339 ),
- .A2(\g_new$341 ),
- .B(\g_new$342 ),
- .Y(\g_new$398 )
- );
- AND2x2_ASAP7_75t_R \U$264 (
- .A(\p_new$343 ),
- .B(\p_new$344 ),
- .Y(\p_new$400 )
- );
- AO21x1_ASAP7_75t_R \U$265 (
- .A1(\p_new$343 ),
- .A2(\g_new$345 ),
- .B(\g_new$346 ),
- .Y(\g_new$401 )
- );
- AND2x2_ASAP7_75t_R \U$266 (
- .A(\p_new$347 ),
- .B(\p_new$348 ),
- .Y(\p_new$399 )
- );
- AO21x1_ASAP7_75t_R \U$267 (
- .A1(\p_new$347 ),
- .A2(\g_new$349 ),
- .B(\g_new$350 ),
- .Y(\g_new$402 )
- );
- AND2x2_ASAP7_75t_R \U$268 (
- .A(\p_new$351 ),
- .B(\p_new$352 ),
- .Y(\p_new$404 )
- );
- AO21x1_ASAP7_75t_R \U$269 (
- .A1(\p_new$351 ),
- .A2(\g_new$353 ),
- .B(\g_new$354 ),
- .Y(\g_new$405 )
- );
- HAxp5_ASAP7_75t_R \U$27 (
- .A(a[9]),
- .B(b[9]),
- .CON(\con$153 ),
- .SN(\sn$154 )
- );
- AND2x2_ASAP7_75t_R \U$270 (
- .A(\p_new$355 ),
- .B(\p_new$356 ),
- .Y(\p_new$403 )
- );
- AO21x1_ASAP7_75t_R \U$271 (
- .A1(\p_new$355 ),
- .A2(\g_new$357 ),
- .B(\g_new$358 ),
- .Y(\g_new$406 )
- );
- AND2x2_ASAP7_75t_R \U$272 (
- .A(\p_new$359 ),
- .B(\p_new$360 ),
- .Y(\p_new$408 )
- );
- AO21x1_ASAP7_75t_R \U$273 (
- .A1(\p_new$359 ),
- .A2(\g_new$361 ),
- .B(\g_new$362 ),
- .Y(\g_new$409 )
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- .B(\g_new$478 ),
- .Y(\$8 )
- );
- XOR2x1_ASAP7_75t_R \U$381 (
- .A(\$signal$16 ),
- .B(\g_new$462 ),
- .Y(\$9 )
- );
- XOR2x1_ASAP7_75t_R \U$382 (
- .A(\$signal$18 ),
- .B(\g_new$479 ),
- .Y(\$10 )
- );
- XOR2x1_ASAP7_75t_R \U$383 (
- .A(\$signal$20 ),
- .B(\g_new$425 ),
- .Y(\$11 )
- );
- XOR2x1_ASAP7_75t_R \U$384 (
- .A(\$signal$22 ),
- .B(\g_new$480 ),
- .Y(\$12 )
- );
- XOR2x1_ASAP7_75t_R \U$385 (
- .A(\$signal$24 ),
- .B(\g_new$463 ),
- .Y(\$13 )
- );
- XOR2x1_ASAP7_75t_R \U$386 (
- .A(\$signal$26 ),
- .B(\g_new$481 ),
- .Y(\$14 )
- );
- XOR2x1_ASAP7_75t_R \U$387 (
- .A(\$signal$28 ),
- .B(\g_new$455 ),
- .Y(\$15 )
- );
- XOR2x1_ASAP7_75t_R \U$388 (
- .A(\$signal$30 ),
- .B(\g_new$482 ),
- .Y(\$16 )
- );
- XOR2x1_ASAP7_75t_R \U$389 (
- .A(\$signal$32 ),
- .B(\g_new$464 ),
- .Y(\$17 )
- );
- HAxp5_ASAP7_75t_R \U$39 (
- .A(a[13]),
- .B(b[13]),
- .CON(\con$161 ),
- .SN(\sn$162 )
- );
- XOR2x1_ASAP7_75t_R \U$390 (
- .A(\$signal$34 ),
- .B(\g_new$483 ),
- .Y(\$18 )
- );
- XOR2x1_ASAP7_75t_R \U$391 (
- .A(\$signal$36 ),
- .B(\g_new$441 ),
- .Y(\$19 )
- );
- XOR2x1_ASAP7_75t_R \U$392 (
- .A(\$signal$38 ),
- .B(\g_new$484 ),
- .Y(\$20 )
- );
- XOR2x1_ASAP7_75t_R \U$393 (
- .A(\$signal$40 ),
- .B(\g_new$465 ),
- .Y(\$21 )
- );
- XOR2x1_ASAP7_75t_R \U$394 (
- .A(\$signal$42 ),
- .B(\g_new$485 ),
- .Y(\$22 )
- );
- XOR2x1_ASAP7_75t_R \U$395 (
- .A(\$signal$44 ),
- .B(\g_new$456 ),
- .Y(\$23 )
- );
- XOR2x1_ASAP7_75t_R \U$396 (
- .A(\$signal$46 ),
- .B(\g_new$486 ),
- .Y(\$24 )
- );
- XOR2x1_ASAP7_75t_R \U$397 (
- .A(\$signal$48 ),
- .B(\g_new$466 ),
- .Y(\$25 )
- );
- XOR2x1_ASAP7_75t_R \U$398 (
- .A(\$signal$50 ),
- .B(\g_new$487 ),
- .Y(\$26 )
- );
- XOR2x1_ASAP7_75t_R \U$399 (
- .A(\$signal$52 ),
- .B(\g_new$452 ),
- .Y(\$27 )
- );
- INVx1_ASAP7_75t_R \U$4 (
- .A(\con$137 ),
- .Y(\$signal$264 )
- );
- INVx1_ASAP7_75t_R \U$40 (
- .A(\con$161 ),
- .Y(\$signal$276 )
- );
- XOR2x1_ASAP7_75t_R \U$400 (
- .A(\$signal$54 ),
- .B(\g_new$488 ),
- .Y(\$28 )
- );
- XOR2x1_ASAP7_75t_R \U$401 (
- .A(\$signal$56 ),
- .B(\g_new$467 ),
- .Y(\$29 )
- );
- XOR2x1_ASAP7_75t_R \U$402 (
- .A(\$signal$58 ),
- .B(\g_new$489 ),
- .Y(\$30 )
- );
- XOR2x1_ASAP7_75t_R \U$403 (
- .A(\$signal$60 ),
- .B(\g_new$457 ),
- .Y(\$31 )
- );
- XOR2x1_ASAP7_75t_R \U$404 (
- .A(\$signal$62 ),
- .B(\g_new$490 ),
- .Y(\$32 )
- );
- XOR2x1_ASAP7_75t_R \U$405 (
- .A(\$signal$64 ),
- .B(\g_new$468 ),
- .Y(\$33 )
- );
- XOR2x1_ASAP7_75t_R \U$406 (
- .A(\$signal$66 ),
- .B(\g_new$491 ),
- .Y(\$34 )
- );
- XOR2x1_ASAP7_75t_R \U$407 (
- .A(\$signal$68 ),
- .B(\g_new$449 ),
- .Y(\$35 )
- );
- XOR2x1_ASAP7_75t_R \U$408 (
- .A(\$signal$70 ),
- .B(\g_new$492 ),
- .Y(\$36 )
- );
- XOR2x1_ASAP7_75t_R \U$409 (
- .A(\$signal$72 ),
- .B(\g_new$469 ),
- .Y(\$37 )
- );
- INVx1_ASAP7_75t_R \U$41 (
- .A(\sn$162 ),
- .Y(\$signal$30 )
- );
- XOR2x1_ASAP7_75t_R \U$410 (
- .A(\$signal$74 ),
- .B(\g_new$493 ),
- .Y(\$38 )
- );
- XOR2x1_ASAP7_75t_R \U$411 (
- .A(\$signal$76 ),
- .B(\g_new$458 ),
- .Y(\$39 )
- );
- XOR2x1_ASAP7_75t_R \U$412 (
- .A(\$signal$78 ),
- .B(\g_new$494 ),
- .Y(\$40 )
- );
- XOR2x1_ASAP7_75t_R \U$413 (
- .A(\$signal$80 ),
- .B(\g_new$470 ),
- .Y(\$41 )
- );
- XOR2x1_ASAP7_75t_R \U$414 (
- .A(\$signal$82 ),
- .B(\g_new$495 ),
- .Y(\$42 )
- );
- XOR2x1_ASAP7_75t_R \U$415 (
- .A(\$signal$84 ),
- .B(\g_new$453 ),
- .Y(\$43 )
- );
- XOR2x1_ASAP7_75t_R \U$416 (
- .A(\$signal$86 ),
- .B(\g_new$496 ),
- .Y(\$44 )
- );
- XOR2x1_ASAP7_75t_R \U$417 (
- .A(\$signal$88 ),
- .B(\g_new$471 ),
- .Y(\$45 )
- );
- XOR2x1_ASAP7_75t_R \U$418 (
- .A(\$signal$90 ),
- .B(\g_new$497 ),
- .Y(\$46 )
- );
- XOR2x1_ASAP7_75t_R \U$419 (
- .A(\$signal$92 ),
- .B(\g_new$459 ),
- .Y(\$47 )
- );
- HAxp5_ASAP7_75t_R \U$42 (
- .A(a[14]),
- .B(b[14]),
- .CON(\con$163 ),
- .SN(\sn$164 )
- );
- XOR2x1_ASAP7_75t_R \U$420 (
- .A(\$signal$94 ),
- .B(\g_new$498 ),
- .Y(\$48 )
- );
- XOR2x1_ASAP7_75t_R \U$421 (
- .A(\$signal$96 ),
- .B(\g_new$472 ),
- .Y(\$49 )
- );
- XOR2x1_ASAP7_75t_R \U$422 (
- .A(\$signal$98 ),
- .B(\g_new$499 ),
- .Y(\$50 )
- );
- XOR2x1_ASAP7_75t_R \U$423 (
- .A(\$signal$100 ),
- .B(\g_new$451 ),
- .Y(\$51 )
- );
- XOR2x1_ASAP7_75t_R \U$424 (
- .A(\$signal$102 ),
- .B(\g_new$500 ),
- .Y(\$52 )
- );
- XOR2x1_ASAP7_75t_R \U$425 (
- .A(\$signal$104 ),
- .B(\g_new$473 ),
- .Y(\$53 )
- );
- XOR2x1_ASAP7_75t_R \U$426 (
- .A(\$signal$106 ),
- .B(\g_new$501 ),
- .Y(\$54 )
- );
- XOR2x1_ASAP7_75t_R \U$427 (
- .A(\$signal$108 ),
- .B(\g_new$460 ),
- .Y(\$55 )
- );
- XOR2x1_ASAP7_75t_R \U$428 (
- .A(\$signal$110 ),
- .B(\g_new$502 ),
- .Y(\$56 )
- );
- XOR2x1_ASAP7_75t_R \U$429 (
- .A(\$signal$112 ),
- .B(\g_new$474 ),
- .Y(\$57 )
- );
- INVx1_ASAP7_75t_R \U$43 (
- .A(\con$163 ),
- .Y(\$signal$277 )
- );
- XOR2x1_ASAP7_75t_R \U$430 (
- .A(\$signal$114 ),
- .B(\g_new$503 ),
- .Y(\$58 )
- );
- XOR2x1_ASAP7_75t_R \U$431 (
- .A(\$signal$116 ),
- .B(\g_new$454 ),
- .Y(\$59 )
- );
- XOR2x1_ASAP7_75t_R \U$432 (
- .A(\$signal$118 ),
- .B(\g_new$504 ),
- .Y(\$60 )
- );
- XOR2x1_ASAP7_75t_R \U$433 (
- .A(\$signal$120 ),
- .B(\g_new$475 ),
- .Y(\$61 )
- );
- XOR2x1_ASAP7_75t_R \U$434 (
- .A(\$signal$122 ),
- .B(\g_new$505 ),
- .Y(\$62 )
- );
- XOR2x1_ASAP7_75t_R \U$435 (
- .A(\$signal$124 ),
- .B(\g_new$461 ),
- .Y(\$63 )
- );
- XOR2x1_ASAP7_75t_R \U$436 (
- .A(\$signal$126 ),
- .B(\g_new$506 ),
- .Y(\$64 )
- );
- XOR2x1_ASAP7_75t_R \U$437 (
- .A(\$signal$128 ),
- .B(\g_new$476 ),
- .Y(\$65 )
- );
- XOR2x1_ASAP7_75t_R \U$438 (
- .A(\$signal$130 ),
- .B(\g_new$507 ),
- .Y(\$66 )
- );
- INVx1_ASAP7_75t_R \U$44 (
- .A(\sn$164 ),
- .Y(\$signal$32 )
- );
- HAxp5_ASAP7_75t_R \U$45 (
- .A(a[15]),
- .B(b[15]),
- .CON(\con$165 ),
- .SN(\sn$166 )
- );
- INVx1_ASAP7_75t_R \U$46 (
- .A(\con$165 ),
- .Y(\$signal$278 )
- );
- INVx1_ASAP7_75t_R \U$47 (
- .A(\sn$166 ),
- .Y(\$signal$34 )
- );
- HAxp5_ASAP7_75t_R \U$48 (
- .A(a[16]),
- .B(b[16]),
- .CON(\con$167 ),
- .SN(\sn$168 )
- );
- INVx1_ASAP7_75t_R \U$49 (
- .A(\con$167 ),
- .Y(\$signal$279 )
- );
- INVx1_ASAP7_75t_R \U$5 (
- .A(\sn$138 ),
- .Y(\$signal$6 )
- );
- INVx1_ASAP7_75t_R \U$50 (
- .A(\sn$168 ),
- .Y(\$signal$36 )
- );
- HAxp5_ASAP7_75t_R \U$51 (
- .A(a[17]),
- .B(b[17]),
- .CON(\con$169 ),
- .SN(\sn$170 )
- );
- INVx1_ASAP7_75t_R \U$52 (
- .A(\con$169 ),
- .Y(\$signal$280 )
- );
- INVx1_ASAP7_75t_R \U$53 (
- .A(\sn$170 ),
- .Y(\$signal$38 )
- );
- HAxp5_ASAP7_75t_R \U$54 (
- .A(a[18]),
- .B(b[18]),
- .CON(\con$171 ),
- .SN(\sn$172 )
- );
- INVx1_ASAP7_75t_R \U$55 (
- .A(\con$171 ),
- .Y(\$signal$281 )
- );
- INVx1_ASAP7_75t_R \U$56 (
- .A(\sn$172 ),
- .Y(\$signal$40 )
- );
- HAxp5_ASAP7_75t_R \U$57 (
- .A(a[19]),
- .B(b[19]),
- .CON(\con$173 ),
- .SN(\sn$174 )
- );
- INVx1_ASAP7_75t_R \U$58 (
- .A(\con$173 ),
- .Y(\$signal$282 )
- );
- INVx1_ASAP7_75t_R \U$59 (
- .A(\sn$174 ),
- .Y(\$signal$42 )
- );
- HAxp5_ASAP7_75t_R \U$6 (
- .A(a[2]),
- .B(b[2]),
- .CON(\con$139 ),
- .SN(\sn$140 )
- );
- HAxp5_ASAP7_75t_R \U$60 (
- .A(a[20]),
- .B(b[20]),
- .CON(\con$175 ),
- .SN(\sn$176 )
- );
- INVx1_ASAP7_75t_R \U$61 (
- .A(\con$175 ),
- .Y(\$signal$283 )
- );
- INVx1_ASAP7_75t_R \U$62 (
- .A(\sn$176 ),
- .Y(\$signal$44 )
- );
- HAxp5_ASAP7_75t_R \U$63 (
- .A(a[21]),
- .B(b[21]),
- .CON(\con$177 ),
- .SN(\sn$178 )
- );
- INVx1_ASAP7_75t_R \U$64 (
- .A(\con$177 ),
- .Y(\$signal$284 )
- );
- INVx1_ASAP7_75t_R \U$65 (
- .A(\sn$178 ),
- .Y(\$signal$46 )
- );
- HAxp5_ASAP7_75t_R \U$66 (
- .A(a[22]),
- .B(b[22]),
- .CON(\con$179 ),
- .SN(\sn$180 )
- );
- INVx1_ASAP7_75t_R \U$67 (
- .A(\con$179 ),
- .Y(\$signal$285 )
- );
- INVx1_ASAP7_75t_R \U$68 (
- .A(\sn$180 ),
- .Y(\$signal$48 )
- );
- HAxp5_ASAP7_75t_R \U$69 (
- .A(a[23]),
- .B(b[23]),
- .CON(\con$181 ),
- .SN(\sn$182 )
- );
- INVx1_ASAP7_75t_R \U$7 (
- .A(\con$139 ),
- .Y(\$signal$265 )
- );
- INVx1_ASAP7_75t_R \U$70 (
- .A(\con$181 ),
- .Y(\$signal$286 )
- );
- INVx1_ASAP7_75t_R \U$71 (
- .A(\sn$182 ),
- .Y(\$signal$50 )
- );
- HAxp5_ASAP7_75t_R \U$72 (
- .A(a[24]),
- .B(b[24]),
- .CON(\con$183 ),
- .SN(\sn$184 )
- );
- INVx1_ASAP7_75t_R \U$73 (
- .A(\con$183 ),
- .Y(\$signal$287 )
- );
- INVx1_ASAP7_75t_R \U$74 (
- .A(\sn$184 ),
- .Y(\$signal$52 )
- );
- HAxp5_ASAP7_75t_R \U$75 (
- .A(a[25]),
- .B(b[25]),
- .CON(\con$185 ),
- .SN(\sn$186 )
- );
- INVx1_ASAP7_75t_R \U$76 (
- .A(\con$185 ),
- .Y(\$signal$288 )
- );
- INVx1_ASAP7_75t_R \U$77 (
- .A(\sn$186 ),
- .Y(\$signal$54 )
- );
- HAxp5_ASAP7_75t_R \U$78 (
- .A(a[26]),
- .B(b[26]),
- .CON(\con$187 ),
- .SN(\sn$188 )
- );
- INVx1_ASAP7_75t_R \U$79 (
- .A(\con$187 ),
- .Y(\$signal$289 )
- );
- INVx1_ASAP7_75t_R \U$8 (
- .A(\sn$140 ),
- .Y(\$signal$8 )
- );
- INVx1_ASAP7_75t_R \U$80 (
- .A(\sn$188 ),
- .Y(\$signal$56 )
- );
- HAxp5_ASAP7_75t_R \U$81 (
- .A(a[27]),
- .B(b[27]),
- .CON(\con$189 ),
- .SN(\sn$190 )
- );
- INVx1_ASAP7_75t_R \U$82 (
- .A(\con$189 ),
- .Y(\$signal$290 )
- );
- INVx1_ASAP7_75t_R \U$83 (
- .A(\sn$190 ),
- .Y(\$signal$58 )
- );
- HAxp5_ASAP7_75t_R \U$84 (
- .A(a[28]),
- .B(b[28]),
- .CON(\con$191 ),
- .SN(\sn$192 )
- );
- INVx1_ASAP7_75t_R \U$85 (
- .A(\con$191 ),
- .Y(\$signal$291 )
- );
- INVx1_ASAP7_75t_R \U$86 (
- .A(\sn$192 ),
- .Y(\$signal$60 )
- );
- HAxp5_ASAP7_75t_R \U$87 (
- .A(a[29]),
- .B(b[29]),
- .CON(\con$193 ),
- .SN(\sn$194 )
- );
- INVx1_ASAP7_75t_R \U$88 (
- .A(\con$193 ),
- .Y(\$signal$292 )
- );
- INVx1_ASAP7_75t_R \U$89 (
- .A(\sn$194 ),
- .Y(\$signal$62 )
- );
- HAxp5_ASAP7_75t_R \U$9 (
- .A(a[3]),
- .B(b[3]),
- .CON(\con$141 ),
- .SN(\sn$142 )
- );
- HAxp5_ASAP7_75t_R \U$90 (
- .A(a[30]),
- .B(b[30]),
- .CON(\con$195 ),
- .SN(\sn$196 )
- );
- INVx1_ASAP7_75t_R \U$91 (
- .A(\con$195 ),
- .Y(\$signal$293 )
- );
- INVx1_ASAP7_75t_R \U$92 (
- .A(\sn$196 ),
- .Y(\$signal$64 )
- );
- HAxp5_ASAP7_75t_R \U$93 (
- .A(a[31]),
- .B(b[31]),
- .CON(\con$197 ),
- .SN(\sn$198 )
- );
- INVx1_ASAP7_75t_R \U$94 (
- .A(\con$197 ),
- .Y(\$signal$294 )
- );
- INVx1_ASAP7_75t_R \U$95 (
- .A(\sn$198 ),
- .Y(\$signal$66 )
- );
- HAxp5_ASAP7_75t_R \U$96 (
- .A(a[32]),
- .B(b[32]),
- .CON(\con$199 ),
- .SN(\sn$200 )
- );
- INVx1_ASAP7_75t_R \U$97 (
- .A(\con$199 ),
- .Y(\$signal$295 )
- );
- INVx1_ASAP7_75t_R \U$98 (
- .A(\sn$200 ),
- .Y(\$signal$68 )
- );
- HAxp5_ASAP7_75t_R \U$99 (
- .A(a[33]),
- .B(b[33]),
- .CON(\con$201 ),
- .SN(\sn$202 )
- );
- assign \a$1 = a;
- assign \b$3 = b;
- assign \$signal$5 = \$signal ;
- assign \$signal$7 = \$signal$6 ;
- assign \$signal$9 = \$signal$8 ;
- assign \$signal$11 = \$signal$10 ;
- assign \$signal$13 = \$signal$12 ;
- assign \$signal$15 = \$signal$14 ;
- assign \$signal$17 = \$signal$16 ;
- assign \$signal$19 = \$signal$18 ;
- assign \$signal$21 = \$signal$20 ;
- assign \$signal$23 = \$signal$22 ;
- assign \$signal$25 = \$signal$24 ;
- assign \$signal$27 = \$signal$26 ;
- assign \$signal$29 = \$signal$28 ;
- assign \$signal$31 = \$signal$30 ;
- assign \$signal$33 = \$signal$32 ;
- assign \$signal$35 = \$signal$34 ;
- assign \$signal$37 = \$signal$36 ;
- assign \$signal$39 = \$signal$38 ;
- assign \$signal$41 = \$signal$40 ;
- assign \$signal$43 = \$signal$42 ;
- assign \$signal$45 = \$signal$44 ;
- assign \$signal$47 = \$signal$46 ;
- assign \$signal$49 = \$signal$48 ;
- assign \$signal$51 = \$signal$50 ;
- assign \$signal$53 = \$signal$52 ;
- assign \$signal$55 = \$signal$54 ;
- assign \$signal$57 = \$signal$56 ;
- assign \$signal$59 = \$signal$58 ;
- assign \$signal$61 = \$signal$60 ;
- assign \$signal$63 = \$signal$62 ;
- assign \$signal$65 = \$signal$64 ;
- assign \$signal$67 = \$signal$66 ;
- assign \$signal$69 = \$signal$68 ;
- assign \$signal$71 = \$signal$70 ;
- assign \$signal$73 = \$signal$72 ;
- assign \$signal$75 = \$signal$74 ;
- assign \$signal$77 = \$signal$76 ;
- assign \$signal$79 = \$signal$78 ;
- assign \$signal$81 = \$signal$80 ;
- assign \$signal$83 = \$signal$82 ;
- assign \$signal$85 = \$signal$84 ;
- assign \$signal$87 = \$signal$86 ;
- assign \$signal$89 = \$signal$88 ;
- assign \$signal$91 = \$signal$90 ;
- assign \$signal$93 = \$signal$92 ;
- assign \$signal$95 = \$signal$94 ;
- assign \$signal$97 = \$signal$96 ;
- assign \$signal$99 = \$signal$98 ;
- assign \$signal$101 = \$signal$100 ;
- assign \$signal$103 = \$signal$102 ;
- assign \$signal$105 = \$signal$104 ;
- assign \$signal$107 = \$signal$106 ;
- assign \$signal$109 = \$signal$108 ;
- assign \$signal$111 = \$signal$110 ;
- assign \$signal$113 = \$signal$112 ;
- assign \$signal$115 = \$signal$114 ;
- assign \$signal$117 = \$signal$116 ;
- assign \$signal$119 = \$signal$118 ;
- assign \$signal$121 = \$signal$120 ;
- assign \$signal$123 = \$signal$122 ;
- assign \$signal$125 = \$signal$124 ;
- assign \$signal$127 = \$signal$126 ;
- assign \$signal$129 = \$signal$128 ;
- assign \$signal$131 = \$signal$130 ;
- assign o2 = { \$66 , \$65 , \$64 , \$63 , \$62 , \$61 , \$60 , \$59 , \$58 , \$57 , \$56 , \$55 , \$54 , \$53 , \$52 , \$51 , \$50 , \$49 , \$48 , \$47 , \$46 , \$45 , \$44 , \$43 , \$42 , \$41 , \$40 , \$39 , \$38 , \$37 , \$36 , \$35 , \$34 , \$33 , \$32 , \$31 , \$30 , \$29 , \$28 , \$27 , \$26 , \$25 , \$24 , \$23 , \$22 , \$21 , \$20 , \$19 , \$18 , \$17 , \$16 , \$15 , \$14 , \$13 , \$12 , \$11 , \$10 , \$9 , \$8 , \$7 , \$6 , \$5 , \$4 , \$3 };
- assign o = { \$66 , \$65 , \$64 , \$63 , \$62 , \$61 , \$60 , \$59 , \$58 , \$57 , \$56 , \$55 , \$54 , \$53 , \$52 , \$51 , \$50 , \$49 , \$48 , \$47 , \$46 , \$45 , \$44 , \$43 , \$42 , \$41 , \$40 , \$39 , \$38 , \$37 , \$36 , \$35 , \$34 , \$33 , \$32 , \$31 , \$30 , \$29 , \$28 , \$27 , \$26 , \$25 , \$24 , \$23 , \$22 , \$21 , \$20 , \$19 , \$18 , \$17 , \$16 , \$15 , \$14 , \$13 , \$12 , \$11 , \$10 , \$9 , \$8 , \$7 , \$6 , \$5 , \$4 , \$3 };
- assign \o$134 = { \$66 , \$65 , \$64 , \$63 , \$62 , \$61 , \$60 , \$59 , \$58 , \$57 , \$56 , \$55 , \$54 , \$53 , \$52 , \$51 , \$50 , \$49 , \$48 , \$47 , \$46 , \$45 , \$44 , \$43 , \$42 , \$41 , \$40 , \$39 , \$38 , \$37 , \$36 , \$35 , \$34 , \$33 , \$32 , \$31 , \$30 , \$29 , \$28 , \$27 , \$26 , \$25 , \$24 , \$23 , \$22 , \$21 , \$20 , \$19 , \$18 , \$17 , \$16 , \$15 , \$14 , \$13 , \$12 , \$11 , \$10 , \$9 , \$8 , \$7 , \$6 , \$5 , \$4 , \$3 };
- assign \port$901$0 = \$3 ;
- assign \port$902$0 = \$4 ;
- assign \port$903$0 = \$5 ;
- assign \port$904$0 = \$6 ;
- assign \port$905$0 = \$7 ;
- assign \port$906$0 = \$8 ;
- assign \port$907$0 = \$9 ;
- assign \port$908$0 = \$10 ;
- assign \port$909$0 = \$11 ;
- assign \port$910$0 = \$12 ;
- assign \port$911$0 = \$13 ;
- assign \port$912$0 = \$14 ;
- assign \port$913$0 = \$15 ;
- assign \port$914$0 = \$16 ;
- assign \port$915$0 = \$17 ;
- assign \port$916$0 = \$18 ;
- assign \port$917$0 = \$19 ;
- assign \port$918$0 = \$20 ;
- assign \port$919$0 = \$21 ;
- assign \port$920$0 = \$22 ;
- assign \port$921$0 = \$23 ;
- assign \port$922$0 = \$24 ;
- assign \port$923$0 = \$25 ;
- assign \port$924$0 = \$26 ;
- assign \port$925$0 = \$27 ;
- assign \port$926$0 = \$28 ;
- assign \port$927$0 = \$29 ;
- assign \port$928$0 = \$30 ;
- assign \port$929$0 = \$31 ;
- assign \port$930$0 = \$32 ;
- assign \port$931$0 = \$33 ;
- assign \port$932$0 = \$34 ;
- assign \port$933$0 = \$35 ;
- assign \port$934$0 = \$36 ;
- assign \port$935$0 = \$37 ;
- assign \port$936$0 = \$38 ;
- assign \port$937$0 = \$39 ;
- assign \port$938$0 = \$40 ;
- assign \port$939$0 = \$41 ;
- assign \port$940$0 = \$42 ;
- assign \port$941$0 = \$43 ;
- assign \port$942$0 = \$44 ;
- assign \port$943$0 = \$45 ;
- assign \port$944$0 = \$46 ;
- assign \port$945$0 = \$47 ;
- assign \port$946$0 = \$48 ;
- assign \port$947$0 = \$49 ;
- assign \port$948$0 = \$50 ;
- assign \port$949$0 = \$51 ;
- assign \port$950$0 = \$52 ;
- assign \port$951$0 = \$53 ;
- assign \port$952$0 = \$54 ;
- assign \port$953$0 = \$55 ;
- assign \port$954$0 = \$56 ;
- assign \port$955$0 = \$57 ;
- assign \port$956$0 = \$58 ;
- assign \port$957$0 = \$59 ;
- assign \port$958$0 = \$60 ;
- assign \port$959$0 = \$61 ;
- assign \port$960$0 = \$62 ;
- assign \port$961$0 = \$63 ;
- assign \port$962$0 = \$64 ;
- assign \port$963$0 = \$65 ;
- assign \port$964$0 = \$66 ;
-endmodule
diff --git a/flow/designs/src/mock-array/plot-running-times.py b/flow/designs/src/mock-array/plot-running-times.py
deleted file mode 100644
index 502678c10f..0000000000
--- a/flow/designs/src/mock-array/plot-running-times.py
+++ /dev/null
@@ -1,130 +0,0 @@
-import subprocess
-import os
-import re
-from matplotlib import pyplot as plt
-import numpy as np
-from matplotlib import cm
-import itertools
-
-
-def run():
- test_design = "make DESIGN_CONFIG=designs/asap7/mock-array/config.mk"
-
- times = []
-
- # measure three variables at the time.
- measurements = {
- "datawidth": (("MOCK_ARRAY_DATAWIDTH",), (8,)),
- "arraysize": (("MOCK_ARRAY_WIDTH", "MOCK_ARRAY_HEIGHT"), (8,)),
- "pitches": (("MOCK_ARRAY_TABLE",), ("8 8 4 4 5 5",)),
- "elementsize": (("MOCK_ARRAY_SCALE",), (45, 80, 160, 320, 640)),
- }
- measure_ids = sorted(measurements.keys())
-
- for measurement in itertools.product(
- *map(lambda key: measurements[key][1], measure_ids)
- ):
- variant = "-".join(map(str, measurement)).replace(" ", "-")
- print(f"testiong {variant}")
- env_change = {"FLOW_VARIANT": variant}
- for e in itertools.chain(
- *map(
- lambda measure: map(
- lambda var: {var: measure[1]}, measurements[measure[0]][0]
- ),
- zip(measure_ids, measurement),
- )
- ):
- u = dict(map(lambda item: (item[0], str(item[1])), e.items()))
- env_change.update(u)
- env = os.environ.copy()
- env.update(env_change)
-
- if not os.path.exists(f"results/asap7/mock-array_Element/{variant}/"):
- print(f"Measuring {variant}")
- for cmd in (
- test_design + " verilog",
- test_design,
- ):
- returncode = subprocess.call(cmd, env=env, shell=True)
- if returncode != 0:
- print("Skipping variant, doesn't compile: " + variant)
- result = subprocess.check_output(
- test_design + " elapsed", shell=True, env=env
- ).decode("utf-8")
-
- # Modify pattern to capture the stage of interest
- # Log Elapsed seconds
- # logname 40
- pattern = r"^5_2_route\s+(\d+)$"
- match = re.search(pattern, result, re.MULTILINE)
- if match is None:
- print("Variant skipped: " + variant)
- continue
- value = int(match.group(1))
- sample = list(measurement) + [value]
- print(" ".join(map(str, sample)))
- times.append(sample)
-
- dimensions = sum(map(lambda id: len(measurements[id][1]) > 1, measure_ids))
- if dimensions == 3:
- # 4 dimensional plot
- # plt.rcParams["figure.figsize"] = [7.00, 3.50]
- plt.rcParams["figure.autolayout"] = True
- fig = plt.figure()
- ax = fig.add_subplot(111, projection="3d")
-
- transposed = list(map(list, zip(*times)))
-
- norm = plt.Normalize(min(transposed[-1]), max(transposed[-1]))
- colors = cm.viridis(norm(transposed[-1]))
-
- cbar = fig.colorbar(cm.ScalarMappable(norm=norm, cmap=cm.viridis), ax=ax)
- cbar.set_label("running time/seconds")
-
- img = ax.scatter(*transposed, c=colors, alpha=1)
-
- ax.set_xlabel(measure_ids[0])
- ax.set_ylabel(measure_ids[1])
- ax.set_zlabel(measure_ids[2])
- plt.show()
- elif dimensions == 1:
- list(enumerate(map(lambda id: len(measurements[id][1]) > 1, measure_ids)))
- measure = next(
- (
- i
- for i, e in enumerate(
- map(lambda id: len(measurements[id][1]) > 1, measure_ids)
- )
- if e
- ),
- -1,
- )
-
- fig, ax = plt.subplots()
- x = np.array(list(map(lambda m: m[measure], times)))
- y = np.array(list(map(lambda m: m[-1], times)))
-
- # Calculate the best-fit line
- # slope, intercept = np.polyfit(x, y, 1)
- # trendline = slope * x + intercept
-
- # Create the plot
- ax.plot(
- x, y, marker="o", color="red", label="detailed route/seconds"
- ) # Plot the data points
- # ax.plot(x, trendline, '-', label='Trendline') # Plot the trendline
-
- # Customize the plot
- ax.set_xlabel(measure_ids[measure])
- ax.set_ylabel("Running time / seconds")
- # ax.set_yscale('log')
- ax.set_title("Detailed routing time")
- ax.legend()
-
- # Display the plot
- plt.show()
-
-
-if __name__ == "__main__":
- run()
diff --git a/flow/designs/src/mock-array/simulate.cpp b/flow/designs/src/mock-array/simulate.cpp
deleted file mode 100644
index 7b2fba8945..0000000000
--- a/flow/designs/src/mock-array/simulate.cpp
+++ /dev/null
@@ -1,95 +0,0 @@
-#include "VMockArray.h"
-#include "verilated.h"
-#include
-
-/**
- * Returns the VCD output path.
- *
- * If RESULTS_DIR is set, the VCD file will be written there. If not, it will be written to the
- * current directory.
- **/
-static std::string getVCDFilePath() {
-
- std::string results_dir = getenv("RESULTS_DIR");
- std::string vcd_file_name = "MockArrayTestbench.vcd";
- if (results_dir.empty()) {
- results_dir = ".";
- }
- std::string vcd_path = results_dir + "/" + vcd_file_name;
- return vcd_path;
-}
-
-int main(int argc, char** argv) {
- Verilated::commandArgs(argc, argv);
- VMockArray * top = new VMockArray;
-
- Verilated::traceEverOn(true);
- auto *vcd = new VerilatedVcdC;
-
- top->reset = 1;
- top->clock = 0;
-
- QData *inputs[] = {
- &top->io_ins_down_0,
- &top->io_ins_down_1,
- &top->io_ins_down_2,
- &top->io_ins_down_3,
- &top->io_ins_down_4,
- &top->io_ins_down_5,
- &top->io_ins_down_6,
- &top->io_ins_down_7,
- &top->io_ins_left_0,
- &top->io_ins_left_1,
- &top->io_ins_left_2,
- &top->io_ins_left_3,
- &top->io_ins_left_4,
- &top->io_ins_left_5,
- &top->io_ins_left_6,
- &top->io_ins_left_7,
- &top->io_ins_right_0,
- &top->io_ins_right_1,
- &top->io_ins_right_2,
- &top->io_ins_right_3,
- &top->io_ins_right_4,
- &top->io_ins_right_5,
- &top->io_ins_right_6,
- &top->io_ins_right_7,
- &top->io_ins_up_0,
- &top->io_ins_up_1,
- &top->io_ins_up_2,
- &top->io_ins_up_3,
- &top->io_ins_up_4,
- &top->io_ins_up_5,
- &top->io_ins_up_6,
- &top->io_ins_up_7
- };
-
- top->trace(vcd, 99); // Trace all levels of hierarchy
- vcd->open(getVCDFilePath().c_str());
-
- int tick = 0;
- for (int j = 0; j < sizeof(inputs)/sizeof(*inputs); j++) {
- for (int i = 0; i < 5; i++) {
- // if (Verilated::gotFinish()) {
- // goto done;
- // }
- *inputs[j] = tick ^ ((tick/2)%2 ? 0 : 0xffffffffffffffffUL);
- if (tick == 9) {
- top->reset = 0;
- }
-
- for (int k = 0; k < 2; k++) {
- top->eval();
- vcd->dump(tick++ * 125);
- top->clock = !top->clock;
- }
- }
- }
- done:
- vcd->flush();
- vcd->close();
-
- top->final();
- delete top;
- return 0;
-}
diff --git a/flow/designs/src/mock-array/src/main/resources/multiplier.v b/flow/designs/src/mock-array/src/main/resources/multiplier.v
deleted file mode 100644
index 03c2f06e14..0000000000
--- a/flow/designs/src/mock-array/src/main/resources/multiplier.v
+++ /dev/null
@@ -1,24740 +0,0 @@
-/* Generated by Amaranth Yosys 0.40 (PyPI ver 0.40.0.0.post102, git sha1 a1bb0255d) */
-
-module multiplier(b, clk, rst, o, a);
- wire \$1 ;
- wire \$10 ;
- wire \$100 ;
- wire \$101 ;
- wire \$102 ;
- wire \$103 ;
- wire \$104 ;
- wire \$105 ;
- wire \$106 ;
- wire \$107 ;
- wire \$108 ;
- wire \$109 ;
- wire \$11 ;
- wire \$110 ;
- wire \$111 ;
- wire \$112 ;
- wire \$113 ;
- wire \$114 ;
- wire \$115 ;
- wire \$116 ;
- wire \$117 ;
- wire \$12 ;
- wire \$13 ;
- wire \$14 ;
- wire \$15 ;
- wire \$16 ;
- wire \$17 ;
- wire \$18 ;
- wire \$19 ;
- wire \$2 ;
- wire \$20 ;
- wire \$21 ;
- wire \$22 ;
- wire \$23 ;
- wire \$24 ;
- wire \$25 ;
- wire \$26 ;
- wire \$27 ;
- wire \$28 ;
- wire \$29 ;
- wire \$3 ;
- wire \$30 ;
- wire \$31 ;
- wire \$32 ;
- wire \$33 ;
- wire \$34 ;
- wire \$35 ;
- wire \$36 ;
- wire \$37 ;
- wire \$38 ;
- wire \$39 ;
- wire \$4 ;
- wire \$40 ;
- wire \$41 ;
- wire \$42 ;
- wire \$43 ;
- wire \$44 ;
- wire \$45 ;
- wire \$46 ;
- wire \$47 ;
- wire \$48 ;
- wire \$49 ;
- wire \$5 ;
- wire \$50 ;
- wire \$51 ;
- wire \$52 ;
- wire \$53 ;
- wire \$54 ;
- wire \$55 ;
- wire \$56 ;
- wire \$57 ;
- wire \$58 ;
- wire \$59 ;
- wire \$6 ;
- wire \$60 ;
- wire \$61 ;
- wire \$62 ;
- wire \$63 ;
- wire \$64 ;
- wire \$65 ;
- wire \$66 ;
- wire \$67 ;
- wire \$68 ;
- wire \$69 ;
- wire \$7 ;
- wire \$70 ;
- wire \$71 ;
- wire \$72 ;
- wire \$73 ;
- wire \$74 ;
- wire \$75 ;
- wire \$76 ;
- wire \$77 ;
- wire \$78 ;
- wire \$79 ;
- wire \$8 ;
- wire \$80 ;
- wire \$81 ;
- wire \$82 ;
- wire \$83 ;
- wire \$84 ;
- wire \$85 ;
- wire \$86 ;
- wire \$87 ;
- wire \$88 ;
- wire \$89 ;
- wire \$9 ;
- wire \$90 ;
- wire \$91 ;
- wire \$92 ;
- wire \$93 ;
- wire \$94 ;
- wire \$95 ;
- wire \$96 ;
- wire \$97 ;
- wire \$98 ;
- wire \$99 ;
- input [31:0] a;
- wire [31:0] a;
- (* init = 64'h0000000000000000 *)
- wire [63:0] \a$1971 ;
- reg [31:0] a_registered = 32'd0;
- input [31:0] b;
- wire [31:0] b;
- (* init = 64'h0000000000000000 *)
- wire [63:0] \b$1972 ;
- reg [31:0] b_registered = 32'd0;
- wire booth_b0_m0;
- wire booth_b0_m1;
- wire booth_b0_m10;
- wire booth_b0_m11;
- wire booth_b0_m12;
- wire booth_b0_m13;
- wire booth_b0_m14;
- wire booth_b0_m15;
- wire booth_b0_m16;
- wire booth_b0_m17;
- wire booth_b0_m18;
- wire booth_b0_m19;
- wire booth_b0_m2;
- wire booth_b0_m20;
- wire booth_b0_m21;
- wire booth_b0_m22;
- wire booth_b0_m23;
- wire booth_b0_m24;
- wire booth_b0_m25;
- wire booth_b0_m26;
- wire booth_b0_m27;
- wire booth_b0_m28;
- wire booth_b0_m29;
- wire booth_b0_m3;
- wire booth_b0_m30;
- wire booth_b0_m31;
- wire booth_b0_m32;
- wire booth_b0_m4;
- wire booth_b0_m5;
- wire booth_b0_m6;
- wire booth_b0_m7;
- wire booth_b0_m8;
- wire booth_b0_m9;
- wire booth_b10_m0;
- wire booth_b10_m1;
- wire booth_b10_m10;
- wire booth_b10_m11;
- wire booth_b10_m12;
- wire booth_b10_m13;
- wire booth_b10_m14;
- wire booth_b10_m15;
- wire booth_b10_m16;
- wire booth_b10_m17;
- wire booth_b10_m18;
- wire booth_b10_m19;
- wire booth_b10_m2;
- wire booth_b10_m20;
- wire booth_b10_m21;
- wire booth_b10_m22;
- wire booth_b10_m23;
- wire booth_b10_m24;
- wire booth_b10_m25;
- wire booth_b10_m26;
- wire booth_b10_m27;
- wire booth_b10_m28;
- wire booth_b10_m29;
- wire booth_b10_m3;
- wire booth_b10_m30;
- wire booth_b10_m31;
- wire booth_b10_m32;
- wire booth_b10_m4;
- wire booth_b10_m5;
- wire booth_b10_m6;
- wire booth_b10_m7;
- wire booth_b10_m8;
- wire booth_b10_m9;
- wire booth_b12_m0;
- wire booth_b12_m1;
- wire booth_b12_m10;
- wire booth_b12_m11;
- wire booth_b12_m12;
- wire booth_b12_m13;
- wire booth_b12_m14;
- wire booth_b12_m15;
- wire booth_b12_m16;
- wire booth_b12_m17;
- wire booth_b12_m18;
- wire booth_b12_m19;
- wire booth_b12_m2;
- wire booth_b12_m20;
- wire booth_b12_m21;
- wire booth_b12_m22;
- wire booth_b12_m23;
- wire booth_b12_m24;
- wire booth_b12_m25;
- wire booth_b12_m26;
- wire booth_b12_m27;
- wire booth_b12_m28;
- wire booth_b12_m29;
- wire booth_b12_m3;
- wire booth_b12_m30;
- wire booth_b12_m31;
- wire booth_b12_m32;
- wire booth_b12_m4;
- wire booth_b12_m5;
- wire booth_b12_m6;
- wire booth_b12_m7;
- wire booth_b12_m8;
- wire booth_b12_m9;
- wire booth_b14_m0;
- wire booth_b14_m1;
- wire booth_b14_m10;
- wire booth_b14_m11;
- wire booth_b14_m12;
- wire booth_b14_m13;
- wire booth_b14_m14;
- wire booth_b14_m15;
- wire booth_b14_m16;
- wire booth_b14_m17;
- wire booth_b14_m18;
- wire booth_b14_m19;
- wire booth_b14_m2;
- wire booth_b14_m20;
- wire booth_b14_m21;
- wire booth_b14_m22;
- wire booth_b14_m23;
- wire booth_b14_m24;
- wire booth_b14_m25;
- wire booth_b14_m26;
- wire booth_b14_m27;
- wire booth_b14_m28;
- wire booth_b14_m29;
- wire booth_b14_m3;
- wire booth_b14_m30;
- wire booth_b14_m31;
- wire booth_b14_m32;
- wire booth_b14_m4;
- wire booth_b14_m5;
- wire booth_b14_m6;
- wire booth_b14_m7;
- wire booth_b14_m8;
- wire booth_b14_m9;
- wire booth_b16_m0;
- wire booth_b16_m1;
- wire booth_b16_m10;
- wire booth_b16_m11;
- wire booth_b16_m12;
- wire booth_b16_m13;
- wire booth_b16_m14;
- wire booth_b16_m15;
- wire booth_b16_m16;
- wire booth_b16_m17;
- wire booth_b16_m18;
- wire booth_b16_m19;
- wire booth_b16_m2;
- wire booth_b16_m20;
- wire booth_b16_m21;
- wire booth_b16_m22;
- wire booth_b16_m23;
- wire booth_b16_m24;
- wire booth_b16_m25;
- wire booth_b16_m26;
- wire booth_b16_m27;
- wire booth_b16_m28;
- wire booth_b16_m29;
- wire booth_b16_m3;
- wire booth_b16_m30;
- wire booth_b16_m31;
- wire booth_b16_m32;
- wire booth_b16_m4;
- wire booth_b16_m5;
- wire booth_b16_m6;
- wire booth_b16_m7;
- wire booth_b16_m8;
- wire booth_b16_m9;
- wire booth_b18_m0;
- wire booth_b18_m1;
- wire booth_b18_m10;
- wire booth_b18_m11;
- wire booth_b18_m12;
- wire booth_b18_m13;
- wire booth_b18_m14;
- wire booth_b18_m15;
- wire booth_b18_m16;
- wire booth_b18_m17;
- wire booth_b18_m18;
- wire booth_b18_m19;
- wire booth_b18_m2;
- wire booth_b18_m20;
- wire booth_b18_m21;
- wire booth_b18_m22;
- wire booth_b18_m23;
- wire booth_b18_m24;
- wire booth_b18_m25;
- wire booth_b18_m26;
- wire booth_b18_m27;
- wire booth_b18_m28;
- wire booth_b18_m29;
- wire booth_b18_m3;
- wire booth_b18_m30;
- wire booth_b18_m31;
- wire booth_b18_m32;
- wire booth_b18_m4;
- wire booth_b18_m5;
- wire booth_b18_m6;
- wire booth_b18_m7;
- wire booth_b18_m8;
- wire booth_b18_m9;
- wire booth_b20_m0;
- wire booth_b20_m1;
- wire booth_b20_m10;
- wire booth_b20_m11;
- wire booth_b20_m12;
- wire booth_b20_m13;
- wire booth_b20_m14;
- wire booth_b20_m15;
- wire booth_b20_m16;
- wire booth_b20_m17;
- wire booth_b20_m18;
- wire booth_b20_m19;
- wire booth_b20_m2;
- wire booth_b20_m20;
- wire booth_b20_m21;
- wire booth_b20_m22;
- wire booth_b20_m23;
- wire booth_b20_m24;
- wire booth_b20_m25;
- wire booth_b20_m26;
- wire booth_b20_m27;
- wire booth_b20_m28;
- wire booth_b20_m29;
- wire booth_b20_m3;
- wire booth_b20_m30;
- wire booth_b20_m31;
- wire booth_b20_m32;
- wire booth_b20_m4;
- wire booth_b20_m5;
- wire booth_b20_m6;
- wire booth_b20_m7;
- wire booth_b20_m8;
- wire booth_b20_m9;
- wire booth_b22_m0;
- wire booth_b22_m1;
- wire booth_b22_m10;
- wire booth_b22_m11;
- wire booth_b22_m12;
- wire booth_b22_m13;
- wire booth_b22_m14;
- wire booth_b22_m15;
- wire booth_b22_m16;
- wire booth_b22_m17;
- wire booth_b22_m18;
- wire booth_b22_m19;
- wire booth_b22_m2;
- wire booth_b22_m20;
- wire booth_b22_m21;
- wire booth_b22_m22;
- wire booth_b22_m23;
- wire booth_b22_m24;
- wire booth_b22_m25;
- wire booth_b22_m26;
- wire booth_b22_m27;
- wire booth_b22_m28;
- wire booth_b22_m29;
- wire booth_b22_m3;
- wire booth_b22_m30;
- wire booth_b22_m31;
- wire booth_b22_m32;
- wire booth_b22_m4;
- wire booth_b22_m5;
- wire booth_b22_m6;
- wire booth_b22_m7;
- wire booth_b22_m8;
- wire booth_b22_m9;
- wire booth_b24_m0;
- wire booth_b24_m1;
- wire booth_b24_m10;
- wire booth_b24_m11;
- wire booth_b24_m12;
- wire booth_b24_m13;
- wire booth_b24_m14;
- wire booth_b24_m15;
- wire booth_b24_m16;
- wire booth_b24_m17;
- wire booth_b24_m18;
- wire booth_b24_m19;
- wire booth_b24_m2;
- wire booth_b24_m20;
- wire booth_b24_m21;
- wire booth_b24_m22;
- wire booth_b24_m23;
- wire booth_b24_m24;
- wire booth_b24_m25;
- wire booth_b24_m26;
- wire booth_b24_m27;
- wire booth_b24_m28;
- wire booth_b24_m29;
- wire booth_b24_m3;
- wire booth_b24_m30;
- wire booth_b24_m31;
- wire booth_b24_m32;
- wire booth_b24_m4;
- wire booth_b24_m5;
- wire booth_b24_m6;
- wire booth_b24_m7;
- wire booth_b24_m8;
- wire booth_b24_m9;
- wire booth_b26_m0;
- wire booth_b26_m1;
- wire booth_b26_m10;
- wire booth_b26_m11;
- wire booth_b26_m12;
- wire booth_b26_m13;
- wire booth_b26_m14;
- wire booth_b26_m15;
- wire booth_b26_m16;
- wire booth_b26_m17;
- wire booth_b26_m18;
- wire booth_b26_m19;
- wire booth_b26_m2;
- wire booth_b26_m20;
- wire booth_b26_m21;
- wire booth_b26_m22;
- wire booth_b26_m23;
- wire booth_b26_m24;
- wire booth_b26_m25;
- wire booth_b26_m26;
- wire booth_b26_m27;
- wire booth_b26_m28;
- wire booth_b26_m29;
- wire booth_b26_m3;
- wire booth_b26_m30;
- wire booth_b26_m31;
- wire booth_b26_m32;
- wire booth_b26_m4;
- wire booth_b26_m5;
- wire booth_b26_m6;
- wire booth_b26_m7;
- wire booth_b26_m8;
- wire booth_b26_m9;
- wire booth_b28_m0;
- wire booth_b28_m1;
- wire booth_b28_m10;
- wire booth_b28_m11;
- wire booth_b28_m12;
- wire booth_b28_m13;
- wire booth_b28_m14;
- wire booth_b28_m15;
- wire booth_b28_m16;
- wire booth_b28_m17;
- wire booth_b28_m18;
- wire booth_b28_m19;
- wire booth_b28_m2;
- wire booth_b28_m20;
- wire booth_b28_m21;
- wire booth_b28_m22;
- wire booth_b28_m23;
- wire booth_b28_m24;
- wire booth_b28_m25;
- wire booth_b28_m26;
- wire booth_b28_m27;
- wire booth_b28_m28;
- wire booth_b28_m29;
- wire booth_b28_m3;
- wire booth_b28_m30;
- wire booth_b28_m31;
- wire booth_b28_m32;
- wire booth_b28_m4;
- wire booth_b28_m5;
- wire booth_b28_m6;
- wire booth_b28_m7;
- wire booth_b28_m8;
- wire booth_b28_m9;
- wire booth_b2_m0;
- wire booth_b2_m1;
- wire booth_b2_m10;
- wire booth_b2_m11;
- wire booth_b2_m12;
- wire booth_b2_m13;
- wire booth_b2_m14;
- wire booth_b2_m15;
- wire booth_b2_m16;
- wire booth_b2_m17;
- wire booth_b2_m18;
- wire booth_b2_m19;
- wire booth_b2_m2;
- wire booth_b2_m20;
- wire booth_b2_m21;
- wire booth_b2_m22;
- wire booth_b2_m23;
- wire booth_b2_m24;
- wire booth_b2_m25;
- wire booth_b2_m26;
- wire booth_b2_m27;
- wire booth_b2_m28;
- wire booth_b2_m29;
- wire booth_b2_m3;
- wire booth_b2_m30;
- wire booth_b2_m31;
- wire booth_b2_m32;
- wire booth_b2_m4;
- wire booth_b2_m5;
- wire booth_b2_m6;
- wire booth_b2_m7;
- wire booth_b2_m8;
- wire booth_b2_m9;
- wire booth_b30_m0;
- wire booth_b30_m1;
- wire booth_b30_m10;
- wire booth_b30_m11;
- wire booth_b30_m12;
- wire booth_b30_m13;
- wire booth_b30_m14;
- wire booth_b30_m15;
- wire booth_b30_m16;
- wire booth_b30_m17;
- wire booth_b30_m18;
- wire booth_b30_m19;
- wire booth_b30_m2;
- wire booth_b30_m20;
- wire booth_b30_m21;
- wire booth_b30_m22;
- wire booth_b30_m23;
- wire booth_b30_m24;
- wire booth_b30_m25;
- wire booth_b30_m26;
- wire booth_b30_m27;
- wire booth_b30_m28;
- wire booth_b30_m29;
- wire booth_b30_m3;
- wire booth_b30_m30;
- wire booth_b30_m31;
- wire booth_b30_m32;
- wire booth_b30_m4;
- wire booth_b30_m5;
- wire booth_b30_m6;
- wire booth_b30_m7;
- wire booth_b30_m8;
- wire booth_b30_m9;
- wire booth_b32_m0;
- wire booth_b32_m1;
- wire booth_b32_m10;
- wire booth_b32_m11;
- wire booth_b32_m12;
- wire booth_b32_m13;
- wire booth_b32_m14;
- wire booth_b32_m15;
- wire booth_b32_m16;
- wire booth_b32_m17;
- wire booth_b32_m18;
- wire booth_b32_m19;
- wire booth_b32_m2;
- wire booth_b32_m20;
- wire booth_b32_m21;
- wire booth_b32_m22;
- wire booth_b32_m23;
- wire booth_b32_m24;
- wire booth_b32_m25;
- wire booth_b32_m26;
- wire booth_b32_m27;
- wire booth_b32_m28;
- wire booth_b32_m29;
- wire booth_b32_m3;
- wire booth_b32_m30;
- wire booth_b32_m31;
- wire booth_b32_m32;
- wire booth_b32_m4;
- wire booth_b32_m5;
- wire booth_b32_m6;
- wire booth_b32_m7;
- wire booth_b32_m8;
- wire booth_b32_m9;
- wire booth_b4_m0;
- wire booth_b4_m1;
- wire booth_b4_m10;
- wire booth_b4_m11;
- wire booth_b4_m12;
- wire booth_b4_m13;
- wire booth_b4_m14;
- wire booth_b4_m15;
- wire booth_b4_m16;
- wire booth_b4_m17;
- wire booth_b4_m18;
- wire booth_b4_m19;
- wire booth_b4_m2;
- wire booth_b4_m20;
- wire booth_b4_m21;
- wire booth_b4_m22;
- wire booth_b4_m23;
- wire booth_b4_m24;
- wire booth_b4_m25;
- wire booth_b4_m26;
- wire booth_b4_m27;
- wire booth_b4_m28;
- wire booth_b4_m29;
- wire booth_b4_m3;
- wire booth_b4_m30;
- wire booth_b4_m31;
- wire booth_b4_m32;
- wire booth_b4_m4;
- wire booth_b4_m5;
- wire booth_b4_m6;
- wire booth_b4_m7;
- wire booth_b4_m8;
- wire booth_b4_m9;
- wire booth_b6_m0;
- wire booth_b6_m1;
- wire booth_b6_m10;
- wire booth_b6_m11;
- wire booth_b6_m12;
- wire booth_b6_m13;
- wire booth_b6_m14;
- wire booth_b6_m15;
- wire booth_b6_m16;
- wire booth_b6_m17;
- wire booth_b6_m18;
- wire booth_b6_m19;
- wire booth_b6_m2;
- wire booth_b6_m20;
- wire booth_b6_m21;
- wire booth_b6_m22;
- wire booth_b6_m23;
- wire booth_b6_m24;
- wire booth_b6_m25;
- wire booth_b6_m26;
- wire booth_b6_m27;
- wire booth_b6_m28;
- wire booth_b6_m29;
- wire booth_b6_m3;
- wire booth_b6_m30;
- wire booth_b6_m31;
- wire booth_b6_m32;
- wire booth_b6_m4;
- wire booth_b6_m5;
- wire booth_b6_m6;
- wire booth_b6_m7;
- wire booth_b6_m8;
- wire booth_b6_m9;
- wire booth_b8_m0;
- wire booth_b8_m1;
- wire booth_b8_m10;
- wire booth_b8_m11;
- wire booth_b8_m12;
- wire booth_b8_m13;
- wire booth_b8_m14;
- wire booth_b8_m15;
- wire booth_b8_m16;
- wire booth_b8_m17;
- wire booth_b8_m18;
- wire booth_b8_m19;
- wire booth_b8_m2;
- wire booth_b8_m20;
- wire booth_b8_m21;
- wire booth_b8_m22;
- wire booth_b8_m23;
- wire booth_b8_m24;
- wire booth_b8_m25;
- wire booth_b8_m26;
- wire booth_b8_m27;
- wire booth_b8_m28;
- wire booth_b8_m29;
- wire booth_b8_m3;
- wire booth_b8_m30;
- wire booth_b8_m31;
- wire booth_b8_m32;
- wire booth_b8_m4;
- wire booth_b8_m5;
- wire booth_b8_m6;
- wire booth_b8_m7;
- wire booth_b8_m8;
- wire booth_b8_m9;
- wire [2:0] booth_block0;
- wire [1:0] booth_block0_mand0;
- wire [1:0] booth_block0_mand1;
- wire [1:0] booth_block0_mand10;
- wire [1:0] booth_block0_mand11;
- wire [1:0] booth_block0_mand12;
- wire [1:0] booth_block0_mand13;
- wire [1:0] booth_block0_mand14;
- wire [1:0] booth_block0_mand15;
- wire [1:0] booth_block0_mand16;
- wire [1:0] booth_block0_mand17;
- wire [1:0] booth_block0_mand18;
- wire [1:0] booth_block0_mand19;
- wire [1:0] booth_block0_mand2;
- wire [1:0] booth_block0_mand20;
- wire [1:0] booth_block0_mand21;
- wire [1:0] booth_block0_mand22;
- wire [1:0] booth_block0_mand23;
- wire [1:0] booth_block0_mand24;
- wire [1:0] booth_block0_mand25;
- wire [1:0] booth_block0_mand26;
- wire [1:0] booth_block0_mand27;
- wire [1:0] booth_block0_mand28;
- wire [1:0] booth_block0_mand29;
- wire [1:0] booth_block0_mand3;
- wire [1:0] booth_block0_mand30;
- wire [1:0] booth_block0_mand31;
- wire [1:0] booth_block0_mand32;
- wire [1:0] booth_block0_mand4;
- wire [1:0] booth_block0_mand5;
- wire [1:0] booth_block0_mand6;
- wire [1:0] booth_block0_mand7;
- wire [1:0] booth_block0_mand8;
- wire [1:0] booth_block0_mand9;
- wire [1:0] booth_block0_sel;
- wire booth_block0_sign;
- wire [2:0] booth_block10;
- wire [1:0] booth_block10_mand0;
- wire [1:0] booth_block10_mand1;
- wire [1:0] booth_block10_mand10;
- wire [1:0] booth_block10_mand11;
- wire [1:0] booth_block10_mand12;
- wire [1:0] booth_block10_mand13;
- wire [1:0] booth_block10_mand14;
- wire [1:0] booth_block10_mand15;
- wire [1:0] booth_block10_mand16;
- wire [1:0] booth_block10_mand17;
- wire [1:0] booth_block10_mand18;
- wire [1:0] booth_block10_mand19;
- wire [1:0] booth_block10_mand2;
- wire [1:0] booth_block10_mand20;
- wire [1:0] booth_block10_mand21;
- wire [1:0] booth_block10_mand22;
- wire [1:0] booth_block10_mand23;
- wire [1:0] booth_block10_mand24;
- wire [1:0] booth_block10_mand25;
- wire [1:0] booth_block10_mand26;
- wire [1:0] booth_block10_mand27;
- wire [1:0] booth_block10_mand28;
- wire [1:0] booth_block10_mand29;
- wire [1:0] booth_block10_mand3;
- wire [1:0] booth_block10_mand30;
- wire [1:0] booth_block10_mand31;
- wire [1:0] booth_block10_mand32;
- wire [1:0] booth_block10_mand4;
- wire [1:0] booth_block10_mand5;
- wire [1:0] booth_block10_mand6;
- wire [1:0] booth_block10_mand7;
- wire [1:0] booth_block10_mand8;
- wire [1:0] booth_block10_mand9;
- wire [1:0] booth_block10_sel;
- wire booth_block10_sign;
- wire [2:0] booth_block12;
- wire [1:0] booth_block12_mand0;
- wire [1:0] booth_block12_mand1;
- wire [1:0] booth_block12_mand10;
- wire [1:0] booth_block12_mand11;
- wire [1:0] booth_block12_mand12;
- wire [1:0] booth_block12_mand13;
- wire [1:0] booth_block12_mand14;
- wire [1:0] booth_block12_mand15;
- wire [1:0] booth_block12_mand16;
- wire [1:0] booth_block12_mand17;
- wire [1:0] booth_block12_mand18;
- wire [1:0] booth_block12_mand19;
- wire [1:0] booth_block12_mand2;
- wire [1:0] booth_block12_mand20;
- wire [1:0] booth_block12_mand21;
- wire [1:0] booth_block12_mand22;
- wire [1:0] booth_block12_mand23;
- wire [1:0] booth_block12_mand24;
- wire [1:0] booth_block12_mand25;
- wire [1:0] booth_block12_mand26;
- wire [1:0] booth_block12_mand27;
- wire [1:0] booth_block12_mand28;
- wire [1:0] booth_block12_mand29;
- wire [1:0] booth_block12_mand3;
- wire [1:0] booth_block12_mand30;
- wire [1:0] booth_block12_mand31;
- wire [1:0] booth_block12_mand32;
- wire [1:0] booth_block12_mand4;
- wire [1:0] booth_block12_mand5;
- wire [1:0] booth_block12_mand6;
- wire [1:0] booth_block12_mand7;
- wire [1:0] booth_block12_mand8;
- wire [1:0] booth_block12_mand9;
- wire [1:0] booth_block12_sel;
- wire booth_block12_sign;
- wire [2:0] booth_block14;
- wire [1:0] booth_block14_mand0;
- wire [1:0] booth_block14_mand1;
- wire [1:0] booth_block14_mand10;
- wire [1:0] booth_block14_mand11;
- wire [1:0] booth_block14_mand12;
- wire [1:0] booth_block14_mand13;
- wire [1:0] booth_block14_mand14;
- wire [1:0] booth_block14_mand15;
- wire [1:0] booth_block14_mand16;
- wire [1:0] booth_block14_mand17;
- wire [1:0] booth_block14_mand18;
- wire [1:0] booth_block14_mand19;
- wire [1:0] booth_block14_mand2;
- wire [1:0] booth_block14_mand20;
- wire [1:0] booth_block14_mand21;
- wire [1:0] booth_block14_mand22;
- wire [1:0] booth_block14_mand23;
- wire [1:0] booth_block14_mand24;
- wire [1:0] booth_block14_mand25;
- wire [1:0] booth_block14_mand26;
- wire [1:0] booth_block14_mand27;
- wire [1:0] booth_block14_mand28;
- wire [1:0] booth_block14_mand29;
- wire [1:0] booth_block14_mand3;
- wire [1:0] booth_block14_mand30;
- wire [1:0] booth_block14_mand31;
- wire [1:0] booth_block14_mand32;
- wire [1:0] booth_block14_mand4;
- wire [1:0] booth_block14_mand5;
- wire [1:0] booth_block14_mand6;
- wire [1:0] booth_block14_mand7;
- wire [1:0] booth_block14_mand8;
- wire [1:0] booth_block14_mand9;
- wire [1:0] booth_block14_sel;
- wire booth_block14_sign;
- wire [2:0] booth_block16;
- wire [1:0] booth_block16_mand0;
- wire [1:0] booth_block16_mand1;
- wire [1:0] booth_block16_mand10;
- wire [1:0] booth_block16_mand11;
- wire [1:0] booth_block16_mand12;
- wire [1:0] booth_block16_mand13;
- wire [1:0] booth_block16_mand14;
- wire [1:0] booth_block16_mand15;
- wire [1:0] booth_block16_mand16;
- wire [1:0] booth_block16_mand17;
- wire [1:0] booth_block16_mand18;
- wire [1:0] booth_block16_mand19;
- wire [1:0] booth_block16_mand2;
- wire [1:0] booth_block16_mand20;
- wire [1:0] booth_block16_mand21;
- wire [1:0] booth_block16_mand22;
- wire [1:0] booth_block16_mand23;
- wire [1:0] booth_block16_mand24;
- wire [1:0] booth_block16_mand25;
- wire [1:0] booth_block16_mand26;
- wire [1:0] booth_block16_mand27;
- wire [1:0] booth_block16_mand28;
- wire [1:0] booth_block16_mand29;
- wire [1:0] booth_block16_mand3;
- wire [1:0] booth_block16_mand30;
- wire [1:0] booth_block16_mand31;
- wire [1:0] booth_block16_mand32;
- wire [1:0] booth_block16_mand4;
- wire [1:0] booth_block16_mand5;
- wire [1:0] booth_block16_mand6;
- wire [1:0] booth_block16_mand7;
- wire [1:0] booth_block16_mand8;
- wire [1:0] booth_block16_mand9;
- wire [1:0] booth_block16_sel;
- wire booth_block16_sign;
- wire [2:0] booth_block18;
- wire [1:0] booth_block18_mand0;
- wire [1:0] booth_block18_mand1;
- wire [1:0] booth_block18_mand10;
- wire [1:0] booth_block18_mand11;
- wire [1:0] booth_block18_mand12;
- wire [1:0] booth_block18_mand13;
- wire [1:0] booth_block18_mand14;
- wire [1:0] booth_block18_mand15;
- wire [1:0] booth_block18_mand16;
- wire [1:0] booth_block18_mand17;
- wire [1:0] booth_block18_mand18;
- wire [1:0] booth_block18_mand19;
- wire [1:0] booth_block18_mand2;
- wire [1:0] booth_block18_mand20;
- wire [1:0] booth_block18_mand21;
- wire [1:0] booth_block18_mand22;
- wire [1:0] booth_block18_mand23;
- wire [1:0] booth_block18_mand24;
- wire [1:0] booth_block18_mand25;
- wire [1:0] booth_block18_mand26;
- wire [1:0] booth_block18_mand27;
- wire [1:0] booth_block18_mand28;
- wire [1:0] booth_block18_mand29;
- wire [1:0] booth_block18_mand3;
- wire [1:0] booth_block18_mand30;
- wire [1:0] booth_block18_mand31;
- wire [1:0] booth_block18_mand32;
- wire [1:0] booth_block18_mand4;
- wire [1:0] booth_block18_mand5;
- wire [1:0] booth_block18_mand6;
- wire [1:0] booth_block18_mand7;
- wire [1:0] booth_block18_mand8;
- wire [1:0] booth_block18_mand9;
- wire [1:0] booth_block18_sel;
- wire booth_block18_sign;
- wire [2:0] booth_block2;
- wire [2:0] booth_block20;
- wire [1:0] booth_block20_mand0;
- wire [1:0] booth_block20_mand1;
- wire [1:0] booth_block20_mand10;
- wire [1:0] booth_block20_mand11;
- wire [1:0] booth_block20_mand12;
- wire [1:0] booth_block20_mand13;
- wire [1:0] booth_block20_mand14;
- wire [1:0] booth_block20_mand15;
- wire [1:0] booth_block20_mand16;
- wire [1:0] booth_block20_mand17;
- wire [1:0] booth_block20_mand18;
- wire [1:0] booth_block20_mand19;
- wire [1:0] booth_block20_mand2;
- wire [1:0] booth_block20_mand20;
- wire [1:0] booth_block20_mand21;
- wire [1:0] booth_block20_mand22;
- wire [1:0] booth_block20_mand23;
- wire [1:0] booth_block20_mand24;
- wire [1:0] booth_block20_mand25;
- wire [1:0] booth_block20_mand26;
- wire [1:0] booth_block20_mand27;
- wire [1:0] booth_block20_mand28;
- wire [1:0] booth_block20_mand29;
- wire [1:0] booth_block20_mand3;
- wire [1:0] booth_block20_mand30;
- wire [1:0] booth_block20_mand31;
- wire [1:0] booth_block20_mand32;
- wire [1:0] booth_block20_mand4;
- wire [1:0] booth_block20_mand5;
- wire [1:0] booth_block20_mand6;
- wire [1:0] booth_block20_mand7;
- wire [1:0] booth_block20_mand8;
- wire [1:0] booth_block20_mand9;
- wire [1:0] booth_block20_sel;
- wire booth_block20_sign;
- wire [2:0] booth_block22;
- wire [1:0] booth_block22_mand0;
- wire [1:0] booth_block22_mand1;
- wire [1:0] booth_block22_mand10;
- wire [1:0] booth_block22_mand11;
- wire [1:0] booth_block22_mand12;
- wire [1:0] booth_block22_mand13;
- wire [1:0] booth_block22_mand14;
- wire [1:0] booth_block22_mand15;
- wire [1:0] booth_block22_mand16;
- wire [1:0] booth_block22_mand17;
- wire [1:0] booth_block22_mand18;
- wire [1:0] booth_block22_mand19;
- wire [1:0] booth_block22_mand2;
- wire [1:0] booth_block22_mand20;
- wire [1:0] booth_block22_mand21;
- wire [1:0] booth_block22_mand22;
- wire [1:0] booth_block22_mand23;
- wire [1:0] booth_block22_mand24;
- wire [1:0] booth_block22_mand25;
- wire [1:0] booth_block22_mand26;
- wire [1:0] booth_block22_mand27;
- wire [1:0] booth_block22_mand28;
- wire [1:0] booth_block22_mand29;
- wire [1:0] booth_block22_mand3;
- wire [1:0] booth_block22_mand30;
- wire [1:0] booth_block22_mand31;
- wire [1:0] booth_block22_mand32;
- wire [1:0] booth_block22_mand4;
- wire [1:0] booth_block22_mand5;
- wire [1:0] booth_block22_mand6;
- wire [1:0] booth_block22_mand7;
- wire [1:0] booth_block22_mand8;
- wire [1:0] booth_block22_mand9;
- wire [1:0] booth_block22_sel;
- wire booth_block22_sign;
- wire [2:0] booth_block24;
- wire [1:0] booth_block24_mand0;
- wire [1:0] booth_block24_mand1;
- wire [1:0] booth_block24_mand10;
- wire [1:0] booth_block24_mand11;
- wire [1:0] booth_block24_mand12;
- wire [1:0] booth_block24_mand13;
- wire [1:0] booth_block24_mand14;
- wire [1:0] booth_block24_mand15;
- wire [1:0] booth_block24_mand16;
- wire [1:0] booth_block24_mand17;
- wire [1:0] booth_block24_mand18;
- wire [1:0] booth_block24_mand19;
- wire [1:0] booth_block24_mand2;
- wire [1:0] booth_block24_mand20;
- wire [1:0] booth_block24_mand21;
- wire [1:0] booth_block24_mand22;
- wire [1:0] booth_block24_mand23;
- wire [1:0] booth_block24_mand24;
- wire [1:0] booth_block24_mand25;
- wire [1:0] booth_block24_mand26;
- wire [1:0] booth_block24_mand27;
- wire [1:0] booth_block24_mand28;
- wire [1:0] booth_block24_mand29;
- wire [1:0] booth_block24_mand3;
- wire [1:0] booth_block24_mand30;
- wire [1:0] booth_block24_mand31;
- wire [1:0] booth_block24_mand32;
- wire [1:0] booth_block24_mand4;
- wire [1:0] booth_block24_mand5;
- wire [1:0] booth_block24_mand6;
- wire [1:0] booth_block24_mand7;
- wire [1:0] booth_block24_mand8;
- wire [1:0] booth_block24_mand9;
- wire [1:0] booth_block24_sel;
- wire booth_block24_sign;
- wire [2:0] booth_block26;
- wire [1:0] booth_block26_mand0;
- wire [1:0] booth_block26_mand1;
- wire [1:0] booth_block26_mand10;
- wire [1:0] booth_block26_mand11;
- wire [1:0] booth_block26_mand12;
- wire [1:0] booth_block26_mand13;
- wire [1:0] booth_block26_mand14;
- wire [1:0] booth_block26_mand15;
- wire [1:0] booth_block26_mand16;
- wire [1:0] booth_block26_mand17;
- wire [1:0] booth_block26_mand18;
- wire [1:0] booth_block26_mand19;
- wire [1:0] booth_block26_mand2;
- wire [1:0] booth_block26_mand20;
- wire [1:0] booth_block26_mand21;
- wire [1:0] booth_block26_mand22;
- wire [1:0] booth_block26_mand23;
- wire [1:0] booth_block26_mand24;
- wire [1:0] booth_block26_mand25;
- wire [1:0] booth_block26_mand26;
- wire [1:0] booth_block26_mand27;
- wire [1:0] booth_block26_mand28;
- wire [1:0] booth_block26_mand29;
- wire [1:0] booth_block26_mand3;
- wire [1:0] booth_block26_mand30;
- wire [1:0] booth_block26_mand31;
- wire [1:0] booth_block26_mand32;
- wire [1:0] booth_block26_mand4;
- wire [1:0] booth_block26_mand5;
- wire [1:0] booth_block26_mand6;
- wire [1:0] booth_block26_mand7;
- wire [1:0] booth_block26_mand8;
- wire [1:0] booth_block26_mand9;
- wire [1:0] booth_block26_sel;
- wire booth_block26_sign;
- wire [2:0] booth_block28;
- wire [1:0] booth_block28_mand0;
- wire [1:0] booth_block28_mand1;
- wire [1:0] booth_block28_mand10;
- wire [1:0] booth_block28_mand11;
- wire [1:0] booth_block28_mand12;
- wire [1:0] booth_block28_mand13;
- wire [1:0] booth_block28_mand14;
- wire [1:0] booth_block28_mand15;
- wire [1:0] booth_block28_mand16;
- wire [1:0] booth_block28_mand17;
- wire [1:0] booth_block28_mand18;
- wire [1:0] booth_block28_mand19;
- wire [1:0] booth_block28_mand2;
- wire [1:0] booth_block28_mand20;
- wire [1:0] booth_block28_mand21;
- wire [1:0] booth_block28_mand22;
- wire [1:0] booth_block28_mand23;
- wire [1:0] booth_block28_mand24;
- wire [1:0] booth_block28_mand25;
- wire [1:0] booth_block28_mand26;
- wire [1:0] booth_block28_mand27;
- wire [1:0] booth_block28_mand28;
- wire [1:0] booth_block28_mand29;
- wire [1:0] booth_block28_mand3;
- wire [1:0] booth_block28_mand30;
- wire [1:0] booth_block28_mand31;
- wire [1:0] booth_block28_mand32;
- wire [1:0] booth_block28_mand4;
- wire [1:0] booth_block28_mand5;
- wire [1:0] booth_block28_mand6;
- wire [1:0] booth_block28_mand7;
- wire [1:0] booth_block28_mand8;
- wire [1:0] booth_block28_mand9;
- wire [1:0] booth_block28_sel;
- wire booth_block28_sign;
- wire [1:0] booth_block2_mand0;
- wire [1:0] booth_block2_mand1;
- wire [1:0] booth_block2_mand10;
- wire [1:0] booth_block2_mand11;
- wire [1:0] booth_block2_mand12;
- wire [1:0] booth_block2_mand13;
- wire [1:0] booth_block2_mand14;
- wire [1:0] booth_block2_mand15;
- wire [1:0] booth_block2_mand16;
- wire [1:0] booth_block2_mand17;
- wire [1:0] booth_block2_mand18;
- wire [1:0] booth_block2_mand19;
- wire [1:0] booth_block2_mand2;
- wire [1:0] booth_block2_mand20;
- wire [1:0] booth_block2_mand21;
- wire [1:0] booth_block2_mand22;
- wire [1:0] booth_block2_mand23;
- wire [1:0] booth_block2_mand24;
- wire [1:0] booth_block2_mand25;
- wire [1:0] booth_block2_mand26;
- wire [1:0] booth_block2_mand27;
- wire [1:0] booth_block2_mand28;
- wire [1:0] booth_block2_mand29;
- wire [1:0] booth_block2_mand3;
- wire [1:0] booth_block2_mand30;
- wire [1:0] booth_block2_mand31;
- wire [1:0] booth_block2_mand32;
- wire [1:0] booth_block2_mand4;
- wire [1:0] booth_block2_mand5;
- wire [1:0] booth_block2_mand6;
- wire [1:0] booth_block2_mand7;
- wire [1:0] booth_block2_mand8;
- wire [1:0] booth_block2_mand9;
- wire [1:0] booth_block2_sel;
- wire booth_block2_sign;
- wire [2:0] booth_block30;
- wire [1:0] booth_block30_mand0;
- wire [1:0] booth_block30_mand1;
- wire [1:0] booth_block30_mand10;
- wire [1:0] booth_block30_mand11;
- wire [1:0] booth_block30_mand12;
- wire [1:0] booth_block30_mand13;
- wire [1:0] booth_block30_mand14;
- wire [1:0] booth_block30_mand15;
- wire [1:0] booth_block30_mand16;
- wire [1:0] booth_block30_mand17;
- wire [1:0] booth_block30_mand18;
- wire [1:0] booth_block30_mand19;
- wire [1:0] booth_block30_mand2;
- wire [1:0] booth_block30_mand20;
- wire [1:0] booth_block30_mand21;
- wire [1:0] booth_block30_mand22;
- wire [1:0] booth_block30_mand23;
- wire [1:0] booth_block30_mand24;
- wire [1:0] booth_block30_mand25;
- wire [1:0] booth_block30_mand26;
- wire [1:0] booth_block30_mand27;
- wire [1:0] booth_block30_mand28;
- wire [1:0] booth_block30_mand29;
- wire [1:0] booth_block30_mand3;
- wire [1:0] booth_block30_mand30;
- wire [1:0] booth_block30_mand31;
- wire [1:0] booth_block30_mand32;
- wire [1:0] booth_block30_mand4;
- wire [1:0] booth_block30_mand5;
- wire [1:0] booth_block30_mand6;
- wire [1:0] booth_block30_mand7;
- wire [1:0] booth_block30_mand8;
- wire [1:0] booth_block30_mand9;
- wire [1:0] booth_block30_sel;
- wire booth_block30_sign;
- wire [2:0] booth_block32;
- wire [1:0] booth_block32_mand0;
- wire [1:0] booth_block32_mand1;
- wire [1:0] booth_block32_mand10;
- wire [1:0] booth_block32_mand11;
- wire [1:0] booth_block32_mand12;
- wire [1:0] booth_block32_mand13;
- wire [1:0] booth_block32_mand14;
- wire [1:0] booth_block32_mand15;
- wire [1:0] booth_block32_mand16;
- wire [1:0] booth_block32_mand17;
- wire [1:0] booth_block32_mand18;
- wire [1:0] booth_block32_mand19;
- wire [1:0] booth_block32_mand2;
- wire [1:0] booth_block32_mand20;
- wire [1:0] booth_block32_mand21;
- wire [1:0] booth_block32_mand22;
- wire [1:0] booth_block32_mand23;
- wire [1:0] booth_block32_mand24;
- wire [1:0] booth_block32_mand25;
- wire [1:0] booth_block32_mand26;
- wire [1:0] booth_block32_mand27;
- wire [1:0] booth_block32_mand28;
- wire [1:0] booth_block32_mand29;
- wire [1:0] booth_block32_mand3;
- wire [1:0] booth_block32_mand30;
- wire [1:0] booth_block32_mand31;
- wire [1:0] booth_block32_mand32;
- wire [1:0] booth_block32_mand4;
- wire [1:0] booth_block32_mand5;
- wire [1:0] booth_block32_mand6;
- wire [1:0] booth_block32_mand7;
- wire [1:0] booth_block32_mand8;
- wire [1:0] booth_block32_mand9;
- wire [1:0] booth_block32_sel;
- wire booth_block32_sign;
- wire [2:0] booth_block4;
- wire [1:0] booth_block4_mand0;
- wire [1:0] booth_block4_mand1;
- wire [1:0] booth_block4_mand10;
- wire [1:0] booth_block4_mand11;
- wire [1:0] booth_block4_mand12;
- wire [1:0] booth_block4_mand13;
- wire [1:0] booth_block4_mand14;
- wire [1:0] booth_block4_mand15;
- wire [1:0] booth_block4_mand16;
- wire [1:0] booth_block4_mand17;
- wire [1:0] booth_block4_mand18;
- wire [1:0] booth_block4_mand19;
- wire [1:0] booth_block4_mand2;
- wire [1:0] booth_block4_mand20;
- wire [1:0] booth_block4_mand21;
- wire [1:0] booth_block4_mand22;
- wire [1:0] booth_block4_mand23;
- wire [1:0] booth_block4_mand24;
- wire [1:0] booth_block4_mand25;
- wire [1:0] booth_block4_mand26;
- wire [1:0] booth_block4_mand27;
- wire [1:0] booth_block4_mand28;
- wire [1:0] booth_block4_mand29;
- wire [1:0] booth_block4_mand3;
- wire [1:0] booth_block4_mand30;
- wire [1:0] booth_block4_mand31;
- wire [1:0] booth_block4_mand32;
- wire [1:0] booth_block4_mand4;
- wire [1:0] booth_block4_mand5;
- wire [1:0] booth_block4_mand6;
- wire [1:0] booth_block4_mand7;
- wire [1:0] booth_block4_mand8;
- wire [1:0] booth_block4_mand9;
- wire [1:0] booth_block4_sel;
- wire booth_block4_sign;
- wire [2:0] booth_block6;
- wire [1:0] booth_block6_mand0;
- wire [1:0] booth_block6_mand1;
- wire [1:0] booth_block6_mand10;
- wire [1:0] booth_block6_mand11;
- wire [1:0] booth_block6_mand12;
- wire [1:0] booth_block6_mand13;
- wire [1:0] booth_block6_mand14;
- wire [1:0] booth_block6_mand15;
- wire [1:0] booth_block6_mand16;
- wire [1:0] booth_block6_mand17;
- wire [1:0] booth_block6_mand18;
- wire [1:0] booth_block6_mand19;
- wire [1:0] booth_block6_mand2;
- wire [1:0] booth_block6_mand20;
- wire [1:0] booth_block6_mand21;
- wire [1:0] booth_block6_mand22;
- wire [1:0] booth_block6_mand23;
- wire [1:0] booth_block6_mand24;
- wire [1:0] booth_block6_mand25;
- wire [1:0] booth_block6_mand26;
- wire [1:0] booth_block6_mand27;
- wire [1:0] booth_block6_mand28;
- wire [1:0] booth_block6_mand29;
- wire [1:0] booth_block6_mand3;
- wire [1:0] booth_block6_mand30;
- wire [1:0] booth_block6_mand31;
- wire [1:0] booth_block6_mand32;
- wire [1:0] booth_block6_mand4;
- wire [1:0] booth_block6_mand5;
- wire [1:0] booth_block6_mand6;
- wire [1:0] booth_block6_mand7;
- wire [1:0] booth_block6_mand8;
- wire [1:0] booth_block6_mand9;
- wire [1:0] booth_block6_sel;
- wire booth_block6_sign;
- wire [2:0] booth_block8;
- wire [1:0] booth_block8_mand0;
- wire [1:0] booth_block8_mand1;
- wire [1:0] booth_block8_mand10;
- wire [1:0] booth_block8_mand11;
- wire [1:0] booth_block8_mand12;
- wire [1:0] booth_block8_mand13;
- wire [1:0] booth_block8_mand14;
- wire [1:0] booth_block8_mand15;
- wire [1:0] booth_block8_mand16;
- wire [1:0] booth_block8_mand17;
- wire [1:0] booth_block8_mand18;
- wire [1:0] booth_block8_mand19;
- wire [1:0] booth_block8_mand2;
- wire [1:0] booth_block8_mand20;
- wire [1:0] booth_block8_mand21;
- wire [1:0] booth_block8_mand22;
- wire [1:0] booth_block8_mand23;
- wire [1:0] booth_block8_mand24;
- wire [1:0] booth_block8_mand25;
- wire [1:0] booth_block8_mand26;
- wire [1:0] booth_block8_mand27;
- wire [1:0] booth_block8_mand28;
- wire [1:0] booth_block8_mand29;
- wire [1:0] booth_block8_mand3;
- wire [1:0] booth_block8_mand30;
- wire [1:0] booth_block8_mand31;
- wire [1:0] booth_block8_mand32;
- wire [1:0] booth_block8_mand4;
- wire [1:0] booth_block8_mand5;
- wire [1:0] booth_block8_mand6;
- wire [1:0] booth_block8_mand7;
- wire [1:0] booth_block8_mand8;
- wire [1:0] booth_block8_mand9;
- wire [1:0] booth_block8_sel;
- wire booth_block8_sign;
- wire c;
- wire \c$1197 ;
- wire \c$1198 ;
- wire \c$1199 ;
- wire \c$1200 ;
- wire \c$1201 ;
- wire \c$1202 ;
- wire \c$1203 ;
- wire \c$1204 ;
- wire \c$1205 ;
- wire \c$1206 ;
- wire \c$1207 ;
- wire \c$1208 ;
- wire \c$1209 ;
- wire \c$1210 ;
- wire \c$1211 ;
- wire \c$1212 ;
- wire \c$1213 ;
- wire \c$1214 ;
- wire \c$1215 ;
- wire \c$1216 ;
- wire \c$1217 ;
- wire \c$1218 ;
- wire \c$1219 ;
- wire \c$1220 ;
- wire \c$1221 ;
- wire \c$1222 ;
- wire \c$1223 ;
- wire \c$1224 ;
- wire \c$1225 ;
- wire \c$1226 ;
- wire \c$1227 ;
- wire \c$1228 ;
- wire \c$1229 ;
- wire \c$1230 ;
- wire \c$1231 ;
- wire \c$1232 ;
- wire \c$1233 ;
- wire \c$1234 ;
- wire \c$1235 ;
- wire \c$1236 ;
- wire \c$1237 ;
- wire \c$1238 ;
- wire \c$1239 ;
- wire \c$1240 ;
- wire \c$1241 ;
- wire \c$1242 ;
- wire \c$1243 ;
- wire \c$1244 ;
- wire \c$1245 ;
- wire \c$1246 ;
- wire \c$1247 ;
- wire \c$1248 ;
- wire \c$1249 ;
- wire \c$1250 ;
- wire \c$1251 ;
- wire \c$1252 ;
- wire \c$1253 ;
- wire \c$1254 ;
- wire \c$1255 ;
- wire \c$1256 ;
- wire \c$1257 ;
- wire \c$2553 ;
- wire \c$2557 ;
- wire \c$2561 ;
- wire \c$2565 ;
- wire \c$2569 ;
- wire \c$2573 ;
- wire \c$2577 ;
- wire \c$2581 ;
- wire \c$2585 ;
- wire \c$2589 ;
- wire \c$2593 ;
- wire \c$2597 ;
- wire \c$2601 ;
- wire \c$2605 ;
- wire \c$2609 ;
- wire \c$2613 ;
- wire \c$2617 ;
- wire \c$2621 ;
- wire \c$2625 ;
- wire \c$2629 ;
- wire \c$2633 ;
- wire \c$2637 ;
- wire \c$2641 ;
- wire \c$2645 ;
- wire \c$2649 ;
- wire \c$2653 ;
- wire \c$2657 ;
- wire \c$2661 ;
- wire \c$2665 ;
- wire \c$2669 ;
- wire \c$2673 ;
- wire \c$2677 ;
- wire \c$2681 ;
- wire \c$2685 ;
- wire \c$2689 ;
- wire \c$2693 ;
- wire \c$2697 ;
- wire \c$2701 ;
- wire \c$2705 ;
- wire \c$2709 ;
- wire \c$2713 ;
- wire \c$2717 ;
- wire \c$2721 ;
- wire \c$2725 ;
- wire \c$2729 ;
- wire \c$2733 ;
- wire \c$2737 ;
- wire \c$2741 ;
- wire \c$2745 ;
- wire \c$2749 ;
- wire \c$2753 ;
- wire \c$2757 ;
- wire \c$2761 ;
- wire \c$2765 ;
- wire \c$2769 ;
- wire \c$2773 ;
- wire \c$2777 ;
- wire \c$2781 ;
- wire \c$2785 ;
- wire \c$2789 ;
- wire \c$2793 ;
- wire \c$2797 ;
- wire \c$2801 ;
- wire \c$2805 ;
- wire \c$2809 ;
- wire \c$2813 ;
- wire \c$2817 ;
- wire \c$2821 ;
- wire \c$2825 ;
- wire \c$2829 ;
- wire \c$2833 ;
- wire \c$2837 ;
- wire \c$2841 ;
- wire \c$2845 ;
- wire \c$2849 ;
- wire \c$2853 ;
- wire \c$2857 ;
- wire \c$2861 ;
- wire \c$2865 ;
- wire \c$2869 ;
- wire \c$2873 ;
- wire \c$2877 ;
- wire \c$2881 ;
- wire \c$2885 ;
- wire \c$2889 ;
- wire \c$2893 ;
- wire \c$2897 ;
- wire \c$2901 ;
- wire \c$2905 ;
- wire \c$2909 ;
- wire \c$2913 ;
- wire \c$2917 ;
- wire \c$2921 ;
- wire \c$2925 ;
- wire \c$2929 ;
- wire \c$2933 ;
- wire \c$2937 ;
- wire \c$2941 ;
- wire \c$2945 ;
- wire \c$2949 ;
- wire \c$2953 ;
- wire \c$2957 ;
- wire \c$2961 ;
- wire \c$2965 ;
- wire \c$2969 ;
- wire \c$2973 ;
- wire \c$2977 ;
- wire \c$2981 ;
- wire \c$2985 ;
- wire \c$2989 ;
- wire \c$2993 ;
- wire \c$2997 ;
- wire \c$3001 ;
- wire \c$3005 ;
- wire \c$3009 ;
- wire \c$3013 ;
- wire \c$3017 ;
- wire \c$3021 ;
- wire \c$3025 ;
- wire \c$3029 ;
- wire \c$3033 ;
- wire \c$3037 ;
- wire \c$3041 ;
- wire \c$3045 ;
- wire \c$3049 ;
- wire \c$3053 ;
- wire \c$3057 ;
- wire \c$3061 ;
- wire \c$3065 ;
- wire \c$3069 ;
- wire \c$3073 ;
- wire \c$3077 ;
- wire \c$3081 ;
- wire \c$3085 ;
- wire \c$3089 ;
- wire \c$3093 ;
- wire \c$3097 ;
- wire \c$3101 ;
- wire \c$3105 ;
- wire \c$3109 ;
- wire \c$3113 ;
- wire \c$3117 ;
- wire \c$3121 ;
- wire \c$3125 ;
- wire \c$3129 ;
- wire \c$3133 ;
- wire \c$3137 ;
- wire \c$3141 ;
- wire \c$3145 ;
- wire \c$3149 ;
- wire \c$3153 ;
- wire \c$3157 ;
- wire \c$3161 ;
- wire \c$3165 ;
- wire \c$3169 ;
- wire \c$3173 ;
- wire \c$3177 ;
- wire \c$3181 ;
- wire \c$3185 ;
- wire \c$3189 ;
- wire \c$3193 ;
- wire \c$3197 ;
- wire \c$3201 ;
- wire \c$3205 ;
- wire \c$3209 ;
- wire \c$3213 ;
- wire \c$3217 ;
- wire \c$3221 ;
- wire \c$3225 ;
- wire \c$3229 ;
- wire \c$3233 ;
- wire \c$3237 ;
- wire \c$3241 ;
- wire \c$3245 ;
- wire \c$3249 ;
- wire \c$3253 ;
- wire \c$3257 ;
- wire \c$3261 ;
- wire \c$3265 ;
- wire \c$3269 ;
- wire \c$3273 ;
- wire \c$3277 ;
- wire \c$3281 ;
- wire \c$3285 ;
- wire \c$3289 ;
- wire \c$3293 ;
- wire \c$3297 ;
- wire \c$3301 ;
- wire \c$3305 ;
- wire \c$3309 ;
- wire \c$3313 ;
- wire \c$3317 ;
- wire \c$3321 ;
- wire \c$3325 ;
- wire \c$3329 ;
- wire \c$3333 ;
- wire \c$3337 ;
- wire \c$3341 ;
- wire \c$3345 ;
- wire \c$3349 ;
- wire \c$3353 ;
- wire \c$3357 ;
- wire \c$3361 ;
- wire \c$3365 ;
- wire \c$3369 ;
- wire \c$3373 ;
- wire \c$3377 ;
- wire \c$3381 ;
- wire \c$3385 ;
- wire \c$3389 ;
- wire \c$3393 ;
- wire \c$3397 ;
- wire \c$3401 ;
- wire \c$3405 ;
- wire \c$3409 ;
- wire \c$3413 ;
- wire \c$3417 ;
- wire \c$3421 ;
- wire \c$3425 ;
- wire \c$3429 ;
- wire \c$3433 ;
- wire \c$3437 ;
- wire \c$3441 ;
- wire \c$3445 ;
- wire \c$3449 ;
- wire \c$3453 ;
- wire \c$3457 ;
- wire \c$3461 ;
- wire \c$3465 ;
- wire \c$3469 ;
- wire \c$3473 ;
- wire \c$3477 ;
- wire \c$3481 ;
- wire \c$3485 ;
- wire \c$3489 ;
- wire \c$3493 ;
- wire \c$3497 ;
- wire \c$3501 ;
- wire \c$3505 ;
- wire \c$3509 ;
- wire \c$3513 ;
- wire \c$3517 ;
- wire \c$3521 ;
- wire \c$3525 ;
- wire \c$3529 ;
- wire \c$3533 ;
- wire \c$3537 ;
- wire \c$3541 ;
- wire \c$3545 ;
- wire \c$3549 ;
- wire \c$3553 ;
- wire \c$3557 ;
- wire \c$3561 ;
- wire \c$3565 ;
- wire \c$3569 ;
- wire \c$3573 ;
- wire \c$3577 ;
- wire \c$3581 ;
- wire \c$3585 ;
- wire \c$3589 ;
- wire \c$3593 ;
- wire \c$3597 ;
- wire \c$3601 ;
- wire \c$3605 ;
- wire \c$3609 ;
- wire \c$3613 ;
- wire \c$3617 ;
- wire \c$3621 ;
- wire \c$3625 ;
- wire \c$3629 ;
- wire \c$3633 ;
- wire \c$3637 ;
- wire \c$3641 ;
- wire \c$3645 ;
- wire \c$3649 ;
- wire \c$3653 ;
- wire \c$3657 ;
- wire \c$3661 ;
- wire \c$3665 ;
- wire \c$3669 ;
- wire \c$3673 ;
- wire \c$3677 ;
- wire \c$3681 ;
- wire \c$3685 ;
- wire \c$3689 ;
- wire \c$3693 ;
- wire \c$3697 ;
- wire \c$3701 ;
- wire \c$3705 ;
- wire \c$3709 ;
- wire \c$3713 ;
- wire \c$3717 ;
- wire \c$3721 ;
- wire \c$3725 ;
- wire \c$3729 ;
- wire \c$3733 ;
- wire \c$3737 ;
- wire \c$3741 ;
- wire \c$3745 ;
- wire \c$3749 ;
- wire \c$3753 ;
- wire \c$3757 ;
- wire \c$3761 ;
- wire \c$3765 ;
- wire \c$3769 ;
- wire \c$3773 ;
- wire \c$3777 ;
- wire \c$3781 ;
- wire \c$3785 ;
- wire \c$3789 ;
- wire \c$3793 ;
- wire \c$3797 ;
- wire \c$3801 ;
- wire \c$3805 ;
- wire \c$3809 ;
- wire \c$3813 ;
- wire \c$3817 ;
- wire \c$3821 ;
- wire \c$3825 ;
- wire \c$3829 ;
- wire \c$3833 ;
- wire \c$3837 ;
- wire \c$3841 ;
- wire \c$3845 ;
- wire \c$3849 ;
- wire \c$3853 ;
- wire \c$3857 ;
- wire \c$3861 ;
- wire \c$3865 ;
- wire \c$3869 ;
- wire \c$3873 ;
- wire \c$3877 ;
- wire \c$3881 ;
- wire \c$3885 ;
- wire \c$3889 ;
- wire \c$3893 ;
- wire \c$3897 ;
- wire \c$3901 ;
- wire \c$3905 ;
- wire \c$3909 ;
- wire \c$3913 ;
- wire \c$3917 ;
- wire \c$3921 ;
- wire \c$3925 ;
- wire \c$3929 ;
- wire \c$3933 ;
- wire \c$3937 ;
- wire \c$3941 ;
- wire \c$3945 ;
- wire \c$3949 ;
- wire \c$3953 ;
- wire \c$3957 ;
- wire \c$3961 ;
- wire \c$3965 ;
- wire \c$3969 ;
- wire \c$3973 ;
- wire \c$3977 ;
- wire \c$3981 ;
- wire \c$3985 ;
- wire \c$3989 ;
- wire \c$3993 ;
- wire \c$3997 ;
- wire \c$4001 ;
- wire \c$4005 ;
- wire \c$4009 ;
- wire \c$4013 ;
- wire \c$4017 ;
- wire \c$4021 ;
- wire \c$4025 ;
- wire \c$4029 ;
- wire \c$4033 ;
- wire \c$4037 ;
- wire \c$4041 ;
- wire \c$4045 ;
- wire \c$4049 ;
- wire \c$4053 ;
- wire \c$4057 ;
- wire \c$4061 ;
- wire \c$4065 ;
- wire \c$4069 ;
- wire \c$4073 ;
- wire \c$4077 ;
- wire \c$4081 ;
- wire \c$4085 ;
- wire \c$4089 ;
- wire \c$4093 ;
- wire \c$4097 ;
- wire \c$4101 ;
- wire \c$4105 ;
- wire \c$4109 ;
- wire \c$4113 ;
- wire \c$4117 ;
- wire \c$4121 ;
- wire \c$4125 ;
- wire \c$4129 ;
- wire \c$4133 ;
- wire \c$4137 ;
- wire \c$4141 ;
- wire \c$4145 ;
- wire \c$4149 ;
- wire \c$4153 ;
- wire \c$4157 ;
- wire \c$4161 ;
- wire \c$4165 ;
- wire \c$4169 ;
- wire \c$4173 ;
- wire \c$4177 ;
- wire \c$4181 ;
- wire \c$4185 ;
- wire \c$4189 ;
- wire \c$4193 ;
- wire \c$4197 ;
- wire \c$4201 ;
- wire \c$4205 ;
- wire \c$4209 ;
- wire \c$4213 ;
- wire \c$4217 ;
- wire \c$4221 ;
- wire \c$4225 ;
- wire \c$4229 ;
- wire \c$4233 ;
- wire \c$4237 ;
- wire \c$4241 ;
- wire \c$4245 ;
- wire \c$4249 ;
- wire \c$4253 ;
- wire \c$4257 ;
- wire \c$4261 ;
- wire \c$4265 ;
- wire \c$4269 ;
- wire \c$4273 ;
- wire \c$4277 ;
- wire \c$4281 ;
- wire \c$4285 ;
- wire \c$4289 ;
- wire \c$4293 ;
- wire \c$4297 ;
- wire \c$4301 ;
- wire \c$4305 ;
- wire \c$4309 ;
- wire \c$4313 ;
- wire \c$4317 ;
- wire \c$4321 ;
- wire \c$4325 ;
- wire \c$4329 ;
- wire \c$4333 ;
- wire \c$4337 ;
- wire \c$4341 ;
- wire \c$4345 ;
- wire \c$4349 ;
- wire \c$4353 ;
- wire \c$4357 ;
- wire \c$4361 ;
- wire \c$4365 ;
- wire \c$4369 ;
- wire \c$4373 ;
- wire \c$4377 ;
- wire \c$4381 ;
- wire \c$4385 ;
- wire \c$4389 ;
- wire \c$4393 ;
- wire \c$4397 ;
- input clk;
- wire clk;
- wire con;
- wire \con$2556 ;
- wire \con$2560 ;
- wire \con$2564 ;
- wire \con$2568 ;
- wire \con$2572 ;
- wire \con$2576 ;
- wire \con$2580 ;
- wire \con$2584 ;
- wire \con$2588 ;
- wire \con$2592 ;
- wire \con$2596 ;
- wire \con$2600 ;
- wire \con$2604 ;
- wire \con$2608 ;
- wire \con$2612 ;
- wire \con$2616 ;
- wire \con$2620 ;
- wire \con$2624 ;
- wire \con$2628 ;
- wire \con$2632 ;
- wire \con$2636 ;
- wire \con$2640 ;
- wire \con$2644 ;
- wire \con$2648 ;
- wire \con$2652 ;
- wire \con$2656 ;
- wire \con$2660 ;
- wire \con$2664 ;
- wire \con$2668 ;
- wire \con$2672 ;
- wire \con$2676 ;
- wire \con$2680 ;
- wire \con$2684 ;
- wire \con$2688 ;
- wire \con$2692 ;
- wire \con$2696 ;
- wire \con$2700 ;
- wire \con$2704 ;
- wire \con$2708 ;
- wire \con$2712 ;
- wire \con$2716 ;
- wire \con$2720 ;
- wire \con$2724 ;
- wire \con$2728 ;
- wire \con$2732 ;
- wire \con$2736 ;
- wire \con$2740 ;
- wire \con$2744 ;
- wire \con$2748 ;
- wire \con$2752 ;
- wire \con$2756 ;
- wire \con$2760 ;
- wire \con$2764 ;
- wire \con$2768 ;
- wire \con$2772 ;
- wire \con$2776 ;
- wire \con$2780 ;
- wire \con$2784 ;
- wire \con$2788 ;
- wire \con$2792 ;
- wire \con$2796 ;
- wire \con$2800 ;
- wire \con$2804 ;
- wire \con$2808 ;
- wire \con$2812 ;
- wire \con$2816 ;
- wire \con$2820 ;
- wire \con$2824 ;
- wire \con$2828 ;
- wire \con$2832 ;
- wire \con$2836 ;
- wire \con$2840 ;
- wire \con$2844 ;
- wire \con$2848 ;
- wire \con$2852 ;
- wire \con$2856 ;
- wire \con$2860 ;
- wire \con$2864 ;
- wire \con$2868 ;
- wire \con$2872 ;
- wire \con$2876 ;
- wire \con$2880 ;
- wire \con$2884 ;
- wire \con$2888 ;
- wire \con$2892 ;
- wire \con$2896 ;
- wire \con$2900 ;
- wire \con$2904 ;
- wire \con$2908 ;
- wire \con$2912 ;
- wire \con$2916 ;
- wire \con$2920 ;
- wire \con$2924 ;
- wire \con$2928 ;
- wire \con$2932 ;
- wire \con$2936 ;
- wire \con$2940 ;
- wire \con$2944 ;
- wire \con$2948 ;
- wire \con$2952 ;
- wire \con$2956 ;
- wire \con$2960 ;
- wire \con$2964 ;
- wire \con$2968 ;
- wire \con$2972 ;
- wire \con$2976 ;
- wire \con$2980 ;
- wire \con$2984 ;
- wire \con$2988 ;
- wire \con$2992 ;
- wire \con$2996 ;
- wire \con$3000 ;
- wire \con$3004 ;
- wire \con$3008 ;
- wire \con$3012 ;
- wire \con$3016 ;
- wire \con$3020 ;
- wire \con$3024 ;
- wire \con$3028 ;
- wire \con$3032 ;
- wire \con$3036 ;
- wire \con$3040 ;
- wire \con$3044 ;
- wire \con$3048 ;
- wire \con$3052 ;
- wire \con$3056 ;
- wire \con$3060 ;
- wire \con$3064 ;
- wire \con$3068 ;
- wire \con$3072 ;
- wire \con$3076 ;
- wire \con$3080 ;
- wire \con$3084 ;
- wire \con$3088 ;
- wire \con$3092 ;
- wire \con$3096 ;
- wire \con$3100 ;
- wire \con$3104 ;
- wire \con$3108 ;
- wire \con$3112 ;
- wire \con$3116 ;
- wire \con$3120 ;
- wire \con$3124 ;
- wire \con$3128 ;
- wire \con$3132 ;
- wire \con$3136 ;
- wire \con$3140 ;
- wire \con$3144 ;
- wire \con$3148 ;
- wire \con$3152 ;
- wire \con$3156 ;
- wire \con$3160 ;
- wire \con$3164 ;
- wire \con$3168 ;
- wire \con$3172 ;
- wire \con$3176 ;
- wire \con$3180 ;
- wire \con$3184 ;
- wire \con$3188 ;
- wire \con$3192 ;
- wire \con$3196 ;
- wire \con$3200 ;
- wire \con$3204 ;
- wire \con$3208 ;
- wire \con$3212 ;
- wire \con$3216 ;
- wire \con$3220 ;
- wire \con$3224 ;
- wire \con$3228 ;
- wire \con$3232 ;
- wire \con$3236 ;
- wire \con$3240 ;
- wire \con$3244 ;
- wire \con$3248 ;
- wire \con$3252 ;
- wire \con$3256 ;
- wire \con$3260 ;
- wire \con$3264 ;
- wire \con$3268 ;
- wire \con$3272 ;
- wire \con$3276 ;
- wire \con$3280 ;
- wire \con$3284 ;
- wire \con$3288 ;
- wire \con$3292 ;
- wire \con$3296 ;
- wire \con$3300 ;
- wire \con$3304 ;
- wire \con$3308 ;
- wire \con$3312 ;
- wire \con$3316 ;
- wire \con$3320 ;
- wire \con$3324 ;
- wire \con$3328 ;
- wire \con$3332 ;
- wire \con$3336 ;
- wire \con$3340 ;
- wire \con$3344 ;
- wire \con$3348 ;
- wire \con$3352 ;
- wire \con$3356 ;
- wire \con$3360 ;
- wire \con$3364 ;
- wire \con$3368 ;
- wire \con$3372 ;
- wire \con$3376 ;
- wire \con$3380 ;
- wire \con$3384 ;
- wire \con$3388 ;
- wire \con$3392 ;
- wire \con$3396 ;
- wire \con$3400 ;
- wire \con$3404 ;
- wire \con$3408 ;
- wire \con$3412 ;
- wire \con$3416 ;
- wire \con$3420 ;
- wire \con$3424 ;
- wire \con$3428 ;
- wire \con$3432 ;
- wire \con$3436 ;
- wire \con$3440 ;
- wire \con$3444 ;
- wire \con$3448 ;
- wire \con$3452 ;
- wire \con$3456 ;
- wire \con$3460 ;
- wire \con$3464 ;
- wire \con$3468 ;
- wire \con$3472 ;
- wire \con$3476 ;
- wire \con$3480 ;
- wire \con$3484 ;
- wire \con$3488 ;
- wire \con$3492 ;
- wire \con$3496 ;
- wire \con$3500 ;
- wire \con$3504 ;
- wire \con$3508 ;
- wire \con$3512 ;
- wire \con$3516 ;
- wire \con$3520 ;
- wire \con$3524 ;
- wire \con$3528 ;
- wire \con$3532 ;
- wire \con$3536 ;
- wire \con$3540 ;
- wire \con$3544 ;
- wire \con$3548 ;
- wire \con$3552 ;
- wire \con$3556 ;
- wire \con$3560 ;
- wire \con$3564 ;
- wire \con$3568 ;
- wire \con$3572 ;
- wire \con$3576 ;
- wire \con$3580 ;
- wire \con$3584 ;
- wire \con$3588 ;
- wire \con$3592 ;
- wire \con$3596 ;
- wire \con$3600 ;
- wire \con$3604 ;
- wire \con$3608 ;
- wire \con$3612 ;
- wire \con$3616 ;
- wire \con$3620 ;
- wire \con$3624 ;
- wire \con$3628 ;
- wire \con$3632 ;
- wire \con$3636 ;
- wire \con$3640 ;
- wire \con$3644 ;
- wire \con$3648 ;
- wire \con$3652 ;
- wire \con$3656 ;
- wire \con$3660 ;
- wire \con$3664 ;
- wire \con$3668 ;
- wire \con$3672 ;
- wire \con$3676 ;
- wire \con$3680 ;
- wire \con$3684 ;
- wire \con$3688 ;
- wire \con$3692 ;
- wire \con$3696 ;
- wire \con$3700 ;
- wire \con$3704 ;
- wire \con$3708 ;
- wire \con$3712 ;
- wire \con$3716 ;
- wire \con$3720 ;
- wire \con$3724 ;
- wire \con$3728 ;
- wire \con$3732 ;
- wire \con$3736 ;
- wire \con$3740 ;
- wire \con$3744 ;
- wire \con$3748 ;
- wire \con$3752 ;
- wire \con$3756 ;
- wire \con$3760 ;
- wire \con$3764 ;
- wire \con$3768 ;
- wire \con$3772 ;
- wire \con$3776 ;
- wire \con$3780 ;
- wire \con$3784 ;
- wire \con$3788 ;
- wire \con$3792 ;
- wire \con$3796 ;
- wire \con$3800 ;
- wire \con$3804 ;
- wire \con$3808 ;
- wire \con$3812 ;
- wire \con$3816 ;
- wire \con$3820 ;
- wire \con$3824 ;
- wire \con$3828 ;
- wire \con$3832 ;
- wire \con$3836 ;
- wire \con$3840 ;
- wire \con$3844 ;
- wire \con$3848 ;
- wire \con$3852 ;
- wire \con$3856 ;
- wire \con$3860 ;
- wire \con$3864 ;
- wire \con$3868 ;
- wire \con$3872 ;
- wire \con$3876 ;
- wire \con$3880 ;
- wire \con$3884 ;
- wire \con$3888 ;
- wire \con$3892 ;
- wire \con$3896 ;
- wire \con$3900 ;
- wire \con$3904 ;
- wire \con$3908 ;
- wire \con$3912 ;
- wire \con$3916 ;
- wire \con$3920 ;
- wire \con$3924 ;
- wire \con$3928 ;
- wire \con$3932 ;
- wire \con$3936 ;
- wire \con$3940 ;
- wire \con$3944 ;
- wire \con$3948 ;
- wire \con$3952 ;
- wire \con$3956 ;
- wire \con$3960 ;
- wire \con$3964 ;
- wire \con$3968 ;
- wire \con$3972 ;
- wire \con$3976 ;
- wire \con$3980 ;
- wire \con$3984 ;
- wire \con$3988 ;
- wire \con$3992 ;
- wire \con$3996 ;
- wire \con$4000 ;
- wire \con$4004 ;
- wire \con$4008 ;
- wire \con$4012 ;
- wire \con$4016 ;
- wire \con$4020 ;
- wire \con$4024 ;
- wire \con$4028 ;
- wire \con$4032 ;
- wire \con$4036 ;
- wire \con$4040 ;
- wire \con$4044 ;
- wire \con$4048 ;
- wire \con$4052 ;
- wire \con$4056 ;
- wire \con$4060 ;
- wire \con$4064 ;
- wire \con$4068 ;
- wire \con$4072 ;
- wire \con$4076 ;
- wire \con$4080 ;
- wire \con$4084 ;
- wire \con$4088 ;
- wire \con$4092 ;
- wire \con$4096 ;
- wire \con$4100 ;
- wire \con$4104 ;
- wire \con$4108 ;
- wire \con$4112 ;
- wire \con$4116 ;
- wire \con$4120 ;
- wire \con$4124 ;
- wire \con$4128 ;
- wire \con$4132 ;
- wire \con$4136 ;
- wire \con$4140 ;
- wire \con$4144 ;
- wire \con$4148 ;
- wire \con$4152 ;
- wire \con$4156 ;
- wire \con$4160 ;
- wire \con$4164 ;
- wire \con$4168 ;
- wire \con$4172 ;
- wire \con$4176 ;
- wire \con$4180 ;
- wire \con$4184 ;
- wire \con$4188 ;
- wire \con$4192 ;
- wire \con$4196 ;
- wire \con$4200 ;
- wire \con$4204 ;
- wire \con$4208 ;
- wire \con$4212 ;
- wire \con$4216 ;
- wire \con$4220 ;
- wire \con$4224 ;
- wire \con$4228 ;
- wire \con$4232 ;
- wire \con$4236 ;
- wire \con$4240 ;
- wire \con$4244 ;
- wire \con$4248 ;
- wire \con$4252 ;
- wire \con$4256 ;
- wire \con$4260 ;
- wire \con$4264 ;
- wire \con$4268 ;
- wire \con$4272 ;
- wire \con$4276 ;
- wire \con$4280 ;
- wire \con$4284 ;
- wire \con$4288 ;
- wire \con$4292 ;
- wire \con$4296 ;
- wire \con$4300 ;
- wire \con$4304 ;
- wire \con$4308 ;
- wire \con$4312 ;
- wire \con$4316 ;
- wire \con$4320 ;
- wire \con$4324 ;
- wire \con$4328 ;
- wire \con$4332 ;
- wire \con$4336 ;
- wire \con$4340 ;
- wire \con$4344 ;
- wire \con$4348 ;
- wire \con$4352 ;
- wire \con$4356 ;
- wire \con$4360 ;
- wire \con$4364 ;
- wire \con$4368 ;
- wire \con$4372 ;
- wire \con$4376 ;
- wire \con$4380 ;
- wire \con$4384 ;
- wire \con$4388 ;
- wire \con$4392 ;
- wire \con$4396 ;
- wire \con$4400 ;
- wire \con$4402 ;
- wire \con$4404 ;
- wire \con$4406 ;
- wire \con$4408 ;
- wire \con$4410 ;
- wire \con$4412 ;
- wire \con$4414 ;
- wire \con$4416 ;
- wire \con$4418 ;
- wire \con$4420 ;
- wire \con$4422 ;
- wire \con$4424 ;
- wire \con$4426 ;
- wire \con$4428 ;
- wire \con$4430 ;
- wire \con$4432 ;
- wire \con$4434 ;
- wire \con$4436 ;
- wire \con$4438 ;
- wire \con$4440 ;
- wire \con$4442 ;
- wire \con$4444 ;
- wire \con$4446 ;
- wire \con$4448 ;
- wire \con$4450 ;
- wire \con$4452 ;
- wire \con$4454 ;
- wire \con$4456 ;
- wire \con$4458 ;
- wire \con$4460 ;
- wire \con$4462 ;
- wire \con$4464 ;
- wire \con$4466 ;
- wire \con$4468 ;
- wire \con$4470 ;
- wire \con$4472 ;
- wire \con$4474 ;
- wire \con$4476 ;
- wire \con$4478 ;
- wire \con$4480 ;
- wire \con$4482 ;
- wire \con$4484 ;
- wire \con$4486 ;
- wire \con$4488 ;
- wire \con$4490 ;
- wire \con$4492 ;
- wire \con$4494 ;
- wire \con$4496 ;
- wire \con$4498 ;
- wire \con$4500 ;
- wire \con$4502 ;
- wire \con$4504 ;
- wire \con$4506 ;
- wire \con$4508 ;
- wire \con$4510 ;
- wire \con$4512 ;
- wire \con$4514 ;
- wire \con$4516 ;
- wire \con$4518 ;
- wire \con$4520 ;
- wire \con$4522 ;
- wire \con$4524 ;
- reg [63:0] final_a_registered = 64'h0000000000000000;
- reg [63:0] final_b_registered = 64'h0000000000000000;
- wire [33:0] multiplicand;
- wire [34:0] multiplier;
- wire [2:0] notblock;
- wire [2:0] \notblock$2008 ;
- wire [2:0] \notblock$2042 ;
- wire [2:0] \notblock$2076 ;
- wire [2:0] \notblock$2110 ;
- wire [2:0] \notblock$2144 ;
- wire [2:0] \notblock$2178 ;
- wire [2:0] \notblock$2212 ;
- wire [2:0] \notblock$2246 ;
- wire [2:0] \notblock$2280 ;
- wire [2:0] \notblock$2314 ;
- wire [2:0] \notblock$2348 ;
- wire [2:0] \notblock$2382 ;
- wire [2:0] \notblock$2416 ;
- wire [2:0] \notblock$2450 ;
- wire [2:0] \notblock$2484 ;
- wire [2:0] \notblock$2518 ;
- wire notsign;
- wire \notsign$1036 ;
- wire \notsign$1070 ;
- wire \notsign$1100 ;
- wire \notsign$1126 ;
- wire \notsign$1148 ;
- wire \notsign$1166 ;
- wire \notsign$1180 ;
- wire \notsign$1190 ;
- wire \notsign$686 ;
- wire \notsign$748 ;
- wire \notsign$806 ;
- wire \notsign$860 ;
- wire \notsign$910 ;
- wire \notsign$956 ;
- wire \notsign$998 ;
- output [63:0] o;
- reg [63:0] o = 64'h0000000000000000;
- wire [63:0] \o$1973 ;
- reg pp_row0_0 = 1'h0;
- reg pp_row0_1 = 1'h0;
- reg pp_row10_0 = 1'h0;
- reg pp_row10_1 = 1'h0;
- reg pp_row10_2 = 1'h0;
- reg pp_row10_3 = 1'h0;
- reg pp_row10_4 = 1'h0;
- reg pp_row10_5 = 1'h0;
- reg pp_row10_6 = 1'h0;
- reg pp_row11_0 = 1'h0;
- reg pp_row11_1 = 1'h0;
- reg pp_row11_2 = 1'h0;
- reg pp_row11_3 = 1'h0;
- reg pp_row11_4 = 1'h0;
- reg pp_row11_5 = 1'h0;
- reg pp_row12_0 = 1'h0;
- reg pp_row12_1 = 1'h0;
- reg pp_row12_2 = 1'h0;
- reg pp_row12_3 = 1'h0;
- reg pp_row12_4 = 1'h0;
- reg pp_row12_5 = 1'h0;
- reg pp_row12_6 = 1'h0;
- reg pp_row12_7 = 1'h0;
- reg pp_row13_0 = 1'h0;
- reg pp_row13_1 = 1'h0;
- reg pp_row13_2 = 1'h0;
- reg pp_row13_3 = 1'h0;
- reg pp_row13_4 = 1'h0;
- reg pp_row13_5 = 1'h0;
- reg pp_row13_6 = 1'h0;
- reg pp_row14_0 = 1'h0;
- reg pp_row14_1 = 1'h0;
- reg pp_row14_2 = 1'h0;
- reg pp_row14_3 = 1'h0;
- reg pp_row14_4 = 1'h0;
- reg pp_row14_5 = 1'h0;
- reg pp_row14_6 = 1'h0;
- reg pp_row14_7 = 1'h0;
- reg pp_row14_8 = 1'h0;
- reg pp_row15_0 = 1'h0;
- reg pp_row15_1 = 1'h0;
- reg pp_row15_2 = 1'h0;
- reg pp_row15_3 = 1'h0;
- reg pp_row15_4 = 1'h0;
- reg pp_row15_5 = 1'h0;
- reg pp_row15_6 = 1'h0;
- reg pp_row15_7 = 1'h0;
- reg pp_row16_0 = 1'h0;
- reg pp_row16_1 = 1'h0;
- reg pp_row16_2 = 1'h0;
- reg pp_row16_3 = 1'h0;
- reg pp_row16_4 = 1'h0;
- reg pp_row16_5 = 1'h0;
- reg pp_row16_6 = 1'h0;
- reg pp_row16_7 = 1'h0;
- reg pp_row16_8 = 1'h0;
- reg pp_row16_9 = 1'h0;
- reg pp_row17_0 = 1'h0;
- reg pp_row17_1 = 1'h0;
- reg pp_row17_2 = 1'h0;
- reg pp_row17_3 = 1'h0;
- reg pp_row17_4 = 1'h0;
- reg pp_row17_5 = 1'h0;
- reg pp_row17_6 = 1'h0;
- reg pp_row17_7 = 1'h0;
- reg pp_row17_8 = 1'h0;
- reg pp_row18_0 = 1'h0;
- reg pp_row18_1 = 1'h0;
- reg pp_row18_10 = 1'h0;
- reg pp_row18_2 = 1'h0;
- reg pp_row18_3 = 1'h0;
- reg pp_row18_4 = 1'h0;
- reg pp_row18_5 = 1'h0;
- reg pp_row18_6 = 1'h0;
- reg pp_row18_7 = 1'h0;
- reg pp_row18_8 = 1'h0;
- reg pp_row18_9 = 1'h0;
- reg pp_row19_0 = 1'h0;
- reg pp_row19_1 = 1'h0;
- reg pp_row19_2 = 1'h0;
- reg pp_row19_3 = 1'h0;
- reg pp_row19_4 = 1'h0;
- reg pp_row19_5 = 1'h0;
- reg pp_row19_6 = 1'h0;
- reg pp_row19_7 = 1'h0;
- reg pp_row19_8 = 1'h0;
- reg pp_row19_9 = 1'h0;
- reg pp_row1_0 = 1'h0;
- reg pp_row20_0 = 1'h0;
- reg pp_row20_1 = 1'h0;
- reg pp_row20_10 = 1'h0;
- reg pp_row20_11 = 1'h0;
- reg pp_row20_2 = 1'h0;
- reg pp_row20_3 = 1'h0;
- reg pp_row20_4 = 1'h0;
- reg pp_row20_5 = 1'h0;
- reg pp_row20_6 = 1'h0;
- reg pp_row20_7 = 1'h0;
- reg pp_row20_8 = 1'h0;
- reg pp_row20_9 = 1'h0;
- reg pp_row21_0 = 1'h0;
- reg pp_row21_1 = 1'h0;
- reg pp_row21_10 = 1'h0;
- reg pp_row21_2 = 1'h0;
- reg pp_row21_3 = 1'h0;
- reg pp_row21_4 = 1'h0;
- reg pp_row21_5 = 1'h0;
- reg pp_row21_6 = 1'h0;
- reg pp_row21_7 = 1'h0;
- reg pp_row21_8 = 1'h0;
- reg pp_row21_9 = 1'h0;
- reg pp_row22_0 = 1'h0;
- reg pp_row22_1 = 1'h0;
- reg pp_row22_10 = 1'h0;
- reg pp_row22_11 = 1'h0;
- reg pp_row22_12 = 1'h0;
- reg pp_row22_2 = 1'h0;
- reg pp_row22_3 = 1'h0;
- reg pp_row22_4 = 1'h0;
- reg pp_row22_5 = 1'h0;
- reg pp_row22_6 = 1'h0;
- reg pp_row22_7 = 1'h0;
- reg pp_row22_8 = 1'h0;
- reg pp_row22_9 = 1'h0;
- reg pp_row23_0 = 1'h0;
- reg pp_row23_1 = 1'h0;
- reg pp_row23_10 = 1'h0;
- reg pp_row23_11 = 1'h0;
- reg pp_row23_2 = 1'h0;
- reg pp_row23_3 = 1'h0;
- reg pp_row23_4 = 1'h0;
- reg pp_row23_5 = 1'h0;
- reg pp_row23_6 = 1'h0;
- reg pp_row23_7 = 1'h0;
- reg pp_row23_8 = 1'h0;
- reg pp_row23_9 = 1'h0;
- reg pp_row24_0 = 1'h0;
- reg pp_row24_1 = 1'h0;
- reg pp_row24_10 = 1'h0;
- reg pp_row24_11 = 1'h0;
- reg pp_row24_12 = 1'h0;
- reg pp_row24_13 = 1'h0;
- reg pp_row24_2 = 1'h0;
- reg pp_row24_3 = 1'h0;
- reg pp_row24_4 = 1'h0;
- reg pp_row24_5 = 1'h0;
- reg pp_row24_6 = 1'h0;
- reg pp_row24_7 = 1'h0;
- reg pp_row24_8 = 1'h0;
- reg pp_row24_9 = 1'h0;
- reg pp_row25_0 = 1'h0;
- reg pp_row25_1 = 1'h0;
- reg pp_row25_10 = 1'h0;
- reg pp_row25_11 = 1'h0;
- reg pp_row25_12 = 1'h0;
- reg pp_row25_2 = 1'h0;
- reg pp_row25_3 = 1'h0;
- reg pp_row25_4 = 1'h0;
- reg pp_row25_5 = 1'h0;
- reg pp_row25_6 = 1'h0;
- reg pp_row25_7 = 1'h0;
- reg pp_row25_8 = 1'h0;
- reg pp_row25_9 = 1'h0;
- reg pp_row26_0 = 1'h0;
- reg pp_row26_1 = 1'h0;
- reg pp_row26_10 = 1'h0;
- reg pp_row26_11 = 1'h0;
- reg pp_row26_12 = 1'h0;
- reg pp_row26_13 = 1'h0;
- reg pp_row26_14 = 1'h0;
- reg pp_row26_2 = 1'h0;
- reg pp_row26_3 = 1'h0;
- reg pp_row26_4 = 1'h0;
- reg pp_row26_5 = 1'h0;
- reg pp_row26_6 = 1'h0;
- reg pp_row26_7 = 1'h0;
- reg pp_row26_8 = 1'h0;
- reg pp_row26_9 = 1'h0;
- reg pp_row27_0 = 1'h0;
- reg pp_row27_1 = 1'h0;
- reg pp_row27_10 = 1'h0;
- reg pp_row27_11 = 1'h0;
- reg pp_row27_12 = 1'h0;
- reg pp_row27_13 = 1'h0;
- reg pp_row27_2 = 1'h0;
- reg pp_row27_3 = 1'h0;
- reg pp_row27_4 = 1'h0;
- reg pp_row27_5 = 1'h0;
- reg pp_row27_6 = 1'h0;
- reg pp_row27_7 = 1'h0;
- reg pp_row27_8 = 1'h0;
- reg pp_row27_9 = 1'h0;
- reg pp_row28_0 = 1'h0;
- reg pp_row28_1 = 1'h0;
- reg pp_row28_10 = 1'h0;
- reg pp_row28_11 = 1'h0;
- reg pp_row28_12 = 1'h0;
- reg pp_row28_13 = 1'h0;
- reg pp_row28_14 = 1'h0;
- reg pp_row28_15 = 1'h0;
- reg pp_row28_2 = 1'h0;
- reg pp_row28_3 = 1'h0;
- reg pp_row28_4 = 1'h0;
- reg pp_row28_5 = 1'h0;
- reg pp_row28_6 = 1'h0;
- reg pp_row28_7 = 1'h0;
- reg pp_row28_8 = 1'h0;
- reg pp_row28_9 = 1'h0;
- reg pp_row29_0 = 1'h0;
- reg pp_row29_1 = 1'h0;
- reg pp_row29_10 = 1'h0;
- reg pp_row29_11 = 1'h0;
- reg pp_row29_12 = 1'h0;
- reg pp_row29_13 = 1'h0;
- reg pp_row29_14 = 1'h0;
- reg pp_row29_2 = 1'h0;
- reg pp_row29_3 = 1'h0;
- reg pp_row29_4 = 1'h0;
- reg pp_row29_5 = 1'h0;
- reg pp_row29_6 = 1'h0;
- reg pp_row29_7 = 1'h0;
- reg pp_row29_8 = 1'h0;
- reg pp_row29_9 = 1'h0;
- reg pp_row2_0 = 1'h0;
- reg pp_row2_1 = 1'h0;
- reg pp_row2_2 = 1'h0;
- reg pp_row30_0 = 1'h0;
- reg pp_row30_1 = 1'h0;
- reg pp_row30_10 = 1'h0;
- reg pp_row30_11 = 1'h0;
- reg pp_row30_12 = 1'h0;
- reg pp_row30_13 = 1'h0;
- reg pp_row30_14 = 1'h0;
- reg pp_row30_15 = 1'h0;
- reg pp_row30_16 = 1'h0;
- reg pp_row30_2 = 1'h0;
- reg pp_row30_3 = 1'h0;
- reg pp_row30_4 = 1'h0;
- reg pp_row30_5 = 1'h0;
- reg pp_row30_6 = 1'h0;
- reg pp_row30_7 = 1'h0;
- reg pp_row30_8 = 1'h0;
- reg pp_row30_9 = 1'h0;
- reg pp_row31_0 = 1'h0;
- reg pp_row31_1 = 1'h0;
- reg pp_row31_10 = 1'h0;
- reg pp_row31_11 = 1'h0;
- reg pp_row31_12 = 1'h0;
- reg pp_row31_13 = 1'h0;
- reg pp_row31_14 = 1'h0;
- reg pp_row31_15 = 1'h0;
- reg pp_row31_2 = 1'h0;
- reg pp_row31_3 = 1'h0;
- reg pp_row31_4 = 1'h0;
- reg pp_row31_5 = 1'h0;
- reg pp_row31_6 = 1'h0;
- reg pp_row31_7 = 1'h0;
- reg pp_row31_8 = 1'h0;
- reg pp_row31_9 = 1'h0;
- reg pp_row32_0 = 1'h0;
- reg pp_row32_1 = 1'h0;
- reg pp_row32_10 = 1'h0;
- reg pp_row32_11 = 1'h0;
- reg pp_row32_12 = 1'h0;
- reg pp_row32_13 = 1'h0;
- reg pp_row32_14 = 1'h0;
- reg pp_row32_15 = 1'h0;
- reg pp_row32_16 = 1'h0;
- reg pp_row32_2 = 1'h0;
- reg pp_row32_3 = 1'h0;
- reg pp_row32_4 = 1'h0;
- reg pp_row32_5 = 1'h0;
- reg pp_row32_6 = 1'h0;
- reg pp_row32_7 = 1'h0;
- reg pp_row32_8 = 1'h0;
- reg pp_row32_9 = 1'h0;
- reg pp_row33_0 = 1'h0;
- reg pp_row33_1 = 1'h0;
- reg pp_row33_10 = 1'h0;
- reg pp_row33_11 = 1'h0;
- reg pp_row33_12 = 1'h0;
- reg pp_row33_13 = 1'h0;
- reg pp_row33_14 = 1'h0;
- reg pp_row33_15 = 1'h0;
- reg pp_row33_16 = 1'h0;
- reg pp_row33_2 = 1'h0;
- reg pp_row33_3 = 1'h0;
- reg pp_row33_4 = 1'h0;
- reg pp_row33_5 = 1'h0;
- reg pp_row33_6 = 1'h0;
- reg pp_row33_7 = 1'h0;
- reg pp_row33_8 = 1'h0;
- reg pp_row33_9 = 1'h0;
- reg pp_row34_0 = 1'h0;
- reg pp_row34_1 = 1'h0;
- reg pp_row34_10 = 1'h0;
- reg pp_row34_11 = 1'h0;
- reg pp_row34_12 = 1'h0;
- reg pp_row34_13 = 1'h0;
- reg pp_row34_14 = 1'h0;
- reg pp_row34_15 = 1'h0;
- reg pp_row34_16 = 1'h0;
- reg pp_row34_2 = 1'h0;
- reg pp_row34_3 = 1'h0;
- reg pp_row34_4 = 1'h0;
- reg pp_row34_5 = 1'h0;
- reg pp_row34_6 = 1'h0;
- reg pp_row34_7 = 1'h0;
- reg pp_row34_8 = 1'h0;
- reg pp_row34_9 = 1'h0;
- reg pp_row35_0 = 1'h0;
- reg pp_row35_1 = 1'h0;
- reg pp_row35_10 = 1'h0;
- reg pp_row35_11 = 1'h0;
- reg pp_row35_12 = 1'h0;
- reg pp_row35_13 = 1'h0;
- reg pp_row35_14 = 1'h0;
- reg pp_row35_15 = 1'h0;
- reg pp_row35_16 = 1'h0;
- reg pp_row35_2 = 1'h0;
- reg pp_row35_3 = 1'h0;
- reg pp_row35_4 = 1'h0;
- reg pp_row35_5 = 1'h0;
- reg pp_row35_6 = 1'h0;
- reg pp_row35_7 = 1'h0;
- reg pp_row35_8 = 1'h0;
- reg pp_row35_9 = 1'h0;
- wire pp_row36_0;
- reg pp_row36_1 = 1'h0;
- reg pp_row36_10 = 1'h0;
- reg pp_row36_11 = 1'h0;
- reg pp_row36_12 = 1'h0;
- reg pp_row36_13 = 1'h0;
- reg pp_row36_14 = 1'h0;
- reg pp_row36_15 = 1'h0;
- reg pp_row36_2 = 1'h0;
- reg pp_row36_3 = 1'h0;
- reg pp_row36_4 = 1'h0;
- reg pp_row36_5 = 1'h0;
- reg pp_row36_6 = 1'h0;
- reg pp_row36_7 = 1'h0;
- reg pp_row36_8 = 1'h0;
- reg pp_row36_9 = 1'h0;
- reg pp_row37_0 = 1'h0;
- reg pp_row37_1 = 1'h0;
- reg pp_row37_10 = 1'h0;
- reg pp_row37_11 = 1'h0;
- reg pp_row37_12 = 1'h0;
- reg pp_row37_13 = 1'h0;
- reg pp_row37_14 = 1'h0;
- reg pp_row37_2 = 1'h0;
- reg pp_row37_3 = 1'h0;
- reg pp_row37_4 = 1'h0;
- reg pp_row37_5 = 1'h0;
- reg pp_row37_6 = 1'h0;
- reg pp_row37_7 = 1'h0;
- reg pp_row37_8 = 1'h0;
- reg pp_row37_9 = 1'h0;
- wire pp_row38_0;
- reg pp_row38_1 = 1'h0;
- reg pp_row38_10 = 1'h0;
- reg pp_row38_11 = 1'h0;
- reg pp_row38_12 = 1'h0;
- reg pp_row38_13 = 1'h0;
- reg pp_row38_14 = 1'h0;
- reg pp_row38_2 = 1'h0;
- reg pp_row38_3 = 1'h0;
- reg pp_row38_4 = 1'h0;
- reg pp_row38_5 = 1'h0;
- reg pp_row38_6 = 1'h0;
- reg pp_row38_7 = 1'h0;
- reg pp_row38_8 = 1'h0;
- reg pp_row38_9 = 1'h0;
- reg pp_row39_0 = 1'h0;
- reg pp_row39_1 = 1'h0;
- reg pp_row39_10 = 1'h0;
- reg pp_row39_11 = 1'h0;
- reg pp_row39_12 = 1'h0;
- reg pp_row39_13 = 1'h0;
- reg pp_row39_2 = 1'h0;
- reg pp_row39_3 = 1'h0;
- reg pp_row39_4 = 1'h0;
- reg pp_row39_5 = 1'h0;
- reg pp_row39_6 = 1'h0;
- reg pp_row39_7 = 1'h0;
- reg pp_row39_8 = 1'h0;
- reg pp_row39_9 = 1'h0;
- reg pp_row3_0 = 1'h0;
- reg pp_row3_1 = 1'h0;
- wire pp_row40_0;
- reg pp_row40_1 = 1'h0;
- reg pp_row40_10 = 1'h0;
- reg pp_row40_11 = 1'h0;
- reg pp_row40_12 = 1'h0;
- reg pp_row40_13 = 1'h0;
- reg pp_row40_2 = 1'h0;
- reg pp_row40_3 = 1'h0;
- reg pp_row40_4 = 1'h0;
- reg pp_row40_5 = 1'h0;
- reg pp_row40_6 = 1'h0;
- reg pp_row40_7 = 1'h0;
- reg pp_row40_8 = 1'h0;
- reg pp_row40_9 = 1'h0;
- reg pp_row41_0 = 1'h0;
- reg pp_row41_1 = 1'h0;
- reg pp_row41_10 = 1'h0;
- reg pp_row41_11 = 1'h0;
- reg pp_row41_12 = 1'h0;
- reg pp_row41_2 = 1'h0;
- reg pp_row41_3 = 1'h0;
- reg pp_row41_4 = 1'h0;
- reg pp_row41_5 = 1'h0;
- reg pp_row41_6 = 1'h0;
- reg pp_row41_7 = 1'h0;
- reg pp_row41_8 = 1'h0;
- reg pp_row41_9 = 1'h0;
- wire pp_row42_0;
- reg pp_row42_1 = 1'h0;
- reg pp_row42_10 = 1'h0;
- reg pp_row42_11 = 1'h0;
- reg pp_row42_12 = 1'h0;
- reg pp_row42_2 = 1'h0;
- reg pp_row42_3 = 1'h0;
- reg pp_row42_4 = 1'h0;
- reg pp_row42_5 = 1'h0;
- reg pp_row42_6 = 1'h0;
- reg pp_row42_7 = 1'h0;
- reg pp_row42_8 = 1'h0;
- reg pp_row42_9 = 1'h0;
- reg pp_row43_0 = 1'h0;
- reg pp_row43_1 = 1'h0;
- reg pp_row43_10 = 1'h0;
- reg pp_row43_11 = 1'h0;
- reg pp_row43_2 = 1'h0;
- reg pp_row43_3 = 1'h0;
- reg pp_row43_4 = 1'h0;
- reg pp_row43_5 = 1'h0;
- reg pp_row43_6 = 1'h0;
- reg pp_row43_7 = 1'h0;
- reg pp_row43_8 = 1'h0;
- reg pp_row43_9 = 1'h0;
- wire pp_row44_0;
- reg pp_row44_1 = 1'h0;
- reg pp_row44_10 = 1'h0;
- reg pp_row44_11 = 1'h0;
- reg pp_row44_2 = 1'h0;
- reg pp_row44_3 = 1'h0;
- reg pp_row44_4 = 1'h0;
- reg pp_row44_5 = 1'h0;
- reg pp_row44_6 = 1'h0;
- reg pp_row44_7 = 1'h0;
- reg pp_row44_8 = 1'h0;
- reg pp_row44_9 = 1'h0;
- reg pp_row45_0 = 1'h0;
- reg pp_row45_1 = 1'h0;
- reg pp_row45_10 = 1'h0;
- reg pp_row45_2 = 1'h0;
- reg pp_row45_3 = 1'h0;
- reg pp_row45_4 = 1'h0;
- reg pp_row45_5 = 1'h0;
- reg pp_row45_6 = 1'h0;
- reg pp_row45_7 = 1'h0;
- reg pp_row45_8 = 1'h0;
- reg pp_row45_9 = 1'h0;
- wire pp_row46_0;
- reg pp_row46_1 = 1'h0;
- reg pp_row46_10 = 1'h0;
- reg pp_row46_2 = 1'h0;
- reg pp_row46_3 = 1'h0;
- reg pp_row46_4 = 1'h0;
- reg pp_row46_5 = 1'h0;
- reg pp_row46_6 = 1'h0;
- reg pp_row46_7 = 1'h0;
- reg pp_row46_8 = 1'h0;
- reg pp_row46_9 = 1'h0;
- reg pp_row47_0 = 1'h0;
- reg pp_row47_1 = 1'h0;
- reg pp_row47_2 = 1'h0;
- reg pp_row47_3 = 1'h0;
- reg pp_row47_4 = 1'h0;
- reg pp_row47_5 = 1'h0;
- reg pp_row47_6 = 1'h0;
- reg pp_row47_7 = 1'h0;
- reg pp_row47_8 = 1'h0;
- reg pp_row47_9 = 1'h0;
- wire pp_row48_0;
- reg pp_row48_1 = 1'h0;
- reg pp_row48_2 = 1'h0;
- reg pp_row48_3 = 1'h0;
- reg pp_row48_4 = 1'h0;
- reg pp_row48_5 = 1'h0;
- reg pp_row48_6 = 1'h0;
- reg pp_row48_7 = 1'h0;
- reg pp_row48_8 = 1'h0;
- reg pp_row48_9 = 1'h0;
- reg pp_row49_0 = 1'h0;
- reg pp_row49_1 = 1'h0;
- reg pp_row49_2 = 1'h0;
- reg pp_row49_3 = 1'h0;
- reg pp_row49_4 = 1'h0;
- reg pp_row49_5 = 1'h0;
- reg pp_row49_6 = 1'h0;
- reg pp_row49_7 = 1'h0;
- reg pp_row49_8 = 1'h0;
- reg pp_row4_0 = 1'h0;
- reg pp_row4_1 = 1'h0;
- reg pp_row4_2 = 1'h0;
- reg pp_row4_3 = 1'h0;
- wire pp_row50_0;
- reg pp_row50_1 = 1'h0;
- reg pp_row50_2 = 1'h0;
- reg pp_row50_3 = 1'h0;
- reg pp_row50_4 = 1'h0;
- reg pp_row50_5 = 1'h0;
- reg pp_row50_6 = 1'h0;
- reg pp_row50_7 = 1'h0;
- reg pp_row50_8 = 1'h0;
- reg pp_row51_0 = 1'h0;
- reg pp_row51_1 = 1'h0;
- reg pp_row51_2 = 1'h0;
- reg pp_row51_3 = 1'h0;
- reg pp_row51_4 = 1'h0;
- reg pp_row51_5 = 1'h0;
- reg pp_row51_6 = 1'h0;
- reg pp_row51_7 = 1'h0;
- wire pp_row52_0;
- reg pp_row52_1 = 1'h0;
- reg pp_row52_2 = 1'h0;
- reg pp_row52_3 = 1'h0;
- reg pp_row52_4 = 1'h0;
- reg pp_row52_5 = 1'h0;
- reg pp_row52_6 = 1'h0;
- reg pp_row52_7 = 1'h0;
- reg pp_row53_0 = 1'h0;
- reg pp_row53_1 = 1'h0;
- reg pp_row53_2 = 1'h0;
- reg pp_row53_3 = 1'h0;
- reg pp_row53_4 = 1'h0;
- reg pp_row53_5 = 1'h0;
- reg pp_row53_6 = 1'h0;
- wire pp_row54_0;
- reg pp_row54_1 = 1'h0;
- reg pp_row54_2 = 1'h0;
- reg pp_row54_3 = 1'h0;
- reg pp_row54_4 = 1'h0;
- reg pp_row54_5 = 1'h0;
- reg pp_row54_6 = 1'h0;
- reg pp_row55_0 = 1'h0;
- reg pp_row55_1 = 1'h0;
- reg pp_row55_2 = 1'h0;
- reg pp_row55_3 = 1'h0;
- reg pp_row55_4 = 1'h0;
- reg pp_row55_5 = 1'h0;
- wire pp_row56_0;
- reg pp_row56_1 = 1'h0;
- reg pp_row56_2 = 1'h0;
- reg pp_row56_3 = 1'h0;
- reg pp_row56_4 = 1'h0;
- reg pp_row56_5 = 1'h0;
- reg pp_row57_0 = 1'h0;
- reg pp_row57_1 = 1'h0;
- reg pp_row57_2 = 1'h0;
- reg pp_row57_3 = 1'h0;
- reg pp_row57_4 = 1'h0;
- wire pp_row58_0;
- reg pp_row58_1 = 1'h0;
- reg pp_row58_2 = 1'h0;
- reg pp_row58_3 = 1'h0;
- reg pp_row58_4 = 1'h0;
- reg pp_row59_0 = 1'h0;
- reg pp_row59_1 = 1'h0;
- reg pp_row59_2 = 1'h0;
- reg pp_row59_3 = 1'h0;
- reg pp_row5_0 = 1'h0;
- reg pp_row5_1 = 1'h0;
- reg pp_row5_2 = 1'h0;
- wire pp_row60_0;
- reg pp_row60_1 = 1'h0;
- reg pp_row60_2 = 1'h0;
- reg pp_row60_3 = 1'h0;
- reg pp_row61_0 = 1'h0;
- reg pp_row61_1 = 1'h0;
- reg pp_row61_2 = 1'h0;
- wire pp_row62_0;
- reg pp_row62_1 = 1'h0;
- reg pp_row62_2 = 1'h0;
- reg pp_row63_0 = 1'h0;
- reg pp_row63_1 = 1'h0;
- wire pp_row64_0;
- reg pp_row64_1 = 1'h0;
- reg pp_row6_0 = 1'h0;
- reg pp_row6_1 = 1'h0;
- reg pp_row6_2 = 1'h0;
- reg pp_row6_3 = 1'h0;
- reg pp_row6_4 = 1'h0;
- reg pp_row7_0 = 1'h0;
- reg pp_row7_1 = 1'h0;
- reg pp_row7_2 = 1'h0;
- reg pp_row7_3 = 1'h0;
- reg pp_row8_0 = 1'h0;
- reg pp_row8_1 = 1'h0;
- reg pp_row8_2 = 1'h0;
- reg pp_row8_3 = 1'h0;
- reg pp_row8_4 = 1'h0;
- reg pp_row8_5 = 1'h0;
- reg pp_row9_0 = 1'h0;
- reg pp_row9_1 = 1'h0;
- reg pp_row9_2 = 1'h0;
- reg pp_row9_3 = 1'h0;
- reg pp_row9_4 = 1'h0;
- wire [63:0] result;
- (* init = 64'h0000000000000000 *)
- wire [63:0] result_registered;
- input rst;
- wire rst;
- wire s;
- wire \s$1260 ;
- wire \s$1261 ;
- wire \s$1262 ;
- wire \s$1263 ;
- wire \s$1264 ;
- wire \s$1265 ;
- wire \s$1266 ;
- wire \s$1267 ;
- wire \s$1268 ;
- wire \s$1269 ;
- wire \s$1270 ;
- wire \s$1271 ;
- wire \s$1272 ;
- wire \s$1273 ;
- wire \s$1274 ;
- wire \s$1275 ;
- wire \s$1276 ;
- wire \s$1277 ;
- wire \s$1278 ;
- wire \s$1279 ;
- wire \s$1280 ;
- wire \s$1281 ;
- wire \s$1282 ;
- wire \s$1283 ;
- wire \s$1284 ;
- wire \s$1285 ;
- wire \s$1286 ;
- wire \s$1287 ;
- wire \s$1288 ;
- wire \s$1289 ;
- wire \s$1290 ;
- wire \s$1291 ;
- wire \s$1292 ;
- wire \s$1293 ;
- wire \s$1294 ;
- wire \s$1295 ;
- wire \s$1296 ;
- wire \s$1297 ;
- wire \s$1298 ;
- wire \s$1299 ;
- wire \s$1300 ;
- wire \s$1301 ;
- wire \s$1302 ;
- wire \s$1303 ;
- wire \s$1304 ;
- wire \s$1305 ;
- wire \s$1306 ;
- wire \s$1307 ;
- wire \s$1308 ;
- wire \s$1309 ;
- wire \s$1310 ;
- wire \s$1311 ;
- wire \s$1312 ;
- wire \s$1313 ;
- wire \s$1314 ;
- wire \s$1315 ;
- wire \s$1316 ;
- wire \s$1317 ;
- wire \s$1318 ;
- wire \s$1319 ;
- wire \s$1320 ;
- wire \s$1321 ;
- wire \s$2555 ;
- wire \s$2559 ;
- wire \s$2563 ;
- wire \s$2567 ;
- wire \s$2571 ;
- wire \s$2575 ;
- wire \s$2579 ;
- wire \s$2583 ;
- wire \s$2587 ;
- wire \s$2591 ;
- wire \s$2595 ;
- wire \s$2599 ;
- wire \s$2603 ;
- wire \s$2607 ;
- wire \s$2611 ;
- wire \s$2615 ;
- wire \s$2619 ;
- wire \s$2623 ;
- wire \s$2627 ;
- wire \s$2631 ;
- wire \s$2635 ;
- wire \s$2639 ;
- wire \s$2643 ;
- wire \s$2647 ;
- wire \s$2651 ;
- wire \s$2655 ;
- wire \s$2659 ;
- wire \s$2663 ;
- wire \s$2667 ;
- wire \s$2671 ;
- wire \s$2675 ;
- wire \s$2679 ;
- wire \s$2683 ;
- wire \s$2687 ;
- wire \s$2691 ;
- wire \s$2695 ;
- wire \s$2699 ;
- wire \s$2703 ;
- wire \s$2707 ;
- wire \s$2711 ;
- wire \s$2715 ;
- wire \s$2719 ;
- wire \s$2723 ;
- wire \s$2727 ;
- wire \s$2731 ;
- wire \s$2735 ;
- wire \s$2739 ;
- wire \s$2743 ;
- wire \s$2747 ;
- wire \s$2751 ;
- wire \s$2755 ;
- wire \s$2759 ;
- wire \s$2763 ;
- wire \s$2767 ;
- wire \s$2771 ;
- wire \s$2775 ;
- wire \s$2779 ;
- wire \s$2783 ;
- wire \s$2787 ;
- wire \s$2791 ;
- wire \s$2795 ;
- wire \s$2799 ;
- wire \s$2803 ;
- wire \s$2807 ;
- wire \s$2811 ;
- wire \s$2815 ;
- wire \s$2819 ;
- wire \s$2823 ;
- wire \s$2827 ;
- wire \s$2831 ;
- wire \s$2835 ;
- wire \s$2839 ;
- wire \s$2843 ;
- wire \s$2847 ;
- wire \s$2851 ;
- wire \s$2855 ;
- wire \s$2859 ;
- wire \s$2863 ;
- wire \s$2867 ;
- wire \s$2871 ;
- wire \s$2875 ;
- wire \s$2879 ;
- wire \s$2883 ;
- wire \s$2887 ;
- wire \s$2891 ;
- wire \s$2895 ;
- wire \s$2899 ;
- wire \s$2903 ;
- wire \s$2907 ;
- wire \s$2911 ;
- wire \s$2915 ;
- wire \s$2919 ;
- wire \s$2923 ;
- wire \s$2927 ;
- wire \s$2931 ;
- wire \s$2935 ;
- wire \s$2939 ;
- wire \s$2943 ;
- wire \s$2947 ;
- wire \s$2951 ;
- wire \s$2955 ;
- wire \s$2959 ;
- wire \s$2963 ;
- wire \s$2967 ;
- wire \s$2971 ;
- wire \s$2975 ;
- wire \s$2979 ;
- wire \s$2983 ;
- wire \s$2987 ;
- wire \s$2991 ;
- wire \s$2995 ;
- wire \s$2999 ;
- wire \s$3003 ;
- wire \s$3007 ;
- wire \s$3011 ;
- wire \s$3015 ;
- wire \s$3019 ;
- wire \s$3023 ;
- wire \s$3027 ;
- wire \s$3031 ;
- wire \s$3035 ;
- wire \s$3039 ;
- wire \s$3043 ;
- wire \s$3047 ;
- wire \s$3051 ;
- wire \s$3055 ;
- wire \s$3059 ;
- wire \s$3063 ;
- wire \s$3067 ;
- wire \s$3071 ;
- wire \s$3075 ;
- wire \s$3079 ;
- wire \s$3083 ;
- wire \s$3087 ;
- wire \s$3091 ;
- wire \s$3095 ;
- wire \s$3099 ;
- wire \s$3103 ;
- wire \s$3107 ;
- wire \s$3111 ;
- wire \s$3115 ;
- wire \s$3119 ;
- wire \s$3123 ;
- wire \s$3127 ;
- wire \s$3131 ;
- wire \s$3135 ;
- wire \s$3139 ;
- wire \s$3143 ;
- wire \s$3147 ;
- wire \s$3151 ;
- wire \s$3155 ;
- wire \s$3159 ;
- wire \s$3163 ;
- wire \s$3167 ;
- wire \s$3171 ;
- wire \s$3175 ;
- wire \s$3179 ;
- wire \s$3183 ;
- wire \s$3187 ;
- wire \s$3191 ;
- wire \s$3195 ;
- wire \s$3199 ;
- wire \s$3203 ;
- wire \s$3207 ;
- wire \s$3211 ;
- wire \s$3215 ;
- wire \s$3219 ;
- wire \s$3223 ;
- wire \s$3227 ;
- wire \s$3231 ;
- wire \s$3235 ;
- wire \s$3239 ;
- wire \s$3243 ;
- wire \s$3247 ;
- wire \s$3251 ;
- wire \s$3255 ;
- wire \s$3259 ;
- wire \s$3263 ;
- wire \s$3267 ;
- wire \s$3271 ;
- wire \s$3275 ;
- wire \s$3279 ;
- wire \s$3283 ;
- wire \s$3287 ;
- wire \s$3291 ;
- wire \s$3295 ;
- wire \s$3299 ;
- wire \s$3303 ;
- wire \s$3307 ;
- wire \s$3311 ;
- wire \s$3315 ;
- wire \s$3319 ;
- wire \s$3323 ;
- wire \s$3327 ;
- wire \s$3331 ;
- wire \s$3335 ;
- wire \s$3339 ;
- wire \s$3343 ;
- wire \s$3347 ;
- wire \s$3351 ;
- wire \s$3355 ;
- wire \s$3359 ;
- wire \s$3363 ;
- wire \s$3367 ;
- wire \s$3371 ;
- wire \s$3375 ;
- wire \s$3379 ;
- wire \s$3383 ;
- wire \s$3387 ;
- wire \s$3391 ;
- wire \s$3395 ;
- wire \s$3399 ;
- wire \s$3403 ;
- wire \s$3407 ;
- wire \s$3411 ;
- wire \s$3415 ;
- wire \s$3419 ;
- wire \s$3423 ;
- wire \s$3427 ;
- wire \s$3431 ;
- wire \s$3435 ;
- wire \s$3439 ;
- wire \s$3443 ;
- wire \s$3447 ;
- wire \s$3451 ;
- wire \s$3455 ;
- wire \s$3459 ;
- wire \s$3463 ;
- wire \s$3467 ;
- wire \s$3471 ;
- wire \s$3475 ;
- wire \s$3479 ;
- wire \s$3483 ;
- wire \s$3487 ;
- wire \s$3491 ;
- wire \s$3495 ;
- wire \s$3499 ;
- wire \s$3503 ;
- wire \s$3507 ;
- wire \s$3511 ;
- wire \s$3515 ;
- wire \s$3519 ;
- wire \s$3523 ;
- wire \s$3527 ;
- wire \s$3531 ;
- wire \s$3535 ;
- wire \s$3539 ;
- wire \s$3543 ;
- wire \s$3547 ;
- wire \s$3551 ;
- wire \s$3555 ;
- wire \s$3559 ;
- wire \s$3563 ;
- wire \s$3567 ;
- wire \s$3571 ;
- wire \s$3575 ;
- wire \s$3579 ;
- wire \s$3583 ;
- wire \s$3587 ;
- wire \s$3591 ;
- wire \s$3595 ;
- wire \s$3599 ;
- wire \s$3603 ;
- wire \s$3607 ;
- wire \s$3611 ;
- wire \s$3615 ;
- wire \s$3619 ;
- wire \s$3623 ;
- wire \s$3627 ;
- wire \s$3631 ;
- wire \s$3635 ;
- wire \s$3639 ;
- wire \s$3643 ;
- wire \s$3647 ;
- wire \s$3651 ;
- wire \s$3655 ;
- wire \s$3659 ;
- wire \s$3663 ;
- wire \s$3667 ;
- wire \s$3671 ;
- wire \s$3675 ;
- wire \s$3679 ;
- wire \s$3683 ;
- wire \s$3687 ;
- wire \s$3691 ;
- wire \s$3695 ;
- wire \s$3699 ;
- wire \s$3703 ;
- wire \s$3707 ;
- wire \s$3711 ;
- wire \s$3715 ;
- wire \s$3719 ;
- wire \s$3723 ;
- wire \s$3727 ;
- wire \s$3731 ;
- wire \s$3735 ;
- wire \s$3739 ;
- wire \s$3743 ;
- wire \s$3747 ;
- wire \s$3751 ;
- wire \s$3755 ;
- wire \s$3759 ;
- wire \s$3763 ;
- wire \s$3767 ;
- wire \s$3771 ;
- wire \s$3775 ;
- wire \s$3779 ;
- wire \s$3783 ;
- wire \s$3787 ;
- wire \s$3791 ;
- wire \s$3795 ;
- wire \s$3799 ;
- wire \s$3803 ;
- wire \s$3807 ;
- wire \s$3811 ;
- wire \s$3815 ;
- wire \s$3819 ;
- wire \s$3823 ;
- wire \s$3827 ;
- wire \s$3831 ;
- wire \s$3835 ;
- wire \s$3839 ;
- wire \s$3843 ;
- wire \s$3847 ;
- wire \s$3851 ;
- wire \s$3855 ;
- wire \s$3859 ;
- wire \s$3863 ;
- wire \s$3867 ;
- wire \s$3871 ;
- wire \s$3875 ;
- wire \s$3879 ;
- wire \s$3883 ;
- wire \s$3887 ;
- wire \s$3891 ;
- wire \s$3895 ;
- wire \s$3899 ;
- wire \s$3903 ;
- wire \s$3907 ;
- wire \s$3911 ;
- wire \s$3915 ;
- wire \s$3919 ;
- wire \s$3923 ;
- wire \s$3927 ;
- wire \s$3931 ;
- wire \s$3935 ;
- wire \s$3939 ;
- wire \s$3943 ;
- wire \s$3947 ;
- wire \s$3951 ;
- wire \s$3955 ;
- wire \s$3959 ;
- wire \s$3963 ;
- wire \s$3967 ;
- wire \s$3971 ;
- wire \s$3975 ;
- wire \s$3979 ;
- wire \s$3983 ;
- wire \s$3987 ;
- wire \s$3991 ;
- wire \s$3995 ;
- wire \s$3999 ;
- wire \s$4003 ;
- wire \s$4007 ;
- wire \s$4011 ;
- wire \s$4015 ;
- wire \s$4019 ;
- wire \s$4023 ;
- wire \s$4027 ;
- wire \s$4031 ;
- wire \s$4035 ;
- wire \s$4039 ;
- wire \s$4043 ;
- wire \s$4047 ;
- wire \s$4051 ;
- wire \s$4055 ;
- wire \s$4059 ;
- wire \s$4063 ;
- wire \s$4067 ;
- wire \s$4071 ;
- wire \s$4075 ;
- wire \s$4079 ;
- wire \s$4083 ;
- wire \s$4087 ;
- wire \s$4091 ;
- wire \s$4095 ;
- wire \s$4099 ;
- wire \s$4103 ;
- wire \s$4107 ;
- wire \s$4111 ;
- wire \s$4115 ;
- wire \s$4119 ;
- wire \s$4123 ;
- wire \s$4127 ;
- wire \s$4131 ;
- wire \s$4135 ;
- wire \s$4139 ;
- wire \s$4143 ;
- wire \s$4147 ;
- wire \s$4151 ;
- wire \s$4155 ;
- wire \s$4159 ;
- wire \s$4163 ;
- wire \s$4167 ;
- wire \s$4171 ;
- wire \s$4175 ;
- wire \s$4179 ;
- wire \s$4183 ;
- wire \s$4187 ;
- wire \s$4191 ;
- wire \s$4195 ;
- wire \s$4199 ;
- wire \s$4203 ;
- wire \s$4207 ;
- wire \s$4211 ;
- wire \s$4215 ;
- wire \s$4219 ;
- wire \s$4223 ;
- wire \s$4227 ;
- wire \s$4231 ;
- wire \s$4235 ;
- wire \s$4239 ;
- wire \s$4243 ;
- wire \s$4247 ;
- wire \s$4251 ;
- wire \s$4255 ;
- wire \s$4259 ;
- wire \s$4263 ;
- wire \s$4267 ;
- wire \s$4271 ;
- wire \s$4275 ;
- wire \s$4279 ;
- wire \s$4283 ;
- wire \s$4287 ;
- wire \s$4291 ;
- wire \s$4295 ;
- wire \s$4299 ;
- wire \s$4303 ;
- wire \s$4307 ;
- wire \s$4311 ;
- wire \s$4315 ;
- wire \s$4319 ;
- wire \s$4323 ;
- wire \s$4327 ;
- wire \s$4331 ;
- wire \s$4335 ;
- wire \s$4339 ;
- wire \s$4343 ;
- wire \s$4347 ;
- wire \s$4351 ;
- wire \s$4355 ;
- wire \s$4359 ;
- wire \s$4363 ;
- wire \s$4367 ;
- wire \s$4371 ;
- wire \s$4375 ;
- wire \s$4379 ;
- wire \s$4383 ;
- wire \s$4387 ;
- wire \s$4391 ;
- wire \s$4395 ;
- wire \s$4399 ;
- wire sel_0;
- wire \sel_0$1365 ;
- wire \sel_0$1402 ;
- wire \sel_0$1439 ;
- wire \sel_0$1476 ;
- wire \sel_0$1513 ;
- wire \sel_0$1550 ;
- wire \sel_0$1587 ;
- wire \sel_0$1624 ;
- wire \sel_0$1661 ;
- wire \sel_0$1698 ;
- wire \sel_0$1735 ;
- wire \sel_0$1772 ;
- wire \sel_0$1809 ;
- wire \sel_0$1846 ;
- wire \sel_0$1883 ;
- wire \sel_0$1921 ;
- wire sel_1;
- wire \sel_1$1366 ;
- wire \sel_1$1403 ;
- wire \sel_1$1440 ;
- wire \sel_1$1477 ;
- wire \sel_1$1514 ;
- wire \sel_1$1551 ;
- wire \sel_1$1588 ;
- wire \sel_1$1625 ;
- wire \sel_1$1662 ;
- wire \sel_1$1699 ;
- wire \sel_1$1736 ;
- wire \sel_1$1773 ;
- wire \sel_1$1810 ;
- wire \sel_1$1847 ;
- wire \sel_1$1884 ;
- wire \sel_1$1922 ;
- wire sn;
- wire \sn$2558 ;
- wire \sn$2562 ;
- wire \sn$2566 ;
- wire \sn$2570 ;
- wire \sn$2574 ;
- wire \sn$2578 ;
- wire \sn$2582 ;
- wire \sn$2586 ;
- wire \sn$2590 ;
- wire \sn$2594 ;
- wire \sn$2598 ;
- wire \sn$2602 ;
- wire \sn$2606 ;
- wire \sn$2610 ;
- wire \sn$2614 ;
- wire \sn$2618 ;
- wire \sn$2622 ;
- wire \sn$2626 ;
- wire \sn$2630 ;
- wire \sn$2634 ;
- wire \sn$2638 ;
- wire \sn$2642 ;
- wire \sn$2646 ;
- wire \sn$2650 ;
- wire \sn$2654 ;
- wire \sn$2658 ;
- wire \sn$2662 ;
- wire \sn$2666 ;
- wire \sn$2670 ;
- wire \sn$2674 ;
- wire \sn$2678 ;
- wire \sn$2682 ;
- wire \sn$2686 ;
- wire \sn$2690 ;
- wire \sn$2694 ;
- wire \sn$2698 ;
- wire \sn$2702 ;
- wire \sn$2706 ;
- wire \sn$2710 ;
- wire \sn$2714 ;
- wire \sn$2718 ;
- wire \sn$2722 ;
- wire \sn$2726 ;
- wire \sn$2730 ;
- wire \sn$2734 ;
- wire \sn$2738 ;
- wire \sn$2742 ;
- wire \sn$2746 ;
- wire \sn$2750 ;
- wire \sn$2754 ;
- wire \sn$2758 ;
- wire \sn$2762 ;
- wire \sn$2766 ;
- wire \sn$2770 ;
- wire \sn$2774 ;
- wire \sn$2778 ;
- wire \sn$2782 ;
- wire \sn$2786 ;
- wire \sn$2790 ;
- wire \sn$2794 ;
- wire \sn$2798 ;
- wire \sn$2802 ;
- wire \sn$2806 ;
- wire \sn$2810 ;
- wire \sn$2814 ;
- wire \sn$2818 ;
- wire \sn$2822 ;
- wire \sn$2826 ;
- wire \sn$2830 ;
- wire \sn$2834 ;
- wire \sn$2838 ;
- wire \sn$2842 ;
- wire \sn$2846 ;
- wire \sn$2850 ;
- wire \sn$2854 ;
- wire \sn$2858 ;
- wire \sn$2862 ;
- wire \sn$2866 ;
- wire \sn$2870 ;
- wire \sn$2874 ;
- wire \sn$2878 ;
- wire \sn$2882 ;
- wire \sn$2886 ;
- wire \sn$2890 ;
- wire \sn$2894 ;
- wire \sn$2898 ;
- wire \sn$2902 ;
- wire \sn$2906 ;
- wire \sn$2910 ;
- wire \sn$2914 ;
- wire \sn$2918 ;
- wire \sn$2922 ;
- wire \sn$2926 ;
- wire \sn$2930 ;
- wire \sn$2934 ;
- wire \sn$2938 ;
- wire \sn$2942 ;
- wire \sn$2946 ;
- wire \sn$2950 ;
- wire \sn$2954 ;
- wire \sn$2958 ;
- wire \sn$2962 ;
- wire \sn$2966 ;
- wire \sn$2970 ;
- wire \sn$2974 ;
- wire \sn$2978 ;
- wire \sn$2982 ;
- wire \sn$2986 ;
- wire \sn$2990 ;
- wire \sn$2994 ;
- wire \sn$2998 ;
- wire \sn$3002 ;
- wire \sn$3006 ;
- wire \sn$3010 ;
- wire \sn$3014 ;
- wire \sn$3018 ;
- wire \sn$3022 ;
- wire \sn$3026 ;
- wire \sn$3030 ;
- wire \sn$3034 ;
- wire \sn$3038 ;
- wire \sn$3042 ;
- wire \sn$3046 ;
- wire \sn$3050 ;
- wire \sn$3054 ;
- wire \sn$3058 ;
- wire \sn$3062 ;
- wire \sn$3066 ;
- wire \sn$3070 ;
- wire \sn$3074 ;
- wire \sn$3078 ;
- wire \sn$3082 ;
- wire \sn$3086 ;
- wire \sn$3090 ;
- wire \sn$3094 ;
- wire \sn$3098 ;
- wire \sn$3102 ;
- wire \sn$3106 ;
- wire \sn$3110 ;
- wire \sn$3114 ;
- wire \sn$3118 ;
- wire \sn$3122 ;
- wire \sn$3126 ;
- wire \sn$3130 ;
- wire \sn$3134 ;
- wire \sn$3138 ;
- wire \sn$3142 ;
- wire \sn$3146 ;
- wire \sn$3150 ;
- wire \sn$3154 ;
- wire \sn$3158 ;
- wire \sn$3162 ;
- wire \sn$3166 ;
- wire \sn$3170 ;
- wire \sn$3174 ;
- wire \sn$3178 ;
- wire \sn$3182 ;
- wire \sn$3186 ;
- wire \sn$3190 ;
- wire \sn$3194 ;
- wire \sn$3198 ;
- wire \sn$3202 ;
- wire \sn$3206 ;
- wire \sn$3210 ;
- wire \sn$3214 ;
- wire \sn$3218 ;
- wire \sn$3222 ;
- wire \sn$3226 ;
- wire \sn$3230 ;
- wire \sn$3234 ;
- wire \sn$3238 ;
- wire \sn$3242 ;
- wire \sn$3246 ;
- wire \sn$3250 ;
- wire \sn$3254 ;
- wire \sn$3258 ;
- wire \sn$3262 ;
- wire \sn$3266 ;
- wire \sn$3270 ;
- wire \sn$3274 ;
- wire \sn$3278 ;
- wire \sn$3282 ;
- wire \sn$3286 ;
- wire \sn$3290 ;
- wire \sn$3294 ;
- wire \sn$3298 ;
- wire \sn$3302 ;
- wire \sn$3306 ;
- wire \sn$3310 ;
- wire \sn$3314 ;
- wire \sn$3318 ;
- wire \sn$3322 ;
- wire \sn$3326 ;
- wire \sn$3330 ;
- wire \sn$3334 ;
- wire \sn$3338 ;
- wire \sn$3342 ;
- wire \sn$3346 ;
- wire \sn$3350 ;
- wire \sn$3354 ;
- wire \sn$3358 ;
- wire \sn$3362 ;
- wire \sn$3366 ;
- wire \sn$3370 ;
- wire \sn$3374 ;
- wire \sn$3378 ;
- wire \sn$3382 ;
- wire \sn$3386 ;
- wire \sn$3390 ;
- wire \sn$3394 ;
- wire \sn$3398 ;
- wire \sn$3402 ;
- wire \sn$3406 ;
- wire \sn$3410 ;
- wire \sn$3414 ;
- wire \sn$3418 ;
- wire \sn$3422 ;
- wire \sn$3426 ;
- wire \sn$3430 ;
- wire \sn$3434 ;
- wire \sn$3438 ;
- wire \sn$3442 ;
- wire \sn$3446 ;
- wire \sn$3450 ;
- wire \sn$3454 ;
- wire \sn$3458 ;
- wire \sn$3462 ;
- wire \sn$3466 ;
- wire \sn$3470 ;
- wire \sn$3474 ;
- wire \sn$3478 ;
- wire \sn$3482 ;
- wire \sn$3486 ;
- wire \sn$3490 ;
- wire \sn$3494 ;
- wire \sn$3498 ;
- wire \sn$3502 ;
- wire \sn$3506 ;
- wire \sn$3510 ;
- wire \sn$3514 ;
- wire \sn$3518 ;
- wire \sn$3522 ;
- wire \sn$3526 ;
- wire \sn$3530 ;
- wire \sn$3534 ;
- wire \sn$3538 ;
- wire \sn$3542 ;
- wire \sn$3546 ;
- wire \sn$3550 ;
- wire \sn$3554 ;
- wire \sn$3558 ;
- wire \sn$3562 ;
- wire \sn$3566 ;
- wire \sn$3570 ;
- wire \sn$3574 ;
- wire \sn$3578 ;
- wire \sn$3582 ;
- wire \sn$3586 ;
- wire \sn$3590 ;
- wire \sn$3594 ;
- wire \sn$3598 ;
- wire \sn$3602 ;
- wire \sn$3606 ;
- wire \sn$3610 ;
- wire \sn$3614 ;
- wire \sn$3618 ;
- wire \sn$3622 ;
- wire \sn$3626 ;
- wire \sn$3630 ;
- wire \sn$3634 ;
- wire \sn$3638 ;
- wire \sn$3642 ;
- wire \sn$3646 ;
- wire \sn$3650 ;
- wire \sn$3654 ;
- wire \sn$3658 ;
- wire \sn$3662 ;
- wire \sn$3666 ;
- wire \sn$3670 ;
- wire \sn$3674 ;
- wire \sn$3678 ;
- wire \sn$3682 ;
- wire \sn$3686 ;
- wire \sn$3690 ;
- wire \sn$3694 ;
- wire \sn$3698 ;
- wire \sn$3702 ;
- wire \sn$3706 ;
- wire \sn$3710 ;
- wire \sn$3714 ;
- wire \sn$3718 ;
- wire \sn$3722 ;
- wire \sn$3726 ;
- wire \sn$3730 ;
- wire \sn$3734 ;
- wire \sn$3738 ;
- wire \sn$3742 ;
- wire \sn$3746 ;
- wire \sn$3750 ;
- wire \sn$3754 ;
- wire \sn$3758 ;
- wire \sn$3762 ;
- wire \sn$3766 ;
- wire \sn$3770 ;
- wire \sn$3774 ;
- wire \sn$3778 ;
- wire \sn$3782 ;
- wire \sn$3786 ;
- wire \sn$3790 ;
- wire \sn$3794 ;
- wire \sn$3798 ;
- wire \sn$3802 ;
- wire \sn$3806 ;
- wire \sn$3810 ;
- wire \sn$3814 ;
- wire \sn$3818 ;
- wire \sn$3822 ;
- wire \sn$3826 ;
- wire \sn$3830 ;
- wire \sn$3834 ;
- wire \sn$3838 ;
- wire \sn$3842 ;
- wire \sn$3846 ;
- wire \sn$3850 ;
- wire \sn$3854 ;
- wire \sn$3858 ;
- wire \sn$3862 ;
- wire \sn$3866 ;
- wire \sn$3870 ;
- wire \sn$3874 ;
- wire \sn$3878 ;
- wire \sn$3882 ;
- wire \sn$3886 ;
- wire \sn$3890 ;
- wire \sn$3894 ;
- wire \sn$3898 ;
- wire \sn$3902 ;
- wire \sn$3906 ;
- wire \sn$3910 ;
- wire \sn$3914 ;
- wire \sn$3918 ;
- wire \sn$3922 ;
- wire \sn$3926 ;
- wire \sn$3930 ;
- wire \sn$3934 ;
- wire \sn$3938 ;
- wire \sn$3942 ;
- wire \sn$3946 ;
- wire \sn$3950 ;
- wire \sn$3954 ;
- wire \sn$3958 ;
- wire \sn$3962 ;
- wire \sn$3966 ;
- wire \sn$3970 ;
- wire \sn$3974 ;
- wire \sn$3978 ;
- wire \sn$3982 ;
- wire \sn$3986 ;
- wire \sn$3990 ;
- wire \sn$3994 ;
- wire \sn$3998 ;
- wire \sn$4002 ;
- wire \sn$4006 ;
- wire \sn$4010 ;
- wire \sn$4014 ;
- wire \sn$4018 ;
- wire \sn$4022 ;
- wire \sn$4026 ;
- wire \sn$4030 ;
- wire \sn$4034 ;
- wire \sn$4038 ;
- wire \sn$4042 ;
- wire \sn$4046 ;
- wire \sn$4050 ;
- wire \sn$4054 ;
- wire \sn$4058 ;
- wire \sn$4062 ;
- wire \sn$4066 ;
- wire \sn$4070 ;
- wire \sn$4074 ;
- wire \sn$4078 ;
- wire \sn$4082 ;
- wire \sn$4086 ;
- wire \sn$4090 ;
- wire \sn$4094 ;
- wire \sn$4098 ;
- wire \sn$4102 ;
- wire \sn$4106 ;
- wire \sn$4110 ;
- wire \sn$4114 ;
- wire \sn$4118 ;
- wire \sn$4122 ;
- wire \sn$4126 ;
- wire \sn$4130 ;
- wire \sn$4134 ;
- wire \sn$4138 ;
- wire \sn$4142 ;
- wire \sn$4146 ;
- wire \sn$4150 ;
- wire \sn$4154 ;
- wire \sn$4158 ;
- wire \sn$4162 ;
- wire \sn$4166 ;
- wire \sn$4170 ;
- wire \sn$4174 ;
- wire \sn$4178 ;
- wire \sn$4182 ;
- wire \sn$4186 ;
- wire \sn$4190 ;
- wire \sn$4194 ;
- wire \sn$4198 ;
- wire \sn$4202 ;
- wire \sn$4206 ;
- wire \sn$4210 ;
- wire \sn$4214 ;
- wire \sn$4218 ;
- wire \sn$4222 ;
- wire \sn$4226 ;
- wire \sn$4230 ;
- wire \sn$4234 ;
- wire \sn$4238 ;
- wire \sn$4242 ;
- wire \sn$4246 ;
- wire \sn$4250 ;
- wire \sn$4254 ;
- wire \sn$4258 ;
- wire \sn$4262 ;
- wire \sn$4266 ;
- wire \sn$4270 ;
- wire \sn$4274 ;
- wire \sn$4278 ;
- wire \sn$4282 ;
- wire \sn$4286 ;
- wire \sn$4290 ;
- wire \sn$4294 ;
- wire \sn$4298 ;
- wire \sn$4302 ;
- wire \sn$4306 ;
- wire \sn$4310 ;
- wire \sn$4314 ;
- wire \sn$4318 ;
- wire \sn$4322 ;
- wire \sn$4326 ;
- wire \sn$4330 ;
- wire \sn$4334 ;
- wire \sn$4338 ;
- wire \sn$4342 ;
- wire \sn$4346 ;
- wire \sn$4350 ;
- wire \sn$4354 ;
- wire \sn$4358 ;
- wire \sn$4362 ;
- wire \sn$4366 ;
- wire \sn$4370 ;
- wire \sn$4374 ;
- wire \sn$4378 ;
- wire \sn$4382 ;
- wire \sn$4386 ;
- wire \sn$4390 ;
- wire \sn$4394 ;
- wire \sn$4398 ;
- wire \sn$4401 ;
- wire \sn$4403 ;
- wire \sn$4405 ;
- wire \sn$4407 ;
- wire \sn$4409 ;
- wire \sn$4411 ;
- wire \sn$4413 ;
- wire \sn$4415 ;
- wire \sn$4417 ;
- wire \sn$4419 ;
- wire \sn$4421 ;
- wire \sn$4423 ;
- wire \sn$4425 ;
- wire \sn$4427 ;
- wire \sn$4429 ;
- wire \sn$4431 ;
- wire \sn$4433 ;
- wire \sn$4435 ;
- wire \sn$4437 ;
- wire \sn$4439 ;
- wire \sn$4441 ;
- wire \sn$4443 ;
- wire \sn$4445 ;
- wire \sn$4447 ;
- wire \sn$4449 ;
- wire \sn$4451 ;
- wire \sn$4453 ;
- wire \sn$4455 ;
- wire \sn$4457 ;
- wire \sn$4459 ;
- wire \sn$4461 ;
- wire \sn$4463 ;
- wire \sn$4465 ;
- wire \sn$4467 ;
- wire \sn$4469 ;
- wire \sn$4471 ;
- wire \sn$4473 ;
- wire \sn$4475 ;
- wire \sn$4477 ;
- wire \sn$4479 ;
- wire \sn$4481 ;
- wire \sn$4483 ;
- wire \sn$4485 ;
- wire \sn$4487 ;
- wire \sn$4489 ;
- wire \sn$4491 ;
- wire \sn$4493 ;
- wire \sn$4495 ;
- wire \sn$4497 ;
- wire \sn$4499 ;
- wire \sn$4501 ;
- wire \sn$4503 ;
- wire \sn$4505 ;
- wire \sn$4507 ;
- wire \sn$4509 ;
- wire \sn$4511 ;
- wire \sn$4513 ;
- wire \sn$4515 ;
- wire \sn$4517 ;
- wire \sn$4519 ;
- wire \sn$4521 ;
- wire \sn$4523 ;
- wire \sn$4525 ;
- wire t;
- wire \t$1976 ;
- wire \t$1977 ;
- wire \t$1978 ;
- wire \t$1979 ;
- wire \t$1980 ;
- wire \t$1981 ;
- wire \t$1982 ;
- wire \t$1983 ;
- wire \t$1984 ;
- wire \t$1985 ;
- wire \t$1986 ;
- wire \t$1987 ;
- wire \t$1988 ;
- wire \t$1989 ;
- wire \t$1990 ;
- wire \t$1991 ;
- wire \t$1992 ;
- wire \t$1993 ;
- wire \t$1994 ;
- wire \t$1995 ;
- wire \t$1996 ;
- wire \t$1997 ;
- wire \t$1998 ;
- wire \t$1999 ;
- wire \t$2000 ;
- wire \t$2001 ;
- wire \t$2002 ;
- wire \t$2003 ;
- wire \t$2004 ;
- wire \t$2005 ;
- wire \t$2006 ;
- wire \t$2007 ;
- wire \t$2009 ;
- wire \t$2010 ;
- wire \t$2011 ;
- wire \t$2012 ;
- wire \t$2013 ;
- wire \t$2014 ;
- wire \t$2015 ;
- wire \t$2016 ;
- wire \t$2017 ;
- wire \t$2018 ;
- wire \t$2019 ;
- wire \t$2020 ;
- wire \t$2021 ;
- wire \t$2022 ;
- wire \t$2023 ;
- wire \t$2024 ;
- wire \t$2025 ;
- wire \t$2026 ;
- wire \t$2027 ;
- wire \t$2028 ;
- wire \t$2029 ;
- wire \t$2030 ;
- wire \t$2031 ;
- wire \t$2032 ;
- wire \t$2033 ;
- wire \t$2034 ;
- wire \t$2035 ;
- wire \t$2036 ;
- wire \t$2037 ;
- wire \t$2038 ;
- wire \t$2039 ;
- wire \t$2040 ;
- wire \t$2041 ;
- wire \t$2043 ;
- wire \t$2044 ;
- wire \t$2045 ;
- wire \t$2046 ;
- wire \t$2047 ;
- wire \t$2048 ;
- wire \t$2049 ;
- wire \t$2050 ;
- wire \t$2051 ;
- wire \t$2052 ;
- wire \t$2053 ;
- wire \t$2054 ;
- wire \t$2055 ;
- wire \t$2056 ;
- wire \t$2057 ;
- wire \t$2058 ;
- wire \t$2059 ;
- wire \t$2060 ;
- wire \t$2061 ;
- wire \t$2062 ;
- wire \t$2063 ;
- wire \t$2064 ;
- wire \t$2065 ;
- wire \t$2066 ;
- wire \t$2067 ;
- wire \t$2068 ;
- wire \t$2069 ;
- wire \t$2070 ;
- wire \t$2071 ;
- wire \t$2072 ;
- wire \t$2073 ;
- wire \t$2074 ;
- wire \t$2075 ;
- wire \t$2077 ;
- wire \t$2078 ;
- wire \t$2079 ;
- wire \t$2080 ;
- wire \t$2081 ;
- wire \t$2082 ;
- wire \t$2083 ;
- wire \t$2084 ;
- wire \t$2085 ;
- wire \t$2086 ;
- wire \t$2087 ;
- wire \t$2088 ;
- wire \t$2089 ;
- wire \t$2090 ;
- wire \t$2091 ;
- wire \t$2092 ;
- wire \t$2093 ;
- wire \t$2094 ;
- wire \t$2095 ;
- wire \t$2096 ;
- wire \t$2097 ;
- wire \t$2098 ;
- wire \t$2099 ;
- wire \t$2100 ;
- wire \t$2101 ;
- wire \t$2102 ;
- wire \t$2103 ;
- wire \t$2104 ;
- wire \t$2105 ;
- wire \t$2106 ;
- wire \t$2107 ;
- wire \t$2108 ;
- wire \t$2109 ;
- wire \t$2111 ;
- wire \t$2112 ;
- wire \t$2113 ;
- wire \t$2114 ;
- wire \t$2115 ;
- wire \t$2116 ;
- wire \t$2117 ;
- wire \t$2118 ;
- wire \t$2119 ;
- wire \t$2120 ;
- wire \t$2121 ;
- wire \t$2122 ;
- wire \t$2123 ;
- wire \t$2124 ;
- wire \t$2125 ;
- wire \t$2126 ;
- wire \t$2127 ;
- wire \t$2128 ;
- wire \t$2129 ;
- wire \t$2130 ;
- wire \t$2131 ;
- wire \t$2132 ;
- wire \t$2133 ;
- wire \t$2134 ;
- wire \t$2135 ;
- wire \t$2136 ;
- wire \t$2137 ;
- wire \t$2138 ;
- wire \t$2139 ;
- wire \t$2140 ;
- wire \t$2141 ;
- wire \t$2142 ;
- wire \t$2143 ;
- wire \t$2145 ;
- wire \t$2146 ;
- wire \t$2147 ;
- wire \t$2148 ;
- wire \t$2149 ;
- wire \t$2150 ;
- wire \t$2151 ;
- wire \t$2152 ;
- wire \t$2153 ;
- wire \t$2154 ;
- wire \t$2155 ;
- wire \t$2156 ;
- wire \t$2157 ;
- wire \t$2158 ;
- wire \t$2159 ;
- wire \t$2160 ;
- wire \t$2161 ;
- wire \t$2162 ;
- wire \t$2163 ;
- wire \t$2164 ;
- wire \t$2165 ;
- wire \t$2166 ;
- wire \t$2167 ;
- wire \t$2168 ;
- wire \t$2169 ;
- wire \t$2170 ;
- wire \t$2171 ;
- wire \t$2172 ;
- wire \t$2173 ;
- wire \t$2174 ;
- wire \t$2175 ;
- wire \t$2176 ;
- wire \t$2177 ;
- wire \t$2179 ;
- wire \t$2180 ;
- wire \t$2181 ;
- wire \t$2182 ;
- wire \t$2183 ;
- wire \t$2184 ;
- wire \t$2185 ;
- wire \t$2186 ;
- wire \t$2187 ;
- wire \t$2188 ;
- wire \t$2189 ;
- wire \t$2190 ;
- wire \t$2191 ;
- wire \t$2192 ;
- wire \t$2193 ;
- wire \t$2194 ;
- wire \t$2195 ;
- wire \t$2196 ;
- wire \t$2197 ;
- wire \t$2198 ;
- wire \t$2199 ;
- wire \t$2200 ;
- wire \t$2201 ;
- wire \t$2202 ;
- wire \t$2203 ;
- wire \t$2204 ;
- wire \t$2205 ;
- wire \t$2206 ;
- wire \t$2207 ;
- wire \t$2208 ;
- wire \t$2209 ;
- wire \t$2210 ;
- wire \t$2211 ;
- wire \t$2213 ;
- wire \t$2214 ;
- wire \t$2215 ;
- wire \t$2216 ;
- wire \t$2217 ;
- wire \t$2218 ;
- wire \t$2219 ;
- wire \t$2220 ;
- wire \t$2221 ;
- wire \t$2222 ;
- wire \t$2223 ;
- wire \t$2224 ;
- wire \t$2225 ;
- wire \t$2226 ;
- wire \t$2227 ;
- wire \t$2228 ;
- wire \t$2229 ;
- wire \t$2230 ;
- wire \t$2231 ;
- wire \t$2232 ;
- wire \t$2233 ;
- wire \t$2234 ;
- wire \t$2235 ;
- wire \t$2236 ;
- wire \t$2237 ;
- wire \t$2238 ;
- wire \t$2239 ;
- wire \t$2240 ;
- wire \t$2241 ;
- wire \t$2242 ;
- wire \t$2243 ;
- wire \t$2244 ;
- wire \t$2245 ;
- wire \t$2247 ;
- wire \t$2248 ;
- wire \t$2249 ;
- wire \t$2250 ;
- wire \t$2251 ;
- wire \t$2252 ;
- wire \t$2253 ;
- wire \t$2254 ;
- wire \t$2255 ;
- wire \t$2256 ;
- wire \t$2257 ;
- wire \t$2258 ;
- wire \t$2259 ;
- wire \t$2260 ;
- wire \t$2261 ;
- wire \t$2262 ;
- wire \t$2263 ;
- wire \t$2264 ;
- wire \t$2265 ;
- wire \t$2266 ;
- wire \t$2267 ;
- wire \t$2268 ;
- wire \t$2269 ;
- wire \t$2270 ;
- wire \t$2271 ;
- wire \t$2272 ;
- wire \t$2273 ;
- wire \t$2274 ;
- wire \t$2275 ;
- wire \t$2276 ;
- wire \t$2277 ;
- wire \t$2278 ;
- wire \t$2279 ;
- wire \t$2281 ;
- wire \t$2282 ;
- wire \t$2283 ;
- wire \t$2284 ;
- wire \t$2285 ;
- wire \t$2286 ;
- wire \t$2287 ;
- wire \t$2288 ;
- wire \t$2289 ;
- wire \t$2290 ;
- wire \t$2291 ;
- wire \t$2292 ;
- wire \t$2293 ;
- wire \t$2294 ;
- wire \t$2295 ;
- wire \t$2296 ;
- wire \t$2297 ;
- wire \t$2298 ;
- wire \t$2299 ;
- wire \t$2300 ;
- wire \t$2301 ;
- wire \t$2302 ;
- wire \t$2303 ;
- wire \t$2304 ;
- wire \t$2305 ;
- wire \t$2306 ;
- wire \t$2307 ;
- wire \t$2308 ;
- wire \t$2309 ;
- wire \t$2310 ;
- wire \t$2311 ;
- wire \t$2312 ;
- wire \t$2313 ;
- wire \t$2315 ;
- wire \t$2316 ;
- wire \t$2317 ;
- wire \t$2318 ;
- wire \t$2319 ;
- wire \t$2320 ;
- wire \t$2321 ;
- wire \t$2322 ;
- wire \t$2323 ;
- wire \t$2324 ;
- wire \t$2325 ;
- wire \t$2326 ;
- wire \t$2327 ;
- wire \t$2328 ;
- wire \t$2329 ;
- wire \t$2330 ;
- wire \t$2331 ;
- wire \t$2332 ;
- wire \t$2333 ;
- wire \t$2334 ;
- wire \t$2335 ;
- wire \t$2336 ;
- wire \t$2337 ;
- wire \t$2338 ;
- wire \t$2339 ;
- wire \t$2340 ;
- wire \t$2341 ;
- wire \t$2342 ;
- wire \t$2343 ;
- wire \t$2344 ;
- wire \t$2345 ;
- wire \t$2346 ;
- wire \t$2347 ;
- wire \t$2349 ;
- wire \t$2350 ;
- wire \t$2351 ;
- wire \t$2352 ;
- wire \t$2353 ;
- wire \t$2354 ;
- wire \t$2355 ;
- wire \t$2356 ;
- wire \t$2357 ;
- wire \t$2358 ;
- wire \t$2359 ;
- wire \t$2360 ;
- wire \t$2361 ;
- wire \t$2362 ;
- wire \t$2363 ;
- wire \t$2364 ;
- wire \t$2365 ;
- wire \t$2366 ;
- wire \t$2367 ;
- wire \t$2368 ;
- wire \t$2369 ;
- wire \t$2370 ;
- wire \t$2371 ;
- wire \t$2372 ;
- wire \t$2373 ;
- wire \t$2374 ;
- wire \t$2375 ;
- wire \t$2376 ;
- wire \t$2377 ;
- wire \t$2378 ;
- wire \t$2379 ;
- wire \t$2380 ;
- wire \t$2381 ;
- wire \t$2383 ;
- wire \t$2384 ;
- wire \t$2385 ;
- wire \t$2386 ;
- wire \t$2387 ;
- wire \t$2388 ;
- wire \t$2389 ;
- wire \t$2390 ;
- wire \t$2391 ;
- wire \t$2392 ;
- wire \t$2393 ;
- wire \t$2394 ;
- wire \t$2395 ;
- wire \t$2396 ;
- wire \t$2397 ;
- wire \t$2398 ;
- wire \t$2399 ;
- wire \t$2400 ;
- wire \t$2401 ;
- wire \t$2402 ;
- wire \t$2403 ;
- wire \t$2404 ;
- wire \t$2405 ;
- wire \t$2406 ;
- wire \t$2407 ;
- wire \t$2408 ;
- wire \t$2409 ;
- wire \t$2410 ;
- wire \t$2411 ;
- wire \t$2412 ;
- wire \t$2413 ;
- wire \t$2414 ;
- wire \t$2415 ;
- wire \t$2417 ;
- wire \t$2418 ;
- wire \t$2419 ;
- wire \t$2420 ;
- wire \t$2421 ;
- wire \t$2422 ;
- wire \t$2423 ;
- wire \t$2424 ;
- wire \t$2425 ;
- wire \t$2426 ;
- wire \t$2427 ;
- wire \t$2428 ;
- wire \t$2429 ;
- wire \t$2430 ;
- wire \t$2431 ;
- wire \t$2432 ;
- wire \t$2433 ;
- wire \t$2434 ;
- wire \t$2435 ;
- wire \t$2436 ;
- wire \t$2437 ;
- wire \t$2438 ;
- wire \t$2439 ;
- wire \t$2440 ;
- wire \t$2441 ;
- wire \t$2442 ;
- wire \t$2443 ;
- wire \t$2444 ;
- wire \t$2445 ;
- wire \t$2446 ;
- wire \t$2447 ;
- wire \t$2448 ;
- wire \t$2449 ;
- wire \t$2451 ;
- wire \t$2452 ;
- wire \t$2453 ;
- wire \t$2454 ;
- wire \t$2455 ;
- wire \t$2456 ;
- wire \t$2457 ;
- wire \t$2458 ;
- wire \t$2459 ;
- wire \t$2460 ;
- wire \t$2461 ;
- wire \t$2462 ;
- wire \t$2463 ;
- wire \t$2464 ;
- wire \t$2465 ;
- wire \t$2466 ;
- wire \t$2467 ;
- wire \t$2468 ;
- wire \t$2469 ;
- wire \t$2470 ;
- wire \t$2471 ;
- wire \t$2472 ;
- wire \t$2473 ;
- wire \t$2474 ;
- wire \t$2475 ;
- wire \t$2476 ;
- wire \t$2477 ;
- wire \t$2478 ;
- wire \t$2479 ;
- wire \t$2480 ;
- wire \t$2481 ;
- wire \t$2482 ;
- wire \t$2483 ;
- wire \t$2485 ;
- wire \t$2486 ;
- wire \t$2487 ;
- wire \t$2488 ;
- wire \t$2489 ;
- wire \t$2490 ;
- wire \t$2491 ;
- wire \t$2492 ;
- wire \t$2493 ;
- wire \t$2494 ;
- wire \t$2495 ;
- wire \t$2496 ;
- wire \t$2497 ;
- wire \t$2498 ;
- wire \t$2499 ;
- wire \t$2500 ;
- wire \t$2501 ;
- wire \t$2502 ;
- wire \t$2503 ;
- wire \t$2504 ;
- wire \t$2505 ;
- wire \t$2506 ;
- wire \t$2507 ;
- wire \t$2508 ;
- wire \t$2509 ;
- wire \t$2510 ;
- wire \t$2511 ;
- wire \t$2512 ;
- wire \t$2513 ;
- wire \t$2514 ;
- wire \t$2515 ;
- wire \t$2516 ;
- wire \t$2517 ;
- wire \t$2519 ;
- wire \t$2520 ;
- wire \t$2521 ;
- wire \t$2522 ;
- wire \t$2523 ;
- wire \t$2524 ;
- wire \t$2525 ;
- wire \t$2526 ;
- wire \t$2527 ;
- wire \t$2528 ;
- wire \t$2529 ;
- wire \t$2530 ;
- wire \t$2531 ;
- wire \t$2532 ;
- wire \t$2533 ;
- wire \t$2534 ;
- wire \t$2535 ;
- wire \t$2536 ;
- wire \t$2537 ;
- wire \t$2538 ;
- wire \t$2539 ;
- wire \t$2540 ;
- wire \t$2541 ;
- wire \t$2542 ;
- wire \t$2543 ;
- wire \t$2544 ;
- wire \t$2545 ;
- wire \t$2546 ;
- wire \t$2547 ;
- wire \t$2548 ;
- wire \t$2549 ;
- wire \t$2550 ;
- wire \t$2551 ;
- always @(posedge clk)
- a_registered <= a;
- always @(posedge clk)
- b_registered <= b;
- always @(posedge clk)
- pp_row0_0 <= booth_b0_m0;
- always @(posedge clk)
- pp_row0_1 <= a_registered[1];
- always @(posedge clk)
- pp_row1_0 <= booth_b0_m1;
- always @(posedge clk)
- pp_row2_0 <= booth_b0_m2;
- always @(posedge clk)
- pp_row2_1 <= booth_b2_m0;
- always @(posedge clk)
- pp_row2_2 <= a_registered[3];
- always @(posedge clk)
- pp_row3_0 <= booth_b0_m3;
- always @(posedge clk)
- pp_row3_1 <= booth_b2_m1;
- always @(posedge clk)
- pp_row4_0 <= booth_b0_m4;
- always @(posedge clk)
- pp_row4_1 <= booth_b2_m2;
- always @(posedge clk)
- pp_row4_2 <= booth_b4_m0;
- always @(posedge clk)
- pp_row4_3 <= a_registered[5];
- always @(posedge clk)
- pp_row5_0 <= booth_b0_m5;
- always @(posedge clk)
- pp_row5_1 <= booth_b2_m3;
- always @(posedge clk)
- pp_row5_2 <= booth_b4_m1;
- always @(posedge clk)
- pp_row6_0 <= booth_b0_m6;
- always @(posedge clk)
- pp_row6_1 <= booth_b2_m4;
- always @(posedge clk)
- pp_row6_2 <= booth_b4_m2;
- always @(posedge clk)
- pp_row6_3 <= booth_b6_m0;
- always @(posedge clk)
- pp_row6_4 <= a_registered[7];
- always @(posedge clk)
- pp_row7_0 <= booth_b0_m7;
- always @(posedge clk)
- pp_row7_1 <= booth_b2_m5;
- always @(posedge clk)
- pp_row7_2 <= booth_b4_m3;
- always @(posedge clk)
- pp_row7_3 <= booth_b6_m1;
- always @(posedge clk)
- pp_row8_0 <= booth_b0_m8;
- always @(posedge clk)
- pp_row8_1 <= booth_b2_m6;
- always @(posedge clk)
- pp_row8_2 <= booth_b4_m4;
- always @(posedge clk)
- pp_row8_3 <= booth_b6_m2;
- always @(posedge clk)
- pp_row8_4 <= booth_b8_m0;
- always @(posedge clk)
- pp_row8_5 <= a_registered[9];
- always @(posedge clk)
- pp_row9_0 <= booth_b0_m9;
- always @(posedge clk)
- pp_row9_1 <= booth_b2_m7;
- always @(posedge clk)
- pp_row9_2 <= booth_b4_m5;
- always @(posedge clk)
- pp_row9_3 <= booth_b6_m3;
- always @(posedge clk)
- pp_row9_4 <= booth_b8_m1;
- always @(posedge clk)
- pp_row10_0 <= booth_b0_m10;
- always @(posedge clk)
- pp_row10_1 <= booth_b2_m8;
- always @(posedge clk)
- pp_row10_2 <= booth_b4_m6;
- always @(posedge clk)
- pp_row10_3 <= booth_b6_m4;
- always @(posedge clk)
- pp_row10_4 <= booth_b8_m2;
- always @(posedge clk)
- pp_row10_5 <= booth_b10_m0;
- always @(posedge clk)
- pp_row10_6 <= a_registered[11];
- always @(posedge clk)
- pp_row11_0 <= booth_b0_m11;
- always @(posedge clk)
- pp_row11_1 <= booth_b2_m9;
- always @(posedge clk)
- pp_row11_2 <= booth_b4_m7;
- always @(posedge clk)
- pp_row11_3 <= booth_b6_m5;
- always @(posedge clk)
- pp_row11_4 <= booth_b8_m3;
- always @(posedge clk)
- pp_row11_5 <= booth_b10_m1;
- always @(posedge clk)
- pp_row12_0 <= booth_b0_m12;
- always @(posedge clk)
- pp_row12_1 <= booth_b2_m10;
- always @(posedge clk)
- pp_row12_2 <= booth_b4_m8;
- always @(posedge clk)
- pp_row12_3 <= booth_b6_m6;
- always @(posedge clk)
- pp_row12_4 <= booth_b8_m4;
- always @(posedge clk)
- pp_row12_5 <= booth_b10_m2;
- always @(posedge clk)
- pp_row12_6 <= booth_b12_m0;
- always @(posedge clk)
- pp_row12_7 <= a_registered[13];
- always @(posedge clk)
- pp_row13_0 <= booth_b0_m13;
- always @(posedge clk)
- pp_row13_1 <= booth_b2_m11;
- always @(posedge clk)
- pp_row13_2 <= booth_b4_m9;
- always @(posedge clk)
- pp_row13_3 <= booth_b6_m7;
- always @(posedge clk)
- pp_row13_4 <= booth_b8_m5;
- always @(posedge clk)
- pp_row13_5 <= booth_b10_m3;
- always @(posedge clk)
- pp_row13_6 <= booth_b12_m1;
- always @(posedge clk)
- pp_row14_0 <= booth_b0_m14;
- always @(posedge clk)
- pp_row14_1 <= booth_b2_m12;
- always @(posedge clk)
- pp_row14_2 <= booth_b4_m10;
- always @(posedge clk)
- pp_row14_3 <= booth_b6_m8;
- always @(posedge clk)
- pp_row14_4 <= booth_b8_m6;
- always @(posedge clk)
- pp_row14_5 <= booth_b10_m4;
- always @(posedge clk)
- pp_row14_6 <= booth_b12_m2;
- always @(posedge clk)
- pp_row14_7 <= booth_b14_m0;
- always @(posedge clk)
- pp_row14_8 <= a_registered[15];
- always @(posedge clk)
- pp_row15_0 <= booth_b0_m15;
- always @(posedge clk)
- pp_row15_1 <= booth_b2_m13;
- always @(posedge clk)
- pp_row15_2 <= booth_b4_m11;
- always @(posedge clk)
- pp_row15_3 <= booth_b6_m9;
- always @(posedge clk)
- pp_row15_4 <= booth_b8_m7;
- always @(posedge clk)
- pp_row15_5 <= booth_b10_m5;
- always @(posedge clk)
- pp_row15_6 <= booth_b12_m3;
- always @(posedge clk)
- pp_row15_7 <= booth_b14_m1;
- always @(posedge clk)
- pp_row16_0 <= booth_b0_m16;
- always @(posedge clk)
- pp_row16_1 <= booth_b2_m14;
- always @(posedge clk)
- pp_row16_2 <= booth_b4_m12;
- always @(posedge clk)
- pp_row16_3 <= booth_b6_m10;
- always @(posedge clk)
- pp_row16_4 <= booth_b8_m8;
- always @(posedge clk)
- pp_row16_5 <= booth_b10_m6;
- always @(posedge clk)
- pp_row16_6 <= booth_b12_m4;
- always @(posedge clk)
- pp_row16_7 <= booth_b14_m2;
- always @(posedge clk)
- pp_row16_8 <= booth_b16_m0;
- always @(posedge clk)
- pp_row16_9 <= a_registered[17];
- always @(posedge clk)
- pp_row17_0 <= booth_b0_m17;
- always @(posedge clk)
- pp_row17_1 <= booth_b2_m15;
- always @(posedge clk)
- pp_row17_2 <= booth_b4_m13;
- always @(posedge clk)
- pp_row17_3 <= booth_b6_m11;
- always @(posedge clk)
- pp_row17_4 <= booth_b8_m9;
- always @(posedge clk)
- pp_row17_5 <= booth_b10_m7;
- always @(posedge clk)
- pp_row17_6 <= booth_b12_m5;
- always @(posedge clk)
- pp_row17_7 <= booth_b14_m3;
- always @(posedge clk)
- pp_row17_8 <= booth_b16_m1;
- always @(posedge clk)
- pp_row18_0 <= booth_b0_m18;
- always @(posedge clk)
- pp_row18_1 <= booth_b2_m16;
- always @(posedge clk)
- pp_row18_2 <= booth_b4_m14;
- always @(posedge clk)
- pp_row18_3 <= booth_b6_m12;
- always @(posedge clk)
- pp_row18_4 <= booth_b8_m10;
- always @(posedge clk)
- pp_row18_5 <= booth_b10_m8;
- always @(posedge clk)
- pp_row18_6 <= booth_b12_m6;
- always @(posedge clk)
- pp_row18_7 <= booth_b14_m4;
- always @(posedge clk)
- pp_row18_8 <= booth_b16_m2;
- always @(posedge clk)
- pp_row18_9 <= booth_b18_m0;
- always @(posedge clk)
- pp_row18_10 <= a_registered[19];
- always @(posedge clk)
- pp_row19_0 <= booth_b0_m19;
- always @(posedge clk)
- pp_row19_1 <= booth_b2_m17;
- always @(posedge clk)
- pp_row19_2 <= booth_b4_m15;
- always @(posedge clk)
- pp_row19_3 <= booth_b6_m13;
- always @(posedge clk)
- pp_row19_4 <= booth_b8_m11;
- always @(posedge clk)
- pp_row19_5 <= booth_b10_m9;
- always @(posedge clk)
- pp_row19_6 <= booth_b12_m7;
- always @(posedge clk)
- pp_row19_7 <= booth_b14_m5;
- always @(posedge clk)
- pp_row19_8 <= booth_b16_m3;
- always @(posedge clk)
- pp_row19_9 <= booth_b18_m1;
- always @(posedge clk)
- pp_row20_0 <= booth_b0_m20;
- always @(posedge clk)
- pp_row20_1 <= booth_b2_m18;
- always @(posedge clk)
- pp_row20_2 <= booth_b4_m16;
- always @(posedge clk)
- pp_row20_3 <= booth_b6_m14;
- always @(posedge clk)
- pp_row20_4 <= booth_b8_m12;
- always @(posedge clk)
- pp_row20_5 <= booth_b10_m10;
- always @(posedge clk)
- pp_row20_6 <= booth_b12_m8;
- always @(posedge clk)
- pp_row20_7 <= booth_b14_m6;
- always @(posedge clk)
- pp_row20_8 <= booth_b16_m4;
- always @(posedge clk)
- pp_row20_9 <= booth_b18_m2;
- always @(posedge clk)
- pp_row20_10 <= booth_b20_m0;
- always @(posedge clk)
- pp_row20_11 <= a_registered[21];
- always @(posedge clk)
- pp_row21_0 <= booth_b0_m21;
- always @(posedge clk)
- pp_row21_1 <= booth_b2_m19;
- always @(posedge clk)
- pp_row21_2 <= booth_b4_m17;
- always @(posedge clk)
- pp_row21_3 <= booth_b6_m15;
- always @(posedge clk)
- pp_row21_4 <= booth_b8_m13;
- always @(posedge clk)
- pp_row21_5 <= booth_b10_m11;
- always @(posedge clk)
- pp_row21_6 <= booth_b12_m9;
- always @(posedge clk)
- pp_row21_7 <= booth_b14_m7;
- always @(posedge clk)
- pp_row21_8 <= booth_b16_m5;
- always @(posedge clk)
- pp_row21_9 <= booth_b18_m3;
- always @(posedge clk)
- pp_row21_10 <= booth_b20_m1;
- always @(posedge clk)
- pp_row22_0 <= booth_b0_m22;
- always @(posedge clk)
- pp_row22_1 <= booth_b2_m20;
- always @(posedge clk)
- pp_row22_2 <= booth_b4_m18;
- always @(posedge clk)
- pp_row22_3 <= booth_b6_m16;
- always @(posedge clk)
- pp_row22_4 <= booth_b8_m14;
- always @(posedge clk)
- pp_row22_5 <= booth_b10_m12;
- always @(posedge clk)
- pp_row22_6 <= booth_b12_m10;
- always @(posedge clk)
- pp_row22_7 <= booth_b14_m8;
- always @(posedge clk)
- pp_row22_8 <= booth_b16_m6;
- always @(posedge clk)
- pp_row22_9 <= booth_b18_m4;
- always @(posedge clk)
- pp_row22_10 <= booth_b20_m2;
- always @(posedge clk)
- pp_row22_11 <= booth_b22_m0;
- always @(posedge clk)
- pp_row22_12 <= a_registered[23];
- always @(posedge clk)
- pp_row23_0 <= booth_b0_m23;
- always @(posedge clk)
- pp_row23_1 <= booth_b2_m21;
- always @(posedge clk)
- pp_row23_2 <= booth_b4_m19;
- always @(posedge clk)
- pp_row23_3 <= booth_b6_m17;
- always @(posedge clk)
- pp_row23_4 <= booth_b8_m15;
- always @(posedge clk)
- pp_row23_5 <= booth_b10_m13;
- always @(posedge clk)
- pp_row23_6 <= booth_b12_m11;
- always @(posedge clk)
- pp_row23_7 <= booth_b14_m9;
- always @(posedge clk)
- pp_row23_8 <= booth_b16_m7;
- always @(posedge clk)
- pp_row23_9 <= booth_b18_m5;
- always @(posedge clk)
- pp_row23_10 <= booth_b20_m3;
- always @(posedge clk)
- pp_row23_11 <= booth_b22_m1;
- always @(posedge clk)
- pp_row24_0 <= booth_b0_m24;
- always @(posedge clk)
- pp_row24_1 <= booth_b2_m22;
- always @(posedge clk)
- pp_row24_2 <= booth_b4_m20;
- always @(posedge clk)
- pp_row24_3 <= booth_b6_m18;
- always @(posedge clk)
- pp_row24_4 <= booth_b8_m16;
- always @(posedge clk)
- pp_row24_5 <= booth_b10_m14;
- always @(posedge clk)
- pp_row24_6 <= booth_b12_m12;
- always @(posedge clk)
- pp_row24_7 <= booth_b14_m10;
- always @(posedge clk)
- pp_row24_8 <= booth_b16_m8;
- always @(posedge clk)
- pp_row24_9 <= booth_b18_m6;
- always @(posedge clk)
- pp_row24_10 <= booth_b20_m4;
- always @(posedge clk)
- pp_row24_11 <= booth_b22_m2;
- always @(posedge clk)
- pp_row24_12 <= booth_b24_m0;
- always @(posedge clk)
- pp_row24_13 <= a_registered[25];
- always @(posedge clk)
- pp_row25_0 <= booth_b0_m25;
- always @(posedge clk)
- pp_row25_1 <= booth_b2_m23;
- always @(posedge clk)
- pp_row25_2 <= booth_b4_m21;
- always @(posedge clk)
- pp_row25_3 <= booth_b6_m19;
- always @(posedge clk)
- pp_row25_4 <= booth_b8_m17;
- always @(posedge clk)
- pp_row25_5 <= booth_b10_m15;
- always @(posedge clk)
- pp_row25_6 <= booth_b12_m13;
- always @(posedge clk)
- pp_row25_7 <= booth_b14_m11;
- always @(posedge clk)
- pp_row25_8 <= booth_b16_m9;
- always @(posedge clk)
- pp_row25_9 <= booth_b18_m7;
- always @(posedge clk)
- pp_row25_10 <= booth_b20_m5;
- always @(posedge clk)
- pp_row25_11 <= booth_b22_m3;
- always @(posedge clk)
- pp_row25_12 <= booth_b24_m1;
- always @(posedge clk)
- pp_row26_0 <= booth_b0_m26;
- always @(posedge clk)
- pp_row26_1 <= booth_b2_m24;
- always @(posedge clk)
- pp_row26_2 <= booth_b4_m22;
- always @(posedge clk)
- pp_row26_3 <= booth_b6_m20;
- always @(posedge clk)
- pp_row26_4 <= booth_b8_m18;
- always @(posedge clk)
- pp_row26_5 <= booth_b10_m16;
- always @(posedge clk)
- pp_row26_6 <= booth_b12_m14;
- always @(posedge clk)
- pp_row26_7 <= booth_b14_m12;
- always @(posedge clk)
- pp_row26_8 <= booth_b16_m10;
- always @(posedge clk)
- pp_row26_9 <= booth_b18_m8;
- always @(posedge clk)
- pp_row26_10 <= booth_b20_m6;
- always @(posedge clk)
- pp_row26_11 <= booth_b22_m4;
- always @(posedge clk)
- pp_row26_12 <= booth_b24_m2;
- always @(posedge clk)
- pp_row26_13 <= booth_b26_m0;
- always @(posedge clk)
- pp_row26_14 <= a_registered[27];
- always @(posedge clk)
- pp_row27_0 <= booth_b0_m27;
- always @(posedge clk)
- pp_row27_1 <= booth_b2_m25;
- always @(posedge clk)
- pp_row27_2 <= booth_b4_m23;
- always @(posedge clk)
- pp_row27_3 <= booth_b6_m21;
- always @(posedge clk)
- pp_row27_4 <= booth_b8_m19;
- always @(posedge clk)
- pp_row27_5 <= booth_b10_m17;
- always @(posedge clk)
- pp_row27_6 <= booth_b12_m15;
- always @(posedge clk)
- pp_row27_7 <= booth_b14_m13;
- always @(posedge clk)
- pp_row27_8 <= booth_b16_m11;
- always @(posedge clk)
- pp_row27_9 <= booth_b18_m9;
- always @(posedge clk)
- pp_row27_10 <= booth_b20_m7;
- always @(posedge clk)
- pp_row27_11 <= booth_b22_m5;
- always @(posedge clk)
- pp_row27_12 <= booth_b24_m3;
- always @(posedge clk)
- pp_row27_13 <= booth_b26_m1;
- always @(posedge clk)
- pp_row28_0 <= booth_b0_m28;
- always @(posedge clk)
- pp_row28_1 <= booth_b2_m26;
- always @(posedge clk)
- pp_row28_2 <= booth_b4_m24;
- always @(posedge clk)
- pp_row28_3 <= booth_b6_m22;
- always @(posedge clk)
- pp_row28_4 <= booth_b8_m20;
- always @(posedge clk)
- pp_row28_5 <= booth_b10_m18;
- always @(posedge clk)
- pp_row28_6 <= booth_b12_m16;
- always @(posedge clk)
- pp_row28_7 <= booth_b14_m14;
- always @(posedge clk)
- pp_row28_8 <= booth_b16_m12;
- always @(posedge clk)
- pp_row28_9 <= booth_b18_m10;
- always @(posedge clk)
- pp_row28_10 <= booth_b20_m8;
- always @(posedge clk)
- pp_row28_11 <= booth_b22_m6;
- always @(posedge clk)
- pp_row28_12 <= booth_b24_m4;
- always @(posedge clk)
- pp_row28_13 <= booth_b26_m2;
- always @(posedge clk)
- pp_row28_14 <= booth_b28_m0;
- always @(posedge clk)
- pp_row28_15 <= a_registered[29];
- always @(posedge clk)
- pp_row29_0 <= booth_b0_m29;
- always @(posedge clk)
- pp_row29_1 <= booth_b2_m27;
- always @(posedge clk)
- pp_row29_2 <= booth_b4_m25;
- always @(posedge clk)
- pp_row29_3 <= booth_b6_m23;
- always @(posedge clk)
- pp_row29_4 <= booth_b8_m21;
- always @(posedge clk)
- pp_row29_5 <= booth_b10_m19;
- always @(posedge clk)
- pp_row29_6 <= booth_b12_m17;
- always @(posedge clk)
- pp_row29_7 <= booth_b14_m15;
- always @(posedge clk)
- pp_row29_8 <= booth_b16_m13;
- always @(posedge clk)
- pp_row29_9 <= booth_b18_m11;
- always @(posedge clk)
- pp_row29_10 <= booth_b20_m9;
- always @(posedge clk)
- pp_row29_11 <= booth_b22_m7;
- always @(posedge clk)
- pp_row29_12 <= booth_b24_m5;
- always @(posedge clk)
- pp_row29_13 <= booth_b26_m3;
- always @(posedge clk)
- pp_row29_14 <= booth_b28_m1;
- always @(posedge clk)
- pp_row30_0 <= booth_b0_m30;
- always @(posedge clk)
- pp_row30_1 <= booth_b2_m28;
- always @(posedge clk)
- pp_row30_2 <= booth_b4_m26;
- always @(posedge clk)
- pp_row30_3 <= booth_b6_m24;
- always @(posedge clk)
- pp_row30_4 <= booth_b8_m22;
- always @(posedge clk)
- pp_row30_5 <= booth_b10_m20;
- always @(posedge clk)
- pp_row30_6 <= booth_b12_m18;
- always @(posedge clk)
- pp_row30_7 <= booth_b14_m16;
- always @(posedge clk)
- pp_row30_8 <= booth_b16_m14;
- always @(posedge clk)
- pp_row30_9 <= booth_b18_m12;
- always @(posedge clk)
- pp_row30_10 <= booth_b20_m10;
- always @(posedge clk)
- pp_row30_11 <= booth_b22_m8;
- always @(posedge clk)
- pp_row30_12 <= booth_b24_m6;
- always @(posedge clk)
- pp_row30_13 <= booth_b26_m4;
- always @(posedge clk)
- pp_row30_14 <= booth_b28_m2;
- always @(posedge clk)
- pp_row30_15 <= booth_b30_m0;
- always @(posedge clk)
- pp_row30_16 <= a_registered[31];
- always @(posedge clk)
- pp_row31_0 <= booth_b0_m31;
- always @(posedge clk)
- pp_row31_1 <= booth_b2_m29;
- always @(posedge clk)
- pp_row31_2 <= booth_b4_m27;
- always @(posedge clk)
- pp_row31_3 <= booth_b6_m25;
- always @(posedge clk)
- pp_row31_4 <= booth_b8_m23;
- always @(posedge clk)
- pp_row31_5 <= booth_b10_m21;
- always @(posedge clk)
- pp_row31_6 <= booth_b12_m19;
- always @(posedge clk)
- pp_row31_7 <= booth_b14_m17;
- always @(posedge clk)
- pp_row31_8 <= booth_b16_m15;
- always @(posedge clk)
- pp_row31_9 <= booth_b18_m13;
- always @(posedge clk)
- pp_row31_10 <= booth_b20_m11;
- always @(posedge clk)
- pp_row31_11 <= booth_b22_m9;
- always @(posedge clk)
- pp_row31_12 <= booth_b24_m7;
- always @(posedge clk)
- pp_row31_13 <= booth_b26_m5;
- always @(posedge clk)
- pp_row31_14 <= booth_b28_m3;
- always @(posedge clk)
- pp_row31_15 <= booth_b30_m1;
- always @(posedge clk)
- pp_row32_0 <= booth_b0_m32;
- always @(posedge clk)
- pp_row32_1 <= booth_b2_m30;
- always @(posedge clk)
- pp_row32_2 <= booth_b4_m28;
- always @(posedge clk)
- pp_row32_3 <= booth_b6_m26;
- always @(posedge clk)
- pp_row32_4 <= booth_b8_m24;
- always @(posedge clk)
- pp_row32_5 <= booth_b10_m22;
- always @(posedge clk)
- pp_row32_6 <= booth_b12_m20;
- always @(posedge clk)
- pp_row32_7 <= booth_b14_m18;
- always @(posedge clk)
- pp_row32_8 <= booth_b16_m16;
- always @(posedge clk)
- pp_row32_9 <= booth_b18_m14;
- always @(posedge clk)
- pp_row32_10 <= booth_b20_m12;
- always @(posedge clk)
- pp_row32_11 <= booth_b22_m10;
- always @(posedge clk)
- pp_row32_12 <= booth_b24_m8;
- always @(posedge clk)
- pp_row32_13 <= booth_b26_m6;
- always @(posedge clk)
- pp_row32_14 <= booth_b28_m4;
- always @(posedge clk)
- pp_row32_15 <= booth_b30_m2;
- always @(posedge clk)
- pp_row32_16 <= booth_b32_m0;
- always @(posedge clk)
- pp_row33_0 <= a_registered[1];
- always @(posedge clk)
- pp_row33_1 <= booth_b2_m31;
- always @(posedge clk)
- pp_row33_2 <= booth_b4_m29;
- always @(posedge clk)
- pp_row33_3 <= booth_b6_m27;
- always @(posedge clk)
- pp_row33_4 <= booth_b8_m25;
- always @(posedge clk)
- pp_row33_5 <= booth_b10_m23;
- always @(posedge clk)
- pp_row33_6 <= booth_b12_m21;
- always @(posedge clk)
- pp_row33_7 <= booth_b14_m19;
- always @(posedge clk)
- pp_row33_8 <= booth_b16_m17;
- always @(posedge clk)
- pp_row33_9 <= booth_b18_m15;
- always @(posedge clk)
- pp_row33_10 <= booth_b20_m13;
- always @(posedge clk)
- pp_row33_11 <= booth_b22_m11;
- always @(posedge clk)
- pp_row33_12 <= booth_b24_m9;
- always @(posedge clk)
- pp_row33_13 <= booth_b26_m7;
- always @(posedge clk)
- pp_row33_14 <= booth_b28_m5;
- always @(posedge clk)
- pp_row33_15 <= booth_b30_m3;
- always @(posedge clk)
- pp_row33_16 <= booth_b32_m1;
- always @(posedge clk)
- pp_row34_0 <= a_registered[1];
- always @(posedge clk)
- pp_row34_1 <= booth_b2_m32;
- always @(posedge clk)
- pp_row34_2 <= booth_b4_m30;
- always @(posedge clk)
- pp_row34_3 <= booth_b6_m28;
- always @(posedge clk)
- pp_row34_4 <= booth_b8_m26;
- always @(posedge clk)
- pp_row34_5 <= booth_b10_m24;
- always @(posedge clk)
- pp_row34_6 <= booth_b12_m22;
- always @(posedge clk)
- pp_row34_7 <= booth_b14_m20;
- always @(posedge clk)
- pp_row34_8 <= booth_b16_m18;
- always @(posedge clk)
- pp_row34_9 <= booth_b18_m16;
- always @(posedge clk)
- pp_row34_10 <= booth_b20_m14;
- always @(posedge clk)
- pp_row34_11 <= booth_b22_m12;
- always @(posedge clk)
- pp_row34_12 <= booth_b24_m10;
- always @(posedge clk)
- pp_row34_13 <= booth_b26_m8;
- always @(posedge clk)
- pp_row34_14 <= booth_b28_m6;
- always @(posedge clk)
- pp_row34_15 <= booth_b30_m4;
- always @(posedge clk)
- pp_row34_16 <= booth_b32_m2;
- always @(posedge clk)
- pp_row35_0 <= notsign;
- always @(posedge clk)
- pp_row35_1 <= \notsign$686 ;
- always @(posedge clk)
- pp_row35_2 <= booth_b4_m31;
- always @(posedge clk)
- pp_row35_3 <= booth_b6_m29;
- always @(posedge clk)
- pp_row35_4 <= booth_b8_m27;
- always @(posedge clk)
- pp_row35_5 <= booth_b10_m25;
- always @(posedge clk)
- pp_row35_6 <= booth_b12_m23;
- always @(posedge clk)
- pp_row35_7 <= booth_b14_m21;
- always @(posedge clk)
- pp_row35_8 <= booth_b16_m19;
- always @(posedge clk)
- pp_row35_9 <= booth_b18_m17;
- always @(posedge clk)
- pp_row35_10 <= booth_b20_m15;
- always @(posedge clk)
- pp_row35_11 <= booth_b22_m13;
- always @(posedge clk)
- pp_row35_12 <= booth_b24_m11;
- always @(posedge clk)
- pp_row35_13 <= booth_b26_m9;
- always @(posedge clk)
- pp_row35_14 <= booth_b28_m7;
- always @(posedge clk)
- pp_row35_15 <= booth_b30_m5;
- always @(posedge clk)
- pp_row35_16 <= booth_b32_m3;
- always @(posedge clk)
- pp_row36_1 <= booth_b4_m32;
- always @(posedge clk)
- pp_row36_2 <= booth_b6_m30;
- always @(posedge clk)
- pp_row36_3 <= booth_b8_m28;
- always @(posedge clk)
- pp_row36_4 <= booth_b10_m26;
- always @(posedge clk)
- pp_row36_5 <= booth_b12_m24;
- always @(posedge clk)
- pp_row36_6 <= booth_b14_m22;
- always @(posedge clk)
- pp_row36_7 <= booth_b16_m20;
- always @(posedge clk)
- pp_row36_8 <= booth_b18_m18;
- always @(posedge clk)
- pp_row36_9 <= booth_b20_m16;
- always @(posedge clk)
- pp_row36_10 <= booth_b22_m14;
- always @(posedge clk)
- pp_row36_11 <= booth_b24_m12;
- always @(posedge clk)
- pp_row36_12 <= booth_b26_m10;
- always @(posedge clk)
- pp_row36_13 <= booth_b28_m8;
- always @(posedge clk)
- pp_row36_14 <= booth_b30_m6;
- always @(posedge clk)
- pp_row36_15 <= booth_b32_m4;
- always @(posedge clk)
- pp_row37_0 <= \notsign$748 ;
- always @(posedge clk)
- pp_row37_1 <= booth_b6_m31;
- always @(posedge clk)
- pp_row37_2 <= booth_b8_m29;
- always @(posedge clk)
- pp_row37_3 <= booth_b10_m27;
- always @(posedge clk)
- pp_row37_4 <= booth_b12_m25;
- always @(posedge clk)
- pp_row37_5 <= booth_b14_m23;
- always @(posedge clk)
- pp_row37_6 <= booth_b16_m21;
- always @(posedge clk)
- pp_row37_7 <= booth_b18_m19;
- always @(posedge clk)
- pp_row37_8 <= booth_b20_m17;
- always @(posedge clk)
- pp_row37_9 <= booth_b22_m15;
- always @(posedge clk)
- pp_row37_10 <= booth_b24_m13;
- always @(posedge clk)
- pp_row37_11 <= booth_b26_m11;
- always @(posedge clk)
- pp_row37_12 <= booth_b28_m9;
- always @(posedge clk)
- pp_row37_13 <= booth_b30_m7;
- always @(posedge clk)
- pp_row37_14 <= booth_b32_m5;
- always @(posedge clk)
- pp_row38_1 <= booth_b6_m32;
- always @(posedge clk)
- pp_row38_2 <= booth_b8_m30;
- always @(posedge clk)
- pp_row38_3 <= booth_b10_m28;
- always @(posedge clk)
- pp_row38_4 <= booth_b12_m26;
- always @(posedge clk)
- pp_row38_5 <= booth_b14_m24;
- always @(posedge clk)
- pp_row38_6 <= booth_b16_m22;
- always @(posedge clk)
- pp_row38_7 <= booth_b18_m20;
- always @(posedge clk)
- pp_row38_8 <= booth_b20_m18;
- always @(posedge clk)
- pp_row38_9 <= booth_b22_m16;
- always @(posedge clk)
- pp_row38_10 <= booth_b24_m14;
- always @(posedge clk)
- pp_row38_11 <= booth_b26_m12;
- always @(posedge clk)
- pp_row38_12 <= booth_b28_m10;
- always @(posedge clk)
- pp_row38_13 <= booth_b30_m8;
- always @(posedge clk)
- pp_row38_14 <= booth_b32_m6;
- always @(posedge clk)
- pp_row39_0 <= \notsign$806 ;
- always @(posedge clk)
- pp_row39_1 <= booth_b8_m31;
- always @(posedge clk)
- pp_row39_2 <= booth_b10_m29;
- always @(posedge clk)
- pp_row39_3 <= booth_b12_m27;
- always @(posedge clk)
- pp_row39_4 <= booth_b14_m25;
- always @(posedge clk)
- pp_row39_5 <= booth_b16_m23;
- always @(posedge clk)
- pp_row39_6 <= booth_b18_m21;
- always @(posedge clk)
- pp_row39_7 <= booth_b20_m19;
- always @(posedge clk)
- pp_row39_8 <= booth_b22_m17;
- always @(posedge clk)
- pp_row39_9 <= booth_b24_m15;
- always @(posedge clk)
- pp_row39_10 <= booth_b26_m13;
- always @(posedge clk)
- pp_row39_11 <= booth_b28_m11;
- always @(posedge clk)
- pp_row39_12 <= booth_b30_m9;
- always @(posedge clk)
- pp_row39_13 <= booth_b32_m7;
- always @(posedge clk)
- pp_row40_1 <= booth_b8_m32;
- always @(posedge clk)
- pp_row40_2 <= booth_b10_m30;
- always @(posedge clk)
- pp_row40_3 <= booth_b12_m28;
- always @(posedge clk)
- pp_row40_4 <= booth_b14_m26;
- always @(posedge clk)
- pp_row40_5 <= booth_b16_m24;
- always @(posedge clk)
- pp_row40_6 <= booth_b18_m22;
- always @(posedge clk)
- pp_row40_7 <= booth_b20_m20;
- always @(posedge clk)
- pp_row40_8 <= booth_b22_m18;
- always @(posedge clk)
- pp_row40_9 <= booth_b24_m16;
- always @(posedge clk)
- pp_row40_10 <= booth_b26_m14;
- always @(posedge clk)
- pp_row40_11 <= booth_b28_m12;
- always @(posedge clk)
- pp_row40_12 <= booth_b30_m10;
- always @(posedge clk)
- pp_row40_13 <= booth_b32_m8;
- always @(posedge clk)
- pp_row41_0 <= \notsign$860 ;
- always @(posedge clk)
- pp_row41_1 <= booth_b10_m31;
- always @(posedge clk)
- pp_row41_2 <= booth_b12_m29;
- always @(posedge clk)
- pp_row41_3 <= booth_b14_m27;
- always @(posedge clk)
- pp_row41_4 <= booth_b16_m25;
- always @(posedge clk)
- pp_row41_5 <= booth_b18_m23;
- always @(posedge clk)
- pp_row41_6 <= booth_b20_m21;
- always @(posedge clk)
- pp_row41_7 <= booth_b22_m19;
- always @(posedge clk)
- pp_row41_8 <= booth_b24_m17;
- always @(posedge clk)
- pp_row41_9 <= booth_b26_m15;
- always @(posedge clk)
- pp_row41_10 <= booth_b28_m13;
- always @(posedge clk)
- pp_row41_11 <= booth_b30_m11;
- always @(posedge clk)
- pp_row41_12 <= booth_b32_m9;
- always @(posedge clk)
- pp_row42_1 <= booth_b10_m32;
- always @(posedge clk)
- pp_row42_2 <= booth_b12_m30;
- always @(posedge clk)
- pp_row42_3 <= booth_b14_m28;
- always @(posedge clk)
- pp_row42_4 <= booth_b16_m26;
- always @(posedge clk)
- pp_row42_5 <= booth_b18_m24;
- always @(posedge clk)
- pp_row42_6 <= booth_b20_m22;
- always @(posedge clk)
- pp_row42_7 <= booth_b22_m20;
- always @(posedge clk)
- pp_row42_8 <= booth_b24_m18;
- always @(posedge clk)
- pp_row42_9 <= booth_b26_m16;
- always @(posedge clk)
- pp_row42_10 <= booth_b28_m14;
- always @(posedge clk)
- pp_row42_11 <= booth_b30_m12;
- always @(posedge clk)
- pp_row42_12 <= booth_b32_m10;
- always @(posedge clk)
- pp_row43_0 <= \notsign$910 ;
- always @(posedge clk)
- pp_row43_1 <= booth_b12_m31;
- always @(posedge clk)
- pp_row43_2 <= booth_b14_m29;
- always @(posedge clk)
- pp_row43_3 <= booth_b16_m27;
- always @(posedge clk)
- pp_row43_4 <= booth_b18_m25;
- always @(posedge clk)
- pp_row43_5 <= booth_b20_m23;
- always @(posedge clk)
- pp_row43_6 <= booth_b22_m21;
- always @(posedge clk)
- pp_row43_7 <= booth_b24_m19;
- always @(posedge clk)
- pp_row43_8 <= booth_b26_m17;
- always @(posedge clk)
- pp_row43_9 <= booth_b28_m15;
- always @(posedge clk)
- pp_row43_10 <= booth_b30_m13;
- always @(posedge clk)
- pp_row43_11 <= booth_b32_m11;
- always @(posedge clk)
- pp_row44_1 <= booth_b12_m32;
- always @(posedge clk)
- pp_row44_2 <= booth_b14_m30;
- always @(posedge clk)
- pp_row44_3 <= booth_b16_m28;
- always @(posedge clk)
- pp_row44_4 <= booth_b18_m26;
- always @(posedge clk)
- pp_row44_5 <= booth_b20_m24;
- always @(posedge clk)
- pp_row44_6 <= booth_b22_m22;
- always @(posedge clk)
- pp_row44_7 <= booth_b24_m20;
- always @(posedge clk)
- pp_row44_8 <= booth_b26_m18;
- always @(posedge clk)
- pp_row44_9 <= booth_b28_m16;
- always @(posedge clk)
- pp_row44_10 <= booth_b30_m14;
- always @(posedge clk)
- pp_row44_11 <= booth_b32_m12;
- always @(posedge clk)
- pp_row45_0 <= \notsign$956 ;
- always @(posedge clk)
- pp_row45_1 <= booth_b14_m31;
- always @(posedge clk)
- pp_row45_2 <= booth_b16_m29;
- always @(posedge clk)
- pp_row45_3 <= booth_b18_m27;
- always @(posedge clk)
- pp_row45_4 <= booth_b20_m25;
- always @(posedge clk)
- pp_row45_5 <= booth_b22_m23;
- always @(posedge clk)
- pp_row45_6 <= booth_b24_m21;
- always @(posedge clk)
- pp_row45_7 <= booth_b26_m19;
- always @(posedge clk)
- pp_row45_8 <= booth_b28_m17;
- always @(posedge clk)
- pp_row45_9 <= booth_b30_m15;
- always @(posedge clk)
- pp_row45_10 <= booth_b32_m13;
- always @(posedge clk)
- pp_row46_1 <= booth_b14_m32;
- always @(posedge clk)
- pp_row46_2 <= booth_b16_m30;
- always @(posedge clk)
- pp_row46_3 <= booth_b18_m28;
- always @(posedge clk)
- pp_row46_4 <= booth_b20_m26;
- always @(posedge clk)
- pp_row46_5 <= booth_b22_m24;
- always @(posedge clk)
- pp_row46_6 <= booth_b24_m22;
- always @(posedge clk)
- pp_row46_7 <= booth_b26_m20;
- always @(posedge clk)
- pp_row46_8 <= booth_b28_m18;
- always @(posedge clk)
- pp_row46_9 <= booth_b30_m16;
- always @(posedge clk)
- pp_row46_10 <= booth_b32_m14;
- always @(posedge clk)
- pp_row47_0 <= \notsign$998 ;
- always @(posedge clk)
- pp_row47_1 <= booth_b16_m31;
- always @(posedge clk)
- pp_row47_2 <= booth_b18_m29;
- always @(posedge clk)
- pp_row47_3 <= booth_b20_m27;
- always @(posedge clk)
- pp_row47_4 <= booth_b22_m25;
- always @(posedge clk)
- pp_row47_5 <= booth_b24_m23;
- always @(posedge clk)
- pp_row47_6 <= booth_b26_m21;
- always @(posedge clk)
- pp_row47_7 <= booth_b28_m19;
- always @(posedge clk)
- pp_row47_8 <= booth_b30_m17;
- always @(posedge clk)
- pp_row47_9 <= booth_b32_m15;
- always @(posedge clk)
- pp_row48_1 <= booth_b16_m32;
- always @(posedge clk)
- pp_row48_2 <= booth_b18_m30;
- always @(posedge clk)
- pp_row48_3 <= booth_b20_m28;
- always @(posedge clk)
- pp_row48_4 <= booth_b22_m26;
- always @(posedge clk)
- pp_row48_5 <= booth_b24_m24;
- always @(posedge clk)
- pp_row48_6 <= booth_b26_m22;
- always @(posedge clk)
- pp_row48_7 <= booth_b28_m20;
- always @(posedge clk)
- pp_row48_8 <= booth_b30_m18;
- always @(posedge clk)
- pp_row48_9 <= booth_b32_m16;
- always @(posedge clk)
- pp_row49_0 <= \notsign$1036 ;
- always @(posedge clk)
- pp_row49_1 <= booth_b18_m31;
- always @(posedge clk)
- pp_row49_2 <= booth_b20_m29;
- always @(posedge clk)
- pp_row49_3 <= booth_b22_m27;
- always @(posedge clk)
- pp_row49_4 <= booth_b24_m25;
- always @(posedge clk)
- pp_row49_5 <= booth_b26_m23;
- always @(posedge clk)
- pp_row49_6 <= booth_b28_m21;
- always @(posedge clk)
- pp_row49_7 <= booth_b30_m19;
- always @(posedge clk)
- pp_row49_8 <= booth_b32_m17;
- always @(posedge clk)
- pp_row50_1 <= booth_b18_m32;
- always @(posedge clk)
- pp_row50_2 <= booth_b20_m30;
- always @(posedge clk)
- pp_row50_3 <= booth_b22_m28;
- always @(posedge clk)
- pp_row50_4 <= booth_b24_m26;
- always @(posedge clk)
- pp_row50_5 <= booth_b26_m24;
- always @(posedge clk)
- pp_row50_6 <= booth_b28_m22;
- always @(posedge clk)
- pp_row50_7 <= booth_b30_m20;
- always @(posedge clk)
- pp_row50_8 <= booth_b32_m18;
- always @(posedge clk)
- pp_row51_0 <= \notsign$1070 ;
- always @(posedge clk)
- pp_row51_1 <= booth_b20_m31;
- always @(posedge clk)
- pp_row51_2 <= booth_b22_m29;
- always @(posedge clk)
- pp_row51_3 <= booth_b24_m27;
- always @(posedge clk)
- pp_row51_4 <= booth_b26_m25;
- always @(posedge clk)
- pp_row51_5 <= booth_b28_m23;
- always @(posedge clk)
- pp_row51_6 <= booth_b30_m21;
- always @(posedge clk)
- pp_row51_7 <= booth_b32_m19;
- always @(posedge clk)
- pp_row52_1 <= booth_b20_m32;
- always @(posedge clk)
- pp_row52_2 <= booth_b22_m30;
- always @(posedge clk)
- pp_row52_3 <= booth_b24_m28;
- always @(posedge clk)
- pp_row52_4 <= booth_b26_m26;
- always @(posedge clk)
- pp_row52_5 <= booth_b28_m24;
- always @(posedge clk)
- pp_row52_6 <= booth_b30_m22;
- always @(posedge clk)
- pp_row52_7 <= booth_b32_m20;
- always @(posedge clk)
- pp_row53_0 <= \notsign$1100 ;
- always @(posedge clk)
- pp_row53_1 <= booth_b22_m31;
- always @(posedge clk)
- pp_row53_2 <= booth_b24_m29;
- always @(posedge clk)
- pp_row53_3 <= booth_b26_m27;
- always @(posedge clk)
- pp_row53_4 <= booth_b28_m25;
- always @(posedge clk)
- pp_row53_5 <= booth_b30_m23;
- always @(posedge clk)
- pp_row53_6 <= booth_b32_m21;
- always @(posedge clk)
- pp_row54_1 <= booth_b22_m32;
- always @(posedge clk)
- pp_row54_2 <= booth_b24_m30;
- always @(posedge clk)
- pp_row54_3 <= booth_b26_m28;
- always @(posedge clk)
- pp_row54_4 <= booth_b28_m26;
- always @(posedge clk)
- pp_row54_5 <= booth_b30_m24;
- always @(posedge clk)
- pp_row54_6 <= booth_b32_m22;
- always @(posedge clk)
- pp_row55_0 <= \notsign$1126 ;
- always @(posedge clk)
- pp_row55_1 <= booth_b24_m31;
- always @(posedge clk)
- pp_row55_2 <= booth_b26_m29;
- always @(posedge clk)
- pp_row55_3 <= booth_b28_m27;
- always @(posedge clk)
- pp_row55_4 <= booth_b30_m25;
- always @(posedge clk)
- pp_row55_5 <= booth_b32_m23;
- always @(posedge clk)
- pp_row56_1 <= booth_b24_m32;
- always @(posedge clk)
- pp_row56_2 <= booth_b26_m30;
- always @(posedge clk)
- pp_row56_3 <= booth_b28_m28;
- always @(posedge clk)
- pp_row56_4 <= booth_b30_m26;
- always @(posedge clk)
- pp_row56_5 <= booth_b32_m24;
- always @(posedge clk)
- pp_row57_0 <= \notsign$1148 ;
- always @(posedge clk)
- pp_row57_1 <= booth_b26_m31;
- always @(posedge clk)
- pp_row57_2 <= booth_b28_m29;
- always @(posedge clk)
- pp_row57_3 <= booth_b30_m27;
- always @(posedge clk)
- pp_row57_4 <= booth_b32_m25;
- always @(posedge clk)
- pp_row58_1 <= booth_b26_m32;
- always @(posedge clk)
- pp_row58_2 <= booth_b28_m30;
- always @(posedge clk)
- pp_row58_3 <= booth_b30_m28;
- always @(posedge clk)
- pp_row58_4 <= booth_b32_m26;
- always @(posedge clk)
- pp_row59_0 <= \notsign$1166 ;
- always @(posedge clk)
- pp_row59_1 <= booth_b28_m31;
- always @(posedge clk)
- pp_row59_2 <= booth_b30_m29;
- always @(posedge clk)
- pp_row59_3 <= booth_b32_m27;
- always @(posedge clk)
- pp_row60_1 <= booth_b28_m32;
- always @(posedge clk)
- pp_row60_2 <= booth_b30_m30;
- always @(posedge clk)
- pp_row60_3 <= booth_b32_m28;
- always @(posedge clk)
- pp_row61_0 <= \notsign$1180 ;
- always @(posedge clk)
- pp_row61_1 <= booth_b30_m31;
- always @(posedge clk)
- pp_row61_2 <= booth_b32_m29;
- always @(posedge clk)
- pp_row62_1 <= booth_b30_m32;
- always @(posedge clk)
- pp_row62_2 <= booth_b32_m30;
- always @(posedge clk)
- pp_row63_0 <= \notsign$1190 ;
- always @(posedge clk)
- pp_row63_1 <= booth_b32_m31;
- always @(posedge clk)
- pp_row64_1 <= booth_b32_m32;
- always @(posedge clk)
- final_a_registered <= { \c$1256 , \c$1255 , \c$1254 , \c$1253 , \c$1252 , \c$1251 , \c$1250 , \c$1249 , \c$1248 , \c$1247 , \c$1246 , \c$1245 , \c$1244 , \c$1243 , \c$1242 , \c$1241 , \c$1240 , \c$1239 , \c$1238 , \c$1237 , \c$1236 , \c$1235 , \c$1234 , \c$1233 , \c$1232 , \c$1231 , \c$1230 , \c$1229 , \c$1228 , \c$1227 , \c$1226 , \c$1225 , \c$1224 , \c$1223 , \c$1222 , \c$1221 , \c$1220 , \c$1219 , \c$1218 , \c$1217 , \c$1216 , \c$1215 , \c$1214 , \c$1213 , \c$1212 , \c$1211 , \c$1210 , \c$1209 , \c$1208 , \c$1207 , \c$1206 , \c$1205 , \c$1204 , \c$1203 , \c$1202 , \c$1201 , \c$1200 , \c$1199 , \c$1198 , \c$1197 , c, pp_row2_2, pp_row1_0, pp_row0_0 };
- always @(posedge clk)
- final_b_registered <= { \s$1320 , \s$1319 , \s$1318 , \s$1317 , \s$1316 , \s$1315 , \s$1314 , \s$1313 , \s$1312 , \s$1311 , \s$1310 , \s$1309 , \s$1308 , \s$1307 , \s$1306 , \s$1305 , \s$1304 , \s$1303 , \s$1302 , \s$1301 , \s$1300 , \s$1299 , \s$1298 , \s$1297 , \s$1296 , \s$1295 , \s$1294 , \s$1293 , \s$1292 , \s$1291 , \s$1290 , \s$1289 , \s$1288 , \s$1287 , \s$1286 , \s$1285 , \s$1284 , \s$1283 , \s$1282 , \s$1281 , \s$1280 , \s$1279 , \s$1278 , \s$1277 , \s$1276 , \s$1275 , \s$1274 , \s$1273 , \s$1272 , \s$1271 , \s$1270 , \s$1269 , \s$1268 , \s$1267 , \s$1266 , \s$1265 , \s$1264 , \s$1263 , \s$1262 , \s$1261 , \s$1260 , s, 1'h0, pp_row0_1 };
- always @(posedge clk)
- o <= { \$117 , \$116 , \$115 , \$114 , \$113 , \$112 , \$111 , \$110 , \$109 , \$108 , \$107 , \$106 , \$105 , \$104 , \$103 , \$102 , \$101 , \$100 , \$99 , \$98 , \$97 , \$96 , \$95 , \$94 , \$93 , \$92 , \$91 , \$90 , \$89 , \$88 , \$87 , \$86 , \$85 , \$84 , \$83 , \$82 , \$81 , \$80 , \$79 , \$78 , \$77 , \$76 , \$75 , \$74 , \$73 , \$72 , \$71 , \$70 , \$69 , \$68 , \$67 , \$66 , \$65 , \$64 , \$63 , \$62 , \$61 , \$60 , \$59 , \$58 , \$57 , \$56 , \$55 , \$54 };
- XOR2x1_ASAP7_75t_R \U$1000 (
- .A(\t$2197 ),
- .B(a_registered[13]),
- .Y(booth_b12_m18)
- );
- AO22x1_ASAP7_75t_R \U$1001 (
- .A1(b_registered[18]),
- .A2(\sel_0$1550 ),
- .B1(b_registered[19]),
- .B2(\sel_1$1551 ),
- .Y(\t$2198 )
- );
- XOR2x1_ASAP7_75t_R \U$1002 (
- .A(\t$2198 ),
- .B(a_registered[13]),
- .Y(booth_b12_m19)
- );
- AO22x1_ASAP7_75t_R \U$1003 (
- .A1(b_registered[19]),
- .A2(\sel_0$1550 ),
- .B1(b_registered[20]),
- .B2(\sel_1$1551 ),
- .Y(\t$2199 )
- );
- XOR2x1_ASAP7_75t_R \U$1004 (
- .A(\t$2199 ),
- .B(a_registered[13]),
- .Y(booth_b12_m20)
- );
- AO22x1_ASAP7_75t_R \U$1005 (
- .A1(b_registered[20]),
- .A2(\sel_0$1550 ),
- .B1(b_registered[21]),
- .B2(\sel_1$1551 ),
- .Y(\t$2200 )
- );
- XOR2x1_ASAP7_75t_R \U$1006 (
- .A(\t$2200 ),
- .B(a_registered[13]),
- .Y(booth_b12_m21)
- );
- AO22x1_ASAP7_75t_R \U$1007 (
- .A1(b_registered[21]),
- .A2(\sel_0$1550 ),
- .B1(b_registered[22]),
- .B2(\sel_1$1551 ),
- .Y(\t$2201 )
- );
- XOR2x1_ASAP7_75t_R \U$1008 (
- .A(\t$2201 ),
- .B(a_registered[13]),
- .Y(booth_b12_m22)
- );
- AO22x1_ASAP7_75t_R \U$1009 (
- .A1(b_registered[22]),
- .A2(\sel_0$1550 ),
- .B1(b_registered[23]),
- .B2(\sel_1$1551 ),
- .Y(\t$2202 )
- );
- XOR2x1_ASAP7_75t_R \U$1010 (
- .A(\t$2202 ),
- .B(a_registered[13]),
- .Y(booth_b12_m23)
- );
- AO22x1_ASAP7_75t_R \U$1011 (
- .A1(b_registered[23]),
- .A2(\sel_0$1550 ),
- .B1(b_registered[24]),
- .B2(\sel_1$1551 ),
- .Y(\t$2203 )
- );
- XOR2x1_ASAP7_75t_R \U$1012 (
- .A(\t$2203 ),
- .B(a_registered[13]),
- .Y(booth_b12_m24)
- );
- AO22x1_ASAP7_75t_R \U$1013 (
- .A1(b_registered[24]),
- .A2(\sel_0$1550 ),
- .B1(b_registered[25]),
- .B2(\sel_1$1551 ),
- .Y(\t$2204 )
- );
- XOR2x1_ASAP7_75t_R \U$1014 (
- .A(\t$2204 ),
- .B(a_registered[13]),
- .Y(booth_b12_m25)
- );
- AO22x1_ASAP7_75t_R \U$1015 (
- .A1(b_registered[25]),
- .A2(\sel_0$1550 ),
- .B1(b_registered[26]),
- .B2(\sel_1$1551 ),
- .Y(\t$2205 )
- );
- XOR2x1_ASAP7_75t_R \U$1016 (
- .A(\t$2205 ),
- .B(a_registered[13]),
- .Y(booth_b12_m26)
- );
- AO22x1_ASAP7_75t_R \U$1017 (
- .A1(b_registered[26]),
- .A2(\sel_0$1550 ),
- .B1(b_registered[27]),
- .B2(\sel_1$1551 ),
- .Y(\t$2206 )
- );
- XOR2x1_ASAP7_75t_R \U$1018 (
- .A(\t$2206 ),
- .B(a_registered[13]),
- .Y(booth_b12_m27)
- );
- AO22x1_ASAP7_75t_R \U$1019 (
- .A1(b_registered[27]),
- .A2(\sel_0$1550 ),
- .B1(b_registered[28]),
- .B2(\sel_1$1551 ),
- .Y(\t$2207 )
- );
- XOR2x1_ASAP7_75t_R \U$1020 (
- .A(\t$2207 ),
- .B(a_registered[13]),
- .Y(booth_b12_m28)
- );
- AO22x1_ASAP7_75t_R \U$1021 (
- .A1(b_registered[28]),
- .A2(\sel_0$1550 ),
- .B1(b_registered[29]),
- .B2(\sel_1$1551 ),
- .Y(\t$2208 )
- );
- XOR2x1_ASAP7_75t_R \U$1022 (
- .A(\t$2208 ),
- .B(a_registered[13]),
- .Y(booth_b12_m29)
- );
- AO22x1_ASAP7_75t_R \U$1023 (
- .A1(b_registered[29]),
- .A2(\sel_0$1550 ),
- .B1(b_registered[30]),
- .B2(\sel_1$1551 ),
- .Y(\t$2209 )
- );
- XOR2x1_ASAP7_75t_R \U$1024 (
- .A(\t$2209 ),
- .B(a_registered[13]),
- .Y(booth_b12_m30)
- );
- AO22x1_ASAP7_75t_R \U$1025 (
- .A1(b_registered[30]),
- .A2(\sel_0$1550 ),
- .B1(b_registered[31]),
- .B2(\sel_1$1551 ),
- .Y(\t$2210 )
- );
- XOR2x1_ASAP7_75t_R \U$1026 (
- .A(\t$2210 ),
- .B(a_registered[13]),
- .Y(booth_b12_m31)
- );
- AO22x1_ASAP7_75t_R \U$1027 (
- .A1(b_registered[31]),
- .A2(\sel_0$1550 ),
- .B1(1'h0),
- .B2(\sel_1$1551 ),
- .Y(\t$2211 )
- );
- XOR2x1_ASAP7_75t_R \U$1028 (
- .A(\t$2211 ),
- .B(a_registered[13]),
- .Y(booth_b12_m32)
- );
- INVx1_ASAP7_75t_R \U$1029 (
- .A(a_registered[13]),
- .Y(\notsign$956 )
- );
- INVx1_ASAP7_75t_R \U$1030 (
- .A(a_registered[13]),
- .Y(\$22 )
- );
- INVx1_ASAP7_75t_R \U$1031 (
- .A(a_registered[14]),
- .Y(\$23 )
- );
- INVx1_ASAP7_75t_R \U$1032 (
- .A(a_registered[15]),
- .Y(\$24 )
- );
- AO33x2_ASAP7_75t_R \U$1033 (
- .A1(\$24 ),
- .A2(a_registered[14]),
- .A3(a_registered[13]),
- .B1(a_registered[15]),
- .B2(\$23 ),
- .B3(\$22 ),
- .Y(\sel_0$1587 )
- );
- XOR2x1_ASAP7_75t_R \U$1034 (
- .A(a_registered[14]),
- .B(a_registered[13]),
- .Y(\sel_1$1588 )
- );
- AO22x1_ASAP7_75t_R \U$1035 (
- .A1(1'h0),
- .A2(\sel_0$1587 ),
- .B1(b_registered[0]),
- .B2(\sel_1$1588 ),
- .Y(\t$2213 )
- );
- XOR2x1_ASAP7_75t_R \U$1036 (
- .A(\t$2213 ),
- .B(a_registered[15]),
- .Y(booth_b14_m0)
- );
- AO22x1_ASAP7_75t_R \U$1037 (
- .A1(b_registered[0]),
- .A2(\sel_0$1587 ),
- .B1(b_registered[1]),
- .B2(\sel_1$1588 ),
- .Y(\t$2214 )
- );
- XOR2x1_ASAP7_75t_R \U$1038 (
- .A(\t$2214 ),
- .B(a_registered[15]),
- .Y(booth_b14_m1)
- );
- AO22x1_ASAP7_75t_R \U$1039 (
- .A1(b_registered[1]),
- .A2(\sel_0$1587 ),
- .B1(b_registered[2]),
- .B2(\sel_1$1588 ),
- .Y(\t$2215 )
- );
- XOR2x1_ASAP7_75t_R \U$1040 (
- .A(\t$2215 ),
- .B(a_registered[15]),
- .Y(booth_b14_m2)
- );
- AO22x1_ASAP7_75t_R \U$1041 (
- .A1(b_registered[2]),
- .A2(\sel_0$1587 ),
- .B1(b_registered[3]),
- .B2(\sel_1$1588 ),
- .Y(\t$2216 )
- );
- XOR2x1_ASAP7_75t_R \U$1042 (
- .A(\t$2216 ),
- .B(a_registered[15]),
- .Y(booth_b14_m3)
- );
- AO22x1_ASAP7_75t_R \U$1043 (
- .A1(b_registered[3]),
- .A2(\sel_0$1587 ),
- .B1(b_registered[4]),
- .B2(\sel_1$1588 ),
- .Y(\t$2217 )
- );
- XOR2x1_ASAP7_75t_R \U$1044 (
- .A(\t$2217 ),
- .B(a_registered[15]),
- .Y(booth_b14_m4)
- );
- AO22x1_ASAP7_75t_R \U$1045 (
- .A1(b_registered[4]),
- .A2(\sel_0$1587 ),
- .B1(b_registered[5]),
- .B2(\sel_1$1588 ),
- .Y(\t$2218 )
- );
- XOR2x1_ASAP7_75t_R \U$1046 (
- .A(\t$2218 ),
- .B(a_registered[15]),
- .Y(booth_b14_m5)
- );
- AO22x1_ASAP7_75t_R \U$1047 (
- .A1(b_registered[5]),
- .A2(\sel_0$1587 ),
- .B1(b_registered[6]),
- .B2(\sel_1$1588 ),
- .Y(\t$2219 )
- );
- XOR2x1_ASAP7_75t_R \U$1048 (
- .A(\t$2219 ),
- .B(a_registered[15]),
- .Y(booth_b14_m6)
- );
- AO22x1_ASAP7_75t_R \U$1049 (
- .A1(b_registered[6]),
- .A2(\sel_0$1587 ),
- .B1(b_registered[7]),
- .B2(\sel_1$1588 ),
- .Y(\t$2220 )
- );
- XOR2x1_ASAP7_75t_R \U$1050 (
- .A(\t$2220 ),
- .B(a_registered[15]),
- .Y(booth_b14_m7)
- );
- AO22x1_ASAP7_75t_R \U$1051 (
- .A1(b_registered[7]),
- .A2(\sel_0$1587 ),
- .B1(b_registered[8]),
- .B2(\sel_1$1588 ),
- .Y(\t$2221 )
- );
- XOR2x1_ASAP7_75t_R \U$1052 (
- .A(\t$2221 ),
- .B(a_registered[15]),
- .Y(booth_b14_m8)
- );
- AO22x1_ASAP7_75t_R \U$1053 (
- .A1(b_registered[8]),
- .A2(\sel_0$1587 ),
- .B1(b_registered[9]),
- .B2(\sel_1$1588 ),
- .Y(\t$2222 )
- );
- XOR2x1_ASAP7_75t_R \U$1054 (
- .A(\t$2222 ),
- .B(a_registered[15]),
- .Y(booth_b14_m9)
- );
- AO22x1_ASAP7_75t_R \U$1055 (
- .A1(b_registered[9]),
- .A2(\sel_0$1587 ),
- .B1(b_registered[10]),
- .B2(\sel_1$1588 ),
- .Y(\t$2223 )
- );
- XOR2x1_ASAP7_75t_R \U$1056 (
- .A(\t$2223 ),
- .B(a_registered[15]),
- .Y(booth_b14_m10)
- );
- AO22x1_ASAP7_75t_R \U$1057 (
- .A1(b_registered[10]),
- .A2(\sel_0$1587 ),
- .B1(b_registered[11]),
- .B2(\sel_1$1588 ),
- .Y(\t$2224 )
- );
- XOR2x1_ASAP7_75t_R \U$1058 (
- .A(\t$2224 ),
- .B(a_registered[15]),
- .Y(booth_b14_m11)
- );
- AO22x1_ASAP7_75t_R \U$1059 (
- .A1(b_registered[11]),
- .A2(\sel_0$1587 ),
- .B1(b_registered[12]),
- .B2(\sel_1$1588 ),
- .Y(\t$2225 )
- );
- XOR2x1_ASAP7_75t_R \U$1060 (
- .A(\t$2225 ),
- .B(a_registered[15]),
- .Y(booth_b14_m12)
- );
- AO22x1_ASAP7_75t_R \U$1061 (
- .A1(b_registered[12]),
- .A2(\sel_0$1587 ),
- .B1(b_registered[13]),
- .B2(\sel_1$1588 ),
- .Y(\t$2226 )
- );
- XOR2x1_ASAP7_75t_R \U$1062 (
- .A(\t$2226 ),
- .B(a_registered[15]),
- .Y(booth_b14_m13)
- );
- AO22x1_ASAP7_75t_R \U$1063 (
- .A1(b_registered[13]),
- .A2(\sel_0$1587 ),
- .B1(b_registered[14]),
- .B2(\sel_1$1588 ),
- .Y(\t$2227 )
- );
- XOR2x1_ASAP7_75t_R \U$1064 (
- .A(\t$2227 ),
- .B(a_registered[15]),
- .Y(booth_b14_m14)
- );
- AO22x1_ASAP7_75t_R \U$1065 (
- .A1(b_registered[14]),
- .A2(\sel_0$1587 ),
- .B1(b_registered[15]),
- .B2(\sel_1$1588 ),
- .Y(\t$2228 )
- );
- XOR2x1_ASAP7_75t_R \U$1066 (
- .A(\t$2228 ),
- .B(a_registered[15]),
- .Y(booth_b14_m15)
- );
- AO22x1_ASAP7_75t_R \U$1067 (
- .A1(b_registered[15]),
- .A2(\sel_0$1587 ),
- .B1(b_registered[16]),
- .B2(\sel_1$1588 ),
- .Y(\t$2229 )
- );
- XOR2x1_ASAP7_75t_R \U$1068 (
- .A(\t$2229 ),
- .B(a_registered[15]),
- .Y(booth_b14_m16)
- );
- AO22x1_ASAP7_75t_R \U$1069 (
- .A1(b_registered[16]),
- .A2(\sel_0$1587 ),
- .B1(b_registered[17]),
- .B2(\sel_1$1588 ),
- .Y(\t$2230 )
- );
- XOR2x1_ASAP7_75t_R \U$1070 (
- .A(\t$2230 ),
- .B(a_registered[15]),
- .Y(booth_b14_m17)
- );
- AO22x1_ASAP7_75t_R \U$1071 (
- .A1(b_registered[17]),
- .A2(\sel_0$1587 ),
- .B1(b_registered[18]),
- .B2(\sel_1$1588 ),
- .Y(\t$2231 )
- );
- XOR2x1_ASAP7_75t_R \U$1072 (
- .A(\t$2231 ),
- .B(a_registered[15]),
- .Y(booth_b14_m18)
- );
- AO22x1_ASAP7_75t_R \U$1073 (
- .A1(b_registered[18]),
- .A2(\sel_0$1587 ),
- .B1(b_registered[19]),
- .B2(\sel_1$1588 ),
- .Y(\t$2232 )
- );
- XOR2x1_ASAP7_75t_R \U$1074 (
- .A(\t$2232 ),
- .B(a_registered[15]),
- .Y(booth_b14_m19)
- );
- AO22x1_ASAP7_75t_R \U$1075 (
- .A1(b_registered[19]),
- .A2(\sel_0$1587 ),
- .B1(b_registered[20]),
- .B2(\sel_1$1588 ),
- .Y(\t$2233 )
- );
- XOR2x1_ASAP7_75t_R \U$1076 (
- .A(\t$2233 ),
- .B(a_registered[15]),
- .Y(booth_b14_m20)
- );
- AO22x1_ASAP7_75t_R \U$1077 (
- .A1(b_registered[20]),
- .A2(\sel_0$1587 ),
- .B1(b_registered[21]),
- .B2(\sel_1$1588 ),
- .Y(\t$2234 )
- );
- XOR2x1_ASAP7_75t_R \U$1078 (
- .A(\t$2234 ),
- .B(a_registered[15]),
- .Y(booth_b14_m21)
- );
- AO22x1_ASAP7_75t_R \U$1079 (
- .A1(b_registered[21]),
- .A2(\sel_0$1587 ),
- .B1(b_registered[22]),
- .B2(\sel_1$1588 ),
- .Y(\t$2235 )
- );
- XOR2x1_ASAP7_75t_R \U$1080 (
- .A(\t$2235 ),
- .B(a_registered[15]),
- .Y(booth_b14_m22)
- );
- AO22x1_ASAP7_75t_R \U$1081 (
- .A1(b_registered[22]),
- .A2(\sel_0$1587 ),
- .B1(b_registered[23]),
- .B2(\sel_1$1588 ),
- .Y(\t$2236 )
- );
- XOR2x1_ASAP7_75t_R \U$1082 (
- .A(\t$2236 ),
- .B(a_registered[15]),
- .Y(booth_b14_m23)
- );
- AO22x1_ASAP7_75t_R \U$1083 (
- .A1(b_registered[23]),
- .A2(\sel_0$1587 ),
- .B1(b_registered[24]),
- .B2(\sel_1$1588 ),
- .Y(\t$2237 )
- );
- XOR2x1_ASAP7_75t_R \U$1084 (
- .A(\t$2237 ),
- .B(a_registered[15]),
- .Y(booth_b14_m24)
- );
- AO22x1_ASAP7_75t_R \U$1085 (
- .A1(b_registered[24]),
- .A2(\sel_0$1587 ),
- .B1(b_registered[25]),
- .B2(\sel_1$1588 ),
- .Y(\t$2238 )
- );
- XOR2x1_ASAP7_75t_R \U$1086 (
- .A(\t$2238 ),
- .B(a_registered[15]),
- .Y(booth_b14_m25)
- );
- AO22x1_ASAP7_75t_R \U$1087 (
- .A1(b_registered[25]),
- .A2(\sel_0$1587 ),
- .B1(b_registered[26]),
- .B2(\sel_1$1588 ),
- .Y(\t$2239 )
- );
- XOR2x1_ASAP7_75t_R \U$1088 (
- .A(\t$2239 ),
- .B(a_registered[15]),
- .Y(booth_b14_m26)
- );
- AO22x1_ASAP7_75t_R \U$1089 (
- .A1(b_registered[26]),
- .A2(\sel_0$1587 ),
- .B1(b_registered[27]),
- .B2(\sel_1$1588 ),
- .Y(\t$2240 )
- );
- XOR2x1_ASAP7_75t_R \U$1090 (
- .A(\t$2240 ),
- .B(a_registered[15]),
- .Y(booth_b14_m27)
- );
- AO22x1_ASAP7_75t_R \U$1091 (
- .A1(b_registered[27]),
- .A2(\sel_0$1587 ),
- .B1(b_registered[28]),
- .B2(\sel_1$1588 ),
- .Y(\t$2241 )
- );
- XOR2x1_ASAP7_75t_R \U$1092 (
- .A(\t$2241 ),
- .B(a_registered[15]),
- .Y(booth_b14_m28)
- );
- AO22x1_ASAP7_75t_R \U$1093 (
- .A1(b_registered[28]),
- .A2(\sel_0$1587 ),
- .B1(b_registered[29]),
- .B2(\sel_1$1588 ),
- .Y(\t$2242 )
- );
- XOR2x1_ASAP7_75t_R \U$1094 (
- .A(\t$2242 ),
- .B(a_registered[15]),
- .Y(booth_b14_m29)
- );
- AO22x1_ASAP7_75t_R \U$1095 (
- .A1(b_registered[29]),
- .A2(\sel_0$1587 ),
- .B1(b_registered[30]),
- .B2(\sel_1$1588 ),
- .Y(\t$2243 )
- );
- XOR2x1_ASAP7_75t_R \U$1096 (
- .A(\t$2243 ),
- .B(a_registered[15]),
- .Y(booth_b14_m30)
- );
- AO22x1_ASAP7_75t_R \U$1097 (
- .A1(b_registered[30]),
- .A2(\sel_0$1587 ),
- .B1(b_registered[31]),
- .B2(\sel_1$1588 ),
- .Y(\t$2244 )
- );
- XOR2x1_ASAP7_75t_R \U$1098 (
- .A(\t$2244 ),
- .B(a_registered[15]),
- .Y(booth_b14_m31)
- );
- AO22x1_ASAP7_75t_R \U$1099 (
- .A1(b_registered[31]),
- .A2(\sel_0$1587 ),
- .B1(1'h0),
- .B2(\sel_1$1588 ),
- .Y(\t$2245 )
- );
- XOR2x1_ASAP7_75t_R \U$1100 (
- .A(\t$2245 ),
- .B(a_registered[15]),
- .Y(booth_b14_m32)
- );
- INVx1_ASAP7_75t_R \U$1101 (
- .A(a_registered[15]),
- .Y(\notsign$998 )
- );
- INVx1_ASAP7_75t_R \U$1102 (
- .A(a_registered[15]),
- .Y(\$25 )
- );
- INVx1_ASAP7_75t_R \U$1103 (
- .A(a_registered[16]),
- .Y(\$26 )
- );
- INVx1_ASAP7_75t_R \U$1104 (
- .A(a_registered[17]),
- .Y(\$27 )
- );
- AO33x2_ASAP7_75t_R \U$1105 (
- .A1(\$27 ),
- .A2(a_registered[16]),
- .A3(a_registered[15]),
- .B1(a_registered[17]),
- .B2(\$26 ),
- .B3(\$25 ),
- .Y(\sel_0$1624 )
- );
- XOR2x1_ASAP7_75t_R \U$1106 (
- .A(a_registered[16]),
- .B(a_registered[15]),
- .Y(\sel_1$1625 )
- );
- AO22x1_ASAP7_75t_R \U$1107 (
- .A1(1'h0),
- .A2(\sel_0$1624 ),
- .B1(b_registered[0]),
- .B2(\sel_1$1625 ),
- .Y(\t$2247 )
- );
- XOR2x1_ASAP7_75t_R \U$1108 (
- .A(\t$2247 ),
- .B(a_registered[17]),
- .Y(booth_b16_m0)
- );
- AO22x1_ASAP7_75t_R \U$1109 (
- .A1(b_registered[0]),
- .A2(\sel_0$1624 ),
- .B1(b_registered[1]),
- .B2(\sel_1$1625 ),
- .Y(\t$2248 )
- );
- XOR2x1_ASAP7_75t_R \U$1110 (
- .A(\t$2248 ),
- .B(a_registered[17]),
- .Y(booth_b16_m1)
- );
- AO22x1_ASAP7_75t_R \U$1111 (
- .A1(b_registered[1]),
- .A2(\sel_0$1624 ),
- .B1(b_registered[2]),
- .B2(\sel_1$1625 ),
- .Y(\t$2249 )
- );
- XOR2x1_ASAP7_75t_R \U$1112 (
- .A(\t$2249 ),
- .B(a_registered[17]),
- .Y(booth_b16_m2)
- );
- AO22x1_ASAP7_75t_R \U$1113 (
- .A1(b_registered[2]),
- .A2(\sel_0$1624 ),
- .B1(b_registered[3]),
- .B2(\sel_1$1625 ),
- .Y(\t$2250 )
- );
- XOR2x1_ASAP7_75t_R \U$1114 (
- .A(\t$2250 ),
- .B(a_registered[17]),
- .Y(booth_b16_m3)
- );
- AO22x1_ASAP7_75t_R \U$1115 (
- .A1(b_registered[3]),
- .A2(\sel_0$1624 ),
- .B1(b_registered[4]),
- .B2(\sel_1$1625 ),
- .Y(\t$2251 )
- );
- XOR2x1_ASAP7_75t_R \U$1116 (
- .A(\t$2251 ),
- .B(a_registered[17]),
- .Y(booth_b16_m4)
- );
- AO22x1_ASAP7_75t_R \U$1117 (
- .A1(b_registered[4]),
- .A2(\sel_0$1624 ),
- .B1(b_registered[5]),
- .B2(\sel_1$1625 ),
- .Y(\t$2252 )
- );
- XOR2x1_ASAP7_75t_R \U$1118 (
- .A(\t$2252 ),
- .B(a_registered[17]),
- .Y(booth_b16_m5)
- );
- AO22x1_ASAP7_75t_R \U$1119 (
- .A1(b_registered[5]),
- .A2(\sel_0$1624 ),
- .B1(b_registered[6]),
- .B2(\sel_1$1625 ),
- .Y(\t$2253 )
- );
- XOR2x1_ASAP7_75t_R \U$1120 (
- .A(\t$2253 ),
- .B(a_registered[17]),
- .Y(booth_b16_m6)
- );
- AO22x1_ASAP7_75t_R \U$1121 (
- .A1(b_registered[6]),
- .A2(\sel_0$1624 ),
- .B1(b_registered[7]),
- .B2(\sel_1$1625 ),
- .Y(\t$2254 )
- );
- XOR2x1_ASAP7_75t_R \U$1122 (
- .A(\t$2254 ),
- .B(a_registered[17]),
- .Y(booth_b16_m7)
- );
- AO22x1_ASAP7_75t_R \U$1123 (
- .A1(b_registered[7]),
- .A2(\sel_0$1624 ),
- .B1(b_registered[8]),
- .B2(\sel_1$1625 ),
- .Y(\t$2255 )
- );
- XOR2x1_ASAP7_75t_R \U$1124 (
- .A(\t$2255 ),
- .B(a_registered[17]),
- .Y(booth_b16_m8)
- );
- AO22x1_ASAP7_75t_R \U$1125 (
- .A1(b_registered[8]),
- .A2(\sel_0$1624 ),
- .B1(b_registered[9]),
- .B2(\sel_1$1625 ),
- .Y(\t$2256 )
- );
- XOR2x1_ASAP7_75t_R \U$1126 (
- .A(\t$2256 ),
- .B(a_registered[17]),
- .Y(booth_b16_m9)
- );
- AO22x1_ASAP7_75t_R \U$1127 (
- .A1(b_registered[9]),
- .A2(\sel_0$1624 ),
- .B1(b_registered[10]),
- .B2(\sel_1$1625 ),
- .Y(\t$2257 )
- );
- XOR2x1_ASAP7_75t_R \U$1128 (
- .A(\t$2257 ),
- .B(a_registered[17]),
- .Y(booth_b16_m10)
- );
- AO22x1_ASAP7_75t_R \U$1129 (
- .A1(b_registered[10]),
- .A2(\sel_0$1624 ),
- .B1(b_registered[11]),
- .B2(\sel_1$1625 ),
- .Y(\t$2258 )
- );
- XOR2x1_ASAP7_75t_R \U$1130 (
- .A(\t$2258 ),
- .B(a_registered[17]),
- .Y(booth_b16_m11)
- );
- AO22x1_ASAP7_75t_R \U$1131 (
- .A1(b_registered[11]),
- .A2(\sel_0$1624 ),
- .B1(b_registered[12]),
- .B2(\sel_1$1625 ),
- .Y(\t$2259 )
- );
- XOR2x1_ASAP7_75t_R \U$1132 (
- .A(\t$2259 ),
- .B(a_registered[17]),
- .Y(booth_b16_m12)
- );
- AO22x1_ASAP7_75t_R \U$1133 (
- .A1(b_registered[12]),
- .A2(\sel_0$1624 ),
- .B1(b_registered[13]),
- .B2(\sel_1$1625 ),
- .Y(\t$2260 )
- );
- XOR2x1_ASAP7_75t_R \U$1134 (
- .A(\t$2260 ),
- .B(a_registered[17]),
- .Y(booth_b16_m13)
- );
- AO22x1_ASAP7_75t_R \U$1135 (
- .A1(b_registered[13]),
- .A2(\sel_0$1624 ),
- .B1(b_registered[14]),
- .B2(\sel_1$1625 ),
- .Y(\t$2261 )
- );
- XOR2x1_ASAP7_75t_R \U$1136 (
- .A(\t$2261 ),
- .B(a_registered[17]),
- .Y(booth_b16_m14)
- );
- AO22x1_ASAP7_75t_R \U$1137 (
- .A1(b_registered[14]),
- .A2(\sel_0$1624 ),
- .B1(b_registered[15]),
- .B2(\sel_1$1625 ),
- .Y(\t$2262 )
- );
- XOR2x1_ASAP7_75t_R \U$1138 (
- .A(\t$2262 ),
- .B(a_registered[17]),
- .Y(booth_b16_m15)
- );
- AO22x1_ASAP7_75t_R \U$1139 (
- .A1(b_registered[15]),
- .A2(\sel_0$1624 ),
- .B1(b_registered[16]),
- .B2(\sel_1$1625 ),
- .Y(\t$2263 )
- );
- XOR2x1_ASAP7_75t_R \U$1140 (
- .A(\t$2263 ),
- .B(a_registered[17]),
- .Y(booth_b16_m16)
- );
- AO22x1_ASAP7_75t_R \U$1141 (
- .A1(b_registered[16]),
- .A2(\sel_0$1624 ),
- .B1(b_registered[17]),
- .B2(\sel_1$1625 ),
- .Y(\t$2264 )
- );
- XOR2x1_ASAP7_75t_R \U$1142 (
- .A(\t$2264 ),
- .B(a_registered[17]),
- .Y(booth_b16_m17)
- );
- AO22x1_ASAP7_75t_R \U$1143 (
- .A1(b_registered[17]),
- .A2(\sel_0$1624 ),
- .B1(b_registered[18]),
- .B2(\sel_1$1625 ),
- .Y(\t$2265 )
- );
- XOR2x1_ASAP7_75t_R \U$1144 (
- .A(\t$2265 ),
- .B(a_registered[17]),
- .Y(booth_b16_m18)
- );
- AO22x1_ASAP7_75t_R \U$1145 (
- .A1(b_registered[18]),
- .A2(\sel_0$1624 ),
- .B1(b_registered[19]),
- .B2(\sel_1$1625 ),
- .Y(\t$2266 )
- );
- XOR2x1_ASAP7_75t_R \U$1146 (
- .A(\t$2266 ),
- .B(a_registered[17]),
- .Y(booth_b16_m19)
- );
- AO22x1_ASAP7_75t_R \U$1147 (
- .A1(b_registered[19]),
- .A2(\sel_0$1624 ),
- .B1(b_registered[20]),
- .B2(\sel_1$1625 ),
- .Y(\t$2267 )
- );
- XOR2x1_ASAP7_75t_R \U$1148 (
- .A(\t$2267 ),
- .B(a_registered[17]),
- .Y(booth_b16_m20)
- );
- AO22x1_ASAP7_75t_R \U$1149 (
- .A1(b_registered[20]),
- .A2(\sel_0$1624 ),
- .B1(b_registered[21]),
- .B2(\sel_1$1625 ),
- .Y(\t$2268 )
- );
- XOR2x1_ASAP7_75t_R \U$1150 (
- .A(\t$2268 ),
- .B(a_registered[17]),
- .Y(booth_b16_m21)
- );
- AO22x1_ASAP7_75t_R \U$1151 (
- .A1(b_registered[21]),
- .A2(\sel_0$1624 ),
- .B1(b_registered[22]),
- .B2(\sel_1$1625 ),
- .Y(\t$2269 )
- );
- XOR2x1_ASAP7_75t_R \U$1152 (
- .A(\t$2269 ),
- .B(a_registered[17]),
- .Y(booth_b16_m22)
- );
- AO22x1_ASAP7_75t_R \U$1153 (
- .A1(b_registered[22]),
- .A2(\sel_0$1624 ),
- .B1(b_registered[23]),
- .B2(\sel_1$1625 ),
- .Y(\t$2270 )
- );
- XOR2x1_ASAP7_75t_R \U$1154 (
- .A(\t$2270 ),
- .B(a_registered[17]),
- .Y(booth_b16_m23)
- );
- AO22x1_ASAP7_75t_R \U$1155 (
- .A1(b_registered[23]),
- .A2(\sel_0$1624 ),
- .B1(b_registered[24]),
- .B2(\sel_1$1625 ),
- .Y(\t$2271 )
- );
- XOR2x1_ASAP7_75t_R \U$1156 (
- .A(\t$2271 ),
- .B(a_registered[17]),
- .Y(booth_b16_m24)
- );
- AO22x1_ASAP7_75t_R \U$1157 (
- .A1(b_registered[24]),
- .A2(\sel_0$1624 ),
- .B1(b_registered[25]),
- .B2(\sel_1$1625 ),
- .Y(\t$2272 )
- );
- XOR2x1_ASAP7_75t_R \U$1158 (
- .A(\t$2272 ),
- .B(a_registered[17]),
- .Y(booth_b16_m25)
- );
- AO22x1_ASAP7_75t_R \U$1159 (
- .A1(b_registered[25]),
- .A2(\sel_0$1624 ),
- .B1(b_registered[26]),
- .B2(\sel_1$1625 ),
- .Y(\t$2273 )
- );
- XOR2x1_ASAP7_75t_R \U$1160 (
- .A(\t$2273 ),
- .B(a_registered[17]),
- .Y(booth_b16_m26)
- );
- AO22x1_ASAP7_75t_R \U$1161 (
- .A1(b_registered[26]),
- .A2(\sel_0$1624 ),
- .B1(b_registered[27]),
- .B2(\sel_1$1625 ),
- .Y(\t$2274 )
- );
- XOR2x1_ASAP7_75t_R \U$1162 (
- .A(\t$2274 ),
- .B(a_registered[17]),
- .Y(booth_b16_m27)
- );
- AO22x1_ASAP7_75t_R \U$1163 (
- .A1(b_registered[27]),
- .A2(\sel_0$1624 ),
- .B1(b_registered[28]),
- .B2(\sel_1$1625 ),
- .Y(\t$2275 )
- );
- XOR2x1_ASAP7_75t_R \U$1164 (
- .A(\t$2275 ),
- .B(a_registered[17]),
- .Y(booth_b16_m28)
- );
- AO22x1_ASAP7_75t_R \U$1165 (
- .A1(b_registered[28]),
- .A2(\sel_0$1624 ),
- .B1(b_registered[29]),
- .B2(\sel_1$1625 ),
- .Y(\t$2276 )
- );
- XOR2x1_ASAP7_75t_R \U$1166 (
- .A(\t$2276 ),
- .B(a_registered[17]),
- .Y(booth_b16_m29)
- );
- AO22x1_ASAP7_75t_R \U$1167 (
- .A1(b_registered[29]),
- .A2(\sel_0$1624 ),
- .B1(b_registered[30]),
- .B2(\sel_1$1625 ),
- .Y(\t$2277 )
- );
- XOR2x1_ASAP7_75t_R \U$1168 (
- .A(\t$2277 ),
- .B(a_registered[17]),
- .Y(booth_b16_m30)
- );
- AO22x1_ASAP7_75t_R \U$1169 (
- .A1(b_registered[30]),
- .A2(\sel_0$1624 ),
- .B1(b_registered[31]),
- .B2(\sel_1$1625 ),
- .Y(\t$2278 )
- );
- XOR2x1_ASAP7_75t_R \U$1170 (
- .A(\t$2278 ),
- .B(a_registered[17]),
- .Y(booth_b16_m31)
- );
- AO22x1_ASAP7_75t_R \U$1171 (
- .A1(b_registered[31]),
- .A2(\sel_0$1624 ),
- .B1(1'h0),
- .B2(\sel_1$1625 ),
- .Y(\t$2279 )
- );
- XOR2x1_ASAP7_75t_R \U$1172 (
- .A(\t$2279 ),
- .B(a_registered[17]),
- .Y(booth_b16_m32)
- );
- INVx1_ASAP7_75t_R \U$1173 (
- .A(a_registered[17]),
- .Y(\notsign$1036 )
- );
- INVx1_ASAP7_75t_R \U$1174 (
- .A(a_registered[17]),
- .Y(\$28 )
- );
- INVx1_ASAP7_75t_R \U$1175 (
- .A(a_registered[18]),
- .Y(\$29 )
- );
- INVx1_ASAP7_75t_R \U$1176 (
- .A(a_registered[19]),
- .Y(\$30 )
- );
- AO33x2_ASAP7_75t_R \U$1177 (
- .A1(\$30 ),
- .A2(a_registered[18]),
- .A3(a_registered[17]),
- .B1(a_registered[19]),
- .B2(\$29 ),
- .B3(\$28 ),
- .Y(\sel_0$1661 )
- );
- XOR2x1_ASAP7_75t_R \U$1178 (
- .A(a_registered[18]),
- .B(a_registered[17]),
- .Y(\sel_1$1662 )
- );
- AO22x1_ASAP7_75t_R \U$1179 (
- .A1(1'h0),
- .A2(\sel_0$1661 ),
- .B1(b_registered[0]),
- .B2(\sel_1$1662 ),
- .Y(\t$2281 )
- );
- XOR2x1_ASAP7_75t_R \U$1180 (
- .A(\t$2281 ),
- .B(a_registered[19]),
- .Y(booth_b18_m0)
- );
- AO22x1_ASAP7_75t_R \U$1181 (
- .A1(b_registered[0]),
- .A2(\sel_0$1661 ),
- .B1(b_registered[1]),
- .B2(\sel_1$1662 ),
- .Y(\t$2282 )
- );
- XOR2x1_ASAP7_75t_R \U$1182 (
- .A(\t$2282 ),
- .B(a_registered[19]),
- .Y(booth_b18_m1)
- );
- AO22x1_ASAP7_75t_R \U$1183 (
- .A1(b_registered[1]),
- .A2(\sel_0$1661 ),
- .B1(b_registered[2]),
- .B2(\sel_1$1662 ),
- .Y(\t$2283 )
- );
- XOR2x1_ASAP7_75t_R \U$1184 (
- .A(\t$2283 ),
- .B(a_registered[19]),
- .Y(booth_b18_m2)
- );
- AO22x1_ASAP7_75t_R \U$1185 (
- .A1(b_registered[2]),
- .A2(\sel_0$1661 ),
- .B1(b_registered[3]),
- .B2(\sel_1$1662 ),
- .Y(\t$2284 )
- );
- XOR2x1_ASAP7_75t_R \U$1186 (
- .A(\t$2284 ),
- .B(a_registered[19]),
- .Y(booth_b18_m3)
- );
- AO22x1_ASAP7_75t_R \U$1187 (
- .A1(b_registered[3]),
- .A2(\sel_0$1661 ),
- .B1(b_registered[4]),
- .B2(\sel_1$1662 ),
- .Y(\t$2285 )
- );
- XOR2x1_ASAP7_75t_R \U$1188 (
- .A(\t$2285 ),
- .B(a_registered[19]),
- .Y(booth_b18_m4)
- );
- AO22x1_ASAP7_75t_R \U$1189 (
- .A1(b_registered[4]),
- .A2(\sel_0$1661 ),
- .B1(b_registered[5]),
- .B2(\sel_1$1662 ),
- .Y(\t$2286 )
- );
- XOR2x1_ASAP7_75t_R \U$1190 (
- .A(\t$2286 ),
- .B(a_registered[19]),
- .Y(booth_b18_m5)
- );
- AO22x1_ASAP7_75t_R \U$1191 (
- .A1(b_registered[5]),
- .A2(\sel_0$1661 ),
- .B1(b_registered[6]),
- .B2(\sel_1$1662 ),
- .Y(\t$2287 )
- );
- XOR2x1_ASAP7_75t_R \U$1192 (
- .A(\t$2287 ),
- .B(a_registered[19]),
- .Y(booth_b18_m6)
- );
- AO22x1_ASAP7_75t_R \U$1193 (
- .A1(b_registered[6]),
- .A2(\sel_0$1661 ),
- .B1(b_registered[7]),
- .B2(\sel_1$1662 ),
- .Y(\t$2288 )
- );
- XOR2x1_ASAP7_75t_R \U$1194 (
- .A(\t$2288 ),
- .B(a_registered[19]),
- .Y(booth_b18_m7)
- );
- AO22x1_ASAP7_75t_R \U$1195 (
- .A1(b_registered[7]),
- .A2(\sel_0$1661 ),
- .B1(b_registered[8]),
- .B2(\sel_1$1662 ),
- .Y(\t$2289 )
- );
- XOR2x1_ASAP7_75t_R \U$1196 (
- .A(\t$2289 ),
- .B(a_registered[19]),
- .Y(booth_b18_m8)
- );
- AO22x1_ASAP7_75t_R \U$1197 (
- .A1(b_registered[8]),
- .A2(\sel_0$1661 ),
- .B1(b_registered[9]),
- .B2(\sel_1$1662 ),
- .Y(\t$2290 )
- );
- XOR2x1_ASAP7_75t_R \U$1198 (
- .A(\t$2290 ),
- .B(a_registered[19]),
- .Y(booth_b18_m9)
- );
- AO22x1_ASAP7_75t_R \U$1199 (
- .A1(b_registered[9]),
- .A2(\sel_0$1661 ),
- .B1(b_registered[10]),
- .B2(\sel_1$1662 ),
- .Y(\t$2291 )
- );
- XOR2x1_ASAP7_75t_R \U$1200 (
- .A(\t$2291 ),
- .B(a_registered[19]),
- .Y(booth_b18_m10)
- );
- AO22x1_ASAP7_75t_R \U$1201 (
- .A1(b_registered[10]),
- .A2(\sel_0$1661 ),
- .B1(b_registered[11]),
- .B2(\sel_1$1662 ),
- .Y(\t$2292 )
- );
- XOR2x1_ASAP7_75t_R \U$1202 (
- .A(\t$2292 ),
- .B(a_registered[19]),
- .Y(booth_b18_m11)
- );
- AO22x1_ASAP7_75t_R \U$1203 (
- .A1(b_registered[11]),
- .A2(\sel_0$1661 ),
- .B1(b_registered[12]),
- .B2(\sel_1$1662 ),
- .Y(\t$2293 )
- );
- XOR2x1_ASAP7_75t_R \U$1204 (
- .A(\t$2293 ),
- .B(a_registered[19]),
- .Y(booth_b18_m12)
- );
- AO22x1_ASAP7_75t_R \U$1205 (
- .A1(b_registered[12]),
- .A2(\sel_0$1661 ),
- .B1(b_registered[13]),
- .B2(\sel_1$1662 ),
- .Y(\t$2294 )
- );
- XOR2x1_ASAP7_75t_R \U$1206 (
- .A(\t$2294 ),
- .B(a_registered[19]),
- .Y(booth_b18_m13)
- );
- AO22x1_ASAP7_75t_R \U$1207 (
- .A1(b_registered[13]),
- .A2(\sel_0$1661 ),
- .B1(b_registered[14]),
- .B2(\sel_1$1662 ),
- .Y(\t$2295 )
- );
- XOR2x1_ASAP7_75t_R \U$1208 (
- .A(\t$2295 ),
- .B(a_registered[19]),
- .Y(booth_b18_m14)
- );
- AO22x1_ASAP7_75t_R \U$1209 (
- .A1(b_registered[14]),
- .A2(\sel_0$1661 ),
- .B1(b_registered[15]),
- .B2(\sel_1$1662 ),
- .Y(\t$2296 )
- );
- XOR2x1_ASAP7_75t_R \U$1210 (
- .A(\t$2296 ),
- .B(a_registered[19]),
- .Y(booth_b18_m15)
- );
- AO22x1_ASAP7_75t_R \U$1211 (
- .A1(b_registered[15]),
- .A2(\sel_0$1661 ),
- .B1(b_registered[16]),
- .B2(\sel_1$1662 ),
- .Y(\t$2297 )
- );
- XOR2x1_ASAP7_75t_R \U$1212 (
- .A(\t$2297 ),
- .B(a_registered[19]),
- .Y(booth_b18_m16)
- );
- AO22x1_ASAP7_75t_R \U$1213 (
- .A1(b_registered[16]),
- .A2(\sel_0$1661 ),
- .B1(b_registered[17]),
- .B2(\sel_1$1662 ),
- .Y(\t$2298 )
- );
- XOR2x1_ASAP7_75t_R \U$1214 (
- .A(\t$2298 ),
- .B(a_registered[19]),
- .Y(booth_b18_m17)
- );
- AO22x1_ASAP7_75t_R \U$1215 (
- .A1(b_registered[17]),
- .A2(\sel_0$1661 ),
- .B1(b_registered[18]),
- .B2(\sel_1$1662 ),
- .Y(\t$2299 )
- );
- XOR2x1_ASAP7_75t_R \U$1216 (
- .A(\t$2299 ),
- .B(a_registered[19]),
- .Y(booth_b18_m18)
- );
- AO22x1_ASAP7_75t_R \U$1217 (
- .A1(b_registered[18]),
- .A2(\sel_0$1661 ),
- .B1(b_registered[19]),
- .B2(\sel_1$1662 ),
- .Y(\t$2300 )
- );
- XOR2x1_ASAP7_75t_R \U$1218 (
- .A(\t$2300 ),
- .B(a_registered[19]),
- .Y(booth_b18_m19)
- );
- AO22x1_ASAP7_75t_R \U$1219 (
- .A1(b_registered[19]),
- .A2(\sel_0$1661 ),
- .B1(b_registered[20]),
- .B2(\sel_1$1662 ),
- .Y(\t$2301 )
- );
- XOR2x1_ASAP7_75t_R \U$1220 (
- .A(\t$2301 ),
- .B(a_registered[19]),
- .Y(booth_b18_m20)
- );
- AO22x1_ASAP7_75t_R \U$1221 (
- .A1(b_registered[20]),
- .A2(\sel_0$1661 ),
- .B1(b_registered[21]),
- .B2(\sel_1$1662 ),
- .Y(\t$2302 )
- );
- XOR2x1_ASAP7_75t_R \U$1222 (
- .A(\t$2302 ),
- .B(a_registered[19]),
- .Y(booth_b18_m21)
- );
- AO22x1_ASAP7_75t_R \U$1223 (
- .A1(b_registered[21]),
- .A2(\sel_0$1661 ),
- .B1(b_registered[22]),
- .B2(\sel_1$1662 ),
- .Y(\t$2303 )
- );
- XOR2x1_ASAP7_75t_R \U$1224 (
- .A(\t$2303 ),
- .B(a_registered[19]),
- .Y(booth_b18_m22)
- );
- AO22x1_ASAP7_75t_R \U$1225 (
- .A1(b_registered[22]),
- .A2(\sel_0$1661 ),
- .B1(b_registered[23]),
- .B2(\sel_1$1662 ),
- .Y(\t$2304 )
- );
- XOR2x1_ASAP7_75t_R \U$1226 (
- .A(\t$2304 ),
- .B(a_registered[19]),
- .Y(booth_b18_m23)
- );
- AO22x1_ASAP7_75t_R \U$1227 (
- .A1(b_registered[23]),
- .A2(\sel_0$1661 ),
- .B1(b_registered[24]),
- .B2(\sel_1$1662 ),
- .Y(\t$2305 )
- );
- XOR2x1_ASAP7_75t_R \U$1228 (
- .A(\t$2305 ),
- .B(a_registered[19]),
- .Y(booth_b18_m24)
- );
- AO22x1_ASAP7_75t_R \U$1229 (
- .A1(b_registered[24]),
- .A2(\sel_0$1661 ),
- .B1(b_registered[25]),
- .B2(\sel_1$1662 ),
- .Y(\t$2306 )
- );
- XOR2x1_ASAP7_75t_R \U$1230 (
- .A(\t$2306 ),
- .B(a_registered[19]),
- .Y(booth_b18_m25)
- );
- AO22x1_ASAP7_75t_R \U$1231 (
- .A1(b_registered[25]),
- .A2(\sel_0$1661 ),
- .B1(b_registered[26]),
- .B2(\sel_1$1662 ),
- .Y(\t$2307 )
- );
- XOR2x1_ASAP7_75t_R \U$1232 (
- .A(\t$2307 ),
- .B(a_registered[19]),
- .Y(booth_b18_m26)
- );
- AO22x1_ASAP7_75t_R \U$1233 (
- .A1(b_registered[26]),
- .A2(\sel_0$1661 ),
- .B1(b_registered[27]),
- .B2(\sel_1$1662 ),
- .Y(\t$2308 )
- );
- XOR2x1_ASAP7_75t_R \U$1234 (
- .A(\t$2308 ),
- .B(a_registered[19]),
- .Y(booth_b18_m27)
- );
- AO22x1_ASAP7_75t_R \U$1235 (
- .A1(b_registered[27]),
- .A2(\sel_0$1661 ),
- .B1(b_registered[28]),
- .B2(\sel_1$1662 ),
- .Y(\t$2309 )
- );
- XOR2x1_ASAP7_75t_R \U$1236 (
- .A(\t$2309 ),
- .B(a_registered[19]),
- .Y(booth_b18_m28)
- );
- AO22x1_ASAP7_75t_R \U$1237 (
- .A1(b_registered[28]),
- .A2(\sel_0$1661 ),
- .B1(b_registered[29]),
- .B2(\sel_1$1662 ),
- .Y(\t$2310 )
- );
- XOR2x1_ASAP7_75t_R \U$1238 (
- .A(\t$2310 ),
- .B(a_registered[19]),
- .Y(booth_b18_m29)
- );
- AO22x1_ASAP7_75t_R \U$1239 (
- .A1(b_registered[29]),
- .A2(\sel_0$1661 ),
- .B1(b_registered[30]),
- .B2(\sel_1$1662 ),
- .Y(\t$2311 )
- );
- XOR2x1_ASAP7_75t_R \U$1240 (
- .A(\t$2311 ),
- .B(a_registered[19]),
- .Y(booth_b18_m30)
- );
- AO22x1_ASAP7_75t_R \U$1241 (
- .A1(b_registered[30]),
- .A2(\sel_0$1661 ),
- .B1(b_registered[31]),
- .B2(\sel_1$1662 ),
- .Y(\t$2312 )
- );
- XOR2x1_ASAP7_75t_R \U$1242 (
- .A(\t$2312 ),
- .B(a_registered[19]),
- .Y(booth_b18_m31)
- );
- AO22x1_ASAP7_75t_R \U$1243 (
- .A1(b_registered[31]),
- .A2(\sel_0$1661 ),
- .B1(1'h0),
- .B2(\sel_1$1662 ),
- .Y(\t$2313 )
- );
- XOR2x1_ASAP7_75t_R \U$1244 (
- .A(\t$2313 ),
- .B(a_registered[19]),
- .Y(booth_b18_m32)
- );
- INVx1_ASAP7_75t_R \U$1245 (
- .A(a_registered[19]),
- .Y(\notsign$1070 )
- );
- INVx1_ASAP7_75t_R \U$1246 (
- .A(a_registered[19]),
- .Y(\$31 )
- );
- INVx1_ASAP7_75t_R \U$1247 (
- .A(a_registered[20]),
- .Y(\$32 )
- );
- INVx1_ASAP7_75t_R \U$1248 (
- .A(a_registered[21]),
- .Y(\$33 )
- );
- AO33x2_ASAP7_75t_R \U$1249 (
- .A1(\$33 ),
- .A2(a_registered[20]),
- .A3(a_registered[19]),
- .B1(a_registered[21]),
- .B2(\$32 ),
- .B3(\$31 ),
- .Y(\sel_0$1698 )
- );
- XOR2x1_ASAP7_75t_R \U$1250 (
- .A(a_registered[20]),
- .B(a_registered[19]),
- .Y(\sel_1$1699 )
- );
- AO22x1_ASAP7_75t_R \U$1251 (
- .A1(1'h0),
- .A2(\sel_0$1698 ),
- .B1(b_registered[0]),
- .B2(\sel_1$1699 ),
- .Y(\t$2315 )
- );
- XOR2x1_ASAP7_75t_R \U$1252 (
- .A(\t$2315 ),
- .B(a_registered[21]),
- .Y(booth_b20_m0)
- );
- AO22x1_ASAP7_75t_R \U$1253 (
- .A1(b_registered[0]),
- .A2(\sel_0$1698 ),
- .B1(b_registered[1]),
- .B2(\sel_1$1699 ),
- .Y(\t$2316 )
- );
- XOR2x1_ASAP7_75t_R \U$1254 (
- .A(\t$2316 ),
- .B(a_registered[21]),
- .Y(booth_b20_m1)
- );
- AO22x1_ASAP7_75t_R \U$1255 (
- .A1(b_registered[1]),
- .A2(\sel_0$1698 ),
- .B1(b_registered[2]),
- .B2(\sel_1$1699 ),
- .Y(\t$2317 )
- );
- XOR2x1_ASAP7_75t_R \U$1256 (
- .A(\t$2317 ),
- .B(a_registered[21]),
- .Y(booth_b20_m2)
- );
- AO22x1_ASAP7_75t_R \U$1257 (
- .A1(b_registered[2]),
- .A2(\sel_0$1698 ),
- .B1(b_registered[3]),
- .B2(\sel_1$1699 ),
- .Y(\t$2318 )
- );
- XOR2x1_ASAP7_75t_R \U$1258 (
- .A(\t$2318 ),
- .B(a_registered[21]),
- .Y(booth_b20_m3)
- );
- AO22x1_ASAP7_75t_R \U$1259 (
- .A1(b_registered[3]),
- .A2(\sel_0$1698 ),
- .B1(b_registered[4]),
- .B2(\sel_1$1699 ),
- .Y(\t$2319 )
- );
- XOR2x1_ASAP7_75t_R \U$1260 (
- .A(\t$2319 ),
- .B(a_registered[21]),
- .Y(booth_b20_m4)
- );
- AO22x1_ASAP7_75t_R \U$1261 (
- .A1(b_registered[4]),
- .A2(\sel_0$1698 ),
- .B1(b_registered[5]),
- .B2(\sel_1$1699 ),
- .Y(\t$2320 )
- );
- XOR2x1_ASAP7_75t_R \U$1262 (
- .A(\t$2320 ),
- .B(a_registered[21]),
- .Y(booth_b20_m5)
- );
- AO22x1_ASAP7_75t_R \U$1263 (
- .A1(b_registered[5]),
- .A2(\sel_0$1698 ),
- .B1(b_registered[6]),
- .B2(\sel_1$1699 ),
- .Y(\t$2321 )
- );
- XOR2x1_ASAP7_75t_R \U$1264 (
- .A(\t$2321 ),
- .B(a_registered[21]),
- .Y(booth_b20_m6)
- );
- AO22x1_ASAP7_75t_R \U$1265 (
- .A1(b_registered[6]),
- .A2(\sel_0$1698 ),
- .B1(b_registered[7]),
- .B2(\sel_1$1699 ),
- .Y(\t$2322 )
- );
- XOR2x1_ASAP7_75t_R \U$1266 (
- .A(\t$2322 ),
- .B(a_registered[21]),
- .Y(booth_b20_m7)
- );
- AO22x1_ASAP7_75t_R \U$1267 (
- .A1(b_registered[7]),
- .A2(\sel_0$1698 ),
- .B1(b_registered[8]),
- .B2(\sel_1$1699 ),
- .Y(\t$2323 )
- );
- XOR2x1_ASAP7_75t_R \U$1268 (
- .A(\t$2323 ),
- .B(a_registered[21]),
- .Y(booth_b20_m8)
- );
- AO22x1_ASAP7_75t_R \U$1269 (
- .A1(b_registered[8]),
- .A2(\sel_0$1698 ),
- .B1(b_registered[9]),
- .B2(\sel_1$1699 ),
- .Y(\t$2324 )
- );
- XOR2x1_ASAP7_75t_R \U$1270 (
- .A(\t$2324 ),
- .B(a_registered[21]),
- .Y(booth_b20_m9)
- );
- AO22x1_ASAP7_75t_R \U$1271 (
- .A1(b_registered[9]),
- .A2(\sel_0$1698 ),
- .B1(b_registered[10]),
- .B2(\sel_1$1699 ),
- .Y(\t$2325 )
- );
- XOR2x1_ASAP7_75t_R \U$1272 (
- .A(\t$2325 ),
- .B(a_registered[21]),
- .Y(booth_b20_m10)
- );
- AO22x1_ASAP7_75t_R \U$1273 (
- .A1(b_registered[10]),
- .A2(\sel_0$1698 ),
- .B1(b_registered[11]),
- .B2(\sel_1$1699 ),
- .Y(\t$2326 )
- );
- XOR2x1_ASAP7_75t_R \U$1274 (
- .A(\t$2326 ),
- .B(a_registered[21]),
- .Y(booth_b20_m11)
- );
- AO22x1_ASAP7_75t_R \U$1275 (
- .A1(b_registered[11]),
- .A2(\sel_0$1698 ),
- .B1(b_registered[12]),
- .B2(\sel_1$1699 ),
- .Y(\t$2327 )
- );
- XOR2x1_ASAP7_75t_R \U$1276 (
- .A(\t$2327 ),
- .B(a_registered[21]),
- .Y(booth_b20_m12)
- );
- AO22x1_ASAP7_75t_R \U$1277 (
- .A1(b_registered[12]),
- .A2(\sel_0$1698 ),
- .B1(b_registered[13]),
- .B2(\sel_1$1699 ),
- .Y(\t$2328 )
- );
- XOR2x1_ASAP7_75t_R \U$1278 (
- .A(\t$2328 ),
- .B(a_registered[21]),
- .Y(booth_b20_m13)
- );
- AO22x1_ASAP7_75t_R \U$1279 (
- .A1(b_registered[13]),
- .A2(\sel_0$1698 ),
- .B1(b_registered[14]),
- .B2(\sel_1$1699 ),
- .Y(\t$2329 )
- );
- XOR2x1_ASAP7_75t_R \U$1280 (
- .A(\t$2329 ),
- .B(a_registered[21]),
- .Y(booth_b20_m14)
- );
- AO22x1_ASAP7_75t_R \U$1281 (
- .A1(b_registered[14]),
- .A2(\sel_0$1698 ),
- .B1(b_registered[15]),
- .B2(\sel_1$1699 ),
- .Y(\t$2330 )
- );
- XOR2x1_ASAP7_75t_R \U$1282 (
- .A(\t$2330 ),
- .B(a_registered[21]),
- .Y(booth_b20_m15)
- );
- AO22x1_ASAP7_75t_R \U$1283 (
- .A1(b_registered[15]),
- .A2(\sel_0$1698 ),
- .B1(b_registered[16]),
- .B2(\sel_1$1699 ),
- .Y(\t$2331 )
- );
- XOR2x1_ASAP7_75t_R \U$1284 (
- .A(\t$2331 ),
- .B(a_registered[21]),
- .Y(booth_b20_m16)
- );
- AO22x1_ASAP7_75t_R \U$1285 (
- .A1(b_registered[16]),
- .A2(\sel_0$1698 ),
- .B1(b_registered[17]),
- .B2(\sel_1$1699 ),
- .Y(\t$2332 )
- );
- XOR2x1_ASAP7_75t_R \U$1286 (
- .A(\t$2332 ),
- .B(a_registered[21]),
- .Y(booth_b20_m17)
- );
- AO22x1_ASAP7_75t_R \U$1287 (
- .A1(b_registered[17]),
- .A2(\sel_0$1698 ),
- .B1(b_registered[18]),
- .B2(\sel_1$1699 ),
- .Y(\t$2333 )
- );
- XOR2x1_ASAP7_75t_R \U$1288 (
- .A(\t$2333 ),
- .B(a_registered[21]),
- .Y(booth_b20_m18)
- );
- AO22x1_ASAP7_75t_R \U$1289 (
- .A1(b_registered[18]),
- .A2(\sel_0$1698 ),
- .B1(b_registered[19]),
- .B2(\sel_1$1699 ),
- .Y(\t$2334 )
- );
- XOR2x1_ASAP7_75t_R \U$1290 (
- .A(\t$2334 ),
- .B(a_registered[21]),
- .Y(booth_b20_m19)
- );
- AO22x1_ASAP7_75t_R \U$1291 (
- .A1(b_registered[19]),
- .A2(\sel_0$1698 ),
- .B1(b_registered[20]),
- .B2(\sel_1$1699 ),
- .Y(\t$2335 )
- );
- XOR2x1_ASAP7_75t_R \U$1292 (
- .A(\t$2335 ),
- .B(a_registered[21]),
- .Y(booth_b20_m20)
- );
- AO22x1_ASAP7_75t_R \U$1293 (
- .A1(b_registered[20]),
- .A2(\sel_0$1698 ),
- .B1(b_registered[21]),
- .B2(\sel_1$1699 ),
- .Y(\t$2336 )
- );
- XOR2x1_ASAP7_75t_R \U$1294 (
- .A(\t$2336 ),
- .B(a_registered[21]),
- .Y(booth_b20_m21)
- );
- AO22x1_ASAP7_75t_R \U$1295 (
- .A1(b_registered[21]),
- .A2(\sel_0$1698 ),
- .B1(b_registered[22]),
- .B2(\sel_1$1699 ),
- .Y(\t$2337 )
- );
- XOR2x1_ASAP7_75t_R \U$1296 (
- .A(\t$2337 ),
- .B(a_registered[21]),
- .Y(booth_b20_m22)
- );
- AO22x1_ASAP7_75t_R \U$1297 (
- .A1(b_registered[22]),
- .A2(\sel_0$1698 ),
- .B1(b_registered[23]),
- .B2(\sel_1$1699 ),
- .Y(\t$2338 )
- );
- XOR2x1_ASAP7_75t_R \U$1298 (
- .A(\t$2338 ),
- .B(a_registered[21]),
- .Y(booth_b20_m23)
- );
- AO22x1_ASAP7_75t_R \U$1299 (
- .A1(b_registered[23]),
- .A2(\sel_0$1698 ),
- .B1(b_registered[24]),
- .B2(\sel_1$1699 ),
- .Y(\t$2339 )
- );
- XOR2x1_ASAP7_75t_R \U$1300 (
- .A(\t$2339 ),
- .B(a_registered[21]),
- .Y(booth_b20_m24)
- );
- AO22x1_ASAP7_75t_R \U$1301 (
- .A1(b_registered[24]),
- .A2(\sel_0$1698 ),
- .B1(b_registered[25]),
- .B2(\sel_1$1699 ),
- .Y(\t$2340 )
- );
- XOR2x1_ASAP7_75t_R \U$1302 (
- .A(\t$2340 ),
- .B(a_registered[21]),
- .Y(booth_b20_m25)
- );
- AO22x1_ASAP7_75t_R \U$1303 (
- .A1(b_registered[25]),
- .A2(\sel_0$1698 ),
- .B1(b_registered[26]),
- .B2(\sel_1$1699 ),
- .Y(\t$2341 )
- );
- XOR2x1_ASAP7_75t_R \U$1304 (
- .A(\t$2341 ),
- .B(a_registered[21]),
- .Y(booth_b20_m26)
- );
- AO22x1_ASAP7_75t_R \U$1305 (
- .A1(b_registered[26]),
- .A2(\sel_0$1698 ),
- .B1(b_registered[27]),
- .B2(\sel_1$1699 ),
- .Y(\t$2342 )
- );
- XOR2x1_ASAP7_75t_R \U$1306 (
- .A(\t$2342 ),
- .B(a_registered[21]),
- .Y(booth_b20_m27)
- );
- AO22x1_ASAP7_75t_R \U$1307 (
- .A1(b_registered[27]),
- .A2(\sel_0$1698 ),
- .B1(b_registered[28]),
- .B2(\sel_1$1699 ),
- .Y(\t$2343 )
- );
- XOR2x1_ASAP7_75t_R \U$1308 (
- .A(\t$2343 ),
- .B(a_registered[21]),
- .Y(booth_b20_m28)
- );
- AO22x1_ASAP7_75t_R \U$1309 (
- .A1(b_registered[28]),
- .A2(\sel_0$1698 ),
- .B1(b_registered[29]),
- .B2(\sel_1$1699 ),
- .Y(\t$2344 )
- );
- XOR2x1_ASAP7_75t_R \U$1310 (
- .A(\t$2344 ),
- .B(a_registered[21]),
- .Y(booth_b20_m29)
- );
- AO22x1_ASAP7_75t_R \U$1311 (
- .A1(b_registered[29]),
- .A2(\sel_0$1698 ),
- .B1(b_registered[30]),
- .B2(\sel_1$1699 ),
- .Y(\t$2345 )
- );
- XOR2x1_ASAP7_75t_R \U$1312 (
- .A(\t$2345 ),
- .B(a_registered[21]),
- .Y(booth_b20_m30)
- );
- AO22x1_ASAP7_75t_R \U$1313 (
- .A1(b_registered[30]),
- .A2(\sel_0$1698 ),
- .B1(b_registered[31]),
- .B2(\sel_1$1699 ),
- .Y(\t$2346 )
- );
- XOR2x1_ASAP7_75t_R \U$1314 (
- .A(\t$2346 ),
- .B(a_registered[21]),
- .Y(booth_b20_m31)
- );
- AO22x1_ASAP7_75t_R \U$1315 (
- .A1(b_registered[31]),
- .A2(\sel_0$1698 ),
- .B1(1'h0),
- .B2(\sel_1$1699 ),
- .Y(\t$2347 )
- );
- XOR2x1_ASAP7_75t_R \U$1316 (
- .A(\t$2347 ),
- .B(a_registered[21]),
- .Y(booth_b20_m32)
- );
- INVx1_ASAP7_75t_R \U$1317 (
- .A(a_registered[21]),
- .Y(\notsign$1100 )
- );
- INVx1_ASAP7_75t_R \U$1318 (
- .A(a_registered[21]),
- .Y(\$34 )
- );
- INVx1_ASAP7_75t_R \U$1319 (
- .A(a_registered[22]),
- .Y(\$35 )
- );
- INVx1_ASAP7_75t_R \U$1320 (
- .A(a_registered[23]),
- .Y(\$36 )
- );
- AO33x2_ASAP7_75t_R \U$1321 (
- .A1(\$36 ),
- .A2(a_registered[22]),
- .A3(a_registered[21]),
- .B1(a_registered[23]),
- .B2(\$35 ),
- .B3(\$34 ),
- .Y(\sel_0$1735 )
- );
- XOR2x1_ASAP7_75t_R \U$1322 (
- .A(a_registered[22]),
- .B(a_registered[21]),
- .Y(\sel_1$1736 )
- );
- AO22x1_ASAP7_75t_R \U$1323 (
- .A1(1'h0),
- .A2(\sel_0$1735 ),
- .B1(b_registered[0]),
- .B2(\sel_1$1736 ),
- .Y(\t$2349 )
- );
- XOR2x1_ASAP7_75t_R \U$1324 (
- .A(\t$2349 ),
- .B(a_registered[23]),
- .Y(booth_b22_m0)
- );
- AO22x1_ASAP7_75t_R \U$1325 (
- .A1(b_registered[0]),
- .A2(\sel_0$1735 ),
- .B1(b_registered[1]),
- .B2(\sel_1$1736 ),
- .Y(\t$2350 )
- );
- XOR2x1_ASAP7_75t_R \U$1326 (
- .A(\t$2350 ),
- .B(a_registered[23]),
- .Y(booth_b22_m1)
- );
- AO22x1_ASAP7_75t_R \U$1327 (
- .A1(b_registered[1]),
- .A2(\sel_0$1735 ),
- .B1(b_registered[2]),
- .B2(\sel_1$1736 ),
- .Y(\t$2351 )
- );
- XOR2x1_ASAP7_75t_R \U$1328 (
- .A(\t$2351 ),
- .B(a_registered[23]),
- .Y(booth_b22_m2)
- );
- AO22x1_ASAP7_75t_R \U$1329 (
- .A1(b_registered[2]),
- .A2(\sel_0$1735 ),
- .B1(b_registered[3]),
- .B2(\sel_1$1736 ),
- .Y(\t$2352 )
- );
- XOR2x1_ASAP7_75t_R \U$1330 (
- .A(\t$2352 ),
- .B(a_registered[23]),
- .Y(booth_b22_m3)
- );
- AO22x1_ASAP7_75t_R \U$1331 (
- .A1(b_registered[3]),
- .A2(\sel_0$1735 ),
- .B1(b_registered[4]),
- .B2(\sel_1$1736 ),
- .Y(\t$2353 )
- );
- XOR2x1_ASAP7_75t_R \U$1332 (
- .A(\t$2353 ),
- .B(a_registered[23]),
- .Y(booth_b22_m4)
- );
- AO22x1_ASAP7_75t_R \U$1333 (
- .A1(b_registered[4]),
- .A2(\sel_0$1735 ),
- .B1(b_registered[5]),
- .B2(\sel_1$1736 ),
- .Y(\t$2354 )
- );
- XOR2x1_ASAP7_75t_R \U$1334 (
- .A(\t$2354 ),
- .B(a_registered[23]),
- .Y(booth_b22_m5)
- );
- AO22x1_ASAP7_75t_R \U$1335 (
- .A1(b_registered[5]),
- .A2(\sel_0$1735 ),
- .B1(b_registered[6]),
- .B2(\sel_1$1736 ),
- .Y(\t$2355 )
- );
- XOR2x1_ASAP7_75t_R \U$1336 (
- .A(\t$2355 ),
- .B(a_registered[23]),
- .Y(booth_b22_m6)
- );
- AO22x1_ASAP7_75t_R \U$1337 (
- .A1(b_registered[6]),
- .A2(\sel_0$1735 ),
- .B1(b_registered[7]),
- .B2(\sel_1$1736 ),
- .Y(\t$2356 )
- );
- XOR2x1_ASAP7_75t_R \U$1338 (
- .A(\t$2356 ),
- .B(a_registered[23]),
- .Y(booth_b22_m7)
- );
- AO22x1_ASAP7_75t_R \U$1339 (
- .A1(b_registered[7]),
- .A2(\sel_0$1735 ),
- .B1(b_registered[8]),
- .B2(\sel_1$1736 ),
- .Y(\t$2357 )
- );
- XOR2x1_ASAP7_75t_R \U$1340 (
- .A(\t$2357 ),
- .B(a_registered[23]),
- .Y(booth_b22_m8)
- );
- AO22x1_ASAP7_75t_R \U$1341 (
- .A1(b_registered[8]),
- .A2(\sel_0$1735 ),
- .B1(b_registered[9]),
- .B2(\sel_1$1736 ),
- .Y(\t$2358 )
- );
- XOR2x1_ASAP7_75t_R \U$1342 (
- .A(\t$2358 ),
- .B(a_registered[23]),
- .Y(booth_b22_m9)
- );
- AO22x1_ASAP7_75t_R \U$1343 (
- .A1(b_registered[9]),
- .A2(\sel_0$1735 ),
- .B1(b_registered[10]),
- .B2(\sel_1$1736 ),
- .Y(\t$2359 )
- );
- XOR2x1_ASAP7_75t_R \U$1344 (
- .A(\t$2359 ),
- .B(a_registered[23]),
- .Y(booth_b22_m10)
- );
- AO22x1_ASAP7_75t_R \U$1345 (
- .A1(b_registered[10]),
- .A2(\sel_0$1735 ),
- .B1(b_registered[11]),
- .B2(\sel_1$1736 ),
- .Y(\t$2360 )
- );
- XOR2x1_ASAP7_75t_R \U$1346 (
- .A(\t$2360 ),
- .B(a_registered[23]),
- .Y(booth_b22_m11)
- );
- AO22x1_ASAP7_75t_R \U$1347 (
- .A1(b_registered[11]),
- .A2(\sel_0$1735 ),
- .B1(b_registered[12]),
- .B2(\sel_1$1736 ),
- .Y(\t$2361 )
- );
- XOR2x1_ASAP7_75t_R \U$1348 (
- .A(\t$2361 ),
- .B(a_registered[23]),
- .Y(booth_b22_m12)
- );
- AO22x1_ASAP7_75t_R \U$1349 (
- .A1(b_registered[12]),
- .A2(\sel_0$1735 ),
- .B1(b_registered[13]),
- .B2(\sel_1$1736 ),
- .Y(\t$2362 )
- );
- XOR2x1_ASAP7_75t_R \U$1350 (
- .A(\t$2362 ),
- .B(a_registered[23]),
- .Y(booth_b22_m13)
- );
- AO22x1_ASAP7_75t_R \U$1351 (
- .A1(b_registered[13]),
- .A2(\sel_0$1735 ),
- .B1(b_registered[14]),
- .B2(\sel_1$1736 ),
- .Y(\t$2363 )
- );
- XOR2x1_ASAP7_75t_R \U$1352 (
- .A(\t$2363 ),
- .B(a_registered[23]),
- .Y(booth_b22_m14)
- );
- AO22x1_ASAP7_75t_R \U$1353 (
- .A1(b_registered[14]),
- .A2(\sel_0$1735 ),
- .B1(b_registered[15]),
- .B2(\sel_1$1736 ),
- .Y(\t$2364 )
- );
- XOR2x1_ASAP7_75t_R \U$1354 (
- .A(\t$2364 ),
- .B(a_registered[23]),
- .Y(booth_b22_m15)
- );
- AO22x1_ASAP7_75t_R \U$1355 (
- .A1(b_registered[15]),
- .A2(\sel_0$1735 ),
- .B1(b_registered[16]),
- .B2(\sel_1$1736 ),
- .Y(\t$2365 )
- );
- XOR2x1_ASAP7_75t_R \U$1356 (
- .A(\t$2365 ),
- .B(a_registered[23]),
- .Y(booth_b22_m16)
- );
- AO22x1_ASAP7_75t_R \U$1357 (
- .A1(b_registered[16]),
- .A2(\sel_0$1735 ),
- .B1(b_registered[17]),
- .B2(\sel_1$1736 ),
- .Y(\t$2366 )
- );
- XOR2x1_ASAP7_75t_R \U$1358 (
- .A(\t$2366 ),
- .B(a_registered[23]),
- .Y(booth_b22_m17)
- );
- AO22x1_ASAP7_75t_R \U$1359 (
- .A1(b_registered[17]),
- .A2(\sel_0$1735 ),
- .B1(b_registered[18]),
- .B2(\sel_1$1736 ),
- .Y(\t$2367 )
- );
- XOR2x1_ASAP7_75t_R \U$1360 (
- .A(\t$2367 ),
- .B(a_registered[23]),
- .Y(booth_b22_m18)
- );
- AO22x1_ASAP7_75t_R \U$1361 (
- .A1(b_registered[18]),
- .A2(\sel_0$1735 ),
- .B1(b_registered[19]),
- .B2(\sel_1$1736 ),
- .Y(\t$2368 )
- );
- XOR2x1_ASAP7_75t_R \U$1362 (
- .A(\t$2368 ),
- .B(a_registered[23]),
- .Y(booth_b22_m19)
- );
- AO22x1_ASAP7_75t_R \U$1363 (
- .A1(b_registered[19]),
- .A2(\sel_0$1735 ),
- .B1(b_registered[20]),
- .B2(\sel_1$1736 ),
- .Y(\t$2369 )
- );
- XOR2x1_ASAP7_75t_R \U$1364 (
- .A(\t$2369 ),
- .B(a_registered[23]),
- .Y(booth_b22_m20)
- );
- AO22x1_ASAP7_75t_R \U$1365 (
- .A1(b_registered[20]),
- .A2(\sel_0$1735 ),
- .B1(b_registered[21]),
- .B2(\sel_1$1736 ),
- .Y(\t$2370 )
- );
- XOR2x1_ASAP7_75t_R \U$1366 (
- .A(\t$2370 ),
- .B(a_registered[23]),
- .Y(booth_b22_m21)
- );
- AO22x1_ASAP7_75t_R \U$1367 (
- .A1(b_registered[21]),
- .A2(\sel_0$1735 ),
- .B1(b_registered[22]),
- .B2(\sel_1$1736 ),
- .Y(\t$2371 )
- );
- XOR2x1_ASAP7_75t_R \U$1368 (
- .A(\t$2371 ),
- .B(a_registered[23]),
- .Y(booth_b22_m22)
- );
- AO22x1_ASAP7_75t_R \U$1369 (
- .A1(b_registered[22]),
- .A2(\sel_0$1735 ),
- .B1(b_registered[23]),
- .B2(\sel_1$1736 ),
- .Y(\t$2372 )
- );
- XOR2x1_ASAP7_75t_R \U$1370 (
- .A(\t$2372 ),
- .B(a_registered[23]),
- .Y(booth_b22_m23)
- );
- AO22x1_ASAP7_75t_R \U$1371 (
- .A1(b_registered[23]),
- .A2(\sel_0$1735 ),
- .B1(b_registered[24]),
- .B2(\sel_1$1736 ),
- .Y(\t$2373 )
- );
- XOR2x1_ASAP7_75t_R \U$1372 (
- .A(\t$2373 ),
- .B(a_registered[23]),
- .Y(booth_b22_m24)
- );
- AO22x1_ASAP7_75t_R \U$1373 (
- .A1(b_registered[24]),
- .A2(\sel_0$1735 ),
- .B1(b_registered[25]),
- .B2(\sel_1$1736 ),
- .Y(\t$2374 )
- );
- XOR2x1_ASAP7_75t_R \U$1374 (
- .A(\t$2374 ),
- .B(a_registered[23]),
- .Y(booth_b22_m25)
- );
- AO22x1_ASAP7_75t_R \U$1375 (
- .A1(b_registered[25]),
- .A2(\sel_0$1735 ),
- .B1(b_registered[26]),
- .B2(\sel_1$1736 ),
- .Y(\t$2375 )
- );
- XOR2x1_ASAP7_75t_R \U$1376 (
- .A(\t$2375 ),
- .B(a_registered[23]),
- .Y(booth_b22_m26)
- );
- AO22x1_ASAP7_75t_R \U$1377 (
- .A1(b_registered[26]),
- .A2(\sel_0$1735 ),
- .B1(b_registered[27]),
- .B2(\sel_1$1736 ),
- .Y(\t$2376 )
- );
- XOR2x1_ASAP7_75t_R \U$1378 (
- .A(\t$2376 ),
- .B(a_registered[23]),
- .Y(booth_b22_m27)
- );
- AO22x1_ASAP7_75t_R \U$1379 (
- .A1(b_registered[27]),
- .A2(\sel_0$1735 ),
- .B1(b_registered[28]),
- .B2(\sel_1$1736 ),
- .Y(\t$2377 )
- );
- XOR2x1_ASAP7_75t_R \U$1380 (
- .A(\t$2377 ),
- .B(a_registered[23]),
- .Y(booth_b22_m28)
- );
- AO22x1_ASAP7_75t_R \U$1381 (
- .A1(b_registered[28]),
- .A2(\sel_0$1735 ),
- .B1(b_registered[29]),
- .B2(\sel_1$1736 ),
- .Y(\t$2378 )
- );
- XOR2x1_ASAP7_75t_R \U$1382 (
- .A(\t$2378 ),
- .B(a_registered[23]),
- .Y(booth_b22_m29)
- );
- AO22x1_ASAP7_75t_R \U$1383 (
- .A1(b_registered[29]),
- .A2(\sel_0$1735 ),
- .B1(b_registered[30]),
- .B2(\sel_1$1736 ),
- .Y(\t$2379 )
- );
- XOR2x1_ASAP7_75t_R \U$1384 (
- .A(\t$2379 ),
- .B(a_registered[23]),
- .Y(booth_b22_m30)
- );
- AO22x1_ASAP7_75t_R \U$1385 (
- .A1(b_registered[30]),
- .A2(\sel_0$1735 ),
- .B1(b_registered[31]),
- .B2(\sel_1$1736 ),
- .Y(\t$2380 )
- );
- XOR2x1_ASAP7_75t_R \U$1386 (
- .A(\t$2380 ),
- .B(a_registered[23]),
- .Y(booth_b22_m31)
- );
- AO22x1_ASAP7_75t_R \U$1387 (
- .A1(b_registered[31]),
- .A2(\sel_0$1735 ),
- .B1(1'h0),
- .B2(\sel_1$1736 ),
- .Y(\t$2381 )
- );
- XOR2x1_ASAP7_75t_R \U$1388 (
- .A(\t$2381 ),
- .B(a_registered[23]),
- .Y(booth_b22_m32)
- );
- INVx1_ASAP7_75t_R \U$1389 (
- .A(a_registered[23]),
- .Y(\notsign$1126 )
- );
- INVx1_ASAP7_75t_R \U$1390 (
- .A(a_registered[23]),
- .Y(\$37 )
- );
- INVx1_ASAP7_75t_R \U$1391 (
- .A(a_registered[24]),
- .Y(\$38 )
- );
- INVx1_ASAP7_75t_R \U$1392 (
- .A(a_registered[25]),
- .Y(\$39 )
- );
- AO33x2_ASAP7_75t_R \U$1393 (
- .A1(\$39 ),
- .A2(a_registered[24]),
- .A3(a_registered[23]),
- .B1(a_registered[25]),
- .B2(\$38 ),
- .B3(\$37 ),
- .Y(\sel_0$1772 )
- );
- XOR2x1_ASAP7_75t_R \U$1394 (
- .A(a_registered[24]),
- .B(a_registered[23]),
- .Y(\sel_1$1773 )
- );
- AO22x1_ASAP7_75t_R \U$1395 (
- .A1(1'h0),
- .A2(\sel_0$1772 ),
- .B1(b_registered[0]),
- .B2(\sel_1$1773 ),
- .Y(\t$2383 )
- );
- XOR2x1_ASAP7_75t_R \U$1396 (
- .A(\t$2383 ),
- .B(a_registered[25]),
- .Y(booth_b24_m0)
- );
- AO22x1_ASAP7_75t_R \U$1397 (
- .A1(b_registered[0]),
- .A2(\sel_0$1772 ),
- .B1(b_registered[1]),
- .B2(\sel_1$1773 ),
- .Y(\t$2384 )
- );
- XOR2x1_ASAP7_75t_R \U$1398 (
- .A(\t$2384 ),
- .B(a_registered[25]),
- .Y(booth_b24_m1)
- );
- AO22x1_ASAP7_75t_R \U$1399 (
- .A1(b_registered[1]),
- .A2(\sel_0$1772 ),
- .B1(b_registered[2]),
- .B2(\sel_1$1773 ),
- .Y(\t$2385 )
- );
- XOR2x1_ASAP7_75t_R \U$1400 (
- .A(\t$2385 ),
- .B(a_registered[25]),
- .Y(booth_b24_m2)
- );
- AO22x1_ASAP7_75t_R \U$1401 (
- .A1(b_registered[2]),
- .A2(\sel_0$1772 ),
- .B1(b_registered[3]),
- .B2(\sel_1$1773 ),
- .Y(\t$2386 )
- );
- XOR2x1_ASAP7_75t_R \U$1402 (
- .A(\t$2386 ),
- .B(a_registered[25]),
- .Y(booth_b24_m3)
- );
- AO22x1_ASAP7_75t_R \U$1403 (
- .A1(b_registered[3]),
- .A2(\sel_0$1772 ),
- .B1(b_registered[4]),
- .B2(\sel_1$1773 ),
- .Y(\t$2387 )
- );
- XOR2x1_ASAP7_75t_R \U$1404 (
- .A(\t$2387 ),
- .B(a_registered[25]),
- .Y(booth_b24_m4)
- );
- AO22x1_ASAP7_75t_R \U$1405 (
- .A1(b_registered[4]),
- .A2(\sel_0$1772 ),
- .B1(b_registered[5]),
- .B2(\sel_1$1773 ),
- .Y(\t$2388 )
- );
- XOR2x1_ASAP7_75t_R \U$1406 (
- .A(\t$2388 ),
- .B(a_registered[25]),
- .Y(booth_b24_m5)
- );
- AO22x1_ASAP7_75t_R \U$1407 (
- .A1(b_registered[5]),
- .A2(\sel_0$1772 ),
- .B1(b_registered[6]),
- .B2(\sel_1$1773 ),
- .Y(\t$2389 )
- );
- XOR2x1_ASAP7_75t_R \U$1408 (
- .A(\t$2389 ),
- .B(a_registered[25]),
- .Y(booth_b24_m6)
- );
- AO22x1_ASAP7_75t_R \U$1409 (
- .A1(b_registered[6]),
- .A2(\sel_0$1772 ),
- .B1(b_registered[7]),
- .B2(\sel_1$1773 ),
- .Y(\t$2390 )
- );
- XOR2x1_ASAP7_75t_R \U$1410 (
- .A(\t$2390 ),
- .B(a_registered[25]),
- .Y(booth_b24_m7)
- );
- AO22x1_ASAP7_75t_R \U$1411 (
- .A1(b_registered[7]),
- .A2(\sel_0$1772 ),
- .B1(b_registered[8]),
- .B2(\sel_1$1773 ),
- .Y(\t$2391 )
- );
- XOR2x1_ASAP7_75t_R \U$1412 (
- .A(\t$2391 ),
- .B(a_registered[25]),
- .Y(booth_b24_m8)
- );
- AO22x1_ASAP7_75t_R \U$1413 (
- .A1(b_registered[8]),
- .A2(\sel_0$1772 ),
- .B1(b_registered[9]),
- .B2(\sel_1$1773 ),
- .Y(\t$2392 )
- );
- XOR2x1_ASAP7_75t_R \U$1414 (
- .A(\t$2392 ),
- .B(a_registered[25]),
- .Y(booth_b24_m9)
- );
- AO22x1_ASAP7_75t_R \U$1415 (
- .A1(b_registered[9]),
- .A2(\sel_0$1772 ),
- .B1(b_registered[10]),
- .B2(\sel_1$1773 ),
- .Y(\t$2393 )
- );
- XOR2x1_ASAP7_75t_R \U$1416 (
- .A(\t$2393 ),
- .B(a_registered[25]),
- .Y(booth_b24_m10)
- );
- AO22x1_ASAP7_75t_R \U$1417 (
- .A1(b_registered[10]),
- .A2(\sel_0$1772 ),
- .B1(b_registered[11]),
- .B2(\sel_1$1773 ),
- .Y(\t$2394 )
- );
- XOR2x1_ASAP7_75t_R \U$1418 (
- .A(\t$2394 ),
- .B(a_registered[25]),
- .Y(booth_b24_m11)
- );
- AO22x1_ASAP7_75t_R \U$1419 (
- .A1(b_registered[11]),
- .A2(\sel_0$1772 ),
- .B1(b_registered[12]),
- .B2(\sel_1$1773 ),
- .Y(\t$2395 )
- );
- XOR2x1_ASAP7_75t_R \U$1420 (
- .A(\t$2395 ),
- .B(a_registered[25]),
- .Y(booth_b24_m12)
- );
- AO22x1_ASAP7_75t_R \U$1421 (
- .A1(b_registered[12]),
- .A2(\sel_0$1772 ),
- .B1(b_registered[13]),
- .B2(\sel_1$1773 ),
- .Y(\t$2396 )
- );
- XOR2x1_ASAP7_75t_R \U$1422 (
- .A(\t$2396 ),
- .B(a_registered[25]),
- .Y(booth_b24_m13)
- );
- AO22x1_ASAP7_75t_R \U$1423 (
- .A1(b_registered[13]),
- .A2(\sel_0$1772 ),
- .B1(b_registered[14]),
- .B2(\sel_1$1773 ),
- .Y(\t$2397 )
- );
- XOR2x1_ASAP7_75t_R \U$1424 (
- .A(\t$2397 ),
- .B(a_registered[25]),
- .Y(booth_b24_m14)
- );
- AO22x1_ASAP7_75t_R \U$1425 (
- .A1(b_registered[14]),
- .A2(\sel_0$1772 ),
- .B1(b_registered[15]),
- .B2(\sel_1$1773 ),
- .Y(\t$2398 )
- );
- XOR2x1_ASAP7_75t_R \U$1426 (
- .A(\t$2398 ),
- .B(a_registered[25]),
- .Y(booth_b24_m15)
- );
- AO22x1_ASAP7_75t_R \U$1427 (
- .A1(b_registered[15]),
- .A2(\sel_0$1772 ),
- .B1(b_registered[16]),
- .B2(\sel_1$1773 ),
- .Y(\t$2399 )
- );
- XOR2x1_ASAP7_75t_R \U$1428 (
- .A(\t$2399 ),
- .B(a_registered[25]),
- .Y(booth_b24_m16)
- );
- AO22x1_ASAP7_75t_R \U$1429 (
- .A1(b_registered[16]),
- .A2(\sel_0$1772 ),
- .B1(b_registered[17]),
- .B2(\sel_1$1773 ),
- .Y(\t$2400 )
- );
- XOR2x1_ASAP7_75t_R \U$1430 (
- .A(\t$2400 ),
- .B(a_registered[25]),
- .Y(booth_b24_m17)
- );
- AO22x1_ASAP7_75t_R \U$1431 (
- .A1(b_registered[17]),
- .A2(\sel_0$1772 ),
- .B1(b_registered[18]),
- .B2(\sel_1$1773 ),
- .Y(\t$2401 )
- );
- XOR2x1_ASAP7_75t_R \U$1432 (
- .A(\t$2401 ),
- .B(a_registered[25]),
- .Y(booth_b24_m18)
- );
- AO22x1_ASAP7_75t_R \U$1433 (
- .A1(b_registered[18]),
- .A2(\sel_0$1772 ),
- .B1(b_registered[19]),
- .B2(\sel_1$1773 ),
- .Y(\t$2402 )
- );
- XOR2x1_ASAP7_75t_R \U$1434 (
- .A(\t$2402 ),
- .B(a_registered[25]),
- .Y(booth_b24_m19)
- );
- AO22x1_ASAP7_75t_R \U$1435 (
- .A1(b_registered[19]),
- .A2(\sel_0$1772 ),
- .B1(b_registered[20]),
- .B2(\sel_1$1773 ),
- .Y(\t$2403 )
- );
- XOR2x1_ASAP7_75t_R \U$1436 (
- .A(\t$2403 ),
- .B(a_registered[25]),
- .Y(booth_b24_m20)
- );
- AO22x1_ASAP7_75t_R \U$1437 (
- .A1(b_registered[20]),
- .A2(\sel_0$1772 ),
- .B1(b_registered[21]),
- .B2(\sel_1$1773 ),
- .Y(\t$2404 )
- );
- XOR2x1_ASAP7_75t_R \U$1438 (
- .A(\t$2404 ),
- .B(a_registered[25]),
- .Y(booth_b24_m21)
- );
- AO22x1_ASAP7_75t_R \U$1439 (
- .A1(b_registered[21]),
- .A2(\sel_0$1772 ),
- .B1(b_registered[22]),
- .B2(\sel_1$1773 ),
- .Y(\t$2405 )
- );
- XOR2x1_ASAP7_75t_R \U$1440 (
- .A(\t$2405 ),
- .B(a_registered[25]),
- .Y(booth_b24_m22)
- );
- AO22x1_ASAP7_75t_R \U$1441 (
- .A1(b_registered[22]),
- .A2(\sel_0$1772 ),
- .B1(b_registered[23]),
- .B2(\sel_1$1773 ),
- .Y(\t$2406 )
- );
- XOR2x1_ASAP7_75t_R \U$1442 (
- .A(\t$2406 ),
- .B(a_registered[25]),
- .Y(booth_b24_m23)
- );
- AO22x1_ASAP7_75t_R \U$1443 (
- .A1(b_registered[23]),
- .A2(\sel_0$1772 ),
- .B1(b_registered[24]),
- .B2(\sel_1$1773 ),
- .Y(\t$2407 )
- );
- XOR2x1_ASAP7_75t_R \U$1444 (
- .A(\t$2407 ),
- .B(a_registered[25]),
- .Y(booth_b24_m24)
- );
- AO22x1_ASAP7_75t_R \U$1445 (
- .A1(b_registered[24]),
- .A2(\sel_0$1772 ),
- .B1(b_registered[25]),
- .B2(\sel_1$1773 ),
- .Y(\t$2408 )
- );
- XOR2x1_ASAP7_75t_R \U$1446 (
- .A(\t$2408 ),
- .B(a_registered[25]),
- .Y(booth_b24_m25)
- );
- AO22x1_ASAP7_75t_R \U$1447 (
- .A1(b_registered[25]),
- .A2(\sel_0$1772 ),
- .B1(b_registered[26]),
- .B2(\sel_1$1773 ),
- .Y(\t$2409 )
- );
- XOR2x1_ASAP7_75t_R \U$1448 (
- .A(\t$2409 ),
- .B(a_registered[25]),
- .Y(booth_b24_m26)
- );
- AO22x1_ASAP7_75t_R \U$1449 (
- .A1(b_registered[26]),
- .A2(\sel_0$1772 ),
- .B1(b_registered[27]),
- .B2(\sel_1$1773 ),
- .Y(\t$2410 )
- );
- XOR2x1_ASAP7_75t_R \U$1450 (
- .A(\t$2410 ),
- .B(a_registered[25]),
- .Y(booth_b24_m27)
- );
- AO22x1_ASAP7_75t_R \U$1451 (
- .A1(b_registered[27]),
- .A2(\sel_0$1772 ),
- .B1(b_registered[28]),
- .B2(\sel_1$1773 ),
- .Y(\t$2411 )
- );
- XOR2x1_ASAP7_75t_R \U$1452 (
- .A(\t$2411 ),
- .B(a_registered[25]),
- .Y(booth_b24_m28)
- );
- AO22x1_ASAP7_75t_R \U$1453 (
- .A1(b_registered[28]),
- .A2(\sel_0$1772 ),
- .B1(b_registered[29]),
- .B2(\sel_1$1773 ),
- .Y(\t$2412 )
- );
- XOR2x1_ASAP7_75t_R \U$1454 (
- .A(\t$2412 ),
- .B(a_registered[25]),
- .Y(booth_b24_m29)
- );
- AO22x1_ASAP7_75t_R \U$1455 (
- .A1(b_registered[29]),
- .A2(\sel_0$1772 ),
- .B1(b_registered[30]),
- .B2(\sel_1$1773 ),
- .Y(\t$2413 )
- );
- XOR2x1_ASAP7_75t_R \U$1456 (
- .A(\t$2413 ),
- .B(a_registered[25]),
- .Y(booth_b24_m30)
- );
- AO22x1_ASAP7_75t_R \U$1457 (
- .A1(b_registered[30]),
- .A2(\sel_0$1772 ),
- .B1(b_registered[31]),
- .B2(\sel_1$1773 ),
- .Y(\t$2414 )
- );
- XOR2x1_ASAP7_75t_R \U$1458 (
- .A(\t$2414 ),
- .B(a_registered[25]),
- .Y(booth_b24_m31)
- );
- AO22x1_ASAP7_75t_R \U$1459 (
- .A1(b_registered[31]),
- .A2(\sel_0$1772 ),
- .B1(1'h0),
- .B2(\sel_1$1773 ),
- .Y(\t$2415 )
- );
- XOR2x1_ASAP7_75t_R \U$1460 (
- .A(\t$2415 ),
- .B(a_registered[25]),
- .Y(booth_b24_m32)
- );
- INVx1_ASAP7_75t_R \U$1461 (
- .A(a_registered[25]),
- .Y(\notsign$1148 )
- );
- INVx1_ASAP7_75t_R \U$1462 (
- .A(a_registered[25]),
- .Y(\$40 )
- );
- INVx1_ASAP7_75t_R \U$1463 (
- .A(a_registered[26]),
- .Y(\$41 )
- );
- INVx1_ASAP7_75t_R \U$1464 (
- .A(a_registered[27]),
- .Y(\$42 )
- );
- AO33x2_ASAP7_75t_R \U$1465 (
- .A1(\$42 ),
- .A2(a_registered[26]),
- .A3(a_registered[25]),
- .B1(a_registered[27]),
- .B2(\$41 ),
- .B3(\$40 ),
- .Y(\sel_0$1809 )
- );
- XOR2x1_ASAP7_75t_R \U$1466 (
- .A(a_registered[26]),
- .B(a_registered[25]),
- .Y(\sel_1$1810 )
- );
- AO22x1_ASAP7_75t_R \U$1467 (
- .A1(1'h0),
- .A2(\sel_0$1809 ),
- .B1(b_registered[0]),
- .B2(\sel_1$1810 ),
- .Y(\t$2417 )
- );
- XOR2x1_ASAP7_75t_R \U$1468 (
- .A(\t$2417 ),
- .B(a_registered[27]),
- .Y(booth_b26_m0)
- );
- AO22x1_ASAP7_75t_R \U$1469 (
- .A1(b_registered[0]),
- .A2(\sel_0$1809 ),
- .B1(b_registered[1]),
- .B2(\sel_1$1810 ),
- .Y(\t$2418 )
- );
- XOR2x1_ASAP7_75t_R \U$1470 (
- .A(\t$2418 ),
- .B(a_registered[27]),
- .Y(booth_b26_m1)
- );
- AO22x1_ASAP7_75t_R \U$1471 (
- .A1(b_registered[1]),
- .A2(\sel_0$1809 ),
- .B1(b_registered[2]),
- .B2(\sel_1$1810 ),
- .Y(\t$2419 )
- );
- XOR2x1_ASAP7_75t_R \U$1472 (
- .A(\t$2419 ),
- .B(a_registered[27]),
- .Y(booth_b26_m2)
- );
- AO22x1_ASAP7_75t_R \U$1473 (
- .A1(b_registered[2]),
- .A2(\sel_0$1809 ),
- .B1(b_registered[3]),
- .B2(\sel_1$1810 ),
- .Y(\t$2420 )
- );
- XOR2x1_ASAP7_75t_R \U$1474 (
- .A(\t$2420 ),
- .B(a_registered[27]),
- .Y(booth_b26_m3)
- );
- AO22x1_ASAP7_75t_R \U$1475 (
- .A1(b_registered[3]),
- .A2(\sel_0$1809 ),
- .B1(b_registered[4]),
- .B2(\sel_1$1810 ),
- .Y(\t$2421 )
- );
- XOR2x1_ASAP7_75t_R \U$1476 (
- .A(\t$2421 ),
- .B(a_registered[27]),
- .Y(booth_b26_m4)
- );
- AO22x1_ASAP7_75t_R \U$1477 (
- .A1(b_registered[4]),
- .A2(\sel_0$1809 ),
- .B1(b_registered[5]),
- .B2(\sel_1$1810 ),
- .Y(\t$2422 )
- );
- XOR2x1_ASAP7_75t_R \U$1478 (
- .A(\t$2422 ),
- .B(a_registered[27]),
- .Y(booth_b26_m5)
- );
- AO22x1_ASAP7_75t_R \U$1479 (
- .A1(b_registered[5]),
- .A2(\sel_0$1809 ),
- .B1(b_registered[6]),
- .B2(\sel_1$1810 ),
- .Y(\t$2423 )
- );
- XOR2x1_ASAP7_75t_R \U$1480 (
- .A(\t$2423 ),
- .B(a_registered[27]),
- .Y(booth_b26_m6)
- );
- AO22x1_ASAP7_75t_R \U$1481 (
- .A1(b_registered[6]),
- .A2(\sel_0$1809 ),
- .B1(b_registered[7]),
- .B2(\sel_1$1810 ),
- .Y(\t$2424 )
- );
- XOR2x1_ASAP7_75t_R \U$1482 (
- .A(\t$2424 ),
- .B(a_registered[27]),
- .Y(booth_b26_m7)
- );
- AO22x1_ASAP7_75t_R \U$1483 (
- .A1(b_registered[7]),
- .A2(\sel_0$1809 ),
- .B1(b_registered[8]),
- .B2(\sel_1$1810 ),
- .Y(\t$2425 )
- );
- XOR2x1_ASAP7_75t_R \U$1484 (
- .A(\t$2425 ),
- .B(a_registered[27]),
- .Y(booth_b26_m8)
- );
- AO22x1_ASAP7_75t_R \U$1485 (
- .A1(b_registered[8]),
- .A2(\sel_0$1809 ),
- .B1(b_registered[9]),
- .B2(\sel_1$1810 ),
- .Y(\t$2426 )
- );
- XOR2x1_ASAP7_75t_R \U$1486 (
- .A(\t$2426 ),
- .B(a_registered[27]),
- .Y(booth_b26_m9)
- );
- AO22x1_ASAP7_75t_R \U$1487 (
- .A1(b_registered[9]),
- .A2(\sel_0$1809 ),
- .B1(b_registered[10]),
- .B2(\sel_1$1810 ),
- .Y(\t$2427 )
- );
- XOR2x1_ASAP7_75t_R \U$1488 (
- .A(\t$2427 ),
- .B(a_registered[27]),
- .Y(booth_b26_m10)
- );
- AO22x1_ASAP7_75t_R \U$1489 (
- .A1(b_registered[10]),
- .A2(\sel_0$1809 ),
- .B1(b_registered[11]),
- .B2(\sel_1$1810 ),
- .Y(\t$2428 )
- );
- XOR2x1_ASAP7_75t_R \U$1490 (
- .A(\t$2428 ),
- .B(a_registered[27]),
- .Y(booth_b26_m11)
- );
- AO22x1_ASAP7_75t_R \U$1491 (
- .A1(b_registered[11]),
- .A2(\sel_0$1809 ),
- .B1(b_registered[12]),
- .B2(\sel_1$1810 ),
- .Y(\t$2429 )
- );
- XOR2x1_ASAP7_75t_R \U$1492 (
- .A(\t$2429 ),
- .B(a_registered[27]),
- .Y(booth_b26_m12)
- );
- AO22x1_ASAP7_75t_R \U$1493 (
- .A1(b_registered[12]),
- .A2(\sel_0$1809 ),
- .B1(b_registered[13]),
- .B2(\sel_1$1810 ),
- .Y(\t$2430 )
- );
- XOR2x1_ASAP7_75t_R \U$1494 (
- .A(\t$2430 ),
- .B(a_registered[27]),
- .Y(booth_b26_m13)
- );
- AO22x1_ASAP7_75t_R \U$1495 (
- .A1(b_registered[13]),
- .A2(\sel_0$1809 ),
- .B1(b_registered[14]),
- .B2(\sel_1$1810 ),
- .Y(\t$2431 )
- );
- XOR2x1_ASAP7_75t_R \U$1496 (
- .A(\t$2431 ),
- .B(a_registered[27]),
- .Y(booth_b26_m14)
- );
- AO22x1_ASAP7_75t_R \U$1497 (
- .A1(b_registered[14]),
- .A2(\sel_0$1809 ),
- .B1(b_registered[15]),
- .B2(\sel_1$1810 ),
- .Y(\t$2432 )
- );
- XOR2x1_ASAP7_75t_R \U$1498 (
- .A(\t$2432 ),
- .B(a_registered[27]),
- .Y(booth_b26_m15)
- );
- AO22x1_ASAP7_75t_R \U$1499 (
- .A1(b_registered[15]),
- .A2(\sel_0$1809 ),
- .B1(b_registered[16]),
- .B2(\sel_1$1810 ),
- .Y(\t$2433 )
- );
- XOR2x1_ASAP7_75t_R \U$1500 (
- .A(\t$2433 ),
- .B(a_registered[27]),
- .Y(booth_b26_m16)
- );
- AO22x1_ASAP7_75t_R \U$1501 (
- .A1(b_registered[16]),
- .A2(\sel_0$1809 ),
- .B1(b_registered[17]),
- .B2(\sel_1$1810 ),
- .Y(\t$2434 )
- );
- XOR2x1_ASAP7_75t_R \U$1502 (
- .A(\t$2434 ),
- .B(a_registered[27]),
- .Y(booth_b26_m17)
- );
- AO22x1_ASAP7_75t_R \U$1503 (
- .A1(b_registered[17]),
- .A2(\sel_0$1809 ),
- .B1(b_registered[18]),
- .B2(\sel_1$1810 ),
- .Y(\t$2435 )
- );
- XOR2x1_ASAP7_75t_R \U$1504 (
- .A(\t$2435 ),
- .B(a_registered[27]),
- .Y(booth_b26_m18)
- );
- AO22x1_ASAP7_75t_R \U$1505 (
- .A1(b_registered[18]),
- .A2(\sel_0$1809 ),
- .B1(b_registered[19]),
- .B2(\sel_1$1810 ),
- .Y(\t$2436 )
- );
- XOR2x1_ASAP7_75t_R \U$1506 (
- .A(\t$2436 ),
- .B(a_registered[27]),
- .Y(booth_b26_m19)
- );
- AO22x1_ASAP7_75t_R \U$1507 (
- .A1(b_registered[19]),
- .A2(\sel_0$1809 ),
- .B1(b_registered[20]),
- .B2(\sel_1$1810 ),
- .Y(\t$2437 )
- );
- XOR2x1_ASAP7_75t_R \U$1508 (
- .A(\t$2437 ),
- .B(a_registered[27]),
- .Y(booth_b26_m20)
- );
- AO22x1_ASAP7_75t_R \U$1509 (
- .A1(b_registered[20]),
- .A2(\sel_0$1809 ),
- .B1(b_registered[21]),
- .B2(\sel_1$1810 ),
- .Y(\t$2438 )
- );
- XOR2x1_ASAP7_75t_R \U$1510 (
- .A(\t$2438 ),
- .B(a_registered[27]),
- .Y(booth_b26_m21)
- );
- AO22x1_ASAP7_75t_R \U$1511 (
- .A1(b_registered[21]),
- .A2(\sel_0$1809 ),
- .B1(b_registered[22]),
- .B2(\sel_1$1810 ),
- .Y(\t$2439 )
- );
- XOR2x1_ASAP7_75t_R \U$1512 (
- .A(\t$2439 ),
- .B(a_registered[27]),
- .Y(booth_b26_m22)
- );
- AO22x1_ASAP7_75t_R \U$1513 (
- .A1(b_registered[22]),
- .A2(\sel_0$1809 ),
- .B1(b_registered[23]),
- .B2(\sel_1$1810 ),
- .Y(\t$2440 )
- );
- XOR2x1_ASAP7_75t_R \U$1514 (
- .A(\t$2440 ),
- .B(a_registered[27]),
- .Y(booth_b26_m23)
- );
- AO22x1_ASAP7_75t_R \U$1515 (
- .A1(b_registered[23]),
- .A2(\sel_0$1809 ),
- .B1(b_registered[24]),
- .B2(\sel_1$1810 ),
- .Y(\t$2441 )
- );
- XOR2x1_ASAP7_75t_R \U$1516 (
- .A(\t$2441 ),
- .B(a_registered[27]),
- .Y(booth_b26_m24)
- );
- AO22x1_ASAP7_75t_R \U$1517 (
- .A1(b_registered[24]),
- .A2(\sel_0$1809 ),
- .B1(b_registered[25]),
- .B2(\sel_1$1810 ),
- .Y(\t$2442 )
- );
- XOR2x1_ASAP7_75t_R \U$1518 (
- .A(\t$2442 ),
- .B(a_registered[27]),
- .Y(booth_b26_m25)
- );
- AO22x1_ASAP7_75t_R \U$1519 (
- .A1(b_registered[25]),
- .A2(\sel_0$1809 ),
- .B1(b_registered[26]),
- .B2(\sel_1$1810 ),
- .Y(\t$2443 )
- );
- XOR2x1_ASAP7_75t_R \U$1520 (
- .A(\t$2443 ),
- .B(a_registered[27]),
- .Y(booth_b26_m26)
- );
- AO22x1_ASAP7_75t_R \U$1521 (
- .A1(b_registered[26]),
- .A2(\sel_0$1809 ),
- .B1(b_registered[27]),
- .B2(\sel_1$1810 ),
- .Y(\t$2444 )
- );
- XOR2x1_ASAP7_75t_R \U$1522 (
- .A(\t$2444 ),
- .B(a_registered[27]),
- .Y(booth_b26_m27)
- );
- AO22x1_ASAP7_75t_R \U$1523 (
- .A1(b_registered[27]),
- .A2(\sel_0$1809 ),
- .B1(b_registered[28]),
- .B2(\sel_1$1810 ),
- .Y(\t$2445 )
- );
- XOR2x1_ASAP7_75t_R \U$1524 (
- .A(\t$2445 ),
- .B(a_registered[27]),
- .Y(booth_b26_m28)
- );
- AO22x1_ASAP7_75t_R \U$1525 (
- .A1(b_registered[28]),
- .A2(\sel_0$1809 ),
- .B1(b_registered[29]),
- .B2(\sel_1$1810 ),
- .Y(\t$2446 )
- );
- XOR2x1_ASAP7_75t_R \U$1526 (
- .A(\t$2446 ),
- .B(a_registered[27]),
- .Y(booth_b26_m29)
- );
- AO22x1_ASAP7_75t_R \U$1527 (
- .A1(b_registered[29]),
- .A2(\sel_0$1809 ),
- .B1(b_registered[30]),
- .B2(\sel_1$1810 ),
- .Y(\t$2447 )
- );
- XOR2x1_ASAP7_75t_R \U$1528 (
- .A(\t$2447 ),
- .B(a_registered[27]),
- .Y(booth_b26_m30)
- );
- AO22x1_ASAP7_75t_R \U$1529 (
- .A1(b_registered[30]),
- .A2(\sel_0$1809 ),
- .B1(b_registered[31]),
- .B2(\sel_1$1810 ),
- .Y(\t$2448 )
- );
- XOR2x1_ASAP7_75t_R \U$1530 (
- .A(\t$2448 ),
- .B(a_registered[27]),
- .Y(booth_b26_m31)
- );
- AO22x1_ASAP7_75t_R \U$1531 (
- .A1(b_registered[31]),
- .A2(\sel_0$1809 ),
- .B1(1'h0),
- .B2(\sel_1$1810 ),
- .Y(\t$2449 )
- );
- XOR2x1_ASAP7_75t_R \U$1532 (
- .A(\t$2449 ),
- .B(a_registered[27]),
- .Y(booth_b26_m32)
- );
- INVx1_ASAP7_75t_R \U$1533 (
- .A(a_registered[27]),
- .Y(\notsign$1166 )
- );
- INVx1_ASAP7_75t_R \U$1534 (
- .A(a_registered[27]),
- .Y(\$43 )
- );
- INVx1_ASAP7_75t_R \U$1535 (
- .A(a_registered[28]),
- .Y(\$44 )
- );
- INVx1_ASAP7_75t_R \U$1536 (
- .A(a_registered[29]),
- .Y(\$45 )
- );
- AO33x2_ASAP7_75t_R \U$1537 (
- .A1(\$45 ),
- .A2(a_registered[28]),
- .A3(a_registered[27]),
- .B1(a_registered[29]),
- .B2(\$44 ),
- .B3(\$43 ),
- .Y(\sel_0$1846 )
- );
- XOR2x1_ASAP7_75t_R \U$1538 (
- .A(a_registered[28]),
- .B(a_registered[27]),
- .Y(\sel_1$1847 )
- );
- AO22x1_ASAP7_75t_R \U$1539 (
- .A1(1'h0),
- .A2(\sel_0$1846 ),
- .B1(b_registered[0]),
- .B2(\sel_1$1847 ),
- .Y(\t$2451 )
- );
- XOR2x1_ASAP7_75t_R \U$1540 (
- .A(\t$2451 ),
- .B(a_registered[29]),
- .Y(booth_b28_m0)
- );
- AO22x1_ASAP7_75t_R \U$1541 (
- .A1(b_registered[0]),
- .A2(\sel_0$1846 ),
- .B1(b_registered[1]),
- .B2(\sel_1$1847 ),
- .Y(\t$2452 )
- );
- XOR2x1_ASAP7_75t_R \U$1542 (
- .A(\t$2452 ),
- .B(a_registered[29]),
- .Y(booth_b28_m1)
- );
- AO22x1_ASAP7_75t_R \U$1543 (
- .A1(b_registered[1]),
- .A2(\sel_0$1846 ),
- .B1(b_registered[2]),
- .B2(\sel_1$1847 ),
- .Y(\t$2453 )
- );
- XOR2x1_ASAP7_75t_R \U$1544 (
- .A(\t$2453 ),
- .B(a_registered[29]),
- .Y(booth_b28_m2)
- );
- AO22x1_ASAP7_75t_R \U$1545 (
- .A1(b_registered[2]),
- .A2(\sel_0$1846 ),
- .B1(b_registered[3]),
- .B2(\sel_1$1847 ),
- .Y(\t$2454 )
- );
- XOR2x1_ASAP7_75t_R \U$1546 (
- .A(\t$2454 ),
- .B(a_registered[29]),
- .Y(booth_b28_m3)
- );
- AO22x1_ASAP7_75t_R \U$1547 (
- .A1(b_registered[3]),
- .A2(\sel_0$1846 ),
- .B1(b_registered[4]),
- .B2(\sel_1$1847 ),
- .Y(\t$2455 )
- );
- XOR2x1_ASAP7_75t_R \U$1548 (
- .A(\t$2455 ),
- .B(a_registered[29]),
- .Y(booth_b28_m4)
- );
- AO22x1_ASAP7_75t_R \U$1549 (
- .A1(b_registered[4]),
- .A2(\sel_0$1846 ),
- .B1(b_registered[5]),
- .B2(\sel_1$1847 ),
- .Y(\t$2456 )
- );
- XOR2x1_ASAP7_75t_R \U$1550 (
- .A(\t$2456 ),
- .B(a_registered[29]),
- .Y(booth_b28_m5)
- );
- AO22x1_ASAP7_75t_R \U$1551 (
- .A1(b_registered[5]),
- .A2(\sel_0$1846 ),
- .B1(b_registered[6]),
- .B2(\sel_1$1847 ),
- .Y(\t$2457 )
- );
- XOR2x1_ASAP7_75t_R \U$1552 (
- .A(\t$2457 ),
- .B(a_registered[29]),
- .Y(booth_b28_m6)
- );
- AO22x1_ASAP7_75t_R \U$1553 (
- .A1(b_registered[6]),
- .A2(\sel_0$1846 ),
- .B1(b_registered[7]),
- .B2(\sel_1$1847 ),
- .Y(\t$2458 )
- );
- XOR2x1_ASAP7_75t_R \U$1554 (
- .A(\t$2458 ),
- .B(a_registered[29]),
- .Y(booth_b28_m7)
- );
- AO22x1_ASAP7_75t_R \U$1555 (
- .A1(b_registered[7]),
- .A2(\sel_0$1846 ),
- .B1(b_registered[8]),
- .B2(\sel_1$1847 ),
- .Y(\t$2459 )
- );
- XOR2x1_ASAP7_75t_R \U$1556 (
- .A(\t$2459 ),
- .B(a_registered[29]),
- .Y(booth_b28_m8)
- );
- AO22x1_ASAP7_75t_R \U$1557 (
- .A1(b_registered[8]),
- .A2(\sel_0$1846 ),
- .B1(b_registered[9]),
- .B2(\sel_1$1847 ),
- .Y(\t$2460 )
- );
- XOR2x1_ASAP7_75t_R \U$1558 (
- .A(\t$2460 ),
- .B(a_registered[29]),
- .Y(booth_b28_m9)
- );
- AO22x1_ASAP7_75t_R \U$1559 (
- .A1(b_registered[9]),
- .A2(\sel_0$1846 ),
- .B1(b_registered[10]),
- .B2(\sel_1$1847 ),
- .Y(\t$2461 )
- );
- XOR2x1_ASAP7_75t_R \U$1560 (
- .A(\t$2461 ),
- .B(a_registered[29]),
- .Y(booth_b28_m10)
- );
- AO22x1_ASAP7_75t_R \U$1561 (
- .A1(b_registered[10]),
- .A2(\sel_0$1846 ),
- .B1(b_registered[11]),
- .B2(\sel_1$1847 ),
- .Y(\t$2462 )
- );
- XOR2x1_ASAP7_75t_R \U$1562 (
- .A(\t$2462 ),
- .B(a_registered[29]),
- .Y(booth_b28_m11)
- );
- AO22x1_ASAP7_75t_R \U$1563 (
- .A1(b_registered[11]),
- .A2(\sel_0$1846 ),
- .B1(b_registered[12]),
- .B2(\sel_1$1847 ),
- .Y(\t$2463 )
- );
- XOR2x1_ASAP7_75t_R \U$1564 (
- .A(\t$2463 ),
- .B(a_registered[29]),
- .Y(booth_b28_m12)
- );
- AO22x1_ASAP7_75t_R \U$1565 (
- .A1(b_registered[12]),
- .A2(\sel_0$1846 ),
- .B1(b_registered[13]),
- .B2(\sel_1$1847 ),
- .Y(\t$2464 )
- );
- XOR2x1_ASAP7_75t_R \U$1566 (
- .A(\t$2464 ),
- .B(a_registered[29]),
- .Y(booth_b28_m13)
- );
- AO22x1_ASAP7_75t_R \U$1567 (
- .A1(b_registered[13]),
- .A2(\sel_0$1846 ),
- .B1(b_registered[14]),
- .B2(\sel_1$1847 ),
- .Y(\t$2465 )
- );
- XOR2x1_ASAP7_75t_R \U$1568 (
- .A(\t$2465 ),
- .B(a_registered[29]),
- .Y(booth_b28_m14)
- );
- AO22x1_ASAP7_75t_R \U$1569 (
- .A1(b_registered[14]),
- .A2(\sel_0$1846 ),
- .B1(b_registered[15]),
- .B2(\sel_1$1847 ),
- .Y(\t$2466 )
- );
- XOR2x1_ASAP7_75t_R \U$1570 (
- .A(\t$2466 ),
- .B(a_registered[29]),
- .Y(booth_b28_m15)
- );
- AO22x1_ASAP7_75t_R \U$1571 (
- .A1(b_registered[15]),
- .A2(\sel_0$1846 ),
- .B1(b_registered[16]),
- .B2(\sel_1$1847 ),
- .Y(\t$2467 )
- );
- XOR2x1_ASAP7_75t_R \U$1572 (
- .A(\t$2467 ),
- .B(a_registered[29]),
- .Y(booth_b28_m16)
- );
- AO22x1_ASAP7_75t_R \U$1573 (
- .A1(b_registered[16]),
- .A2(\sel_0$1846 ),
- .B1(b_registered[17]),
- .B2(\sel_1$1847 ),
- .Y(\t$2468 )
- );
- XOR2x1_ASAP7_75t_R \U$1574 (
- .A(\t$2468 ),
- .B(a_registered[29]),
- .Y(booth_b28_m17)
- );
- AO22x1_ASAP7_75t_R \U$1575 (
- .A1(b_registered[17]),
- .A2(\sel_0$1846 ),
- .B1(b_registered[18]),
- .B2(\sel_1$1847 ),
- .Y(\t$2469 )
- );
- XOR2x1_ASAP7_75t_R \U$1576 (
- .A(\t$2469 ),
- .B(a_registered[29]),
- .Y(booth_b28_m18)
- );
- AO22x1_ASAP7_75t_R \U$1577 (
- .A1(b_registered[18]),
- .A2(\sel_0$1846 ),
- .B1(b_registered[19]),
- .B2(\sel_1$1847 ),
- .Y(\t$2470 )
- );
- XOR2x1_ASAP7_75t_R \U$1578 (
- .A(\t$2470 ),
- .B(a_registered[29]),
- .Y(booth_b28_m19)
- );
- AO22x1_ASAP7_75t_R \U$1579 (
- .A1(b_registered[19]),
- .A2(\sel_0$1846 ),
- .B1(b_registered[20]),
- .B2(\sel_1$1847 ),
- .Y(\t$2471 )
- );
- XOR2x1_ASAP7_75t_R \U$1580 (
- .A(\t$2471 ),
- .B(a_registered[29]),
- .Y(booth_b28_m20)
- );
- AO22x1_ASAP7_75t_R \U$1581 (
- .A1(b_registered[20]),
- .A2(\sel_0$1846 ),
- .B1(b_registered[21]),
- .B2(\sel_1$1847 ),
- .Y(\t$2472 )
- );
- XOR2x1_ASAP7_75t_R \U$1582 (
- .A(\t$2472 ),
- .B(a_registered[29]),
- .Y(booth_b28_m21)
- );
- AO22x1_ASAP7_75t_R \U$1583 (
- .A1(b_registered[21]),
- .A2(\sel_0$1846 ),
- .B1(b_registered[22]),
- .B2(\sel_1$1847 ),
- .Y(\t$2473 )
- );
- XOR2x1_ASAP7_75t_R \U$1584 (
- .A(\t$2473 ),
- .B(a_registered[29]),
- .Y(booth_b28_m22)
- );
- AO22x1_ASAP7_75t_R \U$1585 (
- .A1(b_registered[22]),
- .A2(\sel_0$1846 ),
- .B1(b_registered[23]),
- .B2(\sel_1$1847 ),
- .Y(\t$2474 )
- );
- XOR2x1_ASAP7_75t_R \U$1586 (
- .A(\t$2474 ),
- .B(a_registered[29]),
- .Y(booth_b28_m23)
- );
- AO22x1_ASAP7_75t_R \U$1587 (
- .A1(b_registered[23]),
- .A2(\sel_0$1846 ),
- .B1(b_registered[24]),
- .B2(\sel_1$1847 ),
- .Y(\t$2475 )
- );
- XOR2x1_ASAP7_75t_R \U$1588 (
- .A(\t$2475 ),
- .B(a_registered[29]),
- .Y(booth_b28_m24)
- );
- AO22x1_ASAP7_75t_R \U$1589 (
- .A1(b_registered[24]),
- .A2(\sel_0$1846 ),
- .B1(b_registered[25]),
- .B2(\sel_1$1847 ),
- .Y(\t$2476 )
- );
- XOR2x1_ASAP7_75t_R \U$1590 (
- .A(\t$2476 ),
- .B(a_registered[29]),
- .Y(booth_b28_m25)
- );
- AO22x1_ASAP7_75t_R \U$1591 (
- .A1(b_registered[25]),
- .A2(\sel_0$1846 ),
- .B1(b_registered[26]),
- .B2(\sel_1$1847 ),
- .Y(\t$2477 )
- );
- XOR2x1_ASAP7_75t_R \U$1592 (
- .A(\t$2477 ),
- .B(a_registered[29]),
- .Y(booth_b28_m26)
- );
- AO22x1_ASAP7_75t_R \U$1593 (
- .A1(b_registered[26]),
- .A2(\sel_0$1846 ),
- .B1(b_registered[27]),
- .B2(\sel_1$1847 ),
- .Y(\t$2478 )
- );
- XOR2x1_ASAP7_75t_R \U$1594 (
- .A(\t$2478 ),
- .B(a_registered[29]),
- .Y(booth_b28_m27)
- );
- AO22x1_ASAP7_75t_R \U$1595 (
- .A1(b_registered[27]),
- .A2(\sel_0$1846 ),
- .B1(b_registered[28]),
- .B2(\sel_1$1847 ),
- .Y(\t$2479 )
- );
- XOR2x1_ASAP7_75t_R \U$1596 (
- .A(\t$2479 ),
- .B(a_registered[29]),
- .Y(booth_b28_m28)
- );
- AO22x1_ASAP7_75t_R \U$1597 (
- .A1(b_registered[28]),
- .A2(\sel_0$1846 ),
- .B1(b_registered[29]),
- .B2(\sel_1$1847 ),
- .Y(\t$2480 )
- );
- XOR2x1_ASAP7_75t_R \U$1598 (
- .A(\t$2480 ),
- .B(a_registered[29]),
- .Y(booth_b28_m29)
- );
- AO22x1_ASAP7_75t_R \U$1599 (
- .A1(b_registered[29]),
- .A2(\sel_0$1846 ),
- .B1(b_registered[30]),
- .B2(\sel_1$1847 ),
- .Y(\t$2481 )
- );
- XOR2x1_ASAP7_75t_R \U$1600 (
- .A(\t$2481 ),
- .B(a_registered[29]),
- .Y(booth_b28_m30)
- );
- AO22x1_ASAP7_75t_R \U$1601 (
- .A1(b_registered[30]),
- .A2(\sel_0$1846 ),
- .B1(b_registered[31]),
- .B2(\sel_1$1847 ),
- .Y(\t$2482 )
- );
- XOR2x1_ASAP7_75t_R \U$1602 (
- .A(\t$2482 ),
- .B(a_registered[29]),
- .Y(booth_b28_m31)
- );
- AO22x1_ASAP7_75t_R \U$1603 (
- .A1(b_registered[31]),
- .A2(\sel_0$1846 ),
- .B1(1'h0),
- .B2(\sel_1$1847 ),
- .Y(\t$2483 )
- );
- XOR2x1_ASAP7_75t_R \U$1604 (
- .A(\t$2483 ),
- .B(a_registered[29]),
- .Y(booth_b28_m32)
- );
- INVx1_ASAP7_75t_R \U$1605 (
- .A(a_registered[29]),
- .Y(\notsign$1180 )
- );
- INVx1_ASAP7_75t_R \U$1606 (
- .A(a_registered[29]),
- .Y(\$46 )
- );
- INVx1_ASAP7_75t_R \U$1607 (
- .A(a_registered[30]),
- .Y(\$47 )
- );
- INVx1_ASAP7_75t_R \U$1608 (
- .A(a_registered[31]),
- .Y(\$48 )
- );
- AO33x2_ASAP7_75t_R \U$1609 (
- .A1(\$48 ),
- .A2(a_registered[30]),
- .A3(a_registered[29]),
- .B1(a_registered[31]),
- .B2(\$47 ),
- .B3(\$46 ),
- .Y(\sel_0$1883 )
- );
- XOR2x1_ASAP7_75t_R \U$1610 (
- .A(a_registered[30]),
- .B(a_registered[29]),
- .Y(\sel_1$1884 )
- );
- AO22x1_ASAP7_75t_R \U$1611 (
- .A1(1'h0),
- .A2(\sel_0$1883 ),
- .B1(b_registered[0]),
- .B2(\sel_1$1884 ),
- .Y(\t$2485 )
- );
- XOR2x1_ASAP7_75t_R \U$1612 (
- .A(\t$2485 ),
- .B(a_registered[31]),
- .Y(booth_b30_m0)
- );
- AO22x1_ASAP7_75t_R \U$1613 (
- .A1(b_registered[0]),
- .A2(\sel_0$1883 ),
- .B1(b_registered[1]),
- .B2(\sel_1$1884 ),
- .Y(\t$2486 )
- );
- XOR2x1_ASAP7_75t_R \U$1614 (
- .A(\t$2486 ),
- .B(a_registered[31]),
- .Y(booth_b30_m1)
- );
- AO22x1_ASAP7_75t_R \U$1615 (
- .A1(b_registered[1]),
- .A2(\sel_0$1883 ),
- .B1(b_registered[2]),
- .B2(\sel_1$1884 ),
- .Y(\t$2487 )
- );
- XOR2x1_ASAP7_75t_R \U$1616 (
- .A(\t$2487 ),
- .B(a_registered[31]),
- .Y(booth_b30_m2)
- );
- AO22x1_ASAP7_75t_R \U$1617 (
- .A1(b_registered[2]),
- .A2(\sel_0$1883 ),
- .B1(b_registered[3]),
- .B2(\sel_1$1884 ),
- .Y(\t$2488 )
- );
- XOR2x1_ASAP7_75t_R \U$1618 (
- .A(\t$2488 ),
- .B(a_registered[31]),
- .Y(booth_b30_m3)
- );
- AO22x1_ASAP7_75t_R \U$1619 (
- .A1(b_registered[3]),
- .A2(\sel_0$1883 ),
- .B1(b_registered[4]),
- .B2(\sel_1$1884 ),
- .Y(\t$2489 )
- );
- XOR2x1_ASAP7_75t_R \U$1620 (
- .A(\t$2489 ),
- .B(a_registered[31]),
- .Y(booth_b30_m4)
- );
- AO22x1_ASAP7_75t_R \U$1621 (
- .A1(b_registered[4]),
- .A2(\sel_0$1883 ),
- .B1(b_registered[5]),
- .B2(\sel_1$1884 ),
- .Y(\t$2490 )
- );
- XOR2x1_ASAP7_75t_R \U$1622 (
- .A(\t$2490 ),
- .B(a_registered[31]),
- .Y(booth_b30_m5)
- );
- AO22x1_ASAP7_75t_R \U$1623 (
- .A1(b_registered[5]),
- .A2(\sel_0$1883 ),
- .B1(b_registered[6]),
- .B2(\sel_1$1884 ),
- .Y(\t$2491 )
- );
- XOR2x1_ASAP7_75t_R \U$1624 (
- .A(\t$2491 ),
- .B(a_registered[31]),
- .Y(booth_b30_m6)
- );
- AO22x1_ASAP7_75t_R \U$1625 (
- .A1(b_registered[6]),
- .A2(\sel_0$1883 ),
- .B1(b_registered[7]),
- .B2(\sel_1$1884 ),
- .Y(\t$2492 )
- );
- XOR2x1_ASAP7_75t_R \U$1626 (
- .A(\t$2492 ),
- .B(a_registered[31]),
- .Y(booth_b30_m7)
- );
- AO22x1_ASAP7_75t_R \U$1627 (
- .A1(b_registered[7]),
- .A2(\sel_0$1883 ),
- .B1(b_registered[8]),
- .B2(\sel_1$1884 ),
- .Y(\t$2493 )
- );
- XOR2x1_ASAP7_75t_R \U$1628 (
- .A(\t$2493 ),
- .B(a_registered[31]),
- .Y(booth_b30_m8)
- );
- AO22x1_ASAP7_75t_R \U$1629 (
- .A1(b_registered[8]),
- .A2(\sel_0$1883 ),
- .B1(b_registered[9]),
- .B2(\sel_1$1884 ),
- .Y(\t$2494 )
- );
- XOR2x1_ASAP7_75t_R \U$1630 (
- .A(\t$2494 ),
- .B(a_registered[31]),
- .Y(booth_b30_m9)
- );
- AO22x1_ASAP7_75t_R \U$1631 (
- .A1(b_registered[9]),
- .A2(\sel_0$1883 ),
- .B1(b_registered[10]),
- .B2(\sel_1$1884 ),
- .Y(\t$2495 )
- );
- XOR2x1_ASAP7_75t_R \U$1632 (
- .A(\t$2495 ),
- .B(a_registered[31]),
- .Y(booth_b30_m10)
- );
- AO22x1_ASAP7_75t_R \U$1633 (
- .A1(b_registered[10]),
- .A2(\sel_0$1883 ),
- .B1(b_registered[11]),
- .B2(\sel_1$1884 ),
- .Y(\t$2496 )
- );
- XOR2x1_ASAP7_75t_R \U$1634 (
- .A(\t$2496 ),
- .B(a_registered[31]),
- .Y(booth_b30_m11)
- );
- AO22x1_ASAP7_75t_R \U$1635 (
- .A1(b_registered[11]),
- .A2(\sel_0$1883 ),
- .B1(b_registered[12]),
- .B2(\sel_1$1884 ),
- .Y(\t$2497 )
- );
- XOR2x1_ASAP7_75t_R \U$1636 (
- .A(\t$2497 ),
- .B(a_registered[31]),
- .Y(booth_b30_m12)
- );
- AO22x1_ASAP7_75t_R \U$1637 (
- .A1(b_registered[12]),
- .A2(\sel_0$1883 ),
- .B1(b_registered[13]),
- .B2(\sel_1$1884 ),
- .Y(\t$2498 )
- );
- XOR2x1_ASAP7_75t_R \U$1638 (
- .A(\t$2498 ),
- .B(a_registered[31]),
- .Y(booth_b30_m13)
- );
- AO22x1_ASAP7_75t_R \U$1639 (
- .A1(b_registered[13]),
- .A2(\sel_0$1883 ),
- .B1(b_registered[14]),
- .B2(\sel_1$1884 ),
- .Y(\t$2499 )
- );
- XOR2x1_ASAP7_75t_R \U$1640 (
- .A(\t$2499 ),
- .B(a_registered[31]),
- .Y(booth_b30_m14)
- );
- AO22x1_ASAP7_75t_R \U$1641 (
- .A1(b_registered[14]),
- .A2(\sel_0$1883 ),
- .B1(b_registered[15]),
- .B2(\sel_1$1884 ),
- .Y(\t$2500 )
- );
- XOR2x1_ASAP7_75t_R \U$1642 (
- .A(\t$2500 ),
- .B(a_registered[31]),
- .Y(booth_b30_m15)
- );
- AO22x1_ASAP7_75t_R \U$1643 (
- .A1(b_registered[15]),
- .A2(\sel_0$1883 ),
- .B1(b_registered[16]),
- .B2(\sel_1$1884 ),
- .Y(\t$2501 )
- );
- XOR2x1_ASAP7_75t_R \U$1644 (
- .A(\t$2501 ),
- .B(a_registered[31]),
- .Y(booth_b30_m16)
- );
- AO22x1_ASAP7_75t_R \U$1645 (
- .A1(b_registered[16]),
- .A2(\sel_0$1883 ),
- .B1(b_registered[17]),
- .B2(\sel_1$1884 ),
- .Y(\t$2502 )
- );
- XOR2x1_ASAP7_75t_R \U$1646 (
- .A(\t$2502 ),
- .B(a_registered[31]),
- .Y(booth_b30_m17)
- );
- AO22x1_ASAP7_75t_R \U$1647 (
- .A1(b_registered[17]),
- .A2(\sel_0$1883 ),
- .B1(b_registered[18]),
- .B2(\sel_1$1884 ),
- .Y(\t$2503 )
- );
- XOR2x1_ASAP7_75t_R \U$1648 (
- .A(\t$2503 ),
- .B(a_registered[31]),
- .Y(booth_b30_m18)
- );
- AO22x1_ASAP7_75t_R \U$1649 (
- .A1(b_registered[18]),
- .A2(\sel_0$1883 ),
- .B1(b_registered[19]),
- .B2(\sel_1$1884 ),
- .Y(\t$2504 )
- );
- XOR2x1_ASAP7_75t_R \U$1650 (
- .A(\t$2504 ),
- .B(a_registered[31]),
- .Y(booth_b30_m19)
- );
- AO22x1_ASAP7_75t_R \U$1651 (
- .A1(b_registered[19]),
- .A2(\sel_0$1883 ),
- .B1(b_registered[20]),
- .B2(\sel_1$1884 ),
- .Y(\t$2505 )
- );
- XOR2x1_ASAP7_75t_R \U$1652 (
- .A(\t$2505 ),
- .B(a_registered[31]),
- .Y(booth_b30_m20)
- );
- AO22x1_ASAP7_75t_R \U$1653 (
- .A1(b_registered[20]),
- .A2(\sel_0$1883 ),
- .B1(b_registered[21]),
- .B2(\sel_1$1884 ),
- .Y(\t$2506 )
- );
- XOR2x1_ASAP7_75t_R \U$1654 (
- .A(\t$2506 ),
- .B(a_registered[31]),
- .Y(booth_b30_m21)
- );
- AO22x1_ASAP7_75t_R \U$1655 (
- .A1(b_registered[21]),
- .A2(\sel_0$1883 ),
- .B1(b_registered[22]),
- .B2(\sel_1$1884 ),
- .Y(\t$2507 )
- );
- XOR2x1_ASAP7_75t_R \U$1656 (
- .A(\t$2507 ),
- .B(a_registered[31]),
- .Y(booth_b30_m22)
- );
- AO22x1_ASAP7_75t_R \U$1657 (
- .A1(b_registered[22]),
- .A2(\sel_0$1883 ),
- .B1(b_registered[23]),
- .B2(\sel_1$1884 ),
- .Y(\t$2508 )
- );
- XOR2x1_ASAP7_75t_R \U$1658 (
- .A(\t$2508 ),
- .B(a_registered[31]),
- .Y(booth_b30_m23)
- );
- AO22x1_ASAP7_75t_R \U$1659 (
- .A1(b_registered[23]),
- .A2(\sel_0$1883 ),
- .B1(b_registered[24]),
- .B2(\sel_1$1884 ),
- .Y(\t$2509 )
- );
- XOR2x1_ASAP7_75t_R \U$1660 (
- .A(\t$2509 ),
- .B(a_registered[31]),
- .Y(booth_b30_m24)
- );
- AO22x1_ASAP7_75t_R \U$1661 (
- .A1(b_registered[24]),
- .A2(\sel_0$1883 ),
- .B1(b_registered[25]),
- .B2(\sel_1$1884 ),
- .Y(\t$2510 )
- );
- XOR2x1_ASAP7_75t_R \U$1662 (
- .A(\t$2510 ),
- .B(a_registered[31]),
- .Y(booth_b30_m25)
- );
- AO22x1_ASAP7_75t_R \U$1663 (
- .A1(b_registered[25]),
- .A2(\sel_0$1883 ),
- .B1(b_registered[26]),
- .B2(\sel_1$1884 ),
- .Y(\t$2511 )
- );
- XOR2x1_ASAP7_75t_R \U$1664 (
- .A(\t$2511 ),
- .B(a_registered[31]),
- .Y(booth_b30_m26)
- );
- AO22x1_ASAP7_75t_R \U$1665 (
- .A1(b_registered[26]),
- .A2(\sel_0$1883 ),
- .B1(b_registered[27]),
- .B2(\sel_1$1884 ),
- .Y(\t$2512 )
- );
- XOR2x1_ASAP7_75t_R \U$1666 (
- .A(\t$2512 ),
- .B(a_registered[31]),
- .Y(booth_b30_m27)
- );
- AO22x1_ASAP7_75t_R \U$1667 (
- .A1(b_registered[27]),
- .A2(\sel_0$1883 ),
- .B1(b_registered[28]),
- .B2(\sel_1$1884 ),
- .Y(\t$2513 )
- );
- XOR2x1_ASAP7_75t_R \U$1668 (
- .A(\t$2513 ),
- .B(a_registered[31]),
- .Y(booth_b30_m28)
- );
- AO22x1_ASAP7_75t_R \U$1669 (
- .A1(b_registered[28]),
- .A2(\sel_0$1883 ),
- .B1(b_registered[29]),
- .B2(\sel_1$1884 ),
- .Y(\t$2514 )
- );
- XOR2x1_ASAP7_75t_R \U$1670 (
- .A(\t$2514 ),
- .B(a_registered[31]),
- .Y(booth_b30_m29)
- );
- AO22x1_ASAP7_75t_R \U$1671 (
- .A1(b_registered[29]),
- .A2(\sel_0$1883 ),
- .B1(b_registered[30]),
- .B2(\sel_1$1884 ),
- .Y(\t$2515 )
- );
- XOR2x1_ASAP7_75t_R \U$1672 (
- .A(\t$2515 ),
- .B(a_registered[31]),
- .Y(booth_b30_m30)
- );
- AO22x1_ASAP7_75t_R \U$1673 (
- .A1(b_registered[30]),
- .A2(\sel_0$1883 ),
- .B1(b_registered[31]),
- .B2(\sel_1$1884 ),
- .Y(\t$2516 )
- );
- XOR2x1_ASAP7_75t_R \U$1674 (
- .A(\t$2516 ),
- .B(a_registered[31]),
- .Y(booth_b30_m31)
- );
- AO22x1_ASAP7_75t_R \U$1675 (
- .A1(b_registered[31]),
- .A2(\sel_0$1883 ),
- .B1(1'h0),
- .B2(\sel_1$1884 ),
- .Y(\t$2517 )
- );
- XOR2x1_ASAP7_75t_R \U$1676 (
- .A(\t$2517 ),
- .B(a_registered[31]),
- .Y(booth_b30_m32)
- );
- INVx1_ASAP7_75t_R \U$1677 (
- .A(a_registered[31]),
- .Y(\notsign$1190 )
- );
- INVx1_ASAP7_75t_R \U$1678 (
- .A(a_registered[31]),
- .Y(\$49 )
- );
- INVx1_ASAP7_75t_R \U$1679 (
- .A(1'h0),
- .Y(\$50 )
- );
- INVx1_ASAP7_75t_R \U$1680 (
- .A(1'h0),
- .Y(\$51 )
- );
- AO33x2_ASAP7_75t_R \U$1681 (
- .A1(\$51 ),
- .A2(1'h0),
- .A3(a_registered[31]),
- .B1(1'h0),
- .B2(\$50 ),
- .B3(\$49 ),
- .Y(\sel_0$1921 )
- );
- XOR2x1_ASAP7_75t_R \U$1682 (
- .A(1'h0),
- .B(a_registered[31]),
- .Y(\sel_1$1922 )
- );
- AO22x1_ASAP7_75t_R \U$1683 (
- .A1(1'h0),
- .A2(\sel_0$1921 ),
- .B1(b_registered[0]),
- .B2(\sel_1$1922 ),
- .Y(\t$2519 )
- );
- XOR2x1_ASAP7_75t_R \U$1684 (
- .A(\t$2519 ),
- .B(1'h0),
- .Y(booth_b32_m0)
- );
- AO22x1_ASAP7_75t_R \U$1685 (
- .A1(b_registered[0]),
- .A2(\sel_0$1921 ),
- .B1(b_registered[1]),
- .B2(\sel_1$1922 ),
- .Y(\t$2520 )
- );
- XOR2x1_ASAP7_75t_R \U$1686 (
- .A(\t$2520 ),
- .B(1'h0),
- .Y(booth_b32_m1)
- );
- AO22x1_ASAP7_75t_R \U$1687 (
- .A1(b_registered[1]),
- .A2(\sel_0$1921 ),
- .B1(b_registered[2]),
- .B2(\sel_1$1922 ),
- .Y(\t$2521 )
- );
- XOR2x1_ASAP7_75t_R \U$1688 (
- .A(\t$2521 ),
- .B(1'h0),
- .Y(booth_b32_m2)
- );
- AO22x1_ASAP7_75t_R \U$1689 (
- .A1(b_registered[2]),
- .A2(\sel_0$1921 ),
- .B1(b_registered[3]),
- .B2(\sel_1$1922 ),
- .Y(\t$2522 )
- );
- XOR2x1_ASAP7_75t_R \U$1690 (
- .A(\t$2522 ),
- .B(1'h0),
- .Y(booth_b32_m3)
- );
- AO22x1_ASAP7_75t_R \U$1691 (
- .A1(b_registered[3]),
- .A2(\sel_0$1921 ),
- .B1(b_registered[4]),
- .B2(\sel_1$1922 ),
- .Y(\t$2523 )
- );
- XOR2x1_ASAP7_75t_R \U$1692 (
- .A(\t$2523 ),
- .B(1'h0),
- .Y(booth_b32_m4)
- );
- AO22x1_ASAP7_75t_R \U$1693 (
- .A1(b_registered[4]),
- .A2(\sel_0$1921 ),
- .B1(b_registered[5]),
- .B2(\sel_1$1922 ),
- .Y(\t$2524 )
- );
- XOR2x1_ASAP7_75t_R \U$1694 (
- .A(\t$2524 ),
- .B(1'h0),
- .Y(booth_b32_m5)
- );
- AO22x1_ASAP7_75t_R \U$1695 (
- .A1(b_registered[5]),
- .A2(\sel_0$1921 ),
- .B1(b_registered[6]),
- .B2(\sel_1$1922 ),
- .Y(\t$2525 )
- );
- XOR2x1_ASAP7_75t_R \U$1696 (
- .A(\t$2525 ),
- .B(1'h0),
- .Y(booth_b32_m6)
- );
- AO22x1_ASAP7_75t_R \U$1697 (
- .A1(b_registered[6]),
- .A2(\sel_0$1921 ),
- .B1(b_registered[7]),
- .B2(\sel_1$1922 ),
- .Y(\t$2526 )
- );
- XOR2x1_ASAP7_75t_R \U$1698 (
- .A(\t$2526 ),
- .B(1'h0),
- .Y(booth_b32_m7)
- );
- AO22x1_ASAP7_75t_R \U$1699 (
- .A1(b_registered[7]),
- .A2(\sel_0$1921 ),
- .B1(b_registered[8]),
- .B2(\sel_1$1922 ),
- .Y(\t$2527 )
- );
- XOR2x1_ASAP7_75t_R \U$1700 (
- .A(\t$2527 ),
- .B(1'h0),
- .Y(booth_b32_m8)
- );
- AO22x1_ASAP7_75t_R \U$1701 (
- .A1(b_registered[8]),
- .A2(\sel_0$1921 ),
- .B1(b_registered[9]),
- .B2(\sel_1$1922 ),
- .Y(\t$2528 )
- );
- XOR2x1_ASAP7_75t_R \U$1702 (
- .A(\t$2528 ),
- .B(1'h0),
- .Y(booth_b32_m9)
- );
- AO22x1_ASAP7_75t_R \U$1703 (
- .A1(b_registered[9]),
- .A2(\sel_0$1921 ),
- .B1(b_registered[10]),
- .B2(\sel_1$1922 ),
- .Y(\t$2529 )
- );
- XOR2x1_ASAP7_75t_R \U$1704 (
- .A(\t$2529 ),
- .B(1'h0),
- .Y(booth_b32_m10)
- );
- AO22x1_ASAP7_75t_R \U$1705 (
- .A1(b_registered[10]),
- .A2(\sel_0$1921 ),
- .B1(b_registered[11]),
- .B2(\sel_1$1922 ),
- .Y(\t$2530 )
- );
- XOR2x1_ASAP7_75t_R \U$1706 (
- .A(\t$2530 ),
- .B(1'h0),
- .Y(booth_b32_m11)
- );
- AO22x1_ASAP7_75t_R \U$1707 (
- .A1(b_registered[11]),
- .A2(\sel_0$1921 ),
- .B1(b_registered[12]),
- .B2(\sel_1$1922 ),
- .Y(\t$2531 )
- );
- XOR2x1_ASAP7_75t_R \U$1708 (
- .A(\t$2531 ),
- .B(1'h0),
- .Y(booth_b32_m12)
- );
- AO22x1_ASAP7_75t_R \U$1709 (
- .A1(b_registered[12]),
- .A2(\sel_0$1921 ),
- .B1(b_registered[13]),
- .B2(\sel_1$1922 ),
- .Y(\t$2532 )
- );
- XOR2x1_ASAP7_75t_R \U$1710 (
- .A(\t$2532 ),
- .B(1'h0),
- .Y(booth_b32_m13)
- );
- AO22x1_ASAP7_75t_R \U$1711 (
- .A1(b_registered[13]),
- .A2(\sel_0$1921 ),
- .B1(b_registered[14]),
- .B2(\sel_1$1922 ),
- .Y(\t$2533 )
- );
- XOR2x1_ASAP7_75t_R \U$1712 (
- .A(\t$2533 ),
- .B(1'h0),
- .Y(booth_b32_m14)
- );
- AO22x1_ASAP7_75t_R \U$1713 (
- .A1(b_registered[14]),
- .A2(\sel_0$1921 ),
- .B1(b_registered[15]),
- .B2(\sel_1$1922 ),
- .Y(\t$2534 )
- );
- XOR2x1_ASAP7_75t_R \U$1714 (
- .A(\t$2534 ),
- .B(1'h0),
- .Y(booth_b32_m15)
- );
- AO22x1_ASAP7_75t_R \U$1715 (
- .A1(b_registered[15]),
- .A2(\sel_0$1921 ),
- .B1(b_registered[16]),
- .B2(\sel_1$1922 ),
- .Y(\t$2535 )
- );
- XOR2x1_ASAP7_75t_R \U$1716 (
- .A(\t$2535 ),
- .B(1'h0),
- .Y(booth_b32_m16)
- );
- AO22x1_ASAP7_75t_R \U$1717 (
- .A1(b_registered[16]),
- .A2(\sel_0$1921 ),
- .B1(b_registered[17]),
- .B2(\sel_1$1922 ),
- .Y(\t$2536 )
- );
- XOR2x1_ASAP7_75t_R \U$1718 (
- .A(\t$2536 ),
- .B(1'h0),
- .Y(booth_b32_m17)
- );
- AO22x1_ASAP7_75t_R \U$1719 (
- .A1(b_registered[17]),
- .A2(\sel_0$1921 ),
- .B1(b_registered[18]),
- .B2(\sel_1$1922 ),
- .Y(\t$2537 )
- );
- XOR2x1_ASAP7_75t_R \U$1720 (
- .A(\t$2537 ),
- .B(1'h0),
- .Y(booth_b32_m18)
- );
- AO22x1_ASAP7_75t_R \U$1721 (
- .A1(b_registered[18]),
- .A2(\sel_0$1921 ),
- .B1(b_registered[19]),
- .B2(\sel_1$1922 ),
- .Y(\t$2538 )
- );
- XOR2x1_ASAP7_75t_R \U$1722 (
- .A(\t$2538 ),
- .B(1'h0),
- .Y(booth_b32_m19)
- );
- AO22x1_ASAP7_75t_R \U$1723 (
- .A1(b_registered[19]),
- .A2(\sel_0$1921 ),
- .B1(b_registered[20]),
- .B2(\sel_1$1922 ),
- .Y(\t$2539 )
- );
- XOR2x1_ASAP7_75t_R \U$1724 (
- .A(\t$2539 ),
- .B(1'h0),
- .Y(booth_b32_m20)
- );
- AO22x1_ASAP7_75t_R \U$1725 (
- .A1(b_registered[20]),
- .A2(\sel_0$1921 ),
- .B1(b_registered[21]),
- .B2(\sel_1$1922 ),
- .Y(\t$2540 )
- );
- XOR2x1_ASAP7_75t_R \U$1726 (
- .A(\t$2540 ),
- .B(1'h0),
- .Y(booth_b32_m21)
- );
- AO22x1_ASAP7_75t_R \U$1727 (
- .A1(b_registered[21]),
- .A2(\sel_0$1921 ),
- .B1(b_registered[22]),
- .B2(\sel_1$1922 ),
- .Y(\t$2541 )
- );
- XOR2x1_ASAP7_75t_R \U$1728 (
- .A(\t$2541 ),
- .B(1'h0),
- .Y(booth_b32_m22)
- );
- AO22x1_ASAP7_75t_R \U$1729 (
- .A1(b_registered[22]),
- .A2(\sel_0$1921 ),
- .B1(b_registered[23]),
- .B2(\sel_1$1922 ),
- .Y(\t$2542 )
- );
- XOR2x1_ASAP7_75t_R \U$1730 (
- .A(\t$2542 ),
- .B(1'h0),
- .Y(booth_b32_m23)
- );
- AO22x1_ASAP7_75t_R \U$1731 (
- .A1(b_registered[23]),
- .A2(\sel_0$1921 ),
- .B1(b_registered[24]),
- .B2(\sel_1$1922 ),
- .Y(\t$2543 )
- );
- XOR2x1_ASAP7_75t_R \U$1732 (
- .A(\t$2543 ),
- .B(1'h0),
- .Y(booth_b32_m24)
- );
- AO22x1_ASAP7_75t_R \U$1733 (
- .A1(b_registered[24]),
- .A2(\sel_0$1921 ),
- .B1(b_registered[25]),
- .B2(\sel_1$1922 ),
- .Y(\t$2544 )
- );
- XOR2x1_ASAP7_75t_R \U$1734 (
- .A(\t$2544 ),
- .B(1'h0),
- .Y(booth_b32_m25)
- );
- AO22x1_ASAP7_75t_R \U$1735 (
- .A1(b_registered[25]),
- .A2(\sel_0$1921 ),
- .B1(b_registered[26]),
- .B2(\sel_1$1922 ),
- .Y(\t$2545 )
- );
- XOR2x1_ASAP7_75t_R \U$1736 (
- .A(\t$2545 ),
- .B(1'h0),
- .Y(booth_b32_m26)
- );
- AO22x1_ASAP7_75t_R \U$1737 (
- .A1(b_registered[26]),
- .A2(\sel_0$1921 ),
- .B1(b_registered[27]),
- .B2(\sel_1$1922 ),
- .Y(\t$2546 )
- );
- XOR2x1_ASAP7_75t_R \U$1738 (
- .A(\t$2546 ),
- .B(1'h0),
- .Y(booth_b32_m27)
- );
- AO22x1_ASAP7_75t_R \U$1739 (
- .A1(b_registered[27]),
- .A2(\sel_0$1921 ),
- .B1(b_registered[28]),
- .B2(\sel_1$1922 ),
- .Y(\t$2547 )
- );
- XOR2x1_ASAP7_75t_R \U$1740 (
- .A(\t$2547 ),
- .B(1'h0),
- .Y(booth_b32_m28)
- );
- AO22x1_ASAP7_75t_R \U$1741 (
- .A1(b_registered[28]),
- .A2(\sel_0$1921 ),
- .B1(b_registered[29]),
- .B2(\sel_1$1922 ),
- .Y(\t$2548 )
- );
- XOR2x1_ASAP7_75t_R \U$1742 (
- .A(\t$2548 ),
- .B(1'h0),
- .Y(booth_b32_m29)
- );
- AO22x1_ASAP7_75t_R \U$1743 (
- .A1(b_registered[29]),
- .A2(\sel_0$1921 ),
- .B1(b_registered[30]),
- .B2(\sel_1$1922 ),
- .Y(\t$2549 )
- );
- XOR2x1_ASAP7_75t_R \U$1744 (
- .A(\t$2549 ),
- .B(1'h0),
- .Y(booth_b32_m30)
- );
- AO22x1_ASAP7_75t_R \U$1745 (
- .A1(b_registered[30]),
- .A2(\sel_0$1921 ),
- .B1(b_registered[31]),
- .B2(\sel_1$1922 ),
- .Y(\t$2550 )
- );
- XOR2x1_ASAP7_75t_R \U$1746 (
- .A(\t$2550 ),
- .B(1'h0),
- .Y(booth_b32_m31)
- );
- AO22x1_ASAP7_75t_R \U$1747 (
- .A1(b_registered[31]),
- .A2(\sel_0$1921 ),
- .B1(1'h0),
- .B2(\sel_1$1922 ),
- .Y(\t$2551 )
- );
- XOR2x1_ASAP7_75t_R \U$1748 (
- .A(\t$2551 ),
- .B(1'h0),
- .Y(booth_b32_m32)
- );
- INVx1_ASAP7_75t_R \U$1749 (
- .A(1'h0),
- .Y(\$52 )
- );
- INVx1_ASAP7_75t_R \U$1750 (
- .A(con),
- .Y(\c$2553 )
- );
- INVx1_ASAP7_75t_R \U$1751 (
- .A(sn),
- .Y(\s$2555 )
- );
- INVx1_ASAP7_75t_R \U$1752 (
- .A(\con$2556 ),
- .Y(\c$2557 )
- );
- INVx1_ASAP7_75t_R \U$1753 (
- .A(\sn$2558 ),
- .Y(\s$2559 )
- );
- INVx1_ASAP7_75t_R \U$1754 (
- .A(\con$2560 ),
- .Y(\c$2561 )
- );
- INVx1_ASAP7_75t_R \U$1755 (
- .A(\sn$2562 ),
- .Y(\s$2563 )
- );
- INVx1_ASAP7_75t_R \U$1756 (
- .A(\con$2564 ),
- .Y(\c$2565 )
- );
- INVx1_ASAP7_75t_R \U$1757 (
- .A(\sn$2566 ),
- .Y(\s$2567 )
- );
- INVx1_ASAP7_75t_R \U$1758 (
- .A(\con$2568 ),
- .Y(\c$2569 )
- );
- INVx1_ASAP7_75t_R \U$1759 (
- .A(\sn$2570 ),
- .Y(\s$2571 )
- );
- INVx1_ASAP7_75t_R \U$1760 (
- .A(\con$2572 ),
- .Y(\c$2573 )
- );
- INVx1_ASAP7_75t_R \U$1761 (
- .A(\sn$2574 ),
- .Y(\s$2575 )
- );
- INVx1_ASAP7_75t_R \U$1762 (
- .A(\con$2576 ),
- .Y(\c$2577 )
- );
- INVx1_ASAP7_75t_R \U$1763 (
- .A(\sn$2578 ),
- .Y(\s$2579 )
- );
- INVx1_ASAP7_75t_R \U$1764 (
- .A(\con$2580 ),
- .Y(\c$2581 )
- );
- INVx1_ASAP7_75t_R \U$1765 (
- .A(\sn$2582 ),
- .Y(\s$2583 )
- );
- INVx1_ASAP7_75t_R \U$1766 (
- .A(\con$2584 ),
- .Y(\c$2585 )
- );
- INVx1_ASAP7_75t_R \U$1767 (
- .A(\sn$2586 ),
- .Y(\s$2587 )
- );
- INVx1_ASAP7_75t_R \U$1768 (
- .A(\con$2588 ),
- .Y(\c$2589 )
- );
- INVx1_ASAP7_75t_R \U$1769 (
- .A(\sn$2590 ),
- .Y(\s$2591 )
- );
- INVx1_ASAP7_75t_R \U$1770 (
- .A(\con$2592 ),
- .Y(\c$2593 )
- );
- INVx1_ASAP7_75t_R \U$1771 (
- .A(\sn$2594 ),
- .Y(\s$2595 )
- );
- INVx1_ASAP7_75t_R \U$1772 (
- .A(\con$2596 ),
- .Y(\c$2597 )
- );
- INVx1_ASAP7_75t_R \U$1773 (
- .A(\sn$2598 ),
- .Y(\s$2599 )
- );
- INVx1_ASAP7_75t_R \U$1774 (
- .A(\con$2600 ),
- .Y(\c$2601 )
- );
- INVx1_ASAP7_75t_R \U$1775 (
- .A(\sn$2602 ),
- .Y(\s$2603 )
- );
- INVx1_ASAP7_75t_R \U$1776 (
- .A(\con$2604 ),
- .Y(\c$2605 )
- );
- INVx1_ASAP7_75t_R \U$1777 (
- .A(\sn$2606 ),
- .Y(\s$2607 )
- );
- INVx1_ASAP7_75t_R \U$1778 (
- .A(\con$2608 ),
- .Y(\c$2609 )
- );
- INVx1_ASAP7_75t_R \U$1779 (
- .A(\sn$2610 ),
- .Y(\s$2611 )
- );
- INVx1_ASAP7_75t_R \U$1780 (
- .A(\con$2612 ),
- .Y(\c$2613 )
- );
- INVx1_ASAP7_75t_R \U$1781 (
- .A(\sn$2614 ),
- .Y(\s$2615 )
- );
- INVx1_ASAP7_75t_R \U$1782 (
- .A(\con$2616 ),
- .Y(\c$2617 )
- );
- INVx1_ASAP7_75t_R \U$1783 (
- .A(\sn$2618 ),
- .Y(\s$2619 )
- );
- INVx1_ASAP7_75t_R \U$1784 (
- .A(\con$2620 ),
- .Y(\c$2621 )
- );
- INVx1_ASAP7_75t_R \U$1785 (
- .A(\sn$2622 ),
- .Y(\s$2623 )
- );
- INVx1_ASAP7_75t_R \U$1786 (
- .A(\con$2624 ),
- .Y(\c$2625 )
- );
- INVx1_ASAP7_75t_R \U$1787 (
- .A(\sn$2626 ),
- .Y(\s$2627 )
- );
- INVx1_ASAP7_75t_R \U$1788 (
- .A(\con$2628 ),
- .Y(\c$2629 )
- );
- INVx1_ASAP7_75t_R \U$1789 (
- .A(\sn$2630 ),
- .Y(\s$2631 )
- );
- INVx1_ASAP7_75t_R \U$1790 (
- .A(\con$2632 ),
- .Y(\c$2633 )
- );
- INVx1_ASAP7_75t_R \U$1791 (
- .A(\sn$2634 ),
- .Y(\s$2635 )
- );
- INVx1_ASAP7_75t_R \U$1792 (
- .A(\con$2636 ),
- .Y(\c$2637 )
- );
- INVx1_ASAP7_75t_R \U$1793 (
- .A(\sn$2638 ),
- .Y(\s$2639 )
- );
- INVx1_ASAP7_75t_R \U$1794 (
- .A(\con$2640 ),
- .Y(\c$2641 )
- );
- INVx1_ASAP7_75t_R \U$1795 (
- .A(\sn$2642 ),
- .Y(\s$2643 )
- );
- INVx1_ASAP7_75t_R \U$1796 (
- .A(\con$2644 ),
- .Y(\c$2645 )
- );
- INVx1_ASAP7_75t_R \U$1797 (
- .A(\sn$2646 ),
- .Y(\s$2647 )
- );
- INVx1_ASAP7_75t_R \U$1798 (
- .A(\con$2648 ),
- .Y(\c$2649 )
- );
- INVx1_ASAP7_75t_R \U$1799 (
- .A(\sn$2650 ),
- .Y(\s$2651 )
- );
- INVx1_ASAP7_75t_R \U$1800 (
- .A(\con$2652 ),
- .Y(\c$2653 )
- );
- INVx1_ASAP7_75t_R \U$1801 (
- .A(\sn$2654 ),
- .Y(\s$2655 )
- );
- INVx1_ASAP7_75t_R \U$1802 (
- .A(\con$2656 ),
- .Y(\c$2657 )
- );
- INVx1_ASAP7_75t_R \U$1803 (
- .A(\sn$2658 ),
- .Y(\s$2659 )
- );
- INVx1_ASAP7_75t_R \U$1804 (
- .A(\con$2660 ),
- .Y(\c$2661 )
- );
- INVx1_ASAP7_75t_R \U$1805 (
- .A(\sn$2662 ),
- .Y(\s$2663 )
- );
- INVx1_ASAP7_75t_R \U$1806 (
- .A(\con$2664 ),
- .Y(\c$2665 )
- );
- INVx1_ASAP7_75t_R \U$1807 (
- .A(\sn$2666 ),
- .Y(\s$2667 )
- );
- INVx1_ASAP7_75t_R \U$1808 (
- .A(\con$2668 ),
- .Y(\c$2669 )
- );
- INVx1_ASAP7_75t_R \U$1809 (
- .A(\sn$2670 ),
- .Y(\s$2671 )
- );
- INVx1_ASAP7_75t_R \U$1810 (
- .A(\con$2672 ),
- .Y(\c$2673 )
- );
- INVx1_ASAP7_75t_R \U$1811 (
- .A(\sn$2674 ),
- .Y(\s$2675 )
- );
- INVx1_ASAP7_75t_R \U$1812 (
- .A(\con$2676 ),
- .Y(\c$2677 )
- );
- INVx1_ASAP7_75t_R \U$1813 (
- .A(\sn$2678 ),
- .Y(\s$2679 )
- );
- INVx1_ASAP7_75t_R \U$1814 (
- .A(\con$2680 ),
- .Y(\c$2681 )
- );
- INVx1_ASAP7_75t_R \U$1815 (
- .A(\sn$2682 ),
- .Y(\s$2683 )
- );
- INVx1_ASAP7_75t_R \U$1816 (
- .A(\con$2684 ),
- .Y(\c$2685 )
- );
- INVx1_ASAP7_75t_R \U$1817 (
- .A(\sn$2686 ),
- .Y(\s$2687 )
- );
- INVx1_ASAP7_75t_R \U$1818 (
- .A(\con$2688 ),
- .Y(\c$2689 )
- );
- INVx1_ASAP7_75t_R \U$1819 (
- .A(\sn$2690 ),
- .Y(\s$2691 )
- );
- INVx1_ASAP7_75t_R \U$1820 (
- .A(\con$2692 ),
- .Y(\c$2693 )
- );
- INVx1_ASAP7_75t_R \U$1821 (
- .A(\sn$2694 ),
- .Y(\s$2695 )
- );
- INVx1_ASAP7_75t_R \U$1822 (
- .A(\con$2696 ),
- .Y(\c$2697 )
- );
- INVx1_ASAP7_75t_R \U$1823 (
- .A(\sn$2698 ),
- .Y(\s$2699 )
- );
- INVx1_ASAP7_75t_R \U$1824 (
- .A(\con$2700 ),
- .Y(\c$2701 )
- );
- INVx1_ASAP7_75t_R \U$1825 (
- .A(\sn$2702 ),
- .Y(\s$2703 )
- );
- INVx1_ASAP7_75t_R \U$1826 (
- .A(\con$2704 ),
- .Y(\c$2705 )
- );
- INVx1_ASAP7_75t_R \U$1827 (
- .A(\sn$2706 ),
- .Y(\s$2707 )
- );
- INVx1_ASAP7_75t_R \U$1828 (
- .A(\con$2708 ),
- .Y(\c$2709 )
- );
- INVx1_ASAP7_75t_R \U$1829 (
- .A(\sn$2710 ),
- .Y(\s$2711 )
- );
- INVx1_ASAP7_75t_R \U$1830 (
- .A(\con$2712 ),
- .Y(\c$2713 )
- );
- INVx1_ASAP7_75t_R \U$1831 (
- .A(\sn$2714 ),
- .Y(\s$2715 )
- );
- INVx1_ASAP7_75t_R \U$1832 (
- .A(\con$2716 ),
- .Y(\c$2717 )
- );
- INVx1_ASAP7_75t_R \U$1833 (
- .A(\sn$2718 ),
- .Y(\s$2719 )
- );
- INVx1_ASAP7_75t_R \U$1834 (
- .A(\con$2720 ),
- .Y(\c$2721 )
- );
- INVx1_ASAP7_75t_R \U$1835 (
- .A(\sn$2722 ),
- .Y(\s$2723 )
- );
- INVx1_ASAP7_75t_R \U$1836 (
- .A(\con$2724 ),
- .Y(\c$2725 )
- );
- INVx1_ASAP7_75t_R \U$1837 (
- .A(\sn$2726 ),
- .Y(\s$2727 )
- );
- INVx1_ASAP7_75t_R \U$1838 (
- .A(\con$2728 ),
- .Y(\c$2729 )
- );
- INVx1_ASAP7_75t_R \U$1839 (
- .A(\sn$2730 ),
- .Y(\s$2731 )
- );
- INVx1_ASAP7_75t_R \U$1840 (
- .A(\con$2732 ),
- .Y(\c$2733 )
- );
- INVx1_ASAP7_75t_R \U$1841 (
- .A(\sn$2734 ),
- .Y(\s$2735 )
- );
- INVx1_ASAP7_75t_R \U$1842 (
- .A(\con$2736 ),
- .Y(\c$2737 )
- );
- INVx1_ASAP7_75t_R \U$1843 (
- .A(\sn$2738 ),
- .Y(\s$2739 )
- );
- INVx1_ASAP7_75t_R \U$1844 (
- .A(\con$2740 ),
- .Y(\c$2741 )
- );
- INVx1_ASAP7_75t_R \U$1845 (
- .A(\sn$2742 ),
- .Y(\s$2743 )
- );
- INVx1_ASAP7_75t_R \U$1846 (
- .A(\con$2744 ),
- .Y(\c$2745 )
- );
- INVx1_ASAP7_75t_R \U$1847 (
- .A(\sn$2746 ),
- .Y(\s$2747 )
- );
- INVx1_ASAP7_75t_R \U$1848 (
- .A(\con$2748 ),
- .Y(\c$2749 )
- );
- INVx1_ASAP7_75t_R \U$1849 (
- .A(\sn$2750 ),
- .Y(\s$2751 )
- );
- INVx1_ASAP7_75t_R \U$1850 (
- .A(\con$2752 ),
- .Y(\c$2753 )
- );
- INVx1_ASAP7_75t_R \U$1851 (
- .A(\sn$2754 ),
- .Y(\s$2755 )
- );
- INVx1_ASAP7_75t_R \U$1852 (
- .A(\con$2756 ),
- .Y(\c$2757 )
- );
- INVx1_ASAP7_75t_R \U$1853 (
- .A(\sn$2758 ),
- .Y(\s$2759 )
- );
- INVx1_ASAP7_75t_R \U$1854 (
- .A(\con$2760 ),
- .Y(\c$2761 )
- );
- INVx1_ASAP7_75t_R \U$1855 (
- .A(\sn$2762 ),
- .Y(\s$2763 )
- );
- INVx1_ASAP7_75t_R \U$1856 (
- .A(\con$2764 ),
- .Y(\c$2765 )
- );
- INVx1_ASAP7_75t_R \U$1857 (
- .A(\sn$2766 ),
- .Y(\s$2767 )
- );
- INVx1_ASAP7_75t_R \U$1858 (
- .A(\con$2768 ),
- .Y(\c$2769 )
- );
- INVx1_ASAP7_75t_R \U$1859 (
- .A(\sn$2770 ),
- .Y(\s$2771 )
- );
- INVx1_ASAP7_75t_R \U$1860 (
- .A(\con$2772 ),
- .Y(\c$2773 )
- );
- INVx1_ASAP7_75t_R \U$1861 (
- .A(\sn$2774 ),
- .Y(\s$2775 )
- );
- INVx1_ASAP7_75t_R \U$1862 (
- .A(\con$2776 ),
- .Y(\c$2777 )
- );
- INVx1_ASAP7_75t_R \U$1863 (
- .A(\sn$2778 ),
- .Y(\s$2779 )
- );
- INVx1_ASAP7_75t_R \U$1864 (
- .A(\con$2780 ),
- .Y(\c$2781 )
- );
- INVx1_ASAP7_75t_R \U$1865 (
- .A(\sn$2782 ),
- .Y(\s$2783 )
- );
- INVx1_ASAP7_75t_R \U$1866 (
- .A(\con$2784 ),
- .Y(\c$2785 )
- );
- INVx1_ASAP7_75t_R \U$1867 (
- .A(\sn$2786 ),
- .Y(\s$2787 )
- );
- INVx1_ASAP7_75t_R \U$1868 (
- .A(\con$2788 ),
- .Y(\c$2789 )
- );
- INVx1_ASAP7_75t_R \U$1869 (
- .A(\sn$2790 ),
- .Y(\s$2791 )
- );
- INVx1_ASAP7_75t_R \U$1870 (
- .A(\con$2792 ),
- .Y(\c$2793 )
- );
- INVx1_ASAP7_75t_R \U$1871 (
- .A(\sn$2794 ),
- .Y(\s$2795 )
- );
- INVx1_ASAP7_75t_R \U$1872 (
- .A(\con$2796 ),
- .Y(\c$2797 )
- );
- INVx1_ASAP7_75t_R \U$1873 (
- .A(\sn$2798 ),
- .Y(\s$2799 )
- );
- INVx1_ASAP7_75t_R \U$1874 (
- .A(\con$2800 ),
- .Y(\c$2801 )
- );
- INVx1_ASAP7_75t_R \U$1875 (
- .A(\sn$2802 ),
- .Y(\s$2803 )
- );
- INVx1_ASAP7_75t_R \U$1876 (
- .A(\con$2804 ),
- .Y(\c$2805 )
- );
- INVx1_ASAP7_75t_R \U$1877 (
- .A(\sn$2806 ),
- .Y(\s$2807 )
- );
- INVx1_ASAP7_75t_R \U$1878 (
- .A(\con$2808 ),
- .Y(\c$2809 )
- );
- INVx1_ASAP7_75t_R \U$1879 (
- .A(\sn$2810 ),
- .Y(\s$2811 )
- );
- INVx1_ASAP7_75t_R \U$1880 (
- .A(\con$2812 ),
- .Y(\c$2813 )
- );
- INVx1_ASAP7_75t_R \U$1881 (
- .A(\sn$2814 ),
- .Y(\s$2815 )
- );
- INVx1_ASAP7_75t_R \U$1882 (
- .A(\con$2816 ),
- .Y(\c$2817 )
- );
- INVx1_ASAP7_75t_R \U$1883 (
- .A(\sn$2818 ),
- .Y(\s$2819 )
- );
- INVx1_ASAP7_75t_R \U$1884 (
- .A(\con$2820 ),
- .Y(\c$2821 )
- );
- INVx1_ASAP7_75t_R \U$1885 (
- .A(\sn$2822 ),
- .Y(\s$2823 )
- );
- INVx1_ASAP7_75t_R \U$1886 (
- .A(\con$2824 ),
- .Y(\c$2825 )
- );
- INVx1_ASAP7_75t_R \U$1887 (
- .A(\sn$2826 ),
- .Y(\s$2827 )
- );
- INVx1_ASAP7_75t_R \U$1888 (
- .A(\con$2828 ),
- .Y(\c$2829 )
- );
- INVx1_ASAP7_75t_R \U$1889 (
- .A(\sn$2830 ),
- .Y(\s$2831 )
- );
- INVx1_ASAP7_75t_R \U$1890 (
- .A(\con$2832 ),
- .Y(\c$2833 )
- );
- INVx1_ASAP7_75t_R \U$1891 (
- .A(\sn$2834 ),
- .Y(\s$2835 )
- );
- INVx1_ASAP7_75t_R \U$1892 (
- .A(\con$2836 ),
- .Y(\c$2837 )
- );
- INVx1_ASAP7_75t_R \U$1893 (
- .A(\sn$2838 ),
- .Y(\s$2839 )
- );
- INVx1_ASAP7_75t_R \U$1894 (
- .A(\con$2840 ),
- .Y(\c$2841 )
- );
- INVx1_ASAP7_75t_R \U$1895 (
- .A(\sn$2842 ),
- .Y(\s$2843 )
- );
- INVx1_ASAP7_75t_R \U$1896 (
- .A(\con$2844 ),
- .Y(\c$2845 )
- );
- INVx1_ASAP7_75t_R \U$1897 (
- .A(\sn$2846 ),
- .Y(\s$2847 )
- );
- INVx1_ASAP7_75t_R \U$1898 (
- .A(\con$2848 ),
- .Y(\c$2849 )
- );
- INVx1_ASAP7_75t_R \U$1899 (
- .A(\sn$2850 ),
- .Y(\s$2851 )
- );
- INVx1_ASAP7_75t_R \U$1900 (
- .A(\con$2852 ),
- .Y(\c$2853 )
- );
- INVx1_ASAP7_75t_R \U$1901 (
- .A(\sn$2854 ),
- .Y(\s$2855 )
- );
- INVx1_ASAP7_75t_R \U$1902 (
- .A(\con$2856 ),
- .Y(\c$2857 )
- );
- INVx1_ASAP7_75t_R \U$1903 (
- .A(\sn$2858 ),
- .Y(\s$2859 )
- );
- INVx1_ASAP7_75t_R \U$1904 (
- .A(\con$2860 ),
- .Y(\c$2861 )
- );
- INVx1_ASAP7_75t_R \U$1905 (
- .A(\sn$2862 ),
- .Y(\s$2863 )
- );
- INVx1_ASAP7_75t_R \U$1906 (
- .A(\con$2864 ),
- .Y(\c$2865 )
- );
- INVx1_ASAP7_75t_R \U$1907 (
- .A(\sn$2866 ),
- .Y(\s$2867 )
- );
- INVx1_ASAP7_75t_R \U$1908 (
- .A(\con$2868 ),
- .Y(\c$2869 )
- );
- INVx1_ASAP7_75t_R \U$1909 (
- .A(\sn$2870 ),
- .Y(\s$2871 )
- );
- INVx1_ASAP7_75t_R \U$1910 (
- .A(\con$2872 ),
- .Y(\c$2873 )
- );
- INVx1_ASAP7_75t_R \U$1911 (
- .A(\sn$2874 ),
- .Y(\s$2875 )
- );
- INVx1_ASAP7_75t_R \U$1912 (
- .A(\con$2876 ),
- .Y(\c$2877 )
- );
- INVx1_ASAP7_75t_R \U$1913 (
- .A(\sn$2878 ),
- .Y(\s$2879 )
- );
- INVx1_ASAP7_75t_R \U$1914 (
- .A(\con$2880 ),
- .Y(\c$2881 )
- );
- INVx1_ASAP7_75t_R \U$1915 (
- .A(\sn$2882 ),
- .Y(\s$2883 )
- );
- INVx1_ASAP7_75t_R \U$1916 (
- .A(\con$2884 ),
- .Y(\c$2885 )
- );
- INVx1_ASAP7_75t_R \U$1917 (
- .A(\sn$2886 ),
- .Y(\s$2887 )
- );
- INVx1_ASAP7_75t_R \U$1918 (
- .A(\con$2888 ),
- .Y(\c$2889 )
- );
- INVx1_ASAP7_75t_R \U$1919 (
- .A(\sn$2890 ),
- .Y(\s$2891 )
- );
- INVx1_ASAP7_75t_R \U$1920 (
- .A(\con$2892 ),
- .Y(\c$2893 )
- );
- INVx1_ASAP7_75t_R \U$1921 (
- .A(\sn$2894 ),
- .Y(\s$2895 )
- );
- INVx1_ASAP7_75t_R \U$1922 (
- .A(\con$2896 ),
- .Y(\c$2897 )
- );
- INVx1_ASAP7_75t_R \U$1923 (
- .A(\sn$2898 ),
- .Y(\s$2899 )
- );
- INVx1_ASAP7_75t_R \U$1924 (
- .A(\con$2900 ),
- .Y(\c$2901 )
- );
- INVx1_ASAP7_75t_R \U$1925 (
- .A(\sn$2902 ),
- .Y(\s$2903 )
- );
- INVx1_ASAP7_75t_R \U$1926 (
- .A(\con$2904 ),
- .Y(\c$2905 )
- );
- INVx1_ASAP7_75t_R \U$1927 (
- .A(\sn$2906 ),
- .Y(\s$2907 )
- );
- INVx1_ASAP7_75t_R \U$1928 (
- .A(\con$2908 ),
- .Y(\c$2909 )
- );
- INVx1_ASAP7_75t_R \U$1929 (
- .A(\sn$2910 ),
- .Y(\s$2911 )
- );
- INVx1_ASAP7_75t_R \U$1930 (
- .A(\con$2912 ),
- .Y(\c$2913 )
- );
- INVx1_ASAP7_75t_R \U$1931 (
- .A(\sn$2914 ),
- .Y(\s$2915 )
- );
- INVx1_ASAP7_75t_R \U$1932 (
- .A(\con$2916 ),
- .Y(\c$2917 )
- );
- INVx1_ASAP7_75t_R \U$1933 (
- .A(\sn$2918 ),
- .Y(\s$2919 )
- );
- INVx1_ASAP7_75t_R \U$1934 (
- .A(\con$2920 ),
- .Y(\c$2921 )
- );
- INVx1_ASAP7_75t_R \U$1935 (
- .A(\sn$2922 ),
- .Y(\s$2923 )
- );
- INVx1_ASAP7_75t_R \U$1936 (
- .A(\con$2924 ),
- .Y(\c$2925 )
- );
- INVx1_ASAP7_75t_R \U$1937 (
- .A(\sn$2926 ),
- .Y(\s$2927 )
- );
- INVx1_ASAP7_75t_R \U$1938 (
- .A(\con$2928 ),
- .Y(\c$2929 )
- );
- INVx1_ASAP7_75t_R \U$1939 (
- .A(\sn$2930 ),
- .Y(\s$2931 )
- );
- INVx1_ASAP7_75t_R \U$1940 (
- .A(\con$2932 ),
- .Y(\c$2933 )
- );
- INVx1_ASAP7_75t_R \U$1941 (
- .A(\sn$2934 ),
- .Y(\s$2935 )
- );
- INVx1_ASAP7_75t_R \U$1942 (
- .A(\con$2936 ),
- .Y(\c$2937 )
- );
- INVx1_ASAP7_75t_R \U$1943 (
- .A(\sn$2938 ),
- .Y(\s$2939 )
- );
- INVx1_ASAP7_75t_R \U$1944 (
- .A(\con$2940 ),
- .Y(\c$2941 )
- );
- INVx1_ASAP7_75t_R \U$1945 (
- .A(\sn$2942 ),
- .Y(\s$2943 )
- );
- INVx1_ASAP7_75t_R \U$1946 (
- .A(\con$2944 ),
- .Y(\c$2945 )
- );
- INVx1_ASAP7_75t_R \U$1947 (
- .A(\sn$2946 ),
- .Y(\s$2947 )
- );
- INVx1_ASAP7_75t_R \U$1948 (
- .A(\con$2948 ),
- .Y(\c$2949 )
- );
- INVx1_ASAP7_75t_R \U$1949 (
- .A(\sn$2950 ),
- .Y(\s$2951 )
- );
- INVx1_ASAP7_75t_R \U$1950 (
- .A(\con$2952 ),
- .Y(\c$2953 )
- );
- INVx1_ASAP7_75t_R \U$1951 (
- .A(\sn$2954 ),
- .Y(\s$2955 )
- );
- INVx1_ASAP7_75t_R \U$1952 (
- .A(\con$2956 ),
- .Y(\c$2957 )
- );
- INVx1_ASAP7_75t_R \U$1953 (
- .A(\sn$2958 ),
- .Y(\s$2959 )
- );
- INVx1_ASAP7_75t_R \U$1954 (
- .A(\con$2960 ),
- .Y(\c$2961 )
- );
- INVx1_ASAP7_75t_R \U$1955 (
- .A(\sn$2962 ),
- .Y(\s$2963 )
- );
- INVx1_ASAP7_75t_R \U$1956 (
- .A(\con$2964 ),
- .Y(\c$2965 )
- );
- INVx1_ASAP7_75t_R \U$1957 (
- .A(\sn$2966 ),
- .Y(\s$2967 )
- );
- INVx1_ASAP7_75t_R \U$1958 (
- .A(\con$2968 ),
- .Y(\c$2969 )
- );
- INVx1_ASAP7_75t_R \U$1959 (
- .A(\sn$2970 ),
- .Y(\s$2971 )
- );
- INVx1_ASAP7_75t_R \U$1960 (
- .A(\con$2972 ),
- .Y(\c$2973 )
- );
- INVx1_ASAP7_75t_R \U$1961 (
- .A(\sn$2974 ),
- .Y(\s$2975 )
- );
- INVx1_ASAP7_75t_R \U$1962 (
- .A(\con$2976 ),
- .Y(\c$2977 )
- );
- INVx1_ASAP7_75t_R \U$1963 (
- .A(\sn$2978 ),
- .Y(\s$2979 )
- );
- INVx1_ASAP7_75t_R \U$1964 (
- .A(\con$2980 ),
- .Y(\c$2981 )
- );
- INVx1_ASAP7_75t_R \U$1965 (
- .A(\sn$2982 ),
- .Y(\s$2983 )
- );
- INVx1_ASAP7_75t_R \U$1966 (
- .A(\con$2984 ),
- .Y(\c$2985 )
- );
- INVx1_ASAP7_75t_R \U$1967 (
- .A(\sn$2986 ),
- .Y(\s$2987 )
- );
- INVx1_ASAP7_75t_R \U$1968 (
- .A(\con$2988 ),
- .Y(\c$2989 )
- );
- INVx1_ASAP7_75t_R \U$1969 (
- .A(\sn$2990 ),
- .Y(\s$2991 )
- );
- INVx1_ASAP7_75t_R \U$1970 (
- .A(\con$2992 ),
- .Y(\c$2993 )
- );
- INVx1_ASAP7_75t_R \U$1971 (
- .A(\sn$2994 ),
- .Y(\s$2995 )
- );
- INVx1_ASAP7_75t_R \U$1972 (
- .A(\con$2996 ),
- .Y(\c$2997 )
- );
- INVx1_ASAP7_75t_R \U$1973 (
- .A(\sn$2998 ),
- .Y(\s$2999 )
- );
- INVx1_ASAP7_75t_R \U$1974 (
- .A(\con$3000 ),
- .Y(\c$3001 )
- );
- INVx1_ASAP7_75t_R \U$1975 (
- .A(\sn$3002 ),
- .Y(\s$3003 )
- );
- INVx1_ASAP7_75t_R \U$1976 (
- .A(\con$3004 ),
- .Y(\c$3005 )
- );
- INVx1_ASAP7_75t_R \U$1977 (
- .A(\sn$3006 ),
- .Y(\s$3007 )
- );
- INVx1_ASAP7_75t_R \U$1978 (
- .A(\con$3008 ),
- .Y(\c$3009 )
- );
- INVx1_ASAP7_75t_R \U$1979 (
- .A(\sn$3010 ),
- .Y(\s$3011 )
- );
- INVx1_ASAP7_75t_R \U$1980 (
- .A(\con$3012 ),
- .Y(\c$3013 )
- );
- INVx1_ASAP7_75t_R \U$1981 (
- .A(\sn$3014 ),
- .Y(\s$3015 )
- );
- INVx1_ASAP7_75t_R \U$1982 (
- .A(\con$3016 ),
- .Y(\c$3017 )
- );
- INVx1_ASAP7_75t_R \U$1983 (
- .A(\sn$3018 ),
- .Y(\s$3019 )
- );
- INVx1_ASAP7_75t_R \U$1984 (
- .A(\con$3020 ),
- .Y(\c$3021 )
- );
- INVx1_ASAP7_75t_R \U$1985 (
- .A(\sn$3022 ),
- .Y(\s$3023 )
- );
- INVx1_ASAP7_75t_R \U$1986 (
- .A(\con$3024 ),
- .Y(\c$3025 )
- );
- INVx1_ASAP7_75t_R \U$1987 (
- .A(\sn$3026 ),
- .Y(\s$3027 )
- );
- INVx1_ASAP7_75t_R \U$1988 (
- .A(\con$3028 ),
- .Y(\c$3029 )
- );
- INVx1_ASAP7_75t_R \U$1989 (
- .A(\sn$3030 ),
- .Y(\s$3031 )
- );
- INVx1_ASAP7_75t_R \U$1990 (
- .A(\con$3032 ),
- .Y(\c$3033 )
- );
- INVx1_ASAP7_75t_R \U$1991 (
- .A(\sn$3034 ),
- .Y(\s$3035 )
- );
- INVx1_ASAP7_75t_R \U$1992 (
- .A(\con$3036 ),
- .Y(\c$3037 )
- );
- INVx1_ASAP7_75t_R \U$1993 (
- .A(\sn$3038 ),
- .Y(\s$3039 )
- );
- INVx1_ASAP7_75t_R \U$1994 (
- .A(\con$3040 ),
- .Y(\c$3041 )
- );
- INVx1_ASAP7_75t_R \U$1995 (
- .A(\sn$3042 ),
- .Y(\s$3043 )
- );
- INVx1_ASAP7_75t_R \U$1996 (
- .A(\con$3044 ),
- .Y(\c$3045 )
- );
- INVx1_ASAP7_75t_R \U$1997 (
- .A(\sn$3046 ),
- .Y(\s$3047 )
- );
- INVx1_ASAP7_75t_R \U$1998 (
- .A(\con$3048 ),
- .Y(\c$3049 )
- );
- INVx1_ASAP7_75t_R \U$1999 (
- .A(\sn$3050 ),
- .Y(\s$3051 )
- );
- INVx1_ASAP7_75t_R \U$2000 (
- .A(\con$3052 ),
- .Y(\c$3053 )
- );
- INVx1_ASAP7_75t_R \U$2001 (
- .A(\sn$3054 ),
- .Y(\s$3055 )
- );
- INVx1_ASAP7_75t_R \U$2002 (
- .A(\con$3056 ),
- .Y(\c$3057 )
- );
- INVx1_ASAP7_75t_R \U$2003 (
- .A(\sn$3058 ),
- .Y(\s$3059 )
- );
- INVx1_ASAP7_75t_R \U$2004 (
- .A(\con$3060 ),
- .Y(\c$3061 )
- );
- INVx1_ASAP7_75t_R \U$2005 (
- .A(\sn$3062 ),
- .Y(\s$3063 )
- );
- INVx1_ASAP7_75t_R \U$2006 (
- .A(\con$3064 ),
- .Y(\c$3065 )
- );
- INVx1_ASAP7_75t_R \U$2007 (
- .A(\sn$3066 ),
- .Y(\s$3067 )
- );
- INVx1_ASAP7_75t_R \U$2008 (
- .A(\con$3068 ),
- .Y(\c$3069 )
- );
- INVx1_ASAP7_75t_R \U$2009 (
- .A(\sn$3070 ),
- .Y(\s$3071 )
- );
- INVx1_ASAP7_75t_R \U$2010 (
- .A(\con$3072 ),
- .Y(\c$3073 )
- );
- INVx1_ASAP7_75t_R \U$2011 (
- .A(\sn$3074 ),
- .Y(\s$3075 )
- );
- INVx1_ASAP7_75t_R \U$2012 (
- .A(\con$3076 ),
- .Y(\c$3077 )
- );
- INVx1_ASAP7_75t_R \U$2013 (
- .A(\sn$3078 ),
- .Y(\s$3079 )
- );
- INVx1_ASAP7_75t_R \U$2014 (
- .A(\con$3080 ),
- .Y(\c$3081 )
- );
- INVx1_ASAP7_75t_R \U$2015 (
- .A(\sn$3082 ),
- .Y(\s$3083 )
- );
- INVx1_ASAP7_75t_R \U$2016 (
- .A(\con$3084 ),
- .Y(\c$3085 )
- );
- INVx1_ASAP7_75t_R \U$2017 (
- .A(\sn$3086 ),
- .Y(\s$3087 )
- );
- INVx1_ASAP7_75t_R \U$2018 (
- .A(\con$3088 ),
- .Y(\c$3089 )
- );
- INVx1_ASAP7_75t_R \U$2019 (
- .A(\sn$3090 ),
- .Y(\s$3091 )
- );
- INVx1_ASAP7_75t_R \U$2020 (
- .A(\con$3092 ),
- .Y(\c$3093 )
- );
- INVx1_ASAP7_75t_R \U$2021 (
- .A(\sn$3094 ),
- .Y(\s$3095 )
- );
- INVx1_ASAP7_75t_R \U$2022 (
- .A(\con$3096 ),
- .Y(\c$3097 )
- );
- INVx1_ASAP7_75t_R \U$2023 (
- .A(\sn$3098 ),
- .Y(\s$3099 )
- );
- INVx1_ASAP7_75t_R \U$2024 (
- .A(\con$3100 ),
- .Y(\c$3101 )
- );
- INVx1_ASAP7_75t_R \U$2025 (
- .A(\sn$3102 ),
- .Y(\s$3103 )
- );
- INVx1_ASAP7_75t_R \U$2026 (
- .A(\con$3104 ),
- .Y(\c$3105 )
- );
- INVx1_ASAP7_75t_R \U$2027 (
- .A(\sn$3106 ),
- .Y(\s$3107 )
- );
- INVx1_ASAP7_75t_R \U$2028 (
- .A(\con$3108 ),
- .Y(\c$3109 )
- );
- INVx1_ASAP7_75t_R \U$2029 (
- .A(\sn$3110 ),
- .Y(\s$3111 )
- );
- INVx1_ASAP7_75t_R \U$2030 (
- .A(\con$3112 ),
- .Y(\c$3113 )
- );
- INVx1_ASAP7_75t_R \U$2031 (
- .A(\sn$3114 ),
- .Y(\s$3115 )
- );
- INVx1_ASAP7_75t_R \U$2032 (
- .A(\con$3116 ),
- .Y(\c$3117 )
- );
- INVx1_ASAP7_75t_R \U$2033 (
- .A(\sn$3118 ),
- .Y(\s$3119 )
- );
- INVx1_ASAP7_75t_R \U$2034 (
- .A(\con$3120 ),
- .Y(\c$3121 )
- );
- INVx1_ASAP7_75t_R \U$2035 (
- .A(\sn$3122 ),
- .Y(\s$3123 )
- );
- INVx1_ASAP7_75t_R \U$2036 (
- .A(\con$3124 ),
- .Y(\c$3125 )
- );
- INVx1_ASAP7_75t_R \U$2037 (
- .A(\sn$3126 ),
- .Y(\s$3127 )
- );
- INVx1_ASAP7_75t_R \U$2038 (
- .A(\con$3128 ),
- .Y(\c$3129 )
- );
- INVx1_ASAP7_75t_R \U$2039 (
- .A(\sn$3130 ),
- .Y(\s$3131 )
- );
- INVx1_ASAP7_75t_R \U$2040 (
- .A(\con$3132 ),
- .Y(\c$3133 )
- );
- INVx1_ASAP7_75t_R \U$2041 (
- .A(\sn$3134 ),
- .Y(\s$3135 )
- );
- INVx1_ASAP7_75t_R \U$2042 (
- .A(\con$3136 ),
- .Y(\c$3137 )
- );
- INVx1_ASAP7_75t_R \U$2043 (
- .A(\sn$3138 ),
- .Y(\s$3139 )
- );
- INVx1_ASAP7_75t_R \U$2044 (
- .A(\con$3140 ),
- .Y(\c$3141 )
- );
- INVx1_ASAP7_75t_R \U$2045 (
- .A(\sn$3142 ),
- .Y(\s$3143 )
- );
- INVx1_ASAP7_75t_R \U$2046 (
- .A(\con$3144 ),
- .Y(\c$3145 )
- );
- INVx1_ASAP7_75t_R \U$2047 (
- .A(\sn$3146 ),
- .Y(\s$3147 )
- );
- INVx1_ASAP7_75t_R \U$2048 (
- .A(\con$3148 ),
- .Y(\c$3149 )
- );
- INVx1_ASAP7_75t_R \U$2049 (
- .A(\sn$3150 ),
- .Y(\s$3151 )
- );
- INVx1_ASAP7_75t_R \U$2050 (
- .A(\con$3152 ),
- .Y(\c$3153 )
- );
- INVx1_ASAP7_75t_R \U$2051 (
- .A(\sn$3154 ),
- .Y(\s$3155 )
- );
- INVx1_ASAP7_75t_R \U$2052 (
- .A(\con$3156 ),
- .Y(\c$3157 )
- );
- INVx1_ASAP7_75t_R \U$2053 (
- .A(\sn$3158 ),
- .Y(\s$3159 )
- );
- INVx1_ASAP7_75t_R \U$2054 (
- .A(\con$3160 ),
- .Y(\c$3161 )
- );
- INVx1_ASAP7_75t_R \U$2055 (
- .A(\sn$3162 ),
- .Y(\s$3163 )
- );
- INVx1_ASAP7_75t_R \U$2056 (
- .A(\con$3164 ),
- .Y(\c$3165 )
- );
- INVx1_ASAP7_75t_R \U$2057 (
- .A(\sn$3166 ),
- .Y(\s$3167 )
- );
- INVx1_ASAP7_75t_R \U$2058 (
- .A(\con$3168 ),
- .Y(\c$3169 )
- );
- INVx1_ASAP7_75t_R \U$2059 (
- .A(\sn$3170 ),
- .Y(\s$3171 )
- );
- INVx1_ASAP7_75t_R \U$2060 (
- .A(\con$3172 ),
- .Y(\c$3173 )
- );
- INVx1_ASAP7_75t_R \U$2061 (
- .A(\sn$3174 ),
- .Y(\s$3175 )
- );
- INVx1_ASAP7_75t_R \U$2062 (
- .A(\con$3176 ),
- .Y(\c$3177 )
- );
- INVx1_ASAP7_75t_R \U$2063 (
- .A(\sn$3178 ),
- .Y(\s$3179 )
- );
- INVx1_ASAP7_75t_R \U$2064 (
- .A(\con$3180 ),
- .Y(\c$3181 )
- );
- INVx1_ASAP7_75t_R \U$2065 (
- .A(\sn$3182 ),
- .Y(\s$3183 )
- );
- INVx1_ASAP7_75t_R \U$2066 (
- .A(\con$3184 ),
- .Y(\c$3185 )
- );
- INVx1_ASAP7_75t_R \U$2067 (
- .A(\sn$3186 ),
- .Y(\s$3187 )
- );
- INVx1_ASAP7_75t_R \U$2068 (
- .A(\con$3188 ),
- .Y(\c$3189 )
- );
- INVx1_ASAP7_75t_R \U$2069 (
- .A(\sn$3190 ),
- .Y(\s$3191 )
- );
- INVx1_ASAP7_75t_R \U$2070 (
- .A(\con$3192 ),
- .Y(\c$3193 )
- );
- INVx1_ASAP7_75t_R \U$2071 (
- .A(\sn$3194 ),
- .Y(\s$3195 )
- );
- INVx1_ASAP7_75t_R \U$2072 (
- .A(\con$3196 ),
- .Y(\c$3197 )
- );
- INVx1_ASAP7_75t_R \U$2073 (
- .A(\sn$3198 ),
- .Y(\s$3199 )
- );
- INVx1_ASAP7_75t_R \U$2074 (
- .A(\con$3200 ),
- .Y(\c$3201 )
- );
- INVx1_ASAP7_75t_R \U$2075 (
- .A(\sn$3202 ),
- .Y(\s$3203 )
- );
- INVx1_ASAP7_75t_R \U$2076 (
- .A(\con$3204 ),
- .Y(\c$3205 )
- );
- INVx1_ASAP7_75t_R \U$2077 (
- .A(\sn$3206 ),
- .Y(\s$3207 )
- );
- INVx1_ASAP7_75t_R \U$2078 (
- .A(\con$3208 ),
- .Y(\c$3209 )
- );
- INVx1_ASAP7_75t_R \U$2079 (
- .A(\sn$3210 ),
- .Y(\s$3211 )
- );
- INVx1_ASAP7_75t_R \U$2080 (
- .A(\con$3212 ),
- .Y(\c$3213 )
- );
- INVx1_ASAP7_75t_R \U$2081 (
- .A(\sn$3214 ),
- .Y(\s$3215 )
- );
- INVx1_ASAP7_75t_R \U$2082 (
- .A(\con$3216 ),
- .Y(\c$3217 )
- );
- INVx1_ASAP7_75t_R \U$2083 (
- .A(\sn$3218 ),
- .Y(\s$3219 )
- );
- INVx1_ASAP7_75t_R \U$2084 (
- .A(\con$3220 ),
- .Y(\c$3221 )
- );
- INVx1_ASAP7_75t_R \U$2085 (
- .A(\sn$3222 ),
- .Y(\s$3223 )
- );
- INVx1_ASAP7_75t_R \U$2086 (
- .A(\con$3224 ),
- .Y(\c$3225 )
- );
- INVx1_ASAP7_75t_R \U$2087 (
- .A(\sn$3226 ),
- .Y(\s$3227 )
- );
- INVx1_ASAP7_75t_R \U$2088 (
- .A(\con$3228 ),
- .Y(\c$3229 )
- );
- INVx1_ASAP7_75t_R \U$2089 (
- .A(\sn$3230 ),
- .Y(\s$3231 )
- );
- INVx1_ASAP7_75t_R \U$2090 (
- .A(\con$3232 ),
- .Y(\c$3233 )
- );
- INVx1_ASAP7_75t_R \U$2091 (
- .A(\sn$3234 ),
- .Y(\s$3235 )
- );
- INVx1_ASAP7_75t_R \U$2092 (
- .A(\con$3236 ),
- .Y(\c$3237 )
- );
- INVx1_ASAP7_75t_R \U$2093 (
- .A(\sn$3238 ),
- .Y(\s$3239 )
- );
- INVx1_ASAP7_75t_R \U$2094 (
- .A(\con$3240 ),
- .Y(\c$3241 )
- );
- INVx1_ASAP7_75t_R \U$2095 (
- .A(\sn$3242 ),
- .Y(\s$3243 )
- );
- INVx1_ASAP7_75t_R \U$2096 (
- .A(\con$3244 ),
- .Y(\c$3245 )
- );
- INVx1_ASAP7_75t_R \U$2097 (
- .A(\sn$3246 ),
- .Y(\s$3247 )
- );
- INVx1_ASAP7_75t_R \U$2098 (
- .A(\con$3248 ),
- .Y(\c$3249 )
- );
- INVx1_ASAP7_75t_R \U$2099 (
- .A(\sn$3250 ),
- .Y(\s$3251 )
- );
- INVx1_ASAP7_75t_R \U$2100 (
- .A(\con$3252 ),
- .Y(\c$3253 )
- );
- INVx1_ASAP7_75t_R \U$2101 (
- .A(\sn$3254 ),
- .Y(\s$3255 )
- );
- INVx1_ASAP7_75t_R \U$2102 (
- .A(\con$3256 ),
- .Y(\c$3257 )
- );
- INVx1_ASAP7_75t_R \U$2103 (
- .A(\sn$3258 ),
- .Y(\s$3259 )
- );
- INVx1_ASAP7_75t_R \U$2104 (
- .A(\con$3260 ),
- .Y(\c$3261 )
- );
- INVx1_ASAP7_75t_R \U$2105 (
- .A(\sn$3262 ),
- .Y(\s$3263 )
- );
- INVx1_ASAP7_75t_R \U$2106 (
- .A(\con$3264 ),
- .Y(\c$3265 )
- );
- INVx1_ASAP7_75t_R \U$2107 (
- .A(\sn$3266 ),
- .Y(\s$3267 )
- );
- INVx1_ASAP7_75t_R \U$2108 (
- .A(\con$3268 ),
- .Y(\c$3269 )
- );
- INVx1_ASAP7_75t_R \U$2109 (
- .A(\sn$3270 ),
- .Y(\s$3271 )
- );
- INVx1_ASAP7_75t_R \U$2110 (
- .A(\con$3272 ),
- .Y(\c$3273 )
- );
- INVx1_ASAP7_75t_R \U$2111 (
- .A(\sn$3274 ),
- .Y(\s$3275 )
- );
- INVx1_ASAP7_75t_R \U$2112 (
- .A(\con$3276 ),
- .Y(\c$3277 )
- );
- INVx1_ASAP7_75t_R \U$2113 (
- .A(\sn$3278 ),
- .Y(\s$3279 )
- );
- INVx1_ASAP7_75t_R \U$2114 (
- .A(\con$3280 ),
- .Y(\c$3281 )
- );
- INVx1_ASAP7_75t_R \U$2115 (
- .A(\sn$3282 ),
- .Y(\s$3283 )
- );
- INVx1_ASAP7_75t_R \U$2116 (
- .A(\con$3284 ),
- .Y(\c$3285 )
- );
- INVx1_ASAP7_75t_R \U$2117 (
- .A(\sn$3286 ),
- .Y(\s$3287 )
- );
- INVx1_ASAP7_75t_R \U$2118 (
- .A(\con$3288 ),
- .Y(\c$3289 )
- );
- INVx1_ASAP7_75t_R \U$2119 (
- .A(\sn$3290 ),
- .Y(\s$3291 )
- );
- INVx1_ASAP7_75t_R \U$2120 (
- .A(\con$3292 ),
- .Y(\c$3293 )
- );
- INVx1_ASAP7_75t_R \U$2121 (
- .A(\sn$3294 ),
- .Y(\s$3295 )
- );
- INVx1_ASAP7_75t_R \U$2122 (
- .A(\con$3296 ),
- .Y(\c$3297 )
- );
- INVx1_ASAP7_75t_R \U$2123 (
- .A(\sn$3298 ),
- .Y(\s$3299 )
- );
- INVx1_ASAP7_75t_R \U$2124 (
- .A(\con$3300 ),
- .Y(\c$3301 )
- );
- INVx1_ASAP7_75t_R \U$2125 (
- .A(\sn$3302 ),
- .Y(\s$3303 )
- );
- INVx1_ASAP7_75t_R \U$2126 (
- .A(\con$3304 ),
- .Y(\c$3305 )
- );
- INVx1_ASAP7_75t_R \U$2127 (
- .A(\sn$3306 ),
- .Y(\s$3307 )
- );
- INVx1_ASAP7_75t_R \U$2128 (
- .A(\con$3308 ),
- .Y(\c$3309 )
- );
- INVx1_ASAP7_75t_R \U$2129 (
- .A(\sn$3310 ),
- .Y(\s$3311 )
- );
- INVx1_ASAP7_75t_R \U$2130 (
- .A(\con$3312 ),
- .Y(\c$3313 )
- );
- INVx1_ASAP7_75t_R \U$2131 (
- .A(\sn$3314 ),
- .Y(\s$3315 )
- );
- INVx1_ASAP7_75t_R \U$2132 (
- .A(\con$3316 ),
- .Y(\c$3317 )
- );
- INVx1_ASAP7_75t_R \U$2133 (
- .A(\sn$3318 ),
- .Y(\s$3319 )
- );
- INVx1_ASAP7_75t_R \U$2134 (
- .A(\con$3320 ),
- .Y(\c$3321 )
- );
- INVx1_ASAP7_75t_R \U$2135 (
- .A(\sn$3322 ),
- .Y(\s$3323 )
- );
- INVx1_ASAP7_75t_R \U$2136 (
- .A(\con$3324 ),
- .Y(\c$3325 )
- );
- INVx1_ASAP7_75t_R \U$2137 (
- .A(\sn$3326 ),
- .Y(\s$3327 )
- );
- INVx1_ASAP7_75t_R \U$2138 (
- .A(\con$3328 ),
- .Y(\c$3329 )
- );
- INVx1_ASAP7_75t_R \U$2139 (
- .A(\sn$3330 ),
- .Y(\s$3331 )
- );
- INVx1_ASAP7_75t_R \U$2140 (
- .A(\con$3332 ),
- .Y(\c$3333 )
- );
- INVx1_ASAP7_75t_R \U$2141 (
- .A(\sn$3334 ),
- .Y(\s$3335 )
- );
- INVx1_ASAP7_75t_R \U$2142 (
- .A(\con$3336 ),
- .Y(\c$3337 )
- );
- INVx1_ASAP7_75t_R \U$2143 (
- .A(\sn$3338 ),
- .Y(\s$3339 )
- );
- INVx1_ASAP7_75t_R \U$2144 (
- .A(\con$3340 ),
- .Y(\c$3341 )
- );
- INVx1_ASAP7_75t_R \U$2145 (
- .A(\sn$3342 ),
- .Y(\s$3343 )
- );
- INVx1_ASAP7_75t_R \U$2146 (
- .A(\con$3344 ),
- .Y(\c$3345 )
- );
- INVx1_ASAP7_75t_R \U$2147 (
- .A(\sn$3346 ),
- .Y(\s$3347 )
- );
- INVx1_ASAP7_75t_R \U$2148 (
- .A(\con$3348 ),
- .Y(\c$3349 )
- );
- INVx1_ASAP7_75t_R \U$2149 (
- .A(\sn$3350 ),
- .Y(\s$3351 )
- );
- INVx1_ASAP7_75t_R \U$2150 (
- .A(\con$3352 ),
- .Y(\c$3353 )
- );
- INVx1_ASAP7_75t_R \U$2151 (
- .A(\sn$3354 ),
- .Y(\s$3355 )
- );
- INVx1_ASAP7_75t_R \U$2152 (
- .A(\con$3356 ),
- .Y(\c$3357 )
- );
- INVx1_ASAP7_75t_R \U$2153 (
- .A(\sn$3358 ),
- .Y(\s$3359 )
- );
- INVx1_ASAP7_75t_R \U$2154 (
- .A(\con$3360 ),
- .Y(\c$3361 )
- );
- INVx1_ASAP7_75t_R \U$2155 (
- .A(\sn$3362 ),
- .Y(\s$3363 )
- );
- INVx1_ASAP7_75t_R \U$2156 (
- .A(\con$3364 ),
- .Y(\c$3365 )
- );
- INVx1_ASAP7_75t_R \U$2157 (
- .A(\sn$3366 ),
- .Y(\s$3367 )
- );
- INVx1_ASAP7_75t_R \U$2158 (
- .A(\con$3368 ),
- .Y(\c$3369 )
- );
- INVx1_ASAP7_75t_R \U$2159 (
- .A(\sn$3370 ),
- .Y(\s$3371 )
- );
- INVx1_ASAP7_75t_R \U$2160 (
- .A(\con$3372 ),
- .Y(\c$3373 )
- );
- INVx1_ASAP7_75t_R \U$2161 (
- .A(\sn$3374 ),
- .Y(\s$3375 )
- );
- INVx1_ASAP7_75t_R \U$2162 (
- .A(\con$3376 ),
- .Y(\c$3377 )
- );
- INVx1_ASAP7_75t_R \U$2163 (
- .A(\sn$3378 ),
- .Y(\s$3379 )
- );
- INVx1_ASAP7_75t_R \U$2164 (
- .A(\con$3380 ),
- .Y(\c$3381 )
- );
- INVx1_ASAP7_75t_R \U$2165 (
- .A(\sn$3382 ),
- .Y(\s$3383 )
- );
- INVx1_ASAP7_75t_R \U$2166 (
- .A(\con$3384 ),
- .Y(\c$3385 )
- );
- INVx1_ASAP7_75t_R \U$2167 (
- .A(\sn$3386 ),
- .Y(\s$3387 )
- );
- INVx1_ASAP7_75t_R \U$2168 (
- .A(\con$3388 ),
- .Y(\c$3389 )
- );
- INVx1_ASAP7_75t_R \U$2169 (
- .A(\sn$3390 ),
- .Y(\s$3391 )
- );
- INVx1_ASAP7_75t_R \U$2170 (
- .A(\con$3392 ),
- .Y(\c$3393 )
- );
- INVx1_ASAP7_75t_R \U$2171 (
- .A(\sn$3394 ),
- .Y(\s$3395 )
- );
- INVx1_ASAP7_75t_R \U$2172 (
- .A(\con$3396 ),
- .Y(\c$3397 )
- );
- INVx1_ASAP7_75t_R \U$2173 (
- .A(\sn$3398 ),
- .Y(\s$3399 )
- );
- INVx1_ASAP7_75t_R \U$2174 (
- .A(\con$3400 ),
- .Y(\c$3401 )
- );
- INVx1_ASAP7_75t_R \U$2175 (
- .A(\sn$3402 ),
- .Y(\s$3403 )
- );
- INVx1_ASAP7_75t_R \U$2176 (
- .A(\con$3404 ),
- .Y(\c$3405 )
- );
- INVx1_ASAP7_75t_R \U$2177 (
- .A(\sn$3406 ),
- .Y(\s$3407 )
- );
- INVx1_ASAP7_75t_R \U$2178 (
- .A(\con$3408 ),
- .Y(\c$3409 )
- );
- INVx1_ASAP7_75t_R \U$2179 (
- .A(\sn$3410 ),
- .Y(\s$3411 )
- );
- INVx1_ASAP7_75t_R \U$2180 (
- .A(\con$3412 ),
- .Y(\c$3413 )
- );
- INVx1_ASAP7_75t_R \U$2181 (
- .A(\sn$3414 ),
- .Y(\s$3415 )
- );
- INVx1_ASAP7_75t_R \U$2182 (
- .A(\con$3416 ),
- .Y(\c$3417 )
- );
- INVx1_ASAP7_75t_R \U$2183 (
- .A(\sn$3418 ),
- .Y(\s$3419 )
- );
- INVx1_ASAP7_75t_R \U$2184 (
- .A(\con$3420 ),
- .Y(\c$3421 )
- );
- INVx1_ASAP7_75t_R \U$2185 (
- .A(\sn$3422 ),
- .Y(\s$3423 )
- );
- INVx1_ASAP7_75t_R \U$2186 (
- .A(\con$3424 ),
- .Y(\c$3425 )
- );
- INVx1_ASAP7_75t_R \U$2187 (
- .A(\sn$3426 ),
- .Y(\s$3427 )
- );
- INVx1_ASAP7_75t_R \U$2188 (
- .A(\con$3428 ),
- .Y(\c$3429 )
- );
- INVx1_ASAP7_75t_R \U$2189 (
- .A(\sn$3430 ),
- .Y(\s$3431 )
- );
- INVx1_ASAP7_75t_R \U$2190 (
- .A(\con$3432 ),
- .Y(\c$3433 )
- );
- INVx1_ASAP7_75t_R \U$2191 (
- .A(\sn$3434 ),
- .Y(\s$3435 )
- );
- INVx1_ASAP7_75t_R \U$2192 (
- .A(\con$3436 ),
- .Y(\c$3437 )
- );
- INVx1_ASAP7_75t_R \U$2193 (
- .A(\sn$3438 ),
- .Y(\s$3439 )
- );
- INVx1_ASAP7_75t_R \U$2194 (
- .A(\con$3440 ),
- .Y(\c$3441 )
- );
- INVx1_ASAP7_75t_R \U$2195 (
- .A(\sn$3442 ),
- .Y(\s$3443 )
- );
- INVx1_ASAP7_75t_R \U$2196 (
- .A(\con$3444 ),
- .Y(\c$3445 )
- );
- INVx1_ASAP7_75t_R \U$2197 (
- .A(\sn$3446 ),
- .Y(\s$3447 )
- );
- INVx1_ASAP7_75t_R \U$2198 (
- .A(\con$3448 ),
- .Y(\c$3449 )
- );
- INVx1_ASAP7_75t_R \U$2199 (
- .A(\sn$3450 ),
- .Y(\s$3451 )
- );
- INVx1_ASAP7_75t_R \U$2200 (
- .A(\con$3452 ),
- .Y(\c$3453 )
- );
- INVx1_ASAP7_75t_R \U$2201 (
- .A(\sn$3454 ),
- .Y(\s$3455 )
- );
- INVx1_ASAP7_75t_R \U$2202 (
- .A(\con$3456 ),
- .Y(\c$3457 )
- );
- INVx1_ASAP7_75t_R \U$2203 (
- .A(\sn$3458 ),
- .Y(\s$3459 )
- );
- INVx1_ASAP7_75t_R \U$2204 (
- .A(\con$3460 ),
- .Y(\c$3461 )
- );
- INVx1_ASAP7_75t_R \U$2205 (
- .A(\sn$3462 ),
- .Y(\s$3463 )
- );
- INVx1_ASAP7_75t_R \U$2206 (
- .A(\con$3464 ),
- .Y(\c$3465 )
- );
- INVx1_ASAP7_75t_R \U$2207 (
- .A(\sn$3466 ),
- .Y(\s$3467 )
- );
- INVx1_ASAP7_75t_R \U$2208 (
- .A(\con$3468 ),
- .Y(\c$3469 )
- );
- INVx1_ASAP7_75t_R \U$2209 (
- .A(\sn$3470 ),
- .Y(\s$3471 )
- );
- INVx1_ASAP7_75t_R \U$2210 (
- .A(\con$3472 ),
- .Y(\c$3473 )
- );
- INVx1_ASAP7_75t_R \U$2211 (
- .A(\sn$3474 ),
- .Y(\s$3475 )
- );
- INVx1_ASAP7_75t_R \U$2212 (
- .A(\con$3476 ),
- .Y(\c$3477 )
- );
- INVx1_ASAP7_75t_R \U$2213 (
- .A(\sn$3478 ),
- .Y(\s$3479 )
- );
- INVx1_ASAP7_75t_R \U$2214 (
- .A(\con$3480 ),
- .Y(\c$3481 )
- );
- INVx1_ASAP7_75t_R \U$2215 (
- .A(\sn$3482 ),
- .Y(\s$3483 )
- );
- INVx1_ASAP7_75t_R \U$2216 (
- .A(\con$3484 ),
- .Y(\c$3485 )
- );
- INVx1_ASAP7_75t_R \U$2217 (
- .A(\sn$3486 ),
- .Y(\s$3487 )
- );
- INVx1_ASAP7_75t_R \U$2218 (
- .A(\con$3488 ),
- .Y(\c$3489 )
- );
- INVx1_ASAP7_75t_R \U$2219 (
- .A(\sn$3490 ),
- .Y(\s$3491 )
- );
- INVx1_ASAP7_75t_R \U$2220 (
- .A(\con$3492 ),
- .Y(\c$3493 )
- );
- INVx1_ASAP7_75t_R \U$2221 (
- .A(\sn$3494 ),
- .Y(\s$3495 )
- );
- INVx1_ASAP7_75t_R \U$2222 (
- .A(\con$3496 ),
- .Y(\c$3497 )
- );
- INVx1_ASAP7_75t_R \U$2223 (
- .A(\sn$3498 ),
- .Y(\s$3499 )
- );
- INVx1_ASAP7_75t_R \U$2224 (
- .A(\con$3500 ),
- .Y(\c$3501 )
- );
- INVx1_ASAP7_75t_R \U$2225 (
- .A(\sn$3502 ),
- .Y(\s$3503 )
- );
- INVx1_ASAP7_75t_R \U$2226 (
- .A(\con$3504 ),
- .Y(\c$3505 )
- );
- INVx1_ASAP7_75t_R \U$2227 (
- .A(\sn$3506 ),
- .Y(\s$3507 )
- );
- INVx1_ASAP7_75t_R \U$2228 (
- .A(\con$3508 ),
- .Y(\c$3509 )
- );
- INVx1_ASAP7_75t_R \U$2229 (
- .A(\sn$3510 ),
- .Y(\s$3511 )
- );
- INVx1_ASAP7_75t_R \U$2230 (
- .A(\con$3512 ),
- .Y(\c$3513 )
- );
- INVx1_ASAP7_75t_R \U$2231 (
- .A(\sn$3514 ),
- .Y(\s$3515 )
- );
- INVx1_ASAP7_75t_R \U$2232 (
- .A(\con$3516 ),
- .Y(\c$3517 )
- );
- INVx1_ASAP7_75t_R \U$2233 (
- .A(\sn$3518 ),
- .Y(\s$3519 )
- );
- INVx1_ASAP7_75t_R \U$2234 (
- .A(\con$3520 ),
- .Y(\c$3521 )
- );
- INVx1_ASAP7_75t_R \U$2235 (
- .A(\sn$3522 ),
- .Y(\s$3523 )
- );
- INVx1_ASAP7_75t_R \U$2236 (
- .A(\con$3524 ),
- .Y(\c$3525 )
- );
- INVx1_ASAP7_75t_R \U$2237 (
- .A(\sn$3526 ),
- .Y(\s$3527 )
- );
- INVx1_ASAP7_75t_R \U$2238 (
- .A(\con$3528 ),
- .Y(\c$3529 )
- );
- INVx1_ASAP7_75t_R \U$2239 (
- .A(\sn$3530 ),
- .Y(\s$3531 )
- );
- INVx1_ASAP7_75t_R \U$2240 (
- .A(\con$3532 ),
- .Y(\c$3533 )
- );
- INVx1_ASAP7_75t_R \U$2241 (
- .A(\sn$3534 ),
- .Y(\s$3535 )
- );
- INVx1_ASAP7_75t_R \U$2242 (
- .A(\con$3536 ),
- .Y(\c$3537 )
- );
- INVx1_ASAP7_75t_R \U$2243 (
- .A(\sn$3538 ),
- .Y(\s$3539 )
- );
- INVx1_ASAP7_75t_R \U$2244 (
- .A(\con$3540 ),
- .Y(\c$3541 )
- );
- INVx1_ASAP7_75t_R \U$2245 (
- .A(\sn$3542 ),
- .Y(\s$3543 )
- );
- INVx1_ASAP7_75t_R \U$2246 (
- .A(\con$3544 ),
- .Y(\c$3545 )
- );
- INVx1_ASAP7_75t_R \U$2247 (
- .A(\sn$3546 ),
- .Y(\s$3547 )
- );
- INVx1_ASAP7_75t_R \U$2248 (
- .A(\con$3548 ),
- .Y(\c$3549 )
- );
- INVx1_ASAP7_75t_R \U$2249 (
- .A(\sn$3550 ),
- .Y(\s$3551 )
- );
- INVx1_ASAP7_75t_R \U$2250 (
- .A(\con$3552 ),
- .Y(\c$3553 )
- );
- INVx1_ASAP7_75t_R \U$2251 (
- .A(\sn$3554 ),
- .Y(\s$3555 )
- );
- INVx1_ASAP7_75t_R \U$2252 (
- .A(\con$3556 ),
- .Y(\c$3557 )
- );
- INVx1_ASAP7_75t_R \U$2253 (
- .A(\sn$3558 ),
- .Y(\s$3559 )
- );
- INVx1_ASAP7_75t_R \U$2254 (
- .A(\con$3560 ),
- .Y(\c$3561 )
- );
- INVx1_ASAP7_75t_R \U$2255 (
- .A(\sn$3562 ),
- .Y(\s$3563 )
- );
- INVx1_ASAP7_75t_R \U$2256 (
- .A(\con$3564 ),
- .Y(\c$3565 )
- );
- INVx1_ASAP7_75t_R \U$2257 (
- .A(\sn$3566 ),
- .Y(\s$3567 )
- );
- INVx1_ASAP7_75t_R \U$2258 (
- .A(\con$3568 ),
- .Y(\c$3569 )
- );
- INVx1_ASAP7_75t_R \U$2259 (
- .A(\sn$3570 ),
- .Y(\s$3571 )
- );
- INVx1_ASAP7_75t_R \U$2260 (
- .A(\con$3572 ),
- .Y(\c$3573 )
- );
- INVx1_ASAP7_75t_R \U$2261 (
- .A(\sn$3574 ),
- .Y(\s$3575 )
- );
- INVx1_ASAP7_75t_R \U$2262 (
- .A(\con$3576 ),
- .Y(\c$3577 )
- );
- INVx1_ASAP7_75t_R \U$2263 (
- .A(\sn$3578 ),
- .Y(\s$3579 )
- );
- INVx1_ASAP7_75t_R \U$2264 (
- .A(\con$3580 ),
- .Y(\c$3581 )
- );
- INVx1_ASAP7_75t_R \U$2265 (
- .A(\sn$3582 ),
- .Y(\s$3583 )
- );
- INVx1_ASAP7_75t_R \U$2266 (
- .A(\con$3584 ),
- .Y(\c$3585 )
- );
- INVx1_ASAP7_75t_R \U$2267 (
- .A(\sn$3586 ),
- .Y(\s$3587 )
- );
- INVx1_ASAP7_75t_R \U$2268 (
- .A(\con$3588 ),
- .Y(\c$3589 )
- );
- INVx1_ASAP7_75t_R \U$2269 (
- .A(\sn$3590 ),
- .Y(\s$3591 )
- );
- INVx1_ASAP7_75t_R \U$2270 (
- .A(\con$3592 ),
- .Y(\c$3593 )
- );
- INVx1_ASAP7_75t_R \U$2271 (
- .A(\sn$3594 ),
- .Y(\s$3595 )
- );
- INVx1_ASAP7_75t_R \U$2272 (
- .A(\con$3596 ),
- .Y(\c$3597 )
- );
- INVx1_ASAP7_75t_R \U$2273 (
- .A(\sn$3598 ),
- .Y(\s$3599 )
- );
- INVx1_ASAP7_75t_R \U$2274 (
- .A(\con$3600 ),
- .Y(\c$3601 )
- );
- INVx1_ASAP7_75t_R \U$2275 (
- .A(\sn$3602 ),
- .Y(\s$3603 )
- );
- INVx1_ASAP7_75t_R \U$2276 (
- .A(\con$3604 ),
- .Y(\c$3605 )
- );
- INVx1_ASAP7_75t_R \U$2277 (
- .A(\sn$3606 ),
- .Y(\s$3607 )
- );
- INVx1_ASAP7_75t_R \U$2278 (
- .A(\con$3608 ),
- .Y(\c$3609 )
- );
- INVx1_ASAP7_75t_R \U$2279 (
- .A(\sn$3610 ),
- .Y(\s$3611 )
- );
- INVx1_ASAP7_75t_R \U$2280 (
- .A(\con$3612 ),
- .Y(\c$3613 )
- );
- INVx1_ASAP7_75t_R \U$2281 (
- .A(\sn$3614 ),
- .Y(\s$3615 )
- );
- INVx1_ASAP7_75t_R \U$2282 (
- .A(\con$3616 ),
- .Y(\c$3617 )
- );
- INVx1_ASAP7_75t_R \U$2283 (
- .A(\sn$3618 ),
- .Y(\s$3619 )
- );
- INVx1_ASAP7_75t_R \U$2284 (
- .A(\con$3620 ),
- .Y(\c$3621 )
- );
- INVx1_ASAP7_75t_R \U$2285 (
- .A(\sn$3622 ),
- .Y(\s$3623 )
- );
- INVx1_ASAP7_75t_R \U$2286 (
- .A(\con$3624 ),
- .Y(\c$3625 )
- );
- INVx1_ASAP7_75t_R \U$2287 (
- .A(\sn$3626 ),
- .Y(\s$3627 )
- );
- INVx1_ASAP7_75t_R \U$2288 (
- .A(\con$3628 ),
- .Y(\c$3629 )
- );
- INVx1_ASAP7_75t_R \U$2289 (
- .A(\sn$3630 ),
- .Y(\s$3631 )
- );
- INVx1_ASAP7_75t_R \U$2290 (
- .A(\con$3632 ),
- .Y(\c$3633 )
- );
- INVx1_ASAP7_75t_R \U$2291 (
- .A(\sn$3634 ),
- .Y(\s$3635 )
- );
- INVx1_ASAP7_75t_R \U$2292 (
- .A(\con$3636 ),
- .Y(\c$3637 )
- );
- INVx1_ASAP7_75t_R \U$2293 (
- .A(\sn$3638 ),
- .Y(\s$3639 )
- );
- INVx1_ASAP7_75t_R \U$2294 (
- .A(\con$3640 ),
- .Y(\c$3641 )
- );
- INVx1_ASAP7_75t_R \U$2295 (
- .A(\sn$3642 ),
- .Y(\s$3643 )
- );
- INVx1_ASAP7_75t_R \U$2296 (
- .A(\con$3644 ),
- .Y(\c$3645 )
- );
- INVx1_ASAP7_75t_R \U$2297 (
- .A(\sn$3646 ),
- .Y(\s$3647 )
- );
- INVx1_ASAP7_75t_R \U$2298 (
- .A(\con$3648 ),
- .Y(\c$3649 )
- );
- INVx1_ASAP7_75t_R \U$2299 (
- .A(\sn$3650 ),
- .Y(\s$3651 )
- );
- INVx1_ASAP7_75t_R \U$2300 (
- .A(\con$3652 ),
- .Y(\c$3653 )
- );
- INVx1_ASAP7_75t_R \U$2301 (
- .A(\sn$3654 ),
- .Y(\s$3655 )
- );
- INVx1_ASAP7_75t_R \U$2302 (
- .A(\con$3656 ),
- .Y(\c$3657 )
- );
- INVx1_ASAP7_75t_R \U$2303 (
- .A(\sn$3658 ),
- .Y(\s$3659 )
- );
- INVx1_ASAP7_75t_R \U$2304 (
- .A(\con$3660 ),
- .Y(\c$3661 )
- );
- INVx1_ASAP7_75t_R \U$2305 (
- .A(\sn$3662 ),
- .Y(\s$3663 )
- );
- INVx1_ASAP7_75t_R \U$2306 (
- .A(\con$3664 ),
- .Y(\c$3665 )
- );
- INVx1_ASAP7_75t_R \U$2307 (
- .A(\sn$3666 ),
- .Y(\s$3667 )
- );
- INVx1_ASAP7_75t_R \U$2308 (
- .A(\con$3668 ),
- .Y(\c$3669 )
- );
- INVx1_ASAP7_75t_R \U$2309 (
- .A(\sn$3670 ),
- .Y(\s$3671 )
- );
- INVx1_ASAP7_75t_R \U$2310 (
- .A(\con$3672 ),
- .Y(\c$3673 )
- );
- INVx1_ASAP7_75t_R \U$2311 (
- .A(\sn$3674 ),
- .Y(\s$3675 )
- );
- INVx1_ASAP7_75t_R \U$2312 (
- .A(\con$3676 ),
- .Y(\c$3677 )
- );
- INVx1_ASAP7_75t_R \U$2313 (
- .A(\sn$3678 ),
- .Y(\s$3679 )
- );
- INVx1_ASAP7_75t_R \U$2314 (
- .A(\con$3680 ),
- .Y(\c$3681 )
- );
- INVx1_ASAP7_75t_R \U$2315 (
- .A(\sn$3682 ),
- .Y(\s$3683 )
- );
- INVx1_ASAP7_75t_R \U$2316 (
- .A(\con$3684 ),
- .Y(\c$3685 )
- );
- INVx1_ASAP7_75t_R \U$2317 (
- .A(\sn$3686 ),
- .Y(\s$3687 )
- );
- INVx1_ASAP7_75t_R \U$2318 (
- .A(\con$3688 ),
- .Y(\c$3689 )
- );
- INVx1_ASAP7_75t_R \U$2319 (
- .A(\sn$3690 ),
- .Y(\s$3691 )
- );
- INVx1_ASAP7_75t_R \U$2320 (
- .A(\con$3692 ),
- .Y(\c$3693 )
- );
- INVx1_ASAP7_75t_R \U$2321 (
- .A(\sn$3694 ),
- .Y(\s$3695 )
- );
- INVx1_ASAP7_75t_R \U$2322 (
- .A(\con$3696 ),
- .Y(\c$3697 )
- );
- INVx1_ASAP7_75t_R \U$2323 (
- .A(\sn$3698 ),
- .Y(\s$3699 )
- );
- INVx1_ASAP7_75t_R \U$2324 (
- .A(\con$3700 ),
- .Y(\c$3701 )
- );
- INVx1_ASAP7_75t_R \U$2325 (
- .A(\sn$3702 ),
- .Y(\s$3703 )
- );
- INVx1_ASAP7_75t_R \U$2326 (
- .A(\con$3704 ),
- .Y(\c$3705 )
- );
- INVx1_ASAP7_75t_R \U$2327 (
- .A(\sn$3706 ),
- .Y(\s$3707 )
- );
- INVx1_ASAP7_75t_R \U$2328 (
- .A(\con$3708 ),
- .Y(\c$3709 )
- );
- INVx1_ASAP7_75t_R \U$2329 (
- .A(\sn$3710 ),
- .Y(\s$3711 )
- );
- INVx1_ASAP7_75t_R \U$2330 (
- .A(\con$3712 ),
- .Y(\c$3713 )
- );
- INVx1_ASAP7_75t_R \U$2331 (
- .A(\sn$3714 ),
- .Y(\s$3715 )
- );
- INVx1_ASAP7_75t_R \U$2332 (
- .A(\con$3716 ),
- .Y(\c$3717 )
- );
- INVx1_ASAP7_75t_R \U$2333 (
- .A(\sn$3718 ),
- .Y(\s$3719 )
- );
- INVx1_ASAP7_75t_R \U$2334 (
- .A(\con$3720 ),
- .Y(\c$3721 )
- );
- INVx1_ASAP7_75t_R \U$2335 (
- .A(\sn$3722 ),
- .Y(\s$3723 )
- );
- INVx1_ASAP7_75t_R \U$2336 (
- .A(\con$3724 ),
- .Y(\c$3725 )
- );
- INVx1_ASAP7_75t_R \U$2337 (
- .A(\sn$3726 ),
- .Y(\s$3727 )
- );
- INVx1_ASAP7_75t_R \U$2338 (
- .A(\con$3728 ),
- .Y(\c$3729 )
- );
- INVx1_ASAP7_75t_R \U$2339 (
- .A(\sn$3730 ),
- .Y(\s$3731 )
- );
- INVx1_ASAP7_75t_R \U$2340 (
- .A(\con$3732 ),
- .Y(\c$3733 )
- );
- INVx1_ASAP7_75t_R \U$2341 (
- .A(\sn$3734 ),
- .Y(\s$3735 )
- );
- INVx1_ASAP7_75t_R \U$2342 (
- .A(\con$3736 ),
- .Y(\c$3737 )
- );
- INVx1_ASAP7_75t_R \U$2343 (
- .A(\sn$3738 ),
- .Y(\s$3739 )
- );
- INVx1_ASAP7_75t_R \U$2344 (
- .A(\con$3740 ),
- .Y(\c$3741 )
- );
- INVx1_ASAP7_75t_R \U$2345 (
- .A(\sn$3742 ),
- .Y(\s$3743 )
- );
- INVx1_ASAP7_75t_R \U$2346 (
- .A(\con$3744 ),
- .Y(\c$3745 )
- );
- INVx1_ASAP7_75t_R \U$2347 (
- .A(\sn$3746 ),
- .Y(\s$3747 )
- );
- INVx1_ASAP7_75t_R \U$2348 (
- .A(\con$3748 ),
- .Y(\c$3749 )
- );
- INVx1_ASAP7_75t_R \U$2349 (
- .A(\sn$3750 ),
- .Y(\s$3751 )
- );
- INVx1_ASAP7_75t_R \U$2350 (
- .A(\con$3752 ),
- .Y(\c$3753 )
- );
- INVx1_ASAP7_75t_R \U$2351 (
- .A(\sn$3754 ),
- .Y(\s$3755 )
- );
- INVx1_ASAP7_75t_R \U$2352 (
- .A(\con$3756 ),
- .Y(\c$3757 )
- );
- INVx1_ASAP7_75t_R \U$2353 (
- .A(\sn$3758 ),
- .Y(\s$3759 )
- );
- INVx1_ASAP7_75t_R \U$2354 (
- .A(\con$3760 ),
- .Y(\c$3761 )
- );
- INVx1_ASAP7_75t_R \U$2355 (
- .A(\sn$3762 ),
- .Y(\s$3763 )
- );
- INVx1_ASAP7_75t_R \U$2356 (
- .A(\con$3764 ),
- .Y(\c$3765 )
- );
- INVx1_ASAP7_75t_R \U$2357 (
- .A(\sn$3766 ),
- .Y(\s$3767 )
- );
- INVx1_ASAP7_75t_R \U$2358 (
- .A(\con$3768 ),
- .Y(\c$3769 )
- );
- INVx1_ASAP7_75t_R \U$2359 (
- .A(\sn$3770 ),
- .Y(\s$3771 )
- );
- INVx1_ASAP7_75t_R \U$2360 (
- .A(\con$3772 ),
- .Y(\c$3773 )
- );
- INVx1_ASAP7_75t_R \U$2361 (
- .A(\sn$3774 ),
- .Y(\s$3775 )
- );
- INVx1_ASAP7_75t_R \U$2362 (
- .A(\con$3776 ),
- .Y(\c$3777 )
- );
- INVx1_ASAP7_75t_R \U$2363 (
- .A(\sn$3778 ),
- .Y(\s$3779 )
- );
- INVx1_ASAP7_75t_R \U$2364 (
- .A(\con$3780 ),
- .Y(\c$3781 )
- );
- INVx1_ASAP7_75t_R \U$2365 (
- .A(\sn$3782 ),
- .Y(\s$3783 )
- );
- INVx1_ASAP7_75t_R \U$2366 (
- .A(\con$3784 ),
- .Y(\c$3785 )
- );
- INVx1_ASAP7_75t_R \U$2367 (
- .A(\sn$3786 ),
- .Y(\s$3787 )
- );
- INVx1_ASAP7_75t_R \U$2368 (
- .A(\con$3788 ),
- .Y(\c$3789 )
- );
- INVx1_ASAP7_75t_R \U$2369 (
- .A(\sn$3790 ),
- .Y(\s$3791 )
- );
- INVx1_ASAP7_75t_R \U$2370 (
- .A(\con$3792 ),
- .Y(\c$3793 )
- );
- INVx1_ASAP7_75t_R \U$2371 (
- .A(\sn$3794 ),
- .Y(\s$3795 )
- );
- INVx1_ASAP7_75t_R \U$2372 (
- .A(\con$3796 ),
- .Y(\c$3797 )
- );
- INVx1_ASAP7_75t_R \U$2373 (
- .A(\sn$3798 ),
- .Y(\s$3799 )
- );
- INVx1_ASAP7_75t_R \U$2374 (
- .A(\con$3800 ),
- .Y(\c$3801 )
- );
- INVx1_ASAP7_75t_R \U$2375 (
- .A(\sn$3802 ),
- .Y(\s$3803 )
- );
- INVx1_ASAP7_75t_R \U$2376 (
- .A(\con$3804 ),
- .Y(\c$3805 )
- );
- INVx1_ASAP7_75t_R \U$2377 (
- .A(\sn$3806 ),
- .Y(\s$3807 )
- );
- INVx1_ASAP7_75t_R \U$2378 (
- .A(\con$3808 ),
- .Y(\c$3809 )
- );
- INVx1_ASAP7_75t_R \U$2379 (
- .A(\sn$3810 ),
- .Y(\s$3811 )
- );
- INVx1_ASAP7_75t_R \U$2380 (
- .A(\con$3812 ),
- .Y(\c$3813 )
- );
- INVx1_ASAP7_75t_R \U$2381 (
- .A(\sn$3814 ),
- .Y(\s$3815 )
- );
- INVx1_ASAP7_75t_R \U$2382 (
- .A(\con$3816 ),
- .Y(\c$3817 )
- );
- INVx1_ASAP7_75t_R \U$2383 (
- .A(\sn$3818 ),
- .Y(\s$3819 )
- );
- INVx1_ASAP7_75t_R \U$2384 (
- .A(\con$3820 ),
- .Y(\c$3821 )
- );
- INVx1_ASAP7_75t_R \U$2385 (
- .A(\sn$3822 ),
- .Y(\s$3823 )
- );
- INVx1_ASAP7_75t_R \U$2386 (
- .A(\con$3824 ),
- .Y(\c$3825 )
- );
- INVx1_ASAP7_75t_R \U$2387 (
- .A(\sn$3826 ),
- .Y(\s$3827 )
- );
- INVx1_ASAP7_75t_R \U$2388 (
- .A(\con$3828 ),
- .Y(\c$3829 )
- );
- INVx1_ASAP7_75t_R \U$2389 (
- .A(\sn$3830 ),
- .Y(\s$3831 )
- );
- INVx1_ASAP7_75t_R \U$2390 (
- .A(\con$3832 ),
- .Y(\c$3833 )
- );
- INVx1_ASAP7_75t_R \U$2391 (
- .A(\sn$3834 ),
- .Y(\s$3835 )
- );
- INVx1_ASAP7_75t_R \U$2392 (
- .A(\con$3836 ),
- .Y(\c$3837 )
- );
- INVx1_ASAP7_75t_R \U$2393 (
- .A(\sn$3838 ),
- .Y(\s$3839 )
- );
- INVx1_ASAP7_75t_R \U$2394 (
- .A(\con$3840 ),
- .Y(\c$3841 )
- );
- INVx1_ASAP7_75t_R \U$2395 (
- .A(\sn$3842 ),
- .Y(\s$3843 )
- );
- INVx1_ASAP7_75t_R \U$2396 (
- .A(\con$3844 ),
- .Y(\c$3845 )
- );
- INVx1_ASAP7_75t_R \U$2397 (
- .A(\sn$3846 ),
- .Y(\s$3847 )
- );
- INVx1_ASAP7_75t_R \U$2398 (
- .A(\con$3848 ),
- .Y(\c$3849 )
- );
- INVx1_ASAP7_75t_R \U$2399 (
- .A(\sn$3850 ),
- .Y(\s$3851 )
- );
- INVx1_ASAP7_75t_R \U$2400 (
- .A(\con$3852 ),
- .Y(\c$3853 )
- );
- INVx1_ASAP7_75t_R \U$2401 (
- .A(\sn$3854 ),
- .Y(\s$3855 )
- );
- INVx1_ASAP7_75t_R \U$2402 (
- .A(\con$3856 ),
- .Y(\c$3857 )
- );
- INVx1_ASAP7_75t_R \U$2403 (
- .A(\sn$3858 ),
- .Y(\s$3859 )
- );
- INVx1_ASAP7_75t_R \U$2404 (
- .A(\con$3860 ),
- .Y(\c$3861 )
- );
- INVx1_ASAP7_75t_R \U$2405 (
- .A(\sn$3862 ),
- .Y(\s$3863 )
- );
- INVx1_ASAP7_75t_R \U$2406 (
- .A(\con$3864 ),
- .Y(\c$3865 )
- );
- INVx1_ASAP7_75t_R \U$2407 (
- .A(\sn$3866 ),
- .Y(\s$3867 )
- );
- INVx1_ASAP7_75t_R \U$2408 (
- .A(\con$3868 ),
- .Y(\c$3869 )
- );
- INVx1_ASAP7_75t_R \U$2409 (
- .A(\sn$3870 ),
- .Y(\s$3871 )
- );
- INVx1_ASAP7_75t_R \U$2410 (
- .A(\con$3872 ),
- .Y(\c$3873 )
- );
- INVx1_ASAP7_75t_R \U$2411 (
- .A(\sn$3874 ),
- .Y(\s$3875 )
- );
- INVx1_ASAP7_75t_R \U$2412 (
- .A(\con$3876 ),
- .Y(\c$3877 )
- );
- INVx1_ASAP7_75t_R \U$2413 (
- .A(\sn$3878 ),
- .Y(\s$3879 )
- );
- INVx1_ASAP7_75t_R \U$2414 (
- .A(\con$3880 ),
- .Y(\c$3881 )
- );
- INVx1_ASAP7_75t_R \U$2415 (
- .A(\sn$3882 ),
- .Y(\s$3883 )
- );
- INVx1_ASAP7_75t_R \U$2416 (
- .A(\con$3884 ),
- .Y(\c$3885 )
- );
- INVx1_ASAP7_75t_R \U$2417 (
- .A(\sn$3886 ),
- .Y(\s$3887 )
- );
- INVx1_ASAP7_75t_R \U$2418 (
- .A(\con$3888 ),
- .Y(\c$3889 )
- );
- INVx1_ASAP7_75t_R \U$2419 (
- .A(\sn$3890 ),
- .Y(\s$3891 )
- );
- INVx1_ASAP7_75t_R \U$2420 (
- .A(\con$3892 ),
- .Y(\c$3893 )
- );
- INVx1_ASAP7_75t_R \U$2421 (
- .A(\sn$3894 ),
- .Y(\s$3895 )
- );
- INVx1_ASAP7_75t_R \U$2422 (
- .A(\con$3896 ),
- .Y(\c$3897 )
- );
- INVx1_ASAP7_75t_R \U$2423 (
- .A(\sn$3898 ),
- .Y(\s$3899 )
- );
- INVx1_ASAP7_75t_R \U$2424 (
- .A(\con$3900 ),
- .Y(\c$3901 )
- );
- INVx1_ASAP7_75t_R \U$2425 (
- .A(\sn$3902 ),
- .Y(\s$3903 )
- );
- INVx1_ASAP7_75t_R \U$2426 (
- .A(\con$3904 ),
- .Y(\c$3905 )
- );
- INVx1_ASAP7_75t_R \U$2427 (
- .A(\sn$3906 ),
- .Y(\s$3907 )
- );
- INVx1_ASAP7_75t_R \U$2428 (
- .A(\con$3908 ),
- .Y(\c$3909 )
- );
- INVx1_ASAP7_75t_R \U$2429 (
- .A(\sn$3910 ),
- .Y(\s$3911 )
- );
- INVx1_ASAP7_75t_R \U$2430 (
- .A(\con$3912 ),
- .Y(\c$3913 )
- );
- INVx1_ASAP7_75t_R \U$2431 (
- .A(\sn$3914 ),
- .Y(\s$3915 )
- );
- INVx1_ASAP7_75t_R \U$2432 (
- .A(\con$3916 ),
- .Y(\c$3917 )
- );
- INVx1_ASAP7_75t_R \U$2433 (
- .A(\sn$3918 ),
- .Y(\s$3919 )
- );
- INVx1_ASAP7_75t_R \U$2434 (
- .A(\con$3920 ),
- .Y(\c$3921 )
- );
- INVx1_ASAP7_75t_R \U$2435 (
- .A(\sn$3922 ),
- .Y(\s$3923 )
- );
- INVx1_ASAP7_75t_R \U$2436 (
- .A(\con$3924 ),
- .Y(\c$3925 )
- );
- INVx1_ASAP7_75t_R \U$2437 (
- .A(\sn$3926 ),
- .Y(\s$3927 )
- );
- INVx1_ASAP7_75t_R \U$2438 (
- .A(\con$3928 ),
- .Y(\c$3929 )
- );
- INVx1_ASAP7_75t_R \U$2439 (
- .A(\sn$3930 ),
- .Y(\s$3931 )
- );
- INVx1_ASAP7_75t_R \U$2440 (
- .A(\con$3932 ),
- .Y(\c$3933 )
- );
- INVx1_ASAP7_75t_R \U$2441 (
- .A(\sn$3934 ),
- .Y(\s$3935 )
- );
- INVx1_ASAP7_75t_R \U$2442 (
- .A(\con$3936 ),
- .Y(\c$3937 )
- );
- INVx1_ASAP7_75t_R \U$2443 (
- .A(\sn$3938 ),
- .Y(\s$3939 )
- );
- INVx1_ASAP7_75t_R \U$2444 (
- .A(\con$3940 ),
- .Y(\c$3941 )
- );
- INVx1_ASAP7_75t_R \U$2445 (
- .A(\sn$3942 ),
- .Y(\s$3943 )
- );
- INVx1_ASAP7_75t_R \U$2446 (
- .A(\con$3944 ),
- .Y(\c$3945 )
- );
- INVx1_ASAP7_75t_R \U$2447 (
- .A(\sn$3946 ),
- .Y(\s$3947 )
- );
- INVx1_ASAP7_75t_R \U$2448 (
- .A(\con$3948 ),
- .Y(\c$3949 )
- );
- INVx1_ASAP7_75t_R \U$2449 (
- .A(\sn$3950 ),
- .Y(\s$3951 )
- );
- INVx1_ASAP7_75t_R \U$2450 (
- .A(\con$3952 ),
- .Y(\c$3953 )
- );
- INVx1_ASAP7_75t_R \U$2451 (
- .A(\sn$3954 ),
- .Y(\s$3955 )
- );
- INVx1_ASAP7_75t_R \U$2452 (
- .A(\con$3956 ),
- .Y(\c$3957 )
- );
- INVx1_ASAP7_75t_R \U$2453 (
- .A(\sn$3958 ),
- .Y(\s$3959 )
- );
- INVx1_ASAP7_75t_R \U$2454 (
- .A(\con$3960 ),
- .Y(\c$3961 )
- );
- INVx1_ASAP7_75t_R \U$2455 (
- .A(\sn$3962 ),
- .Y(\s$3963 )
- );
- INVx1_ASAP7_75t_R \U$2456 (
- .A(\con$3964 ),
- .Y(\c$3965 )
- );
- INVx1_ASAP7_75t_R \U$2457 (
- .A(\sn$3966 ),
- .Y(\s$3967 )
- );
- INVx1_ASAP7_75t_R \U$2458 (
- .A(\con$3968 ),
- .Y(\c$3969 )
- );
- INVx1_ASAP7_75t_R \U$2459 (
- .A(\sn$3970 ),
- .Y(\s$3971 )
- );
- INVx1_ASAP7_75t_R \U$2460 (
- .A(\con$3972 ),
- .Y(\c$3973 )
- );
- INVx1_ASAP7_75t_R \U$2461 (
- .A(\sn$3974 ),
- .Y(\s$3975 )
- );
- INVx1_ASAP7_75t_R \U$2462 (
- .A(\con$3976 ),
- .Y(\c$3977 )
- );
- INVx1_ASAP7_75t_R \U$2463 (
- .A(\sn$3978 ),
- .Y(\s$3979 )
- );
- INVx1_ASAP7_75t_R \U$2464 (
- .A(\con$3980 ),
- .Y(\c$3981 )
- );
- INVx1_ASAP7_75t_R \U$2465 (
- .A(\sn$3982 ),
- .Y(\s$3983 )
- );
- INVx1_ASAP7_75t_R \U$2466 (
- .A(\con$3984 ),
- .Y(\c$3985 )
- );
- INVx1_ASAP7_75t_R \U$2467 (
- .A(\sn$3986 ),
- .Y(\s$3987 )
- );
- INVx1_ASAP7_75t_R \U$2468 (
- .A(\con$3988 ),
- .Y(\c$3989 )
- );
- INVx1_ASAP7_75t_R \U$2469 (
- .A(\sn$3990 ),
- .Y(\s$3991 )
- );
- INVx1_ASAP7_75t_R \U$2470 (
- .A(\con$3992 ),
- .Y(\c$3993 )
- );
- INVx1_ASAP7_75t_R \U$2471 (
- .A(\sn$3994 ),
- .Y(\s$3995 )
- );
- INVx1_ASAP7_75t_R \U$2472 (
- .A(\con$3996 ),
- .Y(\c$3997 )
- );
- INVx1_ASAP7_75t_R \U$2473 (
- .A(\sn$3998 ),
- .Y(\s$3999 )
- );
- INVx1_ASAP7_75t_R \U$2474 (
- .A(\con$4000 ),
- .Y(\c$4001 )
- );
- INVx1_ASAP7_75t_R \U$2475 (
- .A(\sn$4002 ),
- .Y(\s$4003 )
- );
- INVx1_ASAP7_75t_R \U$2476 (
- .A(\con$4004 ),
- .Y(\c$4005 )
- );
- INVx1_ASAP7_75t_R \U$2477 (
- .A(\sn$4006 ),
- .Y(\s$4007 )
- );
- INVx1_ASAP7_75t_R \U$2478 (
- .A(\con$4008 ),
- .Y(\c$4009 )
- );
- INVx1_ASAP7_75t_R \U$2479 (
- .A(\sn$4010 ),
- .Y(\s$4011 )
- );
- INVx1_ASAP7_75t_R \U$2480 (
- .A(\con$4012 ),
- .Y(\c$4013 )
- );
- INVx1_ASAP7_75t_R \U$2481 (
- .A(\sn$4014 ),
- .Y(\s$4015 )
- );
- INVx1_ASAP7_75t_R \U$2482 (
- .A(\con$4016 ),
- .Y(\c$4017 )
- );
- INVx1_ASAP7_75t_R \U$2483 (
- .A(\sn$4018 ),
- .Y(\s$4019 )
- );
- INVx1_ASAP7_75t_R \U$2484 (
- .A(\con$4020 ),
- .Y(\c$4021 )
- );
- INVx1_ASAP7_75t_R \U$2485 (
- .A(\sn$4022 ),
- .Y(\s$4023 )
- );
- INVx1_ASAP7_75t_R \U$2486 (
- .A(\con$4024 ),
- .Y(\c$4025 )
- );
- INVx1_ASAP7_75t_R \U$2487 (
- .A(\sn$4026 ),
- .Y(\s$4027 )
- );
- INVx1_ASAP7_75t_R \U$2488 (
- .A(\con$4028 ),
- .Y(\c$4029 )
- );
- INVx1_ASAP7_75t_R \U$2489 (
- .A(\sn$4030 ),
- .Y(\s$4031 )
- );
- INVx1_ASAP7_75t_R \U$2490 (
- .A(\con$4032 ),
- .Y(\c$4033 )
- );
- INVx1_ASAP7_75t_R \U$2491 (
- .A(\sn$4034 ),
- .Y(\s$4035 )
- );
- INVx1_ASAP7_75t_R \U$2492 (
- .A(\con$4036 ),
- .Y(\c$4037 )
- );
- INVx1_ASAP7_75t_R \U$2493 (
- .A(\sn$4038 ),
- .Y(\s$4039 )
- );
- INVx1_ASAP7_75t_R \U$2494 (
- .A(\con$4040 ),
- .Y(\c$4041 )
- );
- INVx1_ASAP7_75t_R \U$2495 (
- .A(\sn$4042 ),
- .Y(\s$4043 )
- );
- INVx1_ASAP7_75t_R \U$2496 (
- .A(\con$4044 ),
- .Y(\c$4045 )
- );
- INVx1_ASAP7_75t_R \U$2497 (
- .A(\sn$4046 ),
- .Y(\s$4047 )
- );
- INVx1_ASAP7_75t_R \U$2498 (
- .A(\con$4048 ),
- .Y(\c$4049 )
- );
- INVx1_ASAP7_75t_R \U$2499 (
- .A(\sn$4050 ),
- .Y(\s$4051 )
- );
- INVx1_ASAP7_75t_R \U$2500 (
- .A(\con$4052 ),
- .Y(\c$4053 )
- );
- INVx1_ASAP7_75t_R \U$2501 (
- .A(\sn$4054 ),
- .Y(\s$4055 )
- );
- INVx1_ASAP7_75t_R \U$2502 (
- .A(\con$4056 ),
- .Y(\c$4057 )
- );
- INVx1_ASAP7_75t_R \U$2503 (
- .A(\sn$4058 ),
- .Y(\s$4059 )
- );
- INVx1_ASAP7_75t_R \U$2504 (
- .A(\con$4060 ),
- .Y(\c$4061 )
- );
- INVx1_ASAP7_75t_R \U$2505 (
- .A(\sn$4062 ),
- .Y(\s$4063 )
- );
- INVx1_ASAP7_75t_R \U$2506 (
- .A(\con$4064 ),
- .Y(\c$4065 )
- );
- INVx1_ASAP7_75t_R \U$2507 (
- .A(\sn$4066 ),
- .Y(\s$4067 )
- );
- INVx1_ASAP7_75t_R \U$2508 (
- .A(\con$4068 ),
- .Y(\c$4069 )
- );
- INVx1_ASAP7_75t_R \U$2509 (
- .A(\sn$4070 ),
- .Y(\s$4071 )
- );
- INVx1_ASAP7_75t_R \U$2510 (
- .A(\con$4072 ),
- .Y(\c$4073 )
- );
- INVx1_ASAP7_75t_R \U$2511 (
- .A(\sn$4074 ),
- .Y(\s$4075 )
- );
- INVx1_ASAP7_75t_R \U$2512 (
- .A(\con$4076 ),
- .Y(\c$4077 )
- );
- INVx1_ASAP7_75t_R \U$2513 (
- .A(\sn$4078 ),
- .Y(\s$4079 )
- );
- INVx1_ASAP7_75t_R \U$2514 (
- .A(\con$4080 ),
- .Y(\c$4081 )
- );
- INVx1_ASAP7_75t_R \U$2515 (
- .A(\sn$4082 ),
- .Y(\s$4083 )
- );
- INVx1_ASAP7_75t_R \U$2516 (
- .A(\con$4084 ),
- .Y(\c$4085 )
- );
- INVx1_ASAP7_75t_R \U$2517 (
- .A(\sn$4086 ),
- .Y(\s$4087 )
- );
- INVx1_ASAP7_75t_R \U$2518 (
- .A(\con$4088 ),
- .Y(\c$4089 )
- );
- INVx1_ASAP7_75t_R \U$2519 (
- .A(\sn$4090 ),
- .Y(\s$4091 )
- );
- INVx1_ASAP7_75t_R \U$2520 (
- .A(\con$4092 ),
- .Y(\c$4093 )
- );
- INVx1_ASAP7_75t_R \U$2521 (
- .A(\sn$4094 ),
- .Y(\s$4095 )
- );
- INVx1_ASAP7_75t_R \U$2522 (
- .A(\con$4096 ),
- .Y(\c$4097 )
- );
- INVx1_ASAP7_75t_R \U$2523 (
- .A(\sn$4098 ),
- .Y(\s$4099 )
- );
- INVx1_ASAP7_75t_R \U$2524 (
- .A(\con$4100 ),
- .Y(\c$4101 )
- );
- INVx1_ASAP7_75t_R \U$2525 (
- .A(\sn$4102 ),
- .Y(\s$4103 )
- );
- INVx1_ASAP7_75t_R \U$2526 (
- .A(\con$4104 ),
- .Y(\c$4105 )
- );
- INVx1_ASAP7_75t_R \U$2527 (
- .A(\sn$4106 ),
- .Y(\s$4107 )
- );
- INVx1_ASAP7_75t_R \U$2528 (
- .A(\con$4108 ),
- .Y(\c$4109 )
- );
- INVx1_ASAP7_75t_R \U$2529 (
- .A(\sn$4110 ),
- .Y(\s$4111 )
- );
- INVx1_ASAP7_75t_R \U$2530 (
- .A(\con$4112 ),
- .Y(\c$4113 )
- );
- INVx1_ASAP7_75t_R \U$2531 (
- .A(\sn$4114 ),
- .Y(\s$4115 )
- );
- INVx1_ASAP7_75t_R \U$2532 (
- .A(\con$4116 ),
- .Y(\c$4117 )
- );
- INVx1_ASAP7_75t_R \U$2533 (
- .A(\sn$4118 ),
- .Y(\s$4119 )
- );
- INVx1_ASAP7_75t_R \U$2534 (
- .A(\con$4120 ),
- .Y(\c$4121 )
- );
- INVx1_ASAP7_75t_R \U$2535 (
- .A(\sn$4122 ),
- .Y(\s$4123 )
- );
- INVx1_ASAP7_75t_R \U$2536 (
- .A(\con$4124 ),
- .Y(\c$4125 )
- );
- INVx1_ASAP7_75t_R \U$2537 (
- .A(\sn$4126 ),
- .Y(\s$4127 )
- );
- INVx1_ASAP7_75t_R \U$2538 (
- .A(\con$4128 ),
- .Y(\c$4129 )
- );
- INVx1_ASAP7_75t_R \U$2539 (
- .A(\sn$4130 ),
- .Y(\s$4131 )
- );
- INVx1_ASAP7_75t_R \U$2540 (
- .A(\con$4132 ),
- .Y(\c$4133 )
- );
- INVx1_ASAP7_75t_R \U$2541 (
- .A(\sn$4134 ),
- .Y(\s$4135 )
- );
- INVx1_ASAP7_75t_R \U$2542 (
- .A(\con$4136 ),
- .Y(\c$4137 )
- );
- INVx1_ASAP7_75t_R \U$2543 (
- .A(\sn$4138 ),
- .Y(\s$4139 )
- );
- INVx1_ASAP7_75t_R \U$2544 (
- .A(\con$4140 ),
- .Y(\c$4141 )
- );
- INVx1_ASAP7_75t_R \U$2545 (
- .A(\sn$4142 ),
- .Y(\s$4143 )
- );
- INVx1_ASAP7_75t_R \U$2546 (
- .A(\con$4144 ),
- .Y(\c$4145 )
- );
- INVx1_ASAP7_75t_R \U$2547 (
- .A(\sn$4146 ),
- .Y(\s$4147 )
- );
- INVx1_ASAP7_75t_R \U$2548 (
- .A(\con$4148 ),
- .Y(\c$4149 )
- );
- INVx1_ASAP7_75t_R \U$2549 (
- .A(\sn$4150 ),
- .Y(\s$4151 )
- );
- INVx1_ASAP7_75t_R \U$2550 (
- .A(\con$4152 ),
- .Y(\c$4153 )
- );
- INVx1_ASAP7_75t_R \U$2551 (
- .A(\sn$4154 ),
- .Y(\s$4155 )
- );
- INVx1_ASAP7_75t_R \U$2552 (
- .A(\con$4156 ),
- .Y(\c$4157 )
- );
- INVx1_ASAP7_75t_R \U$2553 (
- .A(\sn$4158 ),
- .Y(\s$4159 )
- );
- INVx1_ASAP7_75t_R \U$2554 (
- .A(\con$4160 ),
- .Y(\c$4161 )
- );
- INVx1_ASAP7_75t_R \U$2555 (
- .A(\sn$4162 ),
- .Y(\s$4163 )
- );
- INVx1_ASAP7_75t_R \U$2556 (
- .A(\con$4164 ),
- .Y(\c$4165 )
- );
- INVx1_ASAP7_75t_R \U$2557 (
- .A(\sn$4166 ),
- .Y(\s$4167 )
- );
- INVx1_ASAP7_75t_R \U$2558 (
- .A(\con$4168 ),
- .Y(\c$4169 )
- );
- INVx1_ASAP7_75t_R \U$2559 (
- .A(\sn$4170 ),
- .Y(\s$4171 )
- );
- INVx1_ASAP7_75t_R \U$2560 (
- .A(\con$4172 ),
- .Y(\c$4173 )
- );
- INVx1_ASAP7_75t_R \U$2561 (
- .A(\sn$4174 ),
- .Y(\s$4175 )
- );
- INVx1_ASAP7_75t_R \U$2562 (
- .A(\con$4176 ),
- .Y(\c$4177 )
- );
- INVx1_ASAP7_75t_R \U$2563 (
- .A(\sn$4178 ),
- .Y(\s$4179 )
- );
- INVx1_ASAP7_75t_R \U$2564 (
- .A(\con$4180 ),
- .Y(\c$4181 )
- );
- INVx1_ASAP7_75t_R \U$2565 (
- .A(\sn$4182 ),
- .Y(\s$4183 )
- );
- INVx1_ASAP7_75t_R \U$2566 (
- .A(\con$4184 ),
- .Y(\c$4185 )
- );
- INVx1_ASAP7_75t_R \U$2567 (
- .A(\sn$4186 ),
- .Y(\s$4187 )
- );
- INVx1_ASAP7_75t_R \U$2568 (
- .A(\con$4188 ),
- .Y(\c$4189 )
- );
- INVx1_ASAP7_75t_R \U$2569 (
- .A(\sn$4190 ),
- .Y(\s$4191 )
- );
- INVx1_ASAP7_75t_R \U$2570 (
- .A(\con$4192 ),
- .Y(\c$4193 )
- );
- INVx1_ASAP7_75t_R \U$2571 (
- .A(\sn$4194 ),
- .Y(\s$4195 )
- );
- INVx1_ASAP7_75t_R \U$2572 (
- .A(\con$4196 ),
- .Y(\c$4197 )
- );
- INVx1_ASAP7_75t_R \U$2573 (
- .A(\sn$4198 ),
- .Y(\s$4199 )
- );
- INVx1_ASAP7_75t_R \U$2574 (
- .A(\con$4200 ),
- .Y(\c$4201 )
- );
- INVx1_ASAP7_75t_R \U$2575 (
- .A(\sn$4202 ),
- .Y(\s$4203 )
- );
- INVx1_ASAP7_75t_R \U$2576 (
- .A(\con$4204 ),
- .Y(\c$4205 )
- );
- INVx1_ASAP7_75t_R \U$2577 (
- .A(\sn$4206 ),
- .Y(\s$4207 )
- );
- INVx1_ASAP7_75t_R \U$2578 (
- .A(\con$4208 ),
- .Y(\c$4209 )
- );
- INVx1_ASAP7_75t_R \U$2579 (
- .A(\sn$4210 ),
- .Y(\s$4211 )
- );
- INVx1_ASAP7_75t_R \U$2580 (
- .A(\con$4212 ),
- .Y(\c$4213 )
- );
- INVx1_ASAP7_75t_R \U$2581 (
- .A(\sn$4214 ),
- .Y(\s$4215 )
- );
- INVx1_ASAP7_75t_R \U$2582 (
- .A(\con$4216 ),
- .Y(\c$4217 )
- );
- INVx1_ASAP7_75t_R \U$2583 (
- .A(\sn$4218 ),
- .Y(\s$4219 )
- );
- INVx1_ASAP7_75t_R \U$2584 (
- .A(\con$4220 ),
- .Y(\c$4221 )
- );
- INVx1_ASAP7_75t_R \U$2585 (
- .A(\sn$4222 ),
- .Y(\s$4223 )
- );
- INVx1_ASAP7_75t_R \U$2586 (
- .A(\con$4224 ),
- .Y(\c$4225 )
- );
- INVx1_ASAP7_75t_R \U$2587 (
- .A(\sn$4226 ),
- .Y(\s$4227 )
- );
- INVx1_ASAP7_75t_R \U$2588 (
- .A(\con$4228 ),
- .Y(\c$4229 )
- );
- INVx1_ASAP7_75t_R \U$2589 (
- .A(\sn$4230 ),
- .Y(\s$4231 )
- );
- INVx1_ASAP7_75t_R \U$2590 (
- .A(\con$4232 ),
- .Y(\c$4233 )
- );
- INVx1_ASAP7_75t_R \U$2591 (
- .A(\sn$4234 ),
- .Y(\s$4235 )
- );
- INVx1_ASAP7_75t_R \U$2592 (
- .A(\con$4236 ),
- .Y(\c$4237 )
- );
- INVx1_ASAP7_75t_R \U$2593 (
- .A(\sn$4238 ),
- .Y(\s$4239 )
- );
- INVx1_ASAP7_75t_R \U$2594 (
- .A(\con$4240 ),
- .Y(\c$4241 )
- );
- INVx1_ASAP7_75t_R \U$2595 (
- .A(\sn$4242 ),
- .Y(\s$4243 )
- );
- INVx1_ASAP7_75t_R \U$2596 (
- .A(\con$4244 ),
- .Y(\c$4245 )
- );
- INVx1_ASAP7_75t_R \U$2597 (
- .A(\sn$4246 ),
- .Y(\s$4247 )
- );
- INVx1_ASAP7_75t_R \U$2598 (
- .A(\con$4248 ),
- .Y(\c$4249 )
- );
- INVx1_ASAP7_75t_R \U$2599 (
- .A(\sn$4250 ),
- .Y(\s$4251 )
- );
- INVx1_ASAP7_75t_R \U$2600 (
- .A(\con$4252 ),
- .Y(\c$4253 )
- );
- INVx1_ASAP7_75t_R \U$2601 (
- .A(\sn$4254 ),
- .Y(\s$4255 )
- );
- INVx1_ASAP7_75t_R \U$2602 (
- .A(\con$4256 ),
- .Y(\c$4257 )
- );
- INVx1_ASAP7_75t_R \U$2603 (
- .A(\sn$4258 ),
- .Y(\s$4259 )
- );
- INVx1_ASAP7_75t_R \U$2604 (
- .A(\con$4260 ),
- .Y(\c$4261 )
- );
- INVx1_ASAP7_75t_R \U$2605 (
- .A(\sn$4262 ),
- .Y(\s$4263 )
- );
- INVx1_ASAP7_75t_R \U$2606 (
- .A(\con$4264 ),
- .Y(\c$4265 )
- );
- INVx1_ASAP7_75t_R \U$2607 (
- .A(\sn$4266 ),
- .Y(\s$4267 )
- );
- INVx1_ASAP7_75t_R \U$2608 (
- .A(\con$4268 ),
- .Y(\c$4269 )
- );
- INVx1_ASAP7_75t_R \U$2609 (
- .A(\sn$4270 ),
- .Y(\s$4271 )
- );
- INVx1_ASAP7_75t_R \U$2610 (
- .A(\con$4272 ),
- .Y(\c$4273 )
- );
- INVx1_ASAP7_75t_R \U$2611 (
- .A(\sn$4274 ),
- .Y(\s$4275 )
- );
- INVx1_ASAP7_75t_R \U$2612 (
- .A(\con$4276 ),
- .Y(\c$4277 )
- );
- INVx1_ASAP7_75t_R \U$2613 (
- .A(\sn$4278 ),
- .Y(\s$4279 )
- );
- INVx1_ASAP7_75t_R \U$2614 (
- .A(\con$4280 ),
- .Y(\c$4281 )
- );
- INVx1_ASAP7_75t_R \U$2615 (
- .A(\sn$4282 ),
- .Y(\s$4283 )
- );
- INVx1_ASAP7_75t_R \U$2616 (
- .A(\con$4284 ),
- .Y(\c$4285 )
- );
- INVx1_ASAP7_75t_R \U$2617 (
- .A(\sn$4286 ),
- .Y(\s$4287 )
- );
- INVx1_ASAP7_75t_R \U$2618 (
- .A(\con$4288 ),
- .Y(\c$4289 )
- );
- INVx1_ASAP7_75t_R \U$2619 (
- .A(\sn$4290 ),
- .Y(\s$4291 )
- );
- INVx1_ASAP7_75t_R \U$2620 (
- .A(\con$4292 ),
- .Y(\c$4293 )
- );
- INVx1_ASAP7_75t_R \U$2621 (
- .A(\sn$4294 ),
- .Y(\s$4295 )
- );
- INVx1_ASAP7_75t_R \U$2622 (
- .A(\con$4296 ),
- .Y(\c$4297 )
- );
- INVx1_ASAP7_75t_R \U$2623 (
- .A(\sn$4298 ),
- .Y(\s$4299 )
- );
- INVx1_ASAP7_75t_R \U$2624 (
- .A(\con$4300 ),
- .Y(\c$4301 )
- );
- INVx1_ASAP7_75t_R \U$2625 (
- .A(\sn$4302 ),
- .Y(\s$4303 )
- );
- INVx1_ASAP7_75t_R \U$2626 (
- .A(\con$4304 ),
- .Y(\c$4305 )
- );
- INVx1_ASAP7_75t_R \U$2627 (
- .A(\sn$4306 ),
- .Y(\s$4307 )
- );
- INVx1_ASAP7_75t_R \U$2628 (
- .A(\con$4308 ),
- .Y(\c$4309 )
- );
- INVx1_ASAP7_75t_R \U$2629 (
- .A(\sn$4310 ),
- .Y(\s$4311 )
- );
- INVx1_ASAP7_75t_R \U$2630 (
- .A(\con$4312 ),
- .Y(\c$4313 )
- );
- INVx1_ASAP7_75t_R \U$2631 (
- .A(\sn$4314 ),
- .Y(\s$4315 )
- );
- INVx1_ASAP7_75t_R \U$2632 (
- .A(\con$4316 ),
- .Y(\c$4317 )
- );
- INVx1_ASAP7_75t_R \U$2633 (
- .A(\sn$4318 ),
- .Y(\s$4319 )
- );
- INVx1_ASAP7_75t_R \U$2634 (
- .A(\con$4320 ),
- .Y(\c$4321 )
- );
- INVx1_ASAP7_75t_R \U$2635 (
- .A(\sn$4322 ),
- .Y(\s$4323 )
- );
- INVx1_ASAP7_75t_R \U$2636 (
- .A(\con$4324 ),
- .Y(\c$4325 )
- );
- INVx1_ASAP7_75t_R \U$2637 (
- .A(\sn$4326 ),
- .Y(\s$4327 )
- );
- INVx1_ASAP7_75t_R \U$2638 (
- .A(\con$4328 ),
- .Y(\c$4329 )
- );
- INVx1_ASAP7_75t_R \U$2639 (
- .A(\sn$4330 ),
- .Y(\s$4331 )
- );
- INVx1_ASAP7_75t_R \U$2640 (
- .A(\con$4332 ),
- .Y(\c$4333 )
- );
- INVx1_ASAP7_75t_R \U$2641 (
- .A(\sn$4334 ),
- .Y(\s$4335 )
- );
- INVx1_ASAP7_75t_R \U$2642 (
- .A(\con$4336 ),
- .Y(\c$4337 )
- );
- INVx1_ASAP7_75t_R \U$2643 (
- .A(\sn$4338 ),
- .Y(\s$4339 )
- );
- INVx1_ASAP7_75t_R \U$2644 (
- .A(\con$4340 ),
- .Y(\c$4341 )
- );
- INVx1_ASAP7_75t_R \U$2645 (
- .A(\sn$4342 ),
- .Y(\s$4343 )
- );
- INVx1_ASAP7_75t_R \U$2646 (
- .A(\con$4344 ),
- .Y(\c$4345 )
- );
- INVx1_ASAP7_75t_R \U$2647 (
- .A(\sn$4346 ),
- .Y(\s$4347 )
- );
- INVx1_ASAP7_75t_R \U$2648 (
- .A(\con$4348 ),
- .Y(\c$4349 )
- );
- INVx1_ASAP7_75t_R \U$2649 (
- .A(\sn$4350 ),
- .Y(\s$4351 )
- );
- INVx1_ASAP7_75t_R \U$2650 (
- .A(\con$4352 ),
- .Y(\c$4353 )
- );
- INVx1_ASAP7_75t_R \U$2651 (
- .A(\sn$4354 ),
- .Y(\s$4355 )
- );
- INVx1_ASAP7_75t_R \U$2652 (
- .A(\con$4356 ),
- .Y(\c$4357 )
- );
- INVx1_ASAP7_75t_R \U$2653 (
- .A(\sn$4358 ),
- .Y(\s$4359 )
- );
- INVx1_ASAP7_75t_R \U$2654 (
- .A(\con$4360 ),
- .Y(\c$4361 )
- );
- INVx1_ASAP7_75t_R \U$2655 (
- .A(\sn$4362 ),
- .Y(\s$4363 )
- );
- INVx1_ASAP7_75t_R \U$2656 (
- .A(\con$4364 ),
- .Y(\c$4365 )
- );
- INVx1_ASAP7_75t_R \U$2657 (
- .A(\sn$4366 ),
- .Y(\s$4367 )
- );
- INVx1_ASAP7_75t_R \U$2658 (
- .A(\con$4368 ),
- .Y(\c$4369 )
- );
- INVx1_ASAP7_75t_R \U$2659 (
- .A(\sn$4370 ),
- .Y(\s$4371 )
- );
- INVx1_ASAP7_75t_R \U$2660 (
- .A(\con$4372 ),
- .Y(\c$4373 )
- );
- INVx1_ASAP7_75t_R \U$2661 (
- .A(\sn$4374 ),
- .Y(\s$4375 )
- );
- INVx1_ASAP7_75t_R \U$2662 (
- .A(\con$4376 ),
- .Y(\c$4377 )
- );
- INVx1_ASAP7_75t_R \U$2663 (
- .A(\sn$4378 ),
- .Y(\s$4379 )
- );
- INVx1_ASAP7_75t_R \U$2664 (
- .A(\con$4380 ),
- .Y(\c$4381 )
- );
- INVx1_ASAP7_75t_R \U$2665 (
- .A(\sn$4382 ),
- .Y(\s$4383 )
- );
- INVx1_ASAP7_75t_R \U$2666 (
- .A(\con$4384 ),
- .Y(\c$4385 )
- );
- INVx1_ASAP7_75t_R \U$2667 (
- .A(\sn$4386 ),
- .Y(\s$4387 )
- );
- INVx1_ASAP7_75t_R \U$2668 (
- .A(\con$4388 ),
- .Y(\c$4389 )
- );
- INVx1_ASAP7_75t_R \U$2669 (
- .A(\sn$4390 ),
- .Y(\s$4391 )
- );
- INVx1_ASAP7_75t_R \U$2670 (
- .A(\con$4392 ),
- .Y(\c$4393 )
- );
- INVx1_ASAP7_75t_R \U$2671 (
- .A(\sn$4394 ),
- .Y(\s$4395 )
- );
- INVx1_ASAP7_75t_R \U$2672 (
- .A(\con$4396 ),
- .Y(\c$4397 )
- );
- INVx1_ASAP7_75t_R \U$2673 (
- .A(\sn$4398 ),
- .Y(\s$4399 )
- );
- INVx1_ASAP7_75t_R \U$2674 (
- .A(\con$4400 ),
- .Y(c)
- );
- INVx1_ASAP7_75t_R \U$2675 (
- .A(\sn$4401 ),
- .Y(s)
- );
- INVx1_ASAP7_75t_R \U$2676 (
- .A(\con$4402 ),
- .Y(\c$1197 )
- );
- INVx1_ASAP7_75t_R \U$2677 (
- .A(\sn$4403 ),
- .Y(\s$1260 )
- );
- INVx1_ASAP7_75t_R \U$2678 (
- .A(\con$4404 ),
- .Y(\c$1198 )
- );
- INVx1_ASAP7_75t_R \U$2679 (
- .A(\sn$4405 ),
- .Y(\s$1261 )
- );
- INVx1_ASAP7_75t_R \U$2680 (
- .A(\con$4406 ),
- .Y(\c$1199 )
- );
- INVx1_ASAP7_75t_R \U$2681 (
- .A(\sn$4407 ),
- .Y(\s$1262 )
- );
- INVx1_ASAP7_75t_R \U$2682 (
- .A(\con$4408 ),
- .Y(\c$1200 )
- );
- INVx1_ASAP7_75t_R \U$2683 (
- .A(\sn$4409 ),
- .Y(\s$1263 )
- );
- INVx1_ASAP7_75t_R \U$2684 (
- .A(\con$4410 ),
- .Y(\c$1201 )
- );
- INVx1_ASAP7_75t_R \U$2685 (
- .A(\sn$4411 ),
- .Y(\s$1264 )
- );
- INVx1_ASAP7_75t_R \U$2686 (
- .A(\con$4412 ),
- .Y(\c$1202 )
- );
- INVx1_ASAP7_75t_R \U$2687 (
- .A(\sn$4413 ),
- .Y(\s$1265 )
- );
- INVx1_ASAP7_75t_R \U$2688 (
- .A(\con$4414 ),
- .Y(\c$1203 )
- );
- INVx1_ASAP7_75t_R \U$2689 (
- .A(\sn$4415 ),
- .Y(\s$1266 )
- );
- INVx1_ASAP7_75t_R \U$2690 (
- .A(\con$4416 ),
- .Y(\c$1204 )
- );
- INVx1_ASAP7_75t_R \U$2691 (
- .A(\sn$4417 ),
- .Y(\s$1267 )
- );
- INVx1_ASAP7_75t_R \U$2692 (
- .A(\con$4418 ),
- .Y(\c$1205 )
- );
- INVx1_ASAP7_75t_R \U$2693 (
- .A(\sn$4419 ),
- .Y(\s$1268 )
- );
- INVx1_ASAP7_75t_R \U$2694 (
- .A(\con$4420 ),
- .Y(\c$1206 )
- );
- INVx1_ASAP7_75t_R \U$2695 (
- .A(\sn$4421 ),
- .Y(\s$1269 )
- );
- INVx1_ASAP7_75t_R \U$2696 (
- .A(\con$4422 ),
- .Y(\c$1207 )
- );
- INVx1_ASAP7_75t_R \U$2697 (
- .A(\sn$4423 ),
- .Y(\s$1270 )
- );
- INVx1_ASAP7_75t_R \U$2698 (
- .A(\con$4424 ),
- .Y(\c$1208 )
- );
- INVx1_ASAP7_75t_R \U$2699 (
- .A(\sn$4425 ),
- .Y(\s$1271 )
- );
- INVx1_ASAP7_75t_R \U$2700 (
- .A(\con$4426 ),
- .Y(\c$1209 )
- );
- INVx1_ASAP7_75t_R \U$2701 (
- .A(\sn$4427 ),
- .Y(\s$1272 )
- );
- INVx1_ASAP7_75t_R \U$2702 (
- .A(\con$4428 ),
- .Y(\c$1210 )
- );
- INVx1_ASAP7_75t_R \U$2703 (
- .A(\sn$4429 ),
- .Y(\s$1273 )
- );
- INVx1_ASAP7_75t_R \U$2704 (
- .A(\con$4430 ),
- .Y(\c$1211 )
- );
- INVx1_ASAP7_75t_R \U$2705 (
- .A(\sn$4431 ),
- .Y(\s$1274 )
- );
- INVx1_ASAP7_75t_R \U$2706 (
- .A(\con$4432 ),
- .Y(\c$1212 )
- );
- INVx1_ASAP7_75t_R \U$2707 (
- .A(\sn$4433 ),
- .Y(\s$1275 )
- );
- INVx1_ASAP7_75t_R \U$2708 (
- .A(\con$4434 ),
- .Y(\c$1213 )
- );
- INVx1_ASAP7_75t_R \U$2709 (
- .A(\sn$4435 ),
- .Y(\s$1276 )
- );
- INVx1_ASAP7_75t_R \U$2710 (
- .A(\con$4436 ),
- .Y(\c$1214 )
- );
- INVx1_ASAP7_75t_R \U$2711 (
- .A(\sn$4437 ),
- .Y(\s$1277 )
- );
- INVx1_ASAP7_75t_R \U$2712 (
- .A(\con$4438 ),
- .Y(\c$1215 )
- );
- INVx1_ASAP7_75t_R \U$2713 (
- .A(\sn$4439 ),
- .Y(\s$1278 )
- );
- INVx1_ASAP7_75t_R \U$2714 (
- .A(\con$4440 ),
- .Y(\c$1216 )
- );
- INVx1_ASAP7_75t_R \U$2715 (
- .A(\sn$4441 ),
- .Y(\s$1279 )
- );
- INVx1_ASAP7_75t_R \U$2716 (
- .A(\con$4442 ),
- .Y(\c$1217 )
- );
- INVx1_ASAP7_75t_R \U$2717 (
- .A(\sn$4443 ),
- .Y(\s$1280 )
- );
- INVx1_ASAP7_75t_R \U$2718 (
- .A(\con$4444 ),
- .Y(\c$1218 )
- );
- INVx1_ASAP7_75t_R \U$2719 (
- .A(\sn$4445 ),
- .Y(\s$1281 )
- );
- INVx1_ASAP7_75t_R \U$2720 (
- .A(\con$4446 ),
- .Y(\c$1219 )
- );
- INVx1_ASAP7_75t_R \U$2721 (
- .A(\sn$4447 ),
- .Y(\s$1282 )
- );
- INVx1_ASAP7_75t_R \U$2722 (
- .A(\con$4448 ),
- .Y(\c$1220 )
- );
- INVx1_ASAP7_75t_R \U$2723 (
- .A(\sn$4449 ),
- .Y(\s$1283 )
- );
- INVx1_ASAP7_75t_R \U$2724 (
- .A(\con$4450 ),
- .Y(\c$1221 )
- );
- INVx1_ASAP7_75t_R \U$2725 (
- .A(\sn$4451 ),
- .Y(\s$1284 )
- );
- INVx1_ASAP7_75t_R \U$2726 (
- .A(\con$4452 ),
- .Y(\c$1222 )
- );
- INVx1_ASAP7_75t_R \U$2727 (
- .A(\sn$4453 ),
- .Y(\s$1285 )
- );
- INVx1_ASAP7_75t_R \U$2728 (
- .A(\con$4454 ),
- .Y(\c$1223 )
- );
- INVx1_ASAP7_75t_R \U$2729 (
- .A(\sn$4455 ),
- .Y(\s$1286 )
- );
- INVx1_ASAP7_75t_R \U$2730 (
- .A(\con$4456 ),
- .Y(\c$1224 )
- );
- INVx1_ASAP7_75t_R \U$2731 (
- .A(\sn$4457 ),
- .Y(\s$1287 )
- );
- INVx1_ASAP7_75t_R \U$2732 (
- .A(\con$4458 ),
- .Y(\c$1225 )
- );
- INVx1_ASAP7_75t_R \U$2733 (
- .A(\sn$4459 ),
- .Y(\s$1288 )
- );
- INVx1_ASAP7_75t_R \U$2734 (
- .A(\con$4460 ),
- .Y(\c$1226 )
- );
- INVx1_ASAP7_75t_R \U$2735 (
- .A(\sn$4461 ),
- .Y(\s$1289 )
- );
- INVx1_ASAP7_75t_R \U$2736 (
- .A(\con$4462 ),
- .Y(\c$1227 )
- );
- INVx1_ASAP7_75t_R \U$2737 (
- .A(\sn$4463 ),
- .Y(\s$1290 )
- );
- INVx1_ASAP7_75t_R \U$2738 (
- .A(\con$4464 ),
- .Y(\c$1228 )
- );
- INVx1_ASAP7_75t_R \U$2739 (
- .A(\sn$4465 ),
- .Y(\s$1291 )
- );
- INVx1_ASAP7_75t_R \U$2740 (
- .A(\con$4466 ),
- .Y(\c$1229 )
- );
- INVx1_ASAP7_75t_R \U$2741 (
- .A(\sn$4467 ),
- .Y(\s$1292 )
- );
- INVx1_ASAP7_75t_R \U$2742 (
- .A(\con$4468 ),
- .Y(\c$1230 )
- );
- INVx1_ASAP7_75t_R \U$2743 (
- .A(\sn$4469 ),
- .Y(\s$1293 )
- );
- INVx1_ASAP7_75t_R \U$2744 (
- .A(\con$4470 ),
- .Y(\c$1231 )
- );
- INVx1_ASAP7_75t_R \U$2745 (
- .A(\sn$4471 ),
- .Y(\s$1294 )
- );
- INVx1_ASAP7_75t_R \U$2746 (
- .A(\con$4472 ),
- .Y(\c$1232 )
- );
- INVx1_ASAP7_75t_R \U$2747 (
- .A(\sn$4473 ),
- .Y(\s$1295 )
- );
- INVx1_ASAP7_75t_R \U$2748 (
- .A(\con$4474 ),
- .Y(\c$1233 )
- );
- INVx1_ASAP7_75t_R \U$2749 (
- .A(\sn$4475 ),
- .Y(\s$1296 )
- );
- INVx1_ASAP7_75t_R \U$2750 (
- .A(\con$4476 ),
- .Y(\c$1234 )
- );
- INVx1_ASAP7_75t_R \U$2751 (
- .A(\sn$4477 ),
- .Y(\s$1297 )
- );
- INVx1_ASAP7_75t_R \U$2752 (
- .A(\con$4478 ),
- .Y(\c$1235 )
- );
- INVx1_ASAP7_75t_R \U$2753 (
- .A(\sn$4479 ),
- .Y(\s$1298 )
- );
- INVx1_ASAP7_75t_R \U$2754 (
- .A(\con$4480 ),
- .Y(\c$1236 )
- );
- INVx1_ASAP7_75t_R \U$2755 (
- .A(\sn$4481 ),
- .Y(\s$1299 )
- );
- INVx1_ASAP7_75t_R \U$2756 (
- .A(\con$4482 ),
- .Y(\c$1237 )
- );
- INVx1_ASAP7_75t_R \U$2757 (
- .A(\sn$4483 ),
- .Y(\s$1300 )
- );
- INVx1_ASAP7_75t_R \U$2758 (
- .A(\con$4484 ),
- .Y(\c$1238 )
- );
- INVx1_ASAP7_75t_R \U$2759 (
- .A(\sn$4485 ),
- .Y(\s$1301 )
- );
- INVx1_ASAP7_75t_R \U$2760 (
- .A(\con$4486 ),
- .Y(\c$1239 )
- );
- INVx1_ASAP7_75t_R \U$2761 (
- .A(\sn$4487 ),
- .Y(\s$1302 )
- );
- INVx1_ASAP7_75t_R \U$2762 (
- .A(\con$4488 ),
- .Y(\c$1240 )
- );
- INVx1_ASAP7_75t_R \U$2763 (
- .A(\sn$4489 ),
- .Y(\s$1303 )
- );
- INVx1_ASAP7_75t_R \U$2764 (
- .A(\con$4490 ),
- .Y(\c$1241 )
- );
- INVx1_ASAP7_75t_R \U$2765 (
- .A(\sn$4491 ),
- .Y(\s$1304 )
- );
- INVx1_ASAP7_75t_R \U$2766 (
- .A(\con$4492 ),
- .Y(\c$1242 )
- );
- INVx1_ASAP7_75t_R \U$2767 (
- .A(\sn$4493 ),
- .Y(\s$1305 )
- );
- INVx1_ASAP7_75t_R \U$2768 (
- .A(\con$4494 ),
- .Y(\c$1243 )
- );
- INVx1_ASAP7_75t_R \U$2769 (
- .A(\sn$4495 ),
- .Y(\s$1306 )
- );
- INVx1_ASAP7_75t_R \U$2770 (
- .A(\con$4496 ),
- .Y(\c$1244 )
- );
- INVx1_ASAP7_75t_R \U$2771 (
- .A(\sn$4497 ),
- .Y(\s$1307 )
- );
- INVx1_ASAP7_75t_R \U$2772 (
- .A(\con$4498 ),
- .Y(\c$1245 )
- );
- INVx1_ASAP7_75t_R \U$2773 (
- .A(\sn$4499 ),
- .Y(\s$1308 )
- );
- INVx1_ASAP7_75t_R \U$2774 (
- .A(\con$4500 ),
- .Y(\c$1246 )
- );
- INVx1_ASAP7_75t_R \U$2775 (
- .A(\sn$4501 ),
- .Y(\s$1309 )
- );
- INVx1_ASAP7_75t_R \U$2776 (
- .A(\con$4502 ),
- .Y(\c$1247 )
- );
- INVx1_ASAP7_75t_R \U$2777 (
- .A(\sn$4503 ),
- .Y(\s$1310 )
- );
- INVx1_ASAP7_75t_R \U$2778 (
- .A(\con$4504 ),
- .Y(\c$1248 )
- );
- INVx1_ASAP7_75t_R \U$2779 (
- .A(\sn$4505 ),
- .Y(\s$1311 )
- );
- INVx1_ASAP7_75t_R \U$2780 (
- .A(\con$4506 ),
- .Y(\c$1249 )
- );
- INVx1_ASAP7_75t_R \U$2781 (
- .A(\sn$4507 ),
- .Y(\s$1312 )
- );
- INVx1_ASAP7_75t_R \U$2782 (
- .A(\con$4508 ),
- .Y(\c$1250 )
- );
- INVx1_ASAP7_75t_R \U$2783 (
- .A(\sn$4509 ),
- .Y(\s$1313 )
- );
- INVx1_ASAP7_75t_R \U$2784 (
- .A(\con$4510 ),
- .Y(\c$1251 )
- );
- INVx1_ASAP7_75t_R \U$2785 (
- .A(\sn$4511 ),
- .Y(\s$1314 )
- );
- INVx1_ASAP7_75t_R \U$2786 (
- .A(\con$4512 ),
- .Y(\c$1252 )
- );
- INVx1_ASAP7_75t_R \U$2787 (
- .A(\sn$4513 ),
- .Y(\s$1315 )
- );
- INVx1_ASAP7_75t_R \U$2788 (
- .A(\con$4514 ),
- .Y(\c$1253 )
- );
- INVx1_ASAP7_75t_R \U$2789 (
- .A(\sn$4515 ),
- .Y(\s$1316 )
- );
- INVx1_ASAP7_75t_R \U$2790 (
- .A(\con$4516 ),
- .Y(\c$1254 )
- );
- INVx1_ASAP7_75t_R \U$2791 (
- .A(\sn$4517 ),
- .Y(\s$1317 )
- );
- INVx1_ASAP7_75t_R \U$2792 (
- .A(\con$4518 ),
- .Y(\c$1255 )
- );
- INVx1_ASAP7_75t_R \U$2793 (
- .A(\sn$4519 ),
- .Y(\s$1318 )
- );
- INVx1_ASAP7_75t_R \U$2794 (
- .A(\con$4520 ),
- .Y(\c$1256 )
- );
- INVx1_ASAP7_75t_R \U$2795 (
- .A(\sn$4521 ),
- .Y(\s$1319 )
- );
- INVx1_ASAP7_75t_R \U$2796 (
- .A(\con$4522 ),
- .Y(\c$1257 )
- );
- INVx1_ASAP7_75t_R \U$2797 (
- .A(\sn$4523 ),
- .Y(\s$1320 )
- );
- INVx1_ASAP7_75t_R \U$2798 (
- .A(\con$4524 ),
- .Y(\$53 )
- );
- INVx1_ASAP7_75t_R \U$2799 (
- .A(\sn$4525 ),
- .Y(\s$1321 )
- );
- INVx1_ASAP7_75t_R \U$526 (
- .A(1'h0),
- .Y(\$1 )
- );
- INVx1_ASAP7_75t_R \U$527 (
- .A(a_registered[0]),
- .Y(\$2 )
- );
- INVx1_ASAP7_75t_R \U$528 (
- .A(a_registered[1]),
- .Y(\$3 )
- );
- AO33x2_ASAP7_75t_R \U$529 (
- .A1(\$3 ),
- .A2(a_registered[0]),
- .A3(1'h0),
- .B1(a_registered[1]),
- .B2(\$2 ),
- .B3(\$1 ),
- .Y(sel_0)
- );
- XOR2x1_ASAP7_75t_R \U$530 (
- .A(a_registered[0]),
- .B(1'h0),
- .Y(sel_1)
- );
- AO22x1_ASAP7_75t_R \U$531 (
- .A1(1'h0),
- .A2(sel_0),
- .B1(b_registered[0]),
- .B2(sel_1),
- .Y(t)
- );
- XOR2x1_ASAP7_75t_R \U$532 (
- .A(t),
- .B(a_registered[1]),
- .Y(booth_b0_m0)
- );
- AO22x1_ASAP7_75t_R \U$533 (
- .A1(b_registered[0]),
- .A2(sel_0),
- .B1(b_registered[1]),
- .B2(sel_1),
- .Y(\t$1976 )
- );
- XOR2x1_ASAP7_75t_R \U$534 (
- .A(\t$1976 ),
- .B(a_registered[1]),
- .Y(booth_b0_m1)
- );
- AO22x1_ASAP7_75t_R \U$535 (
- .A1(b_registered[1]),
- .A2(sel_0),
- .B1(b_registered[2]),
- .B2(sel_1),
- .Y(\t$1977 )
- );
- XOR2x1_ASAP7_75t_R \U$536 (
- .A(\t$1977 ),
- .B(a_registered[1]),
- .Y(booth_b0_m2)
- );
- AO22x1_ASAP7_75t_R \U$537 (
- .A1(b_registered[2]),
- .A2(sel_0),
- .B1(b_registered[3]),
- .B2(sel_1),
- .Y(\t$1978 )
- );
- XOR2x1_ASAP7_75t_R \U$538 (
- .A(\t$1978 ),
- .B(a_registered[1]),
- .Y(booth_b0_m3)
- );
- AO22x1_ASAP7_75t_R \U$539 (
- .A1(b_registered[3]),
- .A2(sel_0),
- .B1(b_registered[4]),
- .B2(sel_1),
- .Y(\t$1979 )
- );
- XOR2x1_ASAP7_75t_R \U$540 (
- .A(\t$1979 ),
- .B(a_registered[1]),
- .Y(booth_b0_m4)
- );
- AO22x1_ASAP7_75t_R \U$541 (
- .A1(b_registered[4]),
- .A2(sel_0),
- .B1(b_registered[5]),
- .B2(sel_1),
- .Y(\t$1980 )
- );
- XOR2x1_ASAP7_75t_R \U$542 (
- .A(\t$1980 ),
- .B(a_registered[1]),
- .Y(booth_b0_m5)
- );
- AO22x1_ASAP7_75t_R \U$543 (
- .A1(b_registered[5]),
- .A2(sel_0),
- .B1(b_registered[6]),
- .B2(sel_1),
- .Y(\t$1981 )
- );
- XOR2x1_ASAP7_75t_R \U$544 (
- .A(\t$1981 ),
- .B(a_registered[1]),
- .Y(booth_b0_m6)
- );
- AO22x1_ASAP7_75t_R \U$545 (
- .A1(b_registered[6]),
- .A2(sel_0),
- .B1(b_registered[7]),
- .B2(sel_1),
- .Y(\t$1982 )
- );
- XOR2x1_ASAP7_75t_R \U$546 (
- .A(\t$1982 ),
- .B(a_registered[1]),
- .Y(booth_b0_m7)
- );
- AO22x1_ASAP7_75t_R \U$547 (
- .A1(b_registered[7]),
- .A2(sel_0),
- .B1(b_registered[8]),
- .B2(sel_1),
- .Y(\t$1983 )
- );
- XOR2x1_ASAP7_75t_R \U$548 (
- .A(\t$1983 ),
- .B(a_registered[1]),
- .Y(booth_b0_m8)
- );
- AO22x1_ASAP7_75t_R \U$549 (
- .A1(b_registered[8]),
- .A2(sel_0),
- .B1(b_registered[9]),
- .B2(sel_1),
- .Y(\t$1984 )
- );
- XOR2x1_ASAP7_75t_R \U$550 (
- .A(\t$1984 ),
- .B(a_registered[1]),
- .Y(booth_b0_m9)
- );
- AO22x1_ASAP7_75t_R \U$551 (
- .A1(b_registered[9]),
- .A2(sel_0),
- .B1(b_registered[10]),
- .B2(sel_1),
- .Y(\t$1985 )
- );
- XOR2x1_ASAP7_75t_R \U$552 (
- .A(\t$1985 ),
- .B(a_registered[1]),
- .Y(booth_b0_m10)
- );
- AO22x1_ASAP7_75t_R \U$553 (
- .A1(b_registered[10]),
- .A2(sel_0),
- .B1(b_registered[11]),
- .B2(sel_1),
- .Y(\t$1986 )
- );
- XOR2x1_ASAP7_75t_R \U$554 (
- .A(\t$1986 ),
- .B(a_registered[1]),
- .Y(booth_b0_m11)
- );
- AO22x1_ASAP7_75t_R \U$555 (
- .A1(b_registered[11]),
- .A2(sel_0),
- .B1(b_registered[12]),
- .B2(sel_1),
- .Y(\t$1987 )
- );
- XOR2x1_ASAP7_75t_R \U$556 (
- .A(\t$1987 ),
- .B(a_registered[1]),
- .Y(booth_b0_m12)
- );
- AO22x1_ASAP7_75t_R \U$557 (
- .A1(b_registered[12]),
- .A2(sel_0),
- .B1(b_registered[13]),
- .B2(sel_1),
- .Y(\t$1988 )
- );
- XOR2x1_ASAP7_75t_R \U$558 (
- .A(\t$1988 ),
- .B(a_registered[1]),
- .Y(booth_b0_m13)
- );
- AO22x1_ASAP7_75t_R \U$559 (
- .A1(b_registered[13]),
- .A2(sel_0),
- .B1(b_registered[14]),
- .B2(sel_1),
- .Y(\t$1989 )
- );
- XOR2x1_ASAP7_75t_R \U$560 (
- .A(\t$1989 ),
- .B(a_registered[1]),
- .Y(booth_b0_m14)
- );
- AO22x1_ASAP7_75t_R \U$561 (
- .A1(b_registered[14]),
- .A2(sel_0),
- .B1(b_registered[15]),
- .B2(sel_1),
- .Y(\t$1990 )
- );
- XOR2x1_ASAP7_75t_R \U$562 (
- .A(\t$1990 ),
- .B(a_registered[1]),
- .Y(booth_b0_m15)
- );
- AO22x1_ASAP7_75t_R \U$563 (
- .A1(b_registered[15]),
- .A2(sel_0),
- .B1(b_registered[16]),
- .B2(sel_1),
- .Y(\t$1991 )
- );
- XOR2x1_ASAP7_75t_R \U$564 (
- .A(\t$1991 ),
- .B(a_registered[1]),
- .Y(booth_b0_m16)
- );
- AO22x1_ASAP7_75t_R \U$565 (
- .A1(b_registered[16]),
- .A2(sel_0),
- .B1(b_registered[17]),
- .B2(sel_1),
- .Y(\t$1992 )
- );
- XOR2x1_ASAP7_75t_R \U$566 (
- .A(\t$1992 ),
- .B(a_registered[1]),
- .Y(booth_b0_m17)
- );
- AO22x1_ASAP7_75t_R \U$567 (
- .A1(b_registered[17]),
- .A2(sel_0),
- .B1(b_registered[18]),
- .B2(sel_1),
- .Y(\t$1993 )
- );
- XOR2x1_ASAP7_75t_R \U$568 (
- .A(\t$1993 ),
- .B(a_registered[1]),
- .Y(booth_b0_m18)
- );
- AO22x1_ASAP7_75t_R \U$569 (
- .A1(b_registered[18]),
- .A2(sel_0),
- .B1(b_registered[19]),
- .B2(sel_1),
- .Y(\t$1994 )
- );
- XOR2x1_ASAP7_75t_R \U$570 (
- .A(\t$1994 ),
- .B(a_registered[1]),
- .Y(booth_b0_m19)
- );
- AO22x1_ASAP7_75t_R \U$571 (
- .A1(b_registered[19]),
- .A2(sel_0),
- .B1(b_registered[20]),
- .B2(sel_1),
- .Y(\t$1995 )
- );
- XOR2x1_ASAP7_75t_R \U$572 (
- .A(\t$1995 ),
- .B(a_registered[1]),
- .Y(booth_b0_m20)
- );
- AO22x1_ASAP7_75t_R \U$573 (
- .A1(b_registered[20]),
- .A2(sel_0),
- .B1(b_registered[21]),
- .B2(sel_1),
- .Y(\t$1996 )
- );
- XOR2x1_ASAP7_75t_R \U$574 (
- .A(\t$1996 ),
- .B(a_registered[1]),
- .Y(booth_b0_m21)
- );
- AO22x1_ASAP7_75t_R \U$575 (
- .A1(b_registered[21]),
- .A2(sel_0),
- .B1(b_registered[22]),
- .B2(sel_1),
- .Y(\t$1997 )
- );
- XOR2x1_ASAP7_75t_R \U$576 (
- .A(\t$1997 ),
- .B(a_registered[1]),
- .Y(booth_b0_m22)
- );
- AO22x1_ASAP7_75t_R \U$577 (
- .A1(b_registered[22]),
- .A2(sel_0),
- .B1(b_registered[23]),
- .B2(sel_1),
- .Y(\t$1998 )
- );
- XOR2x1_ASAP7_75t_R \U$578 (
- .A(\t$1998 ),
- .B(a_registered[1]),
- .Y(booth_b0_m23)
- );
- AO22x1_ASAP7_75t_R \U$579 (
- .A1(b_registered[23]),
- .A2(sel_0),
- .B1(b_registered[24]),
- .B2(sel_1),
- .Y(\t$1999 )
- );
- XOR2x1_ASAP7_75t_R \U$580 (
- .A(\t$1999 ),
- .B(a_registered[1]),
- .Y(booth_b0_m24)
- );
- AO22x1_ASAP7_75t_R \U$581 (
- .A1(b_registered[24]),
- .A2(sel_0),
- .B1(b_registered[25]),
- .B2(sel_1),
- .Y(\t$2000 )
- );
- XOR2x1_ASAP7_75t_R \U$582 (
- .A(\t$2000 ),
- .B(a_registered[1]),
- .Y(booth_b0_m25)
- );
- AO22x1_ASAP7_75t_R \U$583 (
- .A1(b_registered[25]),
- .A2(sel_0),
- .B1(b_registered[26]),
- .B2(sel_1),
- .Y(\t$2001 )
- );
- XOR2x1_ASAP7_75t_R \U$584 (
- .A(\t$2001 ),
- .B(a_registered[1]),
- .Y(booth_b0_m26)
- );
- AO22x1_ASAP7_75t_R \U$585 (
- .A1(b_registered[26]),
- .A2(sel_0),
- .B1(b_registered[27]),
- .B2(sel_1),
- .Y(\t$2002 )
- );
- XOR2x1_ASAP7_75t_R \U$586 (
- .A(\t$2002 ),
- .B(a_registered[1]),
- .Y(booth_b0_m27)
- );
- AO22x1_ASAP7_75t_R \U$587 (
- .A1(b_registered[27]),
- .A2(sel_0),
- .B1(b_registered[28]),
- .B2(sel_1),
- .Y(\t$2003 )
- );
- XOR2x1_ASAP7_75t_R \U$588 (
- .A(\t$2003 ),
- .B(a_registered[1]),
- .Y(booth_b0_m28)
- );
- AO22x1_ASAP7_75t_R \U$589 (
- .A1(b_registered[28]),
- .A2(sel_0),
- .B1(b_registered[29]),
- .B2(sel_1),
- .Y(\t$2004 )
- );
- XOR2x1_ASAP7_75t_R \U$590 (
- .A(\t$2004 ),
- .B(a_registered[1]),
- .Y(booth_b0_m29)
- );
- AO22x1_ASAP7_75t_R \U$591 (
- .A1(b_registered[29]),
- .A2(sel_0),
- .B1(b_registered[30]),
- .B2(sel_1),
- .Y(\t$2005 )
- );
- XOR2x1_ASAP7_75t_R \U$592 (
- .A(\t$2005 ),
- .B(a_registered[1]),
- .Y(booth_b0_m30)
- );
- AO22x1_ASAP7_75t_R \U$593 (
- .A1(b_registered[30]),
- .A2(sel_0),
- .B1(b_registered[31]),
- .B2(sel_1),
- .Y(\t$2006 )
- );
- XOR2x1_ASAP7_75t_R \U$594 (
- .A(\t$2006 ),
- .B(a_registered[1]),
- .Y(booth_b0_m31)
- );
- AO22x1_ASAP7_75t_R \U$595 (
- .A1(b_registered[31]),
- .A2(sel_0),
- .B1(1'h0),
- .B2(sel_1),
- .Y(\t$2007 )
- );
- XOR2x1_ASAP7_75t_R \U$596 (
- .A(\t$2007 ),
- .B(a_registered[1]),
- .Y(booth_b0_m32)
- );
- INVx1_ASAP7_75t_R \U$597 (
- .A(a_registered[1]),
- .Y(notsign)
- );
- INVx1_ASAP7_75t_R \U$598 (
- .A(a_registered[1]),
- .Y(\$4 )
- );
- INVx1_ASAP7_75t_R \U$599 (
- .A(a_registered[2]),
- .Y(\$5 )
- );
- INVx1_ASAP7_75t_R \U$600 (
- .A(a_registered[3]),
- .Y(\$6 )
- );
- AO33x2_ASAP7_75t_R \U$601 (
- .A1(\$6 ),
- .A2(a_registered[2]),
- .A3(a_registered[1]),
- .B1(a_registered[3]),
- .B2(\$5 ),
- .B3(\$4 ),
- .Y(\sel_0$1365 )
- );
- XOR2x1_ASAP7_75t_R \U$602 (
- .A(a_registered[2]),
- .B(a_registered[1]),
- .Y(\sel_1$1366 )
- );
- AO22x1_ASAP7_75t_R \U$603 (
- .A1(1'h0),
- .A2(\sel_0$1365 ),
- .B1(b_registered[0]),
- .B2(\sel_1$1366 ),
- .Y(\t$2009 )
- );
- XOR2x1_ASAP7_75t_R \U$604 (
- .A(\t$2009 ),
- .B(a_registered[3]),
- .Y(booth_b2_m0)
- );
- AO22x1_ASAP7_75t_R \U$605 (
- .A1(b_registered[0]),
- .A2(\sel_0$1365 ),
- .B1(b_registered[1]),
- .B2(\sel_1$1366 ),
- .Y(\t$2010 )
- );
- XOR2x1_ASAP7_75t_R \U$606 (
- .A(\t$2010 ),
- .B(a_registered[3]),
- .Y(booth_b2_m1)
- );
- AO22x1_ASAP7_75t_R \U$607 (
- .A1(b_registered[1]),
- .A2(\sel_0$1365 ),
- .B1(b_registered[2]),
- .B2(\sel_1$1366 ),
- .Y(\t$2011 )
- );
- XOR2x1_ASAP7_75t_R \U$608 (
- .A(\t$2011 ),
- .B(a_registered[3]),
- .Y(booth_b2_m2)
- );
- AO22x1_ASAP7_75t_R \U$609 (
- .A1(b_registered[2]),
- .A2(\sel_0$1365 ),
- .B1(b_registered[3]),
- .B2(\sel_1$1366 ),
- .Y(\t$2012 )
- );
- XOR2x1_ASAP7_75t_R \U$610 (
- .A(\t$2012 ),
- .B(a_registered[3]),
- .Y(booth_b2_m3)
- );
- AO22x1_ASAP7_75t_R \U$611 (
- .A1(b_registered[3]),
- .A2(\sel_0$1365 ),
- .B1(b_registered[4]),
- .B2(\sel_1$1366 ),
- .Y(\t$2013 )
- );
- XOR2x1_ASAP7_75t_R \U$612 (
- .A(\t$2013 ),
- .B(a_registered[3]),
- .Y(booth_b2_m4)
- );
- AO22x1_ASAP7_75t_R \U$613 (
- .A1(b_registered[4]),
- .A2(\sel_0$1365 ),
- .B1(b_registered[5]),
- .B2(\sel_1$1366 ),
- .Y(\t$2014 )
- );
- XOR2x1_ASAP7_75t_R \U$614 (
- .A(\t$2014 ),
- .B(a_registered[3]),
- .Y(booth_b2_m5)
- );
- AO22x1_ASAP7_75t_R \U$615 (
- .A1(b_registered[5]),
- .A2(\sel_0$1365 ),
- .B1(b_registered[6]),
- .B2(\sel_1$1366 ),
- .Y(\t$2015 )
- );
- XOR2x1_ASAP7_75t_R \U$616 (
- .A(\t$2015 ),
- .B(a_registered[3]),
- .Y(booth_b2_m6)
- );
- AO22x1_ASAP7_75t_R \U$617 (
- .A1(b_registered[6]),
- .A2(\sel_0$1365 ),
- .B1(b_registered[7]),
- .B2(\sel_1$1366 ),
- .Y(\t$2016 )
- );
- XOR2x1_ASAP7_75t_R \U$618 (
- .A(\t$2016 ),
- .B(a_registered[3]),
- .Y(booth_b2_m7)
- );
- AO22x1_ASAP7_75t_R \U$619 (
- .A1(b_registered[7]),
- .A2(\sel_0$1365 ),
- .B1(b_registered[8]),
- .B2(\sel_1$1366 ),
- .Y(\t$2017 )
- );
- XOR2x1_ASAP7_75t_R \U$620 (
- .A(\t$2017 ),
- .B(a_registered[3]),
- .Y(booth_b2_m8)
- );
- AO22x1_ASAP7_75t_R \U$621 (
- .A1(b_registered[8]),
- .A2(\sel_0$1365 ),
- .B1(b_registered[9]),
- .B2(\sel_1$1366 ),
- .Y(\t$2018 )
- );
- XOR2x1_ASAP7_75t_R \U$622 (
- .A(\t$2018 ),
- .B(a_registered[3]),
- .Y(booth_b2_m9)
- );
- AO22x1_ASAP7_75t_R \U$623 (
- .A1(b_registered[9]),
- .A2(\sel_0$1365 ),
- .B1(b_registered[10]),
- .B2(\sel_1$1366 ),
- .Y(\t$2019 )
- );
- XOR2x1_ASAP7_75t_R \U$624 (
- .A(\t$2019 ),
- .B(a_registered[3]),
- .Y(booth_b2_m10)
- );
- AO22x1_ASAP7_75t_R \U$625 (
- .A1(b_registered[10]),
- .A2(\sel_0$1365 ),
- .B1(b_registered[11]),
- .B2(\sel_1$1366 ),
- .Y(\t$2020 )
- );
- XOR2x1_ASAP7_75t_R \U$626 (
- .A(\t$2020 ),
- .B(a_registered[3]),
- .Y(booth_b2_m11)
- );
- AO22x1_ASAP7_75t_R \U$627 (
- .A1(b_registered[11]),
- .A2(\sel_0$1365 ),
- .B1(b_registered[12]),
- .B2(\sel_1$1366 ),
- .Y(\t$2021 )
- );
- XOR2x1_ASAP7_75t_R \U$628 (
- .A(\t$2021 ),
- .B(a_registered[3]),
- .Y(booth_b2_m12)
- );
- AO22x1_ASAP7_75t_R \U$629 (
- .A1(b_registered[12]),
- .A2(\sel_0$1365 ),
- .B1(b_registered[13]),
- .B2(\sel_1$1366 ),
- .Y(\t$2022 )
- );
- XOR2x1_ASAP7_75t_R \U$630 (
- .A(\t$2022 ),
- .B(a_registered[3]),
- .Y(booth_b2_m13)
- );
- AO22x1_ASAP7_75t_R \U$631 (
- .A1(b_registered[13]),
- .A2(\sel_0$1365 ),
- .B1(b_registered[14]),
- .B2(\sel_1$1366 ),
- .Y(\t$2023 )
- );
- XOR2x1_ASAP7_75t_R \U$632 (
- .A(\t$2023 ),
- .B(a_registered[3]),
- .Y(booth_b2_m14)
- );
- AO22x1_ASAP7_75t_R \U$633 (
- .A1(b_registered[14]),
- .A2(\sel_0$1365 ),
- .B1(b_registered[15]),
- .B2(\sel_1$1366 ),
- .Y(\t$2024 )
- );
- XOR2x1_ASAP7_75t_R \U$634 (
- .A(\t$2024 ),
- .B(a_registered[3]),
- .Y(booth_b2_m15)
- );
- AO22x1_ASAP7_75t_R \U$635 (
- .A1(b_registered[15]),
- .A2(\sel_0$1365 ),
- .B1(b_registered[16]),
- .B2(\sel_1$1366 ),
- .Y(\t$2025 )
- );
- XOR2x1_ASAP7_75t_R \U$636 (
- .A(\t$2025 ),
- .B(a_registered[3]),
- .Y(booth_b2_m16)
- );
- AO22x1_ASAP7_75t_R \U$637 (
- .A1(b_registered[16]),
- .A2(\sel_0$1365 ),
- .B1(b_registered[17]),
- .B2(\sel_1$1366 ),
- .Y(\t$2026 )
- );
- XOR2x1_ASAP7_75t_R \U$638 (
- .A(\t$2026 ),
- .B(a_registered[3]),
- .Y(booth_b2_m17)
- );
- AO22x1_ASAP7_75t_R \U$639 (
- .A1(b_registered[17]),
- .A2(\sel_0$1365 ),
- .B1(b_registered[18]),
- .B2(\sel_1$1366 ),
- .Y(\t$2027 )
- );
- XOR2x1_ASAP7_75t_R \U$640 (
- .A(\t$2027 ),
- .B(a_registered[3]),
- .Y(booth_b2_m18)
- );
- AO22x1_ASAP7_75t_R \U$641 (
- .A1(b_registered[18]),
- .A2(\sel_0$1365 ),
- .B1(b_registered[19]),
- .B2(\sel_1$1366 ),
- .Y(\t$2028 )
- );
- XOR2x1_ASAP7_75t_R \U$642 (
- .A(\t$2028 ),
- .B(a_registered[3]),
- .Y(booth_b2_m19)
- );
- AO22x1_ASAP7_75t_R \U$643 (
- .A1(b_registered[19]),
- .A2(\sel_0$1365 ),
- .B1(b_registered[20]),
- .B2(\sel_1$1366 ),
- .Y(\t$2029 )
- );
- XOR2x1_ASAP7_75t_R \U$644 (
- .A(\t$2029 ),
- .B(a_registered[3]),
- .Y(booth_b2_m20)
- );
- AO22x1_ASAP7_75t_R \U$645 (
- .A1(b_registered[20]),
- .A2(\sel_0$1365 ),
- .B1(b_registered[21]),
- .B2(\sel_1$1366 ),
- .Y(\t$2030 )
- );
- XOR2x1_ASAP7_75t_R \U$646 (
- .A(\t$2030 ),
- .B(a_registered[3]),
- .Y(booth_b2_m21)
- );
- AO22x1_ASAP7_75t_R \U$647 (
- .A1(b_registered[21]),
- .A2(\sel_0$1365 ),
- .B1(b_registered[22]),
- .B2(\sel_1$1366 ),
- .Y(\t$2031 )
- );
- XOR2x1_ASAP7_75t_R \U$648 (
- .A(\t$2031 ),
- .B(a_registered[3]),
- .Y(booth_b2_m22)
- );
- AO22x1_ASAP7_75t_R \U$649 (
- .A1(b_registered[22]),
- .A2(\sel_0$1365 ),
- .B1(b_registered[23]),
- .B2(\sel_1$1366 ),
- .Y(\t$2032 )
- );
- XOR2x1_ASAP7_75t_R \U$650 (
- .A(\t$2032 ),
- .B(a_registered[3]),
- .Y(booth_b2_m23)
- );
- AO22x1_ASAP7_75t_R \U$651 (
- .A1(b_registered[23]),
- .A2(\sel_0$1365 ),
- .B1(b_registered[24]),
- .B2(\sel_1$1366 ),
- .Y(\t$2033 )
- );
- XOR2x1_ASAP7_75t_R \U$652 (
- .A(\t$2033 ),
- .B(a_registered[3]),
- .Y(booth_b2_m24)
- );
- AO22x1_ASAP7_75t_R \U$653 (
- .A1(b_registered[24]),
- .A2(\sel_0$1365 ),
- .B1(b_registered[25]),
- .B2(\sel_1$1366 ),
- .Y(\t$2034 )
- );
- XOR2x1_ASAP7_75t_R \U$654 (
- .A(\t$2034 ),
- .B(a_registered[3]),
- .Y(booth_b2_m25)
- );
- AO22x1_ASAP7_75t_R \U$655 (
- .A1(b_registered[25]),
- .A2(\sel_0$1365 ),
- .B1(b_registered[26]),
- .B2(\sel_1$1366 ),
- .Y(\t$2035 )
- );
- XOR2x1_ASAP7_75t_R \U$656 (
- .A(\t$2035 ),
- .B(a_registered[3]),
- .Y(booth_b2_m26)
- );
- AO22x1_ASAP7_75t_R \U$657 (
- .A1(b_registered[26]),
- .A2(\sel_0$1365 ),
- .B1(b_registered[27]),
- .B2(\sel_1$1366 ),
- .Y(\t$2036 )
- );
- XOR2x1_ASAP7_75t_R \U$658 (
- .A(\t$2036 ),
- .B(a_registered[3]),
- .Y(booth_b2_m27)
- );
- AO22x1_ASAP7_75t_R \U$659 (
- .A1(b_registered[27]),
- .A2(\sel_0$1365 ),
- .B1(b_registered[28]),
- .B2(\sel_1$1366 ),
- .Y(\t$2037 )
- );
- XOR2x1_ASAP7_75t_R \U$660 (
- .A(\t$2037 ),
- .B(a_registered[3]),
- .Y(booth_b2_m28)
- );
- AO22x1_ASAP7_75t_R \U$661 (
- .A1(b_registered[28]),
- .A2(\sel_0$1365 ),
- .B1(b_registered[29]),
- .B2(\sel_1$1366 ),
- .Y(\t$2038 )
- );
- XOR2x1_ASAP7_75t_R \U$662 (
- .A(\t$2038 ),
- .B(a_registered[3]),
- .Y(booth_b2_m29)
- );
- AO22x1_ASAP7_75t_R \U$663 (
- .A1(b_registered[29]),
- .A2(\sel_0$1365 ),
- .B1(b_registered[30]),
- .B2(\sel_1$1366 ),
- .Y(\t$2039 )
- );
- XOR2x1_ASAP7_75t_R \U$664 (
- .A(\t$2039 ),
- .B(a_registered[3]),
- .Y(booth_b2_m30)
- );
- AO22x1_ASAP7_75t_R \U$665 (
- .A1(b_registered[30]),
- .A2(\sel_0$1365 ),
- .B1(b_registered[31]),
- .B2(\sel_1$1366 ),
- .Y(\t$2040 )
- );
- XOR2x1_ASAP7_75t_R \U$666 (
- .A(\t$2040 ),
- .B(a_registered[3]),
- .Y(booth_b2_m31)
- );
- AO22x1_ASAP7_75t_R \U$667 (
- .A1(b_registered[31]),
- .A2(\sel_0$1365 ),
- .B1(1'h0),
- .B2(\sel_1$1366 ),
- .Y(\t$2041 )
- );
- XOR2x1_ASAP7_75t_R \U$668 (
- .A(\t$2041 ),
- .B(a_registered[3]),
- .Y(booth_b2_m32)
- );
- INVx1_ASAP7_75t_R \U$669 (
- .A(a_registered[3]),
- .Y(\notsign$686 )
- );
- INVx1_ASAP7_75t_R \U$670 (
- .A(a_registered[3]),
- .Y(\$7 )
- );
- INVx1_ASAP7_75t_R \U$671 (
- .A(a_registered[4]),
- .Y(\$8 )
- );
- INVx1_ASAP7_75t_R \U$672 (
- .A(a_registered[5]),
- .Y(\$9 )
- );
- AO33x2_ASAP7_75t_R \U$673 (
- .A1(\$9 ),
- .A2(a_registered[4]),
- .A3(a_registered[3]),
- .B1(a_registered[5]),
- .B2(\$8 ),
- .B3(\$7 ),
- .Y(\sel_0$1402 )
- );
- XOR2x1_ASAP7_75t_R \U$674 (
- .A(a_registered[4]),
- .B(a_registered[3]),
- .Y(\sel_1$1403 )
- );
- AO22x1_ASAP7_75t_R \U$675 (
- .A1(1'h0),
- .A2(\sel_0$1402 ),
- .B1(b_registered[0]),
- .B2(\sel_1$1403 ),
- .Y(\t$2043 )
- );
- XOR2x1_ASAP7_75t_R \U$676 (
- .A(\t$2043 ),
- .B(a_registered[5]),
- .Y(booth_b4_m0)
- );
- AO22x1_ASAP7_75t_R \U$677 (
- .A1(b_registered[0]),
- .A2(\sel_0$1402 ),
- .B1(b_registered[1]),
- .B2(\sel_1$1403 ),
- .Y(\t$2044 )
- );
- XOR2x1_ASAP7_75t_R \U$678 (
- .A(\t$2044 ),
- .B(a_registered[5]),
- .Y(booth_b4_m1)
- );
- AO22x1_ASAP7_75t_R \U$679 (
- .A1(b_registered[1]),
- .A2(\sel_0$1402 ),
- .B1(b_registered[2]),
- .B2(\sel_1$1403 ),
- .Y(\t$2045 )
- );
- XOR2x1_ASAP7_75t_R \U$680 (
- .A(\t$2045 ),
- .B(a_registered[5]),
- .Y(booth_b4_m2)
- );
- AO22x1_ASAP7_75t_R \U$681 (
- .A1(b_registered[2]),
- .A2(\sel_0$1402 ),
- .B1(b_registered[3]),
- .B2(\sel_1$1403 ),
- .Y(\t$2046 )
- );
- XOR2x1_ASAP7_75t_R \U$682 (
- .A(\t$2046 ),
- .B(a_registered[5]),
- .Y(booth_b4_m3)
- );
- AO22x1_ASAP7_75t_R \U$683 (
- .A1(b_registered[3]),
- .A2(\sel_0$1402 ),
- .B1(b_registered[4]),
- .B2(\sel_1$1403 ),
- .Y(\t$2047 )
- );
- XOR2x1_ASAP7_75t_R \U$684 (
- .A(\t$2047 ),
- .B(a_registered[5]),
- .Y(booth_b4_m4)
- );
- AO22x1_ASAP7_75t_R \U$685 (
- .A1(b_registered[4]),
- .A2(\sel_0$1402 ),
- .B1(b_registered[5]),
- .B2(\sel_1$1403 ),
- .Y(\t$2048 )
- );
- XOR2x1_ASAP7_75t_R \U$686 (
- .A(\t$2048 ),
- .B(a_registered[5]),
- .Y(booth_b4_m5)
- );
- AO22x1_ASAP7_75t_R \U$687 (
- .A1(b_registered[5]),
- .A2(\sel_0$1402 ),
- .B1(b_registered[6]),
- .B2(\sel_1$1403 ),
- .Y(\t$2049 )
- );
- XOR2x1_ASAP7_75t_R \U$688 (
- .A(\t$2049 ),
- .B(a_registered[5]),
- .Y(booth_b4_m6)
- );
- AO22x1_ASAP7_75t_R \U$689 (
- .A1(b_registered[6]),
- .A2(\sel_0$1402 ),
- .B1(b_registered[7]),
- .B2(\sel_1$1403 ),
- .Y(\t$2050 )
- );
- XOR2x1_ASAP7_75t_R \U$690 (
- .A(\t$2050 ),
- .B(a_registered[5]),
- .Y(booth_b4_m7)
- );
- AO22x1_ASAP7_75t_R \U$691 (
- .A1(b_registered[7]),
- .A2(\sel_0$1402 ),
- .B1(b_registered[8]),
- .B2(\sel_1$1403 ),
- .Y(\t$2051 )
- );
- XOR2x1_ASAP7_75t_R \U$692 (
- .A(\t$2051 ),
- .B(a_registered[5]),
- .Y(booth_b4_m8)
- );
- AO22x1_ASAP7_75t_R \U$693 (
- .A1(b_registered[8]),
- .A2(\sel_0$1402 ),
- .B1(b_registered[9]),
- .B2(\sel_1$1403 ),
- .Y(\t$2052 )
- );
- XOR2x1_ASAP7_75t_R \U$694 (
- .A(\t$2052 ),
- .B(a_registered[5]),
- .Y(booth_b4_m9)
- );
- AO22x1_ASAP7_75t_R \U$695 (
- .A1(b_registered[9]),
- .A2(\sel_0$1402 ),
- .B1(b_registered[10]),
- .B2(\sel_1$1403 ),
- .Y(\t$2053 )
- );
- XOR2x1_ASAP7_75t_R \U$696 (
- .A(\t$2053 ),
- .B(a_registered[5]),
- .Y(booth_b4_m10)
- );
- AO22x1_ASAP7_75t_R \U$697 (
- .A1(b_registered[10]),
- .A2(\sel_0$1402 ),
- .B1(b_registered[11]),
- .B2(\sel_1$1403 ),
- .Y(\t$2054 )
- );
- XOR2x1_ASAP7_75t_R \U$698 (
- .A(\t$2054 ),
- .B(a_registered[5]),
- .Y(booth_b4_m11)
- );
- AO22x1_ASAP7_75t_R \U$699 (
- .A1(b_registered[11]),
- .A2(\sel_0$1402 ),
- .B1(b_registered[12]),
- .B2(\sel_1$1403 ),
- .Y(\t$2055 )
- );
- XOR2x1_ASAP7_75t_R \U$700 (
- .A(\t$2055 ),
- .B(a_registered[5]),
- .Y(booth_b4_m12)
- );
- AO22x1_ASAP7_75t_R \U$701 (
- .A1(b_registered[12]),
- .A2(\sel_0$1402 ),
- .B1(b_registered[13]),
- .B2(\sel_1$1403 ),
- .Y(\t$2056 )
- );
- XOR2x1_ASAP7_75t_R \U$702 (
- .A(\t$2056 ),
- .B(a_registered[5]),
- .Y(booth_b4_m13)
- );
- AO22x1_ASAP7_75t_R \U$703 (
- .A1(b_registered[13]),
- .A2(\sel_0$1402 ),
- .B1(b_registered[14]),
- .B2(\sel_1$1403 ),
- .Y(\t$2057 )
- );
- XOR2x1_ASAP7_75t_R \U$704 (
- .A(\t$2057 ),
- .B(a_registered[5]),
- .Y(booth_b4_m14)
- );
- AO22x1_ASAP7_75t_R \U$705 (
- .A1(b_registered[14]),
- .A2(\sel_0$1402 ),
- .B1(b_registered[15]),
- .B2(\sel_1$1403 ),
- .Y(\t$2058 )
- );
- XOR2x1_ASAP7_75t_R \U$706 (
- .A(\t$2058 ),
- .B(a_registered[5]),
- .Y(booth_b4_m15)
- );
- AO22x1_ASAP7_75t_R \U$707 (
- .A1(b_registered[15]),
- .A2(\sel_0$1402 ),
- .B1(b_registered[16]),
- .B2(\sel_1$1403 ),
- .Y(\t$2059 )
- );
- XOR2x1_ASAP7_75t_R \U$708 (
- .A(\t$2059 ),
- .B(a_registered[5]),
- .Y(booth_b4_m16)
- );
- AO22x1_ASAP7_75t_R \U$709 (
- .A1(b_registered[16]),
- .A2(\sel_0$1402 ),
- .B1(b_registered[17]),
- .B2(\sel_1$1403 ),
- .Y(\t$2060 )
- );
- XOR2x1_ASAP7_75t_R \U$710 (
- .A(\t$2060 ),
- .B(a_registered[5]),
- .Y(booth_b4_m17)
- );
- AO22x1_ASAP7_75t_R \U$711 (
- .A1(b_registered[17]),
- .A2(\sel_0$1402 ),
- .B1(b_registered[18]),
- .B2(\sel_1$1403 ),
- .Y(\t$2061 )
- );
- XOR2x1_ASAP7_75t_R \U$712 (
- .A(\t$2061 ),
- .B(a_registered[5]),
- .Y(booth_b4_m18)
- );
- AO22x1_ASAP7_75t_R \U$713 (
- .A1(b_registered[18]),
- .A2(\sel_0$1402 ),
- .B1(b_registered[19]),
- .B2(\sel_1$1403 ),
- .Y(\t$2062 )
- );
- XOR2x1_ASAP7_75t_R \U$714 (
- .A(\t$2062 ),
- .B(a_registered[5]),
- .Y(booth_b4_m19)
- );
- AO22x1_ASAP7_75t_R \U$715 (
- .A1(b_registered[19]),
- .A2(\sel_0$1402 ),
- .B1(b_registered[20]),
- .B2(\sel_1$1403 ),
- .Y(\t$2063 )
- );
- XOR2x1_ASAP7_75t_R \U$716 (
- .A(\t$2063 ),
- .B(a_registered[5]),
- .Y(booth_b4_m20)
- );
- AO22x1_ASAP7_75t_R \U$717 (
- .A1(b_registered[20]),
- .A2(\sel_0$1402 ),
- .B1(b_registered[21]),
- .B2(\sel_1$1403 ),
- .Y(\t$2064 )
- );
- XOR2x1_ASAP7_75t_R \U$718 (
- .A(\t$2064 ),
- .B(a_registered[5]),
- .Y(booth_b4_m21)
- );
- AO22x1_ASAP7_75t_R \U$719 (
- .A1(b_registered[21]),
- .A2(\sel_0$1402 ),
- .B1(b_registered[22]),
- .B2(\sel_1$1403 ),
- .Y(\t$2065 )
- );
- XOR2x1_ASAP7_75t_R \U$720 (
- .A(\t$2065 ),
- .B(a_registered[5]),
- .Y(booth_b4_m22)
- );
- AO22x1_ASAP7_75t_R \U$721 (
- .A1(b_registered[22]),
- .A2(\sel_0$1402 ),
- .B1(b_registered[23]),
- .B2(\sel_1$1403 ),
- .Y(\t$2066 )
- );
- XOR2x1_ASAP7_75t_R \U$722 (
- .A(\t$2066 ),
- .B(a_registered[5]),
- .Y(booth_b4_m23)
- );
- AO22x1_ASAP7_75t_R \U$723 (
- .A1(b_registered[23]),
- .A2(\sel_0$1402 ),
- .B1(b_registered[24]),
- .B2(\sel_1$1403 ),
- .Y(\t$2067 )
- );
- XOR2x1_ASAP7_75t_R \U$724 (
- .A(\t$2067 ),
- .B(a_registered[5]),
- .Y(booth_b4_m24)
- );
- AO22x1_ASAP7_75t_R \U$725 (
- .A1(b_registered[24]),
- .A2(\sel_0$1402 ),
- .B1(b_registered[25]),
- .B2(\sel_1$1403 ),
- .Y(\t$2068 )
- );
- XOR2x1_ASAP7_75t_R \U$726 (
- .A(\t$2068 ),
- .B(a_registered[5]),
- .Y(booth_b4_m25)
- );
- AO22x1_ASAP7_75t_R \U$727 (
- .A1(b_registered[25]),
- .A2(\sel_0$1402 ),
- .B1(b_registered[26]),
- .B2(\sel_1$1403 ),
- .Y(\t$2069 )
- );
- XOR2x1_ASAP7_75t_R \U$728 (
- .A(\t$2069 ),
- .B(a_registered[5]),
- .Y(booth_b4_m26)
- );
- AO22x1_ASAP7_75t_R \U$729 (
- .A1(b_registered[26]),
- .A2(\sel_0$1402 ),
- .B1(b_registered[27]),
- .B2(\sel_1$1403 ),
- .Y(\t$2070 )
- );
- XOR2x1_ASAP7_75t_R \U$730 (
- .A(\t$2070 ),
- .B(a_registered[5]),
- .Y(booth_b4_m27)
- );
- AO22x1_ASAP7_75t_R \U$731 (
- .A1(b_registered[27]),
- .A2(\sel_0$1402 ),
- .B1(b_registered[28]),
- .B2(\sel_1$1403 ),
- .Y(\t$2071 )
- );
- XOR2x1_ASAP7_75t_R \U$732 (
- .A(\t$2071 ),
- .B(a_registered[5]),
- .Y(booth_b4_m28)
- );
- AO22x1_ASAP7_75t_R \U$733 (
- .A1(b_registered[28]),
- .A2(\sel_0$1402 ),
- .B1(b_registered[29]),
- .B2(\sel_1$1403 ),
- .Y(\t$2072 )
- );
- XOR2x1_ASAP7_75t_R \U$734 (
- .A(\t$2072 ),
- .B(a_registered[5]),
- .Y(booth_b4_m29)
- );
- AO22x1_ASAP7_75t_R \U$735 (
- .A1(b_registered[29]),
- .A2(\sel_0$1402 ),
- .B1(b_registered[30]),
- .B2(\sel_1$1403 ),
- .Y(\t$2073 )
- );
- XOR2x1_ASAP7_75t_R \U$736 (
- .A(\t$2073 ),
- .B(a_registered[5]),
- .Y(booth_b4_m30)
- );
- AO22x1_ASAP7_75t_R \U$737 (
- .A1(b_registered[30]),
- .A2(\sel_0$1402 ),
- .B1(b_registered[31]),
- .B2(\sel_1$1403 ),
- .Y(\t$2074 )
- );
- XOR2x1_ASAP7_75t_R \U$738 (
- .A(\t$2074 ),
- .B(a_registered[5]),
- .Y(booth_b4_m31)
- );
- AO22x1_ASAP7_75t_R \U$739 (
- .A1(b_registered[31]),
- .A2(\sel_0$1402 ),
- .B1(1'h0),
- .B2(\sel_1$1403 ),
- .Y(\t$2075 )
- );
- XOR2x1_ASAP7_75t_R \U$740 (
- .A(\t$2075 ),
- .B(a_registered[5]),
- .Y(booth_b4_m32)
- );
- INVx1_ASAP7_75t_R \U$741 (
- .A(a_registered[5]),
- .Y(\notsign$748 )
- );
- INVx1_ASAP7_75t_R \U$742 (
- .A(a_registered[5]),
- .Y(\$10 )
- );
- INVx1_ASAP7_75t_R \U$743 (
- .A(a_registered[6]),
- .Y(\$11 )
- );
- INVx1_ASAP7_75t_R \U$744 (
- .A(a_registered[7]),
- .Y(\$12 )
- );
- AO33x2_ASAP7_75t_R \U$745 (
- .A1(\$12 ),
- .A2(a_registered[6]),
- .A3(a_registered[5]),
- .B1(a_registered[7]),
- .B2(\$11 ),
- .B3(\$10 ),
- .Y(\sel_0$1439 )
- );
- XOR2x1_ASAP7_75t_R \U$746 (
- .A(a_registered[6]),
- .B(a_registered[5]),
- .Y(\sel_1$1440 )
- );
- AO22x1_ASAP7_75t_R \U$747 (
- .A1(1'h0),
- .A2(\sel_0$1439 ),
- .B1(b_registered[0]),
- .B2(\sel_1$1440 ),
- .Y(\t$2077 )
- );
- XOR2x1_ASAP7_75t_R \U$748 (
- .A(\t$2077 ),
- .B(a_registered[7]),
- .Y(booth_b6_m0)
- );
- AO22x1_ASAP7_75t_R \U$749 (
- .A1(b_registered[0]),
- .A2(\sel_0$1439 ),
- .B1(b_registered[1]),
- .B2(\sel_1$1440 ),
- .Y(\t$2078 )
- );
- XOR2x1_ASAP7_75t_R \U$750 (
- .A(\t$2078 ),
- .B(a_registered[7]),
- .Y(booth_b6_m1)
- );
- AO22x1_ASAP7_75t_R \U$751 (
- .A1(b_registered[1]),
- .A2(\sel_0$1439 ),
- .B1(b_registered[2]),
- .B2(\sel_1$1440 ),
- .Y(\t$2079 )
- );
- XOR2x1_ASAP7_75t_R \U$752 (
- .A(\t$2079 ),
- .B(a_registered[7]),
- .Y(booth_b6_m2)
- );
- AO22x1_ASAP7_75t_R \U$753 (
- .A1(b_registered[2]),
- .A2(\sel_0$1439 ),
- .B1(b_registered[3]),
- .B2(\sel_1$1440 ),
- .Y(\t$2080 )
- );
- XOR2x1_ASAP7_75t_R \U$754 (
- .A(\t$2080 ),
- .B(a_registered[7]),
- .Y(booth_b6_m3)
- );
- AO22x1_ASAP7_75t_R \U$755 (
- .A1(b_registered[3]),
- .A2(\sel_0$1439 ),
- .B1(b_registered[4]),
- .B2(\sel_1$1440 ),
- .Y(\t$2081 )
- );
- XOR2x1_ASAP7_75t_R \U$756 (
- .A(\t$2081 ),
- .B(a_registered[7]),
- .Y(booth_b6_m4)
- );
- AO22x1_ASAP7_75t_R \U$757 (
- .A1(b_registered[4]),
- .A2(\sel_0$1439 ),
- .B1(b_registered[5]),
- .B2(\sel_1$1440 ),
- .Y(\t$2082 )
- );
- XOR2x1_ASAP7_75t_R \U$758 (
- .A(\t$2082 ),
- .B(a_registered[7]),
- .Y(booth_b6_m5)
- );
- AO22x1_ASAP7_75t_R \U$759 (
- .A1(b_registered[5]),
- .A2(\sel_0$1439 ),
- .B1(b_registered[6]),
- .B2(\sel_1$1440 ),
- .Y(\t$2083 )
- );
- XOR2x1_ASAP7_75t_R \U$760 (
- .A(\t$2083 ),
- .B(a_registered[7]),
- .Y(booth_b6_m6)
- );
- AO22x1_ASAP7_75t_R \U$761 (
- .A1(b_registered[6]),
- .A2(\sel_0$1439 ),
- .B1(b_registered[7]),
- .B2(\sel_1$1440 ),
- .Y(\t$2084 )
- );
- XOR2x1_ASAP7_75t_R \U$762 (
- .A(\t$2084 ),
- .B(a_registered[7]),
- .Y(booth_b6_m7)
- );
- AO22x1_ASAP7_75t_R \U$763 (
- .A1(b_registered[7]),
- .A2(\sel_0$1439 ),
- .B1(b_registered[8]),
- .B2(\sel_1$1440 ),
- .Y(\t$2085 )
- );
- XOR2x1_ASAP7_75t_R \U$764 (
- .A(\t$2085 ),
- .B(a_registered[7]),
- .Y(booth_b6_m8)
- );
- AO22x1_ASAP7_75t_R \U$765 (
- .A1(b_registered[8]),
- .A2(\sel_0$1439 ),
- .B1(b_registered[9]),
- .B2(\sel_1$1440 ),
- .Y(\t$2086 )
- );
- XOR2x1_ASAP7_75t_R \U$766 (
- .A(\t$2086 ),
- .B(a_registered[7]),
- .Y(booth_b6_m9)
- );
- AO22x1_ASAP7_75t_R \U$767 (
- .A1(b_registered[9]),
- .A2(\sel_0$1439 ),
- .B1(b_registered[10]),
- .B2(\sel_1$1440 ),
- .Y(\t$2087 )
- );
- XOR2x1_ASAP7_75t_R \U$768 (
- .A(\t$2087 ),
- .B(a_registered[7]),
- .Y(booth_b6_m10)
- );
- AO22x1_ASAP7_75t_R \U$769 (
- .A1(b_registered[10]),
- .A2(\sel_0$1439 ),
- .B1(b_registered[11]),
- .B2(\sel_1$1440 ),
- .Y(\t$2088 )
- );
- XOR2x1_ASAP7_75t_R \U$770 (
- .A(\t$2088 ),
- .B(a_registered[7]),
- .Y(booth_b6_m11)
- );
- AO22x1_ASAP7_75t_R \U$771 (
- .A1(b_registered[11]),
- .A2(\sel_0$1439 ),
- .B1(b_registered[12]),
- .B2(\sel_1$1440 ),
- .Y(\t$2089 )
- );
- XOR2x1_ASAP7_75t_R \U$772 (
- .A(\t$2089 ),
- .B(a_registered[7]),
- .Y(booth_b6_m12)
- );
- AO22x1_ASAP7_75t_R \U$773 (
- .A1(b_registered[12]),
- .A2(\sel_0$1439 ),
- .B1(b_registered[13]),
- .B2(\sel_1$1440 ),
- .Y(\t$2090 )
- );
- XOR2x1_ASAP7_75t_R \U$774 (
- .A(\t$2090 ),
- .B(a_registered[7]),
- .Y(booth_b6_m13)
- );
- AO22x1_ASAP7_75t_R \U$775 (
- .A1(b_registered[13]),
- .A2(\sel_0$1439 ),
- .B1(b_registered[14]),
- .B2(\sel_1$1440 ),
- .Y(\t$2091 )
- );
- XOR2x1_ASAP7_75t_R \U$776 (
- .A(\t$2091 ),
- .B(a_registered[7]),
- .Y(booth_b6_m14)
- );
- AO22x1_ASAP7_75t_R \U$777 (
- .A1(b_registered[14]),
- .A2(\sel_0$1439 ),
- .B1(b_registered[15]),
- .B2(\sel_1$1440 ),
- .Y(\t$2092 )
- );
- XOR2x1_ASAP7_75t_R \U$778 (
- .A(\t$2092 ),
- .B(a_registered[7]),
- .Y(booth_b6_m15)
- );
- AO22x1_ASAP7_75t_R \U$779 (
- .A1(b_registered[15]),
- .A2(\sel_0$1439 ),
- .B1(b_registered[16]),
- .B2(\sel_1$1440 ),
- .Y(\t$2093 )
- );
- XOR2x1_ASAP7_75t_R \U$780 (
- .A(\t$2093 ),
- .B(a_registered[7]),
- .Y(booth_b6_m16)
- );
- AO22x1_ASAP7_75t_R \U$781 (
- .A1(b_registered[16]),
- .A2(\sel_0$1439 ),
- .B1(b_registered[17]),
- .B2(\sel_1$1440 ),
- .Y(\t$2094 )
- );
- XOR2x1_ASAP7_75t_R \U$782 (
- .A(\t$2094 ),
- .B(a_registered[7]),
- .Y(booth_b6_m17)
- );
- AO22x1_ASAP7_75t_R \U$783 (
- .A1(b_registered[17]),
- .A2(\sel_0$1439 ),
- .B1(b_registered[18]),
- .B2(\sel_1$1440 ),
- .Y(\t$2095 )
- );
- XOR2x1_ASAP7_75t_R \U$784 (
- .A(\t$2095 ),
- .B(a_registered[7]),
- .Y(booth_b6_m18)
- );
- AO22x1_ASAP7_75t_R \U$785 (
- .A1(b_registered[18]),
- .A2(\sel_0$1439 ),
- .B1(b_registered[19]),
- .B2(\sel_1$1440 ),
- .Y(\t$2096 )
- );
- XOR2x1_ASAP7_75t_R \U$786 (
- .A(\t$2096 ),
- .B(a_registered[7]),
- .Y(booth_b6_m19)
- );
- AO22x1_ASAP7_75t_R \U$787 (
- .A1(b_registered[19]),
- .A2(\sel_0$1439 ),
- .B1(b_registered[20]),
- .B2(\sel_1$1440 ),
- .Y(\t$2097 )
- );
- XOR2x1_ASAP7_75t_R \U$788 (
- .A(\t$2097 ),
- .B(a_registered[7]),
- .Y(booth_b6_m20)
- );
- AO22x1_ASAP7_75t_R \U$789 (
- .A1(b_registered[20]),
- .A2(\sel_0$1439 ),
- .B1(b_registered[21]),
- .B2(\sel_1$1440 ),
- .Y(\t$2098 )
- );
- XOR2x1_ASAP7_75t_R \U$790 (
- .A(\t$2098 ),
- .B(a_registered[7]),
- .Y(booth_b6_m21)
- );
- AO22x1_ASAP7_75t_R \U$791 (
- .A1(b_registered[21]),
- .A2(\sel_0$1439 ),
- .B1(b_registered[22]),
- .B2(\sel_1$1440 ),
- .Y(\t$2099 )
- );
- XOR2x1_ASAP7_75t_R \U$792 (
- .A(\t$2099 ),
- .B(a_registered[7]),
- .Y(booth_b6_m22)
- );
- AO22x1_ASAP7_75t_R \U$793 (
- .A1(b_registered[22]),
- .A2(\sel_0$1439 ),
- .B1(b_registered[23]),
- .B2(\sel_1$1440 ),
- .Y(\t$2100 )
- );
- XOR2x1_ASAP7_75t_R \U$794 (
- .A(\t$2100 ),
- .B(a_registered[7]),
- .Y(booth_b6_m23)
- );
- AO22x1_ASAP7_75t_R \U$795 (
- .A1(b_registered[23]),
- .A2(\sel_0$1439 ),
- .B1(b_registered[24]),
- .B2(\sel_1$1440 ),
- .Y(\t$2101 )
- );
- XOR2x1_ASAP7_75t_R \U$796 (
- .A(\t$2101 ),
- .B(a_registered[7]),
- .Y(booth_b6_m24)
- );
- AO22x1_ASAP7_75t_R \U$797 (
- .A1(b_registered[24]),
- .A2(\sel_0$1439 ),
- .B1(b_registered[25]),
- .B2(\sel_1$1440 ),
- .Y(\t$2102 )
- );
- XOR2x1_ASAP7_75t_R \U$798 (
- .A(\t$2102 ),
- .B(a_registered[7]),
- .Y(booth_b6_m25)
- );
- AO22x1_ASAP7_75t_R \U$799 (
- .A1(b_registered[25]),
- .A2(\sel_0$1439 ),
- .B1(b_registered[26]),
- .B2(\sel_1$1440 ),
- .Y(\t$2103 )
- );
- XOR2x1_ASAP7_75t_R \U$800 (
- .A(\t$2103 ),
- .B(a_registered[7]),
- .Y(booth_b6_m26)
- );
- AO22x1_ASAP7_75t_R \U$801 (
- .A1(b_registered[26]),
- .A2(\sel_0$1439 ),
- .B1(b_registered[27]),
- .B2(\sel_1$1440 ),
- .Y(\t$2104 )
- );
- XOR2x1_ASAP7_75t_R \U$802 (
- .A(\t$2104 ),
- .B(a_registered[7]),
- .Y(booth_b6_m27)
- );
- AO22x1_ASAP7_75t_R \U$803 (
- .A1(b_registered[27]),
- .A2(\sel_0$1439 ),
- .B1(b_registered[28]),
- .B2(\sel_1$1440 ),
- .Y(\t$2105 )
- );
- XOR2x1_ASAP7_75t_R \U$804 (
- .A(\t$2105 ),
- .B(a_registered[7]),
- .Y(booth_b6_m28)
- );
- AO22x1_ASAP7_75t_R \U$805 (
- .A1(b_registered[28]),
- .A2(\sel_0$1439 ),
- .B1(b_registered[29]),
- .B2(\sel_1$1440 ),
- .Y(\t$2106 )
- );
- XOR2x1_ASAP7_75t_R \U$806 (
- .A(\t$2106 ),
- .B(a_registered[7]),
- .Y(booth_b6_m29)
- );
- AO22x1_ASAP7_75t_R \U$807 (
- .A1(b_registered[29]),
- .A2(\sel_0$1439 ),
- .B1(b_registered[30]),
- .B2(\sel_1$1440 ),
- .Y(\t$2107 )
- );
- XOR2x1_ASAP7_75t_R \U$808 (
- .A(\t$2107 ),
- .B(a_registered[7]),
- .Y(booth_b6_m30)
- );
- AO22x1_ASAP7_75t_R \U$809 (
- .A1(b_registered[30]),
- .A2(\sel_0$1439 ),
- .B1(b_registered[31]),
- .B2(\sel_1$1440 ),
- .Y(\t$2108 )
- );
- XOR2x1_ASAP7_75t_R \U$810 (
- .A(\t$2108 ),
- .B(a_registered[7]),
- .Y(booth_b6_m31)
- );
- AO22x1_ASAP7_75t_R \U$811 (
- .A1(b_registered[31]),
- .A2(\sel_0$1439 ),
- .B1(1'h0),
- .B2(\sel_1$1440 ),
- .Y(\t$2109 )
- );
- XOR2x1_ASAP7_75t_R \U$812 (
- .A(\t$2109 ),
- .B(a_registered[7]),
- .Y(booth_b6_m32)
- );
- INVx1_ASAP7_75t_R \U$813 (
- .A(a_registered[7]),
- .Y(\notsign$806 )
- );
- INVx1_ASAP7_75t_R \U$814 (
- .A(a_registered[7]),
- .Y(\$13 )
- );
- INVx1_ASAP7_75t_R \U$815 (
- .A(a_registered[8]),
- .Y(\$14 )
- );
- INVx1_ASAP7_75t_R \U$816 (
- .A(a_registered[9]),
- .Y(\$15 )
- );
- AO33x2_ASAP7_75t_R \U$817 (
- .A1(\$15 ),
- .A2(a_registered[8]),
- .A3(a_registered[7]),
- .B1(a_registered[9]),
- .B2(\$14 ),
- .B3(\$13 ),
- .Y(\sel_0$1476 )
- );
- XOR2x1_ASAP7_75t_R \U$818 (
- .A(a_registered[8]),
- .B(a_registered[7]),
- .Y(\sel_1$1477 )
- );
- AO22x1_ASAP7_75t_R \U$819 (
- .A1(1'h0),
- .A2(\sel_0$1476 ),
- .B1(b_registered[0]),
- .B2(\sel_1$1477 ),
- .Y(\t$2111 )
- );
- XOR2x1_ASAP7_75t_R \U$820 (
- .A(\t$2111 ),
- .B(a_registered[9]),
- .Y(booth_b8_m0)
- );
- AO22x1_ASAP7_75t_R \U$821 (
- .A1(b_registered[0]),
- .A2(\sel_0$1476 ),
- .B1(b_registered[1]),
- .B2(\sel_1$1477 ),
- .Y(\t$2112 )
- );
- XOR2x1_ASAP7_75t_R \U$822 (
- .A(\t$2112 ),
- .B(a_registered[9]),
- .Y(booth_b8_m1)
- );
- AO22x1_ASAP7_75t_R \U$823 (
- .A1(b_registered[1]),
- .A2(\sel_0$1476 ),
- .B1(b_registered[2]),
- .B2(\sel_1$1477 ),
- .Y(\t$2113 )
- );
- XOR2x1_ASAP7_75t_R \U$824 (
- .A(\t$2113 ),
- .B(a_registered[9]),
- .Y(booth_b8_m2)
- );
- AO22x1_ASAP7_75t_R \U$825 (
- .A1(b_registered[2]),
- .A2(\sel_0$1476 ),
- .B1(b_registered[3]),
- .B2(\sel_1$1477 ),
- .Y(\t$2114 )
- );
- XOR2x1_ASAP7_75t_R \U$826 (
- .A(\t$2114 ),
- .B(a_registered[9]),
- .Y(booth_b8_m3)
- );
- AO22x1_ASAP7_75t_R \U$827 (
- .A1(b_registered[3]),
- .A2(\sel_0$1476 ),
- .B1(b_registered[4]),
- .B2(\sel_1$1477 ),
- .Y(\t$2115 )
- );
- XOR2x1_ASAP7_75t_R \U$828 (
- .A(\t$2115 ),
- .B(a_registered[9]),
- .Y(booth_b8_m4)
- );
- AO22x1_ASAP7_75t_R \U$829 (
- .A1(b_registered[4]),
- .A2(\sel_0$1476 ),
- .B1(b_registered[5]),
- .B2(\sel_1$1477 ),
- .Y(\t$2116 )
- );
- XOR2x1_ASAP7_75t_R \U$830 (
- .A(\t$2116 ),
- .B(a_registered[9]),
- .Y(booth_b8_m5)
- );
- AO22x1_ASAP7_75t_R \U$831 (
- .A1(b_registered[5]),
- .A2(\sel_0$1476 ),
- .B1(b_registered[6]),
- .B2(\sel_1$1477 ),
- .Y(\t$2117 )
- );
- XOR2x1_ASAP7_75t_R \U$832 (
- .A(\t$2117 ),
- .B(a_registered[9]),
- .Y(booth_b8_m6)
- );
- AO22x1_ASAP7_75t_R \U$833 (
- .A1(b_registered[6]),
- .A2(\sel_0$1476 ),
- .B1(b_registered[7]),
- .B2(\sel_1$1477 ),
- .Y(\t$2118 )
- );
- XOR2x1_ASAP7_75t_R \U$834 (
- .A(\t$2118 ),
- .B(a_registered[9]),
- .Y(booth_b8_m7)
- );
- AO22x1_ASAP7_75t_R \U$835 (
- .A1(b_registered[7]),
- .A2(\sel_0$1476 ),
- .B1(b_registered[8]),
- .B2(\sel_1$1477 ),
- .Y(\t$2119 )
- );
- XOR2x1_ASAP7_75t_R \U$836 (
- .A(\t$2119 ),
- .B(a_registered[9]),
- .Y(booth_b8_m8)
- );
- AO22x1_ASAP7_75t_R \U$837 (
- .A1(b_registered[8]),
- .A2(\sel_0$1476 ),
- .B1(b_registered[9]),
- .B2(\sel_1$1477 ),
- .Y(\t$2120 )
- );
- XOR2x1_ASAP7_75t_R \U$838 (
- .A(\t$2120 ),
- .B(a_registered[9]),
- .Y(booth_b8_m9)
- );
- AO22x1_ASAP7_75t_R \U$839 (
- .A1(b_registered[9]),
- .A2(\sel_0$1476 ),
- .B1(b_registered[10]),
- .B2(\sel_1$1477 ),
- .Y(\t$2121 )
- );
- XOR2x1_ASAP7_75t_R \U$840 (
- .A(\t$2121 ),
- .B(a_registered[9]),
- .Y(booth_b8_m10)
- );
- AO22x1_ASAP7_75t_R \U$841 (
- .A1(b_registered[10]),
- .A2(\sel_0$1476 ),
- .B1(b_registered[11]),
- .B2(\sel_1$1477 ),
- .Y(\t$2122 )
- );
- XOR2x1_ASAP7_75t_R \U$842 (
- .A(\t$2122 ),
- .B(a_registered[9]),
- .Y(booth_b8_m11)
- );
- AO22x1_ASAP7_75t_R \U$843 (
- .A1(b_registered[11]),
- .A2(\sel_0$1476 ),
- .B1(b_registered[12]),
- .B2(\sel_1$1477 ),
- .Y(\t$2123 )
- );
- XOR2x1_ASAP7_75t_R \U$844 (
- .A(\t$2123 ),
- .B(a_registered[9]),
- .Y(booth_b8_m12)
- );
- AO22x1_ASAP7_75t_R \U$845 (
- .A1(b_registered[12]),
- .A2(\sel_0$1476 ),
- .B1(b_registered[13]),
- .B2(\sel_1$1477 ),
- .Y(\t$2124 )
- );
- XOR2x1_ASAP7_75t_R \U$846 (
- .A(\t$2124 ),
- .B(a_registered[9]),
- .Y(booth_b8_m13)
- );
- AO22x1_ASAP7_75t_R \U$847 (
- .A1(b_registered[13]),
- .A2(\sel_0$1476 ),
- .B1(b_registered[14]),
- .B2(\sel_1$1477 ),
- .Y(\t$2125 )
- );
- XOR2x1_ASAP7_75t_R \U$848 (
- .A(\t$2125 ),
- .B(a_registered[9]),
- .Y(booth_b8_m14)
- );
- AO22x1_ASAP7_75t_R \U$849 (
- .A1(b_registered[14]),
- .A2(\sel_0$1476 ),
- .B1(b_registered[15]),
- .B2(\sel_1$1477 ),
- .Y(\t$2126 )
- );
- XOR2x1_ASAP7_75t_R \U$850 (
- .A(\t$2126 ),
- .B(a_registered[9]),
- .Y(booth_b8_m15)
- );
- AO22x1_ASAP7_75t_R \U$851 (
- .A1(b_registered[15]),
- .A2(\sel_0$1476 ),
- .B1(b_registered[16]),
- .B2(\sel_1$1477 ),
- .Y(\t$2127 )
- );
- XOR2x1_ASAP7_75t_R \U$852 (
- .A(\t$2127 ),
- .B(a_registered[9]),
- .Y(booth_b8_m16)
- );
- AO22x1_ASAP7_75t_R \U$853 (
- .A1(b_registered[16]),
- .A2(\sel_0$1476 ),
- .B1(b_registered[17]),
- .B2(\sel_1$1477 ),
- .Y(\t$2128 )
- );
- XOR2x1_ASAP7_75t_R \U$854 (
- .A(\t$2128 ),
- .B(a_registered[9]),
- .Y(booth_b8_m17)
- );
- AO22x1_ASAP7_75t_R \U$855 (
- .A1(b_registered[17]),
- .A2(\sel_0$1476 ),
- .B1(b_registered[18]),
- .B2(\sel_1$1477 ),
- .Y(\t$2129 )
- );
- XOR2x1_ASAP7_75t_R \U$856 (
- .A(\t$2129 ),
- .B(a_registered[9]),
- .Y(booth_b8_m18)
- );
- AO22x1_ASAP7_75t_R \U$857 (
- .A1(b_registered[18]),
- .A2(\sel_0$1476 ),
- .B1(b_registered[19]),
- .B2(\sel_1$1477 ),
- .Y(\t$2130 )
- );
- XOR2x1_ASAP7_75t_R \U$858 (
- .A(\t$2130 ),
- .B(a_registered[9]),
- .Y(booth_b8_m19)
- );
- AO22x1_ASAP7_75t_R \U$859 (
- .A1(b_registered[19]),
- .A2(\sel_0$1476 ),
- .B1(b_registered[20]),
- .B2(\sel_1$1477 ),
- .Y(\t$2131 )
- );
- XOR2x1_ASAP7_75t_R \U$860 (
- .A(\t$2131 ),
- .B(a_registered[9]),
- .Y(booth_b8_m20)
- );
- AO22x1_ASAP7_75t_R \U$861 (
- .A1(b_registered[20]),
- .A2(\sel_0$1476 ),
- .B1(b_registered[21]),
- .B2(\sel_1$1477 ),
- .Y(\t$2132 )
- );
- XOR2x1_ASAP7_75t_R \U$862 (
- .A(\t$2132 ),
- .B(a_registered[9]),
- .Y(booth_b8_m21)
- );
- AO22x1_ASAP7_75t_R \U$863 (
- .A1(b_registered[21]),
- .A2(\sel_0$1476 ),
- .B1(b_registered[22]),
- .B2(\sel_1$1477 ),
- .Y(\t$2133 )
- );
- XOR2x1_ASAP7_75t_R \U$864 (
- .A(\t$2133 ),
- .B(a_registered[9]),
- .Y(booth_b8_m22)
- );
- AO22x1_ASAP7_75t_R \U$865 (
- .A1(b_registered[22]),
- .A2(\sel_0$1476 ),
- .B1(b_registered[23]),
- .B2(\sel_1$1477 ),
- .Y(\t$2134 )
- );
- XOR2x1_ASAP7_75t_R \U$866 (
- .A(\t$2134 ),
- .B(a_registered[9]),
- .Y(booth_b8_m23)
- );
- AO22x1_ASAP7_75t_R \U$867 (
- .A1(b_registered[23]),
- .A2(\sel_0$1476 ),
- .B1(b_registered[24]),
- .B2(\sel_1$1477 ),
- .Y(\t$2135 )
- );
- XOR2x1_ASAP7_75t_R \U$868 (
- .A(\t$2135 ),
- .B(a_registered[9]),
- .Y(booth_b8_m24)
- );
- AO22x1_ASAP7_75t_R \U$869 (
- .A1(b_registered[24]),
- .A2(\sel_0$1476 ),
- .B1(b_registered[25]),
- .B2(\sel_1$1477 ),
- .Y(\t$2136 )
- );
- XOR2x1_ASAP7_75t_R \U$870 (
- .A(\t$2136 ),
- .B(a_registered[9]),
- .Y(booth_b8_m25)
- );
- AO22x1_ASAP7_75t_R \U$871 (
- .A1(b_registered[25]),
- .A2(\sel_0$1476 ),
- .B1(b_registered[26]),
- .B2(\sel_1$1477 ),
- .Y(\t$2137 )
- );
- XOR2x1_ASAP7_75t_R \U$872 (
- .A(\t$2137 ),
- .B(a_registered[9]),
- .Y(booth_b8_m26)
- );
- AO22x1_ASAP7_75t_R \U$873 (
- .A1(b_registered[26]),
- .A2(\sel_0$1476 ),
- .B1(b_registered[27]),
- .B2(\sel_1$1477 ),
- .Y(\t$2138 )
- );
- XOR2x1_ASAP7_75t_R \U$874 (
- .A(\t$2138 ),
- .B(a_registered[9]),
- .Y(booth_b8_m27)
- );
- AO22x1_ASAP7_75t_R \U$875 (
- .A1(b_registered[27]),
- .A2(\sel_0$1476 ),
- .B1(b_registered[28]),
- .B2(\sel_1$1477 ),
- .Y(\t$2139 )
- );
- XOR2x1_ASAP7_75t_R \U$876 (
- .A(\t$2139 ),
- .B(a_registered[9]),
- .Y(booth_b8_m28)
- );
- AO22x1_ASAP7_75t_R \U$877 (
- .A1(b_registered[28]),
- .A2(\sel_0$1476 ),
- .B1(b_registered[29]),
- .B2(\sel_1$1477 ),
- .Y(\t$2140 )
- );
- XOR2x1_ASAP7_75t_R \U$878 (
- .A(\t$2140 ),
- .B(a_registered[9]),
- .Y(booth_b8_m29)
- );
- AO22x1_ASAP7_75t_R \U$879 (
- .A1(b_registered[29]),
- .A2(\sel_0$1476 ),
- .B1(b_registered[30]),
- .B2(\sel_1$1477 ),
- .Y(\t$2141 )
- );
- XOR2x1_ASAP7_75t_R \U$880 (
- .A(\t$2141 ),
- .B(a_registered[9]),
- .Y(booth_b8_m30)
- );
- AO22x1_ASAP7_75t_R \U$881 (
- .A1(b_registered[30]),
- .A2(\sel_0$1476 ),
- .B1(b_registered[31]),
- .B2(\sel_1$1477 ),
- .Y(\t$2142 )
- );
- XOR2x1_ASAP7_75t_R \U$882 (
- .A(\t$2142 ),
- .B(a_registered[9]),
- .Y(booth_b8_m31)
- );
- AO22x1_ASAP7_75t_R \U$883 (
- .A1(b_registered[31]),
- .A2(\sel_0$1476 ),
- .B1(1'h0),
- .B2(\sel_1$1477 ),
- .Y(\t$2143 )
- );
- XOR2x1_ASAP7_75t_R \U$884 (
- .A(\t$2143 ),
- .B(a_registered[9]),
- .Y(booth_b8_m32)
- );
- INVx1_ASAP7_75t_R \U$885 (
- .A(a_registered[9]),
- .Y(\notsign$860 )
- );
- INVx1_ASAP7_75t_R \U$886 (
- .A(a_registered[9]),
- .Y(\$16 )
- );
- INVx1_ASAP7_75t_R \U$887 (
- .A(a_registered[10]),
- .Y(\$17 )
- );
- INVx1_ASAP7_75t_R \U$888 (
- .A(a_registered[11]),
- .Y(\$18 )
- );
- AO33x2_ASAP7_75t_R \U$889 (
- .A1(\$18 ),
- .A2(a_registered[10]),
- .A3(a_registered[9]),
- .B1(a_registered[11]),
- .B2(\$17 ),
- .B3(\$16 ),
- .Y(\sel_0$1513 )
- );
- XOR2x1_ASAP7_75t_R \U$890 (
- .A(a_registered[10]),
- .B(a_registered[9]),
- .Y(\sel_1$1514 )
- );
- AO22x1_ASAP7_75t_R \U$891 (
- .A1(1'h0),
- .A2(\sel_0$1513 ),
- .B1(b_registered[0]),
- .B2(\sel_1$1514 ),
- .Y(\t$2145 )
- );
- XOR2x1_ASAP7_75t_R \U$892 (
- .A(\t$2145 ),
- .B(a_registered[11]),
- .Y(booth_b10_m0)
- );
- AO22x1_ASAP7_75t_R \U$893 (
- .A1(b_registered[0]),
- .A2(\sel_0$1513 ),
- .B1(b_registered[1]),
- .B2(\sel_1$1514 ),
- .Y(\t$2146 )
- );
- XOR2x1_ASAP7_75t_R \U$894 (
- .A(\t$2146 ),
- .B(a_registered[11]),
- .Y(booth_b10_m1)
- );
- AO22x1_ASAP7_75t_R \U$895 (
- .A1(b_registered[1]),
- .A2(\sel_0$1513 ),
- .B1(b_registered[2]),
- .B2(\sel_1$1514 ),
- .Y(\t$2147 )
- );
- XOR2x1_ASAP7_75t_R \U$896 (
- .A(\t$2147 ),
- .B(a_registered[11]),
- .Y(booth_b10_m2)
- );
- AO22x1_ASAP7_75t_R \U$897 (
- .A1(b_registered[2]),
- .A2(\sel_0$1513 ),
- .B1(b_registered[3]),
- .B2(\sel_1$1514 ),
- .Y(\t$2148 )
- );
- XOR2x1_ASAP7_75t_R \U$898 (
- .A(\t$2148 ),
- .B(a_registered[11]),
- .Y(booth_b10_m3)
- );
- AO22x1_ASAP7_75t_R \U$899 (
- .A1(b_registered[3]),
- .A2(\sel_0$1513 ),
- .B1(b_registered[4]),
- .B2(\sel_1$1514 ),
- .Y(\t$2149 )
- );
- XOR2x1_ASAP7_75t_R \U$900 (
- .A(\t$2149 ),
- .B(a_registered[11]),
- .Y(booth_b10_m4)
- );
- AO22x1_ASAP7_75t_R \U$901 (
- .A1(b_registered[4]),
- .A2(\sel_0$1513 ),
- .B1(b_registered[5]),
- .B2(\sel_1$1514 ),
- .Y(\t$2150 )
- );
- XOR2x1_ASAP7_75t_R \U$902 (
- .A(\t$2150 ),
- .B(a_registered[11]),
- .Y(booth_b10_m5)
- );
- AO22x1_ASAP7_75t_R \U$903 (
- .A1(b_registered[5]),
- .A2(\sel_0$1513 ),
- .B1(b_registered[6]),
- .B2(\sel_1$1514 ),
- .Y(\t$2151 )
- );
- XOR2x1_ASAP7_75t_R \U$904 (
- .A(\t$2151 ),
- .B(a_registered[11]),
- .Y(booth_b10_m6)
- );
- AO22x1_ASAP7_75t_R \U$905 (
- .A1(b_registered[6]),
- .A2(\sel_0$1513 ),
- .B1(b_registered[7]),
- .B2(\sel_1$1514 ),
- .Y(\t$2152 )
- );
- XOR2x1_ASAP7_75t_R \U$906 (
- .A(\t$2152 ),
- .B(a_registered[11]),
- .Y(booth_b10_m7)
- );
- AO22x1_ASAP7_75t_R \U$907 (
- .A1(b_registered[7]),
- .A2(\sel_0$1513 ),
- .B1(b_registered[8]),
- .B2(\sel_1$1514 ),
- .Y(\t$2153 )
- );
- XOR2x1_ASAP7_75t_R \U$908 (
- .A(\t$2153 ),
- .B(a_registered[11]),
- .Y(booth_b10_m8)
- );
- AO22x1_ASAP7_75t_R \U$909 (
- .A1(b_registered[8]),
- .A2(\sel_0$1513 ),
- .B1(b_registered[9]),
- .B2(\sel_1$1514 ),
- .Y(\t$2154 )
- );
- XOR2x1_ASAP7_75t_R \U$910 (
- .A(\t$2154 ),
- .B(a_registered[11]),
- .Y(booth_b10_m9)
- );
- AO22x1_ASAP7_75t_R \U$911 (
- .A1(b_registered[9]),
- .A2(\sel_0$1513 ),
- .B1(b_registered[10]),
- .B2(\sel_1$1514 ),
- .Y(\t$2155 )
- );
- XOR2x1_ASAP7_75t_R \U$912 (
- .A(\t$2155 ),
- .B(a_registered[11]),
- .Y(booth_b10_m10)
- );
- AO22x1_ASAP7_75t_R \U$913 (
- .A1(b_registered[10]),
- .A2(\sel_0$1513 ),
- .B1(b_registered[11]),
- .B2(\sel_1$1514 ),
- .Y(\t$2156 )
- );
- XOR2x1_ASAP7_75t_R \U$914 (
- .A(\t$2156 ),
- .B(a_registered[11]),
- .Y(booth_b10_m11)
- );
- AO22x1_ASAP7_75t_R \U$915 (
- .A1(b_registered[11]),
- .A2(\sel_0$1513 ),
- .B1(b_registered[12]),
- .B2(\sel_1$1514 ),
- .Y(\t$2157 )
- );
- XOR2x1_ASAP7_75t_R \U$916 (
- .A(\t$2157 ),
- .B(a_registered[11]),
- .Y(booth_b10_m12)
- );
- AO22x1_ASAP7_75t_R \U$917 (
- .A1(b_registered[12]),
- .A2(\sel_0$1513 ),
- .B1(b_registered[13]),
- .B2(\sel_1$1514 ),
- .Y(\t$2158 )
- );
- XOR2x1_ASAP7_75t_R \U$918 (
- .A(\t$2158 ),
- .B(a_registered[11]),
- .Y(booth_b10_m13)
- );
- AO22x1_ASAP7_75t_R \U$919 (
- .A1(b_registered[13]),
- .A2(\sel_0$1513 ),
- .B1(b_registered[14]),
- .B2(\sel_1$1514 ),
- .Y(\t$2159 )
- );
- XOR2x1_ASAP7_75t_R \U$920 (
- .A(\t$2159 ),
- .B(a_registered[11]),
- .Y(booth_b10_m14)
- );
- AO22x1_ASAP7_75t_R \U$921 (
- .A1(b_registered[14]),
- .A2(\sel_0$1513 ),
- .B1(b_registered[15]),
- .B2(\sel_1$1514 ),
- .Y(\t$2160 )
- );
- XOR2x1_ASAP7_75t_R \U$922 (
- .A(\t$2160 ),
- .B(a_registered[11]),
- .Y(booth_b10_m15)
- );
- AO22x1_ASAP7_75t_R \U$923 (
- .A1(b_registered[15]),
- .A2(\sel_0$1513 ),
- .B1(b_registered[16]),
- .B2(\sel_1$1514 ),
- .Y(\t$2161 )
- );
- XOR2x1_ASAP7_75t_R \U$924 (
- .A(\t$2161 ),
- .B(a_registered[11]),
- .Y(booth_b10_m16)
- );
- AO22x1_ASAP7_75t_R \U$925 (
- .A1(b_registered[16]),
- .A2(\sel_0$1513 ),
- .B1(b_registered[17]),
- .B2(\sel_1$1514 ),
- .Y(\t$2162 )
- );
- XOR2x1_ASAP7_75t_R \U$926 (
- .A(\t$2162 ),
- .B(a_registered[11]),
- .Y(booth_b10_m17)
- );
- AO22x1_ASAP7_75t_R \U$927 (
- .A1(b_registered[17]),
- .A2(\sel_0$1513 ),
- .B1(b_registered[18]),
- .B2(\sel_1$1514 ),
- .Y(\t$2163 )
- );
- XOR2x1_ASAP7_75t_R \U$928 (
- .A(\t$2163 ),
- .B(a_registered[11]),
- .Y(booth_b10_m18)
- );
- AO22x1_ASAP7_75t_R \U$929 (
- .A1(b_registered[18]),
- .A2(\sel_0$1513 ),
- .B1(b_registered[19]),
- .B2(\sel_1$1514 ),
- .Y(\t$2164 )
- );
- XOR2x1_ASAP7_75t_R \U$930 (
- .A(\t$2164 ),
- .B(a_registered[11]),
- .Y(booth_b10_m19)
- );
- AO22x1_ASAP7_75t_R \U$931 (
- .A1(b_registered[19]),
- .A2(\sel_0$1513 ),
- .B1(b_registered[20]),
- .B2(\sel_1$1514 ),
- .Y(\t$2165 )
- );
- XOR2x1_ASAP7_75t_R \U$932 (
- .A(\t$2165 ),
- .B(a_registered[11]),
- .Y(booth_b10_m20)
- );
- AO22x1_ASAP7_75t_R \U$933 (
- .A1(b_registered[20]),
- .A2(\sel_0$1513 ),
- .B1(b_registered[21]),
- .B2(\sel_1$1514 ),
- .Y(\t$2166 )
- );
- XOR2x1_ASAP7_75t_R \U$934 (
- .A(\t$2166 ),
- .B(a_registered[11]),
- .Y(booth_b10_m21)
- );
- AO22x1_ASAP7_75t_R \U$935 (
- .A1(b_registered[21]),
- .A2(\sel_0$1513 ),
- .B1(b_registered[22]),
- .B2(\sel_1$1514 ),
- .Y(\t$2167 )
- );
- XOR2x1_ASAP7_75t_R \U$936 (
- .A(\t$2167 ),
- .B(a_registered[11]),
- .Y(booth_b10_m22)
- );
- AO22x1_ASAP7_75t_R \U$937 (
- .A1(b_registered[22]),
- .A2(\sel_0$1513 ),
- .B1(b_registered[23]),
- .B2(\sel_1$1514 ),
- .Y(\t$2168 )
- );
- XOR2x1_ASAP7_75t_R \U$938 (
- .A(\t$2168 ),
- .B(a_registered[11]),
- .Y(booth_b10_m23)
- );
- AO22x1_ASAP7_75t_R \U$939 (
- .A1(b_registered[23]),
- .A2(\sel_0$1513 ),
- .B1(b_registered[24]),
- .B2(\sel_1$1514 ),
- .Y(\t$2169 )
- );
- XOR2x1_ASAP7_75t_R \U$940 (
- .A(\t$2169 ),
- .B(a_registered[11]),
- .Y(booth_b10_m24)
- );
- AO22x1_ASAP7_75t_R \U$941 (
- .A1(b_registered[24]),
- .A2(\sel_0$1513 ),
- .B1(b_registered[25]),
- .B2(\sel_1$1514 ),
- .Y(\t$2170 )
- );
- XOR2x1_ASAP7_75t_R \U$942 (
- .A(\t$2170 ),
- .B(a_registered[11]),
- .Y(booth_b10_m25)
- );
- AO22x1_ASAP7_75t_R \U$943 (
- .A1(b_registered[25]),
- .A2(\sel_0$1513 ),
- .B1(b_registered[26]),
- .B2(\sel_1$1514 ),
- .Y(\t$2171 )
- );
- XOR2x1_ASAP7_75t_R \U$944 (
- .A(\t$2171 ),
- .B(a_registered[11]),
- .Y(booth_b10_m26)
- );
- AO22x1_ASAP7_75t_R \U$945 (
- .A1(b_registered[26]),
- .A2(\sel_0$1513 ),
- .B1(b_registered[27]),
- .B2(\sel_1$1514 ),
- .Y(\t$2172 )
- );
- XOR2x1_ASAP7_75t_R \U$946 (
- .A(\t$2172 ),
- .B(a_registered[11]),
- .Y(booth_b10_m27)
- );
- AO22x1_ASAP7_75t_R \U$947 (
- .A1(b_registered[27]),
- .A2(\sel_0$1513 ),
- .B1(b_registered[28]),
- .B2(\sel_1$1514 ),
- .Y(\t$2173 )
- );
- XOR2x1_ASAP7_75t_R \U$948 (
- .A(\t$2173 ),
- .B(a_registered[11]),
- .Y(booth_b10_m28)
- );
- AO22x1_ASAP7_75t_R \U$949 (
- .A1(b_registered[28]),
- .A2(\sel_0$1513 ),
- .B1(b_registered[29]),
- .B2(\sel_1$1514 ),
- .Y(\t$2174 )
- );
- XOR2x1_ASAP7_75t_R \U$950 (
- .A(\t$2174 ),
- .B(a_registered[11]),
- .Y(booth_b10_m29)
- );
- AO22x1_ASAP7_75t_R \U$951 (
- .A1(b_registered[29]),
- .A2(\sel_0$1513 ),
- .B1(b_registered[30]),
- .B2(\sel_1$1514 ),
- .Y(\t$2175 )
- );
- XOR2x1_ASAP7_75t_R \U$952 (
- .A(\t$2175 ),
- .B(a_registered[11]),
- .Y(booth_b10_m30)
- );
- AO22x1_ASAP7_75t_R \U$953 (
- .A1(b_registered[30]),
- .A2(\sel_0$1513 ),
- .B1(b_registered[31]),
- .B2(\sel_1$1514 ),
- .Y(\t$2176 )
- );
- XOR2x1_ASAP7_75t_R \U$954 (
- .A(\t$2176 ),
- .B(a_registered[11]),
- .Y(booth_b10_m31)
- );
- AO22x1_ASAP7_75t_R \U$955 (
- .A1(b_registered[31]),
- .A2(\sel_0$1513 ),
- .B1(1'h0),
- .B2(\sel_1$1514 ),
- .Y(\t$2177 )
- );
- XOR2x1_ASAP7_75t_R \U$956 (
- .A(\t$2177 ),
- .B(a_registered[11]),
- .Y(booth_b10_m32)
- );
- INVx1_ASAP7_75t_R \U$957 (
- .A(a_registered[11]),
- .Y(\notsign$910 )
- );
- INVx1_ASAP7_75t_R \U$958 (
- .A(a_registered[11]),
- .Y(\$19 )
- );
- INVx1_ASAP7_75t_R \U$959 (
- .A(a_registered[12]),
- .Y(\$20 )
- );
- INVx1_ASAP7_75t_R \U$960 (
- .A(a_registered[13]),
- .Y(\$21 )
- );
- AO33x2_ASAP7_75t_R \U$961 (
- .A1(\$21 ),
- .A2(a_registered[12]),
- .A3(a_registered[11]),
- .B1(a_registered[13]),
- .B2(\$20 ),
- .B3(\$19 ),
- .Y(\sel_0$1550 )
- );
- XOR2x1_ASAP7_75t_R \U$962 (
- .A(a_registered[12]),
- .B(a_registered[11]),
- .Y(\sel_1$1551 )
- );
- AO22x1_ASAP7_75t_R \U$963 (
- .A1(1'h0),
- .A2(\sel_0$1550 ),
- .B1(b_registered[0]),
- .B2(\sel_1$1551 ),
- .Y(\t$2179 )
- );
- XOR2x1_ASAP7_75t_R \U$964 (
- .A(\t$2179 ),
- .B(a_registered[13]),
- .Y(booth_b12_m0)
- );
- AO22x1_ASAP7_75t_R \U$965 (
- .A1(b_registered[0]),
- .A2(\sel_0$1550 ),
- .B1(b_registered[1]),
- .B2(\sel_1$1551 ),
- .Y(\t$2180 )
- );
- XOR2x1_ASAP7_75t_R \U$966 (
- .A(\t$2180 ),
- .B(a_registered[13]),
- .Y(booth_b12_m1)
- );
- AO22x1_ASAP7_75t_R \U$967 (
- .A1(b_registered[1]),
- .A2(\sel_0$1550 ),
- .B1(b_registered[2]),
- .B2(\sel_1$1551 ),
- .Y(\t$2181 )
- );
- XOR2x1_ASAP7_75t_R \U$968 (
- .A(\t$2181 ),
- .B(a_registered[13]),
- .Y(booth_b12_m2)
- );
- AO22x1_ASAP7_75t_R \U$969 (
- .A1(b_registered[2]),
- .A2(\sel_0$1550 ),
- .B1(b_registered[3]),
- .B2(\sel_1$1551 ),
- .Y(\t$2182 )
- );
- XOR2x1_ASAP7_75t_R \U$970 (
- .A(\t$2182 ),
- .B(a_registered[13]),
- .Y(booth_b12_m3)
- );
- AO22x1_ASAP7_75t_R \U$971 (
- .A1(b_registered[3]),
- .A2(\sel_0$1550 ),
- .B1(b_registered[4]),
- .B2(\sel_1$1551 ),
- .Y(\t$2183 )
- );
- XOR2x1_ASAP7_75t_R \U$972 (
- .A(\t$2183 ),
- .B(a_registered[13]),
- .Y(booth_b12_m4)
- );
- AO22x1_ASAP7_75t_R \U$973 (
- .A1(b_registered[4]),
- .A2(\sel_0$1550 ),
- .B1(b_registered[5]),
- .B2(\sel_1$1551 ),
- .Y(\t$2184 )
- );
- XOR2x1_ASAP7_75t_R \U$974 (
- .A(\t$2184 ),
- .B(a_registered[13]),
- .Y(booth_b12_m5)
- );
- AO22x1_ASAP7_75t_R \U$975 (
- .A1(b_registered[5]),
- .A2(\sel_0$1550 ),
- .B1(b_registered[6]),
- .B2(\sel_1$1551 ),
- .Y(\t$2185 )
- );
- XOR2x1_ASAP7_75t_R \U$976 (
- .A(\t$2185 ),
- .B(a_registered[13]),
- .Y(booth_b12_m6)
- );
- AO22x1_ASAP7_75t_R \U$977 (
- .A1(b_registered[6]),
- .A2(\sel_0$1550 ),
- .B1(b_registered[7]),
- .B2(\sel_1$1551 ),
- .Y(\t$2186 )
- );
- XOR2x1_ASAP7_75t_R \U$978 (
- .A(\t$2186 ),
- .B(a_registered[13]),
- .Y(booth_b12_m7)
- );
- AO22x1_ASAP7_75t_R \U$979 (
- .A1(b_registered[7]),
- .A2(\sel_0$1550 ),
- .B1(b_registered[8]),
- .B2(\sel_1$1551 ),
- .Y(\t$2187 )
- );
- XOR2x1_ASAP7_75t_R \U$980 (
- .A(\t$2187 ),
- .B(a_registered[13]),
- .Y(booth_b12_m8)
- );
- AO22x1_ASAP7_75t_R \U$981 (
- .A1(b_registered[8]),
- .A2(\sel_0$1550 ),
- .B1(b_registered[9]),
- .B2(\sel_1$1551 ),
- .Y(\t$2188 )
- );
- XOR2x1_ASAP7_75t_R \U$982 (
- .A(\t$2188 ),
- .B(a_registered[13]),
- .Y(booth_b12_m9)
- );
- AO22x1_ASAP7_75t_R \U$983 (
- .A1(b_registered[9]),
- .A2(\sel_0$1550 ),
- .B1(b_registered[10]),
- .B2(\sel_1$1551 ),
- .Y(\t$2189 )
- );
- XOR2x1_ASAP7_75t_R \U$984 (
- .A(\t$2189 ),
- .B(a_registered[13]),
- .Y(booth_b12_m10)
- );
- AO22x1_ASAP7_75t_R \U$985 (
- .A1(b_registered[10]),
- .A2(\sel_0$1550 ),
- .B1(b_registered[11]),
- .B2(\sel_1$1551 ),
- .Y(\t$2190 )
- );
- XOR2x1_ASAP7_75t_R \U$986 (
- .A(\t$2190 ),
- .B(a_registered[13]),
- .Y(booth_b12_m11)
- );
- AO22x1_ASAP7_75t_R \U$987 (
- .A1(b_registered[11]),
- .A2(\sel_0$1550 ),
- .B1(b_registered[12]),
- .B2(\sel_1$1551 ),
- .Y(\t$2191 )
- );
- XOR2x1_ASAP7_75t_R \U$988 (
- .A(\t$2191 ),
- .B(a_registered[13]),
- .Y(booth_b12_m12)
- );
- AO22x1_ASAP7_75t_R \U$989 (
- .A1(b_registered[12]),
- .A2(\sel_0$1550 ),
- .B1(b_registered[13]),
- .B2(\sel_1$1551 ),
- .Y(\t$2192 )
- );
- XOR2x1_ASAP7_75t_R \U$990 (
- .A(\t$2192 ),
- .B(a_registered[13]),
- .Y(booth_b12_m13)
- );
- AO22x1_ASAP7_75t_R \U$991 (
- .A1(b_registered[13]),
- .A2(\sel_0$1550 ),
- .B1(b_registered[14]),
- .B2(\sel_1$1551 ),
- .Y(\t$2193 )
- );
- XOR2x1_ASAP7_75t_R \U$992 (
- .A(\t$2193 ),
- .B(a_registered[13]),
- .Y(booth_b12_m14)
- );
- AO22x1_ASAP7_75t_R \U$993 (
- .A1(b_registered[14]),
- .A2(\sel_0$1550 ),
- .B1(b_registered[15]),
- .B2(\sel_1$1551 ),
- .Y(\t$2194 )
- );
- XOR2x1_ASAP7_75t_R \U$994 (
- .A(\t$2194 ),
- .B(a_registered[13]),
- .Y(booth_b12_m15)
- );
- AO22x1_ASAP7_75t_R \U$995 (
- .A1(b_registered[15]),
- .A2(\sel_0$1550 ),
- .B1(b_registered[16]),
- .B2(\sel_1$1551 ),
- .Y(\t$2195 )
- );
- XOR2x1_ASAP7_75t_R \U$996 (
- .A(\t$2195 ),
- .B(a_registered[13]),
- .Y(booth_b12_m16)
- );
- AO22x1_ASAP7_75t_R \U$997 (
- .A1(b_registered[16]),
- .A2(\sel_0$1550 ),
- .B1(b_registered[17]),
- .B2(\sel_1$1551 ),
- .Y(\t$2196 )
- );
- XOR2x1_ASAP7_75t_R \U$998 (
- .A(\t$2196 ),
- .B(a_registered[13]),
- .Y(booth_b12_m17)
- );
- AO22x1_ASAP7_75t_R \U$999 (
- .A1(b_registered[17]),
- .A2(\sel_0$1550 ),
- .B1(b_registered[18]),
- .B2(\sel_1$1551 ),
- .Y(\t$2197 )
- );
- FAx1_ASAP7_75t_R dadda_fa_0_26_0 (
- .A(pp_row26_0),
- .B(pp_row26_1),
- .CI(pp_row26_2),
- .CON(\con$2560 ),
- .SN(\sn$2562 )
- );
- FAx1_ASAP7_75t_R dadda_fa_0_27_0 (
- .A(pp_row27_0),
- .B(pp_row27_1),
- .CI(pp_row27_2),
- .CON(\con$2568 ),
- .SN(\sn$2570 )
- );
- FAx1_ASAP7_75t_R dadda_fa_0_28_0 (
- .A(pp_row28_0),
- .B(pp_row28_1),
- .CI(pp_row28_2),
- .CON(\con$2576 ),
- .SN(\sn$2578 )
- );
- FAx1_ASAP7_75t_R dadda_fa_0_28_1 (
- .A(pp_row28_3),
- .B(pp_row28_4),
- .CI(pp_row28_5),
- .CON(\con$2580 ),
- .SN(\sn$2582 )
- );
- FAx1_ASAP7_75t_R dadda_fa_0_29_0 (
- .A(pp_row29_0),
- .B(pp_row29_1),
- .CI(pp_row29_2),
- .CON(\con$2588 ),
- .SN(\sn$2590 )
- );
- FAx1_ASAP7_75t_R dadda_fa_0_29_1 (
- .A(pp_row29_3),
- .B(pp_row29_4),
- .CI(pp_row29_5),
- .CON(\con$2592 ),
- .SN(\sn$2594 )
- );
- FAx1_ASAP7_75t_R dadda_fa_0_30_0 (
- .A(pp_row30_0),
- .B(pp_row30_1),
- .CI(pp_row30_2),
- .CON(\con$2600 ),
- .SN(\sn$2602 )
- );
- FAx1_ASAP7_75t_R dadda_fa_0_30_1 (
- .A(pp_row30_3),
- .B(pp_row30_4),
- .CI(pp_row30_5),
- .CON(\con$2604 ),
- .SN(\sn$2606 )
- );
- FAx1_ASAP7_75t_R dadda_fa_0_30_2 (
- .A(pp_row30_6),
- .B(pp_row30_7),
- .CI(pp_row30_8),
- .CON(\con$2608 ),
- .SN(\sn$2610 )
- );
- FAx1_ASAP7_75t_R dadda_fa_0_31_0 (
- .A(pp_row31_0),
- .B(pp_row31_1),
- .CI(pp_row31_2),
- .CON(\con$2616 ),
- .SN(\sn$2618 )
- );
- FAx1_ASAP7_75t_R dadda_fa_0_31_1 (
- .A(pp_row31_3),
- .B(pp_row31_4),
- .CI(pp_row31_5),
- .CON(\con$2620 ),
- .SN(\sn$2622 )
- );
- FAx1_ASAP7_75t_R dadda_fa_0_31_2 (
- .A(pp_row31_6),
- .B(pp_row31_7),
- .CI(pp_row31_8),
- .CON(\con$2624 ),
- .SN(\sn$2626 )
- );
- FAx1_ASAP7_75t_R dadda_fa_0_32_0 (
- .A(pp_row32_0),
- .B(pp_row32_1),
- .CI(pp_row32_2),
- .CON(\con$2632 ),
- .SN(\sn$2634 )
- );
- FAx1_ASAP7_75t_R dadda_fa_0_32_1 (
- .A(pp_row32_3),
- .B(pp_row32_4),
- .CI(pp_row32_5),
- .CON(\con$2636 ),
- .SN(\sn$2638 )
- );
- FAx1_ASAP7_75t_R dadda_fa_0_32_2 (
- .A(pp_row32_6),
- .B(pp_row32_7),
- .CI(pp_row32_8),
- .CON(\con$2640 ),
- .SN(\sn$2642 )
- );
- FAx1_ASAP7_75t_R dadda_fa_0_32_3 (
- .A(pp_row32_9),
- .B(pp_row32_10),
- .CI(pp_row32_11),
- .CON(\con$2644 ),
- .SN(\sn$2646 )
- );
- FAx1_ASAP7_75t_R dadda_fa_0_33_0 (
- .A(pp_row33_0),
- .B(pp_row33_1),
- .CI(pp_row33_2),
- .CON(\con$2648 ),
- .SN(\sn$2650 )
- );
- FAx1_ASAP7_75t_R dadda_fa_0_33_1 (
- .A(pp_row33_3),
- .B(pp_row33_4),
- .CI(pp_row33_5),
- .CON(\con$2652 ),
- .SN(\sn$2654 )
- );
- FAx1_ASAP7_75t_R dadda_fa_0_33_2 (
- .A(pp_row33_6),
- .B(pp_row33_7),
- .CI(pp_row33_8),
- .CON(\con$2656 ),
- .SN(\sn$2658 )
- );
- FAx1_ASAP7_75t_R dadda_fa_0_33_3 (
- .A(pp_row33_9),
- .B(pp_row33_10),
- .CI(pp_row33_11),
- .CON(\con$2660 ),
- .SN(\sn$2662 )
- );
- FAx1_ASAP7_75t_R dadda_fa_0_34_0 (
- .A(pp_row34_0),
- .B(pp_row34_1),
- .CI(pp_row34_2),
- .CON(\con$2664 ),
- .SN(\sn$2666 )
- );
- FAx1_ASAP7_75t_R dadda_fa_0_34_1 (
- .A(pp_row34_3),
- .B(pp_row34_4),
- .CI(pp_row34_5),
- .CON(\con$2668 ),
- .SN(\sn$2670 )
- );
- FAx1_ASAP7_75t_R dadda_fa_0_34_2 (
- .A(pp_row34_6),
- .B(pp_row34_7),
- .CI(pp_row34_8),
- .CON(\con$2672 ),
- .SN(\sn$2674 )
- );
- FAx1_ASAP7_75t_R dadda_fa_0_34_3 (
- .A(pp_row34_9),
- .B(pp_row34_10),
- .CI(pp_row34_11),
- .CON(\con$2676 ),
- .SN(\sn$2678 )
- );
- FAx1_ASAP7_75t_R dadda_fa_0_35_0 (
- .A(pp_row35_0),
- .B(pp_row35_1),
- .CI(pp_row35_2),
- .CON(\con$2680 ),
- .SN(\sn$2682 )
- );
- FAx1_ASAP7_75t_R dadda_fa_0_35_1 (
- .A(pp_row35_3),
- .B(pp_row35_4),
- .CI(pp_row35_5),
- .CON(\con$2684 ),
- .SN(\sn$2686 )
- );
- FAx1_ASAP7_75t_R dadda_fa_0_35_2 (
- .A(pp_row35_6),
- .B(pp_row35_7),
- .CI(pp_row35_8),
- .CON(\con$2688 ),
- .SN(\sn$2690 )
- );
- FAx1_ASAP7_75t_R dadda_fa_0_35_3 (
- .A(pp_row35_9),
- .B(pp_row35_10),
- .CI(pp_row35_11),
- .CON(\con$2692 ),
- .SN(\sn$2694 )
- );
- FAx1_ASAP7_75t_R dadda_fa_0_36_0 (
- .A(1'h1),
- .B(pp_row36_1),
- .CI(pp_row36_2),
- .CON(\con$2696 ),
- .SN(\sn$2698 )
- );
- FAx1_ASAP7_75t_R dadda_fa_0_36_1 (
- .A(pp_row36_3),
- .B(pp_row36_4),
- .CI(pp_row36_5),
- .CON(\con$2700 ),
- .SN(\sn$2702 )
- );
- FAx1_ASAP7_75t_R dadda_fa_0_36_2 (
- .A(pp_row36_6),
- .B(pp_row36_7),
- .CI(pp_row36_8),
- .CON(\con$2704 ),
- .SN(\sn$2706 )
- );
- FAx1_ASAP7_75t_R dadda_fa_0_37_0 (
- .A(pp_row37_0),
- .B(pp_row37_1),
- .CI(pp_row37_2),
- .CON(\con$2712 ),
- .SN(\sn$2714 )
- );
- FAx1_ASAP7_75t_R dadda_fa_0_37_1 (
- .A(pp_row37_3),
- .B(pp_row37_4),
- .CI(pp_row37_5),
- .CON(\con$2716 ),
- .SN(\sn$2718 )
- );
- FAx1_ASAP7_75t_R dadda_fa_0_37_2 (
- .A(pp_row37_6),
- .B(pp_row37_7),
- .CI(pp_row37_8),
- .CON(\con$2720 ),
- .SN(\sn$2722 )
- );
- FAx1_ASAP7_75t_R dadda_fa_0_38_0 (
- .A(1'h1),
- .B(pp_row38_1),
- .CI(pp_row38_2),
- .CON(\con$2724 ),
- .SN(\sn$2726 )
- );
- FAx1_ASAP7_75t_R dadda_fa_0_38_1 (
- .A(pp_row38_3),
- .B(pp_row38_4),
- .CI(pp_row38_5),
- .CON(\con$2728 ),
- .SN(\sn$2730 )
- );
- FAx1_ASAP7_75t_R dadda_fa_0_39_0 (
- .A(pp_row39_0),
- .B(pp_row39_1),
- .CI(pp_row39_2),
- .CON(\con$2736 ),
- .SN(\sn$2738 )
- );
- FAx1_ASAP7_75t_R dadda_fa_0_39_1 (
- .A(pp_row39_3),
- .B(pp_row39_4),
- .CI(pp_row39_5),
- .CON(\con$2740 ),
- .SN(\sn$2742 )
- );
- FAx1_ASAP7_75t_R dadda_fa_0_40_0 (
- .A(1'h1),
- .B(pp_row40_1),
- .CI(pp_row40_2),
- .CON(\con$2744 ),
- .SN(\sn$2746 )
- );
- FAx1_ASAP7_75t_R dadda_fa_0_41_0 (
- .A(pp_row41_0),
- .B(pp_row41_1),
- .CI(pp_row41_2),
- .CON(\con$2752 ),
- .SN(\sn$2754 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_18_0 (
- .A(pp_row18_0),
- .B(pp_row18_1),
- .CI(pp_row18_2),
- .CON(\con$2768 ),
- .SN(\sn$2770 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_19_0 (
- .A(pp_row19_0),
- .B(pp_row19_1),
- .CI(pp_row19_2),
- .CON(\con$2776 ),
- .SN(\sn$2778 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_20_0 (
- .A(pp_row20_0),
- .B(pp_row20_1),
- .CI(pp_row20_2),
- .CON(\con$2784 ),
- .SN(\sn$2786 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_20_1 (
- .A(pp_row20_3),
- .B(pp_row20_4),
- .CI(pp_row20_5),
- .CON(\con$2788 ),
- .SN(\sn$2790 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_21_0 (
- .A(pp_row21_0),
- .B(pp_row21_1),
- .CI(pp_row21_2),
- .CON(\con$2796 ),
- .SN(\sn$2798 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_21_1 (
- .A(pp_row21_3),
- .B(pp_row21_4),
- .CI(pp_row21_5),
- .CON(\con$2800 ),
- .SN(\sn$2802 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_22_0 (
- .A(pp_row22_0),
- .B(pp_row22_1),
- .CI(pp_row22_2),
- .CON(\con$2808 ),
- .SN(\sn$2810 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_22_1 (
- .A(pp_row22_3),
- .B(pp_row22_4),
- .CI(pp_row22_5),
- .CON(\con$2812 ),
- .SN(\sn$2814 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_22_2 (
- .A(pp_row22_6),
- .B(pp_row22_7),
- .CI(pp_row22_8),
- .CON(\con$2816 ),
- .SN(\sn$2818 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_23_0 (
- .A(pp_row23_0),
- .B(pp_row23_1),
- .CI(pp_row23_2),
- .CON(\con$2824 ),
- .SN(\sn$2826 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_23_1 (
- .A(pp_row23_3),
- .B(pp_row23_4),
- .CI(pp_row23_5),
- .CON(\con$2828 ),
- .SN(\sn$2830 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_23_2 (
- .A(pp_row23_6),
- .B(pp_row23_7),
- .CI(pp_row23_8),
- .CON(\con$2832 ),
- .SN(\sn$2834 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_24_0 (
- .A(pp_row24_2),
- .B(pp_row24_3),
- .CI(pp_row24_4),
- .CON(\con$2840 ),
- .SN(\sn$2842 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_24_1 (
- .A(pp_row24_5),
- .B(pp_row24_6),
- .CI(pp_row24_7),
- .CON(\con$2844 ),
- .SN(\sn$2846 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_24_2 (
- .A(pp_row24_8),
- .B(pp_row24_9),
- .CI(pp_row24_10),
- .CON(\con$2848 ),
- .SN(\sn$2850 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_24_3 (
- .A(pp_row24_11),
- .B(pp_row24_12),
- .CI(pp_row24_13),
- .CON(\con$2852 ),
- .SN(\sn$2854 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_25_0 (
- .A(pp_row25_2),
- .B(pp_row25_3),
- .CI(pp_row25_4),
- .CON(\con$2856 ),
- .SN(\sn$2858 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_25_1 (
- .A(pp_row25_5),
- .B(pp_row25_6),
- .CI(pp_row25_7),
- .CON(\con$2860 ),
- .SN(\sn$2862 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_25_2 (
- .A(pp_row25_8),
- .B(pp_row25_9),
- .CI(pp_row25_10),
- .CON(\con$2864 ),
- .SN(\sn$2866 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_25_3 (
- .A(pp_row25_11),
- .B(pp_row25_12),
- .CI(\c$2553 ),
- .CON(\con$2868 ),
- .SN(\sn$2870 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_26_0 (
- .A(pp_row26_5),
- .B(pp_row26_6),
- .CI(pp_row26_7),
- .CON(\con$2872 ),
- .SN(\sn$2874 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_26_1 (
- .A(pp_row26_8),
- .B(pp_row26_9),
- .CI(pp_row26_10),
- .CON(\con$2876 ),
- .SN(\sn$2878 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_26_2 (
- .A(pp_row26_11),
- .B(pp_row26_12),
- .CI(pp_row26_13),
- .CON(\con$2880 ),
- .SN(\sn$2882 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_26_3 (
- .A(pp_row26_14),
- .B(\c$2557 ),
- .CI(\s$2563 ),
- .CON(\con$2884 ),
- .SN(\sn$2886 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_27_0 (
- .A(pp_row27_5),
- .B(pp_row27_6),
- .CI(pp_row27_7),
- .CON(\con$2888 ),
- .SN(\sn$2890 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_27_1 (
- .A(pp_row27_8),
- .B(pp_row27_9),
- .CI(pp_row27_10),
- .CON(\con$2892 ),
- .SN(\sn$2894 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_27_2 (
- .A(pp_row27_11),
- .B(pp_row27_12),
- .CI(pp_row27_13),
- .CON(\con$2896 ),
- .SN(\sn$2898 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_27_3 (
- .A(\c$2561 ),
- .B(\c$2565 ),
- .CI(\s$2571 ),
- .CON(\con$2900 ),
- .SN(\sn$2902 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_28_0 (
- .A(pp_row28_8),
- .B(pp_row28_9),
- .CI(pp_row28_10),
- .CON(\con$2904 ),
- .SN(\sn$2906 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_28_1 (
- .A(pp_row28_11),
- .B(pp_row28_12),
- .CI(pp_row28_13),
- .CON(\con$2908 ),
- .SN(\sn$2910 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_28_2 (
- .A(pp_row28_14),
- .B(pp_row28_15),
- .CI(\c$2569 ),
- .CON(\con$2912 ),
- .SN(\sn$2914 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_28_3 (
- .A(\c$2573 ),
- .B(\s$2579 ),
- .CI(\s$2583 ),
- .CON(\con$2916 ),
- .SN(\sn$2918 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_29_0 (
- .A(pp_row29_8),
- .B(pp_row29_9),
- .CI(pp_row29_10),
- .CON(\con$2920 ),
- .SN(\sn$2922 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_29_1 (
- .A(pp_row29_11),
- .B(pp_row29_12),
- .CI(pp_row29_13),
- .CON(\con$2924 ),
- .SN(\sn$2926 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_29_2 (
- .A(pp_row29_14),
- .B(\c$2577 ),
- .CI(\c$2581 ),
- .CON(\con$2928 ),
- .SN(\sn$2930 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_29_3 (
- .A(\c$2585 ),
- .B(\s$2591 ),
- .CI(\s$2595 ),
- .CON(\con$2932 ),
- .SN(\sn$2934 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_30_0 (
- .A(pp_row30_11),
- .B(pp_row30_12),
- .CI(pp_row30_13),
- .CON(\con$2936 ),
- .SN(\sn$2938 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_30_1 (
- .A(pp_row30_14),
- .B(pp_row30_15),
- .CI(pp_row30_16),
- .CON(\con$2940 ),
- .SN(\sn$2942 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_30_2 (
- .A(\c$2589 ),
- .B(\c$2593 ),
- .CI(\c$2597 ),
- .CON(\con$2944 ),
- .SN(\sn$2946 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_30_3 (
- .A(\s$2603 ),
- .B(\s$2607 ),
- .CI(\s$2611 ),
- .CON(\con$2948 ),
- .SN(\sn$2950 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_31_0 (
- .A(pp_row31_11),
- .B(pp_row31_12),
- .CI(pp_row31_13),
- .CON(\con$2952 ),
- .SN(\sn$2954 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_31_1 (
- .A(pp_row31_14),
- .B(pp_row31_15),
- .CI(\c$2601 ),
- .CON(\con$2956 ),
- .SN(\sn$2958 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_31_2 (
- .A(\c$2605 ),
- .B(\c$2609 ),
- .CI(\c$2613 ),
- .CON(\con$2960 ),
- .SN(\sn$2962 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_31_3 (
- .A(\s$2619 ),
- .B(\s$2623 ),
- .CI(\s$2627 ),
- .CON(\con$2964 ),
- .SN(\sn$2966 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_32_0 (
- .A(pp_row32_12),
- .B(pp_row32_13),
- .CI(pp_row32_14),
- .CON(\con$2968 ),
- .SN(\sn$2970 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_32_1 (
- .A(pp_row32_15),
- .B(pp_row32_16),
- .CI(\c$2617 ),
- .CON(\con$2972 ),
- .SN(\sn$2974 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_32_2 (
- .A(\c$2621 ),
- .B(\c$2625 ),
- .CI(\c$2629 ),
- .CON(\con$2976 ),
- .SN(\sn$2978 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_32_3 (
- .A(\s$2635 ),
- .B(\s$2639 ),
- .CI(\s$2643 ),
- .CON(\con$2980 ),
- .SN(\sn$2982 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_33_0 (
- .A(pp_row33_12),
- .B(pp_row33_13),
- .CI(pp_row33_14),
- .CON(\con$2984 ),
- .SN(\sn$2986 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_33_1 (
- .A(pp_row33_15),
- .B(pp_row33_16),
- .CI(\c$2633 ),
- .CON(\con$2988 ),
- .SN(\sn$2990 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_33_2 (
- .A(\c$2637 ),
- .B(\c$2641 ),
- .CI(\c$2645 ),
- .CON(\con$2992 ),
- .SN(\sn$2994 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_33_3 (
- .A(\s$2651 ),
- .B(\s$2655 ),
- .CI(\s$2659 ),
- .CON(\con$2996 ),
- .SN(\sn$2998 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_34_0 (
- .A(pp_row34_12),
- .B(pp_row34_13),
- .CI(pp_row34_14),
- .CON(\con$3000 ),
- .SN(\sn$3002 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_34_1 (
- .A(pp_row34_15),
- .B(pp_row34_16),
- .CI(\c$2649 ),
- .CON(\con$3004 ),
- .SN(\sn$3006 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_34_2 (
- .A(\c$2653 ),
- .B(\c$2657 ),
- .CI(\c$2661 ),
- .CON(\con$3008 ),
- .SN(\sn$3010 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_34_3 (
- .A(\s$2667 ),
- .B(\s$2671 ),
- .CI(\s$2675 ),
- .CON(\con$3012 ),
- .SN(\sn$3014 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_35_0 (
- .A(pp_row35_12),
- .B(pp_row35_13),
- .CI(pp_row35_14),
- .CON(\con$3016 ),
- .SN(\sn$3018 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_35_1 (
- .A(pp_row35_15),
- .B(pp_row35_16),
- .CI(\c$2665 ),
- .CON(\con$3020 ),
- .SN(\sn$3022 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_35_2 (
- .A(\c$2669 ),
- .B(\c$2673 ),
- .CI(\c$2677 ),
- .CON(\con$3024 ),
- .SN(\sn$3026 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_35_3 (
- .A(\s$2683 ),
- .B(\s$2687 ),
- .CI(\s$2691 ),
- .CON(\con$3028 ),
- .SN(\sn$3030 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_36_0 (
- .A(pp_row36_11),
- .B(pp_row36_12),
- .CI(pp_row36_13),
- .CON(\con$3032 ),
- .SN(\sn$3034 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_36_1 (
- .A(pp_row36_14),
- .B(pp_row36_15),
- .CI(\c$2681 ),
- .CON(\con$3036 ),
- .SN(\sn$3038 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_36_2 (
- .A(\c$2685 ),
- .B(\c$2689 ),
- .CI(\c$2693 ),
- .CON(\con$3040 ),
- .SN(\sn$3042 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_36_3 (
- .A(\s$2699 ),
- .B(\s$2703 ),
- .CI(\s$2707 ),
- .CON(\con$3044 ),
- .SN(\sn$3046 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_37_0 (
- .A(pp_row37_9),
- .B(pp_row37_10),
- .CI(pp_row37_11),
- .CON(\con$3048 ),
- .SN(\sn$3050 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_37_1 (
- .A(pp_row37_12),
- .B(pp_row37_13),
- .CI(pp_row37_14),
- .CON(\con$3052 ),
- .SN(\sn$3054 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_37_2 (
- .A(\c$2697 ),
- .B(\c$2701 ),
- .CI(\c$2705 ),
- .CON(\con$3056 ),
- .SN(\sn$3058 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_37_3 (
- .A(\c$2709 ),
- .B(\s$2715 ),
- .CI(\s$2719 ),
- .CON(\con$3060 ),
- .SN(\sn$3062 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_38_0 (
- .A(pp_row38_8),
- .B(pp_row38_9),
- .CI(pp_row38_10),
- .CON(\con$3064 ),
- .SN(\sn$3066 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_38_1 (
- .A(pp_row38_11),
- .B(pp_row38_12),
- .CI(pp_row38_13),
- .CON(\con$3068 ),
- .SN(\sn$3070 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_38_2 (
- .A(pp_row38_14),
- .B(\c$2713 ),
- .CI(\c$2717 ),
- .CON(\con$3072 ),
- .SN(\sn$3074 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_38_3 (
- .A(\c$2721 ),
- .B(\s$2727 ),
- .CI(\s$2731 ),
- .CON(\con$3076 ),
- .SN(\sn$3078 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_39_0 (
- .A(pp_row39_6),
- .B(pp_row39_7),
- .CI(pp_row39_8),
- .CON(\con$3080 ),
- .SN(\sn$3082 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_39_1 (
- .A(pp_row39_9),
- .B(pp_row39_10),
- .CI(pp_row39_11),
- .CON(\con$3084 ),
- .SN(\sn$3086 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_39_2 (
- .A(pp_row39_12),
- .B(pp_row39_13),
- .CI(\c$2725 ),
- .CON(\con$3088 ),
- .SN(\sn$3090 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_39_3 (
- .A(\c$2729 ),
- .B(\c$2733 ),
- .CI(\s$2739 ),
- .CON(\con$3092 ),
- .SN(\sn$3094 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_40_0 (
- .A(pp_row40_5),
- .B(pp_row40_6),
- .CI(pp_row40_7),
- .CON(\con$3096 ),
- .SN(\sn$3098 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_40_1 (
- .A(pp_row40_8),
- .B(pp_row40_9),
- .CI(pp_row40_10),
- .CON(\con$3100 ),
- .SN(\sn$3102 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_40_2 (
- .A(pp_row40_11),
- .B(pp_row40_12),
- .CI(pp_row40_13),
- .CON(\con$3104 ),
- .SN(\sn$3106 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_40_3 (
- .A(\c$2737 ),
- .B(\c$2741 ),
- .CI(\s$2747 ),
- .CON(\con$3108 ),
- .SN(\sn$3110 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_41_0 (
- .A(pp_row41_3),
- .B(pp_row41_4),
- .CI(pp_row41_5),
- .CON(\con$3112 ),
- .SN(\sn$3114 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_41_1 (
- .A(pp_row41_6),
- .B(pp_row41_7),
- .CI(pp_row41_8),
- .CON(\con$3116 ),
- .SN(\sn$3118 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_41_2 (
- .A(pp_row41_9),
- .B(pp_row41_10),
- .CI(pp_row41_11),
- .CON(\con$3120 ),
- .SN(\sn$3122 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_41_3 (
- .A(pp_row41_12),
- .B(\c$2745 ),
- .CI(\c$2749 ),
- .CON(\con$3124 ),
- .SN(\sn$3126 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_42_0 (
- .A(pp_row42_2),
- .B(pp_row42_3),
- .CI(pp_row42_4),
- .CON(\con$3128 ),
- .SN(\sn$3130 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_42_1 (
- .A(pp_row42_5),
- .B(pp_row42_6),
- .CI(pp_row42_7),
- .CON(\con$3132 ),
- .SN(\sn$3134 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_42_2 (
- .A(pp_row42_8),
- .B(pp_row42_9),
- .CI(pp_row42_10),
- .CON(\con$3136 ),
- .SN(\sn$3138 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_42_3 (
- .A(pp_row42_11),
- .B(pp_row42_12),
- .CI(\c$2753 ),
- .CON(\con$3140 ),
- .SN(\sn$3142 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_43_0 (
- .A(pp_row43_0),
- .B(pp_row43_1),
- .CI(pp_row43_2),
- .CON(\con$3144 ),
- .SN(\sn$3146 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_43_1 (
- .A(pp_row43_3),
- .B(pp_row43_4),
- .CI(pp_row43_5),
- .CON(\con$3148 ),
- .SN(\sn$3150 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_43_2 (
- .A(pp_row43_6),
- .B(pp_row43_7),
- .CI(pp_row43_8),
- .CON(\con$3152 ),
- .SN(\sn$3154 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_43_3 (
- .A(pp_row43_9),
- .B(pp_row43_10),
- .CI(pp_row43_11),
- .CON(\con$3156 ),
- .SN(\sn$3158 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_44_0 (
- .A(1'h1),
- .B(pp_row44_1),
- .CI(pp_row44_2),
- .CON(\con$3160 ),
- .SN(\sn$3162 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_44_1 (
- .A(pp_row44_3),
- .B(pp_row44_4),
- .CI(pp_row44_5),
- .CON(\con$3164 ),
- .SN(\sn$3166 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_44_2 (
- .A(pp_row44_6),
- .B(pp_row44_7),
- .CI(pp_row44_8),
- .CON(\con$3168 ),
- .SN(\sn$3170 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_45_0 (
- .A(pp_row45_0),
- .B(pp_row45_1),
- .CI(pp_row45_2),
- .CON(\con$3176 ),
- .SN(\sn$3178 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_45_1 (
- .A(pp_row45_3),
- .B(pp_row45_4),
- .CI(pp_row45_5),
- .CON(\con$3180 ),
- .SN(\sn$3182 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_45_2 (
- .A(pp_row45_6),
- .B(pp_row45_7),
- .CI(pp_row45_8),
- .CON(\con$3184 ),
- .SN(\sn$3186 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_46_0 (
- .A(1'h1),
- .B(pp_row46_1),
- .CI(pp_row46_2),
- .CON(\con$3188 ),
- .SN(\sn$3190 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_46_1 (
- .A(pp_row46_3),
- .B(pp_row46_4),
- .CI(pp_row46_5),
- .CON(\con$3192 ),
- .SN(\sn$3194 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_47_0 (
- .A(pp_row47_0),
- .B(pp_row47_1),
- .CI(pp_row47_2),
- .CON(\con$3200 ),
- .SN(\sn$3202 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_47_1 (
- .A(pp_row47_3),
- .B(pp_row47_4),
- .CI(pp_row47_5),
- .CON(\con$3204 ),
- .SN(\sn$3206 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_48_0 (
- .A(1'h1),
- .B(pp_row48_1),
- .CI(pp_row48_2),
- .CON(\con$3208 ),
- .SN(\sn$3210 )
- );
- FAx1_ASAP7_75t_R dadda_fa_1_49_0 (
- .A(pp_row49_0),
- .B(pp_row49_1),
- .CI(pp_row49_2),
- .CON(\con$3216 ),
- .SN(\sn$3218 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_12_0 (
- .A(pp_row12_0),
- .B(pp_row12_1),
- .CI(pp_row12_2),
- .CON(\con$3232 ),
- .SN(\sn$3234 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_13_0 (
- .A(pp_row13_0),
- .B(pp_row13_1),
- .CI(pp_row13_2),
- .CON(\con$3240 ),
- .SN(\sn$3242 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_14_0 (
- .A(pp_row14_0),
- .B(pp_row14_1),
- .CI(pp_row14_2),
- .CON(\con$3248 ),
- .SN(\sn$3250 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_14_1 (
- .A(pp_row14_3),
- .B(pp_row14_4),
- .CI(pp_row14_5),
- .CON(\con$3252 ),
- .SN(\sn$3254 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_15_0 (
- .A(pp_row15_0),
- .B(pp_row15_1),
- .CI(pp_row15_2),
- .CON(\con$3260 ),
- .SN(\sn$3262 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_15_1 (
- .A(pp_row15_3),
- .B(pp_row15_4),
- .CI(pp_row15_5),
- .CON(\con$3264 ),
- .SN(\sn$3266 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_16_0 (
- .A(pp_row16_2),
- .B(pp_row16_3),
- .CI(pp_row16_4),
- .CON(\con$3272 ),
- .SN(\sn$3274 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_16_1 (
- .A(pp_row16_5),
- .B(pp_row16_6),
- .CI(pp_row16_7),
- .CON(\con$3276 ),
- .SN(\sn$3278 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_16_2 (
- .A(pp_row16_8),
- .B(pp_row16_9),
- .CI(\s$2763 ),
- .CON(\con$3280 ),
- .SN(\sn$3282 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_17_0 (
- .A(pp_row17_2),
- .B(pp_row17_3),
- .CI(pp_row17_4),
- .CON(\con$3284 ),
- .SN(\sn$3286 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_17_1 (
- .A(pp_row17_5),
- .B(pp_row17_6),
- .CI(pp_row17_7),
- .CON(\con$3288 ),
- .SN(\sn$3290 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_17_2 (
- .A(pp_row17_8),
- .B(\c$2761 ),
- .CI(\s$2767 ),
- .CON(\con$3292 ),
- .SN(\sn$3294 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_18_0 (
- .A(pp_row18_5),
- .B(pp_row18_6),
- .CI(pp_row18_7),
- .CON(\con$3296 ),
- .SN(\sn$3298 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_18_1 (
- .A(pp_row18_8),
- .B(pp_row18_9),
- .CI(pp_row18_10),
- .CON(\con$3300 ),
- .SN(\sn$3302 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_18_2 (
- .A(\c$2765 ),
- .B(\s$2771 ),
- .CI(\s$2775 ),
- .CON(\con$3304 ),
- .SN(\sn$3306 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_19_0 (
- .A(pp_row19_5),
- .B(pp_row19_6),
- .CI(pp_row19_7),
- .CON(\con$3308 ),
- .SN(\sn$3310 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_19_1 (
- .A(pp_row19_8),
- .B(pp_row19_9),
- .CI(\c$2769 ),
- .CON(\con$3312 ),
- .SN(\sn$3314 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_19_2 (
- .A(\c$2773 ),
- .B(\s$2779 ),
- .CI(\s$2783 ),
- .CON(\con$3316 ),
- .SN(\sn$3318 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_20_0 (
- .A(pp_row20_8),
- .B(pp_row20_9),
- .CI(pp_row20_10),
- .CON(\con$3320 ),
- .SN(\sn$3322 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_20_1 (
- .A(pp_row20_11),
- .B(\c$2777 ),
- .CI(\c$2781 ),
- .CON(\con$3324 ),
- .SN(\sn$3326 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_20_2 (
- .A(\s$2787 ),
- .B(\s$2791 ),
- .CI(\s$2795 ),
- .CON(\con$3328 ),
- .SN(\sn$3330 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_21_0 (
- .A(pp_row21_8),
- .B(pp_row21_9),
- .CI(pp_row21_10),
- .CON(\con$3332 ),
- .SN(\sn$3334 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_21_1 (
- .A(\c$2785 ),
- .B(\c$2789 ),
- .CI(\c$2793 ),
- .CON(\con$3336 ),
- .SN(\sn$3338 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_21_2 (
- .A(\s$2799 ),
- .B(\s$2803 ),
- .CI(\s$2807 ),
- .CON(\con$3340 ),
- .SN(\sn$3342 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_22_0 (
- .A(pp_row22_11),
- .B(pp_row22_12),
- .CI(\c$2797 ),
- .CON(\con$3344 ),
- .SN(\sn$3346 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_22_1 (
- .A(\c$2801 ),
- .B(\c$2805 ),
- .CI(\s$2811 ),
- .CON(\con$3348 ),
- .SN(\sn$3350 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_22_2 (
- .A(\s$2815 ),
- .B(\s$2819 ),
- .CI(\s$2823 ),
- .CON(\con$3352 ),
- .SN(\sn$3354 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_23_0 (
- .A(pp_row23_11),
- .B(\c$2809 ),
- .CI(\c$2813 ),
- .CON(\con$3356 ),
- .SN(\sn$3358 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_23_1 (
- .A(\c$2817 ),
- .B(\c$2821 ),
- .CI(\s$2827 ),
- .CON(\con$3360 ),
- .SN(\sn$3362 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_23_2 (
- .A(\s$2831 ),
- .B(\s$2835 ),
- .CI(\s$2839 ),
- .CON(\con$3364 ),
- .SN(\sn$3366 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_24_0 (
- .A(\s$2555 ),
- .B(\c$2825 ),
- .CI(\c$2829 ),
- .CON(\con$3368 ),
- .SN(\sn$3370 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_24_1 (
- .A(\c$2833 ),
- .B(\c$2837 ),
- .CI(\s$2843 ),
- .CON(\con$3372 ),
- .SN(\sn$3374 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_24_2 (
- .A(\s$2847 ),
- .B(\s$2851 ),
- .CI(\s$2855 ),
- .CON(\con$3376 ),
- .SN(\sn$3378 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_25_0 (
- .A(\s$2559 ),
- .B(\c$2841 ),
- .CI(\c$2845 ),
- .CON(\con$3380 ),
- .SN(\sn$3382 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_25_1 (
- .A(\c$2849 ),
- .B(\c$2853 ),
- .CI(\s$2859 ),
- .CON(\con$3384 ),
- .SN(\sn$3386 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_25_2 (
- .A(\s$2863 ),
- .B(\s$2867 ),
- .CI(\s$2871 ),
- .CON(\con$3388 ),
- .SN(\sn$3390 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_26_0 (
- .A(\s$2567 ),
- .B(\c$2857 ),
- .CI(\c$2861 ),
- .CON(\con$3392 ),
- .SN(\sn$3394 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_26_1 (
- .A(\c$2865 ),
- .B(\c$2869 ),
- .CI(\s$2875 ),
- .CON(\con$3396 ),
- .SN(\sn$3398 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_26_2 (
- .A(\s$2879 ),
- .B(\s$2883 ),
- .CI(\s$2887 ),
- .CON(\con$3400 ),
- .SN(\sn$3402 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_27_0 (
- .A(\s$2575 ),
- .B(\c$2873 ),
- .CI(\c$2877 ),
- .CON(\con$3404 ),
- .SN(\sn$3406 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_27_1 (
- .A(\c$2881 ),
- .B(\c$2885 ),
- .CI(\s$2891 ),
- .CON(\con$3408 ),
- .SN(\sn$3410 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_27_2 (
- .A(\s$2895 ),
- .B(\s$2899 ),
- .CI(\s$2903 ),
- .CON(\con$3412 ),
- .SN(\sn$3414 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_28_0 (
- .A(\s$2587 ),
- .B(\c$2889 ),
- .CI(\c$2893 ),
- .CON(\con$3416 ),
- .SN(\sn$3418 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_28_1 (
- .A(\c$2897 ),
- .B(\c$2901 ),
- .CI(\s$2907 ),
- .CON(\con$3420 ),
- .SN(\sn$3422 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_28_2 (
- .A(\s$2911 ),
- .B(\s$2915 ),
- .CI(\s$2919 ),
- .CON(\con$3424 ),
- .SN(\sn$3426 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_29_0 (
- .A(\s$2599 ),
- .B(\c$2905 ),
- .CI(\c$2909 ),
- .CON(\con$3428 ),
- .SN(\sn$3430 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_29_1 (
- .A(\c$2913 ),
- .B(\c$2917 ),
- .CI(\s$2923 ),
- .CON(\con$3432 ),
- .SN(\sn$3434 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_29_2 (
- .A(\s$2927 ),
- .B(\s$2931 ),
- .CI(\s$2935 ),
- .CON(\con$3436 ),
- .SN(\sn$3438 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_30_0 (
- .A(\s$2615 ),
- .B(\c$2921 ),
- .CI(\c$2925 ),
- .CON(\con$3440 ),
- .SN(\sn$3442 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_30_1 (
- .A(\c$2929 ),
- .B(\c$2933 ),
- .CI(\s$2939 ),
- .CON(\con$3444 ),
- .SN(\sn$3446 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_30_2 (
- .A(\s$2943 ),
- .B(\s$2947 ),
- .CI(\s$2951 ),
- .CON(\con$3448 ),
- .SN(\sn$3450 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_31_0 (
- .A(\s$2631 ),
- .B(\c$2937 ),
- .CI(\c$2941 ),
- .CON(\con$3452 ),
- .SN(\sn$3454 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_31_1 (
- .A(\c$2945 ),
- .B(\c$2949 ),
- .CI(\s$2955 ),
- .CON(\con$3456 ),
- .SN(\sn$3458 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_31_2 (
- .A(\s$2959 ),
- .B(\s$2963 ),
- .CI(\s$2967 ),
- .CON(\con$3460 ),
- .SN(\sn$3462 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_32_0 (
- .A(\s$2647 ),
- .B(\c$2953 ),
- .CI(\c$2957 ),
- .CON(\con$3464 ),
- .SN(\sn$3466 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_32_1 (
- .A(\c$2961 ),
- .B(\c$2965 ),
- .CI(\s$2971 ),
- .CON(\con$3468 ),
- .SN(\sn$3470 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_32_2 (
- .A(\s$2975 ),
- .B(\s$2979 ),
- .CI(\s$2983 ),
- .CON(\con$3472 ),
- .SN(\sn$3474 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_33_0 (
- .A(\s$2663 ),
- .B(\c$2969 ),
- .CI(\c$2973 ),
- .CON(\con$3476 ),
- .SN(\sn$3478 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_33_1 (
- .A(\c$2977 ),
- .B(\c$2981 ),
- .CI(\s$2987 ),
- .CON(\con$3480 ),
- .SN(\sn$3482 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_33_2 (
- .A(\s$2991 ),
- .B(\s$2995 ),
- .CI(\s$2999 ),
- .CON(\con$3484 ),
- .SN(\sn$3486 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_34_0 (
- .A(\s$2679 ),
- .B(\c$2985 ),
- .CI(\c$2989 ),
- .CON(\con$3488 ),
- .SN(\sn$3490 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_34_1 (
- .A(\c$2993 ),
- .B(\c$2997 ),
- .CI(\s$3003 ),
- .CON(\con$3492 ),
- .SN(\sn$3494 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_34_2 (
- .A(\s$3007 ),
- .B(\s$3011 ),
- .CI(\s$3015 ),
- .CON(\con$3496 ),
- .SN(\sn$3498 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_35_0 (
- .A(\s$2695 ),
- .B(\c$3001 ),
- .CI(\c$3005 ),
- .CON(\con$3500 ),
- .SN(\sn$3502 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_35_1 (
- .A(\c$3009 ),
- .B(\c$3013 ),
- .CI(\s$3019 ),
- .CON(\con$3504 ),
- .SN(\sn$3506 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_35_2 (
- .A(\s$3023 ),
- .B(\s$3027 ),
- .CI(\s$3031 ),
- .CON(\con$3508 ),
- .SN(\sn$3510 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_36_0 (
- .A(\s$2711 ),
- .B(\c$3017 ),
- .CI(\c$3021 ),
- .CON(\con$3512 ),
- .SN(\sn$3514 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_36_1 (
- .A(\c$3025 ),
- .B(\c$3029 ),
- .CI(\s$3035 ),
- .CON(\con$3516 ),
- .SN(\sn$3518 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_36_2 (
- .A(\s$3039 ),
- .B(\s$3043 ),
- .CI(\s$3047 ),
- .CON(\con$3520 ),
- .SN(\sn$3522 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_37_0 (
- .A(\s$2723 ),
- .B(\c$3033 ),
- .CI(\c$3037 ),
- .CON(\con$3524 ),
- .SN(\sn$3526 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_37_1 (
- .A(\c$3041 ),
- .B(\c$3045 ),
- .CI(\s$3051 ),
- .CON(\con$3528 ),
- .SN(\sn$3530 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_37_2 (
- .A(\s$3055 ),
- .B(\s$3059 ),
- .CI(\s$3063 ),
- .CON(\con$3532 ),
- .SN(\sn$3534 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_38_0 (
- .A(\s$2735 ),
- .B(\c$3049 ),
- .CI(\c$3053 ),
- .CON(\con$3536 ),
- .SN(\sn$3538 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_38_1 (
- .A(\c$3057 ),
- .B(\c$3061 ),
- .CI(\s$3067 ),
- .CON(\con$3540 ),
- .SN(\sn$3542 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_38_2 (
- .A(\s$3071 ),
- .B(\s$3075 ),
- .CI(\s$3079 ),
- .CON(\con$3544 ),
- .SN(\sn$3546 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_39_0 (
- .A(\s$2743 ),
- .B(\c$3065 ),
- .CI(\c$3069 ),
- .CON(\con$3548 ),
- .SN(\sn$3550 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_39_1 (
- .A(\c$3073 ),
- .B(\c$3077 ),
- .CI(\s$3083 ),
- .CON(\con$3552 ),
- .SN(\sn$3554 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_39_2 (
- .A(\s$3087 ),
- .B(\s$3091 ),
- .CI(\s$3095 ),
- .CON(\con$3556 ),
- .SN(\sn$3558 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_40_0 (
- .A(\s$2751 ),
- .B(\c$3081 ),
- .CI(\c$3085 ),
- .CON(\con$3560 ),
- .SN(\sn$3562 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_40_1 (
- .A(\c$3089 ),
- .B(\c$3093 ),
- .CI(\s$3099 ),
- .CON(\con$3564 ),
- .SN(\sn$3566 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_40_2 (
- .A(\s$3103 ),
- .B(\s$3107 ),
- .CI(\s$3111 ),
- .CON(\con$3568 ),
- .SN(\sn$3570 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_41_0 (
- .A(\s$2755 ),
- .B(\c$3097 ),
- .CI(\c$3101 ),
- .CON(\con$3572 ),
- .SN(\sn$3574 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_41_1 (
- .A(\c$3105 ),
- .B(\c$3109 ),
- .CI(\s$3115 ),
- .CON(\con$3576 ),
- .SN(\sn$3578 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_41_2 (
- .A(\s$3119 ),
- .B(\s$3123 ),
- .CI(\s$3127 ),
- .CON(\con$3580 ),
- .SN(\sn$3582 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_42_0 (
- .A(\s$2759 ),
- .B(\c$3113 ),
- .CI(\c$3117 ),
- .CON(\con$3584 ),
- .SN(\sn$3586 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_42_1 (
- .A(\c$3121 ),
- .B(\c$3125 ),
- .CI(\s$3131 ),
- .CON(\con$3588 ),
- .SN(\sn$3590 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_42_2 (
- .A(\s$3135 ),
- .B(\s$3139 ),
- .CI(\s$3143 ),
- .CON(\con$3592 ),
- .SN(\sn$3594 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_43_0 (
- .A(\c$2757 ),
- .B(\c$3129 ),
- .CI(\c$3133 ),
- .CON(\con$3596 ),
- .SN(\sn$3598 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_43_1 (
- .A(\c$3137 ),
- .B(\c$3141 ),
- .CI(\s$3147 ),
- .CON(\con$3600 ),
- .SN(\sn$3602 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_43_2 (
- .A(\s$3151 ),
- .B(\s$3155 ),
- .CI(\s$3159 ),
- .CON(\con$3604 ),
- .SN(\sn$3606 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_44_0 (
- .A(pp_row44_11),
- .B(\c$3145 ),
- .CI(\c$3149 ),
- .CON(\con$3608 ),
- .SN(\sn$3610 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_44_1 (
- .A(\c$3153 ),
- .B(\c$3157 ),
- .CI(\s$3163 ),
- .CON(\con$3612 ),
- .SN(\sn$3614 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_44_2 (
- .A(\s$3167 ),
- .B(\s$3171 ),
- .CI(\s$3175 ),
- .CON(\con$3616 ),
- .SN(\sn$3618 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_45_0 (
- .A(pp_row45_9),
- .B(pp_row45_10),
- .CI(\c$3161 ),
- .CON(\con$3620 ),
- .SN(\sn$3622 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_45_1 (
- .A(\c$3165 ),
- .B(\c$3169 ),
- .CI(\c$3173 ),
- .CON(\con$3624 ),
- .SN(\sn$3626 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_45_2 (
- .A(\s$3179 ),
- .B(\s$3183 ),
- .CI(\s$3187 ),
- .CON(\con$3628 ),
- .SN(\sn$3630 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_46_0 (
- .A(pp_row46_8),
- .B(pp_row46_9),
- .CI(pp_row46_10),
- .CON(\con$3632 ),
- .SN(\sn$3634 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_46_1 (
- .A(\c$3177 ),
- .B(\c$3181 ),
- .CI(\c$3185 ),
- .CON(\con$3636 ),
- .SN(\sn$3638 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_46_2 (
- .A(\s$3191 ),
- .B(\s$3195 ),
- .CI(\s$3199 ),
- .CON(\con$3640 ),
- .SN(\sn$3642 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_47_0 (
- .A(pp_row47_6),
- .B(pp_row47_7),
- .CI(pp_row47_8),
- .CON(\con$3644 ),
- .SN(\sn$3646 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_47_1 (
- .A(pp_row47_9),
- .B(\c$3189 ),
- .CI(\c$3193 ),
- .CON(\con$3648 ),
- .SN(\sn$3650 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_47_2 (
- .A(\c$3197 ),
- .B(\s$3203 ),
- .CI(\s$3207 ),
- .CON(\con$3652 ),
- .SN(\sn$3654 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_48_0 (
- .A(pp_row48_5),
- .B(pp_row48_6),
- .CI(pp_row48_7),
- .CON(\con$3656 ),
- .SN(\sn$3658 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_48_1 (
- .A(pp_row48_8),
- .B(pp_row48_9),
- .CI(\c$3201 ),
- .CON(\con$3660 ),
- .SN(\sn$3662 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_48_2 (
- .A(\c$3205 ),
- .B(\s$3211 ),
- .CI(\s$3215 ),
- .CON(\con$3664 ),
- .SN(\sn$3666 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_49_0 (
- .A(pp_row49_3),
- .B(pp_row49_4),
- .CI(pp_row49_5),
- .CON(\con$3668 ),
- .SN(\sn$3670 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_49_1 (
- .A(pp_row49_6),
- .B(pp_row49_7),
- .CI(pp_row49_8),
- .CON(\con$3672 ),
- .SN(\sn$3674 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_49_2 (
- .A(\c$3209 ),
- .B(\c$3213 ),
- .CI(\s$3219 ),
- .CON(\con$3676 ),
- .SN(\sn$3678 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_50_0 (
- .A(pp_row50_2),
- .B(pp_row50_3),
- .CI(pp_row50_4),
- .CON(\con$3680 ),
- .SN(\sn$3682 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_50_1 (
- .A(pp_row50_5),
- .B(pp_row50_6),
- .CI(pp_row50_7),
- .CON(\con$3684 ),
- .SN(\sn$3686 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_50_2 (
- .A(pp_row50_8),
- .B(\c$3217 ),
- .CI(\s$3223 ),
- .CON(\con$3688 ),
- .SN(\sn$3690 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_51_0 (
- .A(pp_row51_0),
- .B(pp_row51_1),
- .CI(pp_row51_2),
- .CON(\con$3692 ),
- .SN(\sn$3694 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_51_1 (
- .A(pp_row51_3),
- .B(pp_row51_4),
- .CI(pp_row51_5),
- .CON(\con$3696 ),
- .SN(\sn$3698 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_51_2 (
- .A(pp_row51_6),
- .B(pp_row51_7),
- .CI(\c$3221 ),
- .CON(\con$3700 ),
- .SN(\sn$3702 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_52_0 (
- .A(1'h1),
- .B(pp_row52_1),
- .CI(pp_row52_2),
- .CON(\con$3704 ),
- .SN(\sn$3706 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_52_1 (
- .A(pp_row52_3),
- .B(pp_row52_4),
- .CI(pp_row52_5),
- .CON(\con$3708 ),
- .SN(\sn$3710 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_53_0 (
- .A(pp_row53_0),
- .B(pp_row53_1),
- .CI(pp_row53_2),
- .CON(\con$3716 ),
- .SN(\sn$3718 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_53_1 (
- .A(pp_row53_3),
- .B(pp_row53_4),
- .CI(pp_row53_5),
- .CON(\con$3720 ),
- .SN(\sn$3722 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_54_0 (
- .A(1'h1),
- .B(pp_row54_1),
- .CI(pp_row54_2),
- .CON(\con$3724 ),
- .SN(\sn$3726 )
- );
- FAx1_ASAP7_75t_R dadda_fa_2_55_0 (
- .A(pp_row55_0),
- .B(pp_row55_1),
- .CI(pp_row55_2),
- .CON(\con$3732 ),
- .SN(\sn$3734 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_10_0 (
- .A(pp_row10_2),
- .B(pp_row10_3),
- .CI(pp_row10_4),
- .CON(\con$3764 ),
- .SN(\sn$3766 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_10_1 (
- .A(pp_row10_5),
- .B(pp_row10_6),
- .CI(\s$3227 ),
- .CON(\con$3768 ),
- .SN(\sn$3770 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_11_0 (
- .A(pp_row11_2),
- .B(pp_row11_3),
- .CI(pp_row11_4),
- .CON(\con$3772 ),
- .SN(\sn$3774 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_11_1 (
- .A(pp_row11_5),
- .B(\c$3225 ),
- .CI(\s$3231 ),
- .CON(\con$3776 ),
- .SN(\sn$3778 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_12_0 (
- .A(pp_row12_5),
- .B(pp_row12_6),
- .CI(pp_row12_7),
- .CON(\con$3780 ),
- .SN(\sn$3782 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_12_1 (
- .A(\c$3229 ),
- .B(\s$3235 ),
- .CI(\s$3239 ),
- .CON(\con$3784 ),
- .SN(\sn$3786 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_13_0 (
- .A(pp_row13_5),
- .B(pp_row13_6),
- .CI(\c$3233 ),
- .CON(\con$3788 ),
- .SN(\sn$3790 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_13_1 (
- .A(\c$3237 ),
- .B(\s$3243 ),
- .CI(\s$3247 ),
- .CON(\con$3792 ),
- .SN(\sn$3794 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_14_0 (
- .A(pp_row14_8),
- .B(\c$3241 ),
- .CI(\c$3245 ),
- .CON(\con$3796 ),
- .SN(\sn$3798 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_14_1 (
- .A(\s$3251 ),
- .B(\s$3255 ),
- .CI(\s$3259 ),
- .CON(\con$3800 ),
- .SN(\sn$3802 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_15_0 (
- .A(\c$3249 ),
- .B(\c$3253 ),
- .CI(\c$3257 ),
- .CON(\con$3804 ),
- .SN(\sn$3806 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_15_1 (
- .A(\s$3263 ),
- .B(\s$3267 ),
- .CI(\s$3271 ),
- .CON(\con$3808 ),
- .SN(\sn$3810 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_16_0 (
- .A(\c$3261 ),
- .B(\c$3265 ),
- .CI(\c$3269 ),
- .CON(\con$3812 ),
- .SN(\sn$3814 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_16_1 (
- .A(\s$3275 ),
- .B(\s$3279 ),
- .CI(\s$3283 ),
- .CON(\con$3816 ),
- .SN(\sn$3818 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_17_0 (
- .A(\c$3273 ),
- .B(\c$3277 ),
- .CI(\c$3281 ),
- .CON(\con$3820 ),
- .SN(\sn$3822 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_17_1 (
- .A(\s$3287 ),
- .B(\s$3291 ),
- .CI(\s$3295 ),
- .CON(\con$3824 ),
- .SN(\sn$3826 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_18_0 (
- .A(\c$3285 ),
- .B(\c$3289 ),
- .CI(\c$3293 ),
- .CON(\con$3828 ),
- .SN(\sn$3830 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_18_1 (
- .A(\s$3299 ),
- .B(\s$3303 ),
- .CI(\s$3307 ),
- .CON(\con$3832 ),
- .SN(\sn$3834 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_19_0 (
- .A(\c$3297 ),
- .B(\c$3301 ),
- .CI(\c$3305 ),
- .CON(\con$3836 ),
- .SN(\sn$3838 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_19_1 (
- .A(\s$3311 ),
- .B(\s$3315 ),
- .CI(\s$3319 ),
- .CON(\con$3840 ),
- .SN(\sn$3842 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_20_0 (
- .A(\c$3309 ),
- .B(\c$3313 ),
- .CI(\c$3317 ),
- .CON(\con$3844 ),
- .SN(\sn$3846 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_20_1 (
- .A(\s$3323 ),
- .B(\s$3327 ),
- .CI(\s$3331 ),
- .CON(\con$3848 ),
- .SN(\sn$3850 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_21_0 (
- .A(\c$3321 ),
- .B(\c$3325 ),
- .CI(\c$3329 ),
- .CON(\con$3852 ),
- .SN(\sn$3854 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_21_1 (
- .A(\s$3335 ),
- .B(\s$3339 ),
- .CI(\s$3343 ),
- .CON(\con$3856 ),
- .SN(\sn$3858 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_22_0 (
- .A(\c$3333 ),
- .B(\c$3337 ),
- .CI(\c$3341 ),
- .CON(\con$3860 ),
- .SN(\sn$3862 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_22_1 (
- .A(\s$3347 ),
- .B(\s$3351 ),
- .CI(\s$3355 ),
- .CON(\con$3864 ),
- .SN(\sn$3866 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_23_0 (
- .A(\c$3345 ),
- .B(\c$3349 ),
- .CI(\c$3353 ),
- .CON(\con$3868 ),
- .SN(\sn$3870 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_23_1 (
- .A(\s$3359 ),
- .B(\s$3363 ),
- .CI(\s$3367 ),
- .CON(\con$3872 ),
- .SN(\sn$3874 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_24_0 (
- .A(\c$3357 ),
- .B(\c$3361 ),
- .CI(\c$3365 ),
- .CON(\con$3876 ),
- .SN(\sn$3878 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_24_1 (
- .A(\s$3371 ),
- .B(\s$3375 ),
- .CI(\s$3379 ),
- .CON(\con$3880 ),
- .SN(\sn$3882 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_25_0 (
- .A(\c$3369 ),
- .B(\c$3373 ),
- .CI(\c$3377 ),
- .CON(\con$3884 ),
- .SN(\sn$3886 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_25_1 (
- .A(\s$3383 ),
- .B(\s$3387 ),
- .CI(\s$3391 ),
- .CON(\con$3888 ),
- .SN(\sn$3890 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_26_0 (
- .A(\c$3381 ),
- .B(\c$3385 ),
- .CI(\c$3389 ),
- .CON(\con$3892 ),
- .SN(\sn$3894 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_26_1 (
- .A(\s$3395 ),
- .B(\s$3399 ),
- .CI(\s$3403 ),
- .CON(\con$3896 ),
- .SN(\sn$3898 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_27_0 (
- .A(\c$3393 ),
- .B(\c$3397 ),
- .CI(\c$3401 ),
- .CON(\con$3900 ),
- .SN(\sn$3902 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_27_1 (
- .A(\s$3407 ),
- .B(\s$3411 ),
- .CI(\s$3415 ),
- .CON(\con$3904 ),
- .SN(\sn$3906 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_28_0 (
- .A(\c$3405 ),
- .B(\c$3409 ),
- .CI(\c$3413 ),
- .CON(\con$3908 ),
- .SN(\sn$3910 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_28_1 (
- .A(\s$3419 ),
- .B(\s$3423 ),
- .CI(\s$3427 ),
- .CON(\con$3912 ),
- .SN(\sn$3914 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_29_0 (
- .A(\c$3417 ),
- .B(\c$3421 ),
- .CI(\c$3425 ),
- .CON(\con$3916 ),
- .SN(\sn$3918 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_29_1 (
- .A(\s$3431 ),
- .B(\s$3435 ),
- .CI(\s$3439 ),
- .CON(\con$3920 ),
- .SN(\sn$3922 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_30_0 (
- .A(\c$3429 ),
- .B(\c$3433 ),
- .CI(\c$3437 ),
- .CON(\con$3924 ),
- .SN(\sn$3926 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_30_1 (
- .A(\s$3443 ),
- .B(\s$3447 ),
- .CI(\s$3451 ),
- .CON(\con$3928 ),
- .SN(\sn$3930 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_31_0 (
- .A(\c$3441 ),
- .B(\c$3445 ),
- .CI(\c$3449 ),
- .CON(\con$3932 ),
- .SN(\sn$3934 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_31_1 (
- .A(\s$3455 ),
- .B(\s$3459 ),
- .CI(\s$3463 ),
- .CON(\con$3936 ),
- .SN(\sn$3938 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_32_0 (
- .A(\c$3453 ),
- .B(\c$3457 ),
- .CI(\c$3461 ),
- .CON(\con$3940 ),
- .SN(\sn$3942 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_32_1 (
- .A(\s$3467 ),
- .B(\s$3471 ),
- .CI(\s$3475 ),
- .CON(\con$3944 ),
- .SN(\sn$3946 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_33_0 (
- .A(\c$3465 ),
- .B(\c$3469 ),
- .CI(\c$3473 ),
- .CON(\con$3948 ),
- .SN(\sn$3950 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_33_1 (
- .A(\s$3479 ),
- .B(\s$3483 ),
- .CI(\s$3487 ),
- .CON(\con$3952 ),
- .SN(\sn$3954 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_34_0 (
- .A(\c$3477 ),
- .B(\c$3481 ),
- .CI(\c$3485 ),
- .CON(\con$3956 ),
- .SN(\sn$3958 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_34_1 (
- .A(\s$3491 ),
- .B(\s$3495 ),
- .CI(\s$3499 ),
- .CON(\con$3960 ),
- .SN(\sn$3962 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_35_0 (
- .A(\c$3489 ),
- .B(\c$3493 ),
- .CI(\c$3497 ),
- .CON(\con$3964 ),
- .SN(\sn$3966 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_35_1 (
- .A(\s$3503 ),
- .B(\s$3507 ),
- .CI(\s$3511 ),
- .CON(\con$3968 ),
- .SN(\sn$3970 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_36_0 (
- .A(\c$3501 ),
- .B(\c$3505 ),
- .CI(\c$3509 ),
- .CON(\con$3972 ),
- .SN(\sn$3974 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_36_1 (
- .A(\s$3515 ),
- .B(\s$3519 ),
- .CI(\s$3523 ),
- .CON(\con$3976 ),
- .SN(\sn$3978 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_37_0 (
- .A(\c$3513 ),
- .B(\c$3517 ),
- .CI(\c$3521 ),
- .CON(\con$3980 ),
- .SN(\sn$3982 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_37_1 (
- .A(\s$3527 ),
- .B(\s$3531 ),
- .CI(\s$3535 ),
- .CON(\con$3984 ),
- .SN(\sn$3986 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_38_0 (
- .A(\c$3525 ),
- .B(\c$3529 ),
- .CI(\c$3533 ),
- .CON(\con$3988 ),
- .SN(\sn$3990 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_38_1 (
- .A(\s$3539 ),
- .B(\s$3543 ),
- .CI(\s$3547 ),
- .CON(\con$3992 ),
- .SN(\sn$3994 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_39_0 (
- .A(\c$3537 ),
- .B(\c$3541 ),
- .CI(\c$3545 ),
- .CON(\con$3996 ),
- .SN(\sn$3998 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_39_1 (
- .A(\s$3551 ),
- .B(\s$3555 ),
- .CI(\s$3559 ),
- .CON(\con$4000 ),
- .SN(\sn$4002 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_40_0 (
- .A(\c$3549 ),
- .B(\c$3553 ),
- .CI(\c$3557 ),
- .CON(\con$4004 ),
- .SN(\sn$4006 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_40_1 (
- .A(\s$3563 ),
- .B(\s$3567 ),
- .CI(\s$3571 ),
- .CON(\con$4008 ),
- .SN(\sn$4010 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_41_0 (
- .A(\c$3561 ),
- .B(\c$3565 ),
- .CI(\c$3569 ),
- .CON(\con$4012 ),
- .SN(\sn$4014 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_41_1 (
- .A(\s$3575 ),
- .B(\s$3579 ),
- .CI(\s$3583 ),
- .CON(\con$4016 ),
- .SN(\sn$4018 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_42_0 (
- .A(\c$3573 ),
- .B(\c$3577 ),
- .CI(\c$3581 ),
- .CON(\con$4020 ),
- .SN(\sn$4022 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_42_1 (
- .A(\s$3587 ),
- .B(\s$3591 ),
- .CI(\s$3595 ),
- .CON(\con$4024 ),
- .SN(\sn$4026 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_43_0 (
- .A(\c$3585 ),
- .B(\c$3589 ),
- .CI(\c$3593 ),
- .CON(\con$4028 ),
- .SN(\sn$4030 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_43_1 (
- .A(\s$3599 ),
- .B(\s$3603 ),
- .CI(\s$3607 ),
- .CON(\con$4032 ),
- .SN(\sn$4034 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_44_0 (
- .A(\c$3597 ),
- .B(\c$3601 ),
- .CI(\c$3605 ),
- .CON(\con$4036 ),
- .SN(\sn$4038 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_44_1 (
- .A(\s$3611 ),
- .B(\s$3615 ),
- .CI(\s$3619 ),
- .CON(\con$4040 ),
- .SN(\sn$4042 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_45_0 (
- .A(\c$3609 ),
- .B(\c$3613 ),
- .CI(\c$3617 ),
- .CON(\con$4044 ),
- .SN(\sn$4046 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_45_1 (
- .A(\s$3623 ),
- .B(\s$3627 ),
- .CI(\s$3631 ),
- .CON(\con$4048 ),
- .SN(\sn$4050 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_46_0 (
- .A(\c$3621 ),
- .B(\c$3625 ),
- .CI(\c$3629 ),
- .CON(\con$4052 ),
- .SN(\sn$4054 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_46_1 (
- .A(\s$3635 ),
- .B(\s$3639 ),
- .CI(\s$3643 ),
- .CON(\con$4056 ),
- .SN(\sn$4058 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_47_0 (
- .A(\c$3633 ),
- .B(\c$3637 ),
- .CI(\c$3641 ),
- .CON(\con$4060 ),
- .SN(\sn$4062 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_47_1 (
- .A(\s$3647 ),
- .B(\s$3651 ),
- .CI(\s$3655 ),
- .CON(\con$4064 ),
- .SN(\sn$4066 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_48_0 (
- .A(\c$3645 ),
- .B(\c$3649 ),
- .CI(\c$3653 ),
- .CON(\con$4068 ),
- .SN(\sn$4070 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_48_1 (
- .A(\s$3659 ),
- .B(\s$3663 ),
- .CI(\s$3667 ),
- .CON(\con$4072 ),
- .SN(\sn$4074 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_49_0 (
- .A(\c$3657 ),
- .B(\c$3661 ),
- .CI(\c$3665 ),
- .CON(\con$4076 ),
- .SN(\sn$4078 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_49_1 (
- .A(\s$3671 ),
- .B(\s$3675 ),
- .CI(\s$3679 ),
- .CON(\con$4080 ),
- .SN(\sn$4082 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_50_0 (
- .A(\c$3669 ),
- .B(\c$3673 ),
- .CI(\c$3677 ),
- .CON(\con$4084 ),
- .SN(\sn$4086 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_50_1 (
- .A(\s$3683 ),
- .B(\s$3687 ),
- .CI(\s$3691 ),
- .CON(\con$4088 ),
- .SN(\sn$4090 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_51_0 (
- .A(\c$3681 ),
- .B(\c$3685 ),
- .CI(\c$3689 ),
- .CON(\con$4092 ),
- .SN(\sn$4094 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_51_1 (
- .A(\s$3695 ),
- .B(\s$3699 ),
- .CI(\s$3703 ),
- .CON(\con$4096 ),
- .SN(\sn$4098 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_52_0 (
- .A(\c$3693 ),
- .B(\c$3697 ),
- .CI(\c$3701 ),
- .CON(\con$4100 ),
- .SN(\sn$4102 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_52_1 (
- .A(\s$3707 ),
- .B(\s$3711 ),
- .CI(\s$3715 ),
- .CON(\con$4104 ),
- .SN(\sn$4106 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_53_0 (
- .A(pp_row53_6),
- .B(\c$3705 ),
- .CI(\c$3709 ),
- .CON(\con$4108 ),
- .SN(\sn$4110 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_53_1 (
- .A(\c$3713 ),
- .B(\s$3719 ),
- .CI(\s$3723 ),
- .CON(\con$4112 ),
- .SN(\sn$4114 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_54_0 (
- .A(pp_row54_5),
- .B(pp_row54_6),
- .CI(\c$3717 ),
- .CON(\con$4116 ),
- .SN(\sn$4118 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_54_1 (
- .A(\c$3721 ),
- .B(\s$3727 ),
- .CI(\s$3731 ),
- .CON(\con$4120 ),
- .SN(\sn$4122 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_55_0 (
- .A(pp_row55_3),
- .B(pp_row55_4),
- .CI(pp_row55_5),
- .CON(\con$4124 ),
- .SN(\sn$4126 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_55_1 (
- .A(\c$3725 ),
- .B(\c$3729 ),
- .CI(\s$3735 ),
- .CON(\con$4128 ),
- .SN(\sn$4130 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_56_0 (
- .A(pp_row56_2),
- .B(pp_row56_3),
- .CI(pp_row56_4),
- .CON(\con$4132 ),
- .SN(\sn$4134 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_56_1 (
- .A(pp_row56_5),
- .B(\c$3733 ),
- .CI(\s$3739 ),
- .CON(\con$4136 ),
- .SN(\sn$4138 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_57_0 (
- .A(pp_row57_0),
- .B(pp_row57_1),
- .CI(pp_row57_2),
- .CON(\con$4140 ),
- .SN(\sn$4142 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_57_1 (
- .A(pp_row57_3),
- .B(pp_row57_4),
- .CI(\c$3737 ),
- .CON(\con$4144 ),
- .SN(\sn$4146 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_58_0 (
- .A(1'h1),
- .B(pp_row58_1),
- .CI(pp_row58_2),
- .CON(\con$4148 ),
- .SN(\sn$4150 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_59_0 (
- .A(pp_row59_0),
- .B(pp_row59_1),
- .CI(pp_row59_2),
- .CON(\con$4156 ),
- .SN(\sn$4158 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_8_0 (
- .A(pp_row8_0),
- .B(pp_row8_1),
- .CI(pp_row8_2),
- .CON(\con$3748 ),
- .SN(\sn$3750 )
- );
- FAx1_ASAP7_75t_R dadda_fa_3_9_0 (
- .A(pp_row9_0),
- .B(pp_row9_1),
- .CI(pp_row9_2),
- .CON(\con$3756 ),
- .SN(\sn$3758 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_10_0 (
- .A(\c$3757 ),
- .B(\c$3761 ),
- .CI(\s$3767 ),
- .CON(\con$4188 ),
- .SN(\sn$4190 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_11_0 (
- .A(\c$3765 ),
- .B(\c$3769 ),
- .CI(\s$3775 ),
- .CON(\con$4192 ),
- .SN(\sn$4194 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_12_0 (
- .A(\c$3773 ),
- .B(\c$3777 ),
- .CI(\s$3783 ),
- .CON(\con$4196 ),
- .SN(\sn$4198 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_13_0 (
- .A(\c$3781 ),
- .B(\c$3785 ),
- .CI(\s$3791 ),
- .CON(\con$4200 ),
- .SN(\sn$4202 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_14_0 (
- .A(\c$3789 ),
- .B(\c$3793 ),
- .CI(\s$3799 ),
- .CON(\con$4204 ),
- .SN(\sn$4206 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_15_0 (
- .A(\c$3797 ),
- .B(\c$3801 ),
- .CI(\s$3807 ),
- .CON(\con$4208 ),
- .SN(\sn$4210 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_16_0 (
- .A(\c$3805 ),
- .B(\c$3809 ),
- .CI(\s$3815 ),
- .CON(\con$4212 ),
- .SN(\sn$4214 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_17_0 (
- .A(\c$3813 ),
- .B(\c$3817 ),
- .CI(\s$3823 ),
- .CON(\con$4216 ),
- .SN(\sn$4218 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_18_0 (
- .A(\c$3821 ),
- .B(\c$3825 ),
- .CI(\s$3831 ),
- .CON(\con$4220 ),
- .SN(\sn$4222 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_19_0 (
- .A(\c$3829 ),
- .B(\c$3833 ),
- .CI(\s$3839 ),
- .CON(\con$4224 ),
- .SN(\sn$4226 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_20_0 (
- .A(\c$3837 ),
- .B(\c$3841 ),
- .CI(\s$3847 ),
- .CON(\con$4228 ),
- .SN(\sn$4230 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_21_0 (
- .A(\c$3845 ),
- .B(\c$3849 ),
- .CI(\s$3855 ),
- .CON(\con$4232 ),
- .SN(\sn$4234 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_22_0 (
- .A(\c$3853 ),
- .B(\c$3857 ),
- .CI(\s$3863 ),
- .CON(\con$4236 ),
- .SN(\sn$4238 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_23_0 (
- .A(\c$3861 ),
- .B(\c$3865 ),
- .CI(\s$3871 ),
- .CON(\con$4240 ),
- .SN(\sn$4242 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_24_0 (
- .A(\c$3869 ),
- .B(\c$3873 ),
- .CI(\s$3879 ),
- .CON(\con$4244 ),
- .SN(\sn$4246 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_25_0 (
- .A(\c$3877 ),
- .B(\c$3881 ),
- .CI(\s$3887 ),
- .CON(\con$4248 ),
- .SN(\sn$4250 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_26_0 (
- .A(\c$3885 ),
- .B(\c$3889 ),
- .CI(\s$3895 ),
- .CON(\con$4252 ),
- .SN(\sn$4254 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_27_0 (
- .A(\c$3893 ),
- .B(\c$3897 ),
- .CI(\s$3903 ),
- .CON(\con$4256 ),
- .SN(\sn$4258 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_28_0 (
- .A(\c$3901 ),
- .B(\c$3905 ),
- .CI(\s$3911 ),
- .CON(\con$4260 ),
- .SN(\sn$4262 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_29_0 (
- .A(\c$3909 ),
- .B(\c$3913 ),
- .CI(\s$3919 ),
- .CON(\con$4264 ),
- .SN(\sn$4266 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_30_0 (
- .A(\c$3917 ),
- .B(\c$3921 ),
- .CI(\s$3927 ),
- .CON(\con$4268 ),
- .SN(\sn$4270 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_31_0 (
- .A(\c$3925 ),
- .B(\c$3929 ),
- .CI(\s$3935 ),
- .CON(\con$4272 ),
- .SN(\sn$4274 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_32_0 (
- .A(\c$3933 ),
- .B(\c$3937 ),
- .CI(\s$3943 ),
- .CON(\con$4276 ),
- .SN(\sn$4278 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_33_0 (
- .A(\c$3941 ),
- .B(\c$3945 ),
- .CI(\s$3951 ),
- .CON(\con$4280 ),
- .SN(\sn$4282 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_34_0 (
- .A(\c$3949 ),
- .B(\c$3953 ),
- .CI(\s$3959 ),
- .CON(\con$4284 ),
- .SN(\sn$4286 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_35_0 (
- .A(\c$3957 ),
- .B(\c$3961 ),
- .CI(\s$3967 ),
- .CON(\con$4288 ),
- .SN(\sn$4290 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_36_0 (
- .A(\c$3965 ),
- .B(\c$3969 ),
- .CI(\s$3975 ),
- .CON(\con$4292 ),
- .SN(\sn$4294 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_37_0 (
- .A(\c$3973 ),
- .B(\c$3977 ),
- .CI(\s$3983 ),
- .CON(\con$4296 ),
- .SN(\sn$4298 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_38_0 (
- .A(\c$3981 ),
- .B(\c$3985 ),
- .CI(\s$3991 ),
- .CON(\con$4300 ),
- .SN(\sn$4302 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_39_0 (
- .A(\c$3989 ),
- .B(\c$3993 ),
- .CI(\s$3999 ),
- .CON(\con$4304 ),
- .SN(\sn$4306 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_40_0 (
- .A(\c$3997 ),
- .B(\c$4001 ),
- .CI(\s$4007 ),
- .CON(\con$4308 ),
- .SN(\sn$4310 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_41_0 (
- .A(\c$4005 ),
- .B(\c$4009 ),
- .CI(\s$4015 ),
- .CON(\con$4312 ),
- .SN(\sn$4314 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_42_0 (
- .A(\c$4013 ),
- .B(\c$4017 ),
- .CI(\s$4023 ),
- .CON(\con$4316 ),
- .SN(\sn$4318 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_43_0 (
- .A(\c$4021 ),
- .B(\c$4025 ),
- .CI(\s$4031 ),
- .CON(\con$4320 ),
- .SN(\sn$4322 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_44_0 (
- .A(\c$4029 ),
- .B(\c$4033 ),
- .CI(\s$4039 ),
- .CON(\con$4324 ),
- .SN(\sn$4326 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_45_0 (
- .A(\c$4037 ),
- .B(\c$4041 ),
- .CI(\s$4047 ),
- .CON(\con$4328 ),
- .SN(\sn$4330 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_46_0 (
- .A(\c$4045 ),
- .B(\c$4049 ),
- .CI(\s$4055 ),
- .CON(\con$4332 ),
- .SN(\sn$4334 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_47_0 (
- .A(\c$4053 ),
- .B(\c$4057 ),
- .CI(\s$4063 ),
- .CON(\con$4336 ),
- .SN(\sn$4338 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_48_0 (
- .A(\c$4061 ),
- .B(\c$4065 ),
- .CI(\s$4071 ),
- .CON(\con$4340 ),
- .SN(\sn$4342 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_49_0 (
- .A(\c$4069 ),
- .B(\c$4073 ),
- .CI(\s$4079 ),
- .CON(\con$4344 ),
- .SN(\sn$4346 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_50_0 (
- .A(\c$4077 ),
- .B(\c$4081 ),
- .CI(\s$4087 ),
- .CON(\con$4348 ),
- .SN(\sn$4350 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_51_0 (
- .A(\c$4085 ),
- .B(\c$4089 ),
- .CI(\s$4095 ),
- .CON(\con$4352 ),
- .SN(\sn$4354 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_52_0 (
- .A(\c$4093 ),
- .B(\c$4097 ),
- .CI(\s$4103 ),
- .CON(\con$4356 ),
- .SN(\sn$4358 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_53_0 (
- .A(\c$4101 ),
- .B(\c$4105 ),
- .CI(\s$4111 ),
- .CON(\con$4360 ),
- .SN(\sn$4362 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_54_0 (
- .A(\c$4109 ),
- .B(\c$4113 ),
- .CI(\s$4119 ),
- .CON(\con$4364 ),
- .SN(\sn$4366 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_55_0 (
- .A(\c$4117 ),
- .B(\c$4121 ),
- .CI(\s$4127 ),
- .CON(\con$4368 ),
- .SN(\sn$4370 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_56_0 (
- .A(\c$4125 ),
- .B(\c$4129 ),
- .CI(\s$4135 ),
- .CON(\con$4372 ),
- .SN(\sn$4374 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_57_0 (
- .A(\c$4133 ),
- .B(\c$4137 ),
- .CI(\s$4143 ),
- .CON(\con$4376 ),
- .SN(\sn$4378 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_58_0 (
- .A(\c$4141 ),
- .B(\c$4145 ),
- .CI(\s$4151 ),
- .CON(\con$4380 ),
- .SN(\sn$4382 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_59_0 (
- .A(pp_row59_3),
- .B(\c$4149 ),
- .CI(\c$4153 ),
- .CON(\con$4384 ),
- .SN(\sn$4386 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_60_0 (
- .A(pp_row60_2),
- .B(pp_row60_3),
- .CI(\c$4157 ),
- .CON(\con$4388 ),
- .SN(\sn$4390 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_61_0 (
- .A(pp_row61_0),
- .B(pp_row61_1),
- .CI(pp_row61_2),
- .CON(\con$4392 ),
- .SN(\sn$4394 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_6_0 (
- .A(pp_row6_2),
- .B(pp_row6_3),
- .CI(pp_row6_4),
- .CON(\con$4172 ),
- .SN(\sn$4174 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_7_0 (
- .A(pp_row7_2),
- .B(pp_row7_3),
- .CI(\c$3741 ),
- .CON(\con$4176 ),
- .SN(\sn$4178 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_8_0 (
- .A(pp_row8_5),
- .B(\c$3745 ),
- .CI(\s$3751 ),
- .CON(\con$4180 ),
- .SN(\sn$4182 )
- );
- FAx1_ASAP7_75t_R dadda_fa_4_9_0 (
- .A(\c$3749 ),
- .B(\c$3753 ),
- .CI(\s$3759 ),
- .CON(\con$4184 ),
- .SN(\sn$4186 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_10_0 (
- .A(\s$3771 ),
- .B(\c$4185 ),
- .CI(\s$4191 ),
- .CON(\con$4416 ),
- .SN(\sn$4417 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_11_0 (
- .A(\s$3779 ),
- .B(\c$4189 ),
- .CI(\s$4195 ),
- .CON(\con$4418 ),
- .SN(\sn$4419 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_12_0 (
- .A(\s$3787 ),
- .B(\c$4193 ),
- .CI(\s$4199 ),
- .CON(\con$4420 ),
- .SN(\sn$4421 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_13_0 (
- .A(\s$3795 ),
- .B(\c$4197 ),
- .CI(\s$4203 ),
- .CON(\con$4422 ),
- .SN(\sn$4423 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_14_0 (
- .A(\s$3803 ),
- .B(\c$4201 ),
- .CI(\s$4207 ),
- .CON(\con$4424 ),
- .SN(\sn$4425 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_15_0 (
- .A(\s$3811 ),
- .B(\c$4205 ),
- .CI(\s$4211 ),
- .CON(\con$4426 ),
- .SN(\sn$4427 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_16_0 (
- .A(\s$3819 ),
- .B(\c$4209 ),
- .CI(\s$4215 ),
- .CON(\con$4428 ),
- .SN(\sn$4429 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_17_0 (
- .A(\s$3827 ),
- .B(\c$4213 ),
- .CI(\s$4219 ),
- .CON(\con$4430 ),
- .SN(\sn$4431 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_18_0 (
- .A(\s$3835 ),
- .B(\c$4217 ),
- .CI(\s$4223 ),
- .CON(\con$4432 ),
- .SN(\sn$4433 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_19_0 (
- .A(\s$3843 ),
- .B(\c$4221 ),
- .CI(\s$4227 ),
- .CON(\con$4434 ),
- .SN(\sn$4435 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_20_0 (
- .A(\s$3851 ),
- .B(\c$4225 ),
- .CI(\s$4231 ),
- .CON(\con$4436 ),
- .SN(\sn$4437 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_21_0 (
- .A(\s$3859 ),
- .B(\c$4229 ),
- .CI(\s$4235 ),
- .CON(\con$4438 ),
- .SN(\sn$4439 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_22_0 (
- .A(\s$3867 ),
- .B(\c$4233 ),
- .CI(\s$4239 ),
- .CON(\con$4440 ),
- .SN(\sn$4441 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_23_0 (
- .A(\s$3875 ),
- .B(\c$4237 ),
- .CI(\s$4243 ),
- .CON(\con$4442 ),
- .SN(\sn$4443 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_24_0 (
- .A(\s$3883 ),
- .B(\c$4241 ),
- .CI(\s$4247 ),
- .CON(\con$4444 ),
- .SN(\sn$4445 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_25_0 (
- .A(\s$3891 ),
- .B(\c$4245 ),
- .CI(\s$4251 ),
- .CON(\con$4446 ),
- .SN(\sn$4447 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_26_0 (
- .A(\s$3899 ),
- .B(\c$4249 ),
- .CI(\s$4255 ),
- .CON(\con$4448 ),
- .SN(\sn$4449 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_27_0 (
- .A(\s$3907 ),
- .B(\c$4253 ),
- .CI(\s$4259 ),
- .CON(\con$4450 ),
- .SN(\sn$4451 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_28_0 (
- .A(\s$3915 ),
- .B(\c$4257 ),
- .CI(\s$4263 ),
- .CON(\con$4452 ),
- .SN(\sn$4453 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_29_0 (
- .A(\s$3923 ),
- .B(\c$4261 ),
- .CI(\s$4267 ),
- .CON(\con$4454 ),
- .SN(\sn$4455 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_30_0 (
- .A(\s$3931 ),
- .B(\c$4265 ),
- .CI(\s$4271 ),
- .CON(\con$4456 ),
- .SN(\sn$4457 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_31_0 (
- .A(\s$3939 ),
- .B(\c$4269 ),
- .CI(\s$4275 ),
- .CON(\con$4458 ),
- .SN(\sn$4459 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_32_0 (
- .A(\s$3947 ),
- .B(\c$4273 ),
- .CI(\s$4279 ),
- .CON(\con$4460 ),
- .SN(\sn$4461 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_33_0 (
- .A(\s$3955 ),
- .B(\c$4277 ),
- .CI(\s$4283 ),
- .CON(\con$4462 ),
- .SN(\sn$4463 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_34_0 (
- .A(\s$3963 ),
- .B(\c$4281 ),
- .CI(\s$4287 ),
- .CON(\con$4464 ),
- .SN(\sn$4465 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_35_0 (
- .A(\s$3971 ),
- .B(\c$4285 ),
- .CI(\s$4291 ),
- .CON(\con$4466 ),
- .SN(\sn$4467 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_36_0 (
- .A(\s$3979 ),
- .B(\c$4289 ),
- .CI(\s$4295 ),
- .CON(\con$4468 ),
- .SN(\sn$4469 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_37_0 (
- .A(\s$3987 ),
- .B(\c$4293 ),
- .CI(\s$4299 ),
- .CON(\con$4470 ),
- .SN(\sn$4471 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_38_0 (
- .A(\s$3995 ),
- .B(\c$4297 ),
- .CI(\s$4303 ),
- .CON(\con$4472 ),
- .SN(\sn$4473 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_39_0 (
- .A(\s$4003 ),
- .B(\c$4301 ),
- .CI(\s$4307 ),
- .CON(\con$4474 ),
- .SN(\sn$4475 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_40_0 (
- .A(\s$4011 ),
- .B(\c$4305 ),
- .CI(\s$4311 ),
- .CON(\con$4476 ),
- .SN(\sn$4477 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_41_0 (
- .A(\s$4019 ),
- .B(\c$4309 ),
- .CI(\s$4315 ),
- .CON(\con$4478 ),
- .SN(\sn$4479 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_42_0 (
- .A(\s$4027 ),
- .B(\c$4313 ),
- .CI(\s$4319 ),
- .CON(\con$4480 ),
- .SN(\sn$4481 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_43_0 (
- .A(\s$4035 ),
- .B(\c$4317 ),
- .CI(\s$4323 ),
- .CON(\con$4482 ),
- .SN(\sn$4483 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_44_0 (
- .A(\s$4043 ),
- .B(\c$4321 ),
- .CI(\s$4327 ),
- .CON(\con$4484 ),
- .SN(\sn$4485 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_45_0 (
- .A(\s$4051 ),
- .B(\c$4325 ),
- .CI(\s$4331 ),
- .CON(\con$4486 ),
- .SN(\sn$4487 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_46_0 (
- .A(\s$4059 ),
- .B(\c$4329 ),
- .CI(\s$4335 ),
- .CON(\con$4488 ),
- .SN(\sn$4489 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_47_0 (
- .A(\s$4067 ),
- .B(\c$4333 ),
- .CI(\s$4339 ),
- .CON(\con$4490 ),
- .SN(\sn$4491 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_48_0 (
- .A(\s$4075 ),
- .B(\c$4337 ),
- .CI(\s$4343 ),
- .CON(\con$4492 ),
- .SN(\sn$4493 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_49_0 (
- .A(\s$4083 ),
- .B(\c$4341 ),
- .CI(\s$4347 ),
- .CON(\con$4494 ),
- .SN(\sn$4495 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_4_0 (
- .A(pp_row4_2),
- .B(pp_row4_3),
- .CI(\s$4167 ),
- .CON(\con$4404 ),
- .SN(\sn$4405 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_50_0 (
- .A(\s$4091 ),
- .B(\c$4345 ),
- .CI(\s$4351 ),
- .CON(\con$4496 ),
- .SN(\sn$4497 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_51_0 (
- .A(\s$4099 ),
- .B(\c$4349 ),
- .CI(\s$4355 ),
- .CON(\con$4498 ),
- .SN(\sn$4499 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_52_0 (
- .A(\s$4107 ),
- .B(\c$4353 ),
- .CI(\s$4359 ),
- .CON(\con$4500 ),
- .SN(\sn$4501 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_53_0 (
- .A(\s$4115 ),
- .B(\c$4357 ),
- .CI(\s$4363 ),
- .CON(\con$4502 ),
- .SN(\sn$4503 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_54_0 (
- .A(\s$4123 ),
- .B(\c$4361 ),
- .CI(\s$4367 ),
- .CON(\con$4504 ),
- .SN(\sn$4505 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_55_0 (
- .A(\s$4131 ),
- .B(\c$4365 ),
- .CI(\s$4371 ),
- .CON(\con$4506 ),
- .SN(\sn$4507 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_56_0 (
- .A(\s$4139 ),
- .B(\c$4369 ),
- .CI(\s$4375 ),
- .CON(\con$4508 ),
- .SN(\sn$4509 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_57_0 (
- .A(\s$4147 ),
- .B(\c$4373 ),
- .CI(\s$4379 ),
- .CON(\con$4510 ),
- .SN(\sn$4511 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_58_0 (
- .A(\s$4155 ),
- .B(\c$4377 ),
- .CI(\s$4383 ),
- .CON(\con$4512 ),
- .SN(\sn$4513 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_59_0 (
- .A(\s$4159 ),
- .B(\c$4381 ),
- .CI(\s$4387 ),
- .CON(\con$4514 ),
- .SN(\sn$4515 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_5_0 (
- .A(pp_row5_2),
- .B(\c$4165 ),
- .CI(\s$4171 ),
- .CON(\con$4406 ),
- .SN(\sn$4407 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_60_0 (
- .A(\s$4163 ),
- .B(\c$4385 ),
- .CI(\s$4391 ),
- .CON(\con$4516 ),
- .SN(\sn$4517 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_61_0 (
- .A(\c$4161 ),
- .B(\c$4389 ),
- .CI(\s$4395 ),
- .CON(\con$4518 ),
- .SN(\sn$4519 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_62_0 (
- .A(pp_row62_2),
- .B(\c$4393 ),
- .CI(\s$4399 ),
- .CON(\con$4520 ),
- .SN(\sn$4521 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_63_0 (
- .A(pp_row63_0),
- .B(pp_row63_1),
- .CI(\c$4397 ),
- .CON(\con$4522 ),
- .SN(\sn$4523 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_6_0 (
- .A(\s$3743 ),
- .B(\c$4169 ),
- .CI(\s$4175 ),
- .CON(\con$4408 ),
- .SN(\sn$4409 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_7_0 (
- .A(\s$3747 ),
- .B(\c$4173 ),
- .CI(\s$4179 ),
- .CON(\con$4410 ),
- .SN(\sn$4411 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_8_0 (
- .A(\s$3755 ),
- .B(\c$4177 ),
- .CI(\s$4183 ),
- .CON(\con$4412 ),
- .SN(\sn$4413 )
- );
- FAx1_ASAP7_75t_R dadda_fa_5_9_0 (
- .A(\s$3763 ),
- .B(\c$4181 ),
- .CI(\s$4187 ),
- .CON(\con$4414 ),
- .SN(\sn$4415 )
- );
- HAxp5_ASAP7_75t_R dadda_ha_0_24_0 (
- .A(pp_row24_0),
- .B(pp_row24_1),
- .CON(con),
- .SN(sn)
- );
- HAxp5_ASAP7_75t_R dadda_ha_0_25_0 (
- .A(pp_row25_0),
- .B(pp_row25_1),
- .CON(\con$2556 ),
- .SN(\sn$2558 )
- );
- HAxp5_ASAP7_75t_R dadda_ha_0_26_1 (
- .A(pp_row26_3),
- .B(pp_row26_4),
- .CON(\con$2564 ),
- .SN(\sn$2566 )
- );
- HAxp5_ASAP7_75t_R dadda_ha_0_27_1 (
- .A(pp_row27_3),
- .B(pp_row27_4),
- .CON(\con$2572 ),
- .SN(\sn$2574 )
- );
- HAxp5_ASAP7_75t_R dadda_ha_0_28_2 (
- .A(pp_row28_6),
- .B(pp_row28_7),
- .CON(\con$2584 ),
- .SN(\sn$2586 )
- );
- HAxp5_ASAP7_75t_R dadda_ha_0_29_2 (
- .A(pp_row29_6),
- .B(pp_row29_7),
- .CON(\con$2596 ),
- .SN(\sn$2598 )
- );
- HAxp5_ASAP7_75t_R dadda_ha_0_30_3 (
- .A(pp_row30_9),
- .B(pp_row30_10),
- .CON(\con$2612 ),
- .SN(\sn$2614 )
- );
- HAxp5_ASAP7_75t_R dadda_ha_0_31_3 (
- .A(pp_row31_9),
- .B(pp_row31_10),
- .CON(\con$2628 ),
- .SN(\sn$2630 )
- );
- HAxp5_ASAP7_75t_R dadda_ha_0_36_3 (
- .A(pp_row36_9),
- .B(pp_row36_10),
- .CON(\con$2708 ),
- .SN(\sn$2710 )
- );
- HAxp5_ASAP7_75t_R dadda_ha_0_38_2 (
- .A(pp_row38_6),
- .B(pp_row38_7),
- .CON(\con$2732 ),
- .SN(\sn$2734 )
- );
- HAxp5_ASAP7_75t_R dadda_ha_0_40_1 (
- .A(pp_row40_3),
- .B(pp_row40_4),
- .CON(\con$2748 ),
- .SN(\sn$2750 )
- );
- HAxp5_ASAP7_75t_R dadda_ha_0_42_0 (
- .A(1'h1),
- .B(pp_row42_1),
- .CON(\con$2756 ),
- .SN(\sn$2758 )
- );
- HAxp5_ASAP7_75t_R dadda_ha_1_16_0 (
- .A(pp_row16_0),
- .B(pp_row16_1),
- .CON(\con$2760 ),
- .SN(\sn$2762 )
- );
- HAxp5_ASAP7_75t_R dadda_ha_1_17_0 (
- .A(pp_row17_0),
- .B(pp_row17_1),
- .CON(\con$2764 ),
- .SN(\sn$2766 )
- );
- HAxp5_ASAP7_75t_R dadda_ha_1_18_1 (
- .A(pp_row18_3),
- .B(pp_row18_4),
- .CON(\con$2772 ),
- .SN(\sn$2774 )
- );
- HAxp5_ASAP7_75t_R dadda_ha_1_19_1 (
- .A(pp_row19_3),
- .B(pp_row19_4),
- .CON(\con$2780 ),
- .SN(\sn$2782 )
- );
- HAxp5_ASAP7_75t_R dadda_ha_1_20_2 (
- .A(pp_row20_6),
- .B(pp_row20_7),
- .CON(\con$2792 ),
- .SN(\sn$2794 )
- );
- HAxp5_ASAP7_75t_R dadda_ha_1_21_2 (
- .A(pp_row21_6),
- .B(pp_row21_7),
- .CON(\con$2804 ),
- .SN(\sn$2806 )
- );
- HAxp5_ASAP7_75t_R dadda_ha_1_22_3 (
- .A(pp_row22_9),
- .B(pp_row22_10),
- .CON(\con$2820 ),
- .SN(\sn$2822 )
- );
- HAxp5_ASAP7_75t_R dadda_ha_1_23_3 (
- .A(pp_row23_9),
- .B(pp_row23_10),
- .CON(\con$2836 ),
- .SN(\sn$2838 )
- );
- HAxp5_ASAP7_75t_R dadda_ha_1_44_3 (
- .A(pp_row44_9),
- .B(pp_row44_10),
- .CON(\con$3172 ),
- .SN(\sn$3174 )
- );
- HAxp5_ASAP7_75t_R dadda_ha_1_46_2 (
- .A(pp_row46_6),
- .B(pp_row46_7),
- .CON(\con$3196 ),
- .SN(\sn$3198 )
- );
- HAxp5_ASAP7_75t_R dadda_ha_1_48_1 (
- .A(pp_row48_3),
- .B(pp_row48_4),
- .CON(\con$3212 ),
- .SN(\sn$3214 )
- );
- HAxp5_ASAP7_75t_R dadda_ha_1_50_0 (
- .A(1'h1),
- .B(pp_row50_1),
- .CON(\con$3220 ),
- .SN(\sn$3222 )
- );
- HAxp5_ASAP7_75t_R dadda_ha_2_10_0 (
- .A(pp_row10_0),
- .B(pp_row10_1),
- .CON(\con$3224 ),
- .SN(\sn$3226 )
- );
- HAxp5_ASAP7_75t_R dadda_ha_2_11_0 (
- .A(pp_row11_0),
- .B(pp_row11_1),
- .CON(\con$3228 ),
- .SN(\sn$3230 )
- );
- HAxp5_ASAP7_75t_R dadda_ha_2_12_1 (
- .A(pp_row12_3),
- .B(pp_row12_4),
- .CON(\con$3236 ),
- .SN(\sn$3238 )
- );
- HAxp5_ASAP7_75t_R dadda_ha_2_13_1 (
- .A(pp_row13_3),
- .B(pp_row13_4),
- .CON(\con$3244 ),
- .SN(\sn$3246 )
- );
- HAxp5_ASAP7_75t_R dadda_ha_2_14_2 (
- .A(pp_row14_6),
- .B(pp_row14_7),
- .CON(\con$3256 ),
- .SN(\sn$3258 )
- );
- HAxp5_ASAP7_75t_R dadda_ha_2_15_2 (
- .A(pp_row15_6),
- .B(pp_row15_7),
- .CON(\con$3268 ),
- .SN(\sn$3270 )
- );
- HAxp5_ASAP7_75t_R dadda_ha_2_52_2 (
- .A(pp_row52_6),
- .B(pp_row52_7),
- .CON(\con$3712 ),
- .SN(\sn$3714 )
- );
- HAxp5_ASAP7_75t_R dadda_ha_2_54_1 (
- .A(pp_row54_3),
- .B(pp_row54_4),
- .CON(\con$3728 ),
- .SN(\sn$3730 )
- );
- HAxp5_ASAP7_75t_R dadda_ha_2_56_0 (
- .A(1'h1),
- .B(pp_row56_1),
- .CON(\con$3736 ),
- .SN(\sn$3738 )
- );
- HAxp5_ASAP7_75t_R dadda_ha_3_58_1 (
- .A(pp_row58_3),
- .B(pp_row58_4),
- .CON(\con$4152 ),
- .SN(\sn$4154 )
- );
- HAxp5_ASAP7_75t_R dadda_ha_3_60_0 (
- .A(1'h1),
- .B(pp_row60_1),
- .CON(\con$4160 ),
- .SN(\sn$4162 )
- );
- HAxp5_ASAP7_75t_R dadda_ha_3_6_0 (
- .A(pp_row6_0),
- .B(pp_row6_1),
- .CON(\con$3740 ),
- .SN(\sn$3742 )
- );
- HAxp5_ASAP7_75t_R dadda_ha_3_7_0 (
- .A(pp_row7_0),
- .B(pp_row7_1),
- .CON(\con$3744 ),
- .SN(\sn$3746 )
- );
- HAxp5_ASAP7_75t_R dadda_ha_3_8_1 (
- .A(pp_row8_3),
- .B(pp_row8_4),
- .CON(\con$3752 ),
- .SN(\sn$3754 )
- );
- HAxp5_ASAP7_75t_R dadda_ha_3_9_1 (
- .A(pp_row9_3),
- .B(pp_row9_4),
- .CON(\con$3760 ),
- .SN(\sn$3762 )
- );
- HAxp5_ASAP7_75t_R dadda_ha_4_4_0 (
- .A(pp_row4_0),
- .B(pp_row4_1),
- .CON(\con$4164 ),
- .SN(\sn$4166 )
- );
- HAxp5_ASAP7_75t_R dadda_ha_4_5_0 (
- .A(pp_row5_0),
- .B(pp_row5_1),
- .CON(\con$4168 ),
- .SN(\sn$4170 )
- );
- HAxp5_ASAP7_75t_R dadda_ha_4_62_0 (
- .A(1'h1),
- .B(pp_row62_1),
- .CON(\con$4396 ),
- .SN(\sn$4398 )
- );
- HAxp5_ASAP7_75t_R dadda_ha_5_2_0 (
- .A(pp_row2_0),
- .B(pp_row2_1),
- .CON(\con$4400 ),
- .SN(\sn$4401 )
- );
- HAxp5_ASAP7_75t_R dadda_ha_5_3_0 (
- .A(pp_row3_0),
- .B(pp_row3_1),
- .CON(\con$4402 ),
- .SN(\sn$4403 )
- );
- HAxp5_ASAP7_75t_R dadda_ha_5_64_0 (
- .A(1'h1),
- .B(pp_row64_1),
- .CON(\con$4524 ),
- .SN(\sn$4525 )
- );
- \multiplier.final_adder final_adder (
- .a(final_a_registered),
- .b(final_b_registered),
- .\port$901$0 (\$54 ),
- .\port$902$0 (\$55 ),
- .\port$903$0 (\$56 ),
- .\port$904$0 (\$57 ),
- .\port$905$0 (\$58 ),
- .\port$906$0 (\$59 ),
- .\port$907$0 (\$60 ),
- .\port$908$0 (\$61 ),
- .\port$909$0 (\$62 ),
- .\port$910$0 (\$63 ),
- .\port$911$0 (\$64 ),
- .\port$912$0 (\$65 ),
- .\port$913$0 (\$66 ),
- .\port$914$0 (\$67 ),
- .\port$915$0 (\$68 ),
- .\port$916$0 (\$69 ),
- .\port$917$0 (\$70 ),
- .\port$918$0 (\$71 ),
- .\port$919$0 (\$72 ),
- .\port$920$0 (\$73 ),
- .\port$921$0 (\$74 ),
- .\port$922$0 (\$75 ),
- .\port$923$0 (\$76 ),
- .\port$924$0 (\$77 ),
- .\port$925$0 (\$78 ),
- .\port$926$0 (\$79 ),
- .\port$927$0 (\$80 ),
- .\port$928$0 (\$81 ),
- .\port$929$0 (\$82 ),
- .\port$930$0 (\$83 ),
- .\port$931$0 (\$84 ),
- .\port$932$0 (\$85 ),
- .\port$933$0 (\$86 ),
- .\port$934$0 (\$87 ),
- .\port$935$0 (\$88 ),
- .\port$936$0 (\$89 ),
- .\port$937$0 (\$90 ),
- .\port$938$0 (\$91 ),
- .\port$939$0 (\$92 ),
- .\port$940$0 (\$93 ),
- .\port$941$0 (\$94 ),
- .\port$942$0 (\$95 ),
- .\port$943$0 (\$96 ),
- .\port$944$0 (\$97 ),
- .\port$945$0 (\$98 ),
- .\port$946$0 (\$99 ),
- .\port$947$0 (\$100 ),
- .\port$948$0 (\$101 ),
- .\port$949$0 (\$102 ),
- .\port$950$0 (\$103 ),
- .\port$951$0 (\$104 ),
- .\port$952$0 (\$105 ),
- .\port$953$0 (\$106 ),
- .\port$954$0 (\$107 ),
- .\port$955$0 (\$108 ),
- .\port$956$0 (\$109 ),
- .\port$957$0 (\$110 ),
- .\port$958$0 (\$111 ),
- .\port$959$0 (\$112 ),
- .\port$960$0 (\$113 ),
- .\port$961$0 (\$114 ),
- .\port$962$0 (\$115 ),
- .\port$963$0 (\$116 ),
- .\port$964$0 (\$117 )
- );
- assign booth_block0_sign = a_registered[1];
- assign booth_block2_sign = a_registered[3];
- assign booth_block4_sign = a_registered[5];
- assign booth_block6_sign = a_registered[7];
- assign booth_block8_sign = a_registered[9];
- assign booth_block10_sign = a_registered[11];
- assign booth_block12_sign = a_registered[13];
- assign booth_block14_sign = a_registered[15];
- assign booth_block16_sign = a_registered[17];
- assign booth_block18_sign = a_registered[19];
- assign booth_block20_sign = a_registered[21];
- assign booth_block22_sign = a_registered[23];
- assign booth_block24_sign = a_registered[25];
- assign booth_block26_sign = a_registered[27];
- assign booth_block28_sign = a_registered[29];
- assign booth_block30_sign = a_registered[31];
- assign result_registered = o;
- assign result = { \$117 , \$116 , \$115 , \$114 , \$113 , \$112 , \$111 , \$110 , \$109 , \$108 , \$107 , \$106 , \$105 , \$104 , \$103 , \$102 , \$101 , \$100 , \$99 , \$98 , \$97 , \$96 , \$95 , \$94 , \$93 , \$92 , \$91 , \$90 , \$89 , \$88 , \$87 , \$86 , \$85 , \$84 , \$83 , \$82 , \$81 , \$80 , \$79 , \$78 , \$77 , \$76 , \$75 , \$74 , \$73 , \$72 , \$71 , \$70 , \$69 , \$68 , \$67 , \$66 , \$65 , \$64 , \$63 , \$62 , \$61 , \$60 , \$59 , \$58 , \$57 , \$56 , \$55 , \$54 };
- assign multiplier = { 2'h0, a_registered, 1'h0 };
- assign multiplicand = { 1'h0, b_registered, 1'h0 };
- assign booth_block0 = { a_registered[1:0], 1'h0 };
- assign booth_block0_sel = { sel_1, sel_0 };
- assign booth_block0_mand0 = { b_registered[0], 1'h0 };
- assign booth_block0_mand1 = b_registered[1:0];
- assign booth_block0_mand2 = b_registered[2:1];
- assign booth_block0_mand3 = b_registered[3:2];
- assign booth_block0_mand4 = b_registered[4:3];
- assign booth_block0_mand5 = b_registered[5:4];
- assign booth_block0_mand6 = b_registered[6:5];
- assign booth_block0_mand7 = b_registered[7:6];
- assign booth_block0_mand8 = b_registered[8:7];
- assign booth_block0_mand9 = b_registered[9:8];
- assign booth_block0_mand10 = b_registered[10:9];
- assign booth_block0_mand11 = b_registered[11:10];
- assign booth_block0_mand12 = b_registered[12:11];
- assign booth_block0_mand13 = b_registered[13:12];
- assign booth_block0_mand14 = b_registered[14:13];
- assign booth_block0_mand15 = b_registered[15:14];
- assign booth_block0_mand16 = b_registered[16:15];
- assign booth_block0_mand17 = b_registered[17:16];
- assign booth_block0_mand18 = b_registered[18:17];
- assign booth_block0_mand19 = b_registered[19:18];
- assign booth_block0_mand20 = b_registered[20:19];
- assign booth_block0_mand21 = b_registered[21:20];
- assign booth_block0_mand22 = b_registered[22:21];
- assign booth_block0_mand23 = b_registered[23:22];
- assign booth_block0_mand24 = b_registered[24:23];
- assign booth_block0_mand25 = b_registered[25:24];
- assign booth_block0_mand26 = b_registered[26:25];
- assign booth_block0_mand27 = b_registered[27:26];
- assign booth_block0_mand28 = b_registered[28:27];
- assign booth_block0_mand29 = b_registered[29:28];
- assign booth_block0_mand30 = b_registered[30:29];
- assign booth_block0_mand31 = b_registered[31:30];
- assign booth_block0_mand32 = { 1'h0, b_registered[31] };
- assign booth_block2 = a_registered[3:1];
- assign booth_block2_sel = { \sel_1$1366 , \sel_0$1365 };
- assign booth_block2_mand0 = { b_registered[0], 1'h0 };
- assign booth_block2_mand1 = b_registered[1:0];
- assign booth_block2_mand2 = b_registered[2:1];
- assign booth_block2_mand3 = b_registered[3:2];
- assign booth_block2_mand4 = b_registered[4:3];
- assign booth_block2_mand5 = b_registered[5:4];
- assign booth_block2_mand6 = b_registered[6:5];
- assign booth_block2_mand7 = b_registered[7:6];
- assign booth_block2_mand8 = b_registered[8:7];
- assign booth_block2_mand9 = b_registered[9:8];
- assign booth_block2_mand10 = b_registered[10:9];
- assign booth_block2_mand11 = b_registered[11:10];
- assign booth_block2_mand12 = b_registered[12:11];
- assign booth_block2_mand13 = b_registered[13:12];
- assign booth_block2_mand14 = b_registered[14:13];
- assign booth_block2_mand15 = b_registered[15:14];
- assign booth_block2_mand16 = b_registered[16:15];
- assign booth_block2_mand17 = b_registered[17:16];
- assign booth_block2_mand18 = b_registered[18:17];
- assign booth_block2_mand19 = b_registered[19:18];
- assign booth_block2_mand20 = b_registered[20:19];
- assign booth_block2_mand21 = b_registered[21:20];
- assign booth_block2_mand22 = b_registered[22:21];
- assign booth_block2_mand23 = b_registered[23:22];
- assign booth_block2_mand24 = b_registered[24:23];
- assign booth_block2_mand25 = b_registered[25:24];
- assign booth_block2_mand26 = b_registered[26:25];
- assign booth_block2_mand27 = b_registered[27:26];
- assign booth_block2_mand28 = b_registered[28:27];
- assign booth_block2_mand29 = b_registered[29:28];
- assign booth_block2_mand30 = b_registered[30:29];
- assign booth_block2_mand31 = b_registered[31:30];
- assign booth_block2_mand32 = { 1'h0, b_registered[31] };
- assign booth_block4 = a_registered[5:3];
- assign booth_block4_sel = { \sel_1$1403 , \sel_0$1402 };
- assign booth_block4_mand0 = { b_registered[0], 1'h0 };
- assign booth_block4_mand1 = b_registered[1:0];
- assign booth_block4_mand2 = b_registered[2:1];
- assign booth_block4_mand3 = b_registered[3:2];
- assign booth_block4_mand4 = b_registered[4:3];
- assign booth_block4_mand5 = b_registered[5:4];
- assign booth_block4_mand6 = b_registered[6:5];
- assign booth_block4_mand7 = b_registered[7:6];
- assign booth_block4_mand8 = b_registered[8:7];
- assign booth_block4_mand9 = b_registered[9:8];
- assign booth_block4_mand10 = b_registered[10:9];
- assign booth_block4_mand11 = b_registered[11:10];
- assign booth_block4_mand12 = b_registered[12:11];
- assign booth_block4_mand13 = b_registered[13:12];
- assign booth_block4_mand14 = b_registered[14:13];
- assign booth_block4_mand15 = b_registered[15:14];
- assign booth_block4_mand16 = b_registered[16:15];
- assign booth_block4_mand17 = b_registered[17:16];
- assign booth_block4_mand18 = b_registered[18:17];
- assign booth_block4_mand19 = b_registered[19:18];
- assign booth_block4_mand20 = b_registered[20:19];
- assign booth_block4_mand21 = b_registered[21:20];
- assign booth_block4_mand22 = b_registered[22:21];
- assign booth_block4_mand23 = b_registered[23:22];
- assign booth_block4_mand24 = b_registered[24:23];
- assign booth_block4_mand25 = b_registered[25:24];
- assign booth_block4_mand26 = b_registered[26:25];
- assign booth_block4_mand27 = b_registered[27:26];
- assign booth_block4_mand28 = b_registered[28:27];
- assign booth_block4_mand29 = b_registered[29:28];
- assign booth_block4_mand30 = b_registered[30:29];
- assign booth_block4_mand31 = b_registered[31:30];
- assign booth_block4_mand32 = { 1'h0, b_registered[31] };
- assign booth_block6 = a_registered[7:5];
- assign booth_block6_sel = { \sel_1$1440 , \sel_0$1439 };
- assign booth_block6_mand0 = { b_registered[0], 1'h0 };
- assign booth_block6_mand1 = b_registered[1:0];
- assign booth_block6_mand2 = b_registered[2:1];
- assign booth_block6_mand3 = b_registered[3:2];
- assign booth_block6_mand4 = b_registered[4:3];
- assign booth_block6_mand5 = b_registered[5:4];
- assign booth_block6_mand6 = b_registered[6:5];
- assign booth_block6_mand7 = b_registered[7:6];
- assign booth_block6_mand8 = b_registered[8:7];
- assign booth_block6_mand9 = b_registered[9:8];
- assign booth_block6_mand10 = b_registered[10:9];
- assign booth_block6_mand11 = b_registered[11:10];
- assign booth_block6_mand12 = b_registered[12:11];
- assign booth_block6_mand13 = b_registered[13:12];
- assign booth_block6_mand14 = b_registered[14:13];
- assign booth_block6_mand15 = b_registered[15:14];
- assign booth_block6_mand16 = b_registered[16:15];
- assign booth_block6_mand17 = b_registered[17:16];
- assign booth_block6_mand18 = b_registered[18:17];
- assign booth_block6_mand19 = b_registered[19:18];
- assign booth_block6_mand20 = b_registered[20:19];
- assign booth_block6_mand21 = b_registered[21:20];
- assign booth_block6_mand22 = b_registered[22:21];
- assign booth_block6_mand23 = b_registered[23:22];
- assign booth_block6_mand24 = b_registered[24:23];
- assign booth_block6_mand25 = b_registered[25:24];
- assign booth_block6_mand26 = b_registered[26:25];
- assign booth_block6_mand27 = b_registered[27:26];
- assign booth_block6_mand28 = b_registered[28:27];
- assign booth_block6_mand29 = b_registered[29:28];
- assign booth_block6_mand30 = b_registered[30:29];
- assign booth_block6_mand31 = b_registered[31:30];
- assign booth_block6_mand32 = { 1'h0, b_registered[31] };
- assign booth_block8 = a_registered[9:7];
- assign booth_block8_sel = { \sel_1$1477 , \sel_0$1476 };
- assign booth_block8_mand0 = { b_registered[0], 1'h0 };
- assign booth_block8_mand1 = b_registered[1:0];
- assign booth_block8_mand2 = b_registered[2:1];
- assign booth_block8_mand3 = b_registered[3:2];
- assign booth_block8_mand4 = b_registered[4:3];
- assign booth_block8_mand5 = b_registered[5:4];
- assign booth_block8_mand6 = b_registered[6:5];
- assign booth_block8_mand7 = b_registered[7:6];
- assign booth_block8_mand8 = b_registered[8:7];
- assign booth_block8_mand9 = b_registered[9:8];
- assign booth_block8_mand10 = b_registered[10:9];
- assign booth_block8_mand11 = b_registered[11:10];
- assign booth_block8_mand12 = b_registered[12:11];
- assign booth_block8_mand13 = b_registered[13:12];
- assign booth_block8_mand14 = b_registered[14:13];
- assign booth_block8_mand15 = b_registered[15:14];
- assign booth_block8_mand16 = b_registered[16:15];
- assign booth_block8_mand17 = b_registered[17:16];
- assign booth_block8_mand18 = b_registered[18:17];
- assign booth_block8_mand19 = b_registered[19:18];
- assign booth_block8_mand20 = b_registered[20:19];
- assign booth_block8_mand21 = b_registered[21:20];
- assign booth_block8_mand22 = b_registered[22:21];
- assign booth_block8_mand23 = b_registered[23:22];
- assign booth_block8_mand24 = b_registered[24:23];
- assign booth_block8_mand25 = b_registered[25:24];
- assign booth_block8_mand26 = b_registered[26:25];
- assign booth_block8_mand27 = b_registered[27:26];
- assign booth_block8_mand28 = b_registered[28:27];
- assign booth_block8_mand29 = b_registered[29:28];
- assign booth_block8_mand30 = b_registered[30:29];
- assign booth_block8_mand31 = b_registered[31:30];
- assign booth_block8_mand32 = { 1'h0, b_registered[31] };
- assign booth_block10 = a_registered[11:9];
- assign booth_block10_sel = { \sel_1$1514 , \sel_0$1513 };
- assign booth_block10_mand0 = { b_registered[0], 1'h0 };
- assign booth_block10_mand1 = b_registered[1:0];
- assign booth_block10_mand2 = b_registered[2:1];
- assign booth_block10_mand3 = b_registered[3:2];
- assign booth_block10_mand4 = b_registered[4:3];
- assign booth_block10_mand5 = b_registered[5:4];
- assign booth_block10_mand6 = b_registered[6:5];
- assign booth_block10_mand7 = b_registered[7:6];
- assign booth_block10_mand8 = b_registered[8:7];
- assign booth_block10_mand9 = b_registered[9:8];
- assign booth_block10_mand10 = b_registered[10:9];
- assign booth_block10_mand11 = b_registered[11:10];
- assign booth_block10_mand12 = b_registered[12:11];
- assign booth_block10_mand13 = b_registered[13:12];
- assign booth_block10_mand14 = b_registered[14:13];
- assign booth_block10_mand15 = b_registered[15:14];
- assign booth_block10_mand16 = b_registered[16:15];
- assign booth_block10_mand17 = b_registered[17:16];
- assign booth_block10_mand18 = b_registered[18:17];
- assign booth_block10_mand19 = b_registered[19:18];
- assign booth_block10_mand20 = b_registered[20:19];
- assign booth_block10_mand21 = b_registered[21:20];
- assign booth_block10_mand22 = b_registered[22:21];
- assign booth_block10_mand23 = b_registered[23:22];
- assign booth_block10_mand24 = b_registered[24:23];
- assign booth_block10_mand25 = b_registered[25:24];
- assign booth_block10_mand26 = b_registered[26:25];
- assign booth_block10_mand27 = b_registered[27:26];
- assign booth_block10_mand28 = b_registered[28:27];
- assign booth_block10_mand29 = b_registered[29:28];
- assign booth_block10_mand30 = b_registered[30:29];
- assign booth_block10_mand31 = b_registered[31:30];
- assign booth_block10_mand32 = { 1'h0, b_registered[31] };
- assign booth_block12 = a_registered[13:11];
- assign booth_block12_sel = { \sel_1$1551 , \sel_0$1550 };
- assign booth_block12_mand0 = { b_registered[0], 1'h0 };
- assign booth_block12_mand1 = b_registered[1:0];
- assign booth_block12_mand2 = b_registered[2:1];
- assign booth_block12_mand3 = b_registered[3:2];
- assign booth_block12_mand4 = b_registered[4:3];
- assign booth_block12_mand5 = b_registered[5:4];
- assign booth_block12_mand6 = b_registered[6:5];
- assign booth_block12_mand7 = b_registered[7:6];
- assign booth_block12_mand8 = b_registered[8:7];
- assign booth_block12_mand9 = b_registered[9:8];
- assign booth_block12_mand10 = b_registered[10:9];
- assign booth_block12_mand11 = b_registered[11:10];
- assign booth_block12_mand12 = b_registered[12:11];
- assign booth_block12_mand13 = b_registered[13:12];
- assign booth_block12_mand14 = b_registered[14:13];
- assign booth_block12_mand15 = b_registered[15:14];
- assign booth_block12_mand16 = b_registered[16:15];
- assign booth_block12_mand17 = b_registered[17:16];
- assign booth_block12_mand18 = b_registered[18:17];
- assign booth_block12_mand19 = b_registered[19:18];
- assign booth_block12_mand20 = b_registered[20:19];
- assign booth_block12_mand21 = b_registered[21:20];
- assign booth_block12_mand22 = b_registered[22:21];
- assign booth_block12_mand23 = b_registered[23:22];
- assign booth_block12_mand24 = b_registered[24:23];
- assign booth_block12_mand25 = b_registered[25:24];
- assign booth_block12_mand26 = b_registered[26:25];
- assign booth_block12_mand27 = b_registered[27:26];
- assign booth_block12_mand28 = b_registered[28:27];
- assign booth_block12_mand29 = b_registered[29:28];
- assign booth_block12_mand30 = b_registered[30:29];
- assign booth_block12_mand31 = b_registered[31:30];
- assign booth_block12_mand32 = { 1'h0, b_registered[31] };
- assign booth_block14 = a_registered[15:13];
- assign booth_block14_sel = { \sel_1$1588 , \sel_0$1587 };
- assign booth_block14_mand0 = { b_registered[0], 1'h0 };
- assign booth_block14_mand1 = b_registered[1:0];
- assign booth_block14_mand2 = b_registered[2:1];
- assign booth_block14_mand3 = b_registered[3:2];
- assign booth_block14_mand4 = b_registered[4:3];
- assign booth_block14_mand5 = b_registered[5:4];
- assign booth_block14_mand6 = b_registered[6:5];
- assign booth_block14_mand7 = b_registered[7:6];
- assign booth_block14_mand8 = b_registered[8:7];
- assign booth_block14_mand9 = b_registered[9:8];
- assign booth_block14_mand10 = b_registered[10:9];
- assign booth_block14_mand11 = b_registered[11:10];
- assign booth_block14_mand12 = b_registered[12:11];
- assign booth_block14_mand13 = b_registered[13:12];
- assign booth_block14_mand14 = b_registered[14:13];
- assign booth_block14_mand15 = b_registered[15:14];
- assign booth_block14_mand16 = b_registered[16:15];
- assign booth_block14_mand17 = b_registered[17:16];
- assign booth_block14_mand18 = b_registered[18:17];
- assign booth_block14_mand19 = b_registered[19:18];
- assign booth_block14_mand20 = b_registered[20:19];
- assign booth_block14_mand21 = b_registered[21:20];
- assign booth_block14_mand22 = b_registered[22:21];
- assign booth_block14_mand23 = b_registered[23:22];
- assign booth_block14_mand24 = b_registered[24:23];
- assign booth_block14_mand25 = b_registered[25:24];
- assign booth_block14_mand26 = b_registered[26:25];
- assign booth_block14_mand27 = b_registered[27:26];
- assign booth_block14_mand28 = b_registered[28:27];
- assign booth_block14_mand29 = b_registered[29:28];
- assign booth_block14_mand30 = b_registered[30:29];
- assign booth_block14_mand31 = b_registered[31:30];
- assign booth_block14_mand32 = { 1'h0, b_registered[31] };
- assign booth_block16 = a_registered[17:15];
- assign booth_block16_sel = { \sel_1$1625 , \sel_0$1624 };
- assign booth_block16_mand0 = { b_registered[0], 1'h0 };
- assign booth_block16_mand1 = b_registered[1:0];
- assign booth_block16_mand2 = b_registered[2:1];
- assign booth_block16_mand3 = b_registered[3:2];
- assign booth_block16_mand4 = b_registered[4:3];
- assign booth_block16_mand5 = b_registered[5:4];
- assign booth_block16_mand6 = b_registered[6:5];
- assign booth_block16_mand7 = b_registered[7:6];
- assign booth_block16_mand8 = b_registered[8:7];
- assign booth_block16_mand9 = b_registered[9:8];
- assign booth_block16_mand10 = b_registered[10:9];
- assign booth_block16_mand11 = b_registered[11:10];
- assign booth_block16_mand12 = b_registered[12:11];
- assign booth_block16_mand13 = b_registered[13:12];
- assign booth_block16_mand14 = b_registered[14:13];
- assign booth_block16_mand15 = b_registered[15:14];
- assign booth_block16_mand16 = b_registered[16:15];
- assign booth_block16_mand17 = b_registered[17:16];
- assign booth_block16_mand18 = b_registered[18:17];
- assign booth_block16_mand19 = b_registered[19:18];
- assign booth_block16_mand20 = b_registered[20:19];
- assign booth_block16_mand21 = b_registered[21:20];
- assign booth_block16_mand22 = b_registered[22:21];
- assign booth_block16_mand23 = b_registered[23:22];
- assign booth_block16_mand24 = b_registered[24:23];
- assign booth_block16_mand25 = b_registered[25:24];
- assign booth_block16_mand26 = b_registered[26:25];
- assign booth_block16_mand27 = b_registered[27:26];
- assign booth_block16_mand28 = b_registered[28:27];
- assign booth_block16_mand29 = b_registered[29:28];
- assign booth_block16_mand30 = b_registered[30:29];
- assign booth_block16_mand31 = b_registered[31:30];
- assign booth_block16_mand32 = { 1'h0, b_registered[31] };
- assign booth_block18 = a_registered[19:17];
- assign booth_block18_sel = { \sel_1$1662 , \sel_0$1661 };
- assign booth_block18_mand0 = { b_registered[0], 1'h0 };
- assign booth_block18_mand1 = b_registered[1:0];
- assign booth_block18_mand2 = b_registered[2:1];
- assign booth_block18_mand3 = b_registered[3:2];
- assign booth_block18_mand4 = b_registered[4:3];
- assign booth_block18_mand5 = b_registered[5:4];
- assign booth_block18_mand6 = b_registered[6:5];
- assign booth_block18_mand7 = b_registered[7:6];
- assign booth_block18_mand8 = b_registered[8:7];
- assign booth_block18_mand9 = b_registered[9:8];
- assign booth_block18_mand10 = b_registered[10:9];
- assign booth_block18_mand11 = b_registered[11:10];
- assign booth_block18_mand12 = b_registered[12:11];
- assign booth_block18_mand13 = b_registered[13:12];
- assign booth_block18_mand14 = b_registered[14:13];
- assign booth_block18_mand15 = b_registered[15:14];
- assign booth_block18_mand16 = b_registered[16:15];
- assign booth_block18_mand17 = b_registered[17:16];
- assign booth_block18_mand18 = b_registered[18:17];
- assign booth_block18_mand19 = b_registered[19:18];
- assign booth_block18_mand20 = b_registered[20:19];
- assign booth_block18_mand21 = b_registered[21:20];
- assign booth_block18_mand22 = b_registered[22:21];
- assign booth_block18_mand23 = b_registered[23:22];
- assign booth_block18_mand24 = b_registered[24:23];
- assign booth_block18_mand25 = b_registered[25:24];
- assign booth_block18_mand26 = b_registered[26:25];
- assign booth_block18_mand27 = b_registered[27:26];
- assign booth_block18_mand28 = b_registered[28:27];
- assign booth_block18_mand29 = b_registered[29:28];
- assign booth_block18_mand30 = b_registered[30:29];
- assign booth_block18_mand31 = b_registered[31:30];
- assign booth_block18_mand32 = { 1'h0, b_registered[31] };
- assign booth_block20 = a_registered[21:19];
- assign booth_block20_sel = { \sel_1$1699 , \sel_0$1698 };
- assign booth_block20_mand0 = { b_registered[0], 1'h0 };
- assign booth_block20_mand1 = b_registered[1:0];
- assign booth_block20_mand2 = b_registered[2:1];
- assign booth_block20_mand3 = b_registered[3:2];
- assign booth_block20_mand4 = b_registered[4:3];
- assign booth_block20_mand5 = b_registered[5:4];
- assign booth_block20_mand6 = b_registered[6:5];
- assign booth_block20_mand7 = b_registered[7:6];
- assign booth_block20_mand8 = b_registered[8:7];
- assign booth_block20_mand9 = b_registered[9:8];
- assign booth_block20_mand10 = b_registered[10:9];
- assign booth_block20_mand11 = b_registered[11:10];
- assign booth_block20_mand12 = b_registered[12:11];
- assign booth_block20_mand13 = b_registered[13:12];
- assign booth_block20_mand14 = b_registered[14:13];
- assign booth_block20_mand15 = b_registered[15:14];
- assign booth_block20_mand16 = b_registered[16:15];
- assign booth_block20_mand17 = b_registered[17:16];
- assign booth_block20_mand18 = b_registered[18:17];
- assign booth_block20_mand19 = b_registered[19:18];
- assign booth_block20_mand20 = b_registered[20:19];
- assign booth_block20_mand21 = b_registered[21:20];
- assign booth_block20_mand22 = b_registered[22:21];
- assign booth_block20_mand23 = b_registered[23:22];
- assign booth_block20_mand24 = b_registered[24:23];
- assign booth_block20_mand25 = b_registered[25:24];
- assign booth_block20_mand26 = b_registered[26:25];
- assign booth_block20_mand27 = b_registered[27:26];
- assign booth_block20_mand28 = b_registered[28:27];
- assign booth_block20_mand29 = b_registered[29:28];
- assign booth_block20_mand30 = b_registered[30:29];
- assign booth_block20_mand31 = b_registered[31:30];
- assign booth_block20_mand32 = { 1'h0, b_registered[31] };
- assign booth_block22 = a_registered[23:21];
- assign booth_block22_sel = { \sel_1$1736 , \sel_0$1735 };
- assign booth_block22_mand0 = { b_registered[0], 1'h0 };
- assign booth_block22_mand1 = b_registered[1:0];
- assign booth_block22_mand2 = b_registered[2:1];
- assign booth_block22_mand3 = b_registered[3:2];
- assign booth_block22_mand4 = b_registered[4:3];
- assign booth_block22_mand5 = b_registered[5:4];
- assign booth_block22_mand6 = b_registered[6:5];
- assign booth_block22_mand7 = b_registered[7:6];
- assign booth_block22_mand8 = b_registered[8:7];
- assign booth_block22_mand9 = b_registered[9:8];
- assign booth_block22_mand10 = b_registered[10:9];
- assign booth_block22_mand11 = b_registered[11:10];
- assign booth_block22_mand12 = b_registered[12:11];
- assign booth_block22_mand13 = b_registered[13:12];
- assign booth_block22_mand14 = b_registered[14:13];
- assign booth_block22_mand15 = b_registered[15:14];
- assign booth_block22_mand16 = b_registered[16:15];
- assign booth_block22_mand17 = b_registered[17:16];
- assign booth_block22_mand18 = b_registered[18:17];
- assign booth_block22_mand19 = b_registered[19:18];
- assign booth_block22_mand20 = b_registered[20:19];
- assign booth_block22_mand21 = b_registered[21:20];
- assign booth_block22_mand22 = b_registered[22:21];
- assign booth_block22_mand23 = b_registered[23:22];
- assign booth_block22_mand24 = b_registered[24:23];
- assign booth_block22_mand25 = b_registered[25:24];
- assign booth_block22_mand26 = b_registered[26:25];
- assign booth_block22_mand27 = b_registered[27:26];
- assign booth_block22_mand28 = b_registered[28:27];
- assign booth_block22_mand29 = b_registered[29:28];
- assign booth_block22_mand30 = b_registered[30:29];
- assign booth_block22_mand31 = b_registered[31:30];
- assign booth_block22_mand32 = { 1'h0, b_registered[31] };
- assign booth_block24 = a_registered[25:23];
- assign booth_block24_sel = { \sel_1$1773 , \sel_0$1772 };
- assign booth_block24_mand0 = { b_registered[0], 1'h0 };
- assign booth_block24_mand1 = b_registered[1:0];
- assign booth_block24_mand2 = b_registered[2:1];
- assign booth_block24_mand3 = b_registered[3:2];
- assign booth_block24_mand4 = b_registered[4:3];
- assign booth_block24_mand5 = b_registered[5:4];
- assign booth_block24_mand6 = b_registered[6:5];
- assign booth_block24_mand7 = b_registered[7:6];
- assign booth_block24_mand8 = b_registered[8:7];
- assign booth_block24_mand9 = b_registered[9:8];
- assign booth_block24_mand10 = b_registered[10:9];
- assign booth_block24_mand11 = b_registered[11:10];
- assign booth_block24_mand12 = b_registered[12:11];
- assign booth_block24_mand13 = b_registered[13:12];
- assign booth_block24_mand14 = b_registered[14:13];
- assign booth_block24_mand15 = b_registered[15:14];
- assign booth_block24_mand16 = b_registered[16:15];
- assign booth_block24_mand17 = b_registered[17:16];
- assign booth_block24_mand18 = b_registered[18:17];
- assign booth_block24_mand19 = b_registered[19:18];
- assign booth_block24_mand20 = b_registered[20:19];
- assign booth_block24_mand21 = b_registered[21:20];
- assign booth_block24_mand22 = b_registered[22:21];
- assign booth_block24_mand23 = b_registered[23:22];
- assign booth_block24_mand24 = b_registered[24:23];
- assign booth_block24_mand25 = b_registered[25:24];
- assign booth_block24_mand26 = b_registered[26:25];
- assign booth_block24_mand27 = b_registered[27:26];
- assign booth_block24_mand28 = b_registered[28:27];
- assign booth_block24_mand29 = b_registered[29:28];
- assign booth_block24_mand30 = b_registered[30:29];
- assign booth_block24_mand31 = b_registered[31:30];
- assign booth_block24_mand32 = { 1'h0, b_registered[31] };
- assign booth_block26 = a_registered[27:25];
- assign booth_block26_sel = { \sel_1$1810 , \sel_0$1809 };
- assign booth_block26_mand0 = { b_registered[0], 1'h0 };
- assign booth_block26_mand1 = b_registered[1:0];
- assign booth_block26_mand2 = b_registered[2:1];
- assign booth_block26_mand3 = b_registered[3:2];
- assign booth_block26_mand4 = b_registered[4:3];
- assign booth_block26_mand5 = b_registered[5:4];
- assign booth_block26_mand6 = b_registered[6:5];
- assign booth_block26_mand7 = b_registered[7:6];
- assign booth_block26_mand8 = b_registered[8:7];
- assign booth_block26_mand9 = b_registered[9:8];
- assign booth_block26_mand10 = b_registered[10:9];
- assign booth_block26_mand11 = b_registered[11:10];
- assign booth_block26_mand12 = b_registered[12:11];
- assign booth_block26_mand13 = b_registered[13:12];
- assign booth_block26_mand14 = b_registered[14:13];
- assign booth_block26_mand15 = b_registered[15:14];
- assign booth_block26_mand16 = b_registered[16:15];
- assign booth_block26_mand17 = b_registered[17:16];
- assign booth_block26_mand18 = b_registered[18:17];
- assign booth_block26_mand19 = b_registered[19:18];
- assign booth_block26_mand20 = b_registered[20:19];
- assign booth_block26_mand21 = b_registered[21:20];
- assign booth_block26_mand22 = b_registered[22:21];
- assign booth_block26_mand23 = b_registered[23:22];
- assign booth_block26_mand24 = b_registered[24:23];
- assign booth_block26_mand25 = b_registered[25:24];
- assign booth_block26_mand26 = b_registered[26:25];
- assign booth_block26_mand27 = b_registered[27:26];
- assign booth_block26_mand28 = b_registered[28:27];
- assign booth_block26_mand29 = b_registered[29:28];
- assign booth_block26_mand30 = b_registered[30:29];
- assign booth_block26_mand31 = b_registered[31:30];
- assign booth_block26_mand32 = { 1'h0, b_registered[31] };
- assign booth_block28 = a_registered[29:27];
- assign booth_block28_sel = { \sel_1$1847 , \sel_0$1846 };
- assign booth_block28_mand0 = { b_registered[0], 1'h0 };
- assign booth_block28_mand1 = b_registered[1:0];
- assign booth_block28_mand2 = b_registered[2:1];
- assign booth_block28_mand3 = b_registered[3:2];
- assign booth_block28_mand4 = b_registered[4:3];
- assign booth_block28_mand5 = b_registered[5:4];
- assign booth_block28_mand6 = b_registered[6:5];
- assign booth_block28_mand7 = b_registered[7:6];
- assign booth_block28_mand8 = b_registered[8:7];
- assign booth_block28_mand9 = b_registered[9:8];
- assign booth_block28_mand10 = b_registered[10:9];
- assign booth_block28_mand11 = b_registered[11:10];
- assign booth_block28_mand12 = b_registered[12:11];
- assign booth_block28_mand13 = b_registered[13:12];
- assign booth_block28_mand14 = b_registered[14:13];
- assign booth_block28_mand15 = b_registered[15:14];
- assign booth_block28_mand16 = b_registered[16:15];
- assign booth_block28_mand17 = b_registered[17:16];
- assign booth_block28_mand18 = b_registered[18:17];
- assign booth_block28_mand19 = b_registered[19:18];
- assign booth_block28_mand20 = b_registered[20:19];
- assign booth_block28_mand21 = b_registered[21:20];
- assign booth_block28_mand22 = b_registered[22:21];
- assign booth_block28_mand23 = b_registered[23:22];
- assign booth_block28_mand24 = b_registered[24:23];
- assign booth_block28_mand25 = b_registered[25:24];
- assign booth_block28_mand26 = b_registered[26:25];
- assign booth_block28_mand27 = b_registered[27:26];
- assign booth_block28_mand28 = b_registered[28:27];
- assign booth_block28_mand29 = b_registered[29:28];
- assign booth_block28_mand30 = b_registered[30:29];
- assign booth_block28_mand31 = b_registered[31:30];
- assign booth_block28_mand32 = { 1'h0, b_registered[31] };
- assign booth_block30 = a_registered[31:29];
- assign booth_block30_sel = { \sel_1$1884 , \sel_0$1883 };
- assign booth_block30_mand0 = { b_registered[0], 1'h0 };
- assign booth_block30_mand1 = b_registered[1:0];
- assign booth_block30_mand2 = b_registered[2:1];
- assign booth_block30_mand3 = b_registered[3:2];
- assign booth_block30_mand4 = b_registered[4:3];
- assign booth_block30_mand5 = b_registered[5:4];
- assign booth_block30_mand6 = b_registered[6:5];
- assign booth_block30_mand7 = b_registered[7:6];
- assign booth_block30_mand8 = b_registered[8:7];
- assign booth_block30_mand9 = b_registered[9:8];
- assign booth_block30_mand10 = b_registered[10:9];
- assign booth_block30_mand11 = b_registered[11:10];
- assign booth_block30_mand12 = b_registered[12:11];
- assign booth_block30_mand13 = b_registered[13:12];
- assign booth_block30_mand14 = b_registered[14:13];
- assign booth_block30_mand15 = b_registered[15:14];
- assign booth_block30_mand16 = b_registered[16:15];
- assign booth_block30_mand17 = b_registered[17:16];
- assign booth_block30_mand18 = b_registered[18:17];
- assign booth_block30_mand19 = b_registered[19:18];
- assign booth_block30_mand20 = b_registered[20:19];
- assign booth_block30_mand21 = b_registered[21:20];
- assign booth_block30_mand22 = b_registered[22:21];
- assign booth_block30_mand23 = b_registered[23:22];
- assign booth_block30_mand24 = b_registered[24:23];
- assign booth_block30_mand25 = b_registered[25:24];
- assign booth_block30_mand26 = b_registered[26:25];
- assign booth_block30_mand27 = b_registered[27:26];
- assign booth_block30_mand28 = b_registered[28:27];
- assign booth_block30_mand29 = b_registered[29:28];
- assign booth_block30_mand30 = b_registered[30:29];
- assign booth_block30_mand31 = b_registered[31:30];
- assign booth_block30_mand32 = { 1'h0, b_registered[31] };
- assign booth_block32 = { 2'h0, a_registered[31] };
- assign booth_block32_sign = 1'h0;
- assign booth_block32_sel = { \sel_1$1922 , \sel_0$1921 };
- assign booth_block32_mand0 = { b_registered[0], 1'h0 };
- assign booth_block32_mand1 = b_registered[1:0];
- assign booth_block32_mand2 = b_registered[2:1];
- assign booth_block32_mand3 = b_registered[3:2];
- assign booth_block32_mand4 = b_registered[4:3];
- assign booth_block32_mand5 = b_registered[5:4];
- assign booth_block32_mand6 = b_registered[6:5];
- assign booth_block32_mand7 = b_registered[7:6];
- assign booth_block32_mand8 = b_registered[8:7];
- assign booth_block32_mand9 = b_registered[9:8];
- assign booth_block32_mand10 = b_registered[10:9];
- assign booth_block32_mand11 = b_registered[11:10];
- assign booth_block32_mand12 = b_registered[12:11];
- assign booth_block32_mand13 = b_registered[13:12];
- assign booth_block32_mand14 = b_registered[14:13];
- assign booth_block32_mand15 = b_registered[15:14];
- assign booth_block32_mand16 = b_registered[16:15];
- assign booth_block32_mand17 = b_registered[17:16];
- assign booth_block32_mand18 = b_registered[18:17];
- assign booth_block32_mand19 = b_registered[19:18];
- assign booth_block32_mand20 = b_registered[20:19];
- assign booth_block32_mand21 = b_registered[21:20];
- assign booth_block32_mand22 = b_registered[22:21];
- assign booth_block32_mand23 = b_registered[23:22];
- assign booth_block32_mand24 = b_registered[24:23];
- assign booth_block32_mand25 = b_registered[25:24];
- assign booth_block32_mand26 = b_registered[26:25];
- assign booth_block32_mand27 = b_registered[27:26];
- assign booth_block32_mand28 = b_registered[28:27];
- assign booth_block32_mand29 = b_registered[29:28];
- assign booth_block32_mand30 = b_registered[30:29];
- assign booth_block32_mand31 = b_registered[31:30];
- assign booth_block32_mand32 = { 1'h0, b_registered[31] };
- assign pp_row36_0 = 1'h1;
- assign pp_row38_0 = 1'h1;
- assign pp_row40_0 = 1'h1;
- assign pp_row42_0 = 1'h1;
- assign pp_row44_0 = 1'h1;
- assign pp_row46_0 = 1'h1;
- assign pp_row48_0 = 1'h1;
- assign pp_row50_0 = 1'h1;
- assign pp_row52_0 = 1'h1;
- assign pp_row54_0 = 1'h1;
- assign pp_row56_0 = 1'h1;
- assign pp_row58_0 = 1'h1;
- assign pp_row60_0 = 1'h1;
- assign pp_row62_0 = 1'h1;
- assign pp_row64_0 = 1'h1;
- assign \a$1971 = final_a_registered;
- assign \b$1972 = final_b_registered;
- assign \o$1973 = { \$117 , \$116 , \$115 , \$114 , \$113 , \$112 , \$111 , \$110 , \$109 , \$108 , \$107 , \$106 , \$105 , \$104 , \$103 , \$102 , \$101 , \$100 , \$99 , \$98 , \$97 , \$96 , \$95 , \$94 , \$93 , \$92 , \$91 , \$90 , \$89 , \$88 , \$87 , \$86 , \$85 , \$84 , \$83 , \$82 , \$81 , \$80 , \$79 , \$78 , \$77 , \$76 , \$75 , \$74 , \$73 , \$72 , \$71 , \$70 , \$69 , \$68 , \$67 , \$66 , \$65 , \$64 , \$63 , \$62 , \$61 , \$60 , \$59 , \$58 , \$57 , \$56 , \$55 , \$54 };
- assign notblock = { \$3 , \$2 , \$1 };
- assign \notblock$2008 = { \$6 , \$5 , \$4 };
- assign \notblock$2042 = { \$9 , \$8 , \$7 };
- assign \notblock$2076 = { \$12 , \$11 , \$10 };
- assign \notblock$2110 = { \$15 , \$14 , \$13 };
- assign \notblock$2144 = { \$18 , \$17 , \$16 };
- assign \notblock$2178 = { \$21 , \$20 , \$19 };
- assign \notblock$2212 = { \$24 , \$23 , \$22 };
- assign \notblock$2246 = { \$27 , \$26 , \$25 };
- assign \notblock$2280 = { \$30 , \$29 , \$28 };
- assign \notblock$2314 = { \$33 , \$32 , \$31 };
- assign \notblock$2348 = { \$36 , \$35 , \$34 };
- assign \notblock$2382 = { \$39 , \$38 , \$37 };
- assign \notblock$2416 = { \$42 , \$41 , \$40 };
- assign \notblock$2450 = { \$45 , \$44 , \$43 };
- assign \notblock$2484 = { \$48 , \$47 , \$46 };
- assign \notblock$2518 = { \$51 , \$50 , \$49 };
-endmodule
-
-module \multiplier.final_adder (\port$902$0 , \port$903$0 , \port$904$0 , \port$905$0 , \port$906$0 , \port$907$0 , \port$908$0 , \port$909$0 , \port$910$0 , \port$911$0 , \port$912$0 , \port$913$0 , \port$914$0 , \port$915$0 , \port$916$0 , \port$917$0 , \port$918$0 , \port$919$0 , \port$920$0 , \port$921$0 , \port$922$0
-, \port$923$0 , \port$924$0 , \port$925$0 , \port$926$0 , \port$927$0 , \port$928$0 , \port$929$0 , \port$930$0 , \port$931$0 , \port$932$0 , \port$933$0 , \port$934$0 , \port$935$0 , \port$936$0 , \port$937$0 , \port$938$0 , \port$939$0 , \port$940$0 , \port$941$0 , \port$942$0 , \port$943$0
-, \port$944$0 , \port$945$0 , \port$946$0 , \port$947$0 , \port$948$0 , \port$949$0 , \port$950$0 , \port$951$0 , \port$952$0 , \port$953$0 , \port$954$0 , \port$955$0 , \port$956$0 , \port$957$0 , \port$958$0 , \port$959$0 , \port$960$0 , \port$961$0 , \port$962$0 , \port$963$0 , \port$964$0
-, a, b, \port$901$0 );
- wire \$1 ;
- wire \$10 ;
- wire \$11 ;
- wire \$12 ;
- wire \$13 ;
- wire \$14 ;
- wire \$15 ;
- wire \$16 ;
- wire \$17 ;
- wire \$18 ;
- wire \$19 ;
- wire \$2 ;
- wire \$20 ;
- wire \$21 ;
- wire \$22 ;
- wire \$23 ;
- wire \$24 ;
- wire \$25 ;
- wire \$26 ;
- wire \$27 ;
- wire \$28 ;
- wire \$29 ;
- wire \$3 ;
- wire \$30 ;
- wire \$31 ;
- wire \$32 ;
- wire \$33 ;
- wire \$34 ;
- wire \$35 ;
- wire \$36 ;
- wire \$37 ;
- wire \$38 ;
- wire \$39 ;
- wire \$4 ;
- wire \$40 ;
- wire \$41 ;
- wire \$42 ;
- wire \$43 ;
- wire \$44 ;
- wire \$45 ;
- wire \$46 ;
- wire \$47 ;
- wire \$48 ;
- wire \$49 ;
- wire \$5 ;
- wire \$50 ;
- wire \$51 ;
- wire \$52 ;
- wire \$53 ;
- wire \$54 ;
- wire \$55 ;
- wire \$56 ;
- wire \$57 ;
- wire \$58 ;
- wire \$59 ;
- wire \$6 ;
- wire \$60 ;
- wire \$61 ;
- wire \$62 ;
- wire \$63 ;
- wire \$64 ;
- wire \$65 ;
- wire \$66 ;
- wire \$7 ;
- wire \$8 ;
- wire \$9 ;
- wire \$signal ;
- wire \$signal$10 ;
- wire \$signal$100 ;
- wire \$signal$101 ;
- wire \$signal$102 ;
- wire \$signal$103 ;
- wire \$signal$104 ;
- wire \$signal$105 ;
- wire \$signal$106 ;
- wire \$signal$107 ;
- wire \$signal$108 ;
- wire \$signal$109 ;
- wire \$signal$11 ;
- wire \$signal$110 ;
- wire \$signal$111 ;
- wire \$signal$112 ;
- wire \$signal$113 ;
- wire \$signal$114 ;
- wire \$signal$115 ;
- wire \$signal$116 ;
- wire \$signal$117 ;
- wire \$signal$118 ;
- wire \$signal$119 ;
- wire \$signal$12 ;
- wire \$signal$120 ;
- wire \$signal$121 ;
- wire \$signal$122 ;
- wire \$signal$123 ;
- wire \$signal$124 ;
- wire \$signal$125 ;
- wire \$signal$126 ;
- wire \$signal$127 ;
- wire \$signal$128 ;
- wire \$signal$129 ;
- wire \$signal$13 ;
- wire \$signal$130 ;
- wire \$signal$131 ;
- wire \$signal$14 ;
- wire \$signal$15 ;
- wire \$signal$16 ;
- wire \$signal$17 ;
- wire \$signal$18 ;
- wire \$signal$19 ;
- wire \$signal$20 ;
- wire \$signal$21 ;
- wire \$signal$22 ;
- wire \$signal$23 ;
- wire \$signal$24 ;
- wire \$signal$25 ;
- wire \$signal$26 ;
- wire \$signal$263 ;
- wire \$signal$264 ;
- wire \$signal$265 ;
- wire \$signal$266 ;
- wire \$signal$267 ;
- wire \$signal$268 ;
- wire \$signal$269 ;
- wire \$signal$27 ;
- wire \$signal$270 ;
- wire \$signal$271 ;
- wire \$signal$272 ;
- wire \$signal$273 ;
- wire \$signal$274 ;
- wire \$signal$275 ;
- wire \$signal$276 ;
- wire \$signal$277 ;
- wire \$signal$278 ;
- wire \$signal$279 ;
- wire \$signal$28 ;
- wire \$signal$280 ;
- wire \$signal$281 ;
- wire \$signal$282 ;
- wire \$signal$283 ;
- wire \$signal$284 ;
- wire \$signal$285 ;
- wire \$signal$286 ;
- wire \$signal$287 ;
- wire \$signal$288 ;
- wire \$signal$289 ;
- wire \$signal$29 ;
- wire \$signal$290 ;
- wire \$signal$291 ;
- wire \$signal$292 ;
- wire \$signal$293 ;
- wire \$signal$294 ;
- wire \$signal$295 ;
- wire \$signal$296 ;
- wire \$signal$297 ;
- wire \$signal$298 ;
- wire \$signal$299 ;
- wire \$signal$30 ;
- wire \$signal$300 ;
- wire \$signal$301 ;
- wire \$signal$302 ;
- wire \$signal$303 ;
- wire \$signal$304 ;
- wire \$signal$305 ;
- wire \$signal$306 ;
- wire \$signal$307 ;
- wire \$signal$308 ;
- wire \$signal$309 ;
- wire \$signal$31 ;
- wire \$signal$310 ;
- wire \$signal$311 ;
- wire \$signal$312 ;
- wire \$signal$313 ;
- wire \$signal$314 ;
- wire \$signal$315 ;
- wire \$signal$316 ;
- wire \$signal$317 ;
- wire \$signal$318 ;
- wire \$signal$319 ;
- wire \$signal$32 ;
- wire \$signal$320 ;
- wire \$signal$321 ;
- wire \$signal$322 ;
- wire \$signal$323 ;
- wire \$signal$324 ;
- wire \$signal$325 ;
- wire \$signal$326 ;
- wire \$signal$33 ;
- wire \$signal$34 ;
- wire \$signal$35 ;
- wire \$signal$36 ;
- wire \$signal$37 ;
- wire \$signal$38 ;
- wire \$signal$39 ;
- wire \$signal$40 ;
- wire \$signal$41 ;
- wire \$signal$42 ;
- wire \$signal$43 ;
- wire \$signal$44 ;
- wire \$signal$45 ;
- wire \$signal$46 ;
- wire \$signal$47 ;
- wire \$signal$48 ;
- wire \$signal$49 ;
- wire \$signal$5 ;
- wire \$signal$50 ;
- wire \$signal$51 ;
- wire \$signal$52 ;
- wire \$signal$53 ;
- wire \$signal$54 ;
- wire \$signal$55 ;
- wire \$signal$56 ;
- wire \$signal$57 ;
- wire \$signal$58 ;
- wire \$signal$59 ;
- wire \$signal$6 ;
- wire \$signal$60 ;
- wire \$signal$61 ;
- wire \$signal$62 ;
- wire \$signal$63 ;
- wire \$signal$64 ;
- wire \$signal$65 ;
- wire \$signal$66 ;
- wire \$signal$67 ;
- wire \$signal$68 ;
- wire \$signal$69 ;
- wire \$signal$7 ;
- wire \$signal$70 ;
- wire \$signal$71 ;
- wire \$signal$72 ;
- wire \$signal$73 ;
- wire \$signal$74 ;
- wire \$signal$75 ;
- wire \$signal$76 ;
- wire \$signal$77 ;
- wire \$signal$78 ;
- wire \$signal$79 ;
- wire \$signal$8 ;
- wire \$signal$80 ;
- wire \$signal$81 ;
- wire \$signal$82 ;
- wire \$signal$83 ;
- wire \$signal$84 ;
- wire \$signal$85 ;
- wire \$signal$86 ;
- wire \$signal$87 ;
- wire \$signal$88 ;
- wire \$signal$89 ;
- wire \$signal$9 ;
- wire \$signal$90 ;
- wire \$signal$91 ;
- wire \$signal$92 ;
- wire \$signal$93 ;
- wire \$signal$94 ;
- wire \$signal$95 ;
- wire \$signal$96 ;
- wire \$signal$97 ;
- wire \$signal$98 ;
- wire \$signal$99 ;
- input [63:0] a;
- wire [63:0] a;
- wire [63:0] \a$1 ;
- input [63:0] b;
- wire [63:0] b;
- wire [63:0] \b$3 ;
- wire con;
- wire \con$137 ;
- wire \con$139 ;
- wire \con$141 ;
- wire \con$143 ;
- wire \con$145 ;
- wire \con$147 ;
- wire \con$149 ;
- wire \con$151 ;
- wire \con$153 ;
- wire \con$155 ;
- wire \con$157 ;
- wire \con$159 ;
- wire \con$161 ;
- wire \con$163 ;
- wire \con$165 ;
- wire \con$167 ;
- wire \con$169 ;
- wire \con$171 ;
- wire \con$173 ;
- wire \con$175 ;
- wire \con$177 ;
- wire \con$179 ;
- wire \con$181 ;
- wire \con$183 ;
- wire \con$185 ;
- wire \con$187 ;
- wire \con$189 ;
- wire \con$191 ;
- wire \con$193 ;
- wire \con$195 ;
- wire \con$197 ;
- wire \con$199 ;
- wire \con$201 ;
- wire \con$203 ;
- wire \con$205 ;
- wire \con$207 ;
- wire \con$209 ;
- wire \con$211 ;
- wire \con$213 ;
- wire \con$215 ;
- wire \con$217 ;
- wire \con$219 ;
- wire \con$221 ;
- wire \con$223 ;
- wire \con$225 ;
- wire \con$227 ;
- wire \con$229 ;
- wire \con$231 ;
- wire \con$233 ;
- wire \con$235 ;
- wire \con$237 ;
- wire \con$239 ;
- wire \con$241 ;
- wire \con$243 ;
- wire \con$245 ;
- wire \con$247 ;
- wire \con$249 ;
- wire \con$251 ;
- wire \con$253 ;
- wire \con$255 ;
- wire \con$257 ;
- wire \con$259 ;
- wire \con$261 ;
- wire g_new;
- wire \g_new$330 ;
- wire \g_new$333 ;
- wire \g_new$334 ;
- wire \g_new$337 ;
- wire \g_new$338 ;
- wire \g_new$341 ;
- wire \g_new$342 ;
- wire \g_new$345 ;
- wire \g_new$346 ;
- wire \g_new$349 ;
- wire \g_new$350 ;
- wire \g_new$353 ;
- wire \g_new$354 ;
- wire \g_new$357 ;
- wire \g_new$358 ;
- wire \g_new$361 ;
- wire \g_new$362 ;
- wire \g_new$365 ;
- wire \g_new$366 ;
- wire \g_new$369 ;
- wire \g_new$370 ;
- wire \g_new$373 ;
- wire \g_new$374 ;
- wire \g_new$377 ;
- wire \g_new$378 ;
- wire \g_new$381 ;
- wire \g_new$382 ;
- wire \g_new$385 ;
- wire \g_new$386 ;
- wire \g_new$389 ;
- wire \g_new$390 ;
- wire \g_new$393 ;
- wire \g_new$394 ;
- wire \g_new$397 ;
- wire \g_new$398 ;
- wire \g_new$401 ;
- wire \g_new$402 ;
- wire \g_new$405 ;
- wire \g_new$406 ;
- wire \g_new$409 ;
- wire \g_new$410 ;
- wire \g_new$413 ;
- wire \g_new$414 ;
- wire \g_new$417 ;
- wire \g_new$418 ;
- wire \g_new$421 ;
- wire \g_new$422 ;
- wire \g_new$425 ;
- wire \g_new$426 ;
- wire \g_new$429 ;
- wire \g_new$430 ;
- wire \g_new$433 ;
- wire \g_new$434 ;
- wire \g_new$437 ;
- wire \g_new$438 ;
- wire \g_new$441 ;
- wire \g_new$442 ;
- wire \g_new$445 ;
- wire \g_new$446 ;
- wire \g_new$449 ;
- wire \g_new$450 ;
- wire \g_new$451 ;
- wire \g_new$452 ;
- wire \g_new$453 ;
- wire \g_new$454 ;
- wire \g_new$455 ;
- wire \g_new$456 ;
- wire \g_new$457 ;
- wire \g_new$458 ;
- wire \g_new$459 ;
- wire \g_new$460 ;
- wire \g_new$461 ;
- wire \g_new$462 ;
- wire \g_new$463 ;
- wire \g_new$464 ;
- wire \g_new$465 ;
- wire \g_new$466 ;
- wire \g_new$467 ;
- wire \g_new$468 ;
- wire \g_new$469 ;
- wire \g_new$470 ;
- wire \g_new$471 ;
- wire \g_new$472 ;
- wire \g_new$473 ;
- wire \g_new$474 ;
- wire \g_new$475 ;
- wire \g_new$476 ;
- wire \g_new$477 ;
- wire \g_new$478 ;
- wire \g_new$479 ;
- wire \g_new$480 ;
- wire \g_new$481 ;
- wire \g_new$482 ;
- wire \g_new$483 ;
- wire \g_new$484 ;
- wire \g_new$485 ;
- wire \g_new$486 ;
- wire \g_new$487 ;
- wire \g_new$488 ;
- wire \g_new$489 ;
- wire \g_new$490 ;
- wire \g_new$491 ;
- wire \g_new$492 ;
- wire \g_new$493 ;
- wire \g_new$494 ;
- wire \g_new$495 ;
- wire \g_new$496 ;
- wire \g_new$497 ;
- wire \g_new$498 ;
- wire \g_new$499 ;
- wire \g_new$500 ;
- wire \g_new$501 ;
- wire \g_new$502 ;
- wire \g_new$503 ;
- wire \g_new$504 ;
- wire \g_new$505 ;
- wire \g_new$506 ;
- wire \g_new$507 ;
- wire [63:0] o;
- wire [63:0] \o$134 ;
- wire [63:0] o2;
- wire p_new;
- wire \p_new$328 ;
- wire \p_new$331 ;
- wire \p_new$332 ;
- wire \p_new$335 ;
- wire \p_new$336 ;
- wire \p_new$339 ;
- wire \p_new$340 ;
- wire \p_new$343 ;
- wire \p_new$344 ;
- wire \p_new$347 ;
- wire \p_new$348 ;
- wire \p_new$351 ;
- wire \p_new$352 ;
- wire \p_new$355 ;
- wire \p_new$356 ;
- wire \p_new$359 ;
- wire \p_new$360 ;
- wire \p_new$363 ;
- wire \p_new$364 ;
- wire \p_new$367 ;
- wire \p_new$368 ;
- wire \p_new$371 ;
- wire \p_new$372 ;
- wire \p_new$375 ;
- wire \p_new$376 ;
- wire \p_new$379 ;
- wire \p_new$380 ;
- wire \p_new$383 ;
- wire \p_new$384 ;
- wire \p_new$387 ;
- wire \p_new$388 ;
- wire \p_new$391 ;
- wire \p_new$392 ;
- wire \p_new$395 ;
- wire \p_new$396 ;
- wire \p_new$399 ;
- wire \p_new$400 ;
- wire \p_new$403 ;
- wire \p_new$404 ;
- wire \p_new$407 ;
- wire \p_new$408 ;
- wire \p_new$411 ;
- wire \p_new$412 ;
- wire \p_new$415 ;
- wire \p_new$416 ;
- wire \p_new$419 ;
- wire \p_new$420 ;
- wire \p_new$423 ;
- wire \p_new$424 ;
- wire \p_new$427 ;
- wire \p_new$428 ;
- wire \p_new$431 ;
- wire \p_new$432 ;
- wire \p_new$435 ;
- wire \p_new$436 ;
- wire \p_new$439 ;
- wire \p_new$440 ;
- wire \p_new$443 ;
- wire \p_new$444 ;
- wire \p_new$447 ;
- wire \p_new$448 ;
- output \port$901$0 ;
- wire \port$901$0 ;
- output \port$902$0 ;
- wire \port$902$0 ;
- output \port$903$0 ;
- wire \port$903$0 ;
- output \port$904$0 ;
- wire \port$904$0 ;
- output \port$905$0 ;
- wire \port$905$0 ;
- output \port$906$0 ;
- wire \port$906$0 ;
- output \port$907$0 ;
- wire \port$907$0 ;
- output \port$908$0 ;
- wire \port$908$0 ;
- output \port$909$0 ;
- wire \port$909$0 ;
- output \port$910$0 ;
- wire \port$910$0 ;
- output \port$911$0 ;
- wire \port$911$0 ;
- output \port$912$0 ;
- wire \port$912$0 ;
- output \port$913$0 ;
- wire \port$913$0 ;
- output \port$914$0 ;
- wire \port$914$0 ;
- output \port$915$0 ;
- wire \port$915$0 ;
- output \port$916$0 ;
- wire \port$916$0 ;
- output \port$917$0 ;
- wire \port$917$0 ;
- output \port$918$0 ;
- wire \port$918$0 ;
- output \port$919$0 ;
- wire \port$919$0 ;
- output \port$920$0 ;
- wire \port$920$0 ;
- output \port$921$0 ;
- wire \port$921$0 ;
- output \port$922$0 ;
- wire \port$922$0 ;
- output \port$923$0 ;
- wire \port$923$0 ;
- output \port$924$0 ;
- wire \port$924$0 ;
- output \port$925$0 ;
- wire \port$925$0 ;
- output \port$926$0 ;
- wire \port$926$0 ;
- output \port$927$0 ;
- wire \port$927$0 ;
- output \port$928$0 ;
- wire \port$928$0 ;
- output \port$929$0 ;
- wire \port$929$0 ;
- output \port$930$0 ;
- wire \port$930$0 ;
- output \port$931$0 ;
- wire \port$931$0 ;
- output \port$932$0 ;
- wire \port$932$0 ;
- output \port$933$0 ;
- wire \port$933$0 ;
- output \port$934$0 ;
- wire \port$934$0 ;
- output \port$935$0 ;
- wire \port$935$0 ;
- output \port$936$0 ;
- wire \port$936$0 ;
- output \port$937$0 ;
- wire \port$937$0 ;
- output \port$938$0 ;
- wire \port$938$0 ;
- output \port$939$0 ;
- wire \port$939$0 ;
- output \port$940$0 ;
- wire \port$940$0 ;
- output \port$941$0 ;
- wire \port$941$0 ;
- output \port$942$0 ;
- wire \port$942$0 ;
- output \port$943$0 ;
- wire \port$943$0 ;
- output \port$944$0 ;
- wire \port$944$0 ;
- output \port$945$0 ;
- wire \port$945$0 ;
- output \port$946$0 ;
- wire \port$946$0 ;
- output \port$947$0 ;
- wire \port$947$0 ;
- output \port$948$0 ;
- wire \port$948$0 ;
- output \port$949$0 ;
- wire \port$949$0 ;
- output \port$950$0 ;
- wire \port$950$0 ;
- output \port$951$0 ;
- wire \port$951$0 ;
- output \port$952$0 ;
- wire \port$952$0 ;
- output \port$953$0 ;
- wire \port$953$0 ;
- output \port$954$0 ;
- wire \port$954$0 ;
- output \port$955$0 ;
- wire \port$955$0 ;
- output \port$956$0 ;
- wire \port$956$0 ;
- output \port$957$0 ;
- wire \port$957$0 ;
- output \port$958$0 ;
- wire \port$958$0 ;
- output \port$959$0 ;
- wire \port$959$0 ;
- output \port$960$0 ;
- wire \port$960$0 ;
- output \port$961$0 ;
- wire \port$961$0 ;
- output \port$962$0 ;
- wire \port$962$0 ;
- output \port$963$0 ;
- wire \port$963$0 ;
- output \port$964$0 ;
- wire \port$964$0 ;
- wire sn;
- wire \sn$138 ;
- wire \sn$140 ;
- wire \sn$142 ;
- wire \sn$144 ;
- wire \sn$146 ;
- wire \sn$148 ;
- wire \sn$150 ;
- wire \sn$152 ;
- wire \sn$154 ;
- wire \sn$156 ;
- wire \sn$158 ;
- wire \sn$160 ;
- wire \sn$162 ;
- wire \sn$164 ;
- wire \sn$166 ;
- wire \sn$168 ;
- wire \sn$170 ;
- wire \sn$172 ;
- wire \sn$174 ;
- wire \sn$176 ;
- wire \sn$178 ;
- wire \sn$180 ;
- wire \sn$182 ;
- wire \sn$184 ;
- wire \sn$186 ;
- wire \sn$188 ;
- wire \sn$190 ;
- wire \sn$192 ;
- wire \sn$194 ;
- wire \sn$196 ;
- wire \sn$198 ;
- wire \sn$200 ;
- wire \sn$202 ;
- wire \sn$204 ;
- wire \sn$206 ;
- wire \sn$208 ;
- wire \sn$210 ;
- wire \sn$212 ;
- wire \sn$214 ;
- wire \sn$216 ;
- wire \sn$218 ;
- wire \sn$220 ;
- wire \sn$222 ;
- wire \sn$224 ;
- wire \sn$226 ;
- wire \sn$228 ;
- wire \sn$230 ;
- wire \sn$232 ;
- wire \sn$234 ;
- wire \sn$236 ;
- wire \sn$238 ;
- wire \sn$240 ;
- wire \sn$242 ;
- wire \sn$244 ;
- wire \sn$246 ;
- wire \sn$248 ;
- wire \sn$250 ;
- wire \sn$252 ;
- wire \sn$254 ;
- wire \sn$256 ;
- wire \sn$258 ;
- wire \sn$260 ;
- wire \sn$262 ;
- HAxp5_ASAP7_75t_R \U$0 (
- .A(a[0]),
- .B(b[0]),
- .CON(con),
- .SN(sn)
- );
- INVx1_ASAP7_75t_R \U$1 (
- .A(con),
- .Y(\$signal$263 )
- );
- INVx1_ASAP7_75t_R \U$10 (
- .A(\con$141 ),
- .Y(\$signal$266 )
- );
- INVx1_ASAP7_75t_R \U$100 (
- .A(\con$201 ),
- .Y(\$signal$296 )
- );
- INVx1_ASAP7_75t_R \U$101 (
- .A(\sn$202 ),
- .Y(\$signal$70 )
- );
- HAxp5_ASAP7_75t_R \U$102 (
- .A(a[34]),
- .B(b[34]),
- .CON(\con$203 ),
- .SN(\sn$204 )
- );
- INVx1_ASAP7_75t_R \U$103 (
- .A(\con$203 ),
- .Y(\$signal$297 )
- );
- INVx1_ASAP7_75t_R \U$104 (
- .A(\sn$204 ),
- .Y(\$signal$72 )
- );
- HAxp5_ASAP7_75t_R \U$105 (
- .A(a[35]),
- .B(b[35]),
- .CON(\con$205 ),
- .SN(\sn$206 )
- );
- INVx1_ASAP7_75t_R \U$106 (
- .A(\con$205 ),
- .Y(\$signal$298 )
- );
- INVx1_ASAP7_75t_R \U$107 (
- .A(\sn$206 ),
- .Y(\$signal$74 )
- );
- HAxp5_ASAP7_75t_R \U$108 (
- .A(a[36]),
- .B(b[36]),
- .CON(\con$207 ),
- .SN(\sn$208 )
- );
- INVx1_ASAP7_75t_R \U$109 (
- .A(\con$207 ),
- .Y(\$signal$299 )
- );
- INVx1_ASAP7_75t_R \U$11 (
- .A(\sn$142 ),
- .Y(\$signal$10 )
- );
- INVx1_ASAP7_75t_R \U$110 (
- .A(\sn$208 ),
- .Y(\$signal$76 )
- );
- HAxp5_ASAP7_75t_R \U$111 (
- .A(a[37]),
- .B(b[37]),
- .CON(\con$209 ),
- .SN(\sn$210 )
- );
- INVx1_ASAP7_75t_R \U$112 (
- .A(\con$209 ),
- .Y(\$signal$300 )
- );
- INVx1_ASAP7_75t_R \U$113 (
- .A(\sn$210 ),
- .Y(\$signal$78 )
- );
- HAxp5_ASAP7_75t_R \U$114 (
- .A(a[38]),
- .B(b[38]),
- .CON(\con$211 ),
- .SN(\sn$212 )
- );
- INVx1_ASAP7_75t_R \U$115 (
- .A(\con$211 ),
- .Y(\$signal$301 )
- );
- INVx1_ASAP7_75t_R \U$116 (
- .A(\sn$212 ),
- .Y(\$signal$80 )
- );
- HAxp5_ASAP7_75t_R \U$117 (
- .A(a[39]),
- .B(b[39]),
- .CON(\con$213 ),
- .SN(\sn$214 )
- );
- INVx1_ASAP7_75t_R \U$118 (
- .A(\con$213 ),
- .Y(\$signal$302 )
- );
- INVx1_ASAP7_75t_R \U$119 (
- .A(\sn$214 ),
- .Y(\$signal$82 )
- );
- HAxp5_ASAP7_75t_R \U$12 (
- .A(a[4]),
- .B(b[4]),
- .CON(\con$143 ),
- .SN(\sn$144 )
- );
- HAxp5_ASAP7_75t_R \U$120 (
- .A(a[40]),
- .B(b[40]),
- .CON(\con$215 ),
- .SN(\sn$216 )
- );
- INVx1_ASAP7_75t_R \U$121 (
- .A(\con$215 ),
- .Y(\$signal$303 )
- );
- INVx1_ASAP7_75t_R \U$122 (
- .A(\sn$216 ),
- .Y(\$signal$84 )
- );
- HAxp5_ASAP7_75t_R \U$123 (
- .A(a[41]),
- .B(b[41]),
- .CON(\con$217 ),
- .SN(\sn$218 )
- );
- INVx1_ASAP7_75t_R \U$124 (
- .A(\con$217 ),
- .Y(\$signal$304 )
- );
- INVx1_ASAP7_75t_R \U$125 (
- .A(\sn$218 ),
- .Y(\$signal$86 )
- );
- HAxp5_ASAP7_75t_R \U$126 (
- .A(a[42]),
- .B(b[42]),
- .CON(\con$219 ),
- .SN(\sn$220 )
- );
- INVx1_ASAP7_75t_R \U$127 (
- .A(\con$219 ),
- .Y(\$signal$305 )
- );
- INVx1_ASAP7_75t_R \U$128 (
- .A(\sn$220 ),
- .Y(\$signal$88 )
- );
- HAxp5_ASAP7_75t_R \U$129 (
- .A(a[43]),
- .B(b[43]),
- .CON(\con$221 ),
- .SN(\sn$222 )
- );
- INVx1_ASAP7_75t_R \U$13 (
- .A(\con$143 ),
- .Y(\$signal$267 )
- );
- INVx1_ASAP7_75t_R \U$130 (
- .A(\con$221 ),
- .Y(\$signal$306 )
- );
- INVx1_ASAP7_75t_R \U$131 (
- .A(\sn$222 ),
- .Y(\$signal$90 )
- );
- HAxp5_ASAP7_75t_R \U$132 (
- .A(a[44]),
- .B(b[44]),
- .CON(\con$223 ),
- .SN(\sn$224 )
- );
- INVx1_ASAP7_75t_R \U$133 (
- .A(\con$223 ),
- .Y(\$signal$307 )
- );
- INVx1_ASAP7_75t_R \U$134 (
- .A(\sn$224 ),
- .Y(\$signal$92 )
- );
- HAxp5_ASAP7_75t_R \U$135 (
- .A(a[45]),
- .B(b[45]),
- .CON(\con$225 ),
- .SN(\sn$226 )
- );
- INVx1_ASAP7_75t_R \U$136 (
- .A(\con$225 ),
- .Y(\$signal$308 )
- );
- INVx1_ASAP7_75t_R \U$137 (
- .A(\sn$226 ),
- .Y(\$signal$94 )
- );
- HAxp5_ASAP7_75t_R \U$138 (
- .A(a[46]),
- .B(b[46]),
- .CON(\con$227 ),
- .SN(\sn$228 )
- );
- INVx1_ASAP7_75t_R \U$139 (
- .A(\con$227 ),
- .Y(\$signal$309 )
- );
- INVx1_ASAP7_75t_R \U$14 (
- .A(\sn$144 ),
- .Y(\$signal$12 )
- );
- INVx1_ASAP7_75t_R \U$140 (
- .A(\sn$228 ),
- .Y(\$signal$96 )
- );
- HAxp5_ASAP7_75t_R \U$141 (
- .A(a[47]),
- .B(b[47]),
- .CON(\con$229 ),
- .SN(\sn$230 )
- );
- INVx1_ASAP7_75t_R \U$142 (
- .A(\con$229 ),
- .Y(\$signal$310 )
- );
- INVx1_ASAP7_75t_R \U$143 (
- .A(\sn$230 ),
- .Y(\$signal$98 )
- );
- HAxp5_ASAP7_75t_R \U$144 (
- .A(a[48]),
- .B(b[48]),
- .CON(\con$231 ),
- .SN(\sn$232 )
- );
- INVx1_ASAP7_75t_R \U$145 (
- .A(\con$231 ),
- .Y(\$signal$311 )
- );
- INVx1_ASAP7_75t_R \U$146 (
- .A(\sn$232 ),
- .Y(\$signal$100 )
- );
- HAxp5_ASAP7_75t_R \U$147 (
- .A(a[49]),
- .B(b[49]),
- .CON(\con$233 ),
- .SN(\sn$234 )
- );
- INVx1_ASAP7_75t_R \U$148 (
- .A(\con$233 ),
- .Y(\$signal$312 )
- );
- INVx1_ASAP7_75t_R \U$149 (
- .A(\sn$234 ),
- .Y(\$signal$102 )
- );
- HAxp5_ASAP7_75t_R \U$15 (
- .A(a[5]),
- .B(b[5]),
- .CON(\con$145 ),
- .SN(\sn$146 )
- );
- HAxp5_ASAP7_75t_R \U$150 (
- .A(a[50]),
- .B(b[50]),
- .CON(\con$235 ),
- .SN(\sn$236 )
- );
- INVx1_ASAP7_75t_R \U$151 (
- .A(\con$235 ),
- .Y(\$signal$313 )
- );
- INVx1_ASAP7_75t_R \U$152 (
- .A(\sn$236 ),
- .Y(\$signal$104 )
- );
- HAxp5_ASAP7_75t_R \U$153 (
- .A(a[51]),
- .B(b[51]),
- .CON(\con$237 ),
- .SN(\sn$238 )
- );
- INVx1_ASAP7_75t_R \U$154 (
- .A(\con$237 ),
- .Y(\$signal$314 )
- );
- INVx1_ASAP7_75t_R \U$155 (
- .A(\sn$238 ),
- .Y(\$signal$106 )
- );
- HAxp5_ASAP7_75t_R \U$156 (
- .A(a[52]),
- .B(b[52]),
- .CON(\con$239 ),
- .SN(\sn$240 )
- );
- INVx1_ASAP7_75t_R \U$157 (
- .A(\con$239 ),
- .Y(\$signal$315 )
- );
- INVx1_ASAP7_75t_R \U$158 (
- .A(\sn$240 ),
- .Y(\$signal$108 )
- );
- HAxp5_ASAP7_75t_R \U$159 (
- .A(a[53]),
- .B(b[53]),
- .CON(\con$241 ),
- .SN(\sn$242 )
- );
- INVx1_ASAP7_75t_R \U$16 (
- .A(\con$145 ),
- .Y(\$signal$268 )
- );
- INVx1_ASAP7_75t_R \U$160 (
- .A(\con$241 ),
- .Y(\$signal$316 )
- );
- INVx1_ASAP7_75t_R \U$161 (
- .A(\sn$242 ),
- .Y(\$signal$110 )
- );
- HAxp5_ASAP7_75t_R \U$162 (
- .A(a[54]),
- .B(b[54]),
- .CON(\con$243 ),
- .SN(\sn$244 )
- );
- INVx1_ASAP7_75t_R \U$163 (
- .A(\con$243 ),
- .Y(\$signal$317 )
- );
- INVx1_ASAP7_75t_R \U$164 (
- .A(\sn$244 ),
- .Y(\$signal$112 )
- );
- HAxp5_ASAP7_75t_R \U$165 (
- .A(a[55]),
- .B(b[55]),
- .CON(\con$245 ),
- .SN(\sn$246 )
- );
- INVx1_ASAP7_75t_R \U$166 (
- .A(\con$245 ),
- .Y(\$signal$318 )
- );
- INVx1_ASAP7_75t_R \U$167 (
- .A(\sn$246 ),
- .Y(\$signal$114 )
- );
- HAxp5_ASAP7_75t_R \U$168 (
- .A(a[56]),
- .B(b[56]),
- .CON(\con$247 ),
- .SN(\sn$248 )
- );
- INVx1_ASAP7_75t_R \U$169 (
- .A(\con$247 ),
- .Y(\$signal$319 )
- );
- INVx1_ASAP7_75t_R \U$17 (
- .A(\sn$146 ),
- .Y(\$signal$14 )
- );
- INVx1_ASAP7_75t_R \U$170 (
- .A(\sn$248 ),
- .Y(\$signal$116 )
- );
- HAxp5_ASAP7_75t_R \U$171 (
- .A(a[57]),
- .B(b[57]),
- .CON(\con$249 ),
- .SN(\sn$250 )
- );
- INVx1_ASAP7_75t_R \U$172 (
- .A(\con$249 ),
- .Y(\$signal$320 )
- );
- INVx1_ASAP7_75t_R \U$173 (
- .A(\sn$250 ),
- .Y(\$signal$118 )
- );
- HAxp5_ASAP7_75t_R \U$174 (
- .A(a[58]),
- .B(b[58]),
- .CON(\con$251 ),
- .SN(\sn$252 )
- );
- INVx1_ASAP7_75t_R \U$175 (
- .A(\con$251 ),
- .Y(\$signal$321 )
- );
- INVx1_ASAP7_75t_R \U$176 (
- .A(\sn$252 ),
- .Y(\$signal$120 )
- );
- HAxp5_ASAP7_75t_R \U$177 (
- .A(a[59]),
- .B(b[59]),
- .CON(\con$253 ),
- .SN(\sn$254 )
- );
- INVx1_ASAP7_75t_R \U$178 (
- .A(\con$253 ),
- .Y(\$signal$322 )
- );
- INVx1_ASAP7_75t_R \U$179 (
- .A(\sn$254 ),
- .Y(\$signal$122 )
- );
- HAxp5_ASAP7_75t_R \U$18 (
- .A(a[6]),
- .B(b[6]),
- .CON(\con$147 ),
- .SN(\sn$148 )
- );
- HAxp5_ASAP7_75t_R \U$180 (
- .A(a[60]),
- .B(b[60]),
- .CON(\con$255 ),
- .SN(\sn$256 )
- );
- INVx1_ASAP7_75t_R \U$181 (
- .A(\con$255 ),
- .Y(\$signal$323 )
- );
- INVx1_ASAP7_75t_R \U$182 (
- .A(\sn$256 ),
- .Y(\$signal$124 )
- );
- HAxp5_ASAP7_75t_R \U$183 (
- .A(a[61]),
- .B(b[61]),
- .CON(\con$257 ),
- .SN(\sn$258 )
- );
- INVx1_ASAP7_75t_R \U$184 (
- .A(\con$257 ),
- .Y(\$signal$324 )
- );
- INVx1_ASAP7_75t_R \U$185 (
- .A(\sn$258 ),
- .Y(\$signal$126 )
- );
- HAxp5_ASAP7_75t_R \U$186 (
- .A(a[62]),
- .B(b[62]),
- .CON(\con$259 ),
- .SN(\sn$260 )
- );
- INVx1_ASAP7_75t_R \U$187 (
- .A(\con$259 ),
- .Y(\$signal$325 )
- );
- INVx1_ASAP7_75t_R \U$188 (
- .A(\sn$260 ),
- .Y(\$signal$128 )
- );
- HAxp5_ASAP7_75t_R \U$189 (
- .A(a[63]),
- .B(b[63]),
- .CON(\con$261 ),
- .SN(\sn$262 )
- );
- INVx1_ASAP7_75t_R \U$19 (
- .A(\con$147 ),
- .Y(\$signal$269 )
- );
- INVx1_ASAP7_75t_R \U$190 (
- .A(\con$261 ),
- .Y(\$signal$326 )
- );
- INVx1_ASAP7_75t_R \U$191 (
- .A(\sn$262 ),
- .Y(\$signal$130 )
- );
- AND2x2_ASAP7_75t_R \U$192 (
- .A(\$signal$6 ),
- .B(\$signal ),
- .Y(\p_new$328 )
- );
- AO21x1_ASAP7_75t_R \U$193 (
- .A1(\$signal$6 ),
- .A2(\$signal$263 ),
- .B(\$signal$264 ),
- .Y(g_new)
- );
- AND2x2_ASAP7_75t_R \U$194 (
- .A(\$signal$10 ),
- .B(\$signal$8 ),
- .Y(p_new)
- );
- AO21x1_ASAP7_75t_R \U$195 (
- .A1(\$signal$10 ),
- .A2(\$signal$265 ),
- .B(\$signal$266 ),
- .Y(\g_new$330 )
- );
- AND2x2_ASAP7_75t_R \U$196 (
- .A(\$signal$14 ),
- .B(\$signal$12 ),
- .Y(\p_new$332 )
- );
- AO21x1_ASAP7_75t_R \U$197 (
- .A1(\$signal$14 ),
- .A2(\$signal$267 ),
- .B(\$signal$268 ),
- .Y(\g_new$333 )
- );
- AND2x2_ASAP7_75t_R \U$198 (
- .A(\$signal$18 ),
- .B(\$signal$16 ),
- .Y(\p_new$331 )
- );
- AO21x1_ASAP7_75t_R \U$199 (
- .A1(\$signal$18 ),
- .A2(\$signal$269 ),
- .B(\$signal$270 ),
- .Y(\g_new$334 )
- );
- INVx1_ASAP7_75t_R \U$2 (
- .A(sn),
- .Y(\$signal )
- );
- INVx1_ASAP7_75t_R \U$20 (
- .A(\sn$148 ),
- .Y(\$signal$16 )
- );
- AND2x2_ASAP7_75t_R \U$200 (
- .A(\$signal$22 ),
- .B(\$signal$20 ),
- .Y(\p_new$336 )
- );
- AO21x1_ASAP7_75t_R \U$201 (
- .A1(\$signal$22 ),
- .A2(\$signal$271 ),
- .B(\$signal$272 ),
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- AND2x2_ASAP7_75t_R \U$316 (
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- AO21x1_ASAP7_75t_R \U$317 (
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- .A2(\g_new$441 ),
- .B(\g_new$429 ),
- .Y(\g_new$452 )
- );
- INVx1_ASAP7_75t_R \U$32 (
- .A(\sn$156 ),
- .Y(\$signal$24 )
- );
- AO21x1_ASAP7_75t_R \U$320 (
- .A1(\p_new$432 ),
- .A2(\g_new$449 ),
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- .A1(\p_new$436 ),
- .A2(\g_new$451 ),
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- AO21x1_ASAP7_75t_R \U$322 (
- .A1(\p_new$396 ),
- .A2(\g_new$425 ),
- .B(\g_new$397 ),
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- );
- AO21x1_ASAP7_75t_R \U$323 (
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- .A2(\g_new$441 ),
- .B(\g_new$401 ),
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- );
- AO21x1_ASAP7_75t_R \U$324 (
- .A1(\p_new$404 ),
- .A2(\g_new$452 ),
- .B(\g_new$405 ),
- .Y(\g_new$457 )
- );
- AO21x1_ASAP7_75t_R \U$325 (
- .A1(\p_new$408 ),
- .A2(\g_new$449 ),
- .B(\g_new$409 ),
- .Y(\g_new$458 )
- );
- AO21x1_ASAP7_75t_R \U$326 (
- .A1(\p_new$412 ),
- .A2(\g_new$453 ),
- .B(\g_new$413 ),
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- AO21x1_ASAP7_75t_R \U$327 (
- .A1(\p_new$416 ),
- .A2(\g_new$451 ),
- .B(\g_new$417 ),
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- AO21x1_ASAP7_75t_R \U$328 (
- .A1(\p_new$420 ),
- .A2(\g_new$454 ),
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- );
- AO21x1_ASAP7_75t_R \U$329 (
- .A1(\p_new$332 ),
- .A2(\g_new$393 ),
- .B(\g_new$333 ),
- .Y(\g_new$462 )
- );
- HAxp5_ASAP7_75t_R \U$33 (
- .A(a[11]),
- .B(b[11]),
- .CON(\con$157 ),
- .SN(\sn$158 )
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- AO21x1_ASAP7_75t_R \U$330 (
- .A1(\p_new$336 ),
- .A2(\g_new$425 ),
- .B(\g_new$337 ),
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- AO21x1_ASAP7_75t_R \U$331 (
- .A1(\p_new$340 ),
- .A2(\g_new$455 ),
- .B(\g_new$341 ),
- .Y(\g_new$464 )
- );
- AO21x1_ASAP7_75t_R \U$332 (
- .A1(\p_new$344 ),
- .A2(\g_new$441 ),
- .B(\g_new$345 ),
- .Y(\g_new$465 )
- );
- AO21x1_ASAP7_75t_R \U$333 (
- .A1(\p_new$348 ),
- .A2(\g_new$456 ),
- .B(\g_new$349 ),
- .Y(\g_new$466 )
- );
- AO21x1_ASAP7_75t_R \U$334 (
- .A1(\p_new$352 ),
- .A2(\g_new$452 ),
- .B(\g_new$353 ),
- .Y(\g_new$467 )
- );
- AO21x1_ASAP7_75t_R \U$335 (
- .A1(\p_new$356 ),
- .A2(\g_new$457 ),
- .B(\g_new$357 ),
- .Y(\g_new$468 )
- );
- AO21x1_ASAP7_75t_R \U$336 (
- .A1(\p_new$360 ),
- .A2(\g_new$449 ),
- .B(\g_new$361 ),
- .Y(\g_new$469 )
- );
- AO21x1_ASAP7_75t_R \U$337 (
- .A1(\p_new$364 ),
- .A2(\g_new$458 ),
- .B(\g_new$365 ),
- .Y(\g_new$470 )
- );
- AO21x1_ASAP7_75t_R \U$338 (
- .A1(\p_new$368 ),
- .A2(\g_new$453 ),
- .B(\g_new$369 ),
- .Y(\g_new$471 )
- );
- AO21x1_ASAP7_75t_R \U$339 (
- .A1(\p_new$372 ),
- .A2(\g_new$459 ),
- .B(\g_new$373 ),
- .Y(\g_new$472 )
- );
- INVx1_ASAP7_75t_R \U$34 (
- .A(\con$157 ),
- .Y(\$signal$274 )
- );
- AO21x1_ASAP7_75t_R \U$340 (
- .A1(\p_new$376 ),
- .A2(\g_new$451 ),
- .B(\g_new$377 ),
- .Y(\g_new$473 )
- );
- AO21x1_ASAP7_75t_R \U$341 (
- .A1(\p_new$380 ),
- .A2(\g_new$460 ),
- .B(\g_new$381 ),
- .Y(\g_new$474 )
- );
- AO21x1_ASAP7_75t_R \U$342 (
- .A1(\p_new$384 ),
- .A2(\g_new$454 ),
- .B(\g_new$385 ),
- .Y(\g_new$475 )
- );
- AO21x1_ASAP7_75t_R \U$343 (
- .A1(\p_new$388 ),
- .A2(\g_new$461 ),
- .B(\g_new$389 ),
- .Y(\g_new$476 )
- );
- AO21x1_ASAP7_75t_R \U$344 (
- .A1(\$signal$8 ),
- .A2(g_new),
- .B(\$signal$265 ),
- .Y(\g_new$477 )
- );
- AO21x1_ASAP7_75t_R \U$345 (
- .A1(\$signal$12 ),
- .A2(\g_new$393 ),
- .B(\$signal$267 ),
- .Y(\g_new$478 )
- );
- AO21x1_ASAP7_75t_R \U$346 (
- .A1(\$signal$16 ),
- .A2(\g_new$462 ),
- .B(\$signal$269 ),
- .Y(\g_new$479 )
- );
- AO21x1_ASAP7_75t_R \U$347 (
- .A1(\$signal$20 ),
- .A2(\g_new$425 ),
- .B(\$signal$271 ),
- .Y(\g_new$480 )
- );
- AO21x1_ASAP7_75t_R \U$348 (
- .A1(\$signal$24 ),
- .A2(\g_new$463 ),
- .B(\$signal$273 ),
- .Y(\g_new$481 )
- );
- AO21x1_ASAP7_75t_R \U$349 (
- .A1(\$signal$28 ),
- .A2(\g_new$455 ),
- .B(\$signal$275 ),
- .Y(\g_new$482 )
- );
- INVx1_ASAP7_75t_R \U$35 (
- .A(\sn$158 ),
- .Y(\$signal$26 )
- );
- AO21x1_ASAP7_75t_R \U$350 (
- .A1(\$signal$32 ),
- .A2(\g_new$464 ),
- .B(\$signal$277 ),
- .Y(\g_new$483 )
- );
- AO21x1_ASAP7_75t_R \U$351 (
- .A1(\$signal$36 ),
- .A2(\g_new$441 ),
- .B(\$signal$279 ),
- .Y(\g_new$484 )
- );
- AO21x1_ASAP7_75t_R \U$352 (
- .A1(\$signal$40 ),
- .A2(\g_new$465 ),
- .B(\$signal$281 ),
- .Y(\g_new$485 )
- );
- AO21x1_ASAP7_75t_R \U$353 (
- .A1(\$signal$44 ),
- .A2(\g_new$456 ),
- .B(\$signal$283 ),
- .Y(\g_new$486 )
- );
- AO21x1_ASAP7_75t_R \U$354 (
- .A1(\$signal$48 ),
- .A2(\g_new$466 ),
- .B(\$signal$285 ),
- .Y(\g_new$487 )
- );
- AO21x1_ASAP7_75t_R \U$355 (
- .A1(\$signal$52 ),
- .A2(\g_new$452 ),
- .B(\$signal$287 ),
- .Y(\g_new$488 )
- );
- AO21x1_ASAP7_75t_R \U$356 (
- .A1(\$signal$56 ),
- .A2(\g_new$467 ),
- .B(\$signal$289 ),
- .Y(\g_new$489 )
- );
- AO21x1_ASAP7_75t_R \U$357 (
- .A1(\$signal$60 ),
- .A2(\g_new$457 ),
- .B(\$signal$291 ),
- .Y(\g_new$490 )
- );
- AO21x1_ASAP7_75t_R \U$358 (
- .A1(\$signal$64 ),
- .A2(\g_new$468 ),
- .B(\$signal$293 ),
- .Y(\g_new$491 )
- );
- AO21x1_ASAP7_75t_R \U$359 (
- .A1(\$signal$68 ),
- .A2(\g_new$449 ),
- .B(\$signal$295 ),
- .Y(\g_new$492 )
- );
- HAxp5_ASAP7_75t_R \U$36 (
- .A(a[12]),
- .B(b[12]),
- .CON(\con$159 ),
- .SN(\sn$160 )
- );
- AO21x1_ASAP7_75t_R \U$360 (
- .A1(\$signal$72 ),
- .A2(\g_new$469 ),
- .B(\$signal$297 ),
- .Y(\g_new$493 )
- );
- AO21x1_ASAP7_75t_R \U$361 (
- .A1(\$signal$76 ),
- .A2(\g_new$458 ),
- .B(\$signal$299 ),
- .Y(\g_new$494 )
- );
- AO21x1_ASAP7_75t_R \U$362 (
- .A1(\$signal$80 ),
- .A2(\g_new$470 ),
- .B(\$signal$301 ),
- .Y(\g_new$495 )
- );
- AO21x1_ASAP7_75t_R \U$363 (
- .A1(\$signal$84 ),
- .A2(\g_new$453 ),
- .B(\$signal$303 ),
- .Y(\g_new$496 )
- );
- AO21x1_ASAP7_75t_R \U$364 (
- .A1(\$signal$88 ),
- .A2(\g_new$471 ),
- .B(\$signal$305 ),
- .Y(\g_new$497 )
- );
- AO21x1_ASAP7_75t_R \U$365 (
- .A1(\$signal$92 ),
- .A2(\g_new$459 ),
- .B(\$signal$307 ),
- .Y(\g_new$498 )
- );
- AO21x1_ASAP7_75t_R \U$366 (
- .A1(\$signal$96 ),
- .A2(\g_new$472 ),
- .B(\$signal$309 ),
- .Y(\g_new$499 )
- );
- AO21x1_ASAP7_75t_R \U$367 (
- .A1(\$signal$100 ),
- .A2(\g_new$451 ),
- .B(\$signal$311 ),
- .Y(\g_new$500 )
- );
- AO21x1_ASAP7_75t_R \U$368 (
- .A1(\$signal$104 ),
- .A2(\g_new$473 ),
- .B(\$signal$313 ),
- .Y(\g_new$501 )
- );
- AO21x1_ASAP7_75t_R \U$369 (
- .A1(\$signal$108 ),
- .A2(\g_new$460 ),
- .B(\$signal$315 ),
- .Y(\g_new$502 )
- );
- INVx1_ASAP7_75t_R \U$37 (
- .A(\con$159 ),
- .Y(\$signal$275 )
- );
- AO21x1_ASAP7_75t_R \U$370 (
- .A1(\$signal$112 ),
- .A2(\g_new$474 ),
- .B(\$signal$317 ),
- .Y(\g_new$503 )
- );
- AO21x1_ASAP7_75t_R \U$371 (
- .A1(\$signal$116 ),
- .A2(\g_new$454 ),
- .B(\$signal$319 ),
- .Y(\g_new$504 )
- );
- AO21x1_ASAP7_75t_R \U$372 (
- .A1(\$signal$120 ),
- .A2(\g_new$475 ),
- .B(\$signal$321 ),
- .Y(\g_new$505 )
- );
- AO21x1_ASAP7_75t_R \U$373 (
- .A1(\$signal$124 ),
- .A2(\g_new$461 ),
- .B(\$signal$323 ),
- .Y(\g_new$506 )
- );
- AO21x1_ASAP7_75t_R \U$374 (
- .A1(\$signal$128 ),
- .A2(\g_new$476 ),
- .B(\$signal$325 ),
- .Y(\g_new$507 )
- );
- XOR2x1_ASAP7_75t_R \U$375 (
- .A(\$signal ),
- .B(1'h0),
- .Y(\$3 )
- );
- XOR2x1_ASAP7_75t_R \U$376 (
- .A(\$signal$6 ),
- .B(\$signal$263 ),
- .Y(\$4 )
- );
- XOR2x1_ASAP7_75t_R \U$377 (
- .A(\$signal$8 ),
- .B(g_new),
- .Y(\$5 )
- );
- XOR2x1_ASAP7_75t_R \U$378 (
- .A(\$signal$10 ),
- .B(\g_new$477 ),
- .Y(\$6 )
- );
- XOR2x1_ASAP7_75t_R \U$379 (
- .A(\$signal$12 ),
- .B(\g_new$393 ),
- .Y(\$7 )
- );
- INVx1_ASAP7_75t_R \U$38 (
- .A(\sn$160 ),
- .Y(\$signal$28 )
- );
- XOR2x1_ASAP7_75t_R \U$380 (
- .A(\$signal$14 ),
- .B(\g_new$478 ),
- .Y(\$8 )
- );
- XOR2x1_ASAP7_75t_R \U$381 (
- .A(\$signal$16 ),
- .B(\g_new$462 ),
- .Y(\$9 )
- );
- XOR2x1_ASAP7_75t_R \U$382 (
- .A(\$signal$18 ),
- .B(\g_new$479 ),
- .Y(\$10 )
- );
- XOR2x1_ASAP7_75t_R \U$383 (
- .A(\$signal$20 ),
- .B(\g_new$425 ),
- .Y(\$11 )
- );
- XOR2x1_ASAP7_75t_R \U$384 (
- .A(\$signal$22 ),
- .B(\g_new$480 ),
- .Y(\$12 )
- );
- XOR2x1_ASAP7_75t_R \U$385 (
- .A(\$signal$24 ),
- .B(\g_new$463 ),
- .Y(\$13 )
- );
- XOR2x1_ASAP7_75t_R \U$386 (
- .A(\$signal$26 ),
- .B(\g_new$481 ),
- .Y(\$14 )
- );
- XOR2x1_ASAP7_75t_R \U$387 (
- .A(\$signal$28 ),
- .B(\g_new$455 ),
- .Y(\$15 )
- );
- XOR2x1_ASAP7_75t_R \U$388 (
- .A(\$signal$30 ),
- .B(\g_new$482 ),
- .Y(\$16 )
- );
- XOR2x1_ASAP7_75t_R \U$389 (
- .A(\$signal$32 ),
- .B(\g_new$464 ),
- .Y(\$17 )
- );
- HAxp5_ASAP7_75t_R \U$39 (
- .A(a[13]),
- .B(b[13]),
- .CON(\con$161 ),
- .SN(\sn$162 )
- );
- XOR2x1_ASAP7_75t_R \U$390 (
- .A(\$signal$34 ),
- .B(\g_new$483 ),
- .Y(\$18 )
- );
- XOR2x1_ASAP7_75t_R \U$391 (
- .A(\$signal$36 ),
- .B(\g_new$441 ),
- .Y(\$19 )
- );
- XOR2x1_ASAP7_75t_R \U$392 (
- .A(\$signal$38 ),
- .B(\g_new$484 ),
- .Y(\$20 )
- );
- XOR2x1_ASAP7_75t_R \U$393 (
- .A(\$signal$40 ),
- .B(\g_new$465 ),
- .Y(\$21 )
- );
- XOR2x1_ASAP7_75t_R \U$394 (
- .A(\$signal$42 ),
- .B(\g_new$485 ),
- .Y(\$22 )
- );
- XOR2x1_ASAP7_75t_R \U$395 (
- .A(\$signal$44 ),
- .B(\g_new$456 ),
- .Y(\$23 )
- );
- XOR2x1_ASAP7_75t_R \U$396 (
- .A(\$signal$46 ),
- .B(\g_new$486 ),
- .Y(\$24 )
- );
- XOR2x1_ASAP7_75t_R \U$397 (
- .A(\$signal$48 ),
- .B(\g_new$466 ),
- .Y(\$25 )
- );
- XOR2x1_ASAP7_75t_R \U$398 (
- .A(\$signal$50 ),
- .B(\g_new$487 ),
- .Y(\$26 )
- );
- XOR2x1_ASAP7_75t_R \U$399 (
- .A(\$signal$52 ),
- .B(\g_new$452 ),
- .Y(\$27 )
- );
- INVx1_ASAP7_75t_R \U$4 (
- .A(\con$137 ),
- .Y(\$signal$264 )
- );
- INVx1_ASAP7_75t_R \U$40 (
- .A(\con$161 ),
- .Y(\$signal$276 )
- );
- XOR2x1_ASAP7_75t_R \U$400 (
- .A(\$signal$54 ),
- .B(\g_new$488 ),
- .Y(\$28 )
- );
- XOR2x1_ASAP7_75t_R \U$401 (
- .A(\$signal$56 ),
- .B(\g_new$467 ),
- .Y(\$29 )
- );
- XOR2x1_ASAP7_75t_R \U$402 (
- .A(\$signal$58 ),
- .B(\g_new$489 ),
- .Y(\$30 )
- );
- XOR2x1_ASAP7_75t_R \U$403 (
- .A(\$signal$60 ),
- .B(\g_new$457 ),
- .Y(\$31 )
- );
- XOR2x1_ASAP7_75t_R \U$404 (
- .A(\$signal$62 ),
- .B(\g_new$490 ),
- .Y(\$32 )
- );
- XOR2x1_ASAP7_75t_R \U$405 (
- .A(\$signal$64 ),
- .B(\g_new$468 ),
- .Y(\$33 )
- );
- XOR2x1_ASAP7_75t_R \U$406 (
- .A(\$signal$66 ),
- .B(\g_new$491 ),
- .Y(\$34 )
- );
- XOR2x1_ASAP7_75t_R \U$407 (
- .A(\$signal$68 ),
- .B(\g_new$449 ),
- .Y(\$35 )
- );
- XOR2x1_ASAP7_75t_R \U$408 (
- .A(\$signal$70 ),
- .B(\g_new$492 ),
- .Y(\$36 )
- );
- XOR2x1_ASAP7_75t_R \U$409 (
- .A(\$signal$72 ),
- .B(\g_new$469 ),
- .Y(\$37 )
- );
- INVx1_ASAP7_75t_R \U$41 (
- .A(\sn$162 ),
- .Y(\$signal$30 )
- );
- XOR2x1_ASAP7_75t_R \U$410 (
- .A(\$signal$74 ),
- .B(\g_new$493 ),
- .Y(\$38 )
- );
- XOR2x1_ASAP7_75t_R \U$411 (
- .A(\$signal$76 ),
- .B(\g_new$458 ),
- .Y(\$39 )
- );
- XOR2x1_ASAP7_75t_R \U$412 (
- .A(\$signal$78 ),
- .B(\g_new$494 ),
- .Y(\$40 )
- );
- XOR2x1_ASAP7_75t_R \U$413 (
- .A(\$signal$80 ),
- .B(\g_new$470 ),
- .Y(\$41 )
- );
- XOR2x1_ASAP7_75t_R \U$414 (
- .A(\$signal$82 ),
- .B(\g_new$495 ),
- .Y(\$42 )
- );
- XOR2x1_ASAP7_75t_R \U$415 (
- .A(\$signal$84 ),
- .B(\g_new$453 ),
- .Y(\$43 )
- );
- XOR2x1_ASAP7_75t_R \U$416 (
- .A(\$signal$86 ),
- .B(\g_new$496 ),
- .Y(\$44 )
- );
- XOR2x1_ASAP7_75t_R \U$417 (
- .A(\$signal$88 ),
- .B(\g_new$471 ),
- .Y(\$45 )
- );
- XOR2x1_ASAP7_75t_R \U$418 (
- .A(\$signal$90 ),
- .B(\g_new$497 ),
- .Y(\$46 )
- );
- XOR2x1_ASAP7_75t_R \U$419 (
- .A(\$signal$92 ),
- .B(\g_new$459 ),
- .Y(\$47 )
- );
- HAxp5_ASAP7_75t_R \U$42 (
- .A(a[14]),
- .B(b[14]),
- .CON(\con$163 ),
- .SN(\sn$164 )
- );
- XOR2x1_ASAP7_75t_R \U$420 (
- .A(\$signal$94 ),
- .B(\g_new$498 ),
- .Y(\$48 )
- );
- XOR2x1_ASAP7_75t_R \U$421 (
- .A(\$signal$96 ),
- .B(\g_new$472 ),
- .Y(\$49 )
- );
- XOR2x1_ASAP7_75t_R \U$422 (
- .A(\$signal$98 ),
- .B(\g_new$499 ),
- .Y(\$50 )
- );
- XOR2x1_ASAP7_75t_R \U$423 (
- .A(\$signal$100 ),
- .B(\g_new$451 ),
- .Y(\$51 )
- );
- XOR2x1_ASAP7_75t_R \U$424 (
- .A(\$signal$102 ),
- .B(\g_new$500 ),
- .Y(\$52 )
- );
- XOR2x1_ASAP7_75t_R \U$425 (
- .A(\$signal$104 ),
- .B(\g_new$473 ),
- .Y(\$53 )
- );
- XOR2x1_ASAP7_75t_R \U$426 (
- .A(\$signal$106 ),
- .B(\g_new$501 ),
- .Y(\$54 )
- );
- XOR2x1_ASAP7_75t_R \U$427 (
- .A(\$signal$108 ),
- .B(\g_new$460 ),
- .Y(\$55 )
- );
- XOR2x1_ASAP7_75t_R \U$428 (
- .A(\$signal$110 ),
- .B(\g_new$502 ),
- .Y(\$56 )
- );
- XOR2x1_ASAP7_75t_R \U$429 (
- .A(\$signal$112 ),
- .B(\g_new$474 ),
- .Y(\$57 )
- );
- INVx1_ASAP7_75t_R \U$43 (
- .A(\con$163 ),
- .Y(\$signal$277 )
- );
- XOR2x1_ASAP7_75t_R \U$430 (
- .A(\$signal$114 ),
- .B(\g_new$503 ),
- .Y(\$58 )
- );
- XOR2x1_ASAP7_75t_R \U$431 (
- .A(\$signal$116 ),
- .B(\g_new$454 ),
- .Y(\$59 )
- );
- XOR2x1_ASAP7_75t_R \U$432 (
- .A(\$signal$118 ),
- .B(\g_new$504 ),
- .Y(\$60 )
- );
- XOR2x1_ASAP7_75t_R \U$433 (
- .A(\$signal$120 ),
- .B(\g_new$475 ),
- .Y(\$61 )
- );
- XOR2x1_ASAP7_75t_R \U$434 (
- .A(\$signal$122 ),
- .B(\g_new$505 ),
- .Y(\$62 )
- );
- XOR2x1_ASAP7_75t_R \U$435 (
- .A(\$signal$124 ),
- .B(\g_new$461 ),
- .Y(\$63 )
- );
- XOR2x1_ASAP7_75t_R \U$436 (
- .A(\$signal$126 ),
- .B(\g_new$506 ),
- .Y(\$64 )
- );
- XOR2x1_ASAP7_75t_R \U$437 (
- .A(\$signal$128 ),
- .B(\g_new$476 ),
- .Y(\$65 )
- );
- XOR2x1_ASAP7_75t_R \U$438 (
- .A(\$signal$130 ),
- .B(\g_new$507 ),
- .Y(\$66 )
- );
- INVx1_ASAP7_75t_R \U$44 (
- .A(\sn$164 ),
- .Y(\$signal$32 )
- );
- HAxp5_ASAP7_75t_R \U$45 (
- .A(a[15]),
- .B(b[15]),
- .CON(\con$165 ),
- .SN(\sn$166 )
- );
- INVx1_ASAP7_75t_R \U$46 (
- .A(\con$165 ),
- .Y(\$signal$278 )
- );
- INVx1_ASAP7_75t_R \U$47 (
- .A(\sn$166 ),
- .Y(\$signal$34 )
- );
- HAxp5_ASAP7_75t_R \U$48 (
- .A(a[16]),
- .B(b[16]),
- .CON(\con$167 ),
- .SN(\sn$168 )
- );
- INVx1_ASAP7_75t_R \U$49 (
- .A(\con$167 ),
- .Y(\$signal$279 )
- );
- INVx1_ASAP7_75t_R \U$5 (
- .A(\sn$138 ),
- .Y(\$signal$6 )
- );
- INVx1_ASAP7_75t_R \U$50 (
- .A(\sn$168 ),
- .Y(\$signal$36 )
- );
- HAxp5_ASAP7_75t_R \U$51 (
- .A(a[17]),
- .B(b[17]),
- .CON(\con$169 ),
- .SN(\sn$170 )
- );
- INVx1_ASAP7_75t_R \U$52 (
- .A(\con$169 ),
- .Y(\$signal$280 )
- );
- INVx1_ASAP7_75t_R \U$53 (
- .A(\sn$170 ),
- .Y(\$signal$38 )
- );
- HAxp5_ASAP7_75t_R \U$54 (
- .A(a[18]),
- .B(b[18]),
- .CON(\con$171 ),
- .SN(\sn$172 )
- );
- INVx1_ASAP7_75t_R \U$55 (
- .A(\con$171 ),
- .Y(\$signal$281 )
- );
- INVx1_ASAP7_75t_R \U$56 (
- .A(\sn$172 ),
- .Y(\$signal$40 )
- );
- HAxp5_ASAP7_75t_R \U$57 (
- .A(a[19]),
- .B(b[19]),
- .CON(\con$173 ),
- .SN(\sn$174 )
- );
- INVx1_ASAP7_75t_R \U$58 (
- .A(\con$173 ),
- .Y(\$signal$282 )
- );
- INVx1_ASAP7_75t_R \U$59 (
- .A(\sn$174 ),
- .Y(\$signal$42 )
- );
- HAxp5_ASAP7_75t_R \U$6 (
- .A(a[2]),
- .B(b[2]),
- .CON(\con$139 ),
- .SN(\sn$140 )
- );
- HAxp5_ASAP7_75t_R \U$60 (
- .A(a[20]),
- .B(b[20]),
- .CON(\con$175 ),
- .SN(\sn$176 )
- );
- INVx1_ASAP7_75t_R \U$61 (
- .A(\con$175 ),
- .Y(\$signal$283 )
- );
- INVx1_ASAP7_75t_R \U$62 (
- .A(\sn$176 ),
- .Y(\$signal$44 )
- );
- HAxp5_ASAP7_75t_R \U$63 (
- .A(a[21]),
- .B(b[21]),
- .CON(\con$177 ),
- .SN(\sn$178 )
- );
- INVx1_ASAP7_75t_R \U$64 (
- .A(\con$177 ),
- .Y(\$signal$284 )
- );
- INVx1_ASAP7_75t_R \U$65 (
- .A(\sn$178 ),
- .Y(\$signal$46 )
- );
- HAxp5_ASAP7_75t_R \U$66 (
- .A(a[22]),
- .B(b[22]),
- .CON(\con$179 ),
- .SN(\sn$180 )
- );
- INVx1_ASAP7_75t_R \U$67 (
- .A(\con$179 ),
- .Y(\$signal$285 )
- );
- INVx1_ASAP7_75t_R \U$68 (
- .A(\sn$180 ),
- .Y(\$signal$48 )
- );
- HAxp5_ASAP7_75t_R \U$69 (
- .A(a[23]),
- .B(b[23]),
- .CON(\con$181 ),
- .SN(\sn$182 )
- );
- INVx1_ASAP7_75t_R \U$7 (
- .A(\con$139 ),
- .Y(\$signal$265 )
- );
- INVx1_ASAP7_75t_R \U$70 (
- .A(\con$181 ),
- .Y(\$signal$286 )
- );
- INVx1_ASAP7_75t_R \U$71 (
- .A(\sn$182 ),
- .Y(\$signal$50 )
- );
- HAxp5_ASAP7_75t_R \U$72 (
- .A(a[24]),
- .B(b[24]),
- .CON(\con$183 ),
- .SN(\sn$184 )
- );
- INVx1_ASAP7_75t_R \U$73 (
- .A(\con$183 ),
- .Y(\$signal$287 )
- );
- INVx1_ASAP7_75t_R \U$74 (
- .A(\sn$184 ),
- .Y(\$signal$52 )
- );
- HAxp5_ASAP7_75t_R \U$75 (
- .A(a[25]),
- .B(b[25]),
- .CON(\con$185 ),
- .SN(\sn$186 )
- );
- INVx1_ASAP7_75t_R \U$76 (
- .A(\con$185 ),
- .Y(\$signal$288 )
- );
- INVx1_ASAP7_75t_R \U$77 (
- .A(\sn$186 ),
- .Y(\$signal$54 )
- );
- HAxp5_ASAP7_75t_R \U$78 (
- .A(a[26]),
- .B(b[26]),
- .CON(\con$187 ),
- .SN(\sn$188 )
- );
- INVx1_ASAP7_75t_R \U$79 (
- .A(\con$187 ),
- .Y(\$signal$289 )
- );
- INVx1_ASAP7_75t_R \U$8 (
- .A(\sn$140 ),
- .Y(\$signal$8 )
- );
- INVx1_ASAP7_75t_R \U$80 (
- .A(\sn$188 ),
- .Y(\$signal$56 )
- );
- HAxp5_ASAP7_75t_R \U$81 (
- .A(a[27]),
- .B(b[27]),
- .CON(\con$189 ),
- .SN(\sn$190 )
- );
- INVx1_ASAP7_75t_R \U$82 (
- .A(\con$189 ),
- .Y(\$signal$290 )
- );
- INVx1_ASAP7_75t_R \U$83 (
- .A(\sn$190 ),
- .Y(\$signal$58 )
- );
- HAxp5_ASAP7_75t_R \U$84 (
- .A(a[28]),
- .B(b[28]),
- .CON(\con$191 ),
- .SN(\sn$192 )
- );
- INVx1_ASAP7_75t_R \U$85 (
- .A(\con$191 ),
- .Y(\$signal$291 )
- );
- INVx1_ASAP7_75t_R \U$86 (
- .A(\sn$192 ),
- .Y(\$signal$60 )
- );
- HAxp5_ASAP7_75t_R \U$87 (
- .A(a[29]),
- .B(b[29]),
- .CON(\con$193 ),
- .SN(\sn$194 )
- );
- INVx1_ASAP7_75t_R \U$88 (
- .A(\con$193 ),
- .Y(\$signal$292 )
- );
- INVx1_ASAP7_75t_R \U$89 (
- .A(\sn$194 ),
- .Y(\$signal$62 )
- );
- HAxp5_ASAP7_75t_R \U$9 (
- .A(a[3]),
- .B(b[3]),
- .CON(\con$141 ),
- .SN(\sn$142 )
- );
- HAxp5_ASAP7_75t_R \U$90 (
- .A(a[30]),
- .B(b[30]),
- .CON(\con$195 ),
- .SN(\sn$196 )
- );
- INVx1_ASAP7_75t_R \U$91 (
- .A(\con$195 ),
- .Y(\$signal$293 )
- );
- INVx1_ASAP7_75t_R \U$92 (
- .A(\sn$196 ),
- .Y(\$signal$64 )
- );
- HAxp5_ASAP7_75t_R \U$93 (
- .A(a[31]),
- .B(b[31]),
- .CON(\con$197 ),
- .SN(\sn$198 )
- );
- INVx1_ASAP7_75t_R \U$94 (
- .A(\con$197 ),
- .Y(\$signal$294 )
- );
- INVx1_ASAP7_75t_R \U$95 (
- .A(\sn$198 ),
- .Y(\$signal$66 )
- );
- HAxp5_ASAP7_75t_R \U$96 (
- .A(a[32]),
- .B(b[32]),
- .CON(\con$199 ),
- .SN(\sn$200 )
- );
- INVx1_ASAP7_75t_R \U$97 (
- .A(\con$199 ),
- .Y(\$signal$295 )
- );
- INVx1_ASAP7_75t_R \U$98 (
- .A(\sn$200 ),
- .Y(\$signal$68 )
- );
- HAxp5_ASAP7_75t_R \U$99 (
- .A(a[33]),
- .B(b[33]),
- .CON(\con$201 ),
- .SN(\sn$202 )
- );
- assign \a$1 = a;
- assign \b$3 = b;
- assign \$signal$5 = \$signal ;
- assign \$signal$7 = \$signal$6 ;
- assign \$signal$9 = \$signal$8 ;
- assign \$signal$11 = \$signal$10 ;
- assign \$signal$13 = \$signal$12 ;
- assign \$signal$15 = \$signal$14 ;
- assign \$signal$17 = \$signal$16 ;
- assign \$signal$19 = \$signal$18 ;
- assign \$signal$21 = \$signal$20 ;
- assign \$signal$23 = \$signal$22 ;
- assign \$signal$25 = \$signal$24 ;
- assign \$signal$27 = \$signal$26 ;
- assign \$signal$29 = \$signal$28 ;
- assign \$signal$31 = \$signal$30 ;
- assign \$signal$33 = \$signal$32 ;
- assign \$signal$35 = \$signal$34 ;
- assign \$signal$37 = \$signal$36 ;
- assign \$signal$39 = \$signal$38 ;
- assign \$signal$41 = \$signal$40 ;
- assign \$signal$43 = \$signal$42 ;
- assign \$signal$45 = \$signal$44 ;
- assign \$signal$47 = \$signal$46 ;
- assign \$signal$49 = \$signal$48 ;
- assign \$signal$51 = \$signal$50 ;
- assign \$signal$53 = \$signal$52 ;
- assign \$signal$55 = \$signal$54 ;
- assign \$signal$57 = \$signal$56 ;
- assign \$signal$59 = \$signal$58 ;
- assign \$signal$61 = \$signal$60 ;
- assign \$signal$63 = \$signal$62 ;
- assign \$signal$65 = \$signal$64 ;
- assign \$signal$67 = \$signal$66 ;
- assign \$signal$69 = \$signal$68 ;
- assign \$signal$71 = \$signal$70 ;
- assign \$signal$73 = \$signal$72 ;
- assign \$signal$75 = \$signal$74 ;
- assign \$signal$77 = \$signal$76 ;
- assign \$signal$79 = \$signal$78 ;
- assign \$signal$81 = \$signal$80 ;
- assign \$signal$83 = \$signal$82 ;
- assign \$signal$85 = \$signal$84 ;
- assign \$signal$87 = \$signal$86 ;
- assign \$signal$89 = \$signal$88 ;
- assign \$signal$91 = \$signal$90 ;
- assign \$signal$93 = \$signal$92 ;
- assign \$signal$95 = \$signal$94 ;
- assign \$signal$97 = \$signal$96 ;
- assign \$signal$99 = \$signal$98 ;
- assign \$signal$101 = \$signal$100 ;
- assign \$signal$103 = \$signal$102 ;
- assign \$signal$105 = \$signal$104 ;
- assign \$signal$107 = \$signal$106 ;
- assign \$signal$109 = \$signal$108 ;
- assign \$signal$111 = \$signal$110 ;
- assign \$signal$113 = \$signal$112 ;
- assign \$signal$115 = \$signal$114 ;
- assign \$signal$117 = \$signal$116 ;
- assign \$signal$119 = \$signal$118 ;
- assign \$signal$121 = \$signal$120 ;
- assign \$signal$123 = \$signal$122 ;
- assign \$signal$125 = \$signal$124 ;
- assign \$signal$127 = \$signal$126 ;
- assign \$signal$129 = \$signal$128 ;
- assign \$signal$131 = \$signal$130 ;
- assign o2 = { \$66 , \$65 , \$64 , \$63 , \$62 , \$61 , \$60 , \$59 , \$58 , \$57 , \$56 , \$55 , \$54 , \$53 , \$52 , \$51 , \$50 , \$49 , \$48 , \$47 , \$46 , \$45 , \$44 , \$43 , \$42 , \$41 , \$40 , \$39 , \$38 , \$37 , \$36 , \$35 , \$34 , \$33 , \$32 , \$31 , \$30 , \$29 , \$28 , \$27 , \$26 , \$25 , \$24 , \$23 , \$22 , \$21 , \$20 , \$19 , \$18 , \$17 , \$16 , \$15 , \$14 , \$13 , \$12 , \$11 , \$10 , \$9 , \$8 , \$7 , \$6 , \$5 , \$4 , \$3 };
- assign o = { \$66 , \$65 , \$64 , \$63 , \$62 , \$61 , \$60 , \$59 , \$58 , \$57 , \$56 , \$55 , \$54 , \$53 , \$52 , \$51 , \$50 , \$49 , \$48 , \$47 , \$46 , \$45 , \$44 , \$43 , \$42 , \$41 , \$40 , \$39 , \$38 , \$37 , \$36 , \$35 , \$34 , \$33 , \$32 , \$31 , \$30 , \$29 , \$28 , \$27 , \$26 , \$25 , \$24 , \$23 , \$22 , \$21 , \$20 , \$19 , \$18 , \$17 , \$16 , \$15 , \$14 , \$13 , \$12 , \$11 , \$10 , \$9 , \$8 , \$7 , \$6 , \$5 , \$4 , \$3 };
- assign \o$134 = { \$66 , \$65 , \$64 , \$63 , \$62 , \$61 , \$60 , \$59 , \$58 , \$57 , \$56 , \$55 , \$54 , \$53 , \$52 , \$51 , \$50 , \$49 , \$48 , \$47 , \$46 , \$45 , \$44 , \$43 , \$42 , \$41 , \$40 , \$39 , \$38 , \$37 , \$36 , \$35 , \$34 , \$33 , \$32 , \$31 , \$30 , \$29 , \$28 , \$27 , \$26 , \$25 , \$24 , \$23 , \$22 , \$21 , \$20 , \$19 , \$18 , \$17 , \$16 , \$15 , \$14 , \$13 , \$12 , \$11 , \$10 , \$9 , \$8 , \$7 , \$6 , \$5 , \$4 , \$3 };
- assign \port$901$0 = \$3 ;
- assign \port$902$0 = \$4 ;
- assign \port$903$0 = \$5 ;
- assign \port$904$0 = \$6 ;
- assign \port$905$0 = \$7 ;
- assign \port$906$0 = \$8 ;
- assign \port$907$0 = \$9 ;
- assign \port$908$0 = \$10 ;
- assign \port$909$0 = \$11 ;
- assign \port$910$0 = \$12 ;
- assign \port$911$0 = \$13 ;
- assign \port$912$0 = \$14 ;
- assign \port$913$0 = \$15 ;
- assign \port$914$0 = \$16 ;
- assign \port$915$0 = \$17 ;
- assign \port$916$0 = \$18 ;
- assign \port$917$0 = \$19 ;
- assign \port$918$0 = \$20 ;
- assign \port$919$0 = \$21 ;
- assign \port$920$0 = \$22 ;
- assign \port$921$0 = \$23 ;
- assign \port$922$0 = \$24 ;
- assign \port$923$0 = \$25 ;
- assign \port$924$0 = \$26 ;
- assign \port$925$0 = \$27 ;
- assign \port$926$0 = \$28 ;
- assign \port$927$0 = \$29 ;
- assign \port$928$0 = \$30 ;
- assign \port$929$0 = \$31 ;
- assign \port$930$0 = \$32 ;
- assign \port$931$0 = \$33 ;
- assign \port$932$0 = \$34 ;
- assign \port$933$0 = \$35 ;
- assign \port$934$0 = \$36 ;
- assign \port$935$0 = \$37 ;
- assign \port$936$0 = \$38 ;
- assign \port$937$0 = \$39 ;
- assign \port$938$0 = \$40 ;
- assign \port$939$0 = \$41 ;
- assign \port$940$0 = \$42 ;
- assign \port$941$0 = \$43 ;
- assign \port$942$0 = \$44 ;
- assign \port$943$0 = \$45 ;
- assign \port$944$0 = \$46 ;
- assign \port$945$0 = \$47 ;
- assign \port$946$0 = \$48 ;
- assign \port$947$0 = \$49 ;
- assign \port$948$0 = \$50 ;
- assign \port$949$0 = \$51 ;
- assign \port$950$0 = \$52 ;
- assign \port$951$0 = \$53 ;
- assign \port$952$0 = \$54 ;
- assign \port$953$0 = \$55 ;
- assign \port$954$0 = \$56 ;
- assign \port$955$0 = \$57 ;
- assign \port$956$0 = \$58 ;
- assign \port$957$0 = \$59 ;
- assign \port$958$0 = \$60 ;
- assign \port$959$0 = \$61 ;
- assign \port$960$0 = \$62 ;
- assign \port$961$0 = \$63 ;
- assign \port$962$0 = \$64 ;
- assign \port$963$0 = \$65 ;
- assign \port$964$0 = \$66 ;
-endmodule
diff --git a/flow/designs/src/mock-array/src/main/scala/MockArray.scala b/flow/designs/src/mock-array/src/main/scala/MockArray.scala
deleted file mode 100644
index c499a734da..0000000000
--- a/flow/designs/src/mock-array/src/main/scala/MockArray.scala
+++ /dev/null
@@ -1,295 +0,0 @@
-// to generate code, run:
-// ../../asap7/mock-array/configure.sh
-
-import chisel3._
-
-import org.scalatest._
-import chiseltest._
-import chiseltest.simulator.SimulatorDebugAnnotation
-import chiseltest.simulator.VerilatorFlags
-import org.scalatest.flatspec.AnyFlatSpec
-
-import chisel3._
-import chisel3.util._
-import chisel3.stage._
-import chisel3.experimental._
-import chisel3.util.HasBlackBoxResource
-import scopt.OParser
-import System.err
-import scopt.RenderingMode
-import scala.collection.immutable.SeqMap
-import java.nio.file.Paths
-
-object Routes extends Enumeration {
- type Routes = Value
-
- val LEFT, UP, RIGHT, DOWN = Value
-}
-
-class RoutesVec(singleElementWidth: Int) extends Record {
- val routes = SeqMap(Routes.values.toSeq.map { bus =>
- bus -> UInt(singleElementWidth.W)
- }: _*)
- val elements = routes.map { case (a, b) => a.toString().toLowerCase() -> b }
-
- def asMap: SeqMap[Routes.Value, UInt] = routes
- def asSeq: Seq[UInt] = routes.map(_._2).toSeq
-}
-
-class BusesVec(singleElementWidth: Int, width: Int, height: Int)
- extends Record {
- val routes = SeqMap(
- Routes.LEFT -> Vec(height, UInt(singleElementWidth.W)),
- Routes.RIGHT -> Vec(height, UInt(singleElementWidth.W)),
- Routes.UP -> Vec(width, UInt(singleElementWidth.W)),
- Routes.DOWN -> Vec(width, UInt(singleElementWidth.W))
- )
- val elements = routes.map { case (a, b) => a.toString().toLowerCase() -> b }
-
- def asMap: SeqMap[Routes.Value, Vec[UInt]] = routes
- def asSeq: Seq[Vec[UInt]] = routes.map(_._2).toSeq
-}
-
-class MockArrayBundle(width: Int, height: Int, singleElementWidth: Int) extends Bundle {
- val ins = Input(new BusesVec(singleElementWidth, width, height))
- val outs = Output(new BusesVec(singleElementWidth, width, height))
- val lsbs = Output(Vec(width * height, Bool()))
-}
-
-// Generated with:
-//
-// vlsi-multiplier --register-input --register-post-ppg --register-post-ppa --register-output --bits=32 --algorithm=brentkung --tech=asap7 --output=multiplier.v
-class Multiplier extends BlackBox with HasBlackBoxResource {
- override def desiredName = "multiplier"
- val io = IO(new Bundle {
- val a = Input(UInt(32.W))
- val b = Input(UInt(32.W))
- val o = Output(UInt(32.W))
- val rst = Input(Bool())
- val clk = Input(Clock())
- })
- addResource("/multiplier.v")
-}
-
-class MockArray(width: Int, height: Int, singleElementWidth: Int)
- extends Module {
- val io = IO(new MockArrayBundle(width, height, singleElementWidth))
-
- class Element extends Module {
- val io =
- IO(new Bundle {
- val ins = Input(new RoutesVec(singleElementWidth))
- val outs = Output(new RoutesVec(singleElementWidth))
-
- val lsbIns = Input(Vec(width, Bool()))
- val lsbOuts = Output(Vec(width, Bool()))
- })
-
- // Registered routing paths
- // left <-> down
- // up <-> right
- (io.outs.asSeq zip (io.ins.asSeq ++ Seq(io.ins.asSeq.head))
- .sliding(2).toSeq.reverse.map(_.map(RegNext(_)))).foreach {
- case (a, b) => a := RegNext({
- val mult = Module(new Multiplier())
- mult.io.a := b(0)
- mult.io.b := b(1)
- // save some area and complexity by not having reset
- mult.io.rst := false.B
- mult.io.clk := clock
- // reduce output bit-width until we slight negative slack
- mult.io.o(15, 0)
- })
- }
-
- // Combinational logic, but a maximum flight path of 4 elements
- val MAX_FLIGHT = 4
- io.lsbOuts := (io.lsbIns
- .drop(1)
- .reverse
- .sliding(MAX_FLIGHT, MAX_FLIGHT)
- .map { lsbs =>
- if (lsbs.length < MAX_FLIGHT) {
- lsbs
- } else {
- lsbs.dropRight(1) ++ Seq(RegNext(lsbs.last))
- }
- })
- .flatten
- .toSeq
- .reverse ++ Seq(io.outs.asSeq.head(0)(0))
- }
-
- val ces = Seq.fill(height)(Seq.fill(width)(Module(new Element())))
-
- ces.foreach { row =>
- row.head.io.lsbIns := DontCare
- if (row.length > 1) {
- row.sliding(2, 1).foreach { pair =>
- pair(1).io.lsbIns := pair(0).io.lsbOuts
- }
- }
- }
-
- io.lsbs := RegNext(VecInit(ces.map(_.last.io.lsbOuts).flatten))
-
- // Connect inputs to edge element buses
- (ces.map(_.head).map(_.io.ins.asMap(Routes.RIGHT)) zip io.ins.asMap(
- Routes.RIGHT
- )).foreach { case (a, b) => a := b }
- (ces.last.map(_.io.ins.asMap(Routes.DOWN)) zip io.ins.asMap(Routes.DOWN))
- .foreach { case (a, b) => a := b }
- (ces.map(_.last).map(_.io.ins.asMap(Routes.LEFT)) zip io.ins.asMap(
- Routes.LEFT
- )).foreach { case (a, b) => a := b }
- (ces.head.map(_.io.ins.asMap(Routes.UP)) zip io.ins.asMap(Routes.UP))
- .foreach { case (a, b) => a := b }
-
- // Connect edge element buses to outputs
- (ces.map(_.head).map(_.io.outs.asMap(Routes.LEFT)) zip io.outs.asMap(
- Routes.LEFT
- )).foreach { case (a, b) => b := a }
- (ces.last.map(_.io.outs.asMap(Routes.UP)) zip io.outs.asMap(Routes.UP))
- .foreach { case (a, b) => b := a }
- (ces.map(_.last).map(_.io.outs.asMap(Routes.RIGHT)) zip io.outs.asMap(
- Routes.RIGHT
- )).foreach { case (a, b) => b := a }
- (ces.head.map(_.io.outs.asMap(Routes.DOWN)) zip io.outs.asMap(Routes.DOWN))
- .foreach { case (a, b) => b := a }
-
- // Connect neighboring left/right element buses
- (ces.transpose.flatten zip ces.transpose.drop(1).flatten).foreach {
- case (a, b) =>
- a.io.ins.asMap(Routes.LEFT) := b.io.outs.asMap(Routes.LEFT)
- b.io.ins.asMap(Routes.RIGHT) := a.io.outs.asMap(Routes.RIGHT)
- }
-
- // Connect neighboring up/down element buses
- (ces.flatten zip ces.drop(1).flatten).foreach { case (a, b) =>
- a.io.ins.asMap(Routes.DOWN) := b.io.outs.asMap(Routes.DOWN)
- b.io.ins.asMap(Routes.UP) := a.io.outs.asMap(Routes.UP)
- }
-}
-
-case class ArrayConfig(
- width: Int = 8,
- height: Int = 8,
- dataWidth: Int = 8,
- remainingArgs: Seq[String] = Seq.empty
-)
-
-class MockArrayPostSynthesis(width:Int, height:Int, singleElementWidth:Int)
-extends BlackBox with HasBlackBoxPath {
- override def desiredName = "MockArray"
- val io = IO(new Bundle {
- val clock = Input(Clock())
- val reset = Input(Bool())
- val io = new MockArrayBundle(width, height, singleElementWidth)
- })
- val platformDir = sys.env.getOrElse("PLATFORM_DIR", "defaultPath") + "/verilog/stdcell/"
- (Seq("asap7sc7p5t_AO_RVT_TT_201020.v",
- "dff.v",
- "asap7sc7p5t_SIMPLE_RVT_TT_201020.v",
- "asap7sc7p5t_INVBUF_RVT_TT_201020.v",
- "empty.v").map(p=>Paths.get(platformDir + p)) ++
- Seq(
- "MockArrayFinal.v",
- "MockArrayElementFinal.v").map(p=>Paths.get("post/" + p)))
- .foreach(p=> addPath(p.toAbsolutePath().toString()))
-}
-
-class MockArrayTestbench(width:Int, height:Int, singleElementWidth:Int) extends Module {
- val io = IO(new MockArrayBundle(width, height, singleElementWidth))
- val postSynthesis = Module(new MockArrayPostSynthesis(width, height, singleElementWidth))
- postSynthesis.io.io <> io
- postSynthesis.io.reset := reset.asBool
- postSynthesis.io.clock := clock
-}
-
-
-class MockArrayTest(width:Int, height:Int, singleElementWidth:Int) extends AnyFlatSpec with ChiselScalatestTester {
- behavior of "MockArray"
-
- it should "Wiggle some wires" in {
- // find full path foo.v in scala/src/resources
- test(new MockArrayTestbench(width, height, singleElementWidth)).
- withAnnotations(Seq(WriteVcdAnnotation,
- VerilatorBackendAnnotation,
- SimulatorDebugAnnotation,
- // DD flip flops use UDP Tables, unsupported by Verilator
- VerilatorFlags(Seq())
- )) { dut =>
- for (j <- 0 until 5) {
- dut.io.ins.routes.foreach { case (route, vec) =>
- vec.zipWithIndex.foreach { case (wire, i) =>
- wire.poke((i+j).U)
- dut.clock.step(1)
- }
- }
- }
- }
- }
-}
-
-
-object parse {
- def apply(args:Array[String]) : (ArrayConfig, Array[String]) = {
- val builder = OParser.builder[ArrayConfig]
- val parser = {
- import builder._
- OParser.sequence(
- programName("my-program"),
- opt[Int]('w', "width")
- .required()
- .valueName("Array width")
- .action((width, c) => c.copy(width = width))
- .text("input file is required"),
- opt[Int]('h', "height")
- .required()
- .valueName("height")
- .action((height, c) => c.copy(height = height))
- .text("Array height"),
- opt[Int]('d', "dataWidth")
- .required()
- .valueName("dataWidth")
- .action((dataWidth, c) => c.copy(dataWidth = dataWidth))
- .text("data path width")
- )
- }
-
- val (configArgs, afterDelimiter) = args.span(_ != "--")
- val chiselArgs = afterDelimiter.drop(1)
-
-
-
- OParser.parse(parser, configArgs, ArrayConfig()) match {
- case Some(c) =>
- return (c, chiselArgs)
-
- case _ =>
- // arguments are invalid
- OParser.usage(parser, RenderingMode.TwoColumns)
- sys.exit(1)
- }
- }
-
-}
-
-object GenerateMockArray extends App {
- val (c, chiselArgs) = parse(args)
-
- new ChiselStage()
- .execute(
- chiselArgs,
- Seq(
- ChiselGeneratorAnnotation(() =>
- new MockArray(c.width, c.height, c.dataWidth)
- )
- )
- )
-}
-
-object SimulatePostSynthesis extends App {
- val (c, chiselArgs) = parse(args)
- new MockArrayTest(c.width, c.height, c.dataWidth).execute()
-}
diff --git a/flow/platforms/asap7/config.mk b/flow/platforms/asap7/config.mk
index e993b33d6c..a4334ae0df 100644
--- a/flow/platforms/asap7/config.mk
+++ b/flow/platforms/asap7/config.mk
@@ -201,11 +201,6 @@ export DB_FILES += $(realpath $($(CORNER)_DB_FILES))
export TEMPERATURE = $($(CORNER)_TEMPERATURE)
export VOLTAGE = $($(CORNER)_VOLTAGE)
-# FIXME Need merged.lib for now, but ideally it shouldn't be necessary:
-#
-# https://github.com/The-OpenROAD-Project/OpenROAD-flow-scripts/pull/2139
-export DONT_USE_SC_LIB = $(OBJECTS_DIR)/lib/merged.lib
-
# ---------------------------------------------------------
# IR Drop
# ---------------------------------------------------------
diff --git a/flow/platforms/asap7/openRoad/pdn/BLOCKS_grid_strategy.tcl b/flow/platforms/asap7/openRoad/pdn/BLOCKS_grid_strategy.tcl
index d26c62c64b..2c971d7e45 100644
--- a/flow/platforms/asap7/openRoad/pdn/BLOCKS_grid_strategy.tcl
+++ b/flow/platforms/asap7/openRoad/pdn/BLOCKS_grid_strategy.tcl
@@ -15,7 +15,7 @@ set_voltage_domain -name {CORE} -power {VDD} -ground {VSS}
####################################
# standard cell grid
####################################
-define_pdn_grid -name {top} -voltage_domains {CORE}
+define_pdn_grid -name {top} -voltage_domains {CORE} -pins {M6}
add_pdn_stripe -grid {top} -layer {M1} -width {0.018} -pitch {0.54} -offset {0} -followpins
add_pdn_stripe -grid {top} -layer {M2} -width {0.018} -pitch {0.54} -offset {0} -followpins
add_pdn_ring -grid {top} -layers {M5 M6} -widths {0.504 0.544} -spacings {0.096} \
diff --git a/flow/platforms/asap7/openRoad/pdn/BLOCK_grid_strategy.tcl b/flow/platforms/asap7/openRoad/pdn/BLOCK_grid_strategy.tcl
index a5cb2dd041..0b54067ea9 100644
--- a/flow/platforms/asap7/openRoad/pdn/BLOCK_grid_strategy.tcl
+++ b/flow/platforms/asap7/openRoad/pdn/BLOCK_grid_strategy.tcl
@@ -18,7 +18,7 @@ set_voltage_domain -name {CORE} -power {VDD} -ground {VSS}
# put stripe on M5 track
# M4 M5 ring follow stripe width
####################################
-define_pdn_grid -name {top} -voltage_domains {CORE}
+define_pdn_grid -name {top} -voltage_domains {CORE} -pins {M5}
add_pdn_ring -grid {top} -layers {M5 M4} -widths {0.12 0.12} -spacings {0.072} -core_offset {0.084}
diff --git a/flow/platforms/asap7/openRoad/pdn/grid_strategy-M1-M2-M5-M6.tcl b/flow/platforms/asap7/openRoad/pdn/grid_strategy-M1-M2-M5-M6.tcl
index d3bcfa8a67..1202b0fc82 100644
--- a/flow/platforms/asap7/openRoad/pdn/grid_strategy-M1-M2-M5-M6.tcl
+++ b/flow/platforms/asap7/openRoad/pdn/grid_strategy-M1-M2-M5-M6.tcl
@@ -14,7 +14,7 @@ set_voltage_domain -name {CORE} -power {VDD} -ground {VSS}
####################################
# standard cell grid
####################################
-define_pdn_grid -name {top} -voltage_domains {CORE}
+define_pdn_grid -name {top} -voltage_domains {CORE} -pins {M6}
add_pdn_stripe -grid {top} -layer {M1} -width {0.018} -pitch {0.54} -offset {0} -followpins
add_pdn_stripe -grid {top} -layer {M2} -width {0.018} -pitch {0.54} -offset {0} -followpins
add_pdn_stripe -grid {top} -layer {M5} -width {0.12} -spacing {0.072} -pitch {5.4} -offset {0.300}
@@ -29,11 +29,11 @@ add_pdn_connect -grid {top} -layers {M5 M6}
# grid for: CORE_macro_grid_1
####################################
define_pdn_grid -name {CORE_macro_grid_1} -voltage_domains {CORE} -macro \
- -orient {R0 R180 MX MY} -halo {2.0 2.0 2.0 2.0} -cells {.*}
+ -orient {R0 R180 MX MY} -halo {2.0 2.0 2.0 2.0} -default
add_pdn_connect -grid {CORE_macro_grid_1} -layers {M4 M5}
####################################
# grid for: CORE_macro_grid_2
####################################
define_pdn_grid -name {CORE_macro_grid_2} -voltage_domains {CORE} -macro \
- -orient {R90 R270 MXR90 MYR90} -halo {2.0 2.0 2.0 2.0} -cells {.*}
+ -orient {R90 R270 MXR90 MYR90} -halo {2.0 2.0 2.0 2.0} -default
add_pdn_connect -grid {CORE_macro_grid_2} -layers {M4 M5}
diff --git a/flow/platforms/asap7/openRoad/post_mergeLib.py b/flow/platforms/asap7/openRoad/post_mergeLib.py
deleted file mode 100755
index 0269e8ac3b..0000000000
--- a/flow/platforms/asap7/openRoad/post_mergeLib.py
+++ /dev/null
@@ -1,26 +0,0 @@
-#!/usr/bin/env python3
-import sys
-
-mergedFile = sys.argv[1]
-print("Post Merge Lib", mergedFile)
-with open(mergedFile, "r") as f:
- lines = f.readlines()
- f.close()
- fo = open(mergedFile, "w")
- flag_pg = 0
- for line in lines:
- if len(line.split()) < 1:
- fo.write(line)
- continue
- if line.split()[0] == "pg_pin":
- flag_pg = 1
- fo.write(line)
- # fo.write(' direction : input;\n')
- continue
- if flag_pg == 1 and line.split()[0] == "}":
- flag_pg = 0
- fo.write(line)
- continue
- if flag_pg == 1 and line.split()[0] == "direction":
- continue
- fo.write(line)
diff --git a/flow/platforms/gf180/openROAD/pdn/pdn_grid_strategy_7t_6M.cfg b/flow/platforms/gf180/openROAD/pdn/pdn_grid_strategy_7t_6M.cfg
index 3e18739da7..20a1ed4000 100644
--- a/flow/platforms/gf180/openROAD/pdn/pdn_grid_strategy_7t_6M.cfg
+++ b/flow/platforms/gf180/openROAD/pdn/pdn_grid_strategy_7t_6M.cfg
@@ -18,7 +18,7 @@ set_voltage_domain -name {CORE} -power {VDD} -ground {VSS}
####################################
# standard cell grid
####################################
-define_pdn_grid -name {block} -voltage_domains {CORE}
+define_pdn_grid -name {block} -voltage_domains {CORE} -pins {Metal5}
add_pdn_stripe -grid {block} -layer {Metal1} -width {0.600} -pitch {3.92} -offset {0} -followpins
add_pdn_stripe -grid {block} -layer {Metal4} -width {4.480} -spacing {0.56} -pitch {44.8} -offset {22.4}
add_pdn_stripe -grid {block} -layer {Metal5} -width {4.480} -pitch {89.6} -offset {44.8}
diff --git a/flow/platforms/gf180/openROAD/pdn/pdn_grid_strategy_9t_6M.cfg b/flow/platforms/gf180/openROAD/pdn/pdn_grid_strategy_9t_6M.cfg
index 8e023a03fb..513c6fd84a 100644
--- a/flow/platforms/gf180/openROAD/pdn/pdn_grid_strategy_9t_6M.cfg
+++ b/flow/platforms/gf180/openROAD/pdn/pdn_grid_strategy_9t_6M.cfg
@@ -18,7 +18,7 @@ set_voltage_domain -name {CORE} -power {VDD} -ground {VSS}
####################################
# standard cell grid
####################################
-define_pdn_grid -name {block} -voltage_domains {CORE}
+define_pdn_grid -name {block} -voltage_domains {CORE} -pins {Metal5}
add_pdn_stripe -grid {block} -layer {Metal1} -width {0.900} -pitch {5.040} -offset {0} -followpins
add_pdn_stripe -grid {block} -layer {Metal4} -width {4.480} -spacing {0.56} -pitch {44.8} -offset {22.4}
add_pdn_stripe -grid {block} -layer {Metal5} -width {4.480} -pitch {89.6} -offset {44.8}
diff --git a/flow/platforms/ihp-sg13g2/cdl/sg13g2_io.cdl b/flow/platforms/ihp-sg13g2/cdl/sg13g2_io.cdl
index 65b4f4c527..b7a31729f4 100644
--- a/flow/platforms/ihp-sg13g2/cdl/sg13g2_io.cdl
+++ b/flow/platforms/ihp-sg13g2/cdl/sg13g2_io.cdl
@@ -27,581 +27,616 @@
*.MEGA
.PARAM
+*.GLOBAL sub!
+*.PIN sub!
+
************************************************************************
* Library Name: sg13g2_io
-* Cell Name: DCNDiode
+* Cell Name: sg13g2_IOPadIOVss
* View Name: schematic
************************************************************************
-.SUBCKT DCNDiode anode cathode guard
-*.PININFO anode:B cathode:B guard:B
-DD0 anode cathode dantenna m=1 w=1.26u l=27.78u a=35.003p p=58.08u
+.SUBCKT sg13g2_IOPadIOVss iovdd iovss vdd vss
+*.PININFO iovdd:B iovss:B vdd:B vss:B
+DD4 sub! iovss dantenna m=1 w=1.26u l=27.78u a=35.003p p=58.08u
+DD2 sub! iovss dantenna m=1 w=1.26u l=27.78u a=35.003p p=58.08u
+DD3 iovss iovdd dpantenna m=1 w=1.26u l=27.78u a=35.003p p=58.08u
+DD1 iovss iovdd dpantenna m=1 w=1.26u l=27.78u a=35.003p p=58.08u
+XR2 vss sub! / ptap1 r=22.472 A=24.01p Perim=19.6u w=4.9u l=4.9u
+XR0 iovss sub! / ptap1 r=169.45m A=5.487n Perim=296.3u w=74.075u l=74.075u
.ENDS
************************************************************************
* Library Name: sg13g2_io
-* Cell Name: DCPDiode
+* Cell Name: sg13g2_Clamp_N43N43D4R
* View Name: schematic
************************************************************************
-.SUBCKT DCPDiode anode cathode guard
-*.PININFO anode:B cathode:B guard:B
-DD0 anode cathode dpantenna m=1 w=1.26u l=27.78u a=35.003p p=58.08u
+.SUBCKT sg13g2_Clamp_N43N43D4R gate pad tie
+*.PININFO gate:I pad:B tie:B
+MN0<1> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<2> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<3> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<4> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<5> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<6> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<7> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<8> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<9> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<10> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<11> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<12> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<13> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<14> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<15> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<16> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<17> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<18> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<19> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<20> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<21> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<22> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<23> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<24> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<25> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<26> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<27> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<28> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<29> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<30> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<31> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<32> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<33> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<34> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<35> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<36> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<37> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<38> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<39> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<40> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<41> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<42> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<43> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<44> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<45> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<46> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<47> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<48> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<49> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<50> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<51> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<52> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<53> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<54> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<55> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<56> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<57> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<58> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<59> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<60> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<61> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<62> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<63> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<64> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<65> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<66> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<67> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<68> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<69> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<70> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<71> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<72> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<73> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<74> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<75> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<76> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<77> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<78> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<79> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<80> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<81> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<82> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<83> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<84> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<85> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<86> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<87> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<88> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<89> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<90> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<91> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<92> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<93> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<94> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<95> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<96> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<97> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<98> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<99> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<100> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<101> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<102> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<103> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<104> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<105> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<106> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<107> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<108> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<109> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<110> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<111> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<112> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<113> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<114> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<115> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<116> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<117> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<118> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<119> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<120> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<121> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<122> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<123> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<124> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<125> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<126> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<127> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<128> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<129> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<130> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<131> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<132> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<133> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<134> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<135> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<136> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<137> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<138> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<139> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<140> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<141> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<142> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<143> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<144> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<145> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<146> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<147> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<148> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<149> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<150> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<151> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<152> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<153> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<154> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<155> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<156> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<157> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<158> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<159> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<160> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<161> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<162> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<163> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<164> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<165> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<166> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<167> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<168> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<169> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<170> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<171> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0<172> pad gate tie sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+XR0 tie sub! / ptap1 r=9.999 A=65.61p Perim=32.4u w=8.1u l=8.1u
+DD0 sub! gate dantenna m=1 w=480n l=480n a=230.4f p=1.92u
+.ENDS
+
+************************************************************************
+* Library Name: sg13g2_io
+* Cell Name: sg13g2_RCClampResistor
+* View Name: schematic
+************************************************************************
+
+.SUBCKT sg13g2_RCClampResistor pin1 pin2
+*.PININFO pin1:B pin2:B
+RR29 net15 net16 5.239K $SUB=sub! $[res_rppd] m=1 l=20u w=1u ps=180n trise=0.0
++ b=0
+RR28 net20 net21 5.239K $SUB=sub! $[res_rppd] m=1 l=20u w=1u ps=180n trise=0.0
++ b=0
+RR27 net23 net24 5.239K $SUB=sub! $[res_rppd] m=1 l=20u w=1u ps=180n trise=0.0
++ b=0
+RR24 net17 net18 5.239K $SUB=sub! $[res_rppd] m=1 l=20u w=1u ps=180n trise=0.0
++ b=0
+RR23 net16 net17 5.239K $SUB=sub! $[res_rppd] m=1 l=20u w=1u ps=180n trise=0.0
++ b=0
+RR21 net25 pin2 5.239K $SUB=sub! $[res_rppd] m=1 l=20u w=1u ps=180n trise=0.0
++ b=0
+RR20 net22 net23 5.239K $SUB=sub! $[res_rppd] m=1 l=20u w=1u ps=180n trise=0.0
++ b=0
+RR19 net19 net20 5.239K $SUB=sub! $[res_rppd] m=1 l=20u w=1u ps=180n trise=0.0
++ b=0
+RR17 net24 net25 5.239K $SUB=sub! $[res_rppd] m=1 l=20u w=1u ps=180n trise=0.0
++ b=0
+RR16 net21 net22 5.239K $SUB=sub! $[res_rppd] m=1 l=20u w=1u ps=180n trise=0.0
++ b=0
+RR15 net18 net19 5.239K $SUB=sub! $[res_rppd] m=1 l=20u w=1u ps=180n trise=0.0
++ b=0
+RR14 net5 net6 5.239K $SUB=sub! $[res_rppd] m=1 l=20u w=1u ps=180n trise=0.0
++ b=0
+RR13 net8 net9 5.239K $SUB=sub! $[res_rppd] m=1 l=20u w=1u ps=180n trise=0.0
++ b=0
+RR12 net11 net12 5.239K $SUB=sub! $[res_rppd] m=1 l=20u w=1u ps=180n trise=0.0
++ b=0
+RR11 net14 net15 5.239K $SUB=sub! $[res_rppd] m=1 l=20u w=1u ps=180n trise=0.0
++ b=0
+RR10 net2 net3 5.239K $SUB=sub! $[res_rppd] m=1 l=20u w=1u ps=180n trise=0.0
++ b=0
+RR9 net1 net2 5.239K $SUB=sub! $[res_rppd] m=1 l=20u w=1u ps=180n trise=0.0 b=0
+RR8 net13 net14 5.239K $SUB=sub! $[res_rppd] m=1 l=20u w=1u ps=180n trise=0.0
++ b=0
+RR7 net10 net11 5.239K $SUB=sub! $[res_rppd] m=1 l=20u w=1u ps=180n trise=0.0
++ b=0
+RR6 net7 net8 5.239K $SUB=sub! $[res_rppd] m=1 l=20u w=1u ps=180n trise=0.0 b=0
+RR5 net4 net5 5.239K $SUB=sub! $[res_rppd] m=1 l=20u w=1u ps=180n trise=0.0 b=0
+RR4 net12 net13 5.239K $SUB=sub! $[res_rppd] m=1 l=20u w=1u ps=180n trise=0.0
++ b=0
+RR3 net9 net10 5.239K $SUB=sub! $[res_rppd] m=1 l=20u w=1u ps=180n trise=0.0
++ b=0
+RR2 net6 net7 5.239K $SUB=sub! $[res_rppd] m=1 l=20u w=1u ps=180n trise=0.0 b=0
+RR1 net3 net4 5.239K $SUB=sub! $[res_rppd] m=1 l=20u w=1u ps=180n trise=0.0 b=0
+RR0 pin1 net1 5.239K $SUB=sub! $[res_rppd] m=1 l=20u w=1u ps=180n trise=0.0 b=0
.ENDS
************************************************************************
* Library Name: sg13g2_io
-* Cell Name: inv_x1
+* Cell Name: sg13g2_RCClampInverter
* View Name: schematic
************************************************************************
-.SUBCKT inv_x1 i nq vdd vss
-*.PININFO i:I nq:O vdd:B vss:B
-MN0 nq i vss vss sg13_lv_nmos m=1 w=3.93u l=130.00n ng=1
-MP0 nq i vdd vdd sg13_lv_pmos m=1 w=4.41u l=130.00n ng=1
+.SUBCKT sg13g2_RCClampInverter in iovss out supply
+*.PININFO in:B iovss:B out:B supply:B
+MN1 iovss in iovss sub! sg13_hv_nmos m=1 w=126.000u l=9.5u ng=14
+MN0 out in iovss sub! sg13_hv_nmos m=1 w=108.000u l=500.0n ng=12
+XR0 iovss sub! / ptap1 r=9.59 A=68.973p Perim=33.22u w=8.305u l=8.305u
+MP0 out in supply supply sg13_hv_pmos m=1 w=350.000u l=500.0n ng=50
.ENDS
************************************************************************
* Library Name: sg13g2_io
-* Cell Name: LevelUp
+* Cell Name: sg13g2_IOPadVdd
* View Name: schematic
************************************************************************
-.SUBCKT LevelUp i iovdd o vdd vss
-*.PININFO i:I o:O iovdd:B vdd:B vss:B
-MN0 net2 i vss vss sg13_lv_nmos m=1 w=2.75u l=130.00n ng=1
-MP0 net2 i vdd vdd sg13_lv_pmos m=1 w=4.75u l=130.00n ng=1
-MN3 o net4 vss vss sg13_hv_nmos m=1 w=1.9u l=450.00n ng=1
-MN2 net4 i vss vss sg13_hv_nmos m=1 w=1.9u l=450.00n ng=1
-MN1 net3 net2 vss vss sg13_hv_nmos m=1 w=1.9u l=450.00n ng=1
-MP3 o net4 iovdd iovdd sg13_hv_pmos m=1 w=3.9u l=450.00n ng=1
-MP2 net3 net4 iovdd iovdd sg13_hv_pmos m=1 w=300.0n l=450.00n ng=1
-MP1 net4 net3 iovdd iovdd sg13_hv_pmos m=1 w=300.0n l=450.00n ng=1
+.SUBCKT sg13g2_IOPadVdd iovdd iovss vdd vss
+*.PININFO iovdd:B iovss:B vdd:B vss:B
+XI0 net2 vdd iovss / sg13g2_Clamp_N43N43D4R
+XI2 vdd net1 / sg13g2_RCClampResistor
+XR1 iovss sub! / ptap1 r=456.33m A=1.97n Perim=177.54u w=44.385u l=44.385u
+XR0 vss sub! / ptap1 r=22.472 A=24.01p Perim=19.6u w=4.9u l=4.9u
+XI1 net1 iovss net2 vdd / sg13g2_RCClampInverter
.ENDS
************************************************************************
* Library Name: sg13g2_io
-* Cell Name: nor2_x1
+* Cell Name: sg13g2_IOPadIOVdd
* View Name: schematic
************************************************************************
-.SUBCKT nor2_x1 i0 i1 nq vdd vss
-*.PININFO i0:I i1:I nq:O vdd:B vss:B
-MN0 nq i0 vss vss sg13_lv_nmos m=1 w=3.93u l=130.00n ng=1
-MN1 nq i1 vss vss sg13_lv_nmos m=1 w=3.93u l=130.00n ng=1
-MP1 net1 i0 vdd vdd sg13_lv_pmos m=1 w=4.41u l=130.00n ng=1
-MP0 nq i1 net1 vdd sg13_lv_pmos m=1 w=4.41u l=130.00n ng=1
+.SUBCKT sg13g2_IOPadIOVdd iovdd iovss vdd vss
+*.PININFO iovdd:B iovss:B vdd:B vss:B
+XI0 net2 iovdd iovss / sg13g2_Clamp_N43N43D4R
+XI2 iovdd net1 / sg13g2_RCClampResistor
+XI1 net1 iovss net2 iovdd / sg13g2_RCClampInverter
+XR1 iovss sub! / ptap1 r=449.797m A=2n Perim=178.88u w=44.72u l=44.72u
+XR0 vss sub! / ptap1 r=22.832 A=23.523p Perim=19.4u w=4.85u l=4.85u
.ENDS
************************************************************************
* Library Name: sg13g2_io
-* Cell Name: nand2_x1
+* Cell Name: sg13g2_DCNDiode
* View Name: schematic
************************************************************************
-.SUBCKT nand2_x1 i0 i1 nq vdd vss
-*.PININFO i0:I i1:I nq:O vdd:B vss:B
-MP1 nq i1 vdd vdd sg13_lv_pmos m=1 w=4.41u l=130.00n ng=1
-MP0 nq i0 vdd vdd sg13_lv_pmos m=1 w=4.41u l=130.00n ng=1
-MN1 net1 i0 vss vss sg13_lv_nmos m=1 w=3.93u l=130.00n ng=1
-MN0 nq i1 net1 vss sg13_lv_nmos m=1 w=3.93u l=130.00n ng=1
+.SUBCKT sg13g2_DCNDiode anode cathode guard
+*.PININFO anode:B cathode:B guard:B
+DD1 sub! cathode dantenna m=1 w=1.26u l=27.78u a=35.003p p=58.08u
+DD0 sub! cathode dantenna m=1 w=1.26u l=27.78u a=35.003p p=58.08u
+XR0 anode sub! / ptap1 r=5.191 A=141.253p Perim=47.54u w=11.885u l=11.885u
.ENDS
************************************************************************
* Library Name: sg13g2_io
-* Cell Name: GateDecode
+* Cell Name: sg13g2_DCPDiode
* View Name: schematic
************************************************************************
-.SUBCKT GateDecode core en iovdd ngate pgate vdd vss
-*.PININFO core:I en:I ngate:O pgate:O iovdd:B vdd:B vss:B
-XI2 en net3 vdd vss / inv_x1
-XI4 net4 iovdd ngate vdd vss / LevelUp
-XI3 net2 iovdd pgate vdd vss / LevelUp
-XI0 core net3 net4 vdd vss / nor2_x1
-XI1 core en net2 vdd vss / nand2_x1
+.SUBCKT sg13g2_DCPDiode anode cathode guard
+*.PININFO anode:B cathode:B guard:B
+DD1 anode cathode dpantenna m=1 w=1.26u l=27.78u a=35.003p p=58.08u
+DD0 anode cathode dpantenna m=1 w=1.26u l=27.78u a=35.003p p=58.08u
+XR0 guard sub! / ptap1 r=17.289 A=33.524p Perim=23.16u w=5.79u l=5.79u
.ENDS
************************************************************************
* Library Name: sg13g2_io
-* Cell Name: SecondaryProtection
+* Cell Name: sg13g2_IOPadVss
* View Name: schematic
************************************************************************
-.SUBCKT SecondaryProtection core minus pad plus
-*.PININFO core:B minus:B pad:B plus:B
-RR0 pad core rppd 586.899 m=1 l=2u w=1u ps=180n trise=0.0 b=0
-DD0 minus core dantenna m=1 w=780n l=3.1u a=2.418p p=7.76u
-DD1 core plus dpantenna m=1 w=780.00n l=4.98u a=3.884p p=11.52u
+.SUBCKT sg13g2_IOPadVss iovdd iovss vdd vss
+*.PININFO iovdd:B iovss:B vdd:B vss:B
+XI1 iovss vss iovss / sg13g2_DCNDiode
+XI2 vss iovdd iovss / sg13g2_DCPDiode
+XR1 iovss sub! / ptap1 r=174.346m A=5.329n Perim=292u w=73u l=73u
+XR0 vss sub! / ptap1 r=22.832 A=23.523p Perim=19.4u w=4.85u l=4.85u
.ENDS
************************************************************************
* Library Name: sg13g2_io
-* Cell Name: LevelDown
+* Cell Name: sg13g2_Filler4000
* View Name: schematic
************************************************************************
-.SUBCKT LevelDown core iovdd iovss pad vdd vss
-*.PININFO core:O iovdd:B iovss:B pad:B vdd:B vss:B
-XI0 net4 iovss pad iovdd / SecondaryProtection
-MP0 net2 net4 vdd vdd sg13_hv_pmos m=1 w=4.65u l=450.00n ng=1
-MN0 net2 net4 vss vss sg13_hv_nmos m=1 w=2.65u l=450.00n ng=1
-MN1 core net2 vss vss sg13_lv_nmos m=1 w=2.75u l=130.00n ng=1
-MP1 core net2 vdd vdd sg13_lv_pmos m=1 w=4.75u l=130.00n ng=1
+.SUBCKT sg13g2_Filler4000 iovdd iovss vdd vss
+*.PININFO iovdd:B iovss:B vdd:B vss:B
+XR1 vss sub! / ptap1 r=63.078 A=5.856p Perim=9.68u w=2.42u l=2.42u
+XR0 iovss sub! / ptap1 r=625.742m A=1.416n Perim=150.5u w=37.625u l=37.625u
.ENDS
************************************************************************
* Library Name: sg13g2_io
-* Cell Name: sg13g2_IOPadInOut30mA
+* Cell Name: sg13g2_io_inv_x1
* View Name: schematic
************************************************************************
-.SUBCKT sg13g2_IOPadInOut30mA c2p c2p_en iovdd iovss p2c pad vdd vss
-*.PININFO c2p:I c2p_en:I p2c:O iovdd:B iovss:B pad:B vdd:B vss:B
-XI3 iovss pad iovdd / DCNDiode
-XI2 pad iovdd iovss / DCPDiode
-MN0 pad net2 iovss iovss sg13_hv_nmos m=1 w=66.000u l=600.0n ng=15
-MP0 pad net1 iovdd iovdd sg13_hv_pmos m=1 w=199.8u l=600.0n ng=30
-XI0 c2p c2p_en iovdd net2 net1 vdd vss / GateDecode
-XI1 p2c iovdd iovss pad vdd vss / LevelDown
+.SUBCKT sg13g2_io_inv_x1 i nq vdd vss
+*.PININFO i:I nq:O vdd:B vss:B
+MN0 nq i vss sub! sg13_lv_nmos m=1 w=3.93u l=130.00n ng=1
+MP0 nq i vdd vdd sg13_lv_pmos m=1 w=4.41u l=130.00n ng=1
+XR0 vss sub! / ptap1 r=258.978 A=624.1f Perim=3.16u w=790n l=790n
.ENDS
************************************************************************
* Library Name: sg13g2_io
-* Cell Name: LevelUpInv
+* Cell Name: sg13g2_LevelUp
* View Name: schematic
************************************************************************
-.SUBCKT LevelUpInv i iovdd o vdd vss
+.SUBCKT sg13g2_LevelUp i iovdd o vdd vss
*.PININFO i:I o:O iovdd:B vdd:B vss:B
-MN0 net2 i vss vss sg13_lv_nmos m=1 w=2.75u l=130.00n ng=1
+MN0 net2 i vss sub! sg13_lv_nmos m=1 w=2.75u l=130.00n ng=1
MP0 net2 i vdd vdd sg13_lv_pmos m=1 w=4.75u l=130.00n ng=1
-MN3 o net4 vss vss sg13_hv_nmos m=1 w=1.9u l=450.00n ng=1
-MN2 net4 net2 vss vss sg13_hv_nmos m=1 w=1.9u l=450.00n ng=1
-MN1 net3 i vss vss sg13_hv_nmos m=1 w=1.9u l=450.00n ng=1
+MN3 o net4 vss sub! sg13_hv_nmos m=1 w=1.9u l=450.00n ng=1
+MN2 net4 i vss sub! sg13_hv_nmos m=1 w=1.9u l=450.00n ng=1
+MN1 net3 net2 vss sub! sg13_hv_nmos m=1 w=1.9u l=450.00n ng=1
MP3 o net4 iovdd iovdd sg13_hv_pmos m=1 w=3.9u l=450.00n ng=1
MP2 net3 net4 iovdd iovdd sg13_hv_pmos m=1 w=300.0n l=450.00n ng=1
MP1 net4 net3 iovdd iovdd sg13_hv_pmos m=1 w=300.0n l=450.00n ng=1
+XR0 vss sub! / ptap1 r=207.099 A=912.025f Perim=3.82u w=955n l=955n
.ENDS
************************************************************************
* Library Name: sg13g2_io
-* Cell Name: GateLevelUpInv
+* Cell Name: sg13g2_io_nor2_x1
* View Name: schematic
************************************************************************
-.SUBCKT GateLevelUpInv core iovdd ngate pgate vdd vss
-*.PININFO core:I ngate:O pgate:O iovdd:B vdd:B vss:B
-XI1 core iovdd pgate vdd vss / LevelUpInv
-XI0 core iovdd ngate vdd vss / LevelUpInv
+.SUBCKT sg13g2_io_nor2_x1 i0 i1 nq vdd vss
+*.PININFO i0:I i1:I nq:O vdd:B vss:B
+MN0 nq i0 vss sub! sg13_lv_nmos m=1 w=3.93u l=130.00n ng=1
+MN1 nq i1 vss sub! sg13_lv_nmos m=1 w=3.93u l=130.00n ng=1
+MP1 net1 i0 vdd vdd sg13_lv_pmos m=1 w=4.41u l=130.00n ng=1
+MP0 nq i1 net1 vdd sg13_lv_pmos m=1 w=4.41u l=130.00n ng=1
+XR0 vss sub! / ptap1 r=251.534 A=656.1f Perim=3.24u w=810n l=810n
.ENDS
************************************************************************
* Library Name: sg13g2_io
-* Cell Name: sg13g2_IOPadOut4mA
+* Cell Name: sg13g2_io_tie
* View Name: schematic
************************************************************************
-.SUBCKT sg13g2_IOPadOut4mA c2p iovdd iovss pad vdd vss
-*.PININFO c2p:I iovdd:B iovss:B pad:B vdd:B vss:B
-XI6 c2p iovdd net2 net1 vdd vss / GateLevelUpInv
-XI2 pad iovdd iovss / DCPDiode
-MN0 pad net2 iovss iovss sg13_hv_nmos m=1 w=8.8u l=600.0n ng=2
-MP0 pad net1 iovdd iovdd sg13_hv_pmos m=1 w=26.64u l=600.0n ng=4
-XI3 iovss pad iovdd / DCNDiode
+.SUBCKT sg13g2_io_tie vdd vss
+*.PININFO vdd:B vss:B
+XR0 vss sub! / ptap1 r=258.978 A=624.1f Perim=3.16u w=790n l=790n
.ENDS
************************************************************************
* Library Name: sg13g2_io
-* Cell Name: sg13g2_Filler10000
+* Cell Name: sg13g2_io_nand2_x1
* View Name: schematic
************************************************************************
-.SUBCKT sg13g2_Filler10000 iovdd iovss vdd vss
-*.PININFO iovdd:B iovss:B vdd:B vss:B
+.SUBCKT sg13g2_io_nand2_x1 i0 i1 nq vdd vss
+*.PININFO i0:I i1:I nq:O vdd:B vss:B
+MP1 nq i1 vdd vdd sg13_lv_pmos m=1 w=4.41u l=130.00n ng=1
+MP0 nq i0 vdd vdd sg13_lv_pmos m=1 w=4.41u l=130.00n ng=1
+MN1 net1 i0 vss sub! sg13_lv_nmos m=1 w=3.93u l=130.00n ng=1
+MN0 nq i1 net1 sub! sg13_lv_nmos m=1 w=3.93u l=130.00n ng=1
+XR0 vss sub! / ptap1 r=251.534 A=656.1f Perim=3.24u w=810n l=810n
.ENDS
************************************************************************
* Library Name: sg13g2_io
-* Cell Name: sg13g2_IOPadVss
+* Cell Name: sg13g2_GateDecode
* View Name: schematic
************************************************************************
-.SUBCKT sg13g2_IOPadVss iovdd iovss vdd vss
-*.PININFO iovdd:B iovss:B vdd:B vss:B
-XI2 vss iovdd iovss / DCPDiode
-XI1 iovss vss iovss / DCNDiode
+.SUBCKT sg13g2_GateDecode core en iovdd ngate pgate vdd vss
+*.PININFO core:I en:I ngate:O pgate:O iovdd:B vdd:B vss:B
+XI2 en net3 vdd vss / sg13g2_io_inv_x1
+XI4 net4 iovdd ngate vdd vss / sg13g2_LevelUp
+XI3 net2 iovdd pgate vdd vss / sg13g2_LevelUp
+XI0 core net3 net4 vdd vss / sg13g2_io_nor2_x1
+XI5 vdd vss / sg13g2_io_tie
+XI1 core en net2 vdd vss / sg13g2_io_nand2_x1
.ENDS
************************************************************************
* Library Name: sg13g2_io
-* Cell Name: sg13g2_IOPadIOVss
+* Cell Name: sg13g2_Clamp_N2N2D
* View Name: schematic
************************************************************************
-.SUBCKT sg13g2_IOPadIOVss iovdd iovss vdd vss
-*.PININFO iovdd:B iovss:B vdd:B vss:B
-DD2 iovss iovss dantenna m=1 w=1.26u l=27.78u a=35.003p p=58.08u
-DD1 iovss iovdd dpantenna m=1 w=1.26u l=27.78u a=35.003p p=58.08u
+.SUBCKT sg13g2_Clamp_N2N2D gate iovss pad
+*.PININFO gate:B iovss:B pad:B
+XR0 iovss sub! / ptap1 r=11.438 A=55.801p Perim=29.88u w=7.47u l=7.47u
+MN1 iovss gate pad sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+MN0 pad gate iovss sub! sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
+DD0 sub! gate dantenna m=1 w=780.00n l=780.00n a=608.400f p=3.12u
.ENDS
************************************************************************
* Library Name: sg13g2_io
-* Cell Name: sg13g2_IOPadOut16mA
+* Cell Name: sg13g2_Clamp_P2N2D
* View Name: schematic
************************************************************************
-.SUBCKT sg13g2_IOPadOut16mA c2p iovdd iovss pad vdd vss
-*.PININFO c2p:I iovdd:B iovss:B pad:B vdd:B vss:B
-XI6 c2p iovdd net2 net1 vdd vss / GateLevelUpInv
-XI2 pad iovdd iovss / DCPDiode
-MN0 pad net2 iovss iovss sg13_hv_nmos m=1 w=35.2u l=600.0n ng=8
-MP0 pad net1 iovdd iovdd sg13_hv_pmos m=1 w=106.56u l=600.0n ng=16
-XI3 iovss pad iovdd / DCNDiode
+.SUBCKT sg13g2_Clamp_P2N2D gate iovdd iovss pad
+*.PININFO gate:B iovdd:B iovss:B pad:B
+DD0 gate iovdd dpantenna m=1 w=480n l=480n a=230.4f p=1.92u
+MP1 iovdd gate pad iovdd sg13_hv_pmos m=1 w=13.32u l=600.0n ng=2
+MP0 pad gate iovdd iovdd sg13_hv_pmos m=1 w=13.32u l=600.0n ng=2
+XR0 iovss sub! / ptap1 r=9.826 A=66.994p Perim=32.74u w=8.185u l=8.185u
.ENDS
************************************************************************
* Library Name: sg13g2_io
-* Cell Name: RCClampResistor
+* Cell Name: sg13g2_SecondaryProtection
* View Name: schematic
************************************************************************
-.SUBCKT RCClampResistor pin1 pin2
-*.PININFO pin1:B pin2:B
-RR29 net15 net16 rppd 5.239K m=1 l=20u w=1u ps=180n
-+ trise=0.0 b=0
-RR28 net20 net21 rppd 5.239K m=1 l=20u w=1u ps=180n
-+ trise=0.0 b=0
-RR27 net23 net24 rppd 5.239K m=1 l=20u w=1u ps=180n
-+ trise=0.0 b=0
-RR26 net26 net27 rppd 5.239K m=1 l=20u w=1u ps=180n
-+ trise=0.0 b=0
-RR25 net29 pin2 rppd 5.239K m=1 l=20u w=1u ps=180n trise=0.0
-+ b=0
-RR24 net17 net18 rppd 5.239K m=1 l=20u w=1u ps=180n
-+ trise=0.0 b=0
-RR23 net16 net17 rppd 5.239K m=1 l=20u w=1u ps=180n
-+ trise=0.0 b=0
-RR22 net28 net29 rppd 5.239K m=1 l=20u w=1u ps=180n
-+ trise=0.0 b=0
-RR21 net25 net26 rppd 5.239K m=1 l=20u w=1u ps=180n
-+ trise=0.0 b=0
-RR20 net22 net23 rppd 5.239K m=1 l=20u w=1u ps=180n
-+ trise=0.0 b=0
-RR19 net19 net20 rppd 5.239K m=1 l=20u w=1u ps=180n
-+ trise=0.0 b=0
-RR18 net27 net28 rppd 5.239K m=1 l=20u w=1u ps=180n
-+ trise=0.0 b=0
-RR17 net24 net25 rppd 5.239K m=1 l=20u w=1u ps=180n
-+ trise=0.0 b=0
-RR16 net21 net22 rppd 5.239K m=1 l=20u w=1u ps=180n
-+ trise=0.0 b=0
-RR15 net18 net19 rppd 5.239K m=1 l=20u w=1u ps=180n
-+ trise=0.0 b=0
-RR14 net5 net6 rppd 5.239K m=1 l=20u w=1u ps=180n trise=0.0
-+ b=0
-RR13 net8 net9 rppd 5.239K m=1 l=20u w=1u ps=180n trise=0.0
-+ b=0
-RR12 net11 net12 rppd 5.239K m=1 l=20u w=1u ps=180n
-+ trise=0.0 b=0
-RR11 net14 net15 rppd 5.239K m=1 l=20u w=1u ps=180n
-+ trise=0.0 b=0
-RR10 net2 net3 rppd 5.239K m=1 l=20u w=1u ps=180n trise=0.0
-+ b=0
-RR9 net1 net2 rppd 5.239K m=1 l=20u w=1u ps=180n trise=0.0
-+ b=0
-RR8 net13 net14 rppd 5.239K m=1 l=20u w=1u ps=180n trise=0.0
-+ b=0
-RR7 net10 net11 rppd 5.239K m=1 l=20u w=1u ps=180n trise=0.0
-+ b=0
-RR6 net7 net8 rppd 5.239K m=1 l=20u w=1u ps=180n trise=0.0
-+ b=0
-RR5 net4 net5 rppd 5.239K m=1 l=20u w=1u ps=180n trise=0.0
-+ b=0
-RR4 net12 net13 rppd 5.239K m=1 l=20u w=1u ps=180n trise=0.0
-+ b=0
-RR3 net9 net10 rppd 5.239K m=1 l=20u w=1u ps=180n trise=0.0
-+ b=0
-RR2 net6 net7 rppd 5.239K m=1 l=20u w=1u ps=180n trise=0.0
-+ b=0
-RR1 net3 net4 rppd 5.239K m=1 l=20u w=1u ps=180n trise=0.0
-+ b=0
-RR0 pin1 net1 rppd 5.239K m=1 l=20u w=1u ps=180n trise=0.0
-+ b=0
+.SUBCKT sg13g2_SecondaryProtection core minus pad plus
+*.PININFO core:B minus:B pad:B plus:B
+RR0 pad core 586.899 $SUB=sub! $[res_rppd] m=1 l=2u w=1u ps=180n trise=0.0 b=0
+DD0 sub! core dantenna m=1 w=640n l=3.1u a=1.984p p=7.48u
+XR1 minus sub! / ptap1 r=46.556 A=9.03p Perim=12.02u w=3.005u l=3.005u
+DD1 core plus dpantenna m=1 w=640n l=4.98u a=3.187p p=11.24u
.ENDS
************************************************************************
* Library Name: sg13g2_io
-* Cell Name: Clamp_N43N43D4R
+* Cell Name: sg13g2_LevelDown
* View Name: schematic
************************************************************************
-.SUBCKT Clamp_N43N43D4R gate pad tie
-*.PININFO gate:I pad:B tie:B
-MN0<1> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<2> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<3> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<4> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<5> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<6> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<7> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<8> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<9> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<10> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<11> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<12> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<13> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<14> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<15> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<16> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<17> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<18> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<19> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<20> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<21> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<22> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<23> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<24> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<25> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<26> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<27> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<28> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<29> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<30> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<31> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<32> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<33> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<34> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<35> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<36> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<37> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<38> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<39> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<40> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<41> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<42> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<43> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<44> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<45> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<46> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<47> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<48> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<49> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<50> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<51> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<52> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<53> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<54> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<55> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<56> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<57> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<58> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<59> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<60> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<61> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<62> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<63> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<64> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<65> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<66> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<67> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<68> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<69> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<70> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<71> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<72> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<73> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<74> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<75> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<76> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<77> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<78> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<79> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<80> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<81> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<82> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<83> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<84> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<85> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<86> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<87> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<88> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<89> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<90> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<91> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<92> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<93> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<94> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<95> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<96> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<97> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<98> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<99> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<100> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<101> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<102> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<103> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<104> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<105> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<106> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<107> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<108> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<109> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<110> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<111> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<112> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<113> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<114> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<115> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<116> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<117> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<118> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<119> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<120> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<121> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<122> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<123> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<124> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<125> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<126> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<127> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<128> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<129> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<130> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<131> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<132> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<133> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<134> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<135> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<136> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<137> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<138> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<139> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<140> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<141> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<142> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<143> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<144> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<145> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<146> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<147> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<148> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<149> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<150> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<151> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<152> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<153> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<154> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<155> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<156> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<157> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<158> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<159> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<160> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<161> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<162> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<163> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<164> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<165> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<166> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<167> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<168> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<169> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<170> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<171> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-MN0<172> pad gate tie tie sg13_hv_nmos m=1 w=4.4u l=600.0n ng=1
-.ENDS
-
-************************************************************************
-* Library Name: sg13g2_io
-* Cell Name: RCClampInverter
-* View Name: schematic
-************************************************************************
-
-.SUBCKT RCClampInverter in iovss out supply
-*.PININFO in:B iovss:B out:B supply:B
-MN1 iovss in iovss iovss sg13_hv_nmos m=1 w=126.000u l=9.5u ng=14
-MN0 out in iovss iovss sg13_hv_nmos m=1 w=108.000u l=500.0n ng=12
-MP0 out in supply supply sg13_hv_pmos m=1 w=350.000u l=500.0n ng=50
+.SUBCKT sg13g2_LevelDown core iovdd iovss pad vdd vss
+*.PININFO core:O iovdd:B iovss:B pad:B vdd:B vss:B
+MP0 net2 net4 vdd vdd sg13_hv_pmos m=1 w=4.65u l=450.00n ng=1
+MN0 net2 net4 vss sub! sg13_hv_nmos m=1 w=2.65u l=450.00n ng=1
+MN1 core net2 vss sub! sg13_lv_nmos m=1 w=2.75u l=130.00n ng=1
+MP1 core net2 vdd vdd sg13_lv_pmos m=1 w=4.75u l=130.00n ng=1
+XR0 vss sub! / ptap1 r=127.332 A=2.016p Perim=5.68u w=1.42u l=1.42u
+XI0 net4 iovss pad iovdd / sg13g2_SecondaryProtection
.ENDS
************************************************************************
* Library Name: sg13g2_io
-* Cell Name: sg13g2_IOPadIOVdd
+* Cell Name: sg13g2_IOPadInOut4mA
* View Name: schematic
************************************************************************
-.SUBCKT sg13g2_IOPadIOVdd iovdd iovss vdd vss
-*.PININFO iovdd:B iovss:B vdd:B vss:B
-XI2 iovdd net1 / RCClampResistor
-XI0 net2 iovdd iovss / Clamp_N43N43D4R
-XI1 net1 iovss net2 iovdd / RCClampInverter
+.SUBCKT sg13g2_IOPadInOut4mA c2p c2p_en iovdd iovss p2c pad vdd vss
+*.PININFO c2p:I c2p_en:I p2c:O iovdd:B iovss:B pad:B vdd:B vss:B
+XI2 pad iovdd iovss / sg13g2_DCPDiode
+XI0 c2p c2p_en iovdd net2 net1 vdd vss / sg13g2_GateDecode
+XI7 net2 iovss pad / sg13g2_Clamp_N2N2D
+XI6 net1 iovdd iovss pad / sg13g2_Clamp_P2N2D
+XI1 p2c iovdd iovss pad vdd vss / sg13g2_LevelDown
+XR1 vss sub! / ptap1 r=26.933 A=18.966p Perim=17.42u w=4.355u l=4.355u
+XR0 iovss sub! / ptap1 r=214.134m A=4.314n Perim=262.72u w=65.68u l=65.68u
+XI3 iovss pad iovdd / sg13g2_DCNDiode
.ENDS
************************************************************************
* Library Name: sg13g2_io
-* Cell Name: sg13g2_IOPadTriOut30mA
+* Cell Name: sg13g2_Clamp_P15N15D
* View Name: schematic
************************************************************************
-.SUBCKT sg13g2_IOPadTriOut30mA c2p c2p_en iovdd iovss pad vdd vss
-*.PININFO c2p:I c2p_en:I iovdd:B iovss:B pad:B vdd:B vss:B
-XI7 c2p c2p_en iovdd net2 net1 vdd vss / GateDecode
-XI2 pad iovdd iovss / DCPDiode
-MN0 pad net2 iovss iovss sg13_hv_nmos m=1 w=66.000u l=600.0n ng=15
-MP0 pad net1 iovdd iovdd sg13_hv_pmos m=1 w=199.8u l=600.0n ng=30
-XI3 iovss pad iovdd / DCNDiode
+.SUBCKT sg13g2_Clamp_P15N15D gate iovdd iovss pad
+*.PININFO gate:B iovdd:B iovss:B pad:B
+DD0 gate iovdd dpantenna m=1 w=780.00n l=780.00n a=608.400f p=3.12u
+XR0 iovss sub! / ptap1 r=9.826 A=66.994p Perim=32.74u w=8.185u l=8.185u
+MP1 pad gate iovdd iovdd sg13_hv_pmos m=1 w=199.8u l=600.0n ng=30
.ENDS
************************************************************************
* Library Name: sg13g2_io
-* Cell Name: sg13g2_IOPadTriOut16mA
+* Cell Name: sg13g2_Clamp_N15N15D
* View Name: schematic
************************************************************************
-.SUBCKT sg13g2_IOPadTriOut16mA c2p c2p_en iovdd iovss pad vdd vss
-*.PININFO c2p:I c2p_en:I iovdd:B iovss:B pad:B vdd:B vss:B
-XI7 c2p c2p_en iovdd net2 net1 vdd vss / GateDecode
-XI2 pad iovdd iovss / DCPDiode
-MN0 pad net2 iovss iovss sg13_hv_nmos m=1 w=35.2u l=600.0n ng=8
-MP0 pad net1 iovdd iovdd sg13_hv_pmos m=1 w=106.56u l=600.0n ng=16
-XI3 iovss pad iovdd / DCNDiode
+.SUBCKT sg13g2_Clamp_N15N15D gate iovss pad
+*.PININFO gate:B iovss:B pad:B
+XR0 iovss sub! / ptap1 r=11.438 A=55.801p Perim=29.88u w=7.47u l=7.47u
+MN0 pad gate iovss sub! sg13_hv_nmos m=1 w=66.000u l=600.0n ng=15
+DD0 sub! gate dantenna m=1 w=780.00n l=780.00n a=608.400f p=3.12u
.ENDS
************************************************************************
* Library Name: sg13g2_io
-* Cell Name: sg13g2_IOPadInOut16mA
+* Cell Name: sg13g2_IOPadInOut30mA
* View Name: schematic
************************************************************************
-.SUBCKT sg13g2_IOPadInOut16mA c2p c2p_en iovdd iovss p2c pad vdd vss
+.SUBCKT sg13g2_IOPadInOut30mA c2p c2p_en iovdd iovss p2c pad vdd vss
*.PININFO c2p:I c2p_en:I p2c:O iovdd:B iovss:B pad:B vdd:B vss:B
-XI3 iovss pad iovdd / DCNDiode
-XI2 pad iovdd iovss / DCPDiode
-MN0 pad net2 iovss iovss sg13_hv_nmos m=1 w=35.2u l=600.0n ng=8
-MP0 pad net1 iovdd iovdd sg13_hv_pmos m=1 w=106.56u l=600.0n ng=16
-XI0 c2p c2p_en iovdd net2 net1 vdd vss / GateDecode
-XI1 p2c iovdd iovss pad vdd vss / LevelDown
+XI1 p2c iovdd iovss pad vdd vss / sg13g2_LevelDown
+XI2 pad iovdd iovss / sg13g2_DCPDiode
+XI7 net1 iovdd iovss pad / sg13g2_Clamp_P15N15D
+XI3 iovss pad iovdd / sg13g2_DCNDiode
+XI6 net2 iovss pad / sg13g2_Clamp_N15N15D
+XR4 vss sub! / ptap1 r=26.746 A=19.141p Perim=17.5u w=4.375u l=4.375u
+XR3 iovss sub! / ptap1 r=214.165m A=4.313n Perim=262.7u w=65.675u l=65.675u
+XI0 c2p c2p_en iovdd net2 net1 vdd vss / sg13g2_GateDecode
.ENDS
************************************************************************
* Library Name: sg13g2_io
-* Cell Name: sg13g2_Filler200
+* Cell Name: sg13g2_LevelUpInv
* View Name: schematic
************************************************************************
-.SUBCKT sg13g2_Filler200 iovdd iovss vdd vss
-*.PININFO iovdd:B iovss:B vdd:B vss:B
+.SUBCKT sg13g2_LevelUpInv i iovdd o vdd vss
+*.PININFO i:I o:O iovdd:B vdd:B vss:B
+MN0 net2 i vss sub! sg13_lv_nmos m=1 w=2.75u l=130.00n ng=1
+MP0 net2 i vdd vdd sg13_lv_pmos m=1 w=4.75u l=130.00n ng=1
+MN3 o net4 vss sub! sg13_hv_nmos m=1 w=1.9u l=450.00n ng=1
+MN2 net4 net2 vss sub! sg13_hv_nmos m=1 w=1.9u l=450.00n ng=1
+MN1 net3 i vss sub! sg13_hv_nmos m=1 w=1.9u l=450.00n ng=1
+MP3 o net4 iovdd iovdd sg13_hv_pmos m=1 w=3.9u l=450.00n ng=1
+MP2 net3 net4 iovdd iovdd sg13_hv_pmos m=1 w=300.0n l=450.00n ng=1
+MP1 net4 net3 iovdd iovdd sg13_hv_pmos m=1 w=300.0n l=450.00n ng=1
+XR0 vss sub! / ptap1 r=190.268 A=1.051p Perim=4.1u w=1.025u l=1.025u
.ENDS
************************************************************************
* Library Name: sg13g2_io
-* Cell Name: sg13g2_Filler2000
+* Cell Name: sg13g2_GateLevelUpInv
* View Name: schematic
************************************************************************
-.SUBCKT sg13g2_Filler2000 iovdd iovss vdd vss
-*.PININFO iovdd:B iovss:B vdd:B vss:B
+.SUBCKT sg13g2_GateLevelUpInv core iovdd ngate pgate vdd vss
+*.PININFO core:I ngate:O pgate:O iovdd:B vdd:B vss:B
+XI1 core iovdd pgate vdd vss / sg13g2_LevelUpInv
+XI0 core iovdd ngate vdd vss / sg13g2_LevelUpInv
+.ENDS
+
+************************************************************************
+* Library Name: sg13g2_io
+* Cell Name: sg13g2_IOPadOut4mA
+* View Name: schematic
+************************************************************************
+
+.SUBCKT sg13g2_IOPadOut4mA c2p iovdd iovss pad vdd vss
+*.PININFO c2p:I iovdd:B iovss:B pad:B vdd:B vss:B
+XI6 c2p iovdd net2 net1 vdd vss / sg13g2_GateLevelUpInv
+XI7 net1 iovdd iovss pad / sg13g2_Clamp_P2N2D
+XI8 net2 iovss pad / sg13g2_Clamp_N2N2D
+XI3 iovss pad iovdd / sg13g2_DCNDiode
+XI2 pad iovdd iovss / sg13g2_DCPDiode
+XR2 iovss sub! / ptap1 r=212.747m A=4.343n Perim=263.6u w=65.9u l=65.9u
+XR1 vss sub! / ptap1 r=24.125 A=21.902p Perim=18.72u w=4.68u l=4.68u
.ENDS
************************************************************************
@@ -612,78 +647,140 @@ XI1 p2c iovdd iovss pad vdd vss / LevelDown
.SUBCKT sg13g2_IOPadOut30mA c2p iovdd iovss pad vdd vss
*.PININFO c2p:I iovdd:B iovss:B pad:B vdd:B vss:B
-XI6 c2p iovdd net2 net1 vdd vss / GateLevelUpInv
-XI2 pad iovdd iovss / DCPDiode
-MN0 pad net2 iovss iovss sg13_hv_nmos m=1 w=66.000u l=600.0n ng=15
-MP0 pad net1 iovdd iovdd sg13_hv_pmos m=1 w=199.8u l=600.0n ng=30
-XI3 iovss pad iovdd / DCNDiode
+XI6 c2p iovdd net2 net1 vdd vss / sg13g2_GateLevelUpInv
+XI7 net1 iovdd iovss pad / sg13g2_Clamp_P15N15D
+XI8 net2 iovss pad / sg13g2_Clamp_N15N15D
+XI3 iovss pad iovdd / sg13g2_DCNDiode
+XI2 pad iovdd iovss / sg13g2_DCPDiode
+XR1 vss sub! / ptap1 r=24.125 A=21.902p Perim=18.72u w=4.68u l=4.68u
+XR2 iovss sub! / ptap1 r=214.165m A=4.313n Perim=262.7u w=65.675u l=65.675u
.ENDS
************************************************************************
* Library Name: sg13g2_io
-* Cell Name: sg13g2_IOPadInOut4mA
+* Cell Name: sg13g2_IOPadIn
* View Name: schematic
************************************************************************
-.SUBCKT sg13g2_IOPadInOut4mA c2p c2p_en iovdd iovss p2c pad vdd vss
+.SUBCKT sg13g2_IOPadIn iovdd iovss p2c pad vdd vss
+*.PININFO p2c:O iovdd:B iovss:B pad:B vdd:B vss:B
+XI1 p2c iovdd iovss pad vdd vss / sg13g2_LevelDown
+XI3 iovss pad iovdd / sg13g2_DCNDiode
+XI2 pad iovdd iovss / sg13g2_DCPDiode
+XR1 vss sub! / ptap1 r=24.69 A=21.252p Perim=18.44u w=4.61u l=4.61u
+XR2 iovss sub! / ptap1 r=173.674m A=5.35n Perim=292.58u w=73.145u l=73.145u
+.ENDS
+
+************************************************************************
+* Library Name: sg13g2_io
+* Cell Name: sg13g2_Clamp_P8N8D
+* View Name: schematic
+************************************************************************
+
+.SUBCKT sg13g2_Clamp_P8N8D gate iovdd iovss pad
+*.PININFO gate:B iovdd:B iovss:B pad:B
+XR0 iovss sub! / ptap1 r=9.826 A=66.994p Perim=32.74u w=8.185u l=8.185u
+MP0 pad gate iovdd iovdd sg13_hv_pmos m=1 w=106.56u l=600.0n ng=16
+DD0 gate iovdd dpantenna m=1 w=480n l=480n a=230.4f p=1.92u
+.ENDS
+
+************************************************************************
+* Library Name: sg13g2_io
+* Cell Name: sg13g2_Clamp_N8N8D
+* View Name: schematic
+************************************************************************
+
+.SUBCKT sg13g2_Clamp_N8N8D gate iovss pad
+*.PININFO gate:B iovss:B pad:B
+XR0 iovss sub! / ptap1 r=11.438 A=55.801p Perim=29.88u w=7.47u l=7.47u
+MN0 pad gate iovss sub! sg13_hv_nmos m=1 w=35.2u l=600.0n ng=8
+DD0 sub! gate dantenna m=1 w=780.00n l=780.00n a=608.400f p=3.12u
+.ENDS
+
+************************************************************************
+* Library Name: sg13g2_io
+* Cell Name: sg13g2_IOPadInOut16mA
+* View Name: schematic
+************************************************************************
+
+.SUBCKT sg13g2_IOPadInOut16mA c2p c2p_en iovdd iovss p2c pad vdd vss
*.PININFO c2p:I c2p_en:I p2c:O iovdd:B iovss:B pad:B vdd:B vss:B
-XI3 iovss pad iovdd / DCNDiode
-XI2 pad iovdd iovss / DCPDiode
-MN0 pad net2 iovss iovss sg13_hv_nmos m=1 w=8.8u l=600.0n ng=2
-MP0 pad net1 iovdd iovdd sg13_hv_pmos m=1 w=26.64u l=600.0n ng=4
-XI0 c2p c2p_en iovdd net2 net1 vdd vss / GateDecode
-XI1 p2c iovdd iovss pad vdd vss / LevelDown
+XI2 pad iovdd iovss / sg13g2_DCPDiode
+XI0 c2p c2p_en iovdd net2 net1 vdd vss / sg13g2_GateDecode
+XI3 iovss pad iovdd / sg13g2_DCNDiode
+XI7 net1 iovdd iovss pad / sg13g2_Clamp_P8N8D
+XI1 p2c iovdd iovss pad vdd vss / sg13g2_LevelDown
+XI6 net2 iovss pad / sg13g2_Clamp_N8N8D
+XR1 vss sub! / ptap1 r=26.933 A=18.966p Perim=17.42u w=4.355u l=4.355u
+XR0 iovss sub! / ptap1 r=207.756m A=4.45n Perim=266.84u w=66.71u l=66.71u
.ENDS
************************************************************************
* Library Name: sg13g2_io
-* Cell Name: Clamp_N20N0D
+* Cell Name: sg13g2_IOPadOut16mA
* View Name: schematic
************************************************************************
-.SUBCKT Clamp_N20N0D iovss pad
-*.PININFO iovss:B pad:B
-MN0 pad net2 iovss iovss sg13_hv_nmos m=1 w=88.000u l=600.0n ng=20
-RR1 iovss net2 rppd 1.959K m=1 l=3.54u w=500n ps=180n
-+ trise=0.0 b=0
+.SUBCKT sg13g2_IOPadOut16mA c2p iovdd iovss pad vdd vss
+*.PININFO c2p:I iovdd:B iovss:B pad:B vdd:B vss:B
+XI6 c2p iovdd net2 net1 vdd vss / sg13g2_GateLevelUpInv
+XI8 net1 iovdd iovss pad / sg13g2_Clamp_P8N8D
+XI3 iovss pad iovdd / sg13g2_DCNDiode
+XI7 net2 iovss pad / sg13g2_Clamp_N8N8D
+XI2 pad iovdd iovss / sg13g2_DCPDiode
+XR1 vss sub! / ptap1 r=23.888 A=22.184p Perim=18.84u w=4.71u l=4.71u
+XR2 iovss sub! / ptap1 r=208.667m A=4.43n Perim=266.24u w=66.56u l=66.56u
.ENDS
************************************************************************
* Library Name: sg13g2_io
-* Cell Name: Clamp_P20N0D
+* Cell Name: sg13g2_IOPadTriOut4mA
* View Name: schematic
************************************************************************
-.SUBCKT Clamp_P20N0D iovdd iovss pad
-*.PININFO iovdd:B iovss:B pad:B
-MP0 pad net2 iovdd iovdd sg13_hv_pmos m=1 w=266.4u l=600.0n ng=40
-RR0 net2 iovdd rppd 6.768K m=1 l=12.9u w=500n ps=180n
-+ trise=0.0 b=0
+.SUBCKT sg13g2_IOPadTriOut4mA c2p c2p_en iovdd iovss pad vdd vss
+*.PININFO c2p:I c2p_en:I iovdd:B iovss:B pad:B vdd:B vss:B
+XI7 c2p c2p_en iovdd net2 net1 vdd vss / sg13g2_GateDecode
+XI3 iovss pad iovdd / sg13g2_DCNDiode
+XI8 net2 iovss pad / sg13g2_Clamp_N2N2D
+XI9 net1 iovdd iovss pad / sg13g2_Clamp_P2N2D
+XI2 pad iovdd iovss / sg13g2_DCPDiode
+XR1 vss sub! / ptap1 r=24.567 A=21.391p Perim=18.5u w=4.625u l=4.625u
+XR2 iovss sub! / ptap1 r=208.667m A=4.43n Perim=266.24u w=66.56u l=66.56u
.ENDS
************************************************************************
* Library Name: sg13g2_io
-* Cell Name: sg13g2_IOPadAnalog
+* Cell Name: sg13g2_IOPadTriOut16mA
* View Name: schematic
************************************************************************
-.SUBCKT sg13g2_IOPadAnalog iovdd iovss pad padres vdd vss
-*.PININFO iovdd:B iovss:B pad:B padres:B vdd:B vss:B
-XI8 iovss pad / Clamp_N20N0D
-XI9 iovdd iovss pad / Clamp_P20N0D
-XI3 iovss pad iovdd / DCNDiode
-XI2 pad iovdd iovss / DCPDiode
-XI6 padres iovss pad iovdd / SecondaryProtection
+.SUBCKT sg13g2_IOPadTriOut16mA c2p c2p_en iovdd iovss pad vdd vss
+*.PININFO c2p:I c2p_en:I iovdd:B iovss:B pad:B vdd:B vss:B
+XI7 c2p c2p_en iovdd net2 net1 vdd vss / sg13g2_GateDecode
+XI8 net1 iovdd iovss pad / sg13g2_Clamp_P8N8D
+XI9 net2 iovss pad / sg13g2_Clamp_N8N8D
+XI3 iovss pad iovdd / sg13g2_DCNDiode
+XI2 pad iovdd iovss / sg13g2_DCPDiode
+XR1 vss sub! / ptap1 r=24.897 A=21.022p Perim=18.34u w=4.585u l=4.585u
+XR2 iovss sub! / ptap1 r=208.211m A=4.44n Perim=266.54u w=66.635u l=66.635u
.ENDS
************************************************************************
* Library Name: sg13g2_io
-* Cell Name: sg13g2_Filler4000
+* Cell Name: sg13g2_IOPadTriOut30mA
* View Name: schematic
************************************************************************
-.SUBCKT sg13g2_Filler4000 iovdd iovss vdd vss
-*.PININFO iovdd:B iovss:B vdd:B vss:B
+.SUBCKT sg13g2_IOPadTriOut30mA c2p c2p_en iovdd iovss pad vdd vss
+*.PININFO c2p:I c2p_en:I iovdd:B iovss:B pad:B vdd:B vss:B
+XI7 c2p c2p_en iovdd net2 net1 vdd vss / sg13g2_GateDecode
+XI3 iovss pad iovdd / sg13g2_DCNDiode
+XI8 net2 iovss pad / sg13g2_Clamp_N15N15D
+XI9 net1 iovdd iovss pad / sg13g2_Clamp_P15N15D
+XI2 pad iovdd iovss / sg13g2_DCPDiode
+XR1 vss sub! / ptap1 r=24.649 A=21.298p Perim=18.46u w=4.615u l=4.615u
+XR2 iovss sub! / ptap1 r=208.667m A=4.43n Perim=266.24u w=66.56u l=66.56u
.ENDS
************************************************************************
@@ -694,6 +791,8 @@ XI6 padres iovss pad iovdd / SecondaryProtection
.SUBCKT sg13g2_Corner iovdd iovss vdd vss
*.PININFO iovdd:B iovss:B vdd:B vss:B
+XR1 vss sub! / ptap1 r=35.383 A=13.177p Perim=14.52u w=3.63u l=3.63u
+XR0 iovss sub! / ptap1 r=93.041m A=10.13n Perim=402.6u w=100.65u l=100.65u
.ENDS
************************************************************************
@@ -704,54 +803,145 @@ XI6 padres iovss pad iovdd / SecondaryProtection
.SUBCKT sg13g2_Filler400 iovdd iovss vdd vss
*.PININFO iovdd:B iovss:B vdd:B vss:B
+XR1 vss sub! / ptap1 r=246.192 A=680.625f Perim=3.3u w=825n l=825n
+XR0 iovss sub! / ptap1 r=6.246 A=114.169p Perim=42.74u w=10.685u l=10.685u
.ENDS
************************************************************************
* Library Name: sg13g2_io
-* Cell Name: sg13g2_IOPadTriOut4mA
+* Cell Name: sg13g2_Filler200
* View Name: schematic
************************************************************************
-.SUBCKT sg13g2_IOPadTriOut4mA c2p c2p_en iovdd iovss pad vdd vss
-*.PININFO c2p:I c2p_en:I iovdd:B iovss:B pad:B vdd:B vss:B
-XI7 c2p c2p_en iovdd net2 net1 vdd vss / GateDecode
-XI2 pad iovdd iovss / DCPDiode
-MN0 pad net2 iovss iovss sg13_hv_nmos m=1 w=8.8u l=600.0n ng=2
-MP0 pad net1 iovdd iovdd sg13_hv_pmos m=1 w=26.64u l=600.0n ng=4
-XI3 iovss pad iovdd / DCNDiode
+.SUBCKT sg13g2_Filler200 iovdd iovss vdd vss
+*.PININFO iovdd:B iovss:B vdd:B vss:B
+XR1 vss sub! / ptap1 r=246.192 A=680.625f Perim=3.3u w=825n l=825n
+XR0 iovss sub! / ptap1 r=14.724 A=40.96p Perim=25.6u w=6.4u l=6.4u
.ENDS
************************************************************************
* Library Name: sg13g2_io
-* Cell Name: sg13g2_IOPadIn
+* Cell Name: sg13g2_Filler1000
* View Name: schematic
************************************************************************
-.SUBCKT sg13g2_IOPadIn iovdd iovss p2c pad vdd vss
-*.PININFO p2c:O iovdd:B iovss:B pad:B vdd:B vss:B
-XI1 p2c iovdd iovss pad vdd vss / LevelDown
-XI2 pad iovdd iovss / DCPDiode
-XI3 iovss pad iovdd / DCNDiode
+.SUBCKT sg13g2_Filler1000 iovdd iovss vdd vss
+*.PININFO iovdd:B iovss:B vdd:B vss:B
+XR1 vss sub! / ptap1 r=162.013 A=1.369p Perim=4.68u w=1.17u l=1.17u
+XR0 iovss sub! / ptap1 r=2.443 A=328.697p Perim=72.52u w=18.13u l=18.13u
.ENDS
************************************************************************
* Library Name: sg13g2_io
-* Cell Name: sg13g2_IOPadVdd
+* Cell Name: sg13g2_Filler2000
* View Name: schematic
************************************************************************
-.SUBCKT sg13g2_IOPadVdd iovdd iovss vdd vss
+.SUBCKT sg13g2_Filler2000 iovdd iovss vdd vss
*.PININFO iovdd:B iovss:B vdd:B vss:B
-DD1 vdd iovdd dpantenna m=1 w=1.26u l=27.78u a=35.003p p=58.08u
-DD0 iovss vdd dantenna m=1 w=1.26u l=27.78u a=35.003p p=58.08u
+XR1 vss sub! / ptap1 r=101.912 A=2.856p Perim=6.76u w=1.69u l=1.69u
+XR0 iovss sub! / ptap1 r=1.224 A=695.113p Perim=105.46u w=26.365u l=26.365u
.ENDS
************************************************************************
* Library Name: sg13g2_io
-* Cell Name: sg13g2_Filler1000
+* Cell Name: sg13g2_Filler10000
* View Name: schematic
************************************************************************
-.SUBCKT sg13g2_Filler1000 iovdd iovss vdd vss
+.SUBCKT sg13g2_Filler10000 iovdd iovss vdd vss
*.PININFO iovdd:B iovss:B vdd:B vss:B
+XR1 vss sub! / ptap1 r=32.364 A=14.861p Perim=15.42u w=3.855u l=3.855u
+XR0 iovss sub! / ptap1 r=253.731m A=3.622n Perim=240.72u w=60.18u l=60.18u
.ENDS
+
+************************************************************************
+* Library Name: sg13g2_io
+* Cell Name: sg13g2_Clamp_P20N0D
+* View Name: schematic
+************************************************************************
+
+.SUBCKT sg13g2_Clamp_P20N0D iovdd iovss pad
+*.PININFO iovdd:B iovss:B pad:B
+MP0 pad net2 iovdd iovdd sg13_hv_pmos m=1 w=266.4u l=600.0n ng=40
+RR0 net2 iovdd 6.768K $SUB=iovdd $[res_rppd] m=1 l=12.9u w=500n ps=180n
++ trise=0.0 b=0
+XR1 iovss sub! / ptap1 r=9.826 A=66.994p Perim=32.74u w=8.185u l=8.185u
+.ENDS
+
+************************************************************************
+* Library Name: sg13g2_io
+* Cell Name: sg13g2_Clamp_N20N0D
+* View Name: schematic
+************************************************************************
+
+.SUBCKT sg13g2_Clamp_N20N0D iovss pad
+*.PININFO iovss:B pad:B
+MN0 pad net2 iovss sub! sg13_hv_nmos m=1 w=88.000u l=600.0n ng=20
+XR0 iovss sub! / ptap1 r=11.438 A=55.801p Perim=29.88u w=7.47u l=7.47u
+RR1 iovss net2 1.959K $SUB=sub! $[res_rppd] m=1 l=3.54u w=500n ps=180n
++ trise=0.0 b=0
+.ENDS
+
+************************************************************************
+* Library Name: sg13g2_io
+* Cell Name: sg13g2_IOPadAnalog
+* View Name: schematic
+************************************************************************
+
+.SUBCKT sg13g2_IOPadAnalog iovdd iovss pad padres vdd vss
+*.PININFO iovdd:B iovss:B pad:B padres:B vdd:B vss:B
+XI9 iovdd iovss pad / sg13g2_Clamp_P20N0D
+XI3 iovss pad iovdd / sg13g2_DCNDiode
+XI2 pad iovdd iovss / sg13g2_DCPDiode
+XI6 padres iovss pad iovdd / sg13g2_SecondaryProtection
+XI8 iovss pad / sg13g2_Clamp_N20N0D
+XR1 vss sub! / ptap1 r=22.579 A=23.863p Perim=19.54u w=4.885u l=4.885u
+XR2 iovss sub! / ptap1 r=214.8m A=4.3n Perim=262.3u w=65.575u l=65.575u
+.ENDS
+
+************************************************************************
+* Library Name: sg13g2_io
+* Cell Name: sg12g2_Gallery
+* View Name: schematic
+************************************************************************
+
+.SUBCKT sg12g2_Gallery
+*.PININFO
+XI3 iovdd iovss vdd vss / sg13g2_IOPadIOVss
+XI4 iovdd iovss vdd vss / sg13g2_IOPadVdd
+XI2 iovdd iovss vdd vss / sg13g2_IOPadIOVdd
+XI5 iovdd iovss vdd vss / sg13g2_IOPadVss
+XI6<0> iovdd iovss vdd vss / sg13g2_Filler4000
+XI6<1> iovdd iovss vdd vss / sg13g2_Filler4000
+XI6<2> iovdd iovss vdd vss / sg13g2_Filler4000
+XI6<3> iovdd iovss vdd vss / sg13g2_Filler4000
+XI6<4> iovdd iovss vdd vss / sg13g2_Filler4000
+XI6<5> iovdd iovss vdd vss / sg13g2_Filler4000
+XI6<6> iovdd iovss vdd vss / sg13g2_Filler4000
+XI6<7> iovdd iovss vdd vss / sg13g2_Filler4000
+XI6<8> iovdd iovss vdd vss / sg13g2_Filler4000
+XI6<9> iovdd iovss vdd vss / sg13g2_Filler4000
+XI6<10> iovdd iovss vdd vss / sg13g2_Filler4000
+XI6<11> iovdd iovss vdd vss / sg13g2_Filler4000
+XI6<12> iovdd iovss vdd vss / sg13g2_Filler4000
+XI6<13> iovdd iovss vdd vss / sg13g2_Filler4000
+XI9 net6 net5 iovdd iovss net7 net8 vdd vss / sg13g2_IOPadInOut4mA
+XI10 net2 net1 iovdd iovss net3 net4 vdd vss / sg13g2_IOPadInOut30mA
+XI11 net9 iovdd iovss net10 vdd vss / sg13g2_IOPadOut4mA
+XI12 net11 iovdd iovss net12 vdd vss / sg13g2_IOPadOut30mA
+XI13 iovdd iovss net13 net14 vdd vss / sg13g2_IOPadIn
+XI14 net16 net15 iovdd iovss net17 net18 vdd vss / sg13g2_IOPadInOut16mA
+XI15 net19 iovdd iovss net20 vdd vss / sg13g2_IOPadOut16mA
+XI16 net21 net23 iovdd iovss net22 vdd vss / sg13g2_IOPadTriOut4mA
+XI17 net24 net26 iovdd iovss net25 vdd vss / sg13g2_IOPadTriOut16mA
+XI18 net27 net29 iovdd iovss net28 vdd vss / sg13g2_IOPadTriOut30mA
+XI19 iovdd iovss vdd vss / sg13g2_Corner
+XI20 iovdd iovss vdd vss / sg13g2_Filler400
+XI21 iovdd iovss vdd vss / sg13g2_Filler200
+XI22 iovdd iovss vdd vss / sg13g2_Filler1000
+XI23 iovdd iovss vdd vss / sg13g2_Filler2000
+XI24 iovdd iovss vdd vss / sg13g2_Filler10000
+XI25 iovdd iovss net31 net30 vdd vss / sg13g2_IOPadAnalog
+.ENDS
+
diff --git a/flow/platforms/ihp-sg13g2/cdl/sg13g2_stdcell.cdl b/flow/platforms/ihp-sg13g2/cdl/sg13g2_stdcell.cdl
index f0963c1741..782eb87693 100644
--- a/flow/platforms/ihp-sg13g2/cdl/sg13g2_stdcell.cdl
+++ b/flow/platforms/ihp-sg13g2/cdl/sg13g2_stdcell.cdl
@@ -22,7 +22,7 @@
* View Name: schematic
************************************************************************
-.SUBCKT sg13g2_a21o_1 A1 A2 B1 VDD VSS X
+.SUBCKT sg13g2_a21o_1 X A1 A2 B1 VDD VSS
*.PININFO A1:I A2:I B1:I X:O VDD:B VSS:B
MN0 net1 A1 net2 VSS sg13_lv_nmos m=1 w=640.00n l=130.00n ng=1
MN1 net2 A2 VSS VSS sg13_lv_nmos m=1 w=640.00n l=130.00n ng=1
@@ -40,16 +40,16 @@ MP3 X net1 VDD VDD sg13_lv_pmos m=1 w=1.12u l=130.00n ng=1
* View Name: schematic
************************************************************************
-.SUBCKT sg13g2_a21o_2 A1 A2 B1 VDD VSS X
+.SUBCKT sg13g2_a21o_2 X A1 A2 B1 VDD VSS
*.PININFO A1:I A2:I B1:I X:O VDD:B VSS:B
MN0 net1 A1 net2 VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
MN1 net2 A2 VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
MN2 net1 B1 VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
-MN3 X net1 VSS VSS sg13_lv_nmos m=2 w=740.00n l=130.00n ng=1
+MN3 X net1 VSS VSS sg13_lv_nmos m=1 w=1.48u l=130.00n ng=2
MP0 net1 B1 net3 VDD sg13_lv_pmos m=1 w=1.000u l=130.00n ng=1
MP1 net3 A1 VDD VDD sg13_lv_pmos m=1 w=1.000u l=130.00n ng=1
MP2 net3 A2 VDD VDD sg13_lv_pmos m=1 w=1.000u l=130.00n ng=1
-MP3 X net1 VDD VDD sg13_lv_pmos m=2 w=1.12u l=130.00n ng=1
+MP3 X net1 VDD VDD sg13_lv_pmos m=1 w=2.24u l=130.00n ng=2
.ENDS
************************************************************************
@@ -58,7 +58,7 @@ MP3 X net1 VDD VDD sg13_lv_pmos m=2 w=1.12u l=130.00n ng=1
* View Name: schematic
************************************************************************
-.SUBCKT sg13g2_a21oi_1 A1 A2 B1 VDD VSS Y
+.SUBCKT sg13g2_a21oi_1 Y A1 A2 B1 VDD VSS
*.PININFO A1:I A2:I B1:I Y:O VDD:B VSS:B
MMNB0 Y B1 VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
MMNA1 sndA1 A2 VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
@@ -74,14 +74,14 @@ MMPA0 pndA A1 VDD VDD sg13_lv_pmos m=1 w=1.12u l=130.00n ng=1
* View Name: schematic
************************************************************************
-.SUBCKT sg13g2_a21oi_2 A1 A2 B1 VDD VSS Y
+.SUBCKT sg13g2_a21oi_2 Y A1 A2 B1 VDD VSS
*.PININFO A1:I A2:I B1:I Y:O VDD:B VSS:B
-MMNB0 Y B1 VSS VSS sg13_lv_nmos m=2 w=740.00n l=130.00n ng=1
-MMNA1 sndA1 A2 VSS VSS sg13_lv_nmos m=2 w=740.00n l=130.00n ng=1
-MMNA0 Y A1 sndA1 VSS sg13_lv_nmos m=2 w=740.00n l=130.00n ng=1
-MMPB0 Y B1 pndA VDD sg13_lv_pmos m=2 w=1.12u l=130.00n ng=1
-MMPA1 pndA A2 VDD VDD sg13_lv_pmos m=2 w=1.12u l=130.00n ng=1
-MMPA0 pndA A1 VDD VDD sg13_lv_pmos m=2 w=1.12u l=130.00n ng=1
+MMNB0 Y B1 VSS VSS sg13_lv_nmos m=1 w=1.48u l=130.00n ng=2
+MMNA1 sndA1 A2 VSS VSS sg13_lv_nmos m=1 w=1.48u l=130.00n ng=2
+MMNA0 Y A1 sndA1 VSS sg13_lv_nmos m=1 w=1.48u l=130.00n ng=2
+MMPB0 Y B1 pndA VDD sg13_lv_pmos m=1 w=2.24u l=130.00n ng=2
+MMPA1 pndA A2 VDD VDD sg13_lv_pmos m=1 w=2.24u l=130.00n ng=2
+MMPA0 pndA A1 VDD VDD sg13_lv_pmos m=1 w=2.24u l=130.00n ng=2
.ENDS
************************************************************************
@@ -90,7 +90,7 @@ MMPA0 pndA A1 VDD VDD sg13_lv_pmos m=2 w=1.12u l=130.00n ng=1
* View Name: schematic
************************************************************************
-.SUBCKT sg13g2_a221oi_1 A1 A2 B1 B2 C1 VDD VSS Y
+.SUBCKT sg13g2_a221oi_1 Y A1 A2 B1 B2 C1 VDD VSS
*.PININFO A1:I A2:I B1:I B2:I C1:I Y:O VDD:B VSS:B
MMPC0 Y C1 pndB VDD sg13_lv_pmos m=1 w=1.12u l=130.00n ng=1
MMPB1 pndB B2 pndA VDD sg13_lv_pmos m=1 w=1.12u l=130.00n ng=1
@@ -110,13 +110,13 @@ MMNA0 Y A1 sndA1 VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
* View Name: schematic
************************************************************************
-.SUBCKT sg13g2_and2_1 A B VDD VSS X
+.SUBCKT sg13g2_and2_1 X A B VDD VSS
*.PININFO A:I B:I X:O VDD:B VSS:B
MX0 net4 A net2 VSS sg13_lv_nmos m=1 w=640.00n l=130.00n ng=1
MX2 X net4 VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
MX3 net2 B VSS VSS sg13_lv_nmos m=1 w=640.00n l=130.00n ng=1
MX1 net4 B VDD VDD sg13_lv_pmos m=1 w=840.00n l=130.00n ng=1
-MX4 VDD net4 X VDD sg13_lv_pmos m=1 w=1.12e-06 l=130.00n ng=1
+MX4 X net4 VDD VDD sg13_lv_pmos m=1 w=1.12u l=130.00n ng=1
MX5 net4 A VDD VDD sg13_lv_pmos m=1 w=840.00n l=130.00n ng=1
.ENDS
@@ -126,13 +126,13 @@ MX5 net4 A VDD VDD sg13_lv_pmos m=1 w=840.00n l=130.00n ng=1
* View Name: schematic
************************************************************************
-.SUBCKT sg13g2_and2_2 A B VDD VSS X
+.SUBCKT sg13g2_and2_2 X A B VDD VSS
*.PININFO A:I B:I X:O VDD:B VSS:B
MX0 net4 A net2 VSS sg13_lv_nmos m=1 w=640.00n l=130.00n ng=1
-MX2 X net4 VSS VSS sg13_lv_nmos m=2 w=740.00n l=130.00n ng=1
+MX2 X net4 VSS VSS sg13_lv_nmos m=1 w=1.48u l=130.00n ng=2
MX3 net2 B VSS VSS sg13_lv_nmos m=1 w=640.00n l=130.00n ng=1
MX1 net4 B VDD VDD sg13_lv_pmos m=1 w=840.00n l=130.00n ng=1
-MX4 VDD net4 X VDD sg13_lv_pmos m=2 w=1.12u l=130.00n ng=1
+MX4 X net4 VDD VDD sg13_lv_pmos m=1 w=2.24u l=130.00n ng=2
MX5 net4 A VDD VDD sg13_lv_pmos m=1 w=840.00n l=130.00n ng=1
.ENDS
@@ -142,13 +142,13 @@ MX5 net4 A VDD VDD sg13_lv_pmos m=1 w=840.00n l=130.00n ng=1
* View Name: schematic
************************************************************************
-.SUBCKT sg13g2_and3_1 A B C VDD VSS X
+.SUBCKT sg13g2_and3_1 X A B C VDD VSS
*.PININFO A:I B:I C:I X:O VDD:B VSS:B
MX0 net3 C VSS VSS sg13_lv_nmos m=1 w=640.00n l=130.00n ng=1
MX2 X net2 VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
MX5 net2 A net1 VSS sg13_lv_nmos m=1 w=640.00n l=130.00n ng=1
MX6 net1 B net3 VSS sg13_lv_nmos m=1 w=640.00n l=130.00n ng=1
-MX3 X net2 VDD VDD sg13_lv_pmos m=1 w=1.12e-06 l=130.00n ng=1
+MX3 X net2 VDD VDD sg13_lv_pmos m=1 w=1.12u l=130.00n ng=1
MX1 net2 B VDD VDD sg13_lv_pmos m=1 w=840.00n l=130.00n ng=1
MX4 net2 A VDD VDD sg13_lv_pmos m=1 w=840.00n l=130.00n ng=1
MX7 net2 C VDD VDD sg13_lv_pmos m=1 w=840.00n l=130.00n ng=1
@@ -160,13 +160,13 @@ MX7 net2 C VDD VDD sg13_lv_pmos m=1 w=840.00n l=130.00n ng=1
* View Name: schematic
************************************************************************
-.SUBCKT sg13g2_and3_2 A B C VDD VSS X
+.SUBCKT sg13g2_and3_2 X A B C VDD VSS
*.PININFO A:I B:I C:I X:O VDD:B VSS:B
MX0 net3 C VSS VSS sg13_lv_nmos m=1 w=640.00n l=130.00n ng=1
-MX2 X net2 VSS VSS sg13_lv_nmos m=2 w=740.00n l=130.00n ng=1
+MX2 X net2 VSS VSS sg13_lv_nmos m=1 w=1.48u l=130.00n ng=2
MX5 net2 A net1 VSS sg13_lv_nmos m=1 w=640.00n l=130.00n ng=1
MX6 net1 B net3 VSS sg13_lv_nmos m=1 w=640.00n l=130.00n ng=1
-MX3 X net2 VDD VDD sg13_lv_pmos m=2 w=1.12u l=130.00n ng=1
+MX3 X net2 VDD VDD sg13_lv_pmos m=1 w=2.24u l=130.00n ng=2
MX1 net2 B VDD VDD sg13_lv_pmos m=1 w=840.00n l=130.00n ng=1
MX4 net2 A VDD VDD sg13_lv_pmos m=1 w=840.00n l=130.00n ng=1
MX7 net2 C VDD VDD sg13_lv_pmos m=1 w=840.00n l=130.00n ng=1
@@ -178,7 +178,7 @@ MX7 net2 C VDD VDD sg13_lv_pmos m=1 w=840.00n l=130.00n ng=1
* View Name: schematic
************************************************************************
-.SUBCKT sg13g2_and4_1 A B C D VDD VSS X
+.SUBCKT sg13g2_and4_1 X A B C D VDD VSS
*.PININFO A:I B:I C:I D:I X:O VDD:B VSS:B
MN4 net17 D VSS VSS sg13_lv_nmos m=1 w=640.00n l=130.00n ng=1
MN3 net16 C net17 VSS sg13_lv_nmos m=1 w=640.00n l=130.00n ng=1
@@ -198,15 +198,15 @@ MP1 net1 B VDD VDD sg13_lv_pmos m=1 w=840.00n l=130.00n ng=1
* View Name: schematic
************************************************************************
-.SUBCKT sg13g2_and4_2 A B C D VDD VSS X
+.SUBCKT sg13g2_and4_2 X A B C D VDD VSS
*.PININFO A:I B:I C:I D:I X:O VDD:B VSS:B
MN4 net17 D VSS VSS sg13_lv_nmos m=1 w=640.00n l=130.00n ng=1
MN3 net16 C net17 VSS sg13_lv_nmos m=1 w=640.00n l=130.00n ng=1
MN2 net15 B net16 VSS sg13_lv_nmos m=1 w=640.00n l=130.00n ng=1
MN1 net1 A net15 VSS sg13_lv_nmos m=1 w=640.00n l=130.00n ng=1
-MN0 X net1 VSS VSS sg13_lv_nmos m=2 w=740.00n l=130.00n ng=1
+MN0 X net1 VSS VSS sg13_lv_nmos m=1 w=1.48u l=130.00n ng=2
MP0 net1 A VDD VDD sg13_lv_pmos m=1 w=840.00n l=130.00n ng=1
-MP4 X net1 VDD VDD sg13_lv_pmos m=2 w=1.12u l=130.00n ng=1
+MP4 X net1 VDD VDD sg13_lv_pmos m=1 w=2.24u l=130.00n ng=2
MP3 net1 D VDD VDD sg13_lv_pmos m=1 w=840.00n l=130.00n ng=1
MP2 net1 C VDD VDD sg13_lv_pmos m=1 w=840.00n l=130.00n ng=1
MP1 net1 B VDD VDD sg13_lv_pmos m=1 w=840.00n l=130.00n ng=1
@@ -230,7 +230,7 @@ DD0 A VDD dpantenna m=1 w=1.05u l=1.34u a=1.407p p=4.78u
* View Name: schematic
************************************************************************
-.SUBCKT sg13g2_buf_1 A VDD VSS X
+.SUBCKT sg13g2_buf_1 X A VDD VSS
*.PININFO A:I X:O VDD:B VSS:B
MN1 net1 A VSS VSS sg13_lv_nmos m=1 w=550.00n l=130.00n ng=1
MN0 X net1 VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
@@ -244,7 +244,7 @@ MP0 net1 A VDD VDD sg13_lv_pmos m=1 w=840.00n l=130.00n ng=1
* View Name: schematic
************************************************************************
-.SUBCKT sg13g2_buf_16 A VDD VSS X
+.SUBCKT sg13g2_buf_16 X A VDD VSS
*.PININFO A:I X:O VDD:B VSS:B
MN1 net1 A VSS VSS sg13_lv_nmos m=1 w=4.44u l=130.00n ng=6
MN0 X net1 VSS VSS sg13_lv_nmos m=1 w=11.84u l=130.00n ng=16
@@ -258,7 +258,7 @@ MP0 net1 A VDD VDD sg13_lv_pmos m=1 w=6.72u l=130.00n ng=6
* View Name: schematic
************************************************************************
-.SUBCKT sg13g2_buf_2 A VDD VSS X
+.SUBCKT sg13g2_buf_2 X A VDD VSS
*.PININFO A:I X:O VDD:B VSS:B
MN1 net1 A VSS VSS sg13_lv_nmos m=1 w=640.00n l=130.00n ng=1
MN0 X net1 VSS VSS sg13_lv_nmos m=1 w=1.48u l=130.00n ng=2
@@ -272,7 +272,7 @@ MP0 net1 A VDD VDD sg13_lv_pmos m=1 w=1.000u l=130.00n ng=1
* View Name: schematic
************************************************************************
-.SUBCKT sg13g2_buf_4 A VDD VSS X
+.SUBCKT sg13g2_buf_4 X A VDD VSS
*.PININFO A:I X:O VDD:B VSS:B
MN1 net1 A VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
MN0 X net1 VSS VSS sg13_lv_nmos m=1 w=2.96u l=130.00n ng=4
@@ -286,7 +286,7 @@ MP0 net1 A VDD VDD sg13_lv_pmos m=1 w=1.68u l=130.00n ng=2
* View Name: schematic
************************************************************************
-.SUBCKT sg13g2_buf_8 A VDD VSS X
+.SUBCKT sg13g2_buf_8 X A VDD VSS
*.PININFO A:I X:O VDD:B VSS:B
MN1 net1 A VSS VSS sg13_lv_nmos m=1 w=2.22u l=130.00n ng=3
MN0 X net1 VSS VSS sg13_lv_nmos m=1 w=5.92u l=130.00n ng=8
@@ -314,8 +314,8 @@ MX0 VDD VSS VDD VDD sg13_lv_pmos m=1 w=1.000u l=1.000u ng=1
.SUBCKT sg13g2_decap_8 VDD VSS
*.PININFO VDD:B VSS:B
-MX1 VSS VDD VSS VSS sg13_lv_nmos m=2 w=420.00n l=1.000u ng=1
-MX0 VDD VSS VDD VDD sg13_lv_pmos m=2 w=1.000u l=1.000u ng=1
+MX1 VSS VDD VSS VSS sg13_lv_nmos m=1 w=840.00n l=1.000u ng=2
+MX0 VDD VSS VDD VDD sg13_lv_pmos m=1 w=2.000u l=1.000u ng=2
.ENDS
************************************************************************
@@ -324,7 +324,7 @@ MX0 VDD VSS VDD VDD sg13_lv_pmos m=2 w=1.000u l=1.000u ng=1
* View Name: schematic
************************************************************************
-.SUBCKT sg13g2_dfrbp_1 CLK D Q Q_N RESET_B VDD VSS
+.SUBCKT sg13g2_dfrbp_1 Q Q_N CLK D RESET_B VDD VSS
*.PININFO CLK:I D:I RESET_B:I Q:O Q_N:O VDD:B VSS:B
MN13 net12 net2 VSS VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
MN14 net5 clkneg net12 VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
@@ -337,12 +337,12 @@ MN7 Db clkneg net6 VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
MN8 net6 clkpos net9 VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
MN9 net9 net4 net8 VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
MN10 net8 RESET_B VSS VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
-MN11 net4 net6 VSS VSS sg13_lv_nmos m=1 w=640.00n l=130.00n ng=1
+MN11 net4 net6 VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
MN2 clkneg CLK VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
-MN12 net4 clkpos net5 VSS sg13_lv_nmos m=1 w=640.00n l=130.00n ng=1
+MN12 net4 clkpos net5 VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
MN3 clkpos clkneg VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
MN4 Q net1 VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
-MN5 net1 net5 VSS VSS sg13_lv_nmos m=1 w=550.00n l=130.00n ng=1
+MN5 net1 net5 VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
MP14 net5 clkpos net3 VDD sg13_lv_pmos m=1 w=420.00n l=130.00n ng=1
MP15 net2 net5 VDD VDD sg13_lv_pmos m=1 w=420.00n l=130.00n ng=1
MP16 net2 RESET_B VDD VDD sg13_lv_pmos m=1 w=420.00n l=130.00n ng=1
@@ -353,13 +353,13 @@ MP1 Db D VDD VDD sg13_lv_pmos m=1 w=420.00n l=130.00n ng=1
MP8 net7 net4 VDD VDD sg13_lv_pmos m=1 w=420.00n l=130.00n ng=1
MP9 net6 clkneg net7 VDD sg13_lv_pmos m=1 w=420.00n l=130.00n ng=1
MP10 net6 RESET_B VDD VDD sg13_lv_pmos m=1 w=420.00n l=130.00n ng=1
-MP2 clkneg CLK VDD VDD sg13_lv_pmos m=1 w=1.000u l=130.00n ng=1
-MP3 clkpos clkneg VDD VDD sg13_lv_pmos m=1 w=1.000u l=130.00n ng=1
+MP2 clkneg CLK VDD VDD sg13_lv_pmos m=1 w=1.12u l=130.00n ng=1
+MP3 clkpos clkneg VDD VDD sg13_lv_pmos m=1 w=1.12u l=130.00n ng=1
MP11 net4 net6 VDD VDD sg13_lv_pmos m=1 w=1.000u l=130.00n ng=1
MP12 net4 clkneg net5 VDD sg13_lv_pmos m=1 w=1.000u l=130.00n ng=1
MP4 Q net1 VDD VDD sg13_lv_pmos m=1 w=1.12u l=130.00n ng=1
MP13 net3 net2 VDD VDD sg13_lv_pmos m=1 w=420.00n l=130.00n ng=1
-MP5 net1 net5 VDD VDD sg13_lv_pmos m=1 w=840.00n l=130.00n ng=1
+MP5 net1 net5 VDD VDD sg13_lv_pmos m=1 w=1.12u l=130.00n ng=1
.ENDS
************************************************************************
@@ -368,13 +368,13 @@ MP5 net1 net5 VDD VDD sg13_lv_pmos m=1 w=840.00n l=130.00n ng=1
* View Name: schematic
************************************************************************
-.SUBCKT sg13g2_dfrbp_2 CLK D Q Q_N RESET_B VDD VSS
+.SUBCKT sg13g2_dfrbp_2 Q Q_N CLK D RESET_B VDD VSS
*.PININFO CLK:I D:I RESET_B:I Q:O Q_N:O VDD:B VSS:B
MN13 net12 net2 VSS VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
MN14 net5 clkneg net12 VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
MN15 net2 net5 net11 VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
MN16 net11 RESET_B VSS VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
-MN6 Q_N net5 VSS VSS sg13_lv_nmos m=2 w=740.00n l=130.00n ng=1
+MN6 Q_N net5 VSS VSS sg13_lv_nmos m=1 w=1.48u l=130.00n ng=2
MN0 Db D net10 VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
MN1 net10 RESET_B VSS VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
MN7 Db clkneg net6 VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
@@ -385,12 +385,12 @@ MN11 net4 net6 VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
MN2 clkneg CLK VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
MN12 net4 clkpos net5 VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
MN3 clkpos clkneg VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
-MN4 Q net1 VSS VSS sg13_lv_nmos m=2 w=740.00n l=130.00n ng=1
+MN4 Q net1 VSS VSS sg13_lv_nmos m=1 w=1.48u l=130.00n ng=2
MN5 net1 net5 VSS VSS sg13_lv_nmos m=1 w=640.00n l=130.00n ng=1
MP14 net5 clkpos net3 VDD sg13_lv_pmos m=1 w=420.00n l=130.00n ng=1
MP15 net2 net5 VDD VDD sg13_lv_pmos m=1 w=420.00n l=130.00n ng=1
MP16 net2 RESET_B VDD VDD sg13_lv_pmos m=1 w=420.00n l=130.00n ng=1
-MP6 Q_N net5 VDD VDD sg13_lv_pmos m=2 w=1.12u l=130.00n ng=1
+MP6 Q_N net5 VDD VDD sg13_lv_pmos m=1 w=2.24u l=130.00n ng=2
MP7 Db clkpos net6 VDD sg13_lv_pmos m=1 w=420.00n l=130.00n ng=1
MP0 Db RESET_B VDD VDD sg13_lv_pmos m=1 w=420.00n l=130.00n ng=1
MP1 Db D VDD VDD sg13_lv_pmos m=1 w=420.00n l=130.00n ng=1
@@ -401,7 +401,7 @@ MP2 clkneg CLK VDD VDD sg13_lv_pmos m=1 w=1.12u l=130.00n ng=1
MP3 clkpos clkneg VDD VDD sg13_lv_pmos m=1 w=1.12u l=130.00n ng=1
MP11 net4 net6 VDD VDD sg13_lv_pmos m=1 w=1.000u l=130.00n ng=1
MP12 net4 clkneg net5 VDD sg13_lv_pmos m=1 w=1.000u l=130.00n ng=1
-MP4 Q net1 VDD VDD sg13_lv_pmos m=2 w=1.12u l=130.00n ng=1
+MP4 Q net1 VDD VDD sg13_lv_pmos m=1 w=2.24u l=130.00n ng=2
MP13 net3 net2 VDD VDD sg13_lv_pmos m=1 w=420.00n l=130.00n ng=1
MP5 net1 net5 VDD VDD sg13_lv_pmos m=1 w=1.000u l=130.00n ng=1
.ENDS
@@ -412,30 +412,26 @@ MP5 net1 net5 VDD VDD sg13_lv_pmos m=1 w=1.000u l=130.00n ng=1
* View Name: schematic
************************************************************************
-.SUBCKT sg13g2_dlhq_1 D GATE Q VDD VSS
+.SUBCKT sg13g2_dlhq_1 Q D GATE VDD VSS
*.PININFO D:I GATE:I Q:O VDD:B VSS:B
-MX17 VDD a_386_326_ Q VDD sg13_lv_pmos m=1 w=1.12e-06 l=130.00n ng=1
-MX16 a_592_149_ a_685_59_ a_419_392_ VDD sg13_lv_pmos m=1 w=420.00n l=130.00n
-+ ng=1
-MX14 a_386_326_ a_592_149_ VDD VDD sg13_lv_pmos m=1 w=1.12e-06 l=130.00n ng=1
-MX12 VDD D a_116_424_ VDD sg13_lv_pmos m=1 w=840.00n l=130.00n ng=1
-MX9 a_562_123_ GATE VDD VDD sg13_lv_pmos m=1 w=840.00n l=130.00n ng=1
-MX7 VDD a_562_123_ a_685_59_ VDD sg13_lv_pmos m=1 w=840.00n l=130.00n ng=1
-MX4 VDD a_386_326_ a_419_392_ VDD sg13_lv_pmos m=1 w=420.00n l=130.00n ng=1
-MX3 a_229_392_ a_562_123_ a_592_149_ VDD sg13_lv_pmos m=1 w=1.000u l=130.00n
-+ ng=1
-MX1 a_229_392_ a_116_424_ VDD VDD sg13_lv_pmos m=1 w=1.000u l=130.00n ng=1
-MX15 a_562_123_ GATE VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
-MX13 VSS a_562_123_ a_685_59_ VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
-MX11 a_514_149_ a_562_123_ a_592_149_ VSS sg13_lv_nmos m=1 w=420.00n l=130.00n
-+ ng=1
-MX10 VSS a_386_326_ Q VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
-MX8 a_239_85_ a_116_424_ VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
-MX6 VSS a_386_326_ a_514_149_ VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
-MX5 a_386_326_ a_592_149_ VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
-MX2 a_592_149_ a_685_59_ a_239_85_ VSS sg13_lv_nmos m=1 w=740.00n l=130.00n
-+ ng=1
-MX0 VSS D a_116_424_ VSS sg13_lv_nmos m=1 w=550.00n l=130.00n ng=1
+MX17 Q qint_b VDD VDD sg13_lv_pmos m=1 w=1.12u l=130.00n ng=1
+MX16 qint GATE_BB net8 VDD sg13_lv_pmos m=1 w=420.00n l=130.00n ng=1
+MX14 qint_b qint VDD VDD sg13_lv_pmos m=1 w=1.12u l=130.00n ng=1
+MX12 Db D VDD VDD sg13_lv_pmos m=1 w=840.00n l=130.00n ng=1
+MX9 GATE_B GATE VDD VDD sg13_lv_pmos m=1 w=840.00n l=130.00n ng=1
+MX7 GATE_BB GATE_B VDD VDD sg13_lv_pmos m=1 w=840.00n l=130.00n ng=1
+MX4 net8 qint_b VDD VDD sg13_lv_pmos m=1 w=420.00n l=130.00n ng=1
+MX3 net4 GATE_B qint VDD sg13_lv_pmos m=1 w=1.000u l=130.00n ng=1
+MX1 net4 Db VDD VDD sg13_lv_pmos m=1 w=1.000u l=130.00n ng=1
+MX15 GATE_B GATE VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
+MX13 GATE_BB GATE_B VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
+MX11 qint GATE_B net9 VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
+MX10 Q qint_b VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
+MX8 net7 Db VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
+MX6 net9 qint_b VSS VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
+MX5 qint_b qint VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
+MX2 qint GATE_BB net7 VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
+MX0 Db D VSS VSS sg13_lv_nmos m=1 w=550.00n l=130.00n ng=1
.ENDS
************************************************************************
@@ -444,37 +440,32 @@ MX0 VSS D a_116_424_ VSS sg13_lv_nmos m=1 w=550.00n l=130.00n ng=1
* View Name: schematic
************************************************************************
-.SUBCKT sg13g2_dlhr_1 D GATE Q Q_N RESET_B VDD VSS
+.SUBCKT sg13g2_dlhr_1 Q Q_N D GATE RESET_B VDD VSS
*.PININFO D:I GATE:I RESET_B:I Q:O Q_N:O VDD:B VSS:B
-MX0 a_823_98_ RESET_B VDD VDD sg13_lv_pmos m=1 w=1.12e-06 l=130.00n ng=1
-MX9 VDD a_823_98_ Q VDD sg13_lv_pmos m=1 w=1.12e-06 l=130.00n ng=1
-MX15 a_642_392_ a_353_98_ a_753_508_ VDD sg13_lv_pmos m=1 w=420.00n l=130.00n
-+ ng=1
-MX6 a_753_508_ a_823_98_ VDD VDD sg13_lv_pmos m=1 w=420.00n l=130.00n ng=1
-MX10 a_564_392_ a_226_104_ a_642_392_ VDD sg13_lv_pmos m=1 w=1.000u l=130.00n
-+ ng=1
-MX18 VDD a_27_142_ a_564_392_ VDD sg13_lv_pmos m=1 w=1.000u l=130.00n ng=1
-MX13 a_27_142_ D VDD VDD sg13_lv_pmos m=1 w=840.00n l=130.00n ng=1
-MX5 VDD GATE a_226_104_ VDD sg13_lv_pmos m=1 w=840.00n l=130.00n ng=1
-MX3 VDD a_1342_74_ Q_N VDD sg13_lv_pmos m=1 w=1.12e-06 l=130.00n ng=1
-MX1 VDD a_642_392_ a_823_98_ VDD sg13_lv_pmos m=1 w=1.12e-06 l=130.00n ng=1
-MX20 a_353_98_ a_226_104_ VDD VDD sg13_lv_pmos m=1 w=840.00n l=130.00n ng=1
-MX2 a_1342_74_ a_823_98_ VDD VDD sg13_lv_pmos m=1 w=840.00n l=130.00n ng=1
-MX12 a_823_98_ a_642_392_ a_1051_74_ VSS sg13_lv_nmos m=1 w=740.00n l=130.00n
-+ ng=1
-MX21 a_1051_74_ RESET_B VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
-MX11 a_642_392_ a_226_104_ a_775_124_ VSS sg13_lv_nmos m=1 w=420.00n l=130.00n
-+ ng=1
-MX14 a_775_124_ a_823_98_ VSS VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
-MX7 VSS a_823_98_ Q VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
-MX16 a_571_80_ a_353_98_ a_642_392_ VSS sg13_lv_nmos m=1 w=640.00n l=130.00n
-+ ng=1
-MX23 VSS a_27_142_ a_571_80_ VSS sg13_lv_nmos m=1 w=640.00n l=130.00n ng=1
-MX4 a_27_142_ D VSS VSS sg13_lv_nmos m=1 w=550.00n l=130.00n ng=1
-MX19 VSS GATE a_226_104_ VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
-MX8 VSS a_1342_74_ Q_N VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
-MX17 a_353_98_ a_226_104_ VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
-MX22 a_1342_74_ a_823_98_ VSS VSS sg13_lv_nmos m=1 w=550.00n l=130.00n ng=1
+MX0 qint_b RESET_B VDD VDD sg13_lv_pmos m=1 w=1.12u l=130.00n ng=1
+MX9 Q qint_b VDD VDD sg13_lv_pmos m=1 w=1.12u l=130.00n ng=1
+MX15 qint GATE_BB net11 VDD sg13_lv_pmos m=1 w=420.00n l=130.00n ng=1
+MX6 net11 qint_b VDD VDD sg13_lv_pmos m=1 w=420.00n l=130.00n ng=1
+MX10 qint GATE_B net2 VDD sg13_lv_pmos m=1 w=1.000u l=130.00n ng=1
+MX18 net2 Db VDD VDD sg13_lv_pmos m=1 w=1.000u l=130.00n ng=1
+MX13 Db D VDD VDD sg13_lv_pmos m=1 w=840.00n l=130.00n ng=1
+MX5 GATE_B GATE VDD VDD sg13_lv_pmos m=1 w=840.00n l=130.00n ng=1
+MX3 Q_N qintn_b VDD VDD sg13_lv_pmos m=1 w=1.12u l=130.00n ng=1
+MX1 qint_b qint VDD VDD sg13_lv_pmos m=1 w=1.12u l=130.00n ng=1
+MX20 GATE_BB GATE_B VDD VDD sg13_lv_pmos m=1 w=840.00n l=130.00n ng=1
+MX2 qintn_b qint_b VDD VDD sg13_lv_pmos m=1 w=840.00n l=130.00n ng=1
+MX12 qint_b qint net9 VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
+MX21 net9 RESET_B VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
+MX11 qint GATE_B net7 VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
+MX14 net7 qint_b VSS VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
+MX7 Q qint_b VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
+MX16 qint GATE_BB net1 VSS sg13_lv_nmos m=1 w=640.00n l=130.00n ng=1
+MX23 net1 Db VSS VSS sg13_lv_nmos m=1 w=640.00n l=130.00n ng=1
+MX4 Db D VSS VSS sg13_lv_nmos m=1 w=550.00n l=130.00n ng=1
+MX19 GATE_B GATE VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
+MX8 Q_N qintn_b VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
+MX17 GATE_BB GATE_B VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
+MX22 qintn_b qint_b VSS VSS sg13_lv_nmos m=1 w=550.00n l=130.00n ng=1
.ENDS
************************************************************************
@@ -483,33 +474,28 @@ MX22 a_1342_74_ a_823_98_ VSS VSS sg13_lv_nmos m=1 w=550.00n l=130.00n ng=1
* View Name: schematic
************************************************************************
-.SUBCKT sg13g2_dlhrq_1 D GATE Q RESET_B VDD VSS
+.SUBCKT sg13g2_dlhrq_1 Q D GATE RESET_B VDD VSS
*.PININFO D:I GATE:I RESET_B:I Q:O VDD:B VSS:B
-MX19 a_769_74_ a_817_48_ VSS VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
-MX14 a_565_74_ a_363_74_ a_643_74_ VSS sg13_lv_nmos m=1 w=640.00n l=130.00n
-+ ng=1
-MX11 VSS a_817_48_ Q VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
-MX10 a_27_424_ D VSS VSS sg13_lv_nmos m=1 w=550.00n l=130.00n ng=1
-MX8 a_1045_74_ RESET_B VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
-MX7 a_817_48_ a_643_74_ a_1045_74_ VSS sg13_lv_nmos m=1 w=740.00n l=130.00n
-+ ng=1
-MX6 a_643_74_ a_216_424_ a_769_74_ VSS sg13_lv_nmos m=1 w=420.00n l=130.00n
-+ ng=1
-MX4 VSS GATE a_216_424_ VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
-MX3 VSS a_27_424_ a_565_74_ VSS sg13_lv_nmos m=1 w=640.00n l=130.00n ng=1
-MX1 a_363_74_ a_216_424_ VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
-MX18 VDD a_643_74_ a_817_48_ VDD sg13_lv_pmos m=1 w=1.000u l=130.00n ng=1
-MX17 VDD a_27_424_ a_568_392_ VDD sg13_lv_pmos m=1 w=1.000u l=130.00n ng=1
-MX16 a_643_74_ a_363_74_ a_759_508_ VDD sg13_lv_pmos m=1 w=420.00n l=130.00n
-+ ng=1
-MX15 VDD GATE a_216_424_ VDD sg13_lv_pmos m=1 w=840.00n l=130.00n ng=1
-MX13 a_27_424_ D VDD VDD sg13_lv_pmos m=1 w=840.00n l=130.00n ng=1
-MX12 a_759_508_ a_817_48_ VDD VDD sg13_lv_pmos m=1 w=420.00n l=130.00n ng=1
-MX9 a_363_74_ a_216_424_ VDD VDD sg13_lv_pmos m=1 w=840.00n l=130.00n ng=1
-MX5 VDD a_817_48_ Q VDD sg13_lv_pmos m=1 w=1.12e-06 l=130.00n ng=1
-MX2 a_817_48_ RESET_B VDD VDD sg13_lv_pmos m=1 w=1.000u l=130.00n ng=1
-MX0 a_568_392_ a_216_424_ a_643_74_ VDD sg13_lv_pmos m=1 w=1.000u l=130.00n
-+ ng=1
+MX21 net116 RESET_B VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
+MX7 Q qint_b VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
+MX17 GATE_BB GATE_B VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
+MX11 qint GATE_B net89 VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
+MX12 qint_b qint net116 VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
+MX4 Db D VSS VSS sg13_lv_nmos m=1 w=550.00n l=130.00n ng=1
+MX23 net61 Db VSS VSS sg13_lv_nmos m=1 w=640.00n l=130.00n ng=1
+MX16 qint GATE_BB net61 VSS sg13_lv_nmos m=1 w=640.00n l=130.00n ng=1
+MX14 net89 qint_b VSS VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
+MX19 GATE_B GATE VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
+MX18 net60 Db VDD VDD sg13_lv_pmos m=1 w=1.000u l=130.00n ng=1
+MX0 qint_b RESET_B VDD VDD sg13_lv_pmos m=1 w=1.000u l=130.00n ng=1
+MX15 qint GATE_BB net92 VDD sg13_lv_pmos m=1 w=420.00n l=130.00n ng=1
+MX9 Q qint_b VDD VDD sg13_lv_pmos m=1 w=1.12u l=130.00n ng=1
+MX6 net92 qint_b VDD VDD sg13_lv_pmos m=1 w=420.00n l=130.00n ng=1
+MX5 GATE_B GATE VDD VDD sg13_lv_pmos m=1 w=840.00n l=130.00n ng=1
+MX13 Db D VDD VDD sg13_lv_pmos m=1 w=840.00n l=130.00n ng=1
+MX10 qint GATE_B net60 VDD sg13_lv_pmos m=1 w=1.000u l=130.00n ng=1
+MX20 GATE_BB GATE_B VDD VDD sg13_lv_pmos m=1 w=840.00n l=130.00n ng=1
+MX1 qint_b qint VDD VDD sg13_lv_pmos m=1 w=1.000u l=130.00n ng=1
.ENDS
************************************************************************
@@ -518,35 +504,32 @@ MX0 a_568_392_ a_216_424_ a_643_74_ VDD sg13_lv_pmos m=1 w=1.000u l=130.00n
* View Name: schematic
************************************************************************
-.SUBCKT sg13g2_dllr_1 D GATE_N Q Q_N RESET_B VDD VSS
-*.PININFO D:I GATE_N:I Q:I RESET_B:I Q_N:O VDD:B VSS:B
-MX19 VDD a_686_74_ a_889_92_ VDD sg13_lv_pmos m=1 w=1.12e-06 l=130.00n ng=1
-MX17 a_802_508_ a_889_92_ VDD VDD sg13_lv_pmos m=1 w=420.00n l=130.00n ng=1
-MX16 a_27_424_ D VDD VDD sg13_lv_pmos m=1 w=840.00n l=130.00n ng=1
-MX11 VDD a_27_424_ a_611_392_ VDD sg13_lv_pmos m=1 w=1.000u l=130.00n ng=1
-MX10 a_889_92_ RESET_B VDD VDD sg13_lv_pmos m=1 w=1.12e-06 l=130.00n ng=1
-MX9 a_686_74_ a_231_74_ a_802_508_ VDD sg13_lv_pmos m=1 w=420.00n l=130.00n
-+ ng=1
-MX7 VDD GATE_N a_231_74_ VDD sg13_lv_pmos m=1 w=840.00n l=130.00n ng=1
-MX6 a_1437_112_ a_889_92_ VDD VDD sg13_lv_pmos m=1 w=840.00n l=130.00n ng=1
-MX5 a_611_392_ a_373_74_ a_686_74_ VDD sg13_lv_pmos m=1 w=1.000u l=130.00n ng=1
-MX3 VDD a_889_92_ Q VDD sg13_lv_pmos m=1 w=1.12e-06 l=130.00n ng=1
-MX2 a_373_74_ a_231_74_ VDD VDD sg13_lv_pmos m=1 w=840.00n l=130.00n ng=1
-MX1 VDD a_1437_112_ Q_N VDD sg13_lv_pmos m=1 w=1.12e-06 l=130.00n ng=1
-MX23 VSS a_1437_112_ Q_N VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
-MX22 a_373_74_ a_231_74_ VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
-MX21 a_889_92_ a_686_74_ a_1133_74_ VSS sg13_lv_nmos m=1 w=740.00n l=130.00n
-+ ng=1
-MX20 VSS GATE_N a_231_74_ VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
-MX18 a_1437_112_ a_889_92_ VSS VSS sg13_lv_nmos m=1 w=550.00n l=130.00n ng=1
-MX15 a_27_424_ D VSS VSS sg13_lv_nmos m=1 w=550.00n l=130.00n ng=1
-MX14 a_841_118_ a_889_92_ VSS VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
-MX13 VSS a_27_424_ a_608_74_ VSS sg13_lv_nmos m=1 w=640.00n l=130.00n ng=1
-MX12 a_686_74_ a_373_74_ a_841_118_ VSS sg13_lv_nmos m=1 w=420.00n l=130.00n
-+ ng=1
-MX8 VSS a_889_92_ Q VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
-MX4 a_608_74_ a_231_74_ a_686_74_ VSS sg13_lv_nmos m=1 w=640.00n l=130.00n ng=1
-MX0 a_1133_74_ RESET_B VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
+.SUBCKT sg13g2_dllr_1 Q Q_N D GATE_N RESET_B VDD VSS
+*.PININFO D:I GATE_N:I RESET_B:I Q:O Q_N:O VDD:B VSS:B
+MX4 Db D VSS VSS sg13_lv_nmos m=1 w=550.00n l=130.00n ng=1
+MX19 gnb GATE_N VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
+MX17 gnbb gnb VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
+MX14 net89 qint_b VSS VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
+MX12 qint_b qint net116 VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
+MX21 net116 RESET_B VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
+MX11 qint gnbb net89 VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
+MX8 Q_N qintn_b VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
+MX16 qint gnb net61 VSS sg13_lv_nmos m=1 w=640.00n l=130.00n ng=1
+MX22 qintn_b qint_b VSS VSS sg13_lv_nmos m=1 w=550.00n l=130.00n ng=1
+MX23 net61 Db VSS VSS sg13_lv_nmos m=1 w=640.00n l=130.00n ng=1
+MX7 Q qint_b VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
+MX20 gnbb gnb VDD VDD sg13_lv_pmos m=1 w=840.00n l=130.00n ng=1
+MX10 qint gnbb net60 VDD sg13_lv_pmos m=1 w=1.000u l=130.00n ng=1
+MX2 qintn_b qint_b VDD VDD sg13_lv_pmos m=1 w=840.00n l=130.00n ng=1
+MX3 Q_N qintn_b VDD VDD sg13_lv_pmos m=1 w=1.12u l=130.00n ng=1
+MX18 net60 Db VDD VDD sg13_lv_pmos m=1 w=1.000u l=130.00n ng=1
+MX6 net92 qint_b VDD VDD sg13_lv_pmos m=1 w=420.00n l=130.00n ng=1
+MX0 qint_b RESET_B VDD VDD sg13_lv_pmos m=1 w=1.12u l=130.00n ng=1
+MX13 Db D VDD VDD sg13_lv_pmos m=1 w=840.00n l=130.00n ng=1
+MX5 gnb GATE_N VDD VDD sg13_lv_pmos m=1 w=840.00n l=130.00n ng=1
+MX9 Q qint_b VDD VDD sg13_lv_pmos m=1 w=1.12u l=130.00n ng=1
+MX15 qint gnb net92 VDD sg13_lv_pmos m=1 w=420.00n l=130.00n ng=1
+MX1 qint_b qint VDD VDD sg13_lv_pmos m=1 w=1.12u l=130.00n ng=1
.ENDS
************************************************************************
@@ -555,33 +538,28 @@ MX0 a_1133_74_ RESET_B VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
* View Name: schematic
************************************************************************
-.SUBCKT sg13g2_dllrq_1 D GATE_N Q RESET_B VDD VSS
+.SUBCKT sg13g2_dllrq_1 Q D GATE_N RESET_B VDD VSS
*.PININFO D:I GATE_N:I RESET_B:I Q:O VDD:B VSS:B
-MX18 a_357_392_ a_232_98_ VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
-MX17 VSS a_897_406_ Q VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
-MX16 a_654_392_ a_357_392_ a_854_74_ VSS sg13_lv_nmos m=1 w=420.00n l=130.00n
-+ ng=1
-MX14 VSS a_27_136_ a_681_74_ VSS sg13_lv_nmos m=1 w=640.00n l=130.00n ng=1
-MX12 a_681_74_ a_232_98_ a_654_392_ VSS sg13_lv_nmos m=1 w=640.00n l=130.00n
-+ ng=1
-MX9 a_27_136_ D VSS VSS sg13_lv_nmos m=1 w=550.00n l=130.00n ng=1
-MX6 a_1139_74_ RESET_B VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
-MX5 a_854_74_ a_897_406_ VSS VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
-MX3 a_897_406_ a_654_392_ a_1139_74_ VSS sg13_lv_nmos m=1 w=740.00n l=130.00n
-+ ng=1
-MX1 VSS GATE_N a_232_98_ VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
-MX19 VDD GATE_N a_232_98_ VDD sg13_lv_pmos m=1 w=840.00n l=130.00n ng=1
-MX15 a_897_406_ RESET_B VDD VDD sg13_lv_pmos m=1 w=1.000u l=130.00n ng=1
-MX13 a_654_392_ a_232_98_ a_793_508_ VDD sg13_lv_pmos m=1 w=420.00n l=130.00n
-+ ng=1
-MX11 a_793_508_ a_897_406_ VDD VDD sg13_lv_pmos m=1 w=420.00n l=130.00n ng=1
-MX10 VDD a_897_406_ Q VDD sg13_lv_pmos m=1 w=1.12e-06 l=130.00n ng=1
-MX8 a_27_136_ D VDD VDD sg13_lv_pmos m=1 w=840.00n l=130.00n ng=1
-MX7 VDD a_27_136_ a_570_392_ VDD sg13_lv_pmos m=1 w=1.000u l=130.00n ng=1
-MX4 VDD a_654_392_ a_897_406_ VDD sg13_lv_pmos m=1 w=1.000u l=130.00n ng=1
-MX2 a_570_392_ a_357_392_ a_654_392_ VDD sg13_lv_pmos m=1 w=1.000u l=130.00n
-+ ng=1
-MX0 a_357_392_ a_232_98_ VDD VDD sg13_lv_pmos m=1 w=840.00n l=130.00n ng=1
+MX11 qint gnbb net89 VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
+MX16 qint gnb net61 VSS sg13_lv_nmos m=1 w=640.00n l=130.00n ng=1
+MX21 net116 RESET_B VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
+MX7 Q qint_b VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
+MX23 net61 Db VSS VSS sg13_lv_nmos m=1 w=640.00n l=130.00n ng=1
+MX14 net89 qint_b VSS VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
+MX12 qint_b qint net116 VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
+MX4 Db D VSS VSS sg13_lv_nmos m=1 w=550.00n l=130.00n ng=1
+MX19 gnb GATE_N VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
+MX17 gnbb gnb VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
+MX18 net59 Db VDD VDD sg13_lv_pmos m=1 w=1.000u l=130.00n ng=1
+MX0 qint_b RESET_B VDD VDD sg13_lv_pmos m=1 w=1.000u l=130.00n ng=1
+MX5 gnb GATE_N VDD VDD sg13_lv_pmos m=1 w=840.00n l=130.00n ng=1
+MX6 net92 qint_b VDD VDD sg13_lv_pmos m=1 w=420.00n l=130.00n ng=1
+MX1 qint_b qint VDD VDD sg13_lv_pmos m=1 w=1.000u l=130.00n ng=1
+MX9 Q qint_b VDD VDD sg13_lv_pmos m=1 w=1.12u l=130.00n ng=1
+MX10 qint gnbb net59 VDD sg13_lv_pmos m=1 w=1.000u l=130.00n ng=1
+MX13 Db D VDD VDD sg13_lv_pmos m=1 w=840.00n l=130.00n ng=1
+MX20 gnbb gnb VDD VDD sg13_lv_pmos m=1 w=840.00n l=130.00n ng=1
+MX15 qint gnb net92 VDD sg13_lv_pmos m=1 w=420.00n l=130.00n ng=1
.ENDS
************************************************************************
@@ -590,7 +568,7 @@ MX0 a_357_392_ a_232_98_ VDD VDD sg13_lv_pmos m=1 w=840.00n l=130.00n ng=1
* View Name: schematic
************************************************************************
-.SUBCKT sg13g2_dlygate4sd1_1 A VDD VSS X
+.SUBCKT sg13g2_dlygate4sd1_1 X A VDD VSS
*.PININFO A:I X:O VDD:B VSS:B
MP3 X net3 VDD VDD sg13_lv_pmos m=1 w=1.12u l=130.00n ng=1
MP2 net3 net2 VDD VDD sg13_lv_pmos m=1 w=1.000u l=130.00n ng=1
@@ -608,7 +586,7 @@ MN0 net1 A VSS VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
* View Name: schematic
************************************************************************
-.SUBCKT sg13g2_dlygate4sd2_1 A VDD VSS X
+.SUBCKT sg13g2_dlygate4sd2_1 X A VDD VSS
*.PININFO A:I X:O VDD:B VSS:B
MP3 X net3 VDD VDD sg13_lv_pmos m=1 w=1.12u l=130.00n ng=1
MP2 net3 net2 VDD VDD sg13_lv_pmos m=1 w=1.000u l=250.00n ng=1
@@ -626,7 +604,7 @@ MN0 net1 A VSS VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
* View Name: schematic
************************************************************************
-.SUBCKT sg13g2_dlygate4sd3_1 A VDD VSS X
+.SUBCKT sg13g2_dlygate4sd3_1 X A VDD VSS
*.PININFO A:I X:O VDD:B VSS:B
MP3 X net3 VDD VDD sg13_lv_pmos m=1 w=1.12u l=130.00n ng=1
MP2 net3 net2 VDD VDD sg13_lv_pmos m=1 w=1.000u l=500.0n ng=1
@@ -644,14 +622,14 @@ MN0 net1 A VSS VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
* View Name: schematic
************************************************************************
-.SUBCKT sg13g2_ebufn_2 A TE_B VDD VSS Z
+.SUBCKT sg13g2_ebufn_2 Z A TE_B VDD VSS
*.PININFO A:I TE_B:I Z:O VDD:B VSS:B
-MN3 net4 net3 VSS VSS sg13_lv_nmos m=2 w=740.00n l=130.00n ng=1
-MN2 Z net1 net4 VSS sg13_lv_nmos m=2 w=740.00n l=130.00n ng=1
+MN3 net4 net3 VSS VSS sg13_lv_nmos m=1 w=1.48u l=130.00n ng=2
+MN2 Z net1 net4 VSS sg13_lv_nmos m=1 w=1.48u l=130.00n ng=2
MN1 net3 TE_B VSS VSS sg13_lv_nmos m=1 w=640.00n l=130.00n ng=1
MN0 net1 A VSS VSS sg13_lv_nmos m=1 w=640.00n l=130.00n ng=1
-MP3 net2 TE_B VDD VDD sg13_lv_pmos m=2 w=1.12u l=130.00n ng=1
-MP2 Z net1 net2 VDD sg13_lv_pmos m=2 w=1.12u l=130.00n ng=1
+MP3 net2 TE_B VDD VDD sg13_lv_pmos m=1 w=2.24u l=130.00n ng=2
+MP2 Z net1 net2 VDD sg13_lv_pmos m=1 w=2.24u l=130.00n ng=2
MP1 net3 TE_B VDD VDD sg13_lv_pmos m=1 w=1.000u l=130.00n ng=1
MP0 net1 A VDD VDD sg13_lv_pmos m=1 w=1.000u l=130.00n ng=1
.ENDS
@@ -662,16 +640,16 @@ MP0 net1 A VDD VDD sg13_lv_pmos m=1 w=1.000u l=130.00n ng=1
* View Name: schematic
************************************************************************
-.SUBCKT sg13g2_ebufn_4 A TE_B VDD VSS Z
+.SUBCKT sg13g2_ebufn_4 Z A TE_B VDD VSS
*.PININFO A:I TE_B:I Z:O VDD:B VSS:B
MN0 net23 A VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
MN1 net21 TE_B VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
-MN2 Z net23 net22 VSS sg13_lv_nmos m=4 w=740.00n l=130.00n ng=1
-MN3 net22 net21 VSS VSS sg13_lv_nmos m=4 w=740.00n l=130.00n ng=1
+MN2 Z net23 net22 VSS sg13_lv_nmos m=1 w=2.96u l=130.00n ng=4
+MN3 net22 net21 VSS VSS sg13_lv_nmos m=1 w=2.96u l=130.00n ng=4
MP0 net23 A VDD VDD sg13_lv_pmos m=1 w=1.12u l=130.00n ng=1
MP1 net21 TE_B VDD VDD sg13_lv_pmos m=1 w=1.12u l=130.00n ng=1
-MP2 Z net23 net24 VDD sg13_lv_pmos m=4 w=1.12u l=130.00n ng=1
-MP3 net24 TE_B VDD VDD sg13_lv_pmos m=4 w=1.12u l=130.00n ng=1
+MP2 Z net23 net24 VDD sg13_lv_pmos m=1 w=4.48u l=130.00n ng=4
+MP3 net24 TE_B VDD VDD sg13_lv_pmos m=1 w=4.48u l=130.00n ng=4
.ENDS
************************************************************************
@@ -680,16 +658,16 @@ MP3 net24 TE_B VDD VDD sg13_lv_pmos m=4 w=1.12u l=130.00n ng=1
* View Name: schematic
************************************************************************
-.SUBCKT sg13g2_ebufn_8 A TE_B VDD VSS Z
+.SUBCKT sg13g2_ebufn_8 Z A TE_B VDD VSS
*.PININFO A:I TE_B:I Z:O VDD:B VSS:B
-MN3 net23 net22 VSS VSS sg13_lv_nmos m=8 w=740.00n l=130.00n ng=1
-MN2 Z net21 net23 VSS sg13_lv_nmos m=8 w=740.00n l=130.00n ng=1
+MN3 net23 net22 VSS VSS sg13_lv_nmos m=1 w=5.92u l=130.00n ng=8
+MN2 Z net21 net23 VSS sg13_lv_nmos m=1 w=5.92u l=130.00n ng=8
MN1 net22 TE_B VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
-MN0 net21 A VSS VSS sg13_lv_nmos m=2 w=740.00n l=130.00n ng=1
-MP3 net24 TE_B VDD VDD sg13_lv_pmos m=8 w=1.12u l=130.00n ng=1
-MP2 Z net21 net24 VDD sg13_lv_pmos m=8 w=1.12u l=130.00n ng=1
+MN0 net21 A VSS VSS sg13_lv_nmos m=1 w=1.48u l=130.00n ng=2
+MP3 net24 TE_B VDD VDD sg13_lv_pmos m=1 w=8.96u l=130.00n ng=8
+MP2 Z net21 net24 VDD sg13_lv_pmos m=1 w=8.96u l=130.00n ng=8
MP1 net22 TE_B VDD VDD sg13_lv_pmos m=1 w=1.12u l=130.00n ng=1
-MP0 net21 A VDD VDD sg13_lv_pmos m=2 w=1.12u l=130.00n ng=1
+MP0 net21 A VDD VDD sg13_lv_pmos m=1 w=2.24u l=130.00n ng=2
.ENDS
************************************************************************
@@ -698,14 +676,14 @@ MP0 net21 A VDD VDD sg13_lv_pmos m=2 w=1.12u l=130.00n ng=1
* View Name: schematic
************************************************************************
-.SUBCKT sg13g2_einvn_2 A TE_B VDD VSS Z
+.SUBCKT sg13g2_einvn_2 Z A TE_B VDD VSS
*.PININFO A:I TE_B:I Z:O VDD:B VSS:B
MN2 TE TE_B VSS VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
-MN1 net1 TE VSS VSS sg13_lv_nmos m=2 w=740.00n l=130.00n ng=1
-MN0 Z A net1 VSS sg13_lv_nmos m=2 w=740.00n l=130.00n ng=1
+MN1 net1 TE VSS VSS sg13_lv_nmos m=1 w=1.48u l=130.00n ng=2
+MN0 Z A net1 VSS sg13_lv_nmos m=1 w=1.48u l=130.00n ng=2
MP2 TE TE_B VDD VDD sg13_lv_pmos m=1 w=640.00n l=130.00n ng=1
-MP1 net2 TE_B VDD VDD sg13_lv_pmos m=2 w=1.12u l=130.00n ng=1
-MP0 Z A net2 VDD sg13_lv_pmos m=2 w=1.12u l=130.00n ng=1
+MP1 net2 TE_B VDD VDD sg13_lv_pmos m=1 w=2.24u l=130.00n ng=2
+MP0 Z A net2 VDD sg13_lv_pmos m=1 w=2.24u l=130.00n ng=2
.ENDS
************************************************************************
@@ -714,14 +692,14 @@ MP0 Z A net2 VDD sg13_lv_pmos m=2 w=1.12u l=130.00n ng=1
* View Name: schematic
************************************************************************
-.SUBCKT sg13g2_einvn_4 A TE_B VDD VSS Z
+.SUBCKT sg13g2_einvn_4 Z A TE_B VDD VSS
*.PININFO A:I TE_B:I Z:O VDD:B VSS:B
-MN1 net16 TE VSS VSS sg13_lv_nmos m=4 w=740.00n l=130.00n ng=1
+MN1 net16 TE VSS VSS sg13_lv_nmos m=1 w=2.96u l=130.00n ng=4
MN2 TE TE_B VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
-MN0 Z A net16 VSS sg13_lv_nmos m=4 w=740.00n l=130.00n ng=1
+MN0 Z A net16 VSS sg13_lv_nmos m=1 w=2.96u l=130.00n ng=4
MP2 TE TE_B VDD VDD sg13_lv_pmos m=1 w=1.12u l=130.00n ng=1
-MP1 net17 TE_B VDD VDD sg13_lv_pmos m=4 w=1.12u l=130.00n ng=1
-MP0 Z A net17 VDD sg13_lv_pmos m=4 w=1.12u l=130.00n ng=1
+MP1 net17 TE_B VDD VDD sg13_lv_pmos m=1 w=4.48u l=130.00n ng=4
+MP0 Z A net17 VDD sg13_lv_pmos m=1 w=4.48u l=130.00n ng=4
.ENDS
************************************************************************
@@ -730,13 +708,13 @@ MP0 Z A net17 VDD sg13_lv_pmos m=4 w=1.12u l=130.00n ng=1
* View Name: schematic
************************************************************************
-.SUBCKT sg13g2_einvn_8 A TE_B VDD VSS Z
+.SUBCKT sg13g2_einvn_8 Z A TE_B VDD VSS
*.PININFO A:I TE_B:I Z:O VDD:B VSS:B
-MN0 Z A net29 VSS sg13_lv_nmos m=8 w=740.00n l=130.00n ng=1
+MN0 Z A net29 VSS sg13_lv_nmos m=1 w=5.92u l=130.00n ng=8
MN2 TE TE_B VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
-MN1 net29 TE VSS VSS sg13_lv_nmos m=8 w=740.00n l=130.00n ng=1
-MP1 net28 TE_B VDD VDD sg13_lv_pmos m=8 w=1.12u l=130.00n ng=1
-MP0 Z A net28 VDD sg13_lv_pmos m=8 w=1.12u l=130.00n ng=1
+MN1 net29 TE VSS VSS sg13_lv_nmos m=1 w=5.92u l=130.00n ng=8
+MP1 net28 TE_B VDD VDD sg13_lv_pmos m=1 w=8.96u l=130.00n ng=8
+MP0 Z A net28 VDD sg13_lv_pmos m=1 w=8.96u l=130.00n ng=8
MP2 TE TE_B VDD VDD sg13_lv_pmos m=1 w=1.12u l=130.00n ng=1
.ENDS
@@ -746,7 +724,7 @@ MP2 TE TE_B VDD VDD sg13_lv_pmos m=1 w=1.12u l=130.00n ng=1
* View Name: schematic
************************************************************************
-.SUBCKT sg13g2_inv_1 A VDD VSS Y
+.SUBCKT sg13g2_inv_1 Y A VDD VSS
*.PININFO A:I Y:O VDD:B VSS:B
MX1 Y A VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
MX0 Y A VDD VDD sg13_lv_pmos m=1 w=1.12u l=130.00n ng=1
@@ -758,10 +736,10 @@ MX0 Y A VDD VDD sg13_lv_pmos m=1 w=1.12u l=130.00n ng=1
* View Name: schematic
************************************************************************
-.SUBCKT sg13g2_inv_16 A VDD VSS Y
+.SUBCKT sg13g2_inv_16 Y A VDD VSS
*.PININFO A:I Y:O VDD:B VSS:B
-MX1 Y A VSS VSS sg13_lv_nmos m=16 w=740.00n l=130.00n ng=1
-MX0 Y A VDD VDD sg13_lv_pmos m=16 w=1.12u l=130.00n ng=1
+MX1 Y A VSS VSS sg13_lv_nmos m=1 w=11.84u l=130.00n ng=16
+MX0 Y A VDD VDD sg13_lv_pmos m=1 w=17.92u l=130.00n ng=16
.ENDS
************************************************************************
@@ -770,10 +748,10 @@ MX0 Y A VDD VDD sg13_lv_pmos m=16 w=1.12u l=130.00n ng=1
* View Name: schematic
************************************************************************
-.SUBCKT sg13g2_inv_2 A VDD VSS Y
+.SUBCKT sg13g2_inv_2 Y A VDD VSS
*.PININFO A:I Y:O VDD:B VSS:B
-MX1 Y A VSS VSS sg13_lv_nmos m=2 w=740.00n l=130.00n ng=1
-MX0 Y A VDD VDD sg13_lv_pmos m=2 w=1.12u l=130.00n ng=1
+MX1 Y A VSS VSS sg13_lv_nmos m=1 w=1.48u l=130.00n ng=2
+MX0 Y A VDD VDD sg13_lv_pmos m=1 w=2.24u l=130.00n ng=2
.ENDS
************************************************************************
@@ -782,10 +760,10 @@ MX0 Y A VDD VDD sg13_lv_pmos m=2 w=1.12u l=130.00n ng=1
* View Name: schematic
************************************************************************
-.SUBCKT sg13g2_inv_4 A VDD VSS Y
+.SUBCKT sg13g2_inv_4 Y A VDD VSS
*.PININFO A:I Y:O VDD:B VSS:B
-MP0 Y A VDD VDD sg13_lv_pmos m=4 w=1.12u l=130.00n ng=1
-MN0 Y A VSS VSS sg13_lv_nmos m=4 w=740.00n l=130.00n ng=1
+MP0 Y A VDD VDD sg13_lv_pmos m=1 w=4.48u l=130.00n ng=4
+MN0 Y A VSS VSS sg13_lv_nmos m=1 w=2.96u l=130.00n ng=4
.ENDS
************************************************************************
@@ -794,10 +772,10 @@ MN0 Y A VSS VSS sg13_lv_nmos m=4 w=740.00n l=130.00n ng=1
* View Name: schematic
************************************************************************
-.SUBCKT sg13g2_inv_8 A VDD VSS Y
+.SUBCKT sg13g2_inv_8 Y A VDD VSS
*.PININFO A:I Y:O VDD:B VSS:B
-MX1 Y A VSS VSS sg13_lv_nmos m=8 w=740.00n l=130.00n ng=1
-MX0 Y A VDD VDD sg13_lv_pmos m=8 w=1.12u l=130.00n ng=1
+MX1 Y A VSS VSS sg13_lv_nmos m=1 w=5.92u l=130.00n ng=8
+MX0 Y A VDD VDD sg13_lv_pmos m=1 w=8.96u l=130.00n ng=8
.ENDS
************************************************************************
@@ -806,29 +784,28 @@ MX0 Y A VDD VDD sg13_lv_pmos m=8 w=1.12u l=130.00n ng=1
* View Name: schematic
************************************************************************
-.SUBCKT sg13g2_lgcp_1 CLK GATE GCLK VDD VSS
+.SUBCKT sg13g2_lgcp_1 GCLK CLK GATE VDD VSS
*.PININFO CLK:I GATE:I GCLK:O VDD:B VSS:B
MX15 CLKBB CLKB VDD VDD sg13_lv_pmos m=1 w=840.00n l=130.00n ng=1
-MX14 a_83_260_ CLKBB a_258_392_ VDD sg13_lv_pmos m=1 w=1.000u l=130.00n ng=1
-MX12 int_GATE a_83_260_ VDD VDD sg13_lv_pmos m=1 w=1.12e-06 l=130.00n ng=1
-MX11 a_258_392_ GATE VDD VDD sg13_lv_pmos m=1 w=1.000u l=130.00n ng=1
-MX9 a_987_393_ int_GATE VDD VDD sg13_lv_pmos m=1 w=840.00n l=130.00n ng=1
-MX7 GCLK a_987_393_ VDD VDD sg13_lv_pmos m=1 w=1.12e-06 l=130.00n ng=1
-MX5 a_83_260_ CLKB a_484_508_ VDD sg13_lv_pmos m=1 w=420.00n l=130.00n ng=1
+MX14 net1 CLKBB net4 VDD sg13_lv_pmos m=1 w=1.000u l=130.00n ng=1
+MX12 int_GATE net1 VDD VDD sg13_lv_pmos m=1 w=1.12u l=130.00n ng=1
+MX11 net4 GATE VDD VDD sg13_lv_pmos m=1 w=1.000u l=130.00n ng=1
+MX9 net3 int_GATE VDD VDD sg13_lv_pmos m=1 w=840.00n l=130.00n ng=1
+MX7 GCLK net3 VDD VDD sg13_lv_pmos m=1 w=1.12u l=130.00n ng=1
+MX5 net1 CLKB net6 VDD sg13_lv_pmos m=1 w=420.00n l=130.00n ng=1
MX4 CLKB CLK VDD VDD sg13_lv_pmos m=1 w=840.00n l=130.00n ng=1
-MX3 a_987_393_ CLK VDD VDD sg13_lv_pmos m=1 w=840.00n l=130.00n ng=1
-MX2 a_484_508_ int_GATE VDD VDD sg13_lv_pmos m=1 w=420.00n l=130.00n ng=1
-MX19 GCLK a_987_393_ VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
-MX18 a_987_393_ int_GATE a_984_125_ VSS sg13_lv_nmos m=1 w=640.00n l=130.00n
-+ ng=1
-MX17 int_GATE a_83_260_ VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
+MX3 net3 CLK VDD VDD sg13_lv_pmos m=1 w=840.00n l=130.00n ng=1
+MX2 net6 int_GATE VDD VDD sg13_lv_pmos m=1 w=420.00n l=130.00n ng=1
+MX19 GCLK net3 VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
+MX18 net3 int_GATE net5 VSS sg13_lv_nmos m=1 w=640.00n l=130.00n ng=1
+MX17 int_GATE net1 VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
MX16 CLKBB CLKB VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
-MX13 a_477_124_ int_GATE VSS VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
-MX10 a_267_80_ GATE VSS VSS sg13_lv_nmos m=1 w=640.00n l=130.00n ng=1
-MX8 a_83_260_ CLKBB a_477_124_ VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
+MX13 net7 int_GATE VSS VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
+MX10 net2 GATE VSS VSS sg13_lv_nmos m=1 w=640.00n l=130.00n ng=1
+MX8 net1 CLKBB net7 VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
MX6 CLKB CLK VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
-MX1 a_984_125_ CLK VSS VSS sg13_lv_nmos m=1 w=640.00n l=130.00n ng=1
-MX0 a_83_260_ CLKB a_267_80_ VSS sg13_lv_nmos m=1 w=640.00n l=130.00n ng=1
+MX1 net5 CLK VSS VSS sg13_lv_nmos m=1 w=640.00n l=130.00n ng=1
+MX0 net1 CLKB net2 VSS sg13_lv_nmos m=1 w=640.00n l=130.00n ng=1
.ENDS
************************************************************************
@@ -837,7 +814,7 @@ MX0 a_83_260_ CLKB a_267_80_ VSS sg13_lv_nmos m=1 w=640.00n l=130.00n ng=1
* View Name: schematic
************************************************************************
-.SUBCKT sg13g2_mux2_1 A0 A1 S VDD VSS X
+.SUBCKT sg13g2_mux2_1 X A0 A1 S VDD VSS
*.PININFO A0:I A1:I S:I X:O VDD:B VSS:B
MP0 net4 S VDD VDD sg13_lv_pmos m=1 w=1.000u l=130.00n ng=1
MP4 X net6 VDD VDD sg13_lv_pmos m=1 w=1.12u l=130.00n ng=1
@@ -859,17 +836,17 @@ MN0 net6 A0 net1 VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
* View Name: schematic
************************************************************************
-.SUBCKT sg13g2_mux2_2 A0 A1 S VDD VSS X
+.SUBCKT sg13g2_mux2_2 X A0 A1 S VDD VSS
*.PININFO A0:I A1:I S:I X:O VDD:B VSS:B
MP0 net4 S VDD VDD sg13_lv_pmos m=1 w=1.000u l=130.00n ng=1
-MP4 X net6 VDD VDD sg13_lv_pmos m=2 w=1.12u l=130.00n ng=1
+MP4 X net6 VDD VDD sg13_lv_pmos m=1 w=2.24u l=130.00n ng=2
MP3 net6 A1 net5 VDD sg13_lv_pmos m=1 w=1.000u l=130.00n ng=1
MP5 Sb S VDD VDD sg13_lv_pmos m=1 w=840.00n l=130.00n ng=1
MP2 net5 Sb VDD VDD sg13_lv_pmos m=1 w=1.000u l=130.00n ng=1
MP1 net6 A0 net4 VDD sg13_lv_pmos m=1 w=1.000u l=130.00n ng=1
MN4 net3 S VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
MN1 net1 Sb VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
-MN6 X net6 VSS VSS sg13_lv_nmos m=2 w=740.00n l=130.00n ng=1
+MN6 X net6 VSS VSS sg13_lv_nmos m=1 w=1.48u l=130.00n ng=2
MN5 Sb S VSS VSS sg13_lv_nmos m=1 w=550.00n l=130.00n ng=1
MN2 net6 A1 net3 VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
MN0 net6 A0 net1 VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
@@ -881,7 +858,7 @@ MN0 net6 A0 net1 VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
* View Name: schematic
************************************************************************
-.SUBCKT sg13g2_mux4_1 A0 A1 A2 A3 S0 S1 VDD VSS X
+.SUBCKT sg13g2_mux4_1 X A0 A1 A2 A3 S0 S1 VDD VSS
*.PININFO A0:I A1:I A2:I A3:I S0:I S1:I X:O VDD:B VSS:B
MN12 X Xb VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
MN18 low S0b net7 VSS sg13_lv_nmos m=1 w=640.00n l=130.00n ng=1
@@ -917,10 +894,10 @@ MP15 net1 A1 VDD VDD sg13_lv_pmos m=1 w=1.000u l=130.00n ng=1
* View Name: schematic
************************************************************************
-.SUBCKT sg13g2_nand2_1 A B VDD VSS Y
+.SUBCKT sg13g2_nand2_1 Y A B VDD VSS
*.PININFO A:I B:I Y:O VDD:B VSS:B
-MP1 Y B VDD VDD sg13_lv_pmos m=1 w=1.12e-06 l=130.00n ng=1
-MP0 Y A VDD VDD sg13_lv_pmos m=1 w=1.12e-06 l=130.00n ng=1
+MP1 Y B VDD VDD sg13_lv_pmos m=1 w=1.12u l=130.00n ng=1
+MP0 Y A VDD VDD sg13_lv_pmos m=1 w=1.12u l=130.00n ng=1
MN1 net1 B VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
MN0 Y A net1 VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
.ENDS
@@ -931,12 +908,12 @@ MN0 Y A net1 VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
* View Name: schematic
************************************************************************
-.SUBCKT sg13g2_nand2_2 A B VDD VSS Y
+.SUBCKT sg13g2_nand2_2 Y A B VDD VSS
*.PININFO A:I B:I Y:O VDD:B VSS:B
-MP1 Y B VDD VDD sg13_lv_pmos m=2 w=1.12u l=130.00n ng=1
-MP0 Y A VDD VDD sg13_lv_pmos m=2 w=1.12u l=130.00n ng=1
-MN1 net1 B VSS VSS sg13_lv_nmos m=2 w=720.00n l=130.00n ng=1
-MN0 Y A net1 VSS sg13_lv_nmos m=2 w=720.00n l=130.00n ng=1
+MP1 Y B VDD VDD sg13_lv_pmos m=1 w=2.24u l=130.00n ng=2
+MP0 Y A VDD VDD sg13_lv_pmos m=1 w=2.24u l=130.00n ng=2
+MN1 net1 B VSS VSS sg13_lv_nmos m=1 w=1.44u l=130.00n ng=2
+MN0 Y A net1 VSS sg13_lv_nmos m=1 w=1.44u l=130.00n ng=2
.ENDS
************************************************************************
@@ -945,13 +922,13 @@ MN0 Y A net1 VSS sg13_lv_nmos m=2 w=720.00n l=130.00n ng=1
* View Name: schematic
************************************************************************
-.SUBCKT sg13g2_nand2b_1 A_N B VDD VSS Y
+.SUBCKT sg13g2_nand2b_1 Y A_N B VDD VSS
*.PININFO A_N:I B:I Y:O VDD:B VSS:B
-MX0 Y a_27_112_ VDD VDD sg13_lv_pmos m=1 w=1.12e-06 l=130.00n ng=1
-MX1 a_27_112_ A_N VDD VDD sg13_lv_pmos m=1 w=840.00n l=130.00n ng=1
-MX3 Y B VDD VDD sg13_lv_pmos m=1 w=1.12e-06 l=130.00n ng=1
-MX2 Y a_27_112_ net1 VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
-MX4 a_27_112_ A_N VSS VSS sg13_lv_nmos m=1 w=550.00n l=130.00n ng=1
+MX0 Y net2 VDD VDD sg13_lv_pmos m=1 w=1.12u l=130.00n ng=1
+MX1 net2 A_N VDD VDD sg13_lv_pmos m=1 w=840.00n l=130.00n ng=1
+MX3 Y B VDD VDD sg13_lv_pmos m=1 w=1.12u l=130.00n ng=1
+MX2 Y net2 net1 VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
+MX4 net2 A_N VSS VSS sg13_lv_nmos m=1 w=550.00n l=130.00n ng=1
MX5 net1 B VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
.ENDS
@@ -961,14 +938,14 @@ MX5 net1 B VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
* View Name: schematic
************************************************************************
-.SUBCKT sg13g2_nand2b_2 A_N B VDD VSS Y
+.SUBCKT sg13g2_nand2b_2 Y A_N B VDD VSS
*.PININFO A_N:I B:I Y:O VDD:B VSS:B
-MX0 Y A VDD VDD sg13_lv_pmos m=2 w=1.12u l=130.00n ng=1
+MX0 Y A VDD VDD sg13_lv_pmos m=1 w=2.24u l=130.00n ng=2
MX1 A A_N VDD VDD sg13_lv_pmos m=1 w=840.00n l=130.00n ng=1
-MX3 Y B VDD VDD sg13_lv_pmos m=2 w=1.12u l=130.00n ng=1
-MX2 Y B net1 VSS sg13_lv_nmos m=2 w=720.00n l=130.00n ng=1
+MX3 Y B VDD VDD sg13_lv_pmos m=1 w=2.24u l=130.00n ng=2
+MX2 Y B net1 VSS sg13_lv_nmos m=1 w=1.44u l=130.00n ng=2
MX4 A A_N VSS VSS sg13_lv_nmos m=1 w=550.00n l=130.00n ng=1
-MX5 net1 A VSS VSS sg13_lv_nmos m=2 w=720.00n l=130.00n ng=1
+MX5 net1 A VSS VSS sg13_lv_nmos m=1 w=1.44u l=130.00n ng=2
.ENDS
************************************************************************
@@ -977,11 +954,11 @@ MX5 net1 A VSS VSS sg13_lv_nmos m=2 w=720.00n l=130.00n ng=1
* View Name: schematic
************************************************************************
-.SUBCKT sg13g2_nand3_1 A B C VDD VSS Y
+.SUBCKT sg13g2_nand3_1 Y A B C VDD VSS
*.PININFO A:I B:I C:I Y:O VDD:B VSS:B
-MX1 Y A VDD VDD sg13_lv_pmos m=1 w=1.12e-06 l=130.00n ng=1
-MX2 Y B VDD VDD sg13_lv_pmos m=1 w=1.12e-06 l=130.00n ng=1
-MX6 Y C VDD VDD sg13_lv_pmos m=1 w=1.12e-06 l=130.00n ng=1
+MX1 Y A VDD VDD sg13_lv_pmos m=1 w=1.12u l=130.00n ng=1
+MX2 Y B VDD VDD sg13_lv_pmos m=1 w=1.12u l=130.00n ng=1
+MX6 Y C VDD VDD sg13_lv_pmos m=1 w=1.12u l=130.00n ng=1
MX3 net2 B net3 VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
MX4 net3 C VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
MX7 Y A net2 VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
@@ -993,12 +970,12 @@ MX7 Y A net2 VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
* View Name: schematic
************************************************************************
-.SUBCKT sg13g2_nand3b_1 A_N B C VDD VSS Y
+.SUBCKT sg13g2_nand3b_1 Y A_N B C VDD VSS
*.PININFO A_N:I B:I C:I Y:O VDD:B VSS:B
MX0 net1 A_N VDD VDD sg13_lv_pmos m=1 w=840.00n l=130.00n ng=1
-MX1 Y net1 VDD VDD sg13_lv_pmos m=1 w=1.12e-06 l=130.00n ng=1
-MX2 Y B VDD VDD sg13_lv_pmos m=1 w=1.12e-06 l=130.00n ng=1
-MX6 Y C VDD VDD sg13_lv_pmos m=1 w=1.12e-06 l=130.00n ng=1
+MX1 Y net1 VDD VDD sg13_lv_pmos m=1 w=1.12u l=130.00n ng=1
+MX2 Y B VDD VDD sg13_lv_pmos m=1 w=1.12u l=130.00n ng=1
+MX6 Y C VDD VDD sg13_lv_pmos m=1 w=1.12u l=130.00n ng=1
MX3 net2 B net3 VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
MX4 net3 C VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
MX5 net1 A_N VSS VSS sg13_lv_nmos m=1 w=550.00n l=130.00n ng=1
@@ -1011,12 +988,12 @@ MX7 Y net1 net2 VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
* View Name: schematic
************************************************************************
-.SUBCKT sg13g2_nand4_1 A B C D VDD VSS Y
+.SUBCKT sg13g2_nand4_1 Y A B C D VDD VSS
*.PININFO A:I B:I C:I D:I Y:O VDD:B VSS:B
-MP0 Y D VDD VDD sg13_lv_pmos m=1 w=1.12e-06 l=130.00n ng=1
-MX1 Y A VDD VDD sg13_lv_pmos m=1 w=1.12e-06 l=130.00n ng=1
-MX2 Y B VDD VDD sg13_lv_pmos m=1 w=1.12e-06 l=130.00n ng=1
-MX6 Y C VDD VDD sg13_lv_pmos m=1 w=1.12e-06 l=130.00n ng=1
+MP0 Y D VDD VDD sg13_lv_pmos m=1 w=1.12u l=130.00n ng=1
+MX1 Y A VDD VDD sg13_lv_pmos m=1 w=1.12u l=130.00n ng=1
+MX2 Y B VDD VDD sg13_lv_pmos m=1 w=1.12u l=130.00n ng=1
+MX6 Y C VDD VDD sg13_lv_pmos m=1 w=1.12u l=130.00n ng=1
MX3 net2 B net3 VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
MX4 net3 C net5 VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
MX7 Y A net2 VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
@@ -1029,12 +1006,12 @@ MN0 net5 D VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
* View Name: schematic
************************************************************************
-.SUBCKT sg13g2_nor2_1 A B VDD VSS Y
+.SUBCKT sg13g2_nor2_1 Y A B VDD VSS
*.PININFO A:I B:I Y:O VDD:B VSS:B
MX0 Y A VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
MX3 Y B VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
-MX1 net1 A VDD VDD sg13_lv_pmos m=1 w=1.12e-06 l=130.00n ng=1
-MX2 Y B net1 VDD sg13_lv_pmos m=1 w=1.12e-06 l=130.00n ng=1
+MX1 net1 A VDD VDD sg13_lv_pmos m=1 w=1.12u l=130.00n ng=1
+MX2 Y B net1 VDD sg13_lv_pmos m=1 w=1.12u l=130.00n ng=1
.ENDS
************************************************************************
@@ -1043,7 +1020,7 @@ MX2 Y B net1 VDD sg13_lv_pmos m=1 w=1.12e-06 l=130.00n ng=1
* View Name: schematic
************************************************************************
-.SUBCKT sg13g2_nor2_2 A B VDD VSS Y
+.SUBCKT sg13g2_nor2_2 Y A B VDD VSS
*.PININFO A:I B:I Y:O VDD:B VSS:B
MX0 Y A VSS VSS sg13_lv_nmos m=1 w=1.48u l=130.00n ng=2
MX3 Y B VSS VSS sg13_lv_nmos m=1 w=1.48u l=130.00n ng=2
@@ -1057,7 +1034,7 @@ MX2 Y B net1 VDD sg13_lv_pmos m=1 w=2.24u l=130.00n ng=2
* View Name: schematic
************************************************************************
-.SUBCKT sg13g2_nor2b_1 A B_N VDD VSS Y
+.SUBCKT sg13g2_nor2b_1 Y A B_N VDD VSS
*.PININFO A:I B_N:I Y:O VDD:B VSS:B
MN0 B B_N VSS VSS sg13_lv_nmos m=1 w=550.00n l=130.00n ng=1
MX0 Y A VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
@@ -1073,14 +1050,14 @@ MX2 Y A net1 VDD sg13_lv_pmos m=1 w=1.12e-06 l=130.00n ng=1
* View Name: schematic
************************************************************************
-.SUBCKT sg13g2_nor2b_2 A B_N VDD VSS Y
+.SUBCKT sg13g2_nor2b_2 Y A B_N VDD VSS
*.PININFO A:I B_N:I Y:O VDD:B VSS:B
MN0 B B_N VSS VSS sg13_lv_nmos m=1 w=640.00n l=130.00n ng=1
-MX0 Y A VSS VSS sg13_lv_nmos m=2 w=720.00n l=130.00n ng=1
-MX3 Y B VSS VSS sg13_lv_nmos m=2 w=720.00n l=130.00n ng=1
+MX0 Y A VSS VSS sg13_lv_nmos m=1 w=1.44u l=130.00n ng=2
+MX3 Y B VSS VSS sg13_lv_nmos m=1 w=1.44u l=130.00n ng=2
MP0 B B_N VDD VDD sg13_lv_pmos m=1 w=1.000u l=130.00n ng=1
-MX1 net1 B VDD VDD sg13_lv_pmos m=2 w=1.12u l=130.00n ng=1
-MX2 Y A net1 VDD sg13_lv_pmos m=2 w=1.12u l=130.00n ng=1
+MX1 net1 B VDD VDD sg13_lv_pmos m=1 w=2.24u l=130.00n ng=2
+MX2 Y A net1 VDD sg13_lv_pmos m=1 w=2.24u l=130.00n ng=2
.ENDS
************************************************************************
@@ -1089,11 +1066,11 @@ MX2 Y A net1 VDD sg13_lv_pmos m=2 w=1.12u l=130.00n ng=1
* View Name: schematic
************************************************************************
-.SUBCKT sg13g2_nor3_1 A B C VDD VSS Y
+.SUBCKT sg13g2_nor3_1 Y A B C VDD VSS
*.PININFO A:I B:I C:I Y:O VDD:B VSS:B
-MX3 net1 C Y VDD sg13_lv_pmos m=1 w=1.12u l=130.00n ng=1
-MX0 net2 B net1 VDD sg13_lv_pmos m=1 w=1.12u l=130.00n ng=1
-MX2 VDD A net2 VDD sg13_lv_pmos m=1 w=1.12u l=130.00n ng=1
+MX3 Y C net2 VDD sg13_lv_pmos m=1 w=1.12u l=130.00n ng=1
+MX0 net2 B net3 VDD sg13_lv_pmos m=1 w=1.12u l=130.00n ng=1
+MX2 net3 A VDD VDD sg13_lv_pmos m=1 w=1.12u l=130.00n ng=1
MX4 Y A VSS VSS sg13_lv_nmos m=1 w=770.00n l=130.00n ng=1
MX1 Y B VSS VSS sg13_lv_nmos m=1 w=770.00n l=130.00n ng=1
MX5 Y C VSS VSS sg13_lv_nmos m=1 w=770.00n l=130.00n ng=1
@@ -1105,14 +1082,14 @@ MX5 Y C VSS VSS sg13_lv_nmos m=1 w=770.00n l=130.00n ng=1
* View Name: schematic
************************************************************************
-.SUBCKT sg13g2_nor3_2 A B C VDD VSS Y
+.SUBCKT sg13g2_nor3_2 Y A B C VDD VSS
*.PININFO A:I B:I C:I Y:O VDD:B VSS:B
-MX3 net1 C Y VDD sg13_lv_pmos m=2 w=1.12u l=130.00n ng=1
-MX0 net2 B net1 VDD sg13_lv_pmos m=2 w=1.12u l=130.00n ng=1
-MX2 VDD A net2 VDD sg13_lv_pmos m=2 w=1.12u l=130.00n ng=1
-MX4 Y A VSS VSS sg13_lv_nmos m=2 w=740.00n l=130.00n ng=1
-MX1 Y B VSS VSS sg13_lv_nmos m=2 w=740.00n l=130.00n ng=1
-MX5 Y C VSS VSS sg13_lv_nmos m=2 w=740.00n l=130.00n ng=1
+MX3 Y C net2 VDD sg13_lv_pmos m=1 w=2.24u l=130.00n ng=2
+MX0 net2 B net3 VDD sg13_lv_pmos m=1 w=2.24u l=130.00n ng=2
+MX2 net3 A VDD VDD sg13_lv_pmos m=1 w=2.24u l=130.00n ng=2
+MX4 Y A VSS VSS sg13_lv_nmos m=1 w=1.48u l=130.00n ng=2
+MX1 Y B VSS VSS sg13_lv_nmos m=1 w=1.48u l=130.00n ng=2
+MX5 Y C VSS VSS sg13_lv_nmos m=1 w=1.48u l=130.00n ng=2
.ENDS
************************************************************************
@@ -1121,12 +1098,12 @@ MX5 Y C VSS VSS sg13_lv_nmos m=2 w=740.00n l=130.00n ng=1
* View Name: schematic
************************************************************************
-.SUBCKT sg13g2_nor4_1 A B C D VDD VSS Y
+.SUBCKT sg13g2_nor4_1 Y A B C D VDD VSS
*.PININFO A:I B:I C:I D:I Y:O VDD:B VSS:B
-MX0 net3 A VDD VDD sg13_lv_pmos m=1 w=1.12e-06 l=130.00n ng=1
-MX5 net2 B net3 VDD sg13_lv_pmos m=1 w=1.12e-06 l=130.00n ng=1
-MX6 net1 C net2 VDD sg13_lv_pmos m=1 w=1.12e-06 l=130.00n ng=1
-MX7 Y D net1 VDD sg13_lv_pmos m=1 w=1.12e-06 l=130.00n ng=1
+MX0 net3 A VDD VDD sg13_lv_pmos m=1 w=1.12u l=130.00n ng=1
+MX5 net2 B net3 VDD sg13_lv_pmos m=1 w=1.12u l=130.00n ng=1
+MX6 net1 C net2 VDD sg13_lv_pmos m=1 w=1.12u l=130.00n ng=1
+MX7 Y D net1 VDD sg13_lv_pmos m=1 w=1.12u l=130.00n ng=1
MX1 Y A VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
MX2 Y D VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
MX3 Y B VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
@@ -1139,16 +1116,16 @@ MX4 Y C VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
* View Name: schematic
************************************************************************
-.SUBCKT sg13g2_nor4_2 A B C D VDD VSS Y
+.SUBCKT sg13g2_nor4_2 Y A B C D VDD VSS
*.PININFO A:I B:I C:I D:I Y:O VDD:B VSS:B
-MX0 net3 A VDD VDD sg13_lv_pmos m=2 w=1.12u l=130.00n ng=1
-MX5 net2 B net3 VDD sg13_lv_pmos m=2 w=1.12u l=130.00n ng=1
-MX6 net1 C net2 VDD sg13_lv_pmos m=2 w=1.12u l=130.00n ng=1
-MX7 Y D net1 VDD sg13_lv_pmos m=2 w=1.12u l=130.00n ng=1
-MX1 Y A VSS VSS sg13_lv_nmos m=2 w=740.00n l=130.00n ng=1
-MX2 Y D VSS VSS sg13_lv_nmos m=2 w=740.00n l=130.00n ng=1
-MX3 Y B VSS VSS sg13_lv_nmos m=2 w=740.00n l=130.00n ng=1
-MX4 Y C VSS VSS sg13_lv_nmos m=2 w=740.00n l=130.00n ng=1
+MX0 net3 A VDD VDD sg13_lv_pmos m=1 w=2.24u l=130.00n ng=2
+MX5 net2 B net3 VDD sg13_lv_pmos m=1 w=2.24u l=130.00n ng=2
+MX6 net1 C net2 VDD sg13_lv_pmos m=1 w=2.24u l=130.00n ng=2
+MX7 Y D net1 VDD sg13_lv_pmos m=1 w=2.24u l=130.00n ng=2
+MX1 Y A VSS VSS sg13_lv_nmos m=1 w=1.48u l=130.00n ng=2
+MX2 Y D VSS VSS sg13_lv_nmos m=1 w=1.48u l=130.00n ng=2
+MX3 Y B VSS VSS sg13_lv_nmos m=1 w=1.48u l=130.00n ng=2
+MX4 Y C VSS VSS sg13_lv_nmos m=1 w=1.48u l=130.00n ng=2
.ENDS
************************************************************************
@@ -1157,7 +1134,7 @@ MX4 Y C VSS VSS sg13_lv_nmos m=2 w=740.00n l=130.00n ng=1
* View Name: schematic
************************************************************************
-.SUBCKT sg13g2_o21ai_1 A1 A2 B1 VDD VSS Y
+.SUBCKT sg13g2_o21ai_1 Y A1 A2 B1 VDD VSS
*.PININFO A1:I A2:I B1:I Y:O VDD:B VSS:B
MP2 net14 A1 VDD VDD sg13_lv_pmos m=1 w=1.12u l=150.00n ng=1
MP1 Y A2 net14 VDD sg13_lv_pmos m=1 w=1.12u l=150.00n ng=1
@@ -1173,11 +1150,11 @@ MN0 Y B1 net1 VSS sg13_lv_nmos m=1 w=740.00n l=150.00n ng=1
* View Name: schematic
************************************************************************
-.SUBCKT sg13g2_or2_1 A B VDD VSS X
+.SUBCKT sg13g2_or2_1 X A B VDD VSS
*.PININFO A:I B:I X:O VDD:B VSS:B
MP0 net2 B net3 VDD sg13_lv_pmos m=1 w=840.00n l=130.00n ng=1
MP1 net3 A VDD VDD sg13_lv_pmos m=1 w=840.00n l=130.00n ng=1
-MP2 X net2 VDD VDD sg13_lv_pmos m=1 w=1.12e-06 l=130.00n ng=1
+MP2 X net2 VDD VDD sg13_lv_pmos m=1 w=1.12u l=130.00n ng=1
MN0 net2 A VSS VSS sg13_lv_nmos m=1 w=550.00n l=130.00n ng=1
MN1 net2 B VSS VSS sg13_lv_nmos m=1 w=550.00n l=130.00n ng=1
MN2 X net2 VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
@@ -1189,14 +1166,14 @@ MN2 X net2 VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
* View Name: schematic
************************************************************************
-.SUBCKT sg13g2_or2_2 A B VDD VSS X
+.SUBCKT sg13g2_or2_2 X A B VDD VSS
*.PININFO A:I B:I X:O VDD:B VSS:B
MP0 net2 B net3 VDD sg13_lv_pmos m=1 w=840.00n l=130.00n ng=1
MP1 net3 A VDD VDD sg13_lv_pmos m=1 w=840.00n l=130.00n ng=1
-MP2 X net2 VDD VDD sg13_lv_pmos m=2 w=1.12u l=130.00n ng=1
+MP2 X net2 VDD VDD sg13_lv_pmos m=1 w=2.24u l=130.00n ng=2
MN0 net2 A VSS VSS sg13_lv_nmos m=1 w=550.00n l=130.00n ng=1
MN1 net2 B VSS VSS sg13_lv_nmos m=1 w=550.00n l=130.00n ng=1
-MN2 X net2 VSS VSS sg13_lv_nmos m=2 w=740.00n l=130.00n ng=1
+MN2 X net2 VSS VSS sg13_lv_nmos m=1 w=1.48u l=130.00n ng=2
.ENDS
************************************************************************
@@ -1205,7 +1182,7 @@ MN2 X net2 VSS VSS sg13_lv_nmos m=2 w=740.00n l=130.00n ng=1
* View Name: schematic
************************************************************************
-.SUBCKT sg13g2_or3_1 A B C VDD VSS X
+.SUBCKT sg13g2_or3_1 X A B C VDD VSS
*.PININFO A:I B:I C:I X:O VDD:B VSS:B
MX0 net1 C VSS VSS sg13_lv_nmos m=1 w=550.00n l=130.00n ng=1
MX1 X net1 VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
@@ -1223,13 +1200,13 @@ MX5 net1 C net9 VDD sg13_lv_pmos m=1 w=1.000u l=130.00n ng=1
* View Name: schematic
************************************************************************
-.SUBCKT sg13g2_or3_2 A B C VDD VSS X
+.SUBCKT sg13g2_or3_2 X A B C VDD VSS
*.PININFO A:I B:I C:I X:O VDD:B VSS:B
MX0 net1 C VSS VSS sg13_lv_nmos m=1 w=550.00n l=130.00n ng=1
-MX1 X net1 VSS VSS sg13_lv_nmos m=2 w=740.00n l=130.00n ng=1
+MX1 X net1 VSS VSS sg13_lv_nmos m=1 w=1.48u l=130.00n ng=2
MX6 net1 B VSS VSS sg13_lv_nmos m=1 w=550.00n l=130.00n ng=1
MX7 net1 A VSS VSS sg13_lv_nmos m=1 w=550.00n l=130.00n ng=1
-MX2 X net1 VDD VDD sg13_lv_pmos m=2 w=1.12u l=130.00n ng=1
+MX2 X net1 VDD VDD sg13_lv_pmos m=1 w=2.24u l=130.00n ng=2
MX3 net9 B net12 VDD sg13_lv_pmos m=1 w=1.000u l=130.00n ng=1
MX4 net12 A VDD VDD sg13_lv_pmos m=1 w=1.000u l=130.00n ng=1
MX5 net1 C net9 VDD sg13_lv_pmos m=1 w=1.000u l=130.00n ng=1
@@ -1241,7 +1218,7 @@ MX5 net1 C net9 VDD sg13_lv_pmos m=1 w=1.000u l=130.00n ng=1
* View Name: schematic
************************************************************************
-.SUBCKT sg13g2_or4_1 A B C D VDD VSS X
+.SUBCKT sg13g2_or4_1 X A B C D VDD VSS
*.PININFO A:I B:I C:I D:I X:O VDD:B VSS:B
MN4 X net1 VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
MN3 net1 D VSS VSS sg13_lv_nmos m=1 w=550.00n l=130.00n ng=1
@@ -1261,9 +1238,9 @@ MP0 X net1 VDD VDD sg13_lv_pmos m=1 w=1.12u l=130.00n ng=1
* View Name: schematic
************************************************************************
-.SUBCKT sg13g2_or4_2 A B C D VDD VSS X
+.SUBCKT sg13g2_or4_2 X A B C D VDD VSS
*.PININFO A:I B:I C:I D:I X:O VDD:B VSS:B
-MN4 X net1 VSS VSS sg13_lv_nmos m=2 w=740.00n l=130.00n ng=1
+MN4 X net1 VSS VSS sg13_lv_nmos m=1 w=1.48u l=130.00n ng=2
MN3 net1 D VSS VSS sg13_lv_nmos m=1 w=550.00n l=130.00n ng=1
MN2 net1 C VSS VSS sg13_lv_nmos m=1 w=550.00n l=130.00n ng=1
MN1 net1 B VSS VSS sg13_lv_nmos m=1 w=550.00n l=130.00n ng=1
@@ -1272,7 +1249,7 @@ MP4 net4 A VDD VDD sg13_lv_pmos m=1 w=1.000u l=130.00n ng=1
MP3 net3 B net4 VDD sg13_lv_pmos m=1 w=1.000u l=130.00n ng=1
MP2 net2 C net3 VDD sg13_lv_pmos m=1 w=1.000u l=130.00n ng=1
MP1 net1 D net2 VDD sg13_lv_pmos m=1 w=1.000u l=130.00n ng=1
-MP0 X net1 VDD VDD sg13_lv_pmos m=2 w=1.12u l=130.00n ng=1
+MP0 X net1 VDD VDD sg13_lv_pmos m=1 w=2.24u l=130.00n ng=2
.ENDS
************************************************************************
@@ -1281,71 +1258,56 @@ MP0 X net1 VDD VDD sg13_lv_pmos m=2 w=1.12u l=130.00n ng=1
* View Name: schematic
************************************************************************
-.SUBCKT sg13g2_sdfbbp_1 CLK D Q Q_N RESET_B SCD SCE SET_B VDD VSS
+.SUBCKT sg13g2_sdfbbp_1 Q Q_N CLK D RESET_B SCD SCE SET_B VDD VSS
*.PININFO CLK:I D:I RESET_B:I SCD:I SCE:I SET_B:I Q:O Q_N:O VDD:B VSS:B
-MX46 a_1625_93_ RESET_B VDD VDD sg13_lv_pmos m=1 w=640.00n l=130.00n ng=1
-MX45 a_2037_442_ a_1878_420_ a_2384_392_ VDD sg13_lv_pmos m=1 w=1.000u
-+ l=130.00n ng=1
-MX44 VDD SET_B a_2037_442_ VDD sg13_lv_pmos m=1 w=1.000u l=130.00n ng=1
-MX41 VDD a_622_98_ a_877_98_ VDD sg13_lv_pmos m=1 w=1.12e-06 l=130.00n ng=1
-MX39 VDD SCE a_341_93_ VDD sg13_lv_pmos m=1 w=640.00n l=130.00n ng=1
-MX38 a_218_464_ D a_197_119_ VDD sg13_lv_pmos m=1 w=640.00n l=130.00n ng=1
-MX33 a_1092_96_ a_622_98_ a_1221_419_ VDD sg13_lv_pmos m=1 w=420.00n l=130.00n
-+ ng=1
-MX28 a_1221_419_ a_1250_231_ VDD VDD sg13_lv_pmos m=1 w=420.00n l=130.00n ng=1
-MX27 VDD SCE a_218_464_ VDD sg13_lv_pmos m=1 w=640.00n l=130.00n ng=1
-MX26 VDD a_2037_442_ Q_N VDD sg13_lv_pmos m=1 w=1.12e-06 l=130.00n ng=1
-MX24 VDD a_1250_231_ a_1766_379_ VDD sg13_lv_pmos m=1 w=840.00n l=130.00n ng=1
-MX19 a_2384_392_ a_1625_93_ VDD VDD sg13_lv_pmos m=1 w=1.000u l=130.00n ng=1
-MX17 VDD SET_B a_1250_231_ VDD sg13_lv_pmos m=1 w=840.00n l=130.00n ng=1
-MX16 a_27_464_ SCD VDD VDD sg13_lv_pmos m=1 w=640.00n l=130.00n ng=1
-MX15 a_622_98_ CLK VDD VDD sg13_lv_pmos m=1 w=1.12e-06 l=130.00n ng=1
-MX14 a_1250_231_ a_1092_96_ a_1580_379_ VDD sg13_lv_pmos m=1 w=840.00n
-+ l=130.00n ng=1
-MX11 a_197_119_ a_877_98_ a_1092_96_ VDD sg13_lv_pmos m=1 w=640.00n l=130.00n
-+ ng=1
-MX9 a_197_119_ a_341_93_ a_27_464_ VDD sg13_lv_pmos m=1 w=640.00n l=130.00n
-+ ng=1
-MX8 a_2881_74_ a_2037_442_ VDD VDD sg13_lv_pmos m=1 w=840.00n l=130.00n ng=1
-MX7 a_1580_379_ a_1625_93_ VDD VDD sg13_lv_pmos m=1 w=840.00n l=130.00n ng=1
-MX6 a_1986_504_ a_2037_442_ VDD VDD sg13_lv_pmos m=1 w=420.00n l=130.00n ng=1
-MX5 a_1878_420_ a_877_98_ a_1986_504_ VDD sg13_lv_pmos m=1 w=420.00n l=130.00n
-+ ng=1
-MX4 a_1766_379_ a_622_98_ a_1878_420_ VDD sg13_lv_pmos m=1 w=840.00n l=130.00n
-+ ng=1
-MX3 VDD a_2881_74_ Q VDD sg13_lv_pmos m=1 w=1.12e-06 l=130.00n ng=1
-MX47 a_2271_74_ a_1878_420_ a_2037_442_ VSS sg13_lv_nmos m=1 w=740.00n
-+ l=130.00n ng=1
-MX43 a_197_119_ a_622_98_ a_1092_96_ VSS sg13_lv_nmos m=1 w=420.00n l=130.00n
-+ ng=1
-MX42 a_299_119_ a_341_93_ VSS VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
-MX40 VSS a_622_98_ a_877_98_ VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
-MX37 a_1625_93_ RESET_B VSS VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
-MX36 a_2061_74_ a_2037_442_ VSS VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
-MX35 a_1418_125_ a_1092_96_ a_1250_231_ VSS sg13_lv_nmos m=1 w=550.00n
-+ l=130.00n ng=1
-MX34 VSS SCE a_341_93_ VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
-MX32 VSS SET_B a_1418_125_ VSS sg13_lv_nmos m=1 w=550.00n l=130.00n ng=1
-MX31 a_1192_96_ a_1250_231_ VSS VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
-MX30 a_119_119_ SCE a_197_119_ VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
-MX29 VSS SET_B a_2271_74_ VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
-MX25 a_1092_96_ a_877_98_ a_1192_96_ VSS sg13_lv_nmos m=1 w=420.00n l=130.00n
-+ ng=1
-MX23 a_197_119_ D a_299_119_ VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
-MX22 a_2881_74_ a_2037_442_ VSS VSS sg13_lv_nmos m=1 w=550.00n l=130.00n ng=1
-MX21 a_1878_420_ a_622_98_ a_2061_74_ VSS sg13_lv_nmos m=1 w=420.00n l=130.00n
-+ ng=1
-MX20 VSS a_2881_74_ Q VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
-MX18 VSS a_1250_231_ a_1880_119_ VSS sg13_lv_nmos m=1 w=550.00n l=130.00n ng=1
-MX13 a_622_98_ CLK VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
-MX12 VSS SCD a_119_119_ VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
-MX10 a_1880_119_ a_877_98_ a_1878_420_ VSS sg13_lv_nmos m=1 w=550.00n
-+ l=130.00n ng=1
-MX2 a_1250_231_ a_1625_93_ a_1418_125_ VSS sg13_lv_nmos m=1 w=550.00n
-+ l=130.00n ng=1
-MX1 VSS a_2037_442_ Q_N VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
-MX0 a_2037_442_ a_1625_93_ a_2271_74_ VSS sg13_lv_nmos m=1 w=740.00n l=130.00n
-+ ng=1
+MX46 resetbb RESET_B VDD VDD sg13_lv_pmos m=1 w=640.00n l=130.00n ng=1
+MX45 pre_q DbbLatch2 net8 VDD sg13_lv_pmos m=1 w=1.000u l=130.00n ng=1
+MX44 pre_q SET_B VDD VDD sg13_lv_pmos m=1 w=1.000u l=130.00n ng=1
+MX41 CLKbb CLKb VDD VDD sg13_lv_pmos m=1 w=1.12u l=130.00n ng=1
+MX39 SCEb SCE VDD VDD sg13_lv_pmos m=1 w=640.00n l=130.00n ng=1
+MX38 Db D net3 VDD sg13_lv_pmos m=1 w=640.00n l=130.00n ng=1
+MX33 DbbTG CLKb net10 VDD sg13_lv_pmos m=1 w=420.00n l=130.00n ng=1
+MX28 net10 DbLatchM VDD VDD sg13_lv_pmos m=1 w=420.00n l=130.00n ng=1
+MX27 net3 SCE VDD VDD sg13_lv_pmos m=1 w=640.00n l=130.00n ng=1
+MX26 Q_N pre_q VDD VDD sg13_lv_pmos m=1 w=1.12u l=130.00n ng=1
+MX24 net1 DbLatchM VDD VDD sg13_lv_pmos m=1 w=840.00n l=130.00n ng=1
+MX19 net8 resetbb VDD VDD sg13_lv_pmos m=1 w=1.000u l=130.00n ng=1
+MX17 DbLatchM SET_B VDD VDD sg13_lv_pmos m=1 w=840.00n l=130.00n ng=1
+MX16 net2 SCD VDD VDD sg13_lv_pmos m=1 w=640.00n l=130.00n ng=1
+MX15 CLKb CLK VDD VDD sg13_lv_pmos m=1 w=1.12u l=130.00n ng=1
+MX14 DbLatchM DbbTG net7 VDD sg13_lv_pmos m=1 w=840.00n l=130.00n ng=1
+MX11 Db CLKbb DbbTG VDD sg13_lv_pmos m=1 w=640.00n l=130.00n ng=1
+MX9 Db SCEb net2 VDD sg13_lv_pmos m=1 w=640.00n l=130.00n ng=1
+MX8 pre_qb pre_q VDD VDD sg13_lv_pmos m=1 w=840.00n l=130.00n ng=1
+MX7 net7 resetbb VDD VDD sg13_lv_pmos m=1 w=840.00n l=130.00n ng=1
+MX6 net6 pre_q VDD VDD sg13_lv_pmos m=1 w=420.00n l=130.00n ng=1
+MX5 DbbLatch2 CLKbb net6 VDD sg13_lv_pmos m=1 w=420.00n l=130.00n ng=1
+MX4 DbbLatch2 CLKb net1 VDD sg13_lv_pmos m=1 w=840.00n l=130.00n ng=1
+MX3 Q pre_qb VDD VDD sg13_lv_pmos m=1 w=1.12u l=130.00n ng=1
+MN1 Db SCE net5 VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
+MN0 net5 SCD VSS VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
+MX47 pre_q DbbLatch2 net11 VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
+MX43 Db CLKb DbbTG VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
+MX42 net4 SCEb VSS VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
+MX40 CLKbb CLKb VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
+MX37 resetbb RESET_B VSS VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
+MX36 net14 pre_q VSS VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
+MX35 DbLatchM DbbTG net12 VSS sg13_lv_nmos m=1 w=550.00n l=130.00n ng=1
+MX34 SCEb SCE VSS VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
+MX32 net12 SET_B VSS VSS sg13_lv_nmos m=1 w=550.00n l=130.00n ng=1
+MX31 net15 DbLatchM VSS VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
+MX29 net11 SET_B VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
+MX25 DbbTG CLKbb net15 VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
+MX23 Db D net4 VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
+MX22 pre_qb pre_q VSS VSS sg13_lv_nmos m=1 w=550.00n l=130.00n ng=1
+MX21 DbbLatch2 CLKb net14 VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
+MX20 Q pre_qb VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
+MX18 net13 DbLatchM VSS VSS sg13_lv_nmos m=1 w=550.00n l=130.00n ng=1
+MX13 CLKb CLK VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
+MX10 DbbLatch2 CLKbb net13 VSS sg13_lv_nmos m=1 w=550.00n l=130.00n ng=1
+MX2 DbLatchM resetbb net12 VSS sg13_lv_nmos m=1 w=550.00n l=130.00n ng=1
+MX1 Q_N pre_q VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
+MX0 pre_q resetbb net11 VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
.ENDS
************************************************************************
@@ -1368,30 +1330,30 @@ MP1 SH net1 VDD VDD sg13_lv_pmos m=1 w=300.0n l=700.0n ng=1
* View Name: schematic
************************************************************************
-.SUBCKT sg13g2_slgcp_1 CLK GATE GCLK SCE VDD VSS
+.SUBCKT sg13g2_slgcp_1 GCLK CLK GATE SCE VDD VSS
*.PININFO CLK:I GATE:I SCE:I GCLK:O VDD:B VSS:B
-MX19 GCLK a_1238_94_ VDD VDD sg13_lv_pmos m=1 w=1.12e-06 l=130.00n ng=1
-MX18 a_114_112_ CLKbb a_566_74_ VDD sg13_lv_pmos m=1 w=840.00n l=130.00n ng=1
+MX19 GCLK net5 VDD VDD sg13_lv_pmos m=1 w=1.12u l=130.00n ng=1
+MX18 net1 CLKbb net6 VDD sg13_lv_pmos m=1 w=840.00n l=130.00n ng=1
MX16 CLKbb CLKb VDD VDD sg13_lv_pmos m=1 w=840.00n l=130.00n ng=1
-MX14 a_1238_94_ int_GATE VDD VDD sg13_lv_pmos m=1 w=840.00n l=130.00n ng=1
-MX13 a_116_424_ SCE VDD VDD sg13_lv_pmos m=1 w=840.00n l=130.00n ng=1
-MX11 a_566_74_ CLKb a_722_492_ VDD sg13_lv_pmos m=1 w=420.00n l=130.00n ng=1
-MX9 int_GATE a_566_74_ VDD VDD sg13_lv_pmos m=1 w=1.12e-06 l=130.00n ng=1
+MX14 net5 int_GATE VDD VDD sg13_lv_pmos m=1 w=840.00n l=130.00n ng=1
+MX13 net3 SCE VDD VDD sg13_lv_pmos m=1 w=840.00n l=130.00n ng=1
+MX11 net6 CLKb net4 VDD sg13_lv_pmos m=1 w=420.00n l=130.00n ng=1
+MX9 int_GATE net6 VDD VDD sg13_lv_pmos m=1 w=1.12u l=130.00n ng=1
MX7 CLKb CLK VDD VDD sg13_lv_pmos m=1 w=840.00n l=130.00n ng=1
-MX5 a_1238_94_ CLK VDD VDD sg13_lv_pmos m=1 w=840.00n l=130.00n ng=1
-MX3 a_722_492_ int_GATE VDD VDD sg13_lv_pmos m=1 w=420.00n l=130.00n ng=1
-MX2 a_114_112_ GATE a_116_424_ VDD sg13_lv_pmos m=1 w=840.00n l=130.00n ng=1
-MX21 int_GATE a_566_74_ VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
+MX5 net5 CLK VDD VDD sg13_lv_pmos m=1 w=840.00n l=130.00n ng=1
+MX3 net4 int_GATE VDD VDD sg13_lv_pmos m=1 w=420.00n l=130.00n ng=1
+MX2 net1 GATE net3 VDD sg13_lv_pmos m=1 w=840.00n l=130.00n ng=1
+MX21 int_GATE net6 VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
MX20 net2 CLK VSS VSS sg13_lv_nmos m=1 w=640.00n l=130.00n ng=1
-MX17 a_114_112_ SCE VSS VSS sg13_lv_nmos m=1 w=550.00n l=130.00n ng=1
-MX15 a_566_74_ CLKb a_114_112_ VSS sg13_lv_nmos m=1 w=550.00n l=130.00n ng=1
-MX12 a_667_80_ int_GATE VSS VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
-MX10 a_1238_94_ int_GATE net2 VSS sg13_lv_nmos m=1 w=640.00n l=130.00n ng=1
-MX8 GCLK a_1238_94_ VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
+MX17 net1 SCE VSS VSS sg13_lv_nmos m=1 w=550.00n l=130.00n ng=1
+MX15 net6 CLKb net1 VSS sg13_lv_nmos m=1 w=550.00n l=130.00n ng=1
+MX12 net7 int_GATE VSS VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
+MX10 net5 int_GATE net2 VSS sg13_lv_nmos m=1 w=640.00n l=130.00n ng=1
+MX8 GCLK net5 VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
MX6 CLKbb CLKb VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
-MX4 a_114_112_ GATE VSS VSS sg13_lv_nmos m=1 w=550.00n l=130.00n ng=1
+MX4 net1 GATE VSS VSS sg13_lv_nmos m=1 w=550.00n l=130.00n ng=1
MX1 CLKb CLK VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
-MX0 a_566_74_ CLKbb a_667_80_ VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
+MX0 net6 CLKbb net7 VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
.ENDS
************************************************************************
@@ -1428,7 +1390,7 @@ MMP2 net1 net3 VDD VDD sg13_lv_pmos m=1 w=1.045u l=130.00n ng=1
* View Name: schematic
************************************************************************
-.SUBCKT sg13g2_xnor2_1 A B VDD VSS Y
+.SUBCKT sg13g2_xnor2_1 Y A B VDD VSS
*.PININFO A:I B:I Y:O VDD:B VSS:B
MP9 Y net1 VDD VDD sg13_lv_pmos m=1 w=1.12u l=130.00n ng=1
MP8 Y B net4 VDD sg13_lv_pmos m=1 w=1.12u l=130.00n ng=1
@@ -1448,7 +1410,7 @@ MN2 net3 A VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
* View Name: schematic
************************************************************************
-.SUBCKT sg13g2_xor2_1 A B VDD VSS X
+.SUBCKT sg13g2_xor2_1 X A B VDD VSS
*.PININFO A:I B:I X:O VDD:B VSS:B
MX0 net1 A VSS VSS sg13_lv_nmos m=1 w=550.00n l=130.00n ng=1
MX4 X B net3 VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
@@ -1457,9 +1419,9 @@ MX8 net3 A VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
MX9 net1 B VSS VSS sg13_lv_nmos m=1 w=550.00n l=130.00n ng=1
MX1 net6 A VDD VDD sg13_lv_pmos m=1 w=1.000u l=130.00n ng=1
MX2 net1 B net6 VDD sg13_lv_pmos m=1 w=1.000u l=130.00n ng=1
-MX3 net5 A VDD VDD sg13_lv_pmos m=1 w=1.12e-06 l=130.00n ng=1
-MX5 net5 B VDD VDD sg13_lv_pmos m=1 w=1.12e-06 l=130.00n ng=1
-MX7 X net1 net5 VDD sg13_lv_pmos m=1 w=1.12e-06 l=130.00n ng=1
+MX3 net5 A VDD VDD sg13_lv_pmos m=1 w=1.12u l=130.00n ng=1
+MX5 net5 B VDD VDD sg13_lv_pmos m=1 w=1.12u l=130.00n ng=1
+MX7 X net1 net5 VDD sg13_lv_pmos m=1 w=1.12u l=130.00n ng=1
.ENDS
************************************************************************
@@ -1468,10 +1430,10 @@ MX7 X net1 net5 VDD sg13_lv_pmos m=1 w=1.12e-06 l=130.00n ng=1
* View Name: schematic
************************************************************************
-.SUBCKT sg13g2_a22oi_1 A1 A2 B1 B2 VDD VSS Y
+.SUBCKT sg13g2_a22oi_1 Y A1 A2 B1 B2 VDD VSS
*.PININFO A1:I A2:I B1:I B2:I Y:O VDD:B VSS:B
-MN3 net1 B2 VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
-MMNB0 Y B1 net1 VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
+MN3 net1 B1 VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
+MMNB0 Y B2 net1 VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
MMNA1 sndA1 A2 VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
MMNA0 Y A1 sndA1 VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
MP3 Y B1 pndA VDD sg13_lv_pmos m=1 w=1.12u l=130.00n ng=1
@@ -1479,3 +1441,343 @@ MMPB0 Y B2 pndA VDD sg13_lv_pmos m=1 w=1.12u l=130.00n ng=1
MMPA1 pndA A2 VDD VDD sg13_lv_pmos m=1 w=1.12u l=130.00n ng=1
MMPA0 pndA A1 VDD VDD sg13_lv_pmos m=1 w=1.12u l=130.00n ng=1
.ENDS
+
+************************************************************************
+* Library Name: sg13g2_stdcell
+* Cell Name: sg13g2_sdfrbpq_2
+* View Name: schematic
+************************************************************************
+
+.SUBCKT sg13g2_sdfrbpq_2 Q CLK D RESET_B SCD SCE VDD VSS
+*.PININFO CLK:I D:I RESET_B:I SCD:I SCE:I Q:O VDD:B VSS:B
+MN22 Db SCD net63 VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
+MN21 Db D net65 VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
+MN19 SCEb SCE VSS VSS sg13_lv_nmos m=1 w=550.00n l=130.00n ng=1
+MN18 net63 SCE VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
+MN17 net65 SCEb VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
+MN23 Dbb Db VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
+MN13 net12 net2 VSS VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
+MN14 net5 clkneg net12 VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
+MN15 net2 net5 net11 VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
+MN16 net11 RESET_B VSS VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
+MN6 Q net2 VSS VSS sg13_lv_nmos m=1 w=1.48u l=130.00n ng=2
+MN0 Dbbb Dbb net10 VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
+MN1 net10 RESET_B VSS VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
+MN7 Dbbb clkneg net6 VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
+MN8 net6 clkpos net9 VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
+MN9 net9 net4 net8 VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
+MN10 net8 RESET_B VSS VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
+MN11 net4 net6 VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
+MN2 clkneg CLK VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
+MN12 net4 clkpos net5 VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
+MN3 clkpos clkneg VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
+MP22 net64 SCE VDD VDD sg13_lv_pmos m=1 w=1.000u l=130.00n ng=1
+MP21 net62 SCEb VDD VDD sg13_lv_pmos m=1 w=1.000u l=130.00n ng=1
+MP20 SCEb SCE VDD VDD sg13_lv_pmos m=1 w=840.00n l=130.00n ng=1
+MP18 Db SCD net62 VDD sg13_lv_pmos m=1 w=1.000u l=130.00n ng=1
+MP17 Db D net64 VDD sg13_lv_pmos m=1 w=1.000u l=130.00n ng=1
+MP23 Dbb Db VDD VDD sg13_lv_pmos m=1 w=1.12u l=130.00n ng=1
+MP14 net5 clkpos net3 VDD sg13_lv_pmos m=1 w=420.00n l=130.00n ng=1
+MP15 net2 net5 VDD VDD sg13_lv_pmos m=1 w=420.00n l=130.00n ng=1
+MP16 net2 RESET_B VDD VDD sg13_lv_pmos m=1 w=420.00n l=130.00n ng=1
+MP6 Q net2 VDD VDD sg13_lv_pmos m=1 w=2.24u l=130.00n ng=2
+MP7 Dbbb clkpos net6 VDD sg13_lv_pmos m=1 w=420.00n l=130.00n ng=1
+MP0 Dbbb RESET_B VDD VDD sg13_lv_pmos m=1 w=420.00n l=130.00n ng=1
+MP1 Dbbb Dbb VDD VDD sg13_lv_pmos m=1 w=420.00n l=130.00n ng=1
+MP8 net7 net4 VDD VDD sg13_lv_pmos m=1 w=420.00n l=130.00n ng=1
+MP9 net6 clkneg net7 VDD sg13_lv_pmos m=1 w=420.00n l=130.00n ng=1
+MP10 net6 RESET_B VDD VDD sg13_lv_pmos m=1 w=420.00n l=130.00n ng=1
+MP2 clkneg CLK VDD VDD sg13_lv_pmos m=1 w=1.12u l=130.00n ng=1
+MP3 clkpos clkneg VDD VDD sg13_lv_pmos m=1 w=1.12u l=130.00n ng=1
+MP11 net4 net6 VDD VDD sg13_lv_pmos m=1 w=1.000u l=130.00n ng=1
+MP12 net4 clkneg net5 VDD sg13_lv_pmos m=1 w=1.000u l=130.00n ng=1
+MP13 net3 net2 VDD VDD sg13_lv_pmos m=1 w=420.00n l=130.00n ng=1
+.ENDS
+
+************************************************************************
+* Library Name: sg13g2_stdcell
+* Cell Name: sg13g2_sdfrbpq_1
+* View Name: schematic
+************************************************************************
+
+.SUBCKT sg13g2_sdfrbpq_1 Q CLK D RESET_B SCD SCE VDD VSS
+*.PININFO CLK:I D:I RESET_B:I SCD:I SCE:I Q:O VDD:B VSS:B
+MN22 Db SCD net63 VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
+MN21 Db D net65 VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
+MN19 SCEb SCE VSS VSS sg13_lv_nmos m=1 w=550.00n l=130.00n ng=1
+MN18 net63 SCE VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
+MN17 net65 SCEb VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
+MN13 net12 net2 VSS VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
+MN14 net5 clkneg net12 VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
+MN15 net2 net5 net11 VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
+MN16 net11 RESET_B VSS VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
+MN6 Q net2 VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
+MN0 Dbbb Dbb net10 VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
+MN1 net10 RESET_B VSS VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
+MN7 Dbbb clkneg net6 VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
+MN8 net6 clkpos net9 VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
+MN9 net9 net4 net8 VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
+MN10 net8 RESET_B VSS VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
+MN11 net4 net6 VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
+MN2 clkneg CLK VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
+MN12 net4 clkpos net5 VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
+MN3 clkpos clkneg VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
+MN23 Dbb Db VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
+MP22 net64 SCE VDD VDD sg13_lv_pmos m=1 w=1.000u l=130.00n ng=1
+MP21 net62 SCEb VDD VDD sg13_lv_pmos m=1 w=1.000u l=130.00n ng=1
+MP20 SCEb SCE VDD VDD sg13_lv_pmos m=1 w=840.00n l=130.00n ng=1
+MP18 Db SCD net62 VDD sg13_lv_pmos m=1 w=1.000u l=130.00n ng=1
+MP17 Db D net64 VDD sg13_lv_pmos m=1 w=1.000u l=130.00n ng=1
+MP14 net5 clkpos net3 VDD sg13_lv_pmos m=1 w=420.00n l=130.00n ng=1
+MP15 net2 net5 VDD VDD sg13_lv_pmos m=1 w=420.00n l=130.00n ng=1
+MP16 net2 RESET_B VDD VDD sg13_lv_pmos m=1 w=420.00n l=130.00n ng=1
+MP6 Q net2 VDD VDD sg13_lv_pmos m=1 w=1.12u l=130.00n ng=1
+MP7 Dbbb clkpos net6 VDD sg13_lv_pmos m=1 w=420.00n l=130.00n ng=1
+MP0 Dbbb RESET_B VDD VDD sg13_lv_pmos m=1 w=420.00n l=130.00n ng=1
+MP1 Dbbb Dbb VDD VDD sg13_lv_pmos m=1 w=420.00n l=130.00n ng=1
+MP8 net7 net4 VDD VDD sg13_lv_pmos m=1 w=420.00n l=130.00n ng=1
+MP9 net6 clkneg net7 VDD sg13_lv_pmos m=1 w=420.00n l=130.00n ng=1
+MP10 net6 RESET_B VDD VDD sg13_lv_pmos m=1 w=420.00n l=130.00n ng=1
+MP2 clkneg CLK VDD VDD sg13_lv_pmos m=1 w=1.12u l=130.00n ng=1
+MP3 clkpos clkneg VDD VDD sg13_lv_pmos m=1 w=1.12u l=130.00n ng=1
+MP11 net4 net6 VDD VDD sg13_lv_pmos m=1 w=1.000u l=130.00n ng=1
+MP12 net4 clkneg net5 VDD sg13_lv_pmos m=1 w=1.000u l=130.00n ng=1
+MP23 Dbb Db VDD VDD sg13_lv_pmos m=1 w=1.12u l=130.00n ng=1
+MP13 net3 net2 VDD VDD sg13_lv_pmos m=1 w=420.00n l=130.00n ng=1
+.ENDS
+
+************************************************************************
+* Library Name: sg13g2_stdcell
+* Cell Name: sg13g2_sdfrbp_2
+* View Name: schematic
+************************************************************************
+
+.SUBCKT sg13g2_sdfrbp_2 Q Q_N CLK D RESET_B SCD SCE VDD VSS
+*.PININFO CLK:I D:I RESET_B:I SCD:I SCE:I Q:O Q_N:O VDD:B VSS:B
+MN22 Db SCD net63 VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
+MN21 Db D net65 VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
+MN19 SCEb SCE VSS VSS sg13_lv_nmos m=1 w=550.00n l=130.00n ng=1
+MN18 net63 SCE VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
+MN17 net65 SCEb VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
+MN23 Dbb Db VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
+MN13 net12 net2 VSS VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
+MN14 net5 clkneg net12 VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
+MN15 net2 net5 net11 VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
+MN16 net11 RESET_B VSS VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
+MN6 Q_N net5 VSS VSS sg13_lv_nmos m=1 w=1.48u l=130.00n ng=2
+MN0 Dbbb Dbb net10 VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
+MN1 net10 RESET_B VSS VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
+MN7 Dbbb clkneg net6 VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
+MN8 net6 clkpos net9 VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
+MN9 net9 net4 net8 VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
+MN10 net8 RESET_B VSS VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
+MN11 net4 net6 VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
+MN2 clkneg CLK VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
+MN12 net4 clkpos net5 VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
+MN3 clkpos clkneg VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
+MN4 Q net1 VSS VSS sg13_lv_nmos m=1 w=1.48u l=130.00n ng=2
+MN5 net1 net5 VSS VSS sg13_lv_nmos m=1 w=640.00n l=130.00n ng=1
+MP22 net64 SCE VDD VDD sg13_lv_pmos m=1 w=1.000u l=130.00n ng=1
+MP21 net62 SCEb VDD VDD sg13_lv_pmos m=1 w=1.000u l=130.00n ng=1
+MP20 SCEb SCE VDD VDD sg13_lv_pmos m=1 w=840.00n l=130.00n ng=1
+MP18 Db SCD net62 VDD sg13_lv_pmos m=1 w=1.000u l=130.00n ng=1
+MP17 Db D net64 VDD sg13_lv_pmos m=1 w=1.000u l=130.00n ng=1
+MP23 Dbb Db VDD VDD sg13_lv_pmos m=1 w=1.12u l=130.00n ng=1
+MP14 net5 clkpos net3 VDD sg13_lv_pmos m=1 w=420.00n l=130.00n ng=1
+MP15 net2 net5 VDD VDD sg13_lv_pmos m=1 w=420.00n l=130.00n ng=1
+MP16 net2 RESET_B VDD VDD sg13_lv_pmos m=1 w=420.00n l=130.00n ng=1
+MP6 Q_N net5 VDD VDD sg13_lv_pmos m=1 w=2.24u l=130.00n ng=2
+MP7 Dbbb clkpos net6 VDD sg13_lv_pmos m=1 w=420.00n l=130.00n ng=1
+MP0 Dbbb RESET_B VDD VDD sg13_lv_pmos m=1 w=420.00n l=130.00n ng=1
+MP1 Dbbb Dbb VDD VDD sg13_lv_pmos m=1 w=420.00n l=130.00n ng=1
+MP8 net7 net4 VDD VDD sg13_lv_pmos m=1 w=420.00n l=130.00n ng=1
+MP9 net6 clkneg net7 VDD sg13_lv_pmos m=1 w=420.00n l=130.00n ng=1
+MP10 net6 RESET_B VDD VDD sg13_lv_pmos m=1 w=420.00n l=130.00n ng=1
+MP2 clkneg CLK VDD VDD sg13_lv_pmos m=1 w=1.12u l=130.00n ng=1
+MP3 clkpos clkneg VDD VDD sg13_lv_pmos m=1 w=1.12u l=130.00n ng=1
+MP11 net4 net6 VDD VDD sg13_lv_pmos m=1 w=1.000u l=130.00n ng=1
+MP12 net4 clkneg net5 VDD sg13_lv_pmos m=1 w=1.000u l=130.00n ng=1
+MP4 Q net1 VDD VDD sg13_lv_pmos m=1 w=2.24u l=130.00n ng=2
+MP13 net3 net2 VDD VDD sg13_lv_pmos m=1 w=420.00n l=130.00n ng=1
+MP5 net1 net5 VDD VDD sg13_lv_pmos m=1 w=1.000u l=130.00n ng=1
+.ENDS
+
+************************************************************************
+* Library Name: sg13g2_stdcell
+* Cell Name: sg13g2_sdfrbp_1
+* View Name: schematic
+************************************************************************
+
+.SUBCKT sg13g2_sdfrbp_1 Q Q_N CLK D RESET_B SCD SCE VDD VSS
+*.PININFO CLK:I D:I RESET_B:I SCD:I SCE:I Q:O Q_N:O VDD:B VSS:B
+MN22 Db SCD net63 VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
+MN21 Db D net65 VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
+MN19 SCEb SCE VSS VSS sg13_lv_nmos m=1 w=550.00n l=130.00n ng=1
+MN18 net63 SCE VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
+MN17 net65 SCEb VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
+MN23 net13 Db VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
+MN13 net12 net2 VSS VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
+MN14 net5 clkneg net12 VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
+MN15 net2 net5 net11 VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
+MN16 net11 RESET_B VSS VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
+MN6 Q_N net5 VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
+MN0 Dbb net13 net10 VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
+MN1 net10 RESET_B VSS VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
+MN7 Dbb clkneg net6 VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
+MN8 net6 clkpos net9 VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
+MN9 net9 net4 net8 VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
+MN10 net8 RESET_B VSS VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
+MN11 net4 net6 VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
+MN2 clkneg CLK VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
+MN12 net4 clkpos net5 VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
+MN3 clkpos clkneg VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
+MN4 Q net1 VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
+MN5 net1 net5 VSS VSS sg13_lv_nmos m=1 w=640.00n l=130.00n ng=1
+MP22 net64 SCE VDD VDD sg13_lv_pmos m=1 w=1.000u l=130.00n ng=1
+MP21 net62 SCEb VDD VDD sg13_lv_pmos m=1 w=1.000u l=130.00n ng=1
+MP20 SCEb SCE VDD VDD sg13_lv_pmos m=1 w=840.00n l=130.00n ng=1
+MP18 Db SCD net62 VDD sg13_lv_pmos m=1 w=1.000u l=130.00n ng=1
+MP17 Db D net64 VDD sg13_lv_pmos m=1 w=1.000u l=130.00n ng=1
+MP23 net13 Db VDD VDD sg13_lv_pmos m=1 w=1.12u l=130.00n ng=1
+MP14 net5 clkpos net3 VDD sg13_lv_pmos m=1 w=420.00n l=130.00n ng=1
+MP15 net2 net5 VDD VDD sg13_lv_pmos m=1 w=420.00n l=130.00n ng=1
+MP16 net2 RESET_B VDD VDD sg13_lv_pmos m=1 w=420.00n l=130.00n ng=1
+MP6 Q_N net5 VDD VDD sg13_lv_pmos m=1 w=1.12u l=130.00n ng=1
+MP7 Dbb clkpos net6 VDD sg13_lv_pmos m=1 w=420.00n l=130.00n ng=1
+MP0 Dbb RESET_B VDD VDD sg13_lv_pmos m=1 w=420.00n l=130.00n ng=1
+MP1 Dbb net13 VDD VDD sg13_lv_pmos m=1 w=420.00n l=130.00n ng=1
+MP8 net7 net4 VDD VDD sg13_lv_pmos m=1 w=420.00n l=130.00n ng=1
+MP9 net6 clkneg net7 VDD sg13_lv_pmos m=1 w=420.00n l=130.00n ng=1
+MP10 net6 RESET_B VDD VDD sg13_lv_pmos m=1 w=420.00n l=130.00n ng=1
+MP2 clkneg CLK VDD VDD sg13_lv_pmos m=1 w=1.12u l=130.00n ng=1
+MP3 clkpos clkneg VDD VDD sg13_lv_pmos m=1 w=1.12u l=130.00n ng=1
+MP11 net4 net6 VDD VDD sg13_lv_pmos m=1 w=1.000u l=130.00n ng=1
+MP12 net4 clkneg net5 VDD sg13_lv_pmos m=1 w=1.000u l=130.00n ng=1
+MP4 Q net1 VDD VDD sg13_lv_pmos m=1 w=1.12u l=130.00n ng=1
+MP13 net3 net2 VDD VDD sg13_lv_pmos m=1 w=420.00n l=130.00n ng=1
+MP5 net1 net5 VDD VDD sg13_lv_pmos m=1 w=1.000u l=130.00n ng=1
+.ENDS
+
+************************************************************************
+* Library Name: sg13g2_stdcell
+* Cell Name: sg13g2_dfrbpq_2
+* View Name: schematic
+************************************************************************
+
+.SUBCKT sg13g2_dfrbpq_2 Q CLK D RESET_B VDD VSS
+*.PININFO CLK:I D:I RESET_B:I Q:O VDD:B VSS:B
+MN13 net12 net2 VSS VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
+MN14 net5 clkneg net12 VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
+MN15 net2 net5 net11 VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
+MN16 net11 RESET_B VSS VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
+MN0 Db D net10 VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
+MN1 net10 RESET_B VSS VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
+MN7 Db clkneg net6 VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
+MN8 net6 clkpos net9 VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
+MN9 net9 net4 net8 VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
+MN10 net8 RESET_B VSS VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
+MN11 net4 net6 VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
+MN2 clkneg CLK VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
+MN12 net4 clkpos net5 VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
+MN3 clkpos clkneg VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
+MN4 Q net1 VSS VSS sg13_lv_nmos m=1 w=1.48u l=130.00n ng=2
+MN5 net1 net5 VSS VSS sg13_lv_nmos m=1 w=640.00n l=130.00n ng=1
+MP14 net5 clkpos net3 VDD sg13_lv_pmos m=1 w=420.00n l=130.00n ng=1
+MP15 net2 net5 VDD VDD sg13_lv_pmos m=1 w=420.00n l=130.00n ng=1
+MP16 net2 RESET_B VDD VDD sg13_lv_pmos m=1 w=420.00n l=130.00n ng=1
+MP7 Db clkpos net6 VDD sg13_lv_pmos m=1 w=420.00n l=130.00n ng=1
+MP0 Db RESET_B VDD VDD sg13_lv_pmos m=1 w=420.00n l=130.00n ng=1
+MP1 Db D VDD VDD sg13_lv_pmos m=1 w=420.00n l=130.00n ng=1
+MP8 net7 net4 VDD VDD sg13_lv_pmos m=1 w=420.00n l=130.00n ng=1
+MP9 net6 clkneg net7 VDD sg13_lv_pmos m=1 w=420.00n l=130.00n ng=1
+MP10 net6 RESET_B VDD VDD sg13_lv_pmos m=1 w=420.00n l=130.00n ng=1
+MP2 clkneg CLK VDD VDD sg13_lv_pmos m=1 w=1.12u l=130.00n ng=1
+MP3 clkpos clkneg VDD VDD sg13_lv_pmos m=1 w=1.12u l=130.00n ng=1
+MP11 net4 net6 VDD VDD sg13_lv_pmos m=1 w=1.000u l=130.00n ng=1
+MP12 net4 clkneg net5 VDD sg13_lv_pmos m=1 w=1.000u l=130.00n ng=1
+MP4 Q net1 VDD VDD sg13_lv_pmos m=1 w=2.24u l=130.00n ng=2
+MP13 net3 net2 VDD VDD sg13_lv_pmos m=1 w=420.00n l=130.00n ng=1
+MP5 net1 net5 VDD VDD sg13_lv_pmos m=1 w=1.000u l=130.00n ng=1
+.ENDS
+
+************************************************************************
+* Library Name: sg13g2_stdcell
+* Cell Name: sg13g2_dfrbpq_1
+* View Name: schematic
+************************************************************************
+
+.SUBCKT sg13g2_dfrbpq_1 Q CLK D RESET_B VDD VSS
+*.PININFO CLK:I D:I RESET_B:I Q:O VDD:B VSS:B
+MN13 net12 net2 VSS VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
+MN14 net5 clkneg net12 VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
+MN15 net2 net5 net11 VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
+MN16 net11 RESET_B VSS VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
+MN0 Db D net10 VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
+MN1 net10 RESET_B VSS VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
+MN7 Db clkneg net6 VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
+MN8 net6 clkpos net9 VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
+MN9 net9 net4 net8 VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
+MN10 net8 RESET_B VSS VSS sg13_lv_nmos m=1 w=420.00n l=130.00n ng=1
+MN11 net4 net6 VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
+MN2 clkneg CLK VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
+MN12 net4 clkpos net5 VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
+MN3 clkpos clkneg VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
+MN4 Q net1 VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
+MN5 net1 net5 VSS VSS sg13_lv_nmos m=1 w=740.00n l=130.00n ng=1
+MP14 net5 clkpos net3 VDD sg13_lv_pmos m=1 w=420.00n l=130.00n ng=1
+MP15 net2 net5 VDD VDD sg13_lv_pmos m=1 w=420.00n l=130.00n ng=1
+MP16 net2 RESET_B VDD VDD sg13_lv_pmos m=1 w=420.00n l=130.00n ng=1
+MP7 Db clkpos net6 VDD sg13_lv_pmos m=1 w=420.00n l=130.00n ng=1
+MP0 Db RESET_B VDD VDD sg13_lv_pmos m=1 w=420.00n l=130.00n ng=1
+MP1 Db D VDD VDD sg13_lv_pmos m=1 w=420.00n l=130.00n ng=1
+MP8 net7 net4 VDD VDD sg13_lv_pmos m=1 w=420.00n l=130.00n ng=1
+MP9 net6 clkneg net7 VDD sg13_lv_pmos m=1 w=420.00n l=130.00n ng=1
+MP10 net6 RESET_B VDD VDD sg13_lv_pmos m=1 w=420.00n l=130.00n ng=1
+MP2 clkneg CLK VDD VDD sg13_lv_pmos m=1 w=1.12u l=130.00n ng=1
+MP3 clkpos clkneg VDD VDD sg13_lv_pmos m=1 w=1.12u l=130.00n ng=1
+MP11 net4 net6 VDD VDD sg13_lv_pmos m=1 w=1.000u l=130.00n ng=1
+MP12 net4 clkneg net5 VDD sg13_lv_pmos m=1 w=1.000u l=130.00n ng=1
+MP4 Q net1 VDD VDD sg13_lv_pmos m=1 w=1.12u l=130.00n ng=1
+MP13 net3 net2 VDD VDD sg13_lv_pmos m=1 w=420.00n l=130.00n ng=1
+MP5 net1 net5 VDD VDD sg13_lv_pmos m=1 w=1.12u l=130.00n ng=1
+.ENDS
+
+************************************************************************
+* Library Name: sg13g2_stdcell
+* Cell Name: sg13g2_fill_1
+* View Name: schematic
+************************************************************************
+
+.SUBCKT sg13g2_fill_1 VDD VSS
+*.PININFO VDD:B VSS:B
+.ENDS
+
+************************************************************************
+* Library Name: sg13g2_stdcell
+* Cell Name: sg13g2_fill_2
+* View Name: schematic
+************************************************************************
+
+.SUBCKT sg13g2_fill_2 VDD VSS
+*.PININFO VDD:B VSS:B
+.ENDS
+
+************************************************************************
+* Library Name: sg13g2_stdcell
+* Cell Name: sg13g2_fill_4
+* View Name: schematic
+************************************************************************
+
+.SUBCKT sg13g2_fill_4 VDD VSS
+*.PININFO VDD:B VSS:B
+.ENDS
+
+************************************************************************
+* Library Name: sg13g2_stdcell
+* Cell Name: sg13g2_fill_8
+* View Name: schematic
+************************************************************************
+
+.SUBCKT sg13g2_fill_8 VDD VSS
+*.PININFO VDD:B VSS:B
+.ENDS
diff --git a/flow/platforms/ihp-sg13g2/config.mk b/flow/platforms/ihp-sg13g2/config.mk
index fed43b3c28..01e39a610e 100644
--- a/flow/platforms/ihp-sg13g2/config.mk
+++ b/flow/platforms/ihp-sg13g2/config.mk
@@ -86,14 +86,14 @@ export MATCH_CELL_FOOTPRINT = 1
export PLACE_SITE = CoreSite
# IO Placer pin layers
-export IO_PLACER_H ?= Metal2
-export IO_PLACER_V ?= Metal3
+export IO_PLACER_V ?= Metal2
+export IO_PLACER_H ?= Metal3
# Define default PDN config
export PDN_TCL ?= $(PLATFORM_DIR)/pdn.tcl
# To allow the core rings to fit inside the core area
-export CORE_MARGIN ?= 16.5
+export CORE_MARGIN ?= 17.5
# There are no Endcap and Welltie cells in this PDK, so
# `cut_rows` has to be called from the tapcell script.
@@ -110,8 +110,8 @@ export PLACE_DENSITY ?= 0.65
# Route
# ---------------------------------------------------------
# FastRoute options
-export MIN_ROUTING_LAYER ?= Metal2
-export MAX_ROUTING_LAYER ?= Metal5
+export MIN_ROUTING_LAYER ?= Metal2
+export MAX_ROUTING_LAYER ?= Metal5
#export VIA_IN_PIN_MIN_LAYER ?= Metal1
#export VIA_IN_PIN_MAX_LAYER ?= Metal1
#export DISABLE_VIA_GEN ?= 1
diff --git a/flow/platforms/ihp-sg13g2/drc/sg13g2_maximal.lydrc b/flow/platforms/ihp-sg13g2/drc/sg13g2_maximal.lydrc
index 435f9147e6..fed5f2b415 100644
--- a/flow/platforms/ihp-sg13g2/drc/sg13g2_maximal.lydrc
+++ b/flow/platforms/ihp-sg13g2/drc/sg13g2_maximal.lydrc
@@ -1,6 +1,6 @@