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Fix rubocop and rspec issues
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Gemfile.lock

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2,14 +2,16 @@ PATH
22
remote: .
33
specs:
44
avruby (0.5.1)
5+
benchmark (~> 0.4.0)
56
intel_hex (~> 0.6.0)
6-
rdoc
7+
rdoc (~> 6.13.1)
78
sorbet-runtime (~> 0.5.3)
89

910
GEM
1011
remote: https://rubygems.org/
1112
specs:
1213
ast (2.4.3)
14+
benchmark (0.4.0)
1315
byebug (12.0.0)
1416
date (3.4.1)
1517
diff-lcs (1.6.1)

avruby.gemspec

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -17,8 +17,9 @@ Gem::Specification.new do |s|
1717
s.executables = ["avruby_shell"]
1818
s.require_path = "lib"
1919

20+
s.add_dependency("benchmark", "~> 0.4.0")
2021
s.add_dependency("intel_hex", "~> 0.6.0")
21-
s.add_dependency("rdoc")
22+
s.add_dependency("rdoc", "~> 6.13.1")
2223
s.add_dependency("sorbet-runtime", "~> 0.5.3")
2324
s.metadata["rubygems_mfa_required"] = "true"
2425
end

spec/avr/opcode/branch/brbc_spec.rb

Lines changed: 11 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -4,18 +4,18 @@
44

55
RSpec.describe(AVR::Opcode) do
66
describe "brbc" do
7-
it_behaves_like "opcode", :brbc
7+
it_behaves_like "opcode", :brbc do
8+
it "branches if the bit is set" do
9+
cpu.sreg.Z = true
10+
cpu.instruction(:brbc, AVR::Value.new(cpu.sreg.fetch_bit(:Z)), AVR::Value.new(+20)).execute
11+
expect(cpu.pc).to(eq(1))
12+
cpu.sreg.Z = false # we're not supposed to have changed Z
13+
end
814

9-
it "branches if the bit is set" do
10-
cpu.sreg.Z = true
11-
cpu.instruction(:brbc, AVR::Value.new(cpu.sreg.fetch_bit(:Z)), AVR::Value.new(+20)).execute
12-
expect(cpu.pc).to(eq(1))
13-
cpu.sreg.Z = false # we're not supposed to have changed Z
14-
end
15-
16-
it "does not branch if the bit is clear" do
17-
cpu.instruction(:brbc, AVR::Value.new(cpu.sreg.fetch_bit(:Z)), AVR::Value.new(+20)).execute
18-
expect(cpu.pc).to(eq(21))
15+
it "does not branch if the bit is clear" do
16+
cpu.instruction(:brbc, AVR::Value.new(cpu.sreg.fetch_bit(:Z)), AVR::Value.new(+20)).execute
17+
expect(cpu.pc).to(eq(21))
18+
end
1919
end
2020
end
2121
end

spec/avr/opcode/branch/brbs_spec.rb

Lines changed: 11 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -4,18 +4,18 @@
44

55
RSpec.describe(AVR::Opcode) do
66
describe "brbs" do
7-
it_behaves_like "opcode", :brbs
7+
it_behaves_like "opcode", :brbs do
8+
it "branches if the bit is set" do
9+
cpu.sreg.Z = true
10+
cpu.instruction(:brbs, AVR::Value.new(cpu.sreg.fetch_bit(:Z)), AVR::Value.new(+20)).execute
11+
expect(cpu.pc).to(eq(21))
12+
cpu.sreg.Z = false # we're not supposed to have changed Z
13+
end
814

9-
it "branches if the bit is set" do
10-
cpu.sreg.Z = true
11-
cpu.instruction(:brbs, AVR::Value.new(cpu.sreg.fetch_bit(:Z)), AVR::Value.new(+20)).execute
12-
expect(cpu.pc).to(eq(21))
13-
cpu.sreg.Z = false # we're not supposed to have changed Z
14-
end
15-
16-
it "does not branch if the bit is clear" do
17-
cpu.instruction(:brbs, AVR::Value.new(cpu.sreg.fetch_bit(:Z)), AVR::Value.new(+20)).execute
18-
expect(cpu.pc).to(eq(1))
15+
it "does not branch if the bit is clear" do
16+
cpu.instruction(:brbs, AVR::Value.new(cpu.sreg.fetch_bit(:Z)), AVR::Value.new(+20)).execute
17+
expect(cpu.pc).to(eq(1))
18+
end
1919
end
2020
end
2121
end

spec/avr/opcode/branch/call_spec.rb

Lines changed: 13 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -4,20 +4,20 @@
44

55
RSpec.describe(AVR::Opcode) do
66
describe "call" do
7-
it_behaves_like "opcode", :call
7+
it_behaves_like "opcode", :call do
8+
it "pushes the current PC onto the stack" do
9+
previous_sp = cpu.sp.value
10+
cpu.pc = 0x1122
11+
cpu.instruction(:call, AVR::Value.new(0x1234)).execute
12+
expect(cpu.sp.value).to(eq(previous_sp - 2))
13+
expect(cpu.sram.memory[cpu.sp.value + 1].value).to(eq(0x22 + 2))
14+
expect(cpu.sram.memory[cpu.sp.value + 2].value).to(eq(0x11))
15+
end
816

9-
it "pushes the current PC onto the stack" do
10-
previous_sp = cpu.sp.value
11-
cpu.pc = 0x1122
12-
cpu.instruction(:call, AVR::Value.new(0x1234)).execute
13-
expect(cpu.sp.value).to(eq(previous_sp - 2))
14-
expect(cpu.sram.memory[cpu.sp.value + 1].value).to(eq(0x22 + 2))
15-
expect(cpu.sram.memory[cpu.sp.value + 2].value).to(eq(0x11))
16-
end
17-
18-
it "sets PC to the specified constant" do
19-
cpu.instruction(:call, AVR::Value.new(0x1234)).execute
20-
expect(cpu.pc).to(eq(0x1234))
17+
it "sets PC to the specified constant" do
18+
cpu.instruction(:call, AVR::Value.new(0x1234)).execute
19+
expect(cpu.pc).to(eq(0x1234))
20+
end
2121
end
2222
end
2323
end

spec/avr/opcode/branch/cpse_spec.rb

Lines changed: 27 additions & 27 deletions
Original file line numberDiff line numberDiff line change
@@ -4,35 +4,35 @@
44

55
RSpec.describe(AVR::Opcode) do
66
describe "cpse" do
7-
it_behaves_like "opcode", :cpse
7+
it_behaves_like "opcode", :cpse do
8+
it "compares r0 == r1, with 1-word instruction" do
9+
cpu.r0 = 5
10+
cpu.r1 = 5
11+
cpu.device.flash.set_word(0, 0b0001_0000_0000_0001) # cpse r0, r1
12+
cpu.device.flash.set_word(1, 0b0000_0000_0000_0000) # nop
13+
cpu.step
14+
expect(cpu.next_pc).to(eq(2))
15+
end
816

9-
it "compares r0 == r1, with 1-word instruction" do
10-
cpu.r0 = 5
11-
cpu.r1 = 5
12-
cpu.device.flash.set_word(0, 0b0001_0000_0000_0001) # cpse r0, r1
13-
cpu.device.flash.set_word(1, 0b0000_0000_0000_0000) # nop
14-
cpu.step
15-
expect(cpu.next_pc).to(eq(2))
16-
end
17-
18-
it "compares r0 == r1, with 2-word instruction" do
19-
cpu.r0 = 5
20-
cpu.r1 = 5
21-
cpu.device.flash.set_word(0, 0b0001_0000_0000_0001) # cpse r0, r1
22-
cpu.device.flash.set_word(1, 0b1001_0100_0000_1100) # jmp ...
23-
cpu.device.flash.set_word(2, 0b1010_1010_1010_1010) # ... 0xaaaa
24-
cpu.device.flash.set_word(3, 0b0000_0000_0000_0000) # nop
25-
cpu.step
26-
expect(cpu.next_pc).to(eq(3))
27-
end
17+
it "compares r0 == r1, with 2-word instruction" do
18+
cpu.r0 = 5
19+
cpu.r1 = 5
20+
cpu.device.flash.set_word(0, 0b0001_0000_0000_0001) # cpse r0, r1
21+
cpu.device.flash.set_word(1, 0b1001_0100_0000_1100) # jmp ...
22+
cpu.device.flash.set_word(2, 0b1010_1010_1010_1010) # ... 0xaaaa
23+
cpu.device.flash.set_word(3, 0b0000_0000_0000_0000) # nop
24+
cpu.step
25+
expect(cpu.next_pc).to(eq(3))
26+
end
2827

29-
it "compares r0 != r1" do
30-
cpu.r0 = 3
31-
cpu.r1 = 5
32-
cpu.device.flash.set_word(0, 0b0001_0000_0000_0001) # cpse r0, r1
33-
cpu.device.flash.set_word(1, 0b0000_0000_0000_0000) # nop
34-
cpu.step
35-
expect(cpu.next_pc).to(eq(1))
28+
it "compares r0 != r1" do
29+
cpu.r0 = 3
30+
cpu.r1 = 5
31+
cpu.device.flash.set_word(0, 0b0001_0000_0000_0001) # cpse r0, r1
32+
cpu.device.flash.set_word(1, 0b0000_0000_0000_0000) # nop
33+
cpu.step
34+
expect(cpu.next_pc).to(eq(1))
35+
end
3636
end
3737
end
3838
end

spec/avr/opcode/branch/eicall_spec.rb

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -4,12 +4,12 @@
44

55
RSpec.describe(AVR::Opcode) do
66
describe "eicall" do
7-
it_behaves_like "opcode", :eicall
8-
9-
it "is not implemented" do
10-
expect do
11-
cpu.instruction(:eicall).execute
12-
end.to(raise_error(AVR::Opcode::OpcodeNotImplementedError))
7+
it_behaves_like "opcode", :eicall do
8+
it "is not implemented" do
9+
expect do
10+
cpu.instruction(:eicall).execute
11+
end.to(raise_error(AVR::Opcode::OpcodeNotImplementedError))
12+
end
1313
end
1414
end
1515
end

spec/avr/opcode/branch/eijmp_spec.rb

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -4,12 +4,12 @@
44

55
RSpec.describe(AVR::Opcode) do
66
describe "eijmp" do
7-
it_behaves_like "opcode", :eijmp
8-
9-
it "is not implemented" do
10-
expect do
11-
cpu.instruction(:eijmp).execute
12-
end.to(raise_error(AVR::Opcode::OpcodeNotImplementedError))
7+
it_behaves_like "opcode", :eijmp do
8+
it "is not implemented" do
9+
expect do
10+
cpu.instruction(:eijmp).execute
11+
end.to(raise_error(AVR::Opcode::OpcodeNotImplementedError))
12+
end
1313
end
1414
end
1515
end

spec/avr/opcode/branch/icall_spec.rb

Lines changed: 15 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -4,22 +4,22 @@
44

55
RSpec.describe(AVR::Opcode) do
66
describe "icall" do
7-
it_behaves_like "opcode", :icall
7+
it_behaves_like "opcode", :icall do
8+
it "pushes the current PC onto the stack" do
9+
previous_sp = cpu.sp.value
10+
cpu.pc = 0x1122
11+
cpu.Z = 0x1234
12+
cpu.instruction(:icall).execute
13+
expect(cpu.sp.value).to(eq(previous_sp - 2))
14+
expect(cpu.sram.memory[cpu.sp.value + 1].value).to(eq(0x22 + 1))
15+
expect(cpu.sram.memory[cpu.sp.value + 2].value).to(eq(0x11))
16+
end
817

9-
it "pushes the current PC onto the stack" do
10-
previous_sp = cpu.sp.value
11-
cpu.pc = 0x1122
12-
cpu.Z = 0x1234
13-
cpu.instruction(:icall).execute
14-
expect(cpu.sp.value).to(eq(previous_sp - 2))
15-
expect(cpu.sram.memory[cpu.sp.value + 1].value).to(eq(0x22 + 1))
16-
expect(cpu.sram.memory[cpu.sp.value + 2].value).to(eq(0x11))
17-
end
18-
19-
it "sets PC to the specified constant" do
20-
cpu.Z = 0x1234
21-
cpu.instruction(:icall).execute
22-
expect(cpu.pc).to(eq(0x1234))
18+
it "sets PC to the specified constant" do
19+
cpu.Z = 0x1234
20+
cpu.instruction(:icall).execute
21+
expect(cpu.pc).to(eq(0x1234))
22+
end
2323
end
2424
end
2525
end

spec/avr/opcode/branch/ijmp_spec.rb

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -4,12 +4,12 @@
44

55
RSpec.describe(AVR::Opcode) do
66
describe "ijmp" do
7-
it_behaves_like "opcode", :ijmp
8-
9-
it "sets PC to the specified constant" do
10-
cpu.Z = 0x0500
11-
cpu.instruction(:ijmp).execute
12-
expect(cpu.pc).to(eq(0x0500))
7+
it_behaves_like "opcode", :ijmp do
8+
it "sets PC to the specified constant" do
9+
cpu.Z = 0x0500
10+
cpu.instruction(:ijmp).execute
11+
expect(cpu.pc).to(eq(0x0500))
12+
end
1313
end
1414
end
1515
end

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