@@ -522,9 +522,6 @@ MipsTargetLowering::MipsTargetLowering(const MipsTargetMachine &TM,
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setOperationAction (ISD::TRAP, MVT::Other, Legal);
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- setOperationAction (ISD::ConstantFP, MVT::f32 , Custom);
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- setOperationAction (ISD::ConstantFP, MVT::f64 , Custom);
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-
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setTargetDAGCombine ({ISD::SDIVREM, ISD::UDIVREM, ISD::SELECT, ISD::AND,
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ISD::OR, ISD::ADD, ISD::SUB, ISD::AssertZext, ISD::SHL,
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ISD::SIGN_EXTEND});
@@ -1360,8 +1357,6 @@ LowerOperation(SDValue Op, SelectionDAG &DAG) const
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case ISD::FP_TO_SINT: return lowerFP_TO_SINT (Op, DAG);
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case ISD::READCYCLECOUNTER:
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return lowerREADCYCLECOUNTER (Op, DAG);
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- case ISD::ConstantFP:
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- return lowerConstantFP (Op, DAG);
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}
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return SDValue ();
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}
@@ -3019,30 +3014,6 @@ SDValue MipsTargetLowering::lowerFP_TO_SINT(SDValue Op,
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return DAG.getNode (ISD::BITCAST, SDLoc (Op), Op.getValueType (), Trunc);
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}
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- SDValue MipsTargetLowering::lowerConstantFP (SDValue Op,
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- SelectionDAG &DAG) const {
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- SDLoc DL (Op);
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- EVT VT = Op.getSimpleValueType ();
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- SDNode *N = Op.getNode ();
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- ConstantFPSDNode *CFP = cast<ConstantFPSDNode>(N);
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-
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- if (!CFP->isNaN () || Subtarget.isNaN2008 ()) {
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- return SDValue ();
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- }
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-
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- APFloat NaNValue = CFP->getValueAPF ();
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- auto &Sem = NaNValue.getSemantics ();
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-
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- // The MSB of the mantissa should be zero for QNaNs in the MIPS legacy NaN
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- // encodings, and one for sNaNs. Check every NaN constants and make sure
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- // they are correctly encoded for legacy encodings.
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- if (!NaNValue.isSignaling ()) {
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- APFloat RealQNaN = NaNValue.getSNaN (Sem);
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- return DAG.getConstantFP (RealQNaN, DL, VT);
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- }
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- return SDValue ();
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- }
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-
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// ===----------------------------------------------------------------------===//
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// Calling Convention Implementation
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// ===----------------------------------------------------------------------===//
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