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1 parent f2f0a3c commit 5fd5f03Copy full SHA for 5fd5f03
include/capstone/arm.h
@@ -303,7 +303,7 @@ typedef enum {
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ARM_FIELD_CPSR_X = 32,
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ARM_FIELD_CPSR_S = 64,
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ARM_FIELD_CPSR_F = 128,
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-} arm_spsr_cspr_bits;
+} arm_spsr_cpsr_bits;
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// From LLVM docs:
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// The values here come from B9.2.3 of the ARM ARM, where bits 4-0 are SysM field
@@ -855,7 +855,7 @@ typedef struct arm_op_mem {
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typedef struct {
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arm_sysop_reg reg; ///< The system or banked register.
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- arm_spsr_cspr_bits psr_bits; ///< SPSR/CPSR bits.
+ arm_spsr_cpsr_bits psr_bits; ///< SPSR/CPSR bits.
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uint16_t sysm; ///< Raw SYSm field. UINT16_MAX if unset.
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uint8_t msr_mask; ///< Mask of MSR instructions. UINT8_MAX if invalid.
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} arm_sysop;
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