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CPU OPS
jimtahu edited this page May 28, 2012
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This is how the CPU interprets the binary files used as programs. Please understand that there will be rapid fluctuation as we hammer out both ship capabilities and the instruction set.
The first three bytes of the program will be 'SPU', as the file type's magic bytes. The remaining bytes will be instructions.
Each instruction consist of four bytes, for R type these are
- opcode as described below
- dst the destination register
- src the source register
- oth the other register
- Move ASCII 'm' or 0x6D copies the value of register src to register dst
- Move Immediate ASCII 'M' or 0x4D moves the byte in src to register dst
- Add ASCII 'a' or 0x61 adds the values of registers dst and src and stores the result in dst