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jmciverjmciver
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[clang][test] Auto update test
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‎clang/test/C/C2x/n2683_2.c‎

Lines changed: 8 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -8,12 +8,12 @@
88
// CHECK-SAME: ) #[[ATTR0:[0-9]+]] {
99
// CHECK-NEXT: entry:
1010
// CHECK-NEXT: [[RESULT64:%.*]] = alloca i64, align 8
11+
// CHECK-NEXT: [[FLAG_ADD:%.*]] = alloca i8, align 1
1112
// CHECK-NEXT: [[FREEZE_POISON:%.*]] = freeze i64 poison
1213
// CHECK-NEXT: store i64 [[FREEZE_POISON]], ptr [[RESULT64]], align 8
13-
// CHECK-NEXT: [[FLAG_ADD:%.*]] = alloca i8, align 1
14+
// CHECK-NEXT: store i64 0, ptr [[RESULT64]], align 8
1415
// CHECK-NEXT: [[FREEZE_POISON1:%.*]] = freeze i8 poison
1516
// CHECK-NEXT: store i8 [[FREEZE_POISON1]], ptr [[FLAG_ADD]], align 1
16-
// CHECK-NEXT: store i64 0, ptr [[RESULT64]], align 8
1717
// CHECK-NEXT: [[TMP0:%.*]] = call { i64, i1 } @llvm.sadd.with.overflow.i64(i64 2147483647, i64 1)
1818
// CHECK-NEXT: [[TMP1:%.*]] = extractvalue { i64, i1 } [[TMP0]], 1
1919
// CHECK-NEXT: [[TMP2:%.*]] = extractvalue { i64, i1 } [[TMP0]], 0
@@ -31,12 +31,12 @@ void test_add_overflow_to64() {
3131
// CHECK-SAME: ) #[[ATTR0]] {
3232
// CHECK-NEXT: entry:
3333
// CHECK-NEXT: [[RESULT32:%.*]] = alloca i32, align 4
34+
// CHECK-NEXT: [[FLAG_SUB:%.*]] = alloca i8, align 1
3435
// CHECK-NEXT: [[FREEZE_POISON:%.*]] = freeze i32 poison
3536
// CHECK-NEXT: store i32 [[FREEZE_POISON]], ptr [[RESULT32]], align 4
36-
// CHECK-NEXT: [[FLAG_SUB:%.*]] = alloca i8, align 1
37+
// CHECK-NEXT: store i32 0, ptr [[RESULT32]], align 4
3738
// CHECK-NEXT: [[FREEZE_POISON1:%.*]] = freeze i8 poison
3839
// CHECK-NEXT: store i8 [[FREEZE_POISON1]], ptr [[FLAG_SUB]], align 1
39-
// CHECK-NEXT: store i32 0, ptr [[RESULT32]], align 4
4040
// CHECK-NEXT: [[TMP0:%.*]] = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 2147483647, i32 -1)
4141
// CHECK-NEXT: [[TMP1:%.*]] = extractvalue { i32, i1 } [[TMP0]], 1
4242
// CHECK-NEXT: [[TMP2:%.*]] = extractvalue { i32, i1 } [[TMP0]], 0
@@ -54,16 +54,16 @@ void test_sub_overflow() {
5454
// CHECK-SAME: ) #[[ATTR0]] {
5555
// CHECK-NEXT: entry:
5656
// CHECK-NEXT: [[A:%.*]] = alloca i32, align 4
57+
// CHECK-NEXT: [[RESULT:%.*]] = alloca i32, align 4
58+
// CHECK-NEXT: [[FLAG_MUL:%.*]] = alloca i8, align 1
5759
// CHECK-NEXT: [[FREEZE_POISON:%.*]] = freeze i32 poison
5860
// CHECK-NEXT: store i32 [[FREEZE_POISON]], ptr [[A]], align 4
59-
// CHECK-NEXT: [[RESULT:%.*]] = alloca i32, align 4
61+
// CHECK-NEXT: store i32 3, ptr [[A]], align 4
6062
// CHECK-NEXT: [[FREEZE_POISON1:%.*]] = freeze i32 poison
6163
// CHECK-NEXT: store i32 [[FREEZE_POISON1]], ptr [[RESULT]], align 4
62-
// CHECK-NEXT: [[FLAG_MUL:%.*]] = alloca i8, align 1
64+
// CHECK-NEXT: store i32 0, ptr [[RESULT]], align 4
6365
// CHECK-NEXT: [[FREEZE_POISON2:%.*]] = freeze i8 poison
6466
// CHECK-NEXT: store i8 [[FREEZE_POISON2]], ptr [[FLAG_MUL]], align 1
65-
// CHECK-NEXT: store i32 3, ptr [[A]], align 4
66-
// CHECK-NEXT: store i32 0, ptr [[RESULT]], align 4
6767
// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[A]], align 4
6868
// CHECK-NEXT: [[TMP1:%.*]] = call { i32, i1 } @llvm.smul.with.overflow.i32(i32 [[TMP0]], i32 2)
6969
// CHECK-NEXT: [[TMP2:%.*]] = extractvalue { i32, i1 } [[TMP1]], 1

‎clang/test/CodeGen/2005-01-02-ConstantInits.c‎

Lines changed: 3 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -7,17 +7,10 @@
77
struct X { int a[2]; };
88
extern int bar();
99

10-
//.
11-
// CHECK: @test.i23 = internal global i32 4, align 4
12-
// CHECK: @i = global i32 4, align 4
13-
// CHECK: @Arr = global [100 x i32] zeroinitializer, align 16
14-
// CHECK: @foo2.X = internal global ptr getelementptr (i8, ptr @Arr, i64 196), align 8
15-
// CHECK: @foo2.i23 = internal global i32 0, align 4
16-
//.
1710
// CHECK-LABEL: define {{[^@]+}}@test
1811
// CHECK-SAME: () #[[ATTR0:[0-9]+]] {
1912
// CHECK-NEXT: entry:
20-
// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @test.i23, align 4
13+
// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @test.i23, align 4, !freeze_bits [[META2:![0-9]+]]
2114
// CHECK-NEXT: ret i32 [[TMP0]]
2215
//
2316
int test(void) {
@@ -49,6 +42,8 @@ int foo(int i) { return bar(&Arr[49])+bar(&Arr[i]); }
4942
// CHECK-NEXT: [[I_ADDR:%.*]] = alloca i32, align 4
5043
// CHECK-NEXT: [[P:%.*]] = alloca ptr, align 8
5144
// CHECK-NEXT: store i32 [[I]], ptr [[I_ADDR]], align 4
45+
// CHECK-NEXT: [[FREEZE_POISON:%.*]] = freeze ptr poison
46+
// CHECK-NEXT: store ptr [[FREEZE_POISON]], ptr [[P]], align 8
5247
// CHECK-NEXT: store ptr @Arr, ptr [[P]], align 8
5348
// CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[P]], align 8
5449
// CHECK-NEXT: [[INCDEC_PTR:%.*]] = getelementptr inbounds i32, ptr [[TMP0]], i32 1

‎clang/test/CodeGen/PowerPC/builtins-ppc-pair-mma-types.c‎

Lines changed: 114 additions & 106 deletions
Large diffs are not rendered by default.

‎clang/test/CodeGen/PowerPC/ppc-mma-types.c‎

Lines changed: 82 additions & 42 deletions
Large diffs are not rendered by default.

‎clang/test/CodeGen/RISCV/riscv32-vararg.c‎

Lines changed: 249 additions & 205 deletions
Large diffs are not rendered by default.

‎clang/test/CodeGen/RISCV/riscv64-vararg.c‎

Lines changed: 56 additions & 42 deletions
Original file line numberDiff line numberDiff line change
@@ -134,11 +134,13 @@ void f_va_caller(void) {
134134
// CHECK-NEXT: [[FMT_ADDR:%.*]] = alloca ptr, align 8
135135
// CHECK-NEXT: [[VA:%.*]] = alloca ptr, align 8
136136
// CHECK-NEXT: [[V:%.*]] = alloca i32, align 4
137-
// CHECK-NEXT: [[FREEZE_POISON:%.*]] = freeze i32 poison
138-
// CHECK-NEXT: store i32 [[FREEZE_POISON]], ptr [[V]], align 4
139137
// CHECK-NEXT: store ptr [[FMT]], ptr [[FMT_ADDR]], align 8
138+
// CHECK-NEXT: [[FREEZE_POISON:%.*]] = freeze ptr poison
139+
// CHECK-NEXT: store ptr [[FREEZE_POISON]], ptr [[VA]], align 8
140140
// CHECK-NEXT: call void @llvm.va_start.p0(ptr [[VA]])
141-
// CHECK-NEXT: [[ARGP_CUR:%.*]] = load ptr, ptr [[VA]], align 8, !freeze_bits [[META6]]
141+
// CHECK-NEXT: [[FREEZE_POISON1:%.*]] = freeze i32 poison
142+
// CHECK-NEXT: store i32 [[FREEZE_POISON1]], ptr [[V]], align 4
143+
// CHECK-NEXT: [[ARGP_CUR:%.*]] = load ptr, ptr [[VA]], align 8
142144
// CHECK-NEXT: [[ARGP_NEXT:%.*]] = getelementptr inbounds i8, ptr [[ARGP_CUR]], i64 8
143145
// CHECK-NEXT: store ptr [[ARGP_NEXT]], ptr [[VA]], align 8
144146
// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARGP_CUR]], align 8, !freeze_bits [[META6]]
@@ -168,16 +170,20 @@ int f_va_1(char *fmt, ...) {
168170
// CHECK-NEXT: [[VA:%.*]] = alloca ptr, align 8
169171
// CHECK-NEXT: [[V:%.*]] = alloca fp128, align 16
170172
// CHECK-NEXT: store ptr [[FMT]], ptr [[FMT_ADDR]], align 8
173+
// CHECK-NEXT: [[FREEZE_POISON:%.*]] = freeze ptr poison
174+
// CHECK-NEXT: store ptr [[FREEZE_POISON]], ptr [[VA]], align 8
171175
// CHECK-NEXT: call void @llvm.va_start.p0(ptr [[VA]])
172-
// CHECK-NEXT: [[ARGP_CUR:%.*]] = load ptr, ptr [[VA]], align 8, !freeze_bits [[META6]]
176+
// CHECK-NEXT: [[FREEZE_POISON1:%.*]] = freeze fp128 poison
177+
// CHECK-NEXT: store fp128 [[FREEZE_POISON1]], ptr [[V]], align 16
178+
// CHECK-NEXT: [[ARGP_CUR:%.*]] = load ptr, ptr [[VA]], align 8
173179
// CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds i8, ptr [[ARGP_CUR]], i32 15
174180
// CHECK-NEXT: [[ARGP_CUR_ALIGNED:%.*]] = call ptr @llvm.ptrmask.p0.i64(ptr [[TMP0]], i64 -16)
175181
// CHECK-NEXT: [[ARGP_NEXT:%.*]] = getelementptr inbounds i8, ptr [[ARGP_CUR_ALIGNED]], i64 16
176182
// CHECK-NEXT: store ptr [[ARGP_NEXT]], ptr [[VA]], align 8
177183
// CHECK-NEXT: [[TMP1:%.*]] = load fp128, ptr [[ARGP_CUR_ALIGNED]], align 16, !freeze_bits [[META6]]
178184
// CHECK-NEXT: store fp128 [[TMP1]], ptr [[V]], align 16
179185
// CHECK-NEXT: call void @llvm.va_end.p0(ptr [[VA]])
180-
// CHECK-NEXT: [[TMP2:%.*]] = load fp128, ptr [[V]], align 16, !freeze_bits [[META6]]
186+
// CHECK-NEXT: [[TMP2:%.*]] = load fp128, ptr [[V]], align 16
181187
// CHECK-NEXT: ret fp128 [[TMP2]]
182188
//
183189
long double f_va_2(char *fmt, ...) {
@@ -199,33 +205,39 @@ long double f_va_2(char *fmt, ...) {
199205
// CHECK-NEXT: [[VA:%.*]] = alloca ptr, align 8
200206
// CHECK-NEXT: [[V:%.*]] = alloca fp128, align 16
201207
// CHECK-NEXT: [[W:%.*]] = alloca i32, align 4
202-
// CHECK-NEXT: [[FREEZE_POISON:%.*]] = freeze i32 poison
203-
// CHECK-NEXT: store i32 [[FREEZE_POISON]], ptr [[W]], align 4
204208
// CHECK-NEXT: [[X:%.*]] = alloca fp128, align 16
205209
// CHECK-NEXT: store ptr [[FMT]], ptr [[FMT_ADDR]], align 8
210+
// CHECK-NEXT: [[FREEZE_POISON:%.*]] = freeze ptr poison
211+
// CHECK-NEXT: store ptr [[FREEZE_POISON]], ptr [[VA]], align 8
206212
// CHECK-NEXT: call void @llvm.va_start.p0(ptr [[VA]])
207-
// CHECK-NEXT: [[ARGP_CUR:%.*]] = load ptr, ptr [[VA]], align 8, !freeze_bits [[META6]]
213+
// CHECK-NEXT: [[FREEZE_POISON1:%.*]] = freeze fp128 poison
214+
// CHECK-NEXT: store fp128 [[FREEZE_POISON1]], ptr [[V]], align 16
215+
// CHECK-NEXT: [[ARGP_CUR:%.*]] = load ptr, ptr [[VA]], align 8
208216
// CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds i8, ptr [[ARGP_CUR]], i32 15
209217
// CHECK-NEXT: [[ARGP_CUR_ALIGNED:%.*]] = call ptr @llvm.ptrmask.p0.i64(ptr [[TMP0]], i64 -16)
210218
// CHECK-NEXT: [[ARGP_NEXT:%.*]] = getelementptr inbounds i8, ptr [[ARGP_CUR_ALIGNED]], i64 16
211219
// CHECK-NEXT: store ptr [[ARGP_NEXT]], ptr [[VA]], align 8
212220
// CHECK-NEXT: [[TMP1:%.*]] = load fp128, ptr [[ARGP_CUR_ALIGNED]], align 16, !freeze_bits [[META6]]
213221
// CHECK-NEXT: store fp128 [[TMP1]], ptr [[V]], align 16
214-
// CHECK-NEXT: [[ARGP_CUR1:%.*]] = load ptr, ptr [[VA]], align 8, !freeze_bits [[META6]]
215-
// CHECK-NEXT: [[ARGP_NEXT2:%.*]] = getelementptr inbounds i8, ptr [[ARGP_CUR1]], i64 8
216-
// CHECK-NEXT: store ptr [[ARGP_NEXT2]], ptr [[VA]], align 8
217-
// CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[ARGP_CUR1]], align 8, !freeze_bits [[META6]]
218-
// CHECK-NEXT: store i32 [[TMP2]], ptr [[W]], align 4
219-
// CHECK-NEXT: [[ARGP_CUR3:%.*]] = load ptr, ptr [[VA]], align 8, !freeze_bits [[META6]]
220-
// CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds i8, ptr [[ARGP_CUR3]], i32 15
221-
// CHECK-NEXT: [[ARGP_CUR3_ALIGNED:%.*]] = call ptr @llvm.ptrmask.p0.i64(ptr [[TMP3]], i64 -16)
222-
// CHECK-NEXT: [[ARGP_NEXT4:%.*]] = getelementptr inbounds i8, ptr [[ARGP_CUR3_ALIGNED]], i64 16
222+
// CHECK-NEXT: [[FREEZE_POISON2:%.*]] = freeze i32 poison
223+
// CHECK-NEXT: store i32 [[FREEZE_POISON2]], ptr [[W]], align 4
224+
// CHECK-NEXT: [[ARGP_CUR3:%.*]] = load ptr, ptr [[VA]], align 8
225+
// CHECK-NEXT: [[ARGP_NEXT4:%.*]] = getelementptr inbounds i8, ptr [[ARGP_CUR3]], i64 8
223226
// CHECK-NEXT: store ptr [[ARGP_NEXT4]], ptr [[VA]], align 8
224-
// CHECK-NEXT: [[TMP4:%.*]] = load fp128, ptr [[ARGP_CUR3_ALIGNED]], align 16, !freeze_bits [[META6]]
227+
// CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[ARGP_CUR3]], align 8, !freeze_bits [[META6]]
228+
// CHECK-NEXT: store i32 [[TMP2]], ptr [[W]], align 4
229+
// CHECK-NEXT: [[FREEZE_POISON5:%.*]] = freeze fp128 poison
230+
// CHECK-NEXT: store fp128 [[FREEZE_POISON5]], ptr [[X]], align 16
231+
// CHECK-NEXT: [[ARGP_CUR6:%.*]] = load ptr, ptr [[VA]], align 8
232+
// CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds i8, ptr [[ARGP_CUR6]], i32 15
233+
// CHECK-NEXT: [[ARGP_CUR6_ALIGNED:%.*]] = call ptr @llvm.ptrmask.p0.i64(ptr [[TMP3]], i64 -16)
234+
// CHECK-NEXT: [[ARGP_NEXT7:%.*]] = getelementptr inbounds i8, ptr [[ARGP_CUR6_ALIGNED]], i64 16
235+
// CHECK-NEXT: store ptr [[ARGP_NEXT7]], ptr [[VA]], align 8
236+
// CHECK-NEXT: [[TMP4:%.*]] = load fp128, ptr [[ARGP_CUR6_ALIGNED]], align 16, !freeze_bits [[META6]]
225237
// CHECK-NEXT: store fp128 [[TMP4]], ptr [[X]], align 16
226238
// CHECK-NEXT: call void @llvm.va_end.p0(ptr [[VA]])
227-
// CHECK-NEXT: [[TMP5:%.*]] = load fp128, ptr [[V]], align 16, !freeze_bits [[META6]]
228-
// CHECK-NEXT: [[TMP6:%.*]] = load fp128, ptr [[X]], align 16, !freeze_bits [[META6]]
239+
// CHECK-NEXT: [[TMP5:%.*]] = load fp128, ptr [[V]], align 16
240+
// CHECK-NEXT: [[TMP6:%.*]] = load fp128, ptr [[X]], align 16
229241
// CHECK-NEXT: [[ADD:%.*]] = fadd fp128 [[TMP5]], [[TMP6]]
230242
// CHECK-NEXT: ret fp128 [[ADD]]
231243
//
@@ -247,46 +259,48 @@ long double f_va_3(char *fmt, ...) {
247259
// CHECK-NEXT: [[FMT_ADDR:%.*]] = alloca ptr, align 8
248260
// CHECK-NEXT: [[VA:%.*]] = alloca ptr, align 8
249261
// CHECK-NEXT: [[V:%.*]] = alloca i32, align 4
250-
// CHECK-NEXT: [[FREEZE_POISON:%.*]] = freeze i32 poison
251-
// CHECK-NEXT: store i32 [[FREEZE_POISON]], ptr [[V]], align 4
252262
// CHECK-NEXT: [[TS:%.*]] = alloca [[STRUCT_TINY:%.*]], align 2
253263
// CHECK-NEXT: [[SS:%.*]] = alloca [[STRUCT_SMALL:%.*]], align 8
254264
// CHECK-NEXT: [[LS:%.*]] = alloca [[STRUCT_LARGE:%.*]], align 8
255265
// CHECK-NEXT: [[RET:%.*]] = alloca i32, align 4
256-
// CHECK-NEXT: [[FREEZE_POISON7:%.*]] = freeze i32 poison
257-
// CHECK-NEXT: store i32 [[FREEZE_POISON7]], ptr [[RET]], align 4
258266
// CHECK-NEXT: store ptr [[FMT]], ptr [[FMT_ADDR]], align 8
267+
// CHECK-NEXT: [[FREEZE_POISON:%.*]] = freeze ptr poison
268+
// CHECK-NEXT: store ptr [[FREEZE_POISON]], ptr [[VA]], align 8
259269
// CHECK-NEXT: call void @llvm.va_start.p0(ptr [[VA]])
260-
// CHECK-NEXT: [[ARGP_CUR:%.*]] = load ptr, ptr [[VA]], align 8, !freeze_bits [[META6]]
270+
// CHECK-NEXT: [[FREEZE_POISON1:%.*]] = freeze i32 poison
271+
// CHECK-NEXT: store i32 [[FREEZE_POISON1]], ptr [[V]], align 4
272+
// CHECK-NEXT: [[ARGP_CUR:%.*]] = load ptr, ptr [[VA]], align 8
261273
// CHECK-NEXT: [[ARGP_NEXT:%.*]] = getelementptr inbounds i8, ptr [[ARGP_CUR]], i64 8
262274
// CHECK-NEXT: store ptr [[ARGP_NEXT]], ptr [[VA]], align 8
263275
// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARGP_CUR]], align 8, !freeze_bits [[META6]]
264276
// CHECK-NEXT: store i32 [[TMP0]], ptr [[V]], align 4
265-
// CHECK-NEXT: [[ARGP_CUR1:%.*]] = load ptr, ptr [[VA]], align 8, !freeze_bits [[META6]]
266-
// CHECK-NEXT: [[ARGP_NEXT2:%.*]] = getelementptr inbounds i8, ptr [[ARGP_CUR1]], i64 8
267-
// CHECK-NEXT: store ptr [[ARGP_NEXT2]], ptr [[VA]], align 8
268-
// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 2 [[TS]], ptr align 8 [[ARGP_CUR1]], i64 8, i1 false)
269-
// CHECK-NEXT: [[ARGP_CUR3:%.*]] = load ptr, ptr [[VA]], align 8, !freeze_bits [[META6]]
270-
// CHECK-NEXT: [[ARGP_NEXT4:%.*]] = getelementptr inbounds i8, ptr [[ARGP_CUR3]], i64 16
271-
// CHECK-NEXT: store ptr [[ARGP_NEXT4]], ptr [[VA]], align 8
272-
// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[SS]], ptr align 8 [[ARGP_CUR3]], i64 16, i1 false)
273-
// CHECK-NEXT: [[ARGP_CUR5:%.*]] = load ptr, ptr [[VA]], align 8, !freeze_bits [[META6]]
274-
// CHECK-NEXT: [[ARGP_NEXT6:%.*]] = getelementptr inbounds i8, ptr [[ARGP_CUR5]], i64 8
275-
// CHECK-NEXT: store ptr [[ARGP_NEXT6]], ptr [[VA]], align 8
276-
// CHECK-NEXT: [[TMP1:%.*]] = load ptr, ptr [[ARGP_CUR5]], align 8, !freeze_bits [[META6]]
277+
// CHECK-NEXT: [[ARGP_CUR2:%.*]] = load ptr, ptr [[VA]], align 8
278+
// CHECK-NEXT: [[ARGP_NEXT3:%.*]] = getelementptr inbounds i8, ptr [[ARGP_CUR2]], i64 8
279+
// CHECK-NEXT: store ptr [[ARGP_NEXT3]], ptr [[VA]], align 8
280+
// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 2 [[TS]], ptr align 8 [[ARGP_CUR2]], i64 8, i1 false)
281+
// CHECK-NEXT: [[ARGP_CUR4:%.*]] = load ptr, ptr [[VA]], align 8
282+
// CHECK-NEXT: [[ARGP_NEXT5:%.*]] = getelementptr inbounds i8, ptr [[ARGP_CUR4]], i64 16
283+
// CHECK-NEXT: store ptr [[ARGP_NEXT5]], ptr [[VA]], align 8
284+
// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[SS]], ptr align 8 [[ARGP_CUR4]], i64 16, i1 false)
285+
// CHECK-NEXT: [[ARGP_CUR6:%.*]] = load ptr, ptr [[VA]], align 8
286+
// CHECK-NEXT: [[ARGP_NEXT7:%.*]] = getelementptr inbounds i8, ptr [[ARGP_CUR6]], i64 8
287+
// CHECK-NEXT: store ptr [[ARGP_NEXT7]], ptr [[VA]], align 8
288+
// CHECK-NEXT: [[TMP1:%.*]] = load ptr, ptr [[ARGP_CUR6]], align 8, !freeze_bits [[META6]]
277289
// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[LS]], ptr align 8 [[TMP1]], i64 32, i1 false)
278290
// CHECK-NEXT: call void @llvm.va_end.p0(ptr [[VA]])
291+
// CHECK-NEXT: [[FREEZE_POISON8:%.*]] = freeze i32 poison
292+
// CHECK-NEXT: store i32 [[FREEZE_POISON8]], ptr [[RET]], align 4
279293
// CHECK-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_TINY]], ptr [[TS]], i32 0, i32 0
280294
// CHECK-NEXT: [[TMP2:%.*]] = load i16, ptr [[A]], align 2, !freeze_bits [[META6]]
281295
// CHECK-NEXT: [[CONV:%.*]] = zext i16 [[TMP2]] to i64
282-
// CHECK-NEXT: [[A8:%.*]] = getelementptr inbounds [[STRUCT_SMALL]], ptr [[SS]], i32 0, i32 0
283-
// CHECK-NEXT: [[TMP3:%.*]] = load i64, ptr [[A8]], align 8, !freeze_bits [[META6]]
296+
// CHECK-NEXT: [[A9:%.*]] = getelementptr inbounds [[STRUCT_SMALL]], ptr [[SS]], i32 0, i32 0
297+
// CHECK-NEXT: [[TMP3:%.*]] = load i64, ptr [[A9]], align 8, !freeze_bits [[META6]]
284298
// CHECK-NEXT: [[ADD:%.*]] = add nsw i64 [[CONV]], [[TMP3]]
285299
// CHECK-NEXT: [[C:%.*]] = getelementptr inbounds [[STRUCT_LARGE]], ptr [[LS]], i32 0, i32 2
286300
// CHECK-NEXT: [[TMP4:%.*]] = load i64, ptr [[C]], align 8, !freeze_bits [[META6]]
287-
// CHECK-NEXT: [[ADD9:%.*]] = add nsw i64 [[ADD]], [[TMP4]]
288-
// CHECK-NEXT: [[CONV10:%.*]] = trunc i64 [[ADD9]] to i32
289-
// CHECK-NEXT: store i32 [[CONV10]], ptr [[RET]], align 4
301+
// CHECK-NEXT: [[ADD10:%.*]] = add nsw i64 [[ADD]], [[TMP4]]
302+
// CHECK-NEXT: [[CONV11:%.*]] = trunc i64 [[ADD10]] to i32
303+
// CHECK-NEXT: store i32 [[CONV11]], ptr [[RET]], align 4
290304
// CHECK-NEXT: [[TMP5:%.*]] = load i32, ptr [[RET]], align 4
291305
// CHECK-NEXT: ret i32 [[TMP5]]
292306
//

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