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[clang][test] Update test for freeze poison emission on local allocations
1 parent c09a012 commit 8104aae

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15 files changed

+92
-35
lines changed

15 files changed

+92
-35
lines changed

clang/test/AST/ast-print-record-decl.c

Lines changed: 8 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -119,7 +119,7 @@ void defFirst(void) {
119119

120120
// LLVM: store i64 16
121121
long s0 = sizeof *p0;
122-
// LLVM-NEXT: store i64 16
122+
// LLVM: store i64 16
123123
long s1 = sizeof *p1;
124124
}
125125

@@ -137,7 +137,7 @@ void defLast(void) {
137137

138138
// LLVM: store i64 16
139139
long s0 = sizeof *p0;
140-
// LLVM-NEXT: store i64 16
140+
// LLVM: store i64 16
141141
long s1 = sizeof *p1;
142142
}
143143

@@ -158,9 +158,9 @@ void defMiddle(void) {
158158

159159
// LLVM: store i64 16
160160
long s0 = sizeof *p0;
161-
// LLVM-NEXT: store i64 16
161+
// LLVM: store i64 16
162162
long s1 = sizeof *p1;
163-
// LLVM-NEXT: store i64 16
163+
// LLVM: store i64 16
164164
long s2 = sizeof *p2;
165165
}
166166

@@ -190,13 +190,13 @@ void defSelfRef(void) {
190190

191191
// LLVM: store i64 64
192192
long s0 = sizeof *p0;
193-
// LLVM-NEXT: store i64 64
193+
// LLVM: store i64 64
194194
long s1 = sizeof *p1;
195-
// LLVM-NEXT: store i64 64
195+
// LLVM: store i64 64
196196
long s2 = sizeof *p0->p2;
197-
// LLVM-NEXT: store i64 64
197+
// LLVM: store i64 64
198198
long s3 = sizeof *p1->p3;
199-
// LLVM-NEXT: store i64 64
199+
// LLVM: store i64 64
200200
long s4 = sizeof *p1->p4->p2;
201201
}
202202

clang/test/C/C2x/n2900_n3011_2.c

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -23,6 +23,8 @@ void test_var() {
2323
// CHECK: define {{.*}} void @test_var
2424
// CHECK-NEXT: entry:
2525
// CHECK-NEXT: %[[I:.+]] = alloca i32
26+
// CHECK-NEXT: %[[FREEZE:.+]] = freeze i32 poison
27+
// CHECK-NEXT: store i32 %[[FREEZE]], ptr %[[I]]
2628
// CHECK-NEXT: store i32 0, ptr %[[I]]
2729
}
2830

@@ -32,6 +34,8 @@ void test_simple_compound_literal() {
3234
// CHECK-NEXT: entry:
3335
// CHECK-NEXT: %[[J:.+]] = alloca i32
3436
// CHECK-NEXT: %[[COMPOUND:.+]] = alloca i32
37+
// CHECK-NEXT: %[[FREEZE:.+]] = freeze i32 poison
38+
// CHECK-NEXT: store i32 %[[FREEZE]], ptr %[[J]]
3539
// CHECK-NEXT: store i32 0, ptr %[[COMPOUND]]
3640
// CHECK-NEXT: %[[MEM:.+]] = load i32, ptr %[[COMPOUND]]
3741
// CHECK-NEXT: store i32 %[[MEM]], ptr %[[J]]
@@ -51,6 +55,8 @@ void test_vla() {
5155
// CHECK-NEXT: entry:
5256
// CHECK-NEXT: %[[NUM_ELTS_PTR:.+]] = alloca i32
5357
// CHECK: %[[VLA_EXPR:.+]] = alloca i64
58+
// CHECK-NEXT: %[[FREEZE:.*]] = freeze i32 poison
59+
// CHECK-NEXT: store i32 %[[FREEZE]], ptr %[[NUM_ELTS_PTR]]
5460
// CHECK-NEXT: store i32 12, ptr %[[NUM_ELTS_PTR]]
5561
// CHECK-NEXT: %[[NUM_ELTS:.+]] = load i32, ptr %[[NUM_ELTS_PTR]]
5662
// CHECK-NEXT: %[[NUM_ELTS_EXT:.+]] = zext i32 %[[NUM_ELTS]] to i64
@@ -67,6 +73,8 @@ void test_zero_size_vla() {
6773
// CHECK-NEXT: entry:
6874
// CHECK-NEXT: %[[NUM_ELTS_PTR:.+]] = alloca i32
6975
// CHECK: %[[VLA_EXPR:.+]] = alloca i64
76+
// CHECK-NEXT: %[[FREEZE:.*]] = freeze i32 poison
77+
// CHECK-NEXT: store i32 %[[FREEZE]], ptr %[[NUM_ELTS_PTR]]
7078
// CHECK-NEXT: store i32 0, ptr %[[NUM_ELTS_PTR]]
7179
// CHECK-NEXT: %[[NUM_ELTS:.+]] = load i32, ptr %[[NUM_ELTS_PTR]]
7280
// CHECK-NEXT: %[[NUM_ELTS_EXT:.+]] = zext i32 %[[NUM_ELTS]] to i64

clang/test/C/drs/dr094.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -23,7 +23,7 @@ void other_func(void) {
2323
/* Test that the conversion looks the same as an assignment. */
2424
i = f;
2525
// CHECK: %0 = load float, ptr %f, align 4
26-
// CHECK-NEXT: %conv1 = fptosi float %0 to i32
27-
// CHECK-NEXT: store i32 %conv1, ptr %i, align 4
26+
// CHECK-NEXT: %conv2 = fptosi float %0 to i32
27+
// CHECK-NEXT: store i32 %conv2, ptr %i, align 4
2828
}
2929

clang/test/CXX/drs/cwg439.cpp

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -24,6 +24,8 @@ void f() {
2424
// CHECK-NEXT: [[P2:%.+]] = alloca ptr, align 8
2525
// CHECK: [[TEMP0:%.+]] = load ptr, ptr [[P1]]
2626
// CHECK-NEXT: store ptr [[TEMP0:%.+]], ptr [[P2]]
27+
// CHECK-NEXT: [[FREEZE:%.+]] = freeze i8 poison
28+
// CHECK-NEXT: store i8 [[FREEZE]], ptr [[B:%.+]]
2729
// CHECK-NEXT: [[TEMP1:%.+]] = load ptr, ptr [[P1]]
2830
// CHECK-NEXT: [[TEMP2:%.+]] = load ptr, ptr [[P2]]
2931
// CHECK-NEXT: {{.*}} = icmp eq ptr [[TEMP1]], [[TEMP2]]

clang/test/CXX/drs/cwg519.cpp

Lines changed: 10 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -23,14 +23,22 @@ void f() {
2323

2424
// CHECK-LABEL: define {{.*}} void @cwg519::f()()
2525
// CHECK: store ptr null, ptr [[A:%.+]],
26+
// CHECK-NEXT: [[FREEZE1:%.+]] = freeze ptr poison
27+
// CHECK-NEXT: store ptr [[FREEZE1]], ptr [[V:%.+]],
2628
// CHECK-NEXT: [[TEMP_A:%.+]] = load ptr, ptr [[A]]
27-
// CHECK-NEXT: store ptr [[TEMP_A]], ptr [[V:%.+]],
29+
// CHECK-NEXT: store ptr [[TEMP_A]], ptr [[V]],
30+
// CHECK-NEXT: [[FREEZE2:%.+]] = freeze i8 poison
31+
// CHECK-NEXT: store i8 [[FREEZE2]], ptr [[C1:%.+]]
2832
// CHECK-NEXT: [[TEMP_V:%.+]] = load ptr, ptr [[V]]
2933
// CHECK-NEXT: {{.+}} = icmp eq ptr [[TEMP_V]], null
3034

3135
// CHECK: store ptr null, ptr [[W:%.+]],
36+
// CHECK-NEXT: [[FREEZE4:%.+]] = freeze ptr poison
37+
// CHECK-NEXT: store ptr [[FREEZE4]], ptr [[B:%.+]],
3238
// CHECK-NEXT: [[TEMP_W:%.+]] = load ptr, ptr [[W]]
33-
// CHECK-NEXT: store ptr [[TEMP_W]], ptr [[B:%.+]],
39+
// CHECK-NEXT: store ptr [[TEMP_W]], ptr [[B]],
40+
// CHECK-NEXT: [[FREEZE5:%.+]] = freeze i8 poison
41+
// CHECK-NEXT: store i8 [[FREEZE5]], ptr [[C2:%.+]],
3442
// CHECK-NEXT: [[TEMP_B:%.+]] = load ptr, ptr [[B]]
3543
// CHECK-NEXT: {{.+}} = icmp eq ptr [[TEMP_B]], null
3644
// CHECK-LABEL: }

clang/test/CXX/drs/cwg658.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -20,6 +20,6 @@ void f(int* p1) {
2020
// CHECK: [[P1_ADDR:%.+]] = alloca ptr, align 8
2121
// CHECK-NEXT: [[P2:%.+]] = alloca ptr, align 8
2222
// CHECK: store ptr %p1, ptr [[P1_ADDR]]
23-
// CHECK-NEXT: [[TEMP:%.+]] = load ptr, ptr [[P1_ADDR]]
23+
// CHECK: [[TEMP:%.+]] = load ptr, ptr [[P1_ADDR]]
2424
// CHECK-NEXT: store ptr [[TEMP]], ptr [[P2]]
2525
// CHECK-LABEL: }

clang/test/CodeGen/CSKY/csky-abi.c

Lines changed: 18 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -210,7 +210,11 @@ int f_va_1(char *fmt, ...) {
210210
// CHECK-NEXT: [[VA:%.*]] = alloca ptr, align 4
211211
// CHECK-NEXT: [[V:%.*]] = alloca double, align 4
212212
// CHECK-NEXT: store ptr [[FMT:%.*]], ptr [[FMT_ADDR]], align 4
213+
// CHECK-NEXT: [[FREEZE:%.+]] = freeze ptr poison
214+
// CHECK-NEXT: store ptr [[FREEZE]], ptr [[VA]]
213215
// CHECK-NEXT: call void @llvm.va_start.p0(ptr [[VA]])
216+
// CHECK-NEXT: [[FREEZE1:%.+]] = freeze double poison
217+
// CHECK-NEXT: store double [[FREEZE1]], ptr [[V]]
214218
// CHECK-NEXT: [[ARGP_CUR:%.*]] = load ptr, ptr [[VA]], align 4
215219
// CHECK-NEXT: [[ARGP_NEXT:%.*]] = getelementptr inbounds i8, ptr [[ARGP_CUR]], i32 8
216220
// CHECK-NEXT: store ptr [[ARGP_NEXT]], ptr [[VA]], align 4
@@ -236,17 +240,25 @@ double f_va_2(char *fmt, ...) {
236240
// CHECK-NEXT: [[W:%.*]] = alloca i32, align 4
237241
// CHECK-NEXT: [[X:%.*]] = alloca double, align 4
238242
// CHECK-NEXT: store ptr [[FMT:%.*]], ptr [[FMT_ADDR]], align 4
243+
// CHECK-NEXT: [[FREEZE:%.+]] = freeze ptr poison
244+
// CHECK-NEXT: store ptr [[FREEZE]], ptr [[VA]]
239245
// CHECK-NEXT: call void @llvm.va_start.p0(ptr [[VA]])
246+
// CHECK-NEXT: [[FREEZE1:%.+]] = freeze double poison
247+
// CHECK-NEXT: store double [[FREEZE1]], ptr [[V]]
240248
// CHECK-NEXT: [[ARGP_CUR:%.*]] = load ptr, ptr [[VA]], align 4
241249
// CHECK-NEXT: [[ARGP_NEXT:%.*]] = getelementptr inbounds i8, ptr [[ARGP_CUR]], i32 8
242250
// CHECK-NEXT: store ptr [[ARGP_NEXT]], ptr [[VA]], align 4
243251
// CHECK-NEXT: [[TMP4:%.*]] = load double, ptr [[ARGP_CUR]], align 4
244252
// CHECK-NEXT: store double [[TMP4]], ptr [[V]], align 4
253+
// CHECK-NEXT: [[FREEZE2:%.+]] = freeze i32 poison
254+
// CHECK-NEXT: store i32 [[FREEZE2]], ptr [[W]]
245255
// CHECK-NEXT: [[ARGP_CUR2:%.*]] = load ptr, ptr [[VA]], align 4
246256
// CHECK-NEXT: [[ARGP_NEXT3:%.*]] = getelementptr inbounds i8, ptr [[ARGP_CUR2]], i32 4
247257
// CHECK-NEXT: store ptr [[ARGP_NEXT3]], ptr [[VA]], align 4
248258
// CHECK-NEXT: [[TMP6:%.*]] = load i32, ptr [[ARGP_CUR2]], align 4
249259
// CHECK-NEXT: store i32 [[TMP6]], ptr [[W]], align 4
260+
// CHECK-NEXT: [[FREEZE3:%.+]] = freeze double poison
261+
// CHECK-NEXT: store double [[FREEZE3]], ptr [[X]]
250262
// CHECK-NEXT: [[ARGP_CUR4:%.*]] = load ptr, ptr [[VA]], align 4
251263
// CHECK-NEXT: [[ARGP_NEXT5:%.*]] = getelementptr inbounds i8, ptr [[ARGP_CUR4]], i32 8
252264
// CHECK-NEXT: store ptr [[ARGP_NEXT5]], ptr [[VA]], align 4
@@ -279,12 +291,18 @@ double f_va_3(char *fmt, ...) {
279291
// CHECK-NEXT: [[LS:%.*]] = alloca [[STRUCT_LARGE:%.*]], align 4
280292
// CHECK-NEXT: [[RET:%.*]] = alloca i32, align 4
281293
// CHECK-NEXT: store ptr [[FMT:%.*]], ptr [[FMT_ADDR]], align 4
294+
// CHECK-NEXT: [[FREEZE:%.+]] = freeze ptr poison
295+
// CHECK-NEXT: store ptr [[FREEZE]], ptr [[VA]]
282296
// CHECK-NEXT: call void @llvm.va_start.p0(ptr [[VA]])
297+
// CHECK-NEXT: [[FREEZE1:%.+]] = freeze i32 poison
298+
// CHECK-NEXT: store i32 [[FREEZE1]], ptr [[V]]
283299
// CHECK-NEXT: [[ARGP_CUR:%.*]] = load ptr, ptr [[VA]], align 4
284300
// CHECK-NEXT: [[ARGP_NEXT:%.*]] = getelementptr inbounds i8, ptr [[ARGP_CUR]], i32 4
285301
// CHECK-NEXT: store ptr [[ARGP_NEXT]], ptr [[VA]], align 4
286302
// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[ARGP_CUR]], align 4
287303
// CHECK-NEXT: store i32 [[TMP1]], ptr [[V]], align 4
304+
// CHECK-NEXT: [[FREEZE2:%.+]] = freeze double poison
305+
// CHECK-NEXT: store double [[FREEZE2]], ptr [[LD]]
288306
// CHECK-NEXT: [[ARGP_CUR2:%.*]] = load ptr, ptr [[VA]], align 4
289307
// CHECK-NEXT: [[ARGP_NEXT3:%.*]] = getelementptr inbounds i8, ptr [[ARGP_CUR2]], i32 8
290308
// CHECK-NEXT: store ptr [[ARGP_NEXT3]], ptr [[VA]], align 4

clang/test/CodeGen/LoongArch/abi-lp64d.c

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -449,7 +449,11 @@ void f_va_caller(void) {
449449
// CHECK-NEXT: [[VA:%.*]] = alloca ptr, align 8
450450
// CHECK-NEXT: [[V:%.*]] = alloca i32, align 4
451451
// CHECK-NEXT: store ptr [[FMT:%.*]], ptr [[FMT_ADDR]], align 8
452+
// CHECK-NEXT: [[FREEZE:%.+]] = freeze ptr poison
453+
// CHECK-NEXT: store ptr [[FREEZE]], ptr [[VA]]
452454
// CHECK-NEXT: call void @llvm.va_start.p0(ptr [[VA]])
455+
// CHECK-NEXT: [[FREEZE1:%.+]] = freeze i32 poison
456+
// CHECK-NEXT: store i32 [[FREEZE1]], ptr [[V]]
453457
// CHECK-NEXT: [[ARGP_CUR:%.*]] = load ptr, ptr [[VA]], align 8
454458
// CHECK-NEXT: [[ARGP_NEXT:%.*]] = getelementptr inbounds i8, ptr [[ARGP_CUR]], i64 8
455459
// CHECK-NEXT: store ptr [[ARGP_NEXT]], ptr [[VA]], align 8

clang/test/CodeGen/SystemZ/systemz-inline-asm.c

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -127,8 +127,7 @@ long double test_f128(long double f, long double g) {
127127
// CHECK: %f = load fp128, ptr %0
128128
// CHECK: %g = load fp128, ptr %1
129129
// CHECK: [[RESULT:%.*]] = tail call fp128 asm "axbr $0, $2", "=f,0,f"(fp128 %f, fp128 %g)
130-
// CHECK: [[FREEZE_RESULT:%.*]] = freeze fp128 [[RESULT]]
131-
// CHECK: store fp128 [[FREEZE_RESULT]], ptr [[DEST]]
130+
// CHECK: store fp128 [[RESULT]], ptr [[DEST]]
132131
}
133132

134133
// Test that there are no tied physreg uses. TwoAddress pass cannot deal with them.

clang/test/CodeGen/X86/avx512f-builtins.c

Lines changed: 13 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -207,26 +207,26 @@ void test_mm512_mask_store_ps(void *p, __m512 a, __mmask16 m)
207207
void test_mm512_store_si512 (void *__P, __m512i __A)
208208
{
209209
// CHECK-LABEL: @test_mm512_store_si512
210-
// CHECK: load <8 x i64>, ptr %__A.addr.i, align 64, !freeze_bits !{{[0-9]+}}{{$}}
211-
// CHECK: [[SI512_3:%.+]] = load ptr, ptr %__P.addr.i, align 8, !freeze_bits !{{[0-9]+}}{{$}}
210+
// CHECK: load <8 x i64>, ptr %__A.addr.i, align 64
211+
// CHECK: [[SI512_3:%.+]] = load ptr, ptr %__P.addr.i, align 8
212212
// CHECK: store <8 x i64>
213213
_mm512_store_si512 ( __P,__A);
214214
}
215215

216216
void test_mm512_store_epi32 (void *__P, __m512i __A)
217217
{
218218
// CHECK-LABEL: @test_mm512_store_epi32
219-
// CHECK: load <8 x i64>, ptr %__A.addr.i, align 64, !freeze_bits !{{[0-9]+}}{{$}}
220-
// CHECK: [[Si32_3:%.+]] = load ptr, ptr %__P.addr.i, align 8, !freeze_bits !{{[0-9]+}}{{$}}
219+
// CHECK: load <8 x i64>, ptr %__A.addr.i, align 64
220+
// CHECK: [[Si32_3:%.+]] = load ptr, ptr %__P.addr.i
221221
// CHECK: store <8 x i64>
222222
_mm512_store_epi32 ( __P,__A);
223223
}
224224

225225
void test_mm512_store_epi64 (void *__P, __m512i __A)
226226
{
227227
// CHECK-LABEL: @test_mm512_store_epi64
228-
// CHECK: load <8 x i64>, ptr %__A.addr.i, align 64, !freeze_bits !{{[0-9]+}}{{$}}
229-
// CHECK: [[SI64_3:%.+]] = load ptr, ptr %__P.addr.i, align 8, !freeze_bits !{{[0-9]+}}{{$}}
228+
// CHECK: load <8 x i64>, ptr %__A.addr.i, align 64
229+
// CHECK: [[SI64_3:%.+]] = load ptr, ptr %__P.addr.i, align 8
230230
// CHECK: store <8 x i64>
231231
_mm512_store_epi64 ( __P,__A);
232232
}
@@ -356,24 +356,24 @@ __m512d test_mm512_mask_loadu_pd (__m512d __W, __mmask8 __U, void *__P)
356356
__m512i test_mm512_load_si512 (void *__P)
357357
{
358358
// CHECK-LABEL: @test_mm512_load_si512
359-
// CHECK: [[LI512_1:%.+]] = load ptr, ptr %__P.addr.i, align 8, !freeze_bits !{{[0-9]+}}{{$}}
360-
// CHECK: load <8 x i64>, ptr [[LI512_1]], align 64, !freeze_bits !{{[0-9]+}}{{$}}
359+
// CHECK: [[LI512_1:%.+]] = load ptr, ptr %__P.addr.i, align 8
360+
// CHECK: load <8 x i64>, ptr [[LI512_1]], align 64
361361
return _mm512_load_si512 ( __P);
362362
}
363363

364364
__m512i test_mm512_load_epi32 (void *__P)
365365
{
366366
// CHECK-LABEL: @test_mm512_load_epi32
367-
// CHECK: [[LI32_1:%.+]] = load ptr, ptr %__P.addr.i, align 8, !freeze_bits !{{[0-9]+}}{{$}}
368-
// CHECK: load <8 x i64>, ptr [[LI32_1]], align 64, !freeze_bits !{{[0-9]+}}{{$}}
367+
// CHECK: [[LI32_1:%.+]] = load ptr, ptr %__P.addr.i, align 8
368+
// CHECK: load <8 x i64>, ptr [[LI32_1]], align 64
369369
return _mm512_load_epi32 ( __P);
370370
}
371371

372372
__m512i test_mm512_load_epi64 (void *__P)
373373
{
374374
// CHECK-LABEL: @test_mm512_load_epi64
375-
// CHECK: [[LI64_1:%.+]] = load ptr, ptr %__P.addr.i, align 8, !freeze_bits !{{[0-9]+}}{{$}}
376-
// CHECK: load <8 x i64>, ptr [[LI64_1]], align 64, !freeze_bits !{{[0-9]+}}{{$}}
375+
// CHECK: [[LI64_1:%.+]] = load ptr, ptr %__P.addr.i, align 8
376+
// CHECK: load <8 x i64>, ptr [[LI64_1]], align 64
377377
return _mm512_load_epi64 ( __P);
378378
}
379379

@@ -4604,7 +4604,7 @@ __m128 test_mm_getmant_ss(__m128 __A, __m128 __B) {
46044604

46054605
__mmask16 test_mm512_kmov(__mmask16 __A) {
46064606
// CHECK-LABEL: @test_mm512_kmov
4607-
// CHECK: load i16, ptr %__A.addr.i, align 2, !freeze_bits !{{[0-9]+}}{{$}}
4607+
// CHECK: load i16, ptr %__A.addr.i, align 2
46084608
return _mm512_kmov(__A);
46094609
}
46104610

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