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[PowerPC] Spill non-volatile registers required for traceback table (llvm#71115)
On AIX we need to spill all [rfv]N-[rfv]31 when a function clobbers [rfv]N so that the traceback table contains accurate information.
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9 files changed

+2237
-493
lines changed

9 files changed

+2237
-493
lines changed

llvm/lib/Target/PowerPC/PPCFrameLowering.cpp

Lines changed: 59 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1966,6 +1966,8 @@ void PPCFrameLowering::determineCalleeSaves(MachineFunction &MF,
19661966
BitVector &SavedRegs,
19671967
RegScavenger *RS) const {
19681968
TargetFrameLowering::determineCalleeSaves(MF, SavedRegs, RS);
1969+
if (Subtarget.isAIXABI())
1970+
updateCalleeSaves(MF, SavedRegs);
19691971

19701972
const PPCRegisterInfo *RegInfo = Subtarget.getRegisterInfo();
19711973

@@ -2725,6 +2727,63 @@ bool PPCFrameLowering::enableShrinkWrapping(const MachineFunction &MF) const {
27252727
return !MF.getSubtarget<PPCSubtarget>().is32BitELFABI();
27262728
}
27272729

2730+
void PPCFrameLowering::updateCalleeSaves(const MachineFunction &MF,
2731+
BitVector &SavedRegs) const {
2732+
// The AIX ABI uses traceback tables for EH which require that if callee-saved
2733+
// register N is used, all registers N-31 must be saved/restored.
2734+
// NOTE: The check for AIX is not actually what is relevant. Traceback tables
2735+
// on Linux have the same requirements. It is just that AIX is the only ABI
2736+
// for which we actually use traceback tables. If another ABI needs to be
2737+
// supported that also uses them, we can add a check such as
2738+
// Subtarget.usesTraceBackTables().
2739+
assert(Subtarget.isAIXABI() &&
2740+
"Function updateCalleeSaves should only be called for AIX.");
2741+
2742+
// If there are no callee saves then there is nothing to do.
2743+
if (SavedRegs.none())
2744+
return;
2745+
2746+
const MCPhysReg *CSRegs =
2747+
Subtarget.getRegisterInfo()->getCalleeSavedRegs(&MF);
2748+
MCPhysReg LowestGPR = PPC::R31;
2749+
MCPhysReg LowestG8R = PPC::X31;
2750+
MCPhysReg LowestFPR = PPC::F31;
2751+
MCPhysReg LowestVR = PPC::V31;
2752+
2753+
// Traverse the CSRs twice so as not to rely on ascending ordering of
2754+
// registers in the array. The first pass finds the lowest numbered
2755+
// register and the second pass marks all higher numbered registers
2756+
// for spilling.
2757+
for (int i = 0; CSRegs[i]; i++) {
2758+
// Get the lowest numbered register for each class that actually needs
2759+
// to be saved.
2760+
MCPhysReg Cand = CSRegs[i];
2761+
if (!SavedRegs.test(Cand))
2762+
continue;
2763+
if (PPC::GPRCRegClass.contains(Cand) && Cand < LowestGPR)
2764+
LowestGPR = Cand;
2765+
else if (PPC::G8RCRegClass.contains(Cand) && Cand < LowestG8R)
2766+
LowestG8R = Cand;
2767+
else if ((PPC::F4RCRegClass.contains(Cand) ||
2768+
PPC::F8RCRegClass.contains(Cand)) &&
2769+
Cand < LowestFPR)
2770+
LowestFPR = Cand;
2771+
else if (PPC::VRRCRegClass.contains(Cand) && Cand < LowestVR)
2772+
LowestVR = Cand;
2773+
}
2774+
2775+
for (int i = 0; CSRegs[i]; i++) {
2776+
MCPhysReg Cand = CSRegs[i];
2777+
if ((PPC::GPRCRegClass.contains(Cand) && Cand > LowestGPR) ||
2778+
(PPC::G8RCRegClass.contains(Cand) && Cand > LowestG8R) ||
2779+
((PPC::F4RCRegClass.contains(Cand) ||
2780+
PPC::F8RCRegClass.contains(Cand)) &&
2781+
Cand > LowestFPR) ||
2782+
(PPC::VRRCRegClass.contains(Cand) && Cand > LowestVR))
2783+
SavedRegs.set(Cand);
2784+
}
2785+
}
2786+
27282787
uint64_t PPCFrameLowering::getStackThreshold() const {
27292788
// On PPC64, we use `stux r1, r1, <scratch_reg>` to extend the stack;
27302789
// use `add r1, r1, <scratch_reg>` to release the stack frame.

llvm/lib/Target/PowerPC/PPCFrameLowering.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -173,6 +173,7 @@ class PPCFrameLowering: public TargetFrameLowering {
173173
/// function prologue/epilogue.
174174
bool canUseAsPrologue(const MachineBasicBlock &MBB) const override;
175175
bool canUseAsEpilogue(const MachineBasicBlock &MBB) const override;
176+
void updateCalleeSaves(const MachineFunction &MF, BitVector &SavedRegs) const;
176177

177178
uint64_t getStackThreshold() const override;
178179
};

llvm/test/CodeGen/PowerPC/aix-csr-vector-extabi.ll

Lines changed: 971 additions & 228 deletions
Large diffs are not rendered by default.

llvm/test/CodeGen/PowerPC/aix-csr-vector.ll

Lines changed: 146 additions & 52 deletions
Large diffs are not rendered by default.

llvm/test/CodeGen/PowerPC/aix-csr.ll

Lines changed: 670 additions & 139 deletions
Large diffs are not rendered by default.
Lines changed: 301 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,301 @@
1+
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2+
; RUN: llc -mcpu=pwr9 -mattr=+altivec -verify-machineinstrs --vec-extabi \
3+
; RUN: -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \
4+
; RUN: -mtriple=powerpc-unknown-aix < %s | FileCheck %s --check-prefix 32BIT
5+
6+
; RUN: llc -mcpu=pwr9 -mattr=+altivec -verify-machineinstrs --vec-extabi \
7+
; RUN: -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \
8+
; RUN: -mtriple=powerpc64-unknown-aix < %s | FileCheck %s --check-prefix 64BIT
9+
10+
@_ZTIi = external constant ptr
11+
12+
; Function Attrs: uwtable mustprogress
13+
define dso_local signext i32 @_Z5test2iPPKc(i32 signext %argc, ptr nocapture readnone %argv) local_unnamed_addr #0 personality ptr @__gxx_personality_v0{
14+
; 32BIT-LABEL: _Z5test2iPPKc:
15+
; 32BIT: # %bb.0: # %entry
16+
; 32BIT-NEXT: mflr r0
17+
; 32BIT-NEXT: stwu r1, -464(r1)
18+
; 32BIT-NEXT: stw r0, 472(r1)
19+
; 32BIT-NEXT: stw r30, 320(r1) # 4-byte Folded Spill
20+
; 32BIT-NEXT: li r30, 0
21+
; 32BIT-NEXT: stxv v20, 64(r1) # 16-byte Folded Spill
22+
; 32BIT-NEXT: stxv v21, 80(r1) # 16-byte Folded Spill
23+
; 32BIT-NEXT: stw r31, 324(r1) # 4-byte Folded Spill
24+
; 32BIT-NEXT: mr r31, r3
25+
; 32BIT-NEXT: stw r14, 256(r1) # 4-byte Folded Spill
26+
; 32BIT-NEXT: stxv v22, 96(r1) # 16-byte Folded Spill
27+
; 32BIT-NEXT: stw r15, 260(r1) # 4-byte Folded Spill
28+
; 32BIT-NEXT: stxv v23, 112(r1) # 16-byte Folded Spill
29+
; 32BIT-NEXT: stw r16, 264(r1) # 4-byte Folded Spill
30+
; 32BIT-NEXT: stxv v24, 128(r1) # 16-byte Folded Spill
31+
; 32BIT-NEXT: stw r17, 268(r1) # 4-byte Folded Spill
32+
; 32BIT-NEXT: stw r18, 272(r1) # 4-byte Folded Spill
33+
; 32BIT-NEXT: stxv v25, 144(r1) # 16-byte Folded Spill
34+
; 32BIT-NEXT: stw r19, 276(r1) # 4-byte Folded Spill
35+
; 32BIT-NEXT: stxv v26, 160(r1) # 16-byte Folded Spill
36+
; 32BIT-NEXT: stw r20, 280(r1) # 4-byte Folded Spill
37+
; 32BIT-NEXT: stxv v27, 176(r1) # 16-byte Folded Spill
38+
; 32BIT-NEXT: stw r21, 284(r1) # 4-byte Folded Spill
39+
; 32BIT-NEXT: stw r22, 288(r1) # 4-byte Folded Spill
40+
; 32BIT-NEXT: stxv v28, 192(r1) # 16-byte Folded Spill
41+
; 32BIT-NEXT: stw r23, 292(r1) # 4-byte Folded Spill
42+
; 32BIT-NEXT: stxv v29, 208(r1) # 16-byte Folded Spill
43+
; 32BIT-NEXT: stw r24, 296(r1) # 4-byte Folded Spill
44+
; 32BIT-NEXT: stxv v30, 224(r1) # 16-byte Folded Spill
45+
; 32BIT-NEXT: stw r25, 300(r1) # 4-byte Folded Spill
46+
; 32BIT-NEXT: stw r26, 304(r1) # 4-byte Folded Spill
47+
; 32BIT-NEXT: stxv v31, 240(r1) # 16-byte Folded Spill
48+
; 32BIT-NEXT: stw r27, 308(r1) # 4-byte Folded Spill
49+
; 32BIT-NEXT: stw r28, 312(r1) # 4-byte Folded Spill
50+
; 32BIT-NEXT: stw r29, 316(r1) # 4-byte Folded Spill
51+
; 32BIT-NEXT: stfd f15, 328(r1) # 8-byte Folded Spill
52+
; 32BIT-NEXT: stfd f16, 336(r1) # 8-byte Folded Spill
53+
; 32BIT-NEXT: stfd f17, 344(r1) # 8-byte Folded Spill
54+
; 32BIT-NEXT: stfd f18, 352(r1) # 8-byte Folded Spill
55+
; 32BIT-NEXT: stfd f19, 360(r1) # 8-byte Folded Spill
56+
; 32BIT-NEXT: stfd f20, 368(r1) # 8-byte Folded Spill
57+
; 32BIT-NEXT: stfd f21, 376(r1) # 8-byte Folded Spill
58+
; 32BIT-NEXT: stfd f22, 384(r1) # 8-byte Folded Spill
59+
; 32BIT-NEXT: stfd f23, 392(r1) # 8-byte Folded Spill
60+
; 32BIT-NEXT: stfd f24, 400(r1) # 8-byte Folded Spill
61+
; 32BIT-NEXT: stfd f25, 408(r1) # 8-byte Folded Spill
62+
; 32BIT-NEXT: stfd f26, 416(r1) # 8-byte Folded Spill
63+
; 32BIT-NEXT: stfd f27, 424(r1) # 8-byte Folded Spill
64+
; 32BIT-NEXT: stfd f28, 432(r1) # 8-byte Folded Spill
65+
; 32BIT-NEXT: stfd f29, 440(r1) # 8-byte Folded Spill
66+
; 32BIT-NEXT: stfd f30, 448(r1) # 8-byte Folded Spill
67+
; 32BIT-NEXT: stfd f31, 456(r1) # 8-byte Folded Spill
68+
; 32BIT-NEXT: #APP
69+
; 32BIT-NEXT: nop
70+
; 32BIT-NEXT: #NO_APP
71+
; 32BIT-NEXT: L..tmp0:
72+
; 32BIT-NEXT: bl ._Z4testi[PR]
73+
; 32BIT-NEXT: nop
74+
; 32BIT-NEXT: L..tmp1:
75+
; 32BIT-NEXT: L..BB0_1: # %return
76+
; 32BIT-NEXT: lxv v31, 240(r1) # 16-byte Folded Reload
77+
; 32BIT-NEXT: lxv v30, 224(r1) # 16-byte Folded Reload
78+
; 32BIT-NEXT: lxv v29, 208(r1) # 16-byte Folded Reload
79+
; 32BIT-NEXT: lxv v28, 192(r1) # 16-byte Folded Reload
80+
; 32BIT-NEXT: mr r3, r30
81+
; 32BIT-NEXT: lxv v27, 176(r1) # 16-byte Folded Reload
82+
; 32BIT-NEXT: lxv v26, 160(r1) # 16-byte Folded Reload
83+
; 32BIT-NEXT: lxv v25, 144(r1) # 16-byte Folded Reload
84+
; 32BIT-NEXT: lxv v24, 128(r1) # 16-byte Folded Reload
85+
; 32BIT-NEXT: lxv v23, 112(r1) # 16-byte Folded Reload
86+
; 32BIT-NEXT: lxv v22, 96(r1) # 16-byte Folded Reload
87+
; 32BIT-NEXT: lxv v21, 80(r1) # 16-byte Folded Reload
88+
; 32BIT-NEXT: lxv v20, 64(r1) # 16-byte Folded Reload
89+
; 32BIT-NEXT: lfd f31, 456(r1) # 8-byte Folded Reload
90+
; 32BIT-NEXT: lfd f30, 448(r1) # 8-byte Folded Reload
91+
; 32BIT-NEXT: lfd f29, 440(r1) # 8-byte Folded Reload
92+
; 32BIT-NEXT: lfd f28, 432(r1) # 8-byte Folded Reload
93+
; 32BIT-NEXT: lwz r31, 324(r1) # 4-byte Folded Reload
94+
; 32BIT-NEXT: lwz r30, 320(r1) # 4-byte Folded Reload
95+
; 32BIT-NEXT: lwz r29, 316(r1) # 4-byte Folded Reload
96+
; 32BIT-NEXT: lfd f27, 424(r1) # 8-byte Folded Reload
97+
; 32BIT-NEXT: lwz r28, 312(r1) # 4-byte Folded Reload
98+
; 32BIT-NEXT: lwz r27, 308(r1) # 4-byte Folded Reload
99+
; 32BIT-NEXT: lwz r26, 304(r1) # 4-byte Folded Reload
100+
; 32BIT-NEXT: lfd f26, 416(r1) # 8-byte Folded Reload
101+
; 32BIT-NEXT: lwz r25, 300(r1) # 4-byte Folded Reload
102+
; 32BIT-NEXT: lwz r24, 296(r1) # 4-byte Folded Reload
103+
; 32BIT-NEXT: lwz r23, 292(r1) # 4-byte Folded Reload
104+
; 32BIT-NEXT: lfd f25, 408(r1) # 8-byte Folded Reload
105+
; 32BIT-NEXT: lwz r22, 288(r1) # 4-byte Folded Reload
106+
; 32BIT-NEXT: lwz r21, 284(r1) # 4-byte Folded Reload
107+
; 32BIT-NEXT: lwz r20, 280(r1) # 4-byte Folded Reload
108+
; 32BIT-NEXT: lfd f24, 400(r1) # 8-byte Folded Reload
109+
; 32BIT-NEXT: lwz r19, 276(r1) # 4-byte Folded Reload
110+
; 32BIT-NEXT: lwz r18, 272(r1) # 4-byte Folded Reload
111+
; 32BIT-NEXT: lwz r17, 268(r1) # 4-byte Folded Reload
112+
; 32BIT-NEXT: lfd f23, 392(r1) # 8-byte Folded Reload
113+
; 32BIT-NEXT: lwz r16, 264(r1) # 4-byte Folded Reload
114+
; 32BIT-NEXT: lwz r15, 260(r1) # 4-byte Folded Reload
115+
; 32BIT-NEXT: lwz r14, 256(r1) # 4-byte Folded Reload
116+
; 32BIT-NEXT: lfd f22, 384(r1) # 8-byte Folded Reload
117+
; 32BIT-NEXT: lfd f21, 376(r1) # 8-byte Folded Reload
118+
; 32BIT-NEXT: lfd f20, 368(r1) # 8-byte Folded Reload
119+
; 32BIT-NEXT: lfd f19, 360(r1) # 8-byte Folded Reload
120+
; 32BIT-NEXT: lfd f18, 352(r1) # 8-byte Folded Reload
121+
; 32BIT-NEXT: lfd f17, 344(r1) # 8-byte Folded Reload
122+
; 32BIT-NEXT: lfd f16, 336(r1) # 8-byte Folded Reload
123+
; 32BIT-NEXT: lfd f15, 328(r1) # 8-byte Folded Reload
124+
; 32BIT-NEXT: addi r1, r1, 464
125+
; 32BIT-NEXT: lwz r0, 8(r1)
126+
; 32BIT-NEXT: mtlr r0
127+
; 32BIT-NEXT: blr
128+
; 32BIT-NEXT: L..BB0_2: # %lpad
129+
; 32BIT-NEXT: L..tmp2:
130+
; 32BIT-NEXT: bl .__cxa_begin_catch[PR]
131+
; 32BIT-NEXT: nop
132+
; 32BIT-NEXT: lwz r3, 0(r3)
133+
; 32BIT-NEXT: add r30, r3, r31
134+
; 32BIT-NEXT: bl .__cxa_end_catch[PR]
135+
; 32BIT-NEXT: nop
136+
; 32BIT-NEXT: b L..BB0_1
137+
;
138+
; 64BIT-LABEL: _Z5test2iPPKc:
139+
; 64BIT: # %bb.0: # %entry
140+
; 64BIT-NEXT: mflr r0
141+
; 64BIT-NEXT: stdu r1, -592(r1)
142+
; 64BIT-NEXT: std r0, 608(r1)
143+
; 64BIT-NEXT: std r30, 440(r1) # 8-byte Folded Spill
144+
; 64BIT-NEXT: li r30, 0
145+
; 64BIT-NEXT: stxv v20, 112(r1) # 16-byte Folded Spill
146+
; 64BIT-NEXT: stxv v21, 128(r1) # 16-byte Folded Spill
147+
; 64BIT-NEXT: std r31, 448(r1) # 8-byte Folded Spill
148+
; 64BIT-NEXT: mr r31, r3
149+
; 64BIT-NEXT: std r14, 312(r1) # 8-byte Folded Spill
150+
; 64BIT-NEXT: stxv v22, 144(r1) # 16-byte Folded Spill
151+
; 64BIT-NEXT: std r15, 320(r1) # 8-byte Folded Spill
152+
; 64BIT-NEXT: stxv v23, 160(r1) # 16-byte Folded Spill
153+
; 64BIT-NEXT: std r16, 328(r1) # 8-byte Folded Spill
154+
; 64BIT-NEXT: stxv v24, 176(r1) # 16-byte Folded Spill
155+
; 64BIT-NEXT: std r17, 336(r1) # 8-byte Folded Spill
156+
; 64BIT-NEXT: std r18, 344(r1) # 8-byte Folded Spill
157+
; 64BIT-NEXT: stxv v25, 192(r1) # 16-byte Folded Spill
158+
; 64BIT-NEXT: std r19, 352(r1) # 8-byte Folded Spill
159+
; 64BIT-NEXT: stxv v26, 208(r1) # 16-byte Folded Spill
160+
; 64BIT-NEXT: std r20, 360(r1) # 8-byte Folded Spill
161+
; 64BIT-NEXT: stxv v27, 224(r1) # 16-byte Folded Spill
162+
; 64BIT-NEXT: std r21, 368(r1) # 8-byte Folded Spill
163+
; 64BIT-NEXT: std r22, 376(r1) # 8-byte Folded Spill
164+
; 64BIT-NEXT: stxv v28, 240(r1) # 16-byte Folded Spill
165+
; 64BIT-NEXT: std r23, 384(r1) # 8-byte Folded Spill
166+
; 64BIT-NEXT: stxv v29, 256(r1) # 16-byte Folded Spill
167+
; 64BIT-NEXT: std r24, 392(r1) # 8-byte Folded Spill
168+
; 64BIT-NEXT: stxv v30, 272(r1) # 16-byte Folded Spill
169+
; 64BIT-NEXT: std r25, 400(r1) # 8-byte Folded Spill
170+
; 64BIT-NEXT: std r26, 408(r1) # 8-byte Folded Spill
171+
; 64BIT-NEXT: stxv v31, 288(r1) # 16-byte Folded Spill
172+
; 64BIT-NEXT: std r27, 416(r1) # 8-byte Folded Spill
173+
; 64BIT-NEXT: std r28, 424(r1) # 8-byte Folded Spill
174+
; 64BIT-NEXT: std r29, 432(r1) # 8-byte Folded Spill
175+
; 64BIT-NEXT: stfd f15, 456(r1) # 8-byte Folded Spill
176+
; 64BIT-NEXT: stfd f16, 464(r1) # 8-byte Folded Spill
177+
; 64BIT-NEXT: stfd f17, 472(r1) # 8-byte Folded Spill
178+
; 64BIT-NEXT: stfd f18, 480(r1) # 8-byte Folded Spill
179+
; 64BIT-NEXT: stfd f19, 488(r1) # 8-byte Folded Spill
180+
; 64BIT-NEXT: stfd f20, 496(r1) # 8-byte Folded Spill
181+
; 64BIT-NEXT: stfd f21, 504(r1) # 8-byte Folded Spill
182+
; 64BIT-NEXT: stfd f22, 512(r1) # 8-byte Folded Spill
183+
; 64BIT-NEXT: stfd f23, 520(r1) # 8-byte Folded Spill
184+
; 64BIT-NEXT: stfd f24, 528(r1) # 8-byte Folded Spill
185+
; 64BIT-NEXT: stfd f25, 536(r1) # 8-byte Folded Spill
186+
; 64BIT-NEXT: stfd f26, 544(r1) # 8-byte Folded Spill
187+
; 64BIT-NEXT: stfd f27, 552(r1) # 8-byte Folded Spill
188+
; 64BIT-NEXT: stfd f28, 560(r1) # 8-byte Folded Spill
189+
; 64BIT-NEXT: stfd f29, 568(r1) # 8-byte Folded Spill
190+
; 64BIT-NEXT: stfd f30, 576(r1) # 8-byte Folded Spill
191+
; 64BIT-NEXT: stfd f31, 584(r1) # 8-byte Folded Spill
192+
; 64BIT-NEXT: #APP
193+
; 64BIT-NEXT: nop
194+
; 64BIT-NEXT: #NO_APP
195+
; 64BIT-NEXT: L..tmp0:
196+
; 64BIT-NEXT: bl ._Z4testi[PR]
197+
; 64BIT-NEXT: nop
198+
; 64BIT-NEXT: L..tmp1:
199+
; 64BIT-NEXT: L..BB0_1: # %return
200+
; 64BIT-NEXT: lxv v31, 288(r1) # 16-byte Folded Reload
201+
; 64BIT-NEXT: lxv v30, 272(r1) # 16-byte Folded Reload
202+
; 64BIT-NEXT: lxv v29, 256(r1) # 16-byte Folded Reload
203+
; 64BIT-NEXT: lxv v28, 240(r1) # 16-byte Folded Reload
204+
; 64BIT-NEXT: extsw r3, r30
205+
; 64BIT-NEXT: lxv v27, 224(r1) # 16-byte Folded Reload
206+
; 64BIT-NEXT: lxv v26, 208(r1) # 16-byte Folded Reload
207+
; 64BIT-NEXT: lxv v25, 192(r1) # 16-byte Folded Reload
208+
; 64BIT-NEXT: lxv v24, 176(r1) # 16-byte Folded Reload
209+
; 64BIT-NEXT: lxv v23, 160(r1) # 16-byte Folded Reload
210+
; 64BIT-NEXT: lxv v22, 144(r1) # 16-byte Folded Reload
211+
; 64BIT-NEXT: lxv v21, 128(r1) # 16-byte Folded Reload
212+
; 64BIT-NEXT: lxv v20, 112(r1) # 16-byte Folded Reload
213+
; 64BIT-NEXT: lfd f31, 584(r1) # 8-byte Folded Reload
214+
; 64BIT-NEXT: lfd f30, 576(r1) # 8-byte Folded Reload
215+
; 64BIT-NEXT: lfd f29, 568(r1) # 8-byte Folded Reload
216+
; 64BIT-NEXT: lfd f28, 560(r1) # 8-byte Folded Reload
217+
; 64BIT-NEXT: ld r31, 448(r1) # 8-byte Folded Reload
218+
; 64BIT-NEXT: ld r30, 440(r1) # 8-byte Folded Reload
219+
; 64BIT-NEXT: ld r29, 432(r1) # 8-byte Folded Reload
220+
; 64BIT-NEXT: lfd f27, 552(r1) # 8-byte Folded Reload
221+
; 64BIT-NEXT: ld r28, 424(r1) # 8-byte Folded Reload
222+
; 64BIT-NEXT: ld r27, 416(r1) # 8-byte Folded Reload
223+
; 64BIT-NEXT: ld r26, 408(r1) # 8-byte Folded Reload
224+
; 64BIT-NEXT: lfd f26, 544(r1) # 8-byte Folded Reload
225+
; 64BIT-NEXT: ld r25, 400(r1) # 8-byte Folded Reload
226+
; 64BIT-NEXT: ld r24, 392(r1) # 8-byte Folded Reload
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; 64BIT-NEXT: ld r23, 384(r1) # 8-byte Folded Reload
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; 64BIT-NEXT: lfd f25, 536(r1) # 8-byte Folded Reload
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; 64BIT-NEXT: ld r22, 376(r1) # 8-byte Folded Reload
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; 64BIT-NEXT: ld r21, 368(r1) # 8-byte Folded Reload
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; 64BIT-NEXT: ld r20, 360(r1) # 8-byte Folded Reload
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; 64BIT-NEXT: lfd f24, 528(r1) # 8-byte Folded Reload
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; 64BIT-NEXT: ld r19, 352(r1) # 8-byte Folded Reload
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; 64BIT-NEXT: ld r18, 344(r1) # 8-byte Folded Reload
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; 64BIT-NEXT: ld r17, 336(r1) # 8-byte Folded Reload
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; 64BIT-NEXT: lfd f23, 520(r1) # 8-byte Folded Reload
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; 64BIT-NEXT: ld r16, 328(r1) # 8-byte Folded Reload
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; 64BIT-NEXT: ld r15, 320(r1) # 8-byte Folded Reload
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; 64BIT-NEXT: ld r14, 312(r1) # 8-byte Folded Reload
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; 64BIT-NEXT: lfd f22, 512(r1) # 8-byte Folded Reload
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; 64BIT-NEXT: lfd f21, 504(r1) # 8-byte Folded Reload
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; 64BIT-NEXT: lfd f20, 496(r1) # 8-byte Folded Reload
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; 64BIT-NEXT: lfd f19, 488(r1) # 8-byte Folded Reload
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; 64BIT-NEXT: lfd f18, 480(r1) # 8-byte Folded Reload
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; 64BIT-NEXT: lfd f17, 472(r1) # 8-byte Folded Reload
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; 64BIT-NEXT: lfd f16, 464(r1) # 8-byte Folded Reload
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; 64BIT-NEXT: lfd f15, 456(r1) # 8-byte Folded Reload
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; 64BIT-NEXT: addi r1, r1, 592
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; 64BIT-NEXT: ld r0, 16(r1)
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; 64BIT-NEXT: mtlr r0
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; 64BIT-NEXT: blr
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; 64BIT-NEXT: L..BB0_2: # %lpad
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; 64BIT-NEXT: L..tmp2:
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; 64BIT-NEXT: bl .__cxa_begin_catch[PR]
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; 64BIT-NEXT: nop
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; 64BIT-NEXT: lwz r3, 0(r3)
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; 64BIT-NEXT: add r30, r3, r31
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; 64BIT-NEXT: bl .__cxa_end_catch[PR]
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; 64BIT-NEXT: nop
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; 64BIT-NEXT: b L..BB0_1
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entry:
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tail call void asm sideeffect "nop", "~{r14},~{f15},~{v20}"()
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%call = invoke signext i32 @_Z4testi(i32 signext %argc)
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to label %return unwind label %lpad
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lpad: ; preds = %entry
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%0 = landingpad { ptr, i32 }
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catch ptr @_ZTIi
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%1 = extractvalue { ptr, i32 } %0, 1
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%2 = tail call i32 @llvm.eh.typeid.for(ptr @_ZTIi) #3
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%matches = icmp eq i32 %1, %2
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br i1 %matches, label %catch, label %eh.resume
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catch: ; preds = %lpad
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%3 = extractvalue { ptr, i32 } %0, 0
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%4 = tail call ptr @__cxa_begin_catch(ptr %3) #3
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%5 = load i32, ptr %4, align 4
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%add = add nsw i32 %5, %argc
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tail call void @__cxa_end_catch()
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br label %return
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return: ; preds = %entry, %catch
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%retval.0 = phi i32 [ %add, %catch ], [ 0, %entry ]
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ret i32 %retval.0
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eh.resume: ; preds = %lpad
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resume { ptr, i32 } %0
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}
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declare signext i32 @_Z4testi(i32 signext) local_unnamed_addr
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declare i32 @__gxx_personality_v0(...)
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; Function Attrs: nounwind readnone
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declare i32 @llvm.eh.typeid.for(ptr)
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declare ptr @__cxa_begin_catch(ptr) local_unnamed_addr
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declare void @__cxa_end_catch() local_unnamed_addr
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attributes #0 = { uwtable }

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