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[AMDGPU] Refactor export instruction definitions. NFC. (llvm#81738)
Using multiclasses for the Real instruction definitions has a couple of benefits: - It avoids repeating information that was already specified when defining the corresponding pseudo, like the row and done bits. - It allows commoning up the Real definitions for architectures which are mostly the same, like GFX11 and GFX12.
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llvm/lib/Target/AMDGPU/EXPInstructions.td

Lines changed: 58 additions & 68 deletions
Original file line numberDiff line numberDiff line change
@@ -10,21 +10,24 @@
1010
// EXP classes
1111
//===----------------------------------------------------------------------===//
1212

13-
class EXPCommon<bit row, bit done, string asm = ""> : InstSI<
13+
class EXPCommon<bit _row, bit _done, string asm = ""> : InstSI<
1414
(outs),
1515
(ins exp_tgt:$tgt,
1616
ExpSrc0:$src0, ExpSrc1:$src1, ExpSrc2:$src2, ExpSrc3:$src3,
1717
exp_vm:$vm, exp_compr:$compr, i32imm:$en),
1818
asm> {
1919
let EXP = 1;
2020
let EXP_CNT = 1;
21-
let mayLoad = done;
21+
let mayLoad = _done;
2222
let mayStore = 1;
2323
let maybeAtomic = 0;
2424
let UseNamedOperandTable = 1;
25-
let Uses = !if(row, [EXEC, M0], [EXEC]);
25+
let Uses = !if(_row, [EXEC, M0], [EXEC]);
2626
let SchedRW = [WriteExport];
2727
let DisableWQM = 1;
28+
29+
bit row = _row;
30+
bit done = _done;
2831
}
2932

3033
class EXP_Pseudo<bit row, bit done>
@@ -34,17 +37,17 @@ class EXP_Pseudo<bit row, bit done>
3437
}
3538

3639
// Real instruction with optional asm operands "compr" and "vm".
37-
class EXP_Real_ComprVM<bit done, string pseudo, int subtarget>
38-
: EXPCommon<0, done, "exp$tgt $src0, $src1, $src2, $src3"
39-
#!if(done, " done", "")#"$compr$vm">,
40+
class EXP_Real_ComprVM<string pseudo, int subtarget, EXP_Pseudo ps = !cast<EXP_Pseudo>(pseudo)>
41+
: EXPCommon<0, ps.done, "exp$tgt $src0, $src1, $src2, $src3"
42+
#!if(ps.done, " done", "")#"$compr$vm">,
4043
SIMCInstr<pseudo, subtarget> {
4144
let AsmMatchConverter = "cvtExp";
4245
}
4346

4447
// Real instruction with optional asm operand "row_en".
45-
class EXP_Real_Row<bit row, bit done, string pseudo, int subtarget, string name = "exp">
46-
: EXPCommon<row, done, name#"$tgt $src0, $src1, $src2, $src3"
47-
#!if(done, " done", "")#!if(row, " row_en", "")>,
48+
class EXP_Real_Row<string pseudo, int subtarget, string name = "exp", EXP_Pseudo ps = !cast<EXP_Pseudo>(pseudo)>
49+
: EXPCommon<ps.row, ps.done, name#"$tgt $src0, $src1, $src2, $src3"
50+
#!if(ps.done, " done", "")#!if(ps.row, " row_en", "")>,
4851
SIMCInstr<pseudo, subtarget> {
4952
let AsmMatchConverter = "cvtExp";
5053
}
@@ -63,82 +66,69 @@ def EXP_ROW_DONE : EXP_Pseudo<1, 1>;
6366
} // let SubtargetPredicate = isNotGFX90APlus
6467

6568
//===----------------------------------------------------------------------===//
66-
// SI
69+
// SI, VI, GFX10.
6770
//===----------------------------------------------------------------------===//
6871

69-
class EXP_Real_si<bit _done, string pseudo>
70-
: EXP_Real_ComprVM<_done, pseudo, SIEncodingFamily.SI>, EXPe_ComprVM {
71-
let AssemblerPredicate = isGFX6GFX7;
72-
let DecoderNamespace = "GFX6GFX7";
73-
let done = _done;
72+
multiclass EXP_Real_si {
73+
defvar ps = !cast<EXP_Pseudo>(NAME);
74+
def _si : EXP_Real_ComprVM<NAME, SIEncodingFamily.SI>, EXPe_ComprVM {
75+
let AssemblerPredicate = isGFX6GFX7;
76+
let DecoderNamespace = "GFX6GFX7";
77+
let done = ps.done;
78+
}
7479
}
7580

76-
def EXP_si : EXP_Real_si<0, "EXP">;
77-
def EXP_DONE_si : EXP_Real_si<1, "EXP_DONE">;
78-
79-
//===----------------------------------------------------------------------===//
80-
// VI
81-
//===----------------------------------------------------------------------===//
82-
83-
class EXP_Real_vi<bit _done, string pseudo>
84-
: EXP_Real_ComprVM<_done, pseudo, SIEncodingFamily.VI>, EXPe_vi {
85-
let AssemblerPredicate = isGFX8GFX9;
86-
let SubtargetPredicate = isNotGFX90APlus;
87-
let DecoderNamespace = "GFX8";
88-
let done = _done;
81+
multiclass EXP_Real_vi {
82+
defvar ps = !cast<EXP_Pseudo>(NAME);
83+
def _vi : EXP_Real_ComprVM<NAME, SIEncodingFamily.VI>, EXPe_vi {
84+
let AssemblerPredicate = isGFX8GFX9;
85+
let SubtargetPredicate = isNotGFX90APlus;
86+
let DecoderNamespace = "GFX8";
87+
let done = ps.done;
88+
}
8989
}
9090

91-
def EXP_vi : EXP_Real_vi<0, "EXP">;
92-
def EXP_DONE_vi : EXP_Real_vi<1, "EXP_DONE">;
93-
94-
//===----------------------------------------------------------------------===//
95-
// GFX10
96-
//===----------------------------------------------------------------------===//
97-
98-
class EXP_Real_gfx10<bit _done, string pseudo>
99-
: EXP_Real_ComprVM<_done, pseudo, SIEncodingFamily.GFX10>, EXPe_ComprVM {
100-
let AssemblerPredicate = isGFX10Only;
101-
let DecoderNamespace = "GFX10";
102-
let done = _done;
91+
multiclass EXP_Real_gfx10 {
92+
defvar ps = !cast<EXP_Pseudo>(NAME);
93+
def _gfx10 : EXP_Real_ComprVM<NAME, SIEncodingFamily.GFX10>, EXPe_ComprVM {
94+
let AssemblerPredicate = isGFX10Only;
95+
let DecoderNamespace = "GFX10";
96+
let done = ps.done;
97+
}
10398
}
10499

105-
def EXP_gfx10 : EXP_Real_gfx10<0, "EXP">;
106-
def EXP_DONE_gfx10 : EXP_Real_gfx10<1, "EXP_DONE">;
100+
defm EXP : EXP_Real_si, EXP_Real_vi, EXP_Real_gfx10;
101+
defm EXP_DONE : EXP_Real_si, EXP_Real_vi, EXP_Real_gfx10;
107102

108103
//===----------------------------------------------------------------------===//
109-
// GFX11
104+
// GFX11, GFX12.
110105
//===----------------------------------------------------------------------===//
111106

112-
class EXP_Real_gfx11<bit _row, bit _done, string pseudo>
113-
: EXP_Real_Row<_row, _done, pseudo, SIEncodingFamily.GFX11>, EXPe_Row {
114-
let AssemblerPredicate = isGFX11Only;
115-
let DecoderNamespace = "GFX11";
116-
let row = _row;
117-
let done = _done;
107+
multiclass EXP_Real_gfx11 {
108+
defvar ps = !cast<EXP_Pseudo>(NAME);
109+
def _gfx11 : EXP_Real_Row<NAME, SIEncodingFamily.GFX11>, EXPe_Row {
110+
let AssemblerPredicate = isGFX11Only;
111+
let DecoderNamespace = "GFX11";
112+
let row = ps.row;
113+
let done = ps.done;
114+
}
118115
}
119116

120-
def EXP_gfx11 : EXP_Real_gfx11<0, 0, "EXP">;
121-
def EXP_DONE_gfx11 : EXP_Real_gfx11<0, 1, "EXP_DONE">;
122-
def EXP_ROW_gfx11 : EXP_Real_gfx11<1, 0, "EXP_ROW">;
123-
def EXP_ROW_DONE_gfx11 : EXP_Real_gfx11<1, 1, "EXP_ROW_DONE">;
124-
125-
//===----------------------------------------------------------------------===//
126-
// GFX12+
127-
//===----------------------------------------------------------------------===//
128-
129-
class VEXPORT_Real_gfx12<bit _row, bit _done, string pseudo>
130-
: EXP_Real_Row<_row, _done, pseudo, SIEncodingFamily.GFX12, "export">,
117+
multiclass VEXPORT_Real_gfx12 {
118+
defvar ps = !cast<EXP_Pseudo>(NAME);
119+
def _gfx12 : EXP_Real_Row<NAME, SIEncodingFamily.GFX12, "export">,
131120
EXPe_Row, MnemonicAlias<"exp", "export">, Requires<[isGFX12Plus]> {
132-
let AssemblerPredicate = isGFX12Plus;
133-
let DecoderNamespace = "GFX12";
134-
let row = _row;
135-
let done = _done;
121+
let AssemblerPredicate = isGFX12Only;
122+
let DecoderNamespace = "GFX12";
123+
let row = ps.row;
124+
let done = ps.done;
125+
}
136126
}
137127

138-
def EXPORT_gfx12 : VEXPORT_Real_gfx12<0, 0, "EXP">;
139-
def EXPORT_DONE_gfx12 : VEXPORT_Real_gfx12<0, 1, "EXP_DONE">;
140-
def EXPORT_ROW_gfx12 : VEXPORT_Real_gfx12<1, 0, "EXP_ROW">;
141-
def EXPORT_ROW_DONE_gfx12 : VEXPORT_Real_gfx12<1, 1, "EXP_ROW_DONE">;
128+
defm EXP : EXP_Real_gfx11, VEXPORT_Real_gfx12;
129+
defm EXP_DONE : EXP_Real_gfx11, VEXPORT_Real_gfx12;
130+
defm EXP_ROW : EXP_Real_gfx11, VEXPORT_Real_gfx12;
131+
defm EXP_ROW_DONE : EXP_Real_gfx11, VEXPORT_Real_gfx12;
142132

143133
//===----------------------------------------------------------------------===//
144134
// EXP Patterns

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