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C++: fixups and file sync for SSA sharing
1 parent 1f69b31 commit 5d7d26b

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7 files changed

+66
-31
lines changed

7 files changed

+66
-31
lines changed

cpp/ql/src/semmle/code/cpp/ir/implementation/aliased_ssa/internal/AliasAnalysis.qll

Lines changed: 1 addition & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -329,9 +329,7 @@ predicate allocationEscapes(Configuration::Allocation allocation) {
329329
config.useSoundEscapeAnalysis() and resultEscapesNonReturn(allocation.getABaseInstruction())
330330
)
331331
or
332-
exists(Configuration::StageEscapeConfiguration config |
333-
config.useSoundEscapeAnalysis() and resultEscapesNonReturn(allocation.getABaseInstruction())
334-
)
332+
Configuration::phaseNeedsSoundEscapeAnalysis() and resultEscapesNonReturn(allocation.getABaseInstruction())
335333
}
336334

337335
/**

cpp/ql/src/semmle/code/cpp/ir/implementation/aliased_ssa/internal/AliasConfiguration.qll

Lines changed: 1 addition & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -143,8 +143,4 @@ class DynamicAllocation extends Allocation, TDynamicAllocation {
143143
final override predicate alwaysEscapes() { none() }
144144
}
145145

146-
class StageEscapeConfiguration extends string {
147-
StageEscapeConfiguration() { this = "StageEscapeConfiguration (aliased_ssa)" }
148-
149-
predicate useSoundEscapeAnalysis() { none() }
150-
}
146+
predicate phaseNeedsSoundEscapeAnalysis() { none() }

cpp/ql/src/semmle/code/cpp/ir/implementation/aliased_ssa/internal/AliasedSSA.qll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -133,7 +133,7 @@ abstract class MemoryLocation extends TMemoryLocation {
133133
*/
134134
predicate isAlwaysAllocatedOnStack() { none() }
135135

136-
final predicate canReuseSSA() { any() }
136+
final predicate canReuseSSA() { none() }
137137
}
138138

139139
/**

cpp/ql/src/semmle/code/cpp/ir/implementation/aliased_ssa/internal/SSAConstruction.qll

Lines changed: 13 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -60,8 +60,19 @@ private module Cached {
6060
predicate hasInstruction(TStageInstruction instr) {
6161
instr instanceof TRawInstruction and instr instanceof OldInstruction
6262
or
63-
instr instanceof TPhiInstruction and
64-
not exists(getDegeneratePhiOperand(instr))
63+
instr = phiInstruction(_, _)
64+
or
65+
instr = reusedPhiInstruction(_) and
66+
// Check that the phi instruction is *not* degenerate, but we can't use
67+
// getDegeneratePhiOperand in the first stage with phi instyructions
68+
exists(OldIR::PhiInputOperand operand1, OldIR::PhiInputOperand operand2, OldInstruction oldInstruction |
69+
oldInstruction = instr and
70+
operand1 = oldInstruction.(OldIR::PhiInstruction).getAnInputOperand() and
71+
operand1.getPredecessorBlock() instanceof OldBlock and
72+
operand2 = oldInstruction.(OldIR::PhiInstruction).getAnInputOperand() and
73+
operand2.getPredecessorBlock() instanceof OldBlock and
74+
operand1 != operand2
75+
)
6576
or
6677
instr instanceof TChiInstruction
6778
or

cpp/ql/src/semmle/code/cpp/ir/implementation/unaliased_ssa/internal/AliasAnalysis.qll

Lines changed: 1 addition & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -329,9 +329,7 @@ predicate allocationEscapes(Configuration::Allocation allocation) {
329329
config.useSoundEscapeAnalysis() and resultEscapesNonReturn(allocation.getABaseInstruction())
330330
)
331331
or
332-
exists(Configuration::StageEscapeConfiguration config |
333-
config.useSoundEscapeAnalysis() and resultEscapesNonReturn(allocation.getABaseInstruction())
334-
)
332+
Configuration::phaseNeedsSoundEscapeAnalysis() and resultEscapesNonReturn(allocation.getABaseInstruction())
335333
}
336334

337335
/**

cpp/ql/src/semmle/code/cpp/ir/implementation/unaliased_ssa/internal/AliasConfiguration.qll

Lines changed: 1 addition & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -15,8 +15,4 @@ class Allocation extends IRAutomaticVariable {
1515
}
1616
}
1717

18-
class StageEscapeConfiguration extends string {
19-
StageEscapeConfiguration() { this = "StageEscapeConfiguration (unaliased_ssa)" }
20-
21-
predicate useSoundEscapeAnalysis() { any() }
22-
}
18+
predicate phaseNeedsSoundEscapeAnalysis() { any() }

cpp/ql/src/semmle/code/cpp/ir/implementation/unaliased_ssa/internal/SSAConstruction.qll

Lines changed: 48 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -43,19 +43,58 @@ private module Cached {
4343
class TStageInstruction =
4444
TRawInstruction or TPhiInstruction or TChiInstruction or TUnreachedInstruction;
4545

46+
/**
47+
* If `oldInstruction` is a `Phi` instruction that has exactly one reachable predecessor block,
48+
* this predicate returns the `PhiInputOperand` corresponding to that predecessor block.
49+
* Otherwise, this predicate does not hold.
50+
*/
51+
private OldIR::PhiInputOperand getDegeneratePhiOperand(OldInstruction oldInstruction) {
52+
result =
53+
unique(OldIR::PhiInputOperand operand |
54+
operand = oldInstruction.(OldIR::PhiInstruction).getAnInputOperand() and
55+
operand.getPredecessorBlock() instanceof OldBlock
56+
)
57+
}
58+
4659
cached
4760
predicate hasInstruction(TStageInstruction instr) {
4861
instr instanceof TRawInstruction and instr instanceof OldInstruction
4962
or
50-
instr instanceof TPhiInstruction
63+
instr = phiInstruction(_, _)
64+
or
65+
instr = reusedPhiInstruction(_) and
66+
// Check that the phi instruction is *not* degenerate, but we can't use
67+
// getDegeneratePhiOperand in the first stage with phi instyructions
68+
exists(OldIR::PhiInputOperand operand1, OldIR::PhiInputOperand operand2, OldInstruction oldInstruction |
69+
oldInstruction = instr and
70+
operand1 = oldInstruction.(OldIR::PhiInstruction).getAnInputOperand() and
71+
operand1.getPredecessorBlock() instanceof OldBlock and
72+
operand2 = oldInstruction.(OldIR::PhiInstruction).getAnInputOperand() and
73+
operand2.getPredecessorBlock() instanceof OldBlock and
74+
operand1 != operand2
75+
)
5176
or
5277
instr instanceof TChiInstruction
5378
or
5479
instr instanceof TUnreachedInstruction
5580
}
5681

57-
private IRBlock getNewBlock(OldBlock oldBlock) {
58-
result.getFirstInstruction() = getNewInstruction(oldBlock.getFirstInstruction())
82+
cached IRBlock getNewBlock(OldBlock oldBlock) {
83+
exists(Instruction newEnd, OldIR::Instruction oldEnd |
84+
(
85+
result.getLastInstruction() = newEnd and
86+
not newEnd instanceof ChiInstruction
87+
or
88+
newEnd = result.getLastInstruction().(ChiInstruction).getAPredecessor() // does this work?
89+
) and
90+
(
91+
oldBlock.getLastInstruction() = oldEnd and
92+
not oldEnd instanceof OldIR::ChiInstruction
93+
or
94+
oldEnd = oldBlock.getLastInstruction().(OldIR::ChiInstruction).getAPredecessor() // does this work?
95+
) and
96+
oldEnd = getNewInstruction(newEnd)
97+
)
5998
}
6099

61100
/**
@@ -150,16 +189,13 @@ private module Cached {
150189
(
151190
result = getNewInstruction(oldOperand.getAnyDef()) and
152191
overlap = originalOverlap
153-
/*
154-
* or
155-
* exists(OldIR::PhiInputOperand phiOperand, Overlap phiOperandOverlap |
156-
* phiOperand = getDegeneratePhiOperand(oldOperand.getAnyDef()) and
157-
* result = getNewDefinitionFromOldSSA(phiOperand, phiOperandOverlap) and
158-
* overlap = combineOverlap(phiOperandOverlap, originalOverlap)
159-
* )
160-
*/
161-
192+
or
193+
exists(OldIR::PhiInputOperand phiOperand, Overlap phiOperandOverlap |
194+
phiOperand = getDegeneratePhiOperand(oldOperand.getAnyDef()) and
195+
result = getNewDefinitionFromOldSSA(phiOperand, phiOperandOverlap) and
196+
overlap = combineOverlap(phiOperandOverlap, originalOverlap)
162197
)
198+
)
163199
)
164200
}
165201

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