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1 parent be73fe9 commit 30c606cCopy full SHA for 30c606c
examples/snakepu/design.txt
@@ -16,7 +16,7 @@ snakePU MAIN REGISTERS:
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IR - Instruction register
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-- data
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- AR - Argument register - second byte of opcode (64bit)
+ AR - Argument register - second byte of opcode (32bit)
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INSTRUCTION PHASES:
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1. Fetch opcode -> IR, AR
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