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[TargetRegisterInfo][ARM] Use MCRegister in isInlineAsmReadOnlyReg interface. NFC (llvm#130149)
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3 files changed

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-4
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3 files changed

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llvm/include/llvm/CodeGen/TargetRegisterInfo.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -593,7 +593,7 @@ class TargetRegisterInfo : public MCRegisterInfo {
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/// Returns true if PhysReg cannot be written to in inline asm statements.
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virtual bool isInlineAsmReadOnlyReg(const MachineFunction &MF,
596-
unsigned PhysReg) const {
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MCRegister PhysReg) const {
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return false;
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}
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llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -245,7 +245,7 @@ isAsmClobberable(const MachineFunction &MF, MCRegister PhysReg) const {
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}
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bool ARMBaseRegisterInfo::isInlineAsmReadOnlyReg(const MachineFunction &MF,
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unsigned PhysReg) const {
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MCRegister PhysReg) const {
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const ARMSubtarget &STI = MF.getSubtarget<ARMSubtarget>();
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const ARMFrameLowering *TFI = getFrameLowering(MF);
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@@ -256,7 +256,7 @@ bool ARMBaseRegisterInfo::isInlineAsmReadOnlyReg(const MachineFunction &MF,
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if (hasBasePointer(MF))
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markSuperRegs(Reserved, BasePtr);
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assert(checkAllSuperRegsMarked(Reserved));
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return Reserved.test(PhysReg);
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return Reserved.test(PhysReg.id());
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}
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const TargetRegisterClass *

llvm/lib/Target/ARM/ARMBaseRegisterInfo.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -88,7 +88,7 @@ class ARMBaseRegisterInfo : public ARMGenRegisterInfo {
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bool isAsmClobberable(const MachineFunction &MF,
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MCRegister PhysReg) const override;
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bool isInlineAsmReadOnlyReg(const MachineFunction &MF,
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unsigned PhysReg) const override;
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MCRegister PhysReg) const override;
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const TargetRegisterClass *
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getPointerRegClass(const MachineFunction &MF,

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