AMDGPU: Create InstrMapping from VGPR MFMA to equivalent AGPR instruction (llvm#117102)

arsenm · jrbyrnes · commit c48e51dd7988 · 2025-06-24T14:18:19.000-07:00
This provides infrastructure for a future optimization.

Change-Id: Ia4f968b1a93088046d4e5b2ef204d5a1cd743476
diff --git a/llvm/lib/Target/AMDGPU/VOP3PInstructions.td b/llvm/lib/Target/AMDGPU/VOP3PInstructions.td
@@ -890,7 +890,7 @@ multiclass MAIInst<string OpName, string P, SDPatternOperator node = null_frag,
         let OtherPredicates = [isGFX90APlus] in
         def _mac_vgprcd_e64 : MAIInst<OpName # "_mac_vgprcd", !cast<VOPProfileMAI>("VOPProfileMAI_" # P # "_VCD"),
                                       !if(!eq(node, null_frag), null_frag, VgprMAIFrag<node, HasAbid, Scaled>), Scaled>,
-                              MFMATable<1, "VGPR", NAME # "_vgprcd_e64", NAME # "_mac_e64">;
+                              MFMATable<1, "VGPR", NAME # "_vgprcd_e64">;
       }
     }
   } // End isConvergent = 1, mayRaiseFPException = 0, ReadsModeReg = 1

Original file line number	Diff line number	Diff line change
`@@ -890,7 +890,7 @@ multiclass MAIInst<string OpName, string P, SDPatternOperator node = null_frag,`
`890`	`890`	`let OtherPredicates = [isGFX90APlus] in`
`891`	`891`	`def _mac_vgprcd_e64 : MAIInst<OpName # "_mac_vgprcd", !cast<VOPProfileMAI>("VOPProfileMAI_" # P # "_VCD"),`
`892`	`892`	`!if(!eq(node, null_frag), null_frag, VgprMAIFrag<node, HasAbid, Scaled>), Scaled>,`
`893`		`- MFMATable<1, "VGPR", NAME # "_vgprcd_e64", NAME # "_mac_e64">;`
	`893`	`+ MFMATable<1, "VGPR", NAME # "_vgprcd_e64">;`
`894`	`894`	`}`
`895`	`895`	`}`
`896`	`896`	`} // End isConvergent = 1, mayRaiseFPException = 0, ReadsModeReg = 1`