[nrf noup] tree-wide: support NCS Partition Manager (PM) definitions

Partition Manager (PM) is a component of the nRF Connect SDK (NCS)
which uses yaml files to resolve flash partition placement with a
holistic view of the entire device, including each firmware image
present on the flash device, and various subsystems, such as settings
and NFFS.

When this NCS extension is used, various source files which would use
partition information from devicetree in "vanilla" zephyr instead use
defines generated by PM instead.

This commit removes support for HEX_FILES_TO_MERGE, as it conflicts
with PM.

The settings subsystem pm.yml defines a partition 'settings_storage'.
The nffs subsystem pm.yml defines 'nffs_storage'.

Leverage label translation to avoid patching partition names.

Refer to the NCS documentation page for this feature for more details.

This is a long-running out of tree patch which has been worked on by
several people. The following sign-offs are in alphabetical order by
first name.

Signed-off-by: Andrzej Głąbek <[email protected]>
Signed-off-by: Andrzej Puzdrowski <[email protected]>
Signed-off-by: Håkon Øye Amundsen <[email protected]>
Signed-off-by: Ioannis Glaropoulos <[email protected]>
Signed-off-by: Joakim Andersson <[email protected]>
Signed-off-by: Johann Fischer <[email protected]>
Signed-off-by: Martí Bolívar <[email protected]>
Signed-off-by: Ole Sæther <[email protected]>
Signed-off-by: Robert Lubos <[email protected]>
Signed-off-by: Sebastian Bøe <[email protected]>
Signed-off-by: Sigvart Hovland <[email protected]>
Signed-off-by: Thomas Stenersen <[email protected]>
Signed-off-by: Torsten Rasmussen <[email protected]>
Signed-off-by: Øyvind Rønningstad <[email protected]>
Signed-off-by: Trond Einar Snekvik <[email protected]>
Signed-off-by: Gerard Marull-Paretas <[email protected]>
Signed-off-by: Tomasz Moń <[email protected]>
Signed-off-by: Dominik Ermel <[email protected]>
Signed-off-by: Jamie McCrae <[email protected]>
(cherry picked from commit 5c2eecf)

Author: sigvartmh

arch/arm/core/mpu/arm_mpu_regions.c

@@ -8,6 +8,9 @@
 #include <zephyr/arch/arm/mpu/arm_mpu.h>
 
 #include <zephyr/arch/arm/cortex_m/arm_mpu_mem_cfg.h>
+#if USE_PARTITION_MANAGER
+#include <pm_config.h>
+#endif
 
 static const struct arm_mpu_region mpu_regions[] = {
 #ifdef CONFIG_XIP
@@ -24,13 +27,23 @@ static const struct arm_mpu_region mpu_regions[] = {
 
 	/* Region 1 */
 	MPU_REGION_ENTRY("SRAM_0",
+#if USE_PARTITION_MANAGER
+			 PM_SRAM_ADDRESS,
+#if defined(CONFIG_ARMV8_M_BASELINE) || defined(CONFIG_ARMV8_M_MAINLINE)
+			 REGION_RAM_ATTR(PM_SRAM_ADDRESS, PM_SRAM_SIZE)),
+#else
+			 REGION_RAM_ATTR(REGION_SRAM_SIZE)),
+#endif
+#else
 			 CONFIG_SRAM_BASE_ADDRESS,
 #if defined(CONFIG_ARMV8_M_BASELINE) || defined(CONFIG_ARMV8_M_MAINLINE)
 			 REGION_RAM_ATTR(CONFIG_SRAM_BASE_ADDRESS, \
 				 CONFIG_SRAM_SIZE * 1024)),
 #else
 			 REGION_RAM_ATTR(REGION_SRAM_SIZE)),
 #endif
+
+#endif /* USE_PARTITION_MANAGER */
 };
 
 const struct arm_mpu_config mpu_config = {

cmake/linker/ld/target.cmake

@@ -80,6 +80,7 @@ macro(configure_linker_script linker_script_gen linker_pass_define)
       ${current_includes}
       ${soc_linker_script_includes}
       ${template_script_defines}
+      -DUSE_PARTITION_MANAGER=$<BOOL:${CONFIG_PARTITION_MANAGER_ENABLED}>
       -E ${LINKER_SCRIPT}
       -P # Prevent generation of debug `#line' directives.
       -o ${linker_script_gen}

cmake/linker/lld/target.cmake

@@ -52,6 +52,7 @@ macro(configure_linker_script linker_script_gen linker_pass_define)
     -imacros ${AUTOCONF_H}
     ${current_includes}
     ${template_script_defines}
+    -DUSE_PARTITION_MANAGER=$<BOOL:${CONFIG_PARTITION_MANAGER_ENABLED}>
     -E ${LINKER_SCRIPT}
     -P # Prevent generation of debug `#line' directives.
     -o ${linker_script_gen}

cmake/modules/kernel.cmake

@@ -256,3 +256,7 @@ if("${CMAKE_EXTRA_GENERATOR}" STREQUAL "Eclipse CDT4")
   include(${ZEPHYR_BASE}/cmake/ide/eclipse_cdt4_generator_amendment.cmake)
   eclipse_cdt4_generator_amendment(1)
 endif()
+
+if(ZEPHYR_NRF_MODULE_DIR)
+  include(${ZEPHYR_NRF_MODULE_DIR}/cmake/partition_manager.cmake)
+endif()

drivers/flash/soc_flash_nrf.c

@@ -37,6 +37,11 @@ LOG_MODULE_REGISTER(flash_nrf);
 
 #define SOC_NV_FLASH_NODE DT_INST(0, soc_nv_flash)
 
+#if CONFIG_TRUSTED_EXECUTION_NONSECURE && USE_PARTITION_MANAGER
+#include <soc_secure.h>
+#include <pm_config.h>
+#endif /* CONFIG_TRUSTED_EXECUTION_NONSECURE && USE_PARTITION_MANAGER */
+
 #ifndef CONFIG_SOC_FLASH_NRF_RADIO_SYNC_NONE
 #define FLASH_SLOT_WRITE     7500
 #if defined(CONFIG_SOC_FLASH_NRF_PARTIAL_ERASE)
@@ -166,6 +171,12 @@ static int flash_nrf_read(const struct device *dev, off_t addr,
 	}
 #endif
 
+#if CONFIG_TRUSTED_EXECUTION_NONSECURE && USE_PARTITION_MANAGER && PM_APP_ADDRESS
+	if (addr < PM_APP_ADDRESS) {
+		return soc_secure_mem_read(data, (void *)addr, len);
+	}
+#endif
+
 	nrf_nvmc_buffer_read(data, (uint32_t)addr, len);
 
 	return 0;

drivers/flash/soc_flash_nrf_rram.c

@@ -54,6 +54,11 @@ LOG_MODULE_REGISTER(flash_nrf_rram, CONFIG_FLASH_LOG_LEVEL);
 #define WRITE_BLOCK_SIZE_FROM_DT DT_PROP(RRAM, write_block_size)
 #define ERASE_VALUE              0xFF
 
+#if CONFIG_TRUSTED_EXECUTION_NONSECURE && USE_PARTITION_MANAGER
+#include <soc_secure.h>
+#include <pm_config.h>
+#endif /* CONFIG_TRUSTED_EXECUTION_NONSECURE && USE_PARTITION_MANAGER */
+
 #ifdef CONFIG_MULTITHREADING
 static struct k_sem sem_lock;
 #define SYNC_INIT()   k_sem_init(&sem_lock, 1, 1)
@@ -279,6 +284,12 @@ static int nrf_rram_read(const struct device *dev, off_t addr, void *data, size_
 	}
 	addr += RRAM_START;
 
+#if CONFIG_TRUSTED_EXECUTION_NONSECURE && USE_PARTITION_MANAGER && PM_APP_ADDRESS
+	if (addr < PM_APP_ADDRESS) {
+		return soc_secure_mem_read(data, (void *)addr, len);
+	}
+#endif
+
 	memcpy(data, (void *)addr, len);
 
 	return 0;

include/zephyr/arch/arm/cortex_m/scripts/linker.ld

@@ -34,6 +34,39 @@
 #define ROMSTART_REGION ROMABLE_REGION
 #endif
 
+#if USE_PARTITION_MANAGER
+
+#include <pm_config.h>
+
+#if CONFIG_NCS_IS_VARIANT_IMAGE && defined(PM_S0_ID)
+/* We are linking against S1, create symbol containing the flash ID of S0.
+ * This is used when writing code operating on the "other" slot.
+ */
+_image_1_primary_slot_id = PM_S0_ID;
+
+#else /* ! CONFIG_NCS_IS_VARIANT_IMAGE */
+
+#ifdef PM_S1_ID
+/* We are linking against S0, create symbol containing the flash ID of S1.
+ * This is used when writing code operating on the "other" slot.
+ */
+_image_1_primary_slot_id = PM_S1_ID;
+#endif /* PM_S1_ID */
+
+#endif /* CONFIG_NCS_IS_VARIANT_IMAGE */
+
+#define ROM_ADDR PM_ADDRESS
+#define ROM_SIZE PM_SIZE
+
+#if defined(CONFIG_PM_USE_CONFIG_SRAM_SIZE)
+#define RAM_SIZE CONFIG_PM_SRAM_SIZE
+#else
+#define RAM_SIZE PM_SRAM_SIZE
+#endif
+#define RAM_ADDR PM_SRAM_ADDRESS
+
+#else /* ! USE_PARTITION_MANAGER */
+
 #if !defined(CONFIG_XIP) && (CONFIG_FLASH_SIZE == 0)
 #define ROM_ADDR RAM_ADDR
 #else
@@ -55,6 +88,23 @@
 #define RAM_SIZE (CONFIG_SRAM_SIZE * 1K)
 #define RAM_ADDR CONFIG_SRAM_BASE_ADDRESS
 
+#endif /* USE_PARTITION_MANAGER */
+
+#if DT_NODE_HAS_STATUS(DT_CHOSEN(zephyr_ccm), okay)
+#define CCM_SIZE DT_REG_SIZE(DT_CHOSEN(zephyr_ccm))
+#define CCM_ADDR DT_REG_ADDR(DT_CHOSEN(zephyr_ccm))
+#endif
+
+#if DT_NODE_HAS_STATUS(DT_CHOSEN(zephyr_itcm), okay)
+#define ITCM_SIZE DT_REG_SIZE(DT_CHOSEN(zephyr_itcm))
+#define ITCM_ADDR DT_REG_ADDR(DT_CHOSEN(zephyr_itcm))
+#endif
+
+#if DT_NODE_HAS_STATUS(DT_CHOSEN(zephyr_dtcm), okay)
+#define DTCM_SIZE DT_REG_SIZE(DT_CHOSEN(zephyr_dtcm))
+#define DTCM_ADDR DT_REG_ADDR(DT_CHOSEN(zephyr_dtcm))
+#endif
+
 #if defined(CONFIG_CUSTOM_SECTION_ALIGN)
 _region_min_align = CONFIG_CUSTOM_SECTION_MIN_ALIGN_SIZE;
 #else

include/zephyr/storage/flash_map.h

@@ -348,6 +348,10 @@ const char *flash_area_label(const struct flash_area *fa);
  */
 uint8_t flash_area_erased_val(const struct flash_area *fa);
 
+#if USE_PARTITION_MANAGER
+#include <flash_map_pm.h>
+#else
+
 /**
  * Returns non-0 value if fixed-partition of given DTS node label exists.
  *
@@ -469,6 +473,8 @@ DT_FOREACH_STATUS_OKAY(fixed_partitions, FOR_EACH_PARTITION_TABLE)
 #undef FOR_EACH_PARTITION_TABLE
 /** @endcond */
 
+#endif /* USE_PARTITION_MANAGER */
+
 #ifdef __cplusplus
 }
 #endif

lib/heap/Kconfig

@@ -81,7 +81,7 @@ config HEAP_LISTENER
 choice
 	prompt "Supported heap sizes"
 	depends on !64BIT
-	default SYS_HEAP_SMALL_ONLY if (SRAM_SIZE <= 256)
+	default SYS_HEAP_SMALL_ONLY if (SRAM_SIZE <= 256) && !PARTITION_MANAGER_ENABLED
 	default SYS_HEAP_AUTO
 	help
 	  Heaps using reduced-size chunk headers can accommodate so called

lib/libc/common/source/stdlib/malloc.c

@@ -25,6 +25,20 @@
 #include <zephyr/logging/log.h>
 LOG_MODULE_DECLARE(os, CONFIG_KERNEL_LOG_LEVEL);
 
+#if USE_PARTITION_MANAGER
+
+#include <pm_config.h>
+
+#define RAM_SIZE PM_SRAM_SIZE
+#define RAM_ADDR PM_SRAM_ADDRESS
+
+#else /* ! USE_PARTITION_MANAGER */
+
+#define RAM_SIZE (KB((size_t) CONFIG_SRAM_SIZE))
+#define RAM_ADDR CONFIG_SRAM_BASE_ADDRESS
+
+#endif /* USE_PARTITION_MANAGER */
+
 #ifdef CONFIG_COMMON_LIBC_MALLOC
 
 #if (CONFIG_COMMON_LIBC_MALLOC_ARENA_SIZE != 0)
@@ -106,8 +120,8 @@ static POOL_SECTION unsigned char __aligned(HEAP_ALIGN) malloc_arena[HEAP_SIZE];
 extern char _heap_sentry[];
 #    define HEAP_SIZE  ROUND_DOWN((POINTER_TO_UINT(_heap_sentry) - HEAP_BASE), HEAP_ALIGN)
 #   else
-#    define HEAP_SIZE	ROUND_DOWN((KB((size_t) CONFIG_SRAM_SIZE) -	\
-		((size_t) HEAP_BASE - (size_t) CONFIG_SRAM_BASE_ADDRESS)), HEAP_ALIGN)
+#    define HEAP_SIZE	ROUND_DOWN((RAM_SIZE -	\
+		((size_t) HEAP_BASE - (size_t) RAM_ADDR)), HEAP_ALIGN)
 #   endif /* else CONFIG_XTENSA */
 
 #  endif /* else CONFIG_COMMON_LIBC_MALLOC_ARENA_SIZE > 0 */