[nrf noup] soc: arm: nRF53: Add SPU Flash/RAM alignment

TF-M will uses SPU alignment during build time to make sure all
partitions can be locked down with the SPU.

So adding them for nRF53

Signed-off-by: Markus Swarowsky <[email protected]>
(cherry picked from commit bc60d5c)

Author: mswarowsky

soc/nordic/nrf53/Kconfig

@@ -167,12 +167,26 @@ config NRF_SPU_FLASH_REGION_SIZE
 	help
 	  FLASH region size for the NRF_SPU peripheral
 
+config NRF_SPU_FLASH_REGION_ALIGNMENT
+	hex
+	default 0x4000
+	help
+	  FLASH regions must be aligned to this value due to SPU HW
+	  limitations.
+
 config NRF_SPU_RAM_REGION_SIZE
 	hex
 	default 0x2000
 	help
 	  RAM region size for the NRF_SPU peripheral
 
+config NRF_SPU_RAM_REGION_ALIGNMENT
+	hex
+	default 0x2000
+	help
+	  RAM regions must be aligned to this value due to SPU HW
+	  limitations.
+
 config SOC_NRF_GPIO_FORWARDER_FOR_NRF5340
 	bool "Forward GPIO pins to network core"
 	depends on NRF_SOC_SECURE_SUPPORTED