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[LV] Add more tests for argmin finding the first index.
Add more test coverage for supporting argmin/argmax with strict predicates, in preparation for follow up to 99addbf.
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‎llvm/test/Transforms/LoopVectorize/select-smin-first-index.ll‎

Lines changed: 218 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,218 @@
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-globals none --version 5
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; RUN: opt -passes=loop-vectorize -force-vector-width=4 -force-vector-interleave=1 -S %s | FileCheck %s
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; Test cases for selecting the first index with the minimum value.
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define i64 @test_vectorize_select_smin_first_idx(ptr %src, i64 %n) {
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; CHECK-LABEL: define i64 @test_vectorize_select_smin_first_idx(
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; CHECK-SAME: ptr [[SRC:%.*]], i64 [[N:%.*]]) {
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; CHECK-NEXT: [[ENTRY:.*]]:
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; CHECK-NEXT: br label %[[LOOP:.*]]
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; CHECK: [[LOOP]]:
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; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]
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; CHECK-NEXT: [[MIN_IDX:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[MIN_IDX_NEXT:%.*]], %[[LOOP]] ]
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; CHECK-NEXT: [[MIN_VAL:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[MIN_VAL_NEXT:%.*]], %[[LOOP]] ]
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; CHECK-NEXT: [[GEP:%.*]] = getelementptr i64, ptr [[SRC]], i64 [[IV]]
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; CHECK-NEXT: [[L:%.*]] = load i64, ptr [[GEP]], align 4
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; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i64 [[MIN_VAL]], [[L]]
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; CHECK-NEXT: [[MIN_VAL_NEXT]] = tail call i64 @llvm.smin.i64(i64 [[MIN_VAL]], i64 [[L]])
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; CHECK-NEXT: [[MIN_IDX_NEXT]] = select i1 [[CMP]], i64 [[IV]], i64 [[MIN_IDX]]
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; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1
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; CHECK-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[IV_NEXT]], [[N]]
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; CHECK-NEXT: br i1 [[EXITCOND_NOT]], label %[[EXIT:.*]], label %[[LOOP]]
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; CHECK: [[EXIT]]:
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; CHECK-NEXT: [[RES:%.*]] = phi i64 [ [[MIN_IDX_NEXT]], %[[LOOP]] ]
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; CHECK-NEXT: ret i64 [[RES]]
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;
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entry:
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br label %loop
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loop:
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%iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
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%min.idx = phi i64 [ 0, %entry ], [ %min.idx.next, %loop ]
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%min.val = phi i64 [ 0, %entry ], [ %min.val.next, %loop ]
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%gep = getelementptr i64, ptr %src, i64 %iv
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%l = load i64, ptr %gep
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%cmp = icmp sgt i64 %min.val, %l
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%min.val.next = tail call i64 @llvm.smin.i64(i64 %min.val, i64 %l)
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%min.idx.next = select i1 %cmp, i64 %iv, i64 %min.idx
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%iv.next = add nuw nsw i64 %iv, 1
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%exitcond.not = icmp eq i64 %iv.next, %n
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br i1 %exitcond.not, label %exit, label %loop
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exit:
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%res = phi i64 [ %min.idx.next, %loop ]
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ret i64 %res
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}
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define i64 @test_vectorize_select_smin_first_idx_signed_sentinel_possible(ptr %src, i64 %n) {
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; CHECK-LABEL: define i64 @test_vectorize_select_smin_first_idx_signed_sentinel_possible(
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; CHECK-SAME: ptr [[SRC:%.*]], i64 [[N:%.*]]) {
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; CHECK-NEXT: [[ENTRY:.*]]:
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; CHECK-NEXT: br label %[[LOOP:.*]]
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; CHECK: [[LOOP]]:
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; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[INDEX_NEXT:%.*]], %[[LOOP]] ]
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; CHECK-NEXT: [[MIN_IDX:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[MIN_IDX_NEXT:%.*]], %[[LOOP]] ]
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; CHECK-NEXT: [[MIN_VAL:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[MIN_VAL_NEXT:%.*]], %[[LOOP]] ]
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; CHECK-NEXT: [[TMP0:%.*]] = getelementptr i64, ptr [[SRC]], i64 [[INDEX]]
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; CHECK-NEXT: [[L:%.*]] = load i64, ptr [[TMP0]], align 4
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; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i64 [[MIN_VAL]], [[L]]
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; CHECK-NEXT: [[MIN_VAL_NEXT]] = tail call i64 @llvm.smin.i64(i64 [[MIN_VAL]], i64 [[L]])
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; CHECK-NEXT: [[MIN_IDX_NEXT]] = select i1 [[CMP]], i64 [[INDEX]], i64 [[MIN_IDX]]
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; CHECK-NEXT: [[INDEX_NEXT]] = add nuw nsw i64 [[INDEX]], 1
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; CHECK-NEXT: [[TMP4:%.*]] = icmp eq i64 [[INDEX_NEXT]], 100
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; CHECK-NEXT: br i1 [[TMP4]], label %[[EXIT:.*]], label %[[LOOP]]
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; CHECK: [[EXIT]]:
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; CHECK-NEXT: [[RDX_SELECT:%.*]] = phi i64 [ [[MIN_IDX_NEXT]], %[[LOOP]] ]
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; CHECK-NEXT: ret i64 [[RDX_SELECT]]
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;
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entry:
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br label %loop
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loop:
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%iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
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%min.idx = phi i64 [ 0, %entry ], [ %min.idx.next, %loop ]
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%min.val = phi i64 [ 0, %entry ], [ %min.val.next, %loop ]
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%gep = getelementptr i64, ptr %src, i64 %iv
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%l = load i64, ptr %gep
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%cmp = icmp sgt i64 %min.val, %l
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%min.val.next = tail call i64 @llvm.smin.i64(i64 %min.val, i64 %l)
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%min.idx.next = select i1 %cmp, i64 %iv, i64 %min.idx
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%iv.next = add nuw nsw i64 %iv, 1
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%exitcond.not = icmp eq i64 %iv.next, 100
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br i1 %exitcond.not, label %exit, label %loop
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exit:
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%res = phi i64 [ %min.idx.next, %loop ]
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ret i64 %res
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}
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define i64 @test_vectorize_select_smin_first_idx_cond_flipped(ptr %src, i64 %n) {
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; CHECK-LABEL: define i64 @test_vectorize_select_smin_first_idx_cond_flipped(
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; CHECK-SAME: ptr [[SRC:%.*]], i64 [[N:%.*]]) {
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; CHECK-NEXT: [[ENTRY:.*]]:
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; CHECK-NEXT: br label %[[LOOP:.*]]
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; CHECK: [[LOOP]]:
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; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]
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; CHECK-NEXT: [[MIN_IDX:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[MIN_IDX_NEXT:%.*]], %[[LOOP]] ]
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; CHECK-NEXT: [[MIN_VAL:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[MIN_VAL_NEXT:%.*]], %[[LOOP]] ]
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; CHECK-NEXT: [[GEP:%.*]] = getelementptr i64, ptr [[SRC]], i64 [[IV]]
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; CHECK-NEXT: [[L:%.*]] = load i64, ptr [[GEP]], align 4
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; CHECK-NEXT: [[CMP:%.*]] = icmp slt i64 [[L]], [[MIN_VAL]]
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; CHECK-NEXT: [[MIN_VAL_NEXT]] = tail call i64 @llvm.smin.i64(i64 [[MIN_VAL]], i64 [[L]])
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; CHECK-NEXT: [[MIN_IDX_NEXT]] = select i1 [[CMP]], i64 [[IV]], i64 [[MIN_IDX]]
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; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1
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; CHECK-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[IV_NEXT]], [[N]]
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; CHECK-NEXT: br i1 [[EXITCOND_NOT]], label %[[EXIT:.*]], label %[[LOOP]]
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; CHECK: [[EXIT]]:
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; CHECK-NEXT: [[RES:%.*]] = phi i64 [ [[MIN_IDX_NEXT]], %[[LOOP]] ]
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; CHECK-NEXT: ret i64 [[RES]]
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;
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entry:
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br label %loop
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loop:
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%iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
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%min.idx = phi i64 [ 0, %entry ], [ %min.idx.next, %loop ]
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%min.val = phi i64 [ 0, %entry ], [ %min.val.next, %loop ]
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%gep = getelementptr i64, ptr %src, i64 %iv
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%l = load i64, ptr %gep
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%cmp = icmp slt i64 %l, %min.val
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%min.val.next = tail call i64 @llvm.smin.i64(i64 %min.val, i64 %l)
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%min.idx.next = select i1 %cmp, i64 %iv, i64 %min.idx
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%iv.next = add nuw nsw i64 %iv, 1
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%exitcond.not = icmp eq i64 %iv.next, %n
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br i1 %exitcond.not, label %exit, label %loop
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exit:
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%res = phi i64 [ %min.idx.next, %loop ]
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ret i64 %res
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}
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define i32 @test_vectorize_select_smin_first_idx_trunc_may_match_sentinel(ptr %src, i64 %n) {
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; CHECK-LABEL: define i32 @test_vectorize_select_smin_first_idx_trunc_may_match_sentinel(
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; CHECK-SAME: ptr [[SRC:%.*]], i64 [[N:%.*]]) {
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; CHECK-NEXT: [[ENTRY:.*]]:
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; CHECK-NEXT: br label %[[LOOP:.*]]
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; CHECK: [[LOOP]]:
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; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]
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; CHECK-NEXT: [[MIN_IDX:%.*]] = phi i32 [ 0, %[[ENTRY]] ], [ [[MIN_IDX_NEXT:%.*]], %[[LOOP]] ]
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; CHECK-NEXT: [[MIN_VAL:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[MIN_VAL_NEXT:%.*]], %[[LOOP]] ]
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; CHECK-NEXT: [[GEP:%.*]] = getelementptr i64, ptr [[SRC]], i64 [[IV]]
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; CHECK-NEXT: [[L:%.*]] = load i64, ptr [[GEP]], align 4
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; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i64 [[MIN_VAL]], [[L]]
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; CHECK-NEXT: [[MIN_VAL_NEXT]] = tail call i64 @llvm.smin.i64(i64 [[MIN_VAL]], i64 [[L]])
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; CHECK-NEXT: [[T:%.*]] = trunc i64 [[IV]] to i32
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; CHECK-NEXT: [[MIN_IDX_NEXT]] = select i1 [[CMP]], i32 [[T]], i32 [[MIN_IDX]]
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; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1
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; CHECK-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[IV_NEXT]], [[N]]
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; CHECK-NEXT: br i1 [[EXITCOND_NOT]], label %[[EXIT:.*]], label %[[LOOP]]
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; CHECK: [[EXIT]]:
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; CHECK-NEXT: [[RES:%.*]] = phi i32 [ [[MIN_IDX_NEXT]], %[[LOOP]] ]
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; CHECK-NEXT: ret i32 [[RES]]
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;
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entry:
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br label %loop
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loop:
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%iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
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%min.idx = phi i32 [ 0, %entry ], [ %min.idx.next, %loop ]
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%min.val = phi i64 [ 0, %entry ], [ %min.val.next, %loop ]
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%gep = getelementptr i64, ptr %src, i64 %iv
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%l = load i64, ptr %gep
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%cmp = icmp sgt i64 %min.val, %l
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%min.val.next = tail call i64 @llvm.smin.i64(i64 %min.val, i64 %l)
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%t = trunc i64 %iv to i32
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%min.idx.next = select i1 %cmp, i32 %t, i32 %min.idx
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%iv.next = add nuw nsw i64 %iv, 1
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%exitcond.not = icmp eq i64 %iv.next, %n
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br i1 %exitcond.not, label %exit, label %loop
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exit:
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%res = phi i32 [ %min.idx.next, %loop ]
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ret i32 %res
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}
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define i32 @test_vectorize_select_smin_first_idx_trunc_valid(ptr %src, i64 %n) {
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; CHECK-LABEL: define i32 @test_vectorize_select_smin_first_idx_trunc_valid(
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; CHECK-SAME: ptr [[SRC:%.*]], i64 [[N:%.*]]) {
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; CHECK-NEXT: [[ENTRY:.*]]:
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; CHECK-NEXT: br label %[[LOOP:.*]]
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; CHECK: [[LOOP]]:
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; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]
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; CHECK-NEXT: [[MIN_IDX:%.*]] = phi i32 [ 0, %[[ENTRY]] ], [ [[MIN_IDX_NEXT:%.*]], %[[LOOP]] ]
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; CHECK-NEXT: [[MIN_VAL:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[MIN_VAL_NEXT:%.*]], %[[LOOP]] ]
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; CHECK-NEXT: [[GEP:%.*]] = getelementptr i64, ptr [[SRC]], i64 [[IV]]
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; CHECK-NEXT: [[L:%.*]] = load i64, ptr [[GEP]], align 4
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; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i64 [[MIN_VAL]], [[L]]
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; CHECK-NEXT: [[MIN_VAL_NEXT]] = tail call i64 @llvm.smin.i64(i64 [[MIN_VAL]], i64 [[L]])
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; CHECK-NEXT: [[T:%.*]] = trunc i64 [[IV]] to i32
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; CHECK-NEXT: [[MIN_IDX_NEXT]] = select i1 [[CMP]], i32 [[T]], i32 [[MIN_IDX]]
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; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1
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; CHECK-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[IV_NEXT]], 100
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; CHECK-NEXT: br i1 [[EXITCOND_NOT]], label %[[EXIT:.*]], label %[[LOOP]]
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; CHECK: [[EXIT]]:
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; CHECK-NEXT: [[RES:%.*]] = phi i32 [ [[MIN_IDX_NEXT]], %[[LOOP]] ]
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; CHECK-NEXT: ret i32 [[RES]]
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;
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entry:
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br label %loop
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loop:
202+
%iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
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%min.idx = phi i32 [ 0, %entry ], [ %min.idx.next, %loop ]
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%min.val = phi i64 [ 0, %entry ], [ %min.val.next, %loop ]
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%gep = getelementptr i64, ptr %src, i64 %iv
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%l = load i64, ptr %gep
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%cmp = icmp sgt i64 %min.val, %l
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%min.val.next = tail call i64 @llvm.smin.i64(i64 %min.val, i64 %l)
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%t = trunc i64 %iv to i32
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%min.idx.next = select i1 %cmp, i32 %t, i32 %min.idx
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%iv.next = add nuw nsw i64 %iv, 1
212+
%exitcond.not = icmp eq i64 %iv.next, 100
213+
br i1 %exitcond.not, label %exit, label %loop
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exit:
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%res = phi i32 [ %min.idx.next, %loop ]
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ret i32 %res
218+
}

‎llvm/test/Transforms/LoopVectorize/select-umin-first-index.ll‎

Lines changed: 44 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -429,6 +429,50 @@ exit:
429429
ret i32 %res
430430
}
431431

432+
define i32 @test_vectorize_select_umin_idx_with_trunc_valid(ptr %src, i64 %n) {
433+
; CHECK-LABEL: define i32 @test_vectorize_select_umin_idx_with_trunc_valid(
434+
; CHECK-SAME: ptr [[SRC:%.*]], i64 [[N:%.*]]) {
435+
; CHECK-NEXT: [[ENTRY:.*]]:
436+
; CHECK-NEXT: br label %[[LOOP:.*]]
437+
; CHECK: [[LOOP]]:
438+
; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]
439+
; CHECK-NEXT: [[MIN_IDX:%.*]] = phi i32 [ 0, %[[ENTRY]] ], [ [[MIN_IDX_NEXT:%.*]], %[[LOOP]] ]
440+
; CHECK-NEXT: [[MIN_VAL:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[MIN_VAL_NEXT:%.*]], %[[LOOP]] ]
441+
; CHECK-NEXT: [[GEP:%.*]] = getelementptr i64, ptr [[SRC]], i64 [[IV]]
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; CHECK-NEXT: [[L:%.*]] = load i64, ptr [[GEP]], align 4
443+
; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i64 [[MIN_VAL]], [[L]]
444+
; CHECK-NEXT: [[MIN_VAL_NEXT]] = tail call i64 @llvm.umin.i64(i64 [[MIN_VAL]], i64 [[L]])
445+
; CHECK-NEXT: [[TRUNC:%.*]] = trunc i64 [[IV]] to i32
446+
; CHECK-NEXT: [[MIN_IDX_NEXT]] = select i1 [[CMP]], i32 [[TRUNC]], i32 [[MIN_IDX]]
447+
; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1
448+
; CHECK-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[IV_NEXT]], 100
449+
; CHECK-NEXT: br i1 [[EXITCOND_NOT]], label %[[EXIT:.*]], label %[[LOOP]]
450+
; CHECK: [[EXIT]]:
451+
; CHECK-NEXT: [[RES:%.*]] = phi i32 [ [[MIN_IDX_NEXT]], %[[LOOP]] ]
452+
; CHECK-NEXT: ret i32 [[RES]]
453+
;
454+
entry:
455+
br label %loop
456+
457+
loop:
458+
%iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
459+
%min.idx = phi i32 [ 0, %entry ], [ %min.idx.next, %loop ]
460+
%min.val = phi i64 [ 0, %entry ], [ %min.val.next, %loop ]
461+
%gep = getelementptr i64, ptr %src, i64 %iv
462+
%l = load i64, ptr %gep
463+
%cmp = icmp ugt i64 %min.val, %l
464+
%min.val.next = tail call i64 @llvm.umin.i64(i64 %min.val, i64 %l)
465+
%trunc = trunc i64 %iv to i32
466+
%min.idx.next = select i1 %cmp, i32 %trunc, i32 %min.idx
467+
%iv.next = add nuw nsw i64 %iv, 1
468+
%exitcond.not = icmp eq i64 %iv.next, 100
469+
br i1 %exitcond.not, label %exit, label %loop
470+
471+
exit:
472+
%res = phi i32 [ %min.idx.next, %loop ]
473+
ret i32 %res
474+
}
475+
432476
define ptr @test_with_ptr_index(ptr %start, ptr %end) {
433477
; CHECK-LABEL: define ptr @test_with_ptr_index(
434478
; CHECK-SAME: ptr [[START:%.*]], ptr [[END:%.*]]) {

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